MEMORY { text : origin = 0x80004000 } SECTIONS { . = 0x80004000; .init : { init0.o(.text) __start.o(.text) __init_registers.o(.text) __init_data.o(.text) __init_hardware.o(.text) __flush_cache.o(.text) memcpy.o(.text) __fill_mem.o(.text) memset.o(.text) TRK_mem.o(.text) __exception.o(.init) init1.o(.text) initdata.o(.rodata) *(.init) } extab_ : { *(extab_) } extabindex_ : { *(extabindex_) } .text : { code_80007020.o(.text) cpu.o(.text) tree.o(.text) code_80040B24.o(.text) ram.o(.text) code_80042064.o(.text) rom.o(.text) code_800440A8.o(.text) xlFile.o(.text) xlText.o(.text) xlList.o(.text) xlHeap.o(.text) code_80082074.o(.text) xlObject.o(.text) code_800825B0.o(.text) *(.text) } .ctors : { ctors.o(.ctors) *(.ctors) } .dtors : { dtors.o(.dtors) *(.dtors) } .rodata : { rodata.o(.rodata) *(.rodata) } .data : { data.o(.data) ram.o(.data) data2.o(.data) *(.data) } .bss : { bss.o(.bss) *(.bss) } .sdata : { sdata.o(.sdata) ram.o(.sdata) sdata_2.o(.sdata) *(.sdata) } .sbss : { sbss.o(.sbss) *(.sbss) } .sdata2 : { sdata2.o(.sdata2) *(.sdata2) } .sbss2 : { sbss2.o(.sbss2) *(.sbss2) } _stack_addr = (_f_sbss2 + SIZEOF(.sbss2) + 65536 + 0x7) & ~0x7; _stack_end = _f_sbss2 + SIZEOF(.sbss2); _db_stack_addr = (_stack_addr + 0x2000); _db_stack_end = _stack_addr; __ArenaLo = (_db_stack_addr + 0x1f) & ~0x1f; __ArenaHi = 0x81700000 ; } /* .init 0x80004000 - 0x800064E0 extab_ 0x800064E0 - 0x800069A0 extabindex_ 0x800069A0 - 0x80007020 .text 0x80007020 - 0x8016A6E0 .ctors 0x8016A6E0 - 0x8016A740 .dtors 0x8016A740 - 0x8016A760 .rodata 0x8016A760 - 0x8016F7A0 .data 0x8016F7A0 - 0x801A0CC0 .bss 0x801A0CC0 - 0x8025C6C0 .sdata 0x8025C6C0 - 0x8025CFE0 .sbss 0x8025CFE0 - 0x8025DD40 .sdata2 0x8025DD40 - 0x8025EFA0 .sbss2 0x8025EFA0 - 0x8025EFB8 */