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feat(phase-30 S47-A3): jtbl family func_80184C74 — 3/3 siblings banked

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Exemplar ov_SC06_018 @0x80184c74 (matched), 3 members. Per-sibling whole-binary byte-gate (G3/P9) is the
arbiter: jtbl_carve -> make extract -> remap_hseq -> make build, keep iff byte-identical else
revert. Tally: === func_80184C74: {'BANKED': 3} ===

Committed per family because jtbl_family_bank's per-sibling revert restores from HEAD — an
uncommitted prior family would be lost. Campaign-end R22 verifies the fleet.
This commit is contained in:
Drew T
2026-08-10 19:14:37 -06:00
parent 4878432f0c
commit 0a5ee2de7d
10 changed files with 12146 additions and 3167 deletions
Download Patch File Download Diff File Expand all files Collapse all files
config/overlays.mk
+3 -3
View File
@@ -4347,7 +4347,7 @@ ov_SC06_022_ELF := $(ov_SC06_022_OUT).elf
ov_SC06_022_MAPFILE := $(ov_SC06_022_OUT).map
ov_SC06_022_LD_SCRIPT := $(ov_SC06_022_OUT).ld
ov_SC06_022_SPLAT_YAML := config/splat.ov_SC06_022.yaml
ov_SC06_022_JTBL_INTERLEAVE := --order tail.data.o,ov_SC06_022.o,ov_SC06_022_jr_8012ACE0.o,tail2.data.o,ov_SC06_022_jr_80135888.o,tail3.data.o,ov_SC06_022_jr_80135A4C.o,tail4.data.o,ov_SC06_022_jr_80135D20.o,tail5.data.o,ov_SC06_022_jr_801380E0.o,ov_SC06_022_o0c.o,tail6.data.o,ov_SC06_022_jr_8013F350.o,tail7.data.o,ov_SC06_022_jr_8013FFD8.o,tail8.data.o,ov_SC06_022_jr_80140608.o,tail9.data.o,ov_SC06_022_jr_8015444C.o,ov_SC06_022_jr_80154C24.o,ov_SC06_022_jr_801588CC.o,ov_SC06_022_jr_80159C84.o,tail10.data.o,ov_SC06_022_jr_8015A3C8.o,tail11.data.o,ov_SC06_022_jr_8015AE2C.o,tail12.data.o,ov_SC06_022_jr_8015C32C.o,tail13.data.o,ov_SC06_022_jr_8016AB6C.o,tail14.data.o,ov_SC06_022_jr_80171B4C.o,ov_SC06_022_jr_801734BC.o,tail15.data.o,ov_SC06_022_jr_801789AC.o,ov_SC06_022_jr_80178D40.o,tail16.data.o,ov_SC06_022_jr_8017A4AC.o,tail17.data.o,ov_SC06_022_jr_8017AE2C.o,ov_SC06_022_jr_8017BEBC.o,tail18.data.o,ov_SC06_022_jr_80184A28.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
ov_SC06_022_JTBL_INTERLEAVE := --order tail.data.o,ov_SC06_022.o,ov_SC06_022_jr_8012ACE0.o,tail2.data.o,ov_SC06_022_jr_80135888.o,tail3.data.o,ov_SC06_022_jr_80135A4C.o,tail4.data.o,ov_SC06_022_jr_80135D20.o,tail5.data.o,ov_SC06_022_jr_801380E0.o,ov_SC06_022_o0c.o,tail6.data.o,ov_SC06_022_jr_8013F350.o,tail7.data.o,ov_SC06_022_jr_8013FFD8.o,tail8.data.o,ov_SC06_022_jr_80140608.o,tail9.data.o,ov_SC06_022_jr_8015444C.o,ov_SC06_022_jr_80154C24.o,ov_SC06_022_jr_801588CC.o,ov_SC06_022_jr_80159C84.o,tail10.data.o,ov_SC06_022_jr_8015A3C8.o,tail11.data.o,ov_SC06_022_jr_8015AE2C.o,tail12.data.o,ov_SC06_022_jr_8015C32C.o,tail13.data.o,ov_SC06_022_jr_8016AB6C.o,tail14.data.o,ov_SC06_022_jr_80171B4C.o,ov_SC06_022_jr_801734BC.o,tail15.data.o,ov_SC06_022_jr_801789AC.o,ov_SC06_022_jr_80178D40.o,tail16.data.o,ov_SC06_022_jr_8017A4AC.o,tail17.data.o,ov_SC06_022_jr_8017AE2C.o,ov_SC06_022_jr_8017BEBC.o,tail18.data.o,ov_SC06_022_jr_80182D08.o,tail19.data.o,ov_SC06_022_jr_80184A28.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
build/src/ov_SC06_022/ov_SC06_022.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
build/src/ov_SC06_022/ov_SC06_022_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
build/src/ov_SC06_022/ov_SC06_022_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
@@ -4382,7 +4382,7 @@ ov_SC06_024_ELF := $(ov_SC06_024_OUT).elf
ov_SC06_024_MAPFILE := $(ov_SC06_024_OUT).map
ov_SC06_024_LD_SCRIPT := $(ov_SC06_024_OUT).ld
ov_SC06_024_SPLAT_YAML := config/splat.ov_SC06_024.yaml
ov_SC06_024_JTBL_INTERLEAVE := --order tail.data.o,ov_SC06_024.o,ov_SC06_024_jr_8012ACE0.o,tail2.data.o,ov_SC06_024_jr_80135888.o,tail3.data.o,ov_SC06_024_jr_80135A4C.o,tail4.data.o,ov_SC06_024_jr_80135D20.o,tail5.data.o,ov_SC06_024_jr_801380E0.o,ov_SC06_024_o0c.o,tail6.data.o,ov_SC06_024_jr_8013F350.o,tail7.data.o,ov_SC06_024_jr_8013FFD8.o,tail8.data.o,ov_SC06_024_jr_80140608.o,tail9.data.o,ov_SC06_024_jr_8015444C.o,ov_SC06_024_jr_80154C24.o,ov_SC06_024_jr_801588CC.o,ov_SC06_024_jr_80159C84.o,tail10.data.o,ov_SC06_024_jr_8015A3C8.o,tail11.data.o,ov_SC06_024_jr_8015AE2C.o,tail12.data.o,ov_SC06_024_jr_8015C32C.o,tail13.data.o,ov_SC06_024_jr_8016AB6C.o,tail14.data.o,ov_SC06_024_jr_80171B4C.o,ov_SC06_024_jr_801734BC.o,tail15.data.o,ov_SC06_024_jr_801789AC.o,ov_SC06_024_jr_80178D40.o,tail16.data.o,ov_SC06_024_jr_8017A4AC.o,tail17.data.o,ov_SC06_024_jr_8017AE2C.o,ov_SC06_024_jr_8017BEBC.o,tail18.data.o,ov_SC06_024_jr_80186F00.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
ov_SC06_024_JTBL_INTERLEAVE := --order tail.data.o,ov_SC06_024.o,ov_SC06_024_jr_8012ACE0.o,tail2.data.o,ov_SC06_024_jr_80135888.o,tail3.data.o,ov_SC06_024_jr_80135A4C.o,tail4.data.o,ov_SC06_024_jr_80135D20.o,tail5.data.o,ov_SC06_024_jr_801380E0.o,ov_SC06_024_o0c.o,tail6.data.o,ov_SC06_024_jr_8013F350.o,tail7.data.o,ov_SC06_024_jr_8013FFD8.o,tail8.data.o,ov_SC06_024_jr_80140608.o,tail9.data.o,ov_SC06_024_jr_8015444C.o,ov_SC06_024_jr_80154C24.o,ov_SC06_024_jr_801588CC.o,ov_SC06_024_jr_80159C84.o,tail10.data.o,ov_SC06_024_jr_8015A3C8.o,tail11.data.o,ov_SC06_024_jr_8015AE2C.o,tail12.data.o,ov_SC06_024_jr_8015C32C.o,tail13.data.o,ov_SC06_024_jr_8016AB6C.o,tail14.data.o,ov_SC06_024_jr_80171B4C.o,ov_SC06_024_jr_801734BC.o,tail15.data.o,ov_SC06_024_jr_801789AC.o,ov_SC06_024_jr_80178D40.o,tail16.data.o,ov_SC06_024_jr_8017A4AC.o,tail17.data.o,ov_SC06_024_jr_8017AE2C.o,ov_SC06_024_jr_8017BEBC.o,tail18.data.o,ov_SC06_024_jr_801851E0.o,tail19.data.o,ov_SC06_024_jr_80186F00.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
build/src/ov_SC06_024/ov_SC06_024.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
build/src/ov_SC06_024/ov_SC06_024_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
build/src/ov_SC06_024/ov_SC06_024_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
@@ -4594,7 +4594,7 @@ ov_SC06_033_ELF := $(ov_SC06_033_OUT).elf
ov_SC06_033_MAPFILE := $(ov_SC06_033_OUT).map
ov_SC06_033_LD_SCRIPT := $(ov_SC06_033_OUT).ld
ov_SC06_033_SPLAT_YAML := config/splat.ov_SC06_033.yaml
ov_SC06_033_JTBL_INTERLEAVE := --order tail.data.o,ov_SC06_033.o,ov_SC06_033_jr_8012ACE0.o,tail2.data.o,ov_SC06_033_jr_80135888.o,tail3.data.o,ov_SC06_033_jr_80135A4C.o,tail4.data.o,ov_SC06_033_jr_80135D20.o,tail5.data.o,ov_SC06_033_jr_801380E0.o,ov_SC06_033_o0c.o,tail6.data.o,ov_SC06_033_jr_8013F350.o,tail7.data.o,ov_SC06_033_jr_8013FFD8.o,tail8.data.o,ov_SC06_033_jr_80140608.o,tail9.data.o,ov_SC06_033_jr_8015444C.o,ov_SC06_033_jr_80154C24.o,ov_SC06_033_jr_801588CC.o,ov_SC06_033_jr_80159C84.o,tail10.data.o,ov_SC06_033_jr_8015A3C8.o,tail11.data.o,ov_SC06_033_jr_8015AE2C.o,tail12.data.o,ov_SC06_033_jr_8015C32C.o,tail13.data.o,ov_SC06_033_jr_8016AB6C.o,tail14.data.o,ov_SC06_033_jr_80171B4C.o,ov_SC06_033_jr_801734BC.o,tail15.data.o,ov_SC06_033_jr_801789AC.o,ov_SC06_033_jr_80178D40.o,tail16.data.o,ov_SC06_033_jr_8017A4AC.o,tail17.data.o,ov_SC06_033_jr_8017AE2C.o,ov_SC06_033_jr_8017C24C.o,tail18.data.o,ov_SC06_033_jr_8018C2D8.o,tail19.data.o,ov_SC06_033_jr_8018D98C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
ov_SC06_033_JTBL_INTERLEAVE := --order tail.data.o,ov_SC06_033.o,ov_SC06_033_jr_8012ACE0.o,tail2.data.o,ov_SC06_033_jr_80135888.o,tail3.data.o,ov_SC06_033_jr_80135A4C.o,tail4.data.o,ov_SC06_033_jr_80135D20.o,tail5.data.o,ov_SC06_033_jr_801380E0.o,ov_SC06_033_o0c.o,tail6.data.o,ov_SC06_033_jr_8013F350.o,tail7.data.o,ov_SC06_033_jr_8013FFD8.o,tail8.data.o,ov_SC06_033_jr_80140608.o,tail9.data.o,ov_SC06_033_jr_8015444C.o,ov_SC06_033_jr_80154C24.o,ov_SC06_033_jr_801588CC.o,ov_SC06_033_jr_80159C84.o,tail10.data.o,ov_SC06_033_jr_8015A3C8.o,tail11.data.o,ov_SC06_033_jr_8015AE2C.o,tail12.data.o,ov_SC06_033_jr_8015C32C.o,tail13.data.o,ov_SC06_033_jr_8016AB6C.o,tail14.data.o,ov_SC06_033_jr_80171B4C.o,ov_SC06_033_jr_801734BC.o,tail15.data.o,ov_SC06_033_jr_801789AC.o,ov_SC06_033_jr_80178D40.o,tail16.data.o,ov_SC06_033_jr_8017A4AC.o,tail17.data.o,ov_SC06_033_jr_8017AE2C.o,ov_SC06_033_jr_8017C24C.o,tail18.data.o,ov_SC06_033_jr_801836FC.o,tail19.data.o,ov_SC06_033_jr_8018C2D8.o,tail20.data.o,ov_SC06_033_jr_8018D98C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
build/src/ov_SC06_033/ov_SC06_033.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
build/src/ov_SC06_033/ov_SC06_033_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
build/src/ov_SC06_033/ov_SC06_033_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
config/splat.ov_SC06_022.yaml
+4 -1
View File
@@ -121,6 +121,7 @@ segments:
- [0x52354, c, ov_SC06_022_jr_8017A4AC]
- [0x52cd4, c, ov_SC06_022_jr_8017AE2C]
- [0x53d64, c, ov_SC06_022_jr_8017BEBC]
- [0x5abb0, c, ov_SC06_022_jr_80182D08]
- [0x5c8d0, c, ov_SC06_022_jr_80184A28]
- [0x65174, data, tail]
- [0xb782c, .rodata, ov_SC06_022] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
@@ -165,8 +166,10 @@ segments:
- [0xb894c, .rodata, ov_SC06_022_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xb8960, .rodata, ov_SC06_022_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xb8980, data, tail18]
- [0xb89d4, .rodata, ov_SC06_022_jr_80182D08] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xb89e8, data, tail19]
- [0xb8acc, .rodata, ov_SC06_022_jr_80184A28] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xb8ae0, data, tail19]
- [0xb8ae0, data, tail20]
- [0xBA114, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
- [0xBA117] # EOF marker = the 0.4.dec byte length
# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
config/splat.ov_SC06_024.yaml
+4 -1
View File
@@ -121,6 +121,7 @@ segments:
- [0x52354, c, ov_SC06_024_jr_8017A4AC]
- [0x52cd4, c, ov_SC06_024_jr_8017AE2C]
- [0x53d64, c, ov_SC06_024_jr_8017BEBC]
- [0x5d088, c, ov_SC06_024_jr_801851E0]
- [0x5eda8, c, ov_SC06_024_jr_80186F00]
- [0x6764c, data, tail]
- [0xb6970, .rodata, ov_SC06_024] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
@@ -165,8 +166,10 @@ segments:
- [0xb7a90, .rodata, ov_SC06_024_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xb7aa4, .rodata, ov_SC06_024_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xb7ac4, data, tail18]
- [0xb7b58, .rodata, ov_SC06_024_jr_801851E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xb7b6c, data, tail19]
- [0xb7c50, .rodata, ov_SC06_024_jr_80186F00] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xb7c64, data, tail19]
- [0xb7c64, data, tail20]
- [0xB980C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
- [0xB980F] # EOF marker = the 0.4.dec byte length
# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
config/splat.ov_SC06_033.yaml
+5 -2
View File
@@ -121,6 +121,7 @@ segments:
- [0x52354, c, ov_SC06_033_jr_8017A4AC]
- [0x52cd4, c, ov_SC06_033_jr_8017AE2C]
- [0x540f4, c, ov_SC06_033_jr_8017C24C]
- [0x5b5a4, c, ov_SC06_033_jr_801836FC]
- [0x64180, c, ov_SC06_033_jr_8018C2D8]
- [0x65834, c, ov_SC06_033_jr_8018D98C]
- [0x69690, data, tail]
@@ -166,10 +167,12 @@ segments:
- [0xa6edc, .rodata, ov_SC06_033_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xa6ef0, .rodata, ov_SC06_033_jr_8017C24C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xa6f10, data, tail18]
- [0xa6f24, .rodata, ov_SC06_033_jr_801836FC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xa6f38, data, tail19]
- [0xa7084, .rodata, ov_SC06_033_jr_8018C2D8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xa70ac, data, tail19]
- [0xa70ac, data, tail20]
- [0xa70dc, .rodata, ov_SC06_033_jr_8018D98C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xa710c, data, tail20]
- [0xa710c, data, tail21]
- [0xA8E94, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
- [0xA8E97] # EOF marker = the 0.4.dec byte length
# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
src/ov_SC06_022/ov_SC06_022_jr_8017BEBC.c
-318
View File
@@ -3985,321 +3985,3 @@ INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80182B3
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80182B90);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80182CA0);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80182D08);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80183188);
/* func_801832FC — randomised state entry (state word 0x19):
* set the state at 0x02, push command list D_801D46F8, seed the timer at
* 0x1C with rand()%64 + 0x80, nudge the value at 0xE8 by a random 0..1023
* in a random direction, then park 18000 at 0x48.
*
* §71 sibling-first: func_80183CDC / func_8018598C (same TU, MATCHed) are the
* same `if ((rand() & 1) != 0) v = base + off; else v = base - off;` idiom.
*/
extern s32 rand(void);
extern void func_8012A828(s32 a0, void *a1);
void func_801832FC(s32 param_1) {
extern u8 D_801D46F8[];
s32 r;
s32 off;
s32 base;
s32 nv;
*(s16 *)(param_1 + 2) = 0x19;
func_8012A828(param_1, D_801D46F8);
r = rand();
*(s32 *)(param_1 + 0x1C) = r % 0x40 + 0x80;
r = rand();
off = r % 0x400;
base = *(s32 *)(param_1 + 0xE8);
if ((rand() & 1) != 0) {
nv = base + off;
} else {
nv = base - off;
}
*(s32 *)(param_1 + 0xE8) = nv;
*(s32 *)(param_1 + 0x48) = 18000;
}
extern s32 func_8012B608(s32 a0, s32 a1, s32 a2);
extern void func_8012B178(s32 a0, s32 a1);
extern s32 func_801856F0(s32 a0);
extern void func_80185878(s32 a0);
extern void func_8012F214(s32, s32, s32);
extern s32 func_8012BCCC(s32 a0);
extern s32 func_80187318(void *a0, s32 a1, s32 a2);
extern s32 func_8012BEE8(); /* TU-canonical: an earlier call site passes zero args */
void func_801833B4(s32 p) {
extern u8 D_801BD0BC[];
s32 buf10[2];
s32 r_b608;
r_b608 = func_8012B608((s32)*(s16 *)(*(s32 *)(p + 0x20) + 0x12),
*(s32 *)(p + 0xE8), 0x10);
*(u16 *)(*(s32 *)(p + 0x20) + 0x12) =
*(u16 *)(*(s32 *)(p + 0x20) + 0x12) + r_b608;
func_8012B178(p, 0xFFFBD000);
*(u32 *)(p + 0xE0) &= 0xFFFFFFBF;
if (func_801856F0(p) == 0) {
func_80185878(p);
}
((void (*)(s32, void *, void *))func_8012F214)(p, D_801BD0BC, buf10);
if (func_80187318(buf10, *(s16 *)(*(s32 *)(p + 0x20) + 0x12), 0x380) != 0 &&
func_8012BCCC(p) < 0x64000) {
*(u16 *)(p + 2) = 0x1C;
} else if (func_8012BEE8(p) != 0) {
*(u16 *)(p + 2) = 0x1A;
}
}
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80183494);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_801834D4);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80183554);
// @class: schedule
// @stuck: none — MATCH (181 ins, relocation-masked)
extern s32 func_8012BEE8();
extern void func_8012A828(s32 a0, void *a1);
extern s32 func_8012B8E4(s32 a0, s32 a1);
extern void func_80187414(s32 a0, void *a1, void *a2, s32 a3);
extern void func_801873B0(s32 a0, void *a1, s32 a2, s32 a3, s32 a4, s32 a5);
extern s32 func_80132EF4(s32 a0, s32 a1);
extern void func_80049CAC(s32, s32);
extern void func_800484EC(s32, s32, s32);
extern void func_80187EF4(s32 a0, s32 a1);
extern void func_8012F214(s32, s32, s32);
extern s32 func_8012BCCC(s32 a0);
extern s32 func_80187318(void *a0, s32 a1, s32 a2);
extern s32 rand(void);
void func_8018358C(s32 p) {
extern u8 D_801D4328[];
extern u8 D_801D42B0[];
extern u8 D_801BD0D4[];
extern u8 D_801BD0E4[];
extern u8 D_801BD0BC[];
s32 buf58[8]; /* auStack_58 sp+0x18 (0x20) */
s32 g38[4]; /* uStack_38/34, iStack_30 sp+0x38 (0x10) */
u16 g28[4]; /* uStack_28/26/24 sp+0x48 (0x08) */
u16 out[4]; /* func_80187414 output sp+0x50 (0x08) */
s32 buf18[2]; /* auStack_18 sp+0x58 (0x08) */
s32 i;
s32 e;
if (*(u16 *)(p + 0x34) == 0) {
if (func_8012BEE8() == 0) return;
func_8012A828(p, D_801D4328);
*(u16 *)(p + 0x34) += 1;
}
if (*(s32 *)(p + 0x94) < 0xe) {
*(u16 *)(*(s32 *)(p + 0x20) + 0x12) += func_8012B8E4(p, 8);
}
if (*(s32 *)(p + 0x94) == 0xe) {
func_80187414(p, D_801BD0D4, out, 0xb);
func_801873B0(p, out, 0x282, 0, 0, 0);
e = func_80132EF4(p, 0x22);
if (e != 0) {
*(u16 *)(e + 0x34) = 0x7002;
*(u16 *)(e + 6) = out[0];
*(u16 *)(e + 0xa) = out[1];
*(u16 *)(e + 0xe) = out[2];
*(u16 *)(*(s32 *)(e + 0x20) + 0x2c) = 0xc006;
}
g28[0] = 0x40;
g28[1] = *(u16 *)(*(s32 *)(p + 0x20) + 0x12);
g28[2] = 0;
((void (*)(void *, void *))func_80049CAC)(g28, buf58);
i = 0;
do {
e = func_80132EF4(p, 0x22);
if (e != 0) {
g38[1] = 0;
g38[0] = 0;
g38[2] = (rand() % 5 + 4) << 16;
((void (*)(void *, void *, s32))func_800484EC)(buf58, g38, e + 0x10);
*(u16 *)(e + 0x34) = ((rand() % 2 + 2) << 12) | 1;
*(u16 *)(*(s32 *)(e + 0x20) + 0x2c) = 0xc006;
func_80187414(p, D_801BD0E4 + i * 8, out, 0xb);
*(u16 *)(e + 6) = out[0];
*(u16 *)(e + 0xa) = out[1];
*(u16 *)(e + 0xe) = out[2];
}
i++;
} while (i < 5);
func_80187EF4(p, 0x8be);
}
if (*(u16 *)(p + 0x72) & 0x4000) {
((void (*)(s32, void *, void *))func_8012F214)(p, D_801BD0BC, buf18);
if (0x63fff < func_8012BCCC(p) ||
func_80187318(buf18, *(s16 *)(*(s32 *)(p + 0x20) + 0x12), 0x380) == 0) {
*(u16 *)(p + 2) = 0x1b;
func_8012A828(p, D_801D42B0);
*(s32 *)(p + 0x1c) = 0x20;
}
}
}
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80183860);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_801839D8);
/* holds a pointer value */
extern int rand(void);
extern s32 func_8012BEE8(s32 a0);
extern void func_8012B0B4(unsigned int *p, int a1, int a2);
extern s32 func_8012B744(void *a0, void *a1);
extern s32 func_8012B608(s32 a0, s32 a1, s32 a2);
extern void func_8012B178(s32 a0, s32 a1);
extern s32 func_801856F0(s32 a0);
extern void func_80185878(s32 a0);
extern void func_8012F14C(s32 a0, s32 a1, s32 a2);
extern void func_80187414(s32, void*, void*, s32);
extern void func_801873B0(s32, void*, s32, s32, s32, s32);
extern s32 func_80013478(s32 a0, s32 a1);
void func_80183A20(s32 param_1) {
extern s32 D_80126B58;
extern u16 D_800B99DA;
extern u8 D_801BD0DC;
/* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every
LATER function in this TU, which blocks a byte-true decl of a different type.
Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
extern s32 *D_80126B78;
u8 auStack_38[8];
s16 sp20[3];
u8 auStack_28[8];
register StructB58_80183A20 *b58 __asm__("$20") = &(*(StructB58_80183A20 *)&D_80126B58); /* $s4 */
short *psVar7 = (short *)(param_1 + 0xec);
s32 sVar1;
s32 r_b608;
if (func_8012BEE8(param_1) != 0) {
register unsigned int *p28 __asm__("$21") = (unsigned int *)auStack_28; /* $s5 */
s32 r0 = rand();
s32 coord;
s32 s2v;
s32 r3;
s32 tmp;
coord = r0 % 0x400;
sVar1 = *(s16 *)((*(s32 *)&(*(s32 *)&D_80126B78)) + 0x12);
s2v = sVar1 + 0x800;
if ((rand() & 1) == 0) {
coord = s2v - coord;
} else {
s32 c = coord; /* fresh pseudo so gcc keeps s2v first in the addu (§10 A1) */
coord = s2v + c;
}
func_8012B0B4(p28, coord, rand() % 0x200 + 0x200);
tmp = *(s32 *)auStack_28;
psVar7[0] = b58->f6 + tmp;
psVar7[1] = b58->fa;
psVar7[2] = b58->fe + (tmp >> 16);
r3 = rand();
*(s32 *)(param_1 + 0x1c) = 0x80;
*(s16 *)(param_1 + 0x100) = r3 % 9 + 8;
}
if ((*(u32 *)(param_1 + 0xe0) & 0x40) == 0) {
*(u32 *)(param_1 + 0xe8) = func_8012B744((void *)(param_1 + 4), psVar7);
}
r_b608 = func_8012B608((s32)*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12),
*(s32 *)(param_1 + 0xe8),
(s32)*(s16 *)(param_1 + 0x100));
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) =
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) + r_b608;
func_8012B178(param_1, 0xfffa0000);
*(u32 *)(param_1 + 0xe0) &= 0xffffffbf;
if (func_801856F0(param_1) == 0) {
func_80185878(param_1);
sp20[1] = 0;
sp20[0] = 0;
sp20[2] = -0x100;
((void (*)(s32, s32, s32))func_8012F14C)(*(s32 *)(param_1 + 0x20) + 0x34,
(s32)sp20, (s32)psVar7);
}
if (((u32)D_800B99DA % 0x28 == 0) && ((*(u32 *)(param_1 + 0xe0) & 0x80) == 0)) {
((void (*)(s32, s32, s32, s32))func_80187414)(param_1, (s32)&D_801BD0DC, (s32)auStack_38, 0xb);
((void (*)(s32, s32, s32, s32, s32, s32))func_801873B0)(param_1, (s32)auStack_38, 0x282, 1, 0, 0);
*(u32 *)(param_1 + 0xe0) |= 0x80;
}
if (func_80013478(param_1 + 4, (s32)psVar7) < 0x400) {
*(s32 *)(param_1 + 0x1c) = 0;
}
}
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80183CC0);
extern void func_801850CC(void);
void func_80183E3C(s32 arg0) {
if (*(s16 *)((char *)arg0 + 0x98) == 0) {
((void (*)(void))func_801850CC)();
}
}
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80183E6C);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80183FEC);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80184304);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80184768);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_801847CC);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80184818);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80184894);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_801848E4);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80184928);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_80184970);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_801849BC);
src/ov_SC06_022/ov_SC06_022_jr_80182D08.c
+3272
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src/ov_SC06_024/ov_SC06_024_jr_8017BEBC.c
-232
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@@ -4718,235 +4718,3 @@ INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_8018501
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80185068);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80185178);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_801851E0);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80185660);
/* func_801857D4 — randomised state entry (state word 0x19):
* set the state at 0x02, push command list D_801D383C, seed the timer at
* 0x1C with rand()%64 + 0x80, nudge the value at 0xE8 by a random 0..1023
* in a random direction, then park 18000 at 0x48.
*
* §71 sibling-first: func_80183CDC / func_8018598C (same TU, MATCHed) are the
* same `if ((rand() & 1) != 0) v = base + off; else v = base - off;` idiom.
*/
extern s32 rand(void);
extern void func_8012A828(s32 a0, void *a1);
void func_801857D4(s32 param_1) {
extern u8 D_801D383C[];
s32 r;
s32 off;
s32 base;
s32 nv;
*(s16 *)(param_1 + 2) = 0x19;
func_8012A828(param_1, D_801D383C);
r = rand();
*(s32 *)(param_1 + 0x1C) = r % 0x40 + 0x80;
r = rand();
off = r % 0x400;
base = *(s32 *)(param_1 + 0xE8);
if ((rand() & 1) != 0) {
nv = base + off;
} else {
nv = base - off;
}
*(s32 *)(param_1 + 0xE8) = nv;
*(s32 *)(param_1 + 0x48) = 18000;
}
extern s32 func_8012B608(s32 a0, s32 a1, s32 a2);
extern void func_8012B178(s32 a0, s32 a1);
extern s32 func_80187BC8(s32 a0);
extern void func_80187D50(s32 a0);
extern void func_8012F214(s32, s32, s32);
extern s32 func_8012BCCC(s32 a0);
extern s32 func_801897F0(void *a0, s32 a1, s32 a2);
extern s32 func_8012BEE8(); /* TU-canonical: an earlier call site passes zero args */
void func_8018588C(s32 p) {
extern u8 D_801BC200[];
s32 buf10[2];
s32 r_b608;
r_b608 = func_8012B608((s32)*(s16 *)(*(s32 *)(p + 0x20) + 0x12),
*(s32 *)(p + 0xE8), 0x10);
*(u16 *)(*(s32 *)(p + 0x20) + 0x12) =
*(u16 *)(*(s32 *)(p + 0x20) + 0x12) + r_b608;
func_8012B178(p, 0xFFFBD000);
*(u32 *)(p + 0xE0) &= 0xFFFFFFBF;
if (func_80187BC8(p) == 0) {
func_80187D50(p);
}
((void (*)(s32, void *, void *))func_8012F214)(p, D_801BC200, buf10);
if (func_801897F0(buf10, *(s16 *)(*(s32 *)(p + 0x20) + 0x12), 0x380) != 0 &&
func_8012BCCC(p) < 0x64000) {
*(u16 *)(p + 2) = 0x1C;
} else if (func_8012BEE8(p) != 0) {
*(u16 *)(p + 2) = 0x1A;
}
}
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_8018596C);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_801859AC);
extern void func_8012A828(s32, void*);
extern short D_801D33F4;
void func_80185A2C(short *a0) {
*(short *)((char *)a0 + 0x2) = 0x1D;
*(short *)((char *)a0 + 0x34) = 0;
*(int *)((char *)a0 + 0x1c) = 0xf;
((void (*)(s32 *, s32))func_8012A828)((s32 *)a0, (int)&D_801D33F4);
}
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80185A64);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80185D38);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80185EB0);
/* holds a pointer value */
extern int rand(void);
extern s32 func_8012BEE8(s32 a0);
extern void func_8012B0B4(unsigned int *p, int a1, int a2);
extern s32 func_8012B744(void *a0, void *a1);
extern s32 func_8012B608(s32 a0, s32 a1, s32 a2);
extern void func_8012B178(s32 a0, s32 a1);
extern s32 func_80187BC8(s32 a0);
extern void func_80187D50(s32 a0);
extern void func_8012F14C(s32 a0, s32 a1, s32 a2);
extern void func_801898EC(s32, void*, void*, s32);
extern void func_80189888(s32, void*, s32, s32, s32, s32);
extern s32 func_80013478(s32 a0, s32 a1);
void func_80185EF8(s32 param_1) {
extern s32 D_80126B58;
extern u16 D_800B99DA;
extern u8 D_801BC220;
/* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every
LATER function in this TU, which blocks a byte-true decl of a different type.
Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
extern s32 *D_80126B78;
u8 auStack_38[8];
s16 sp20[3];
u8 auStack_28[8];
register StructB58_80185EF8 *b58 __asm__("$20") = &(*(StructB58_80185EF8 *)&D_80126B58); /* $s4 */
short *psVar7 = (short *)(param_1 + 0xec);
s32 sVar1;
s32 r_b608;
if (func_8012BEE8(param_1) != 0) {
register unsigned int *p28 __asm__("$21") = (unsigned int *)auStack_28; /* $s5 */
s32 r0 = rand();
s32 coord;
s32 s2v;
s32 r3;
s32 tmp;
coord = r0 % 0x400;
sVar1 = *(s16 *)((*(s32 *)&(*(s32 *)&D_80126B78)) + 0x12);
s2v = sVar1 + 0x800;
if ((rand() & 1) == 0) {
coord = s2v - coord;
} else {
s32 c = coord; /* fresh pseudo so gcc keeps s2v first in the addu (§10 A1) */
coord = s2v + c;
}
func_8012B0B4(p28, coord, rand() % 0x200 + 0x200);
tmp = *(s32 *)auStack_28;
psVar7[0] = b58->f6 + tmp;
psVar7[1] = b58->fa;
psVar7[2] = b58->fe + (tmp >> 16);
r3 = rand();
*(s32 *)(param_1 + 0x1c) = 0x80;
*(s16 *)(param_1 + 0x100) = r3 % 9 + 8;
}
if ((*(u32 *)(param_1 + 0xe0) & 0x40) == 0) {
*(u32 *)(param_1 + 0xe8) = func_8012B744((void *)(param_1 + 4), psVar7);
}
r_b608 = func_8012B608((s32)*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12),
*(s32 *)(param_1 + 0xe8),
(s32)*(s16 *)(param_1 + 0x100));
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) =
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) + r_b608;
func_8012B178(param_1, 0xfffa0000);
*(u32 *)(param_1 + 0xe0) &= 0xffffffbf;
if (func_80187BC8(param_1) == 0) {
func_80187D50(param_1);
sp20[1] = 0;
sp20[0] = 0;
sp20[2] = -0x100;
((void (*)(s32, s32, s32))func_8012F14C)(*(s32 *)(param_1 + 0x20) + 0x34,
(s32)sp20, (s32)psVar7);
}
if (((u32)D_800B99DA % 0x28 == 0) && ((*(u32 *)(param_1 + 0xe0) & 0x80) == 0)) {
((void (*)(s32, s32, s32, s32))func_801898EC)(param_1, (s32)&D_801BC220, (s32)auStack_38, 0xb);
((void (*)(s32, s32, s32, s32, s32, s32))func_80189888)(param_1, (s32)auStack_38, 0x282, 1, 0, 0);
*(u32 *)(param_1 + 0xe0) |= 0x80;
}
if (func_80013478(param_1 + 4, (s32)psVar7) < 0x400) {
*(s32 *)(param_1 + 0x1c) = 0;
}
}
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80186198);
extern void func_801875A4(void);
void func_80186314(void *a0) {
if (*(s16 *)((s32)a0 + 0x98) == 0) {
((void (*)(void))func_801875A4)();
}
}
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80186344);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_801864C4);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_801867DC);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80186C40);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80186CA4);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80186CF0);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80186D6C);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80186DBC);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80186E00);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80186E48);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80186E94);
src/ov_SC06_024/ov_SC06_024_jr_801851E0.c
+3225
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src/ov_SC06_033/ov_SC06_033_jr_8017C24C.c
-2610
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src/ov_SC06_033/ov_SC06_033_jr_801836FC.c
+5633
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