mirror of
https://github.com/Druthulu/BFM-decomp
synced 2026-09-26 21:36:06 -04:00
feat(phase-21): worker gate — +8 fns x0 propagated (fleet 61.22%)
This commit is contained in:
Drew T
@@ -879,7 +879,55 @@ DEFINE_func_801430F4() /* dedup: shared engine-core @0x801430F4 (src/shared) */
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DEFINE_func_80143188() /* dedup: shared engine-core @0x80143188 (src/shared) */
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INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077", func_801431E8);
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// @class: regalloc-order
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// @stuck: none — MATCH (memcpy unaligned copy; $s0 survivor pinned, store-before-copy keeps $v0 for early store/branch)
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extern void *memcpy(void *, const void *, u32);
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extern void func_8012C1B8(void);
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extern void func_8012CAE4(void *a0);
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extern int func_8001CA88(int, void *);
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extern s32 func_8012E504(s32 a0, s32 a1);
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extern void func_800233CC(void *, unsigned short);
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extern void func_80142B2C(void *arg0);
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extern u8 D_801D891C;
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extern u8 D_801D95D0;
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extern u8 D_801D95D4;
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void func_801431E8(s32 param_1) {
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u8 buf[8];
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s32 iVar5;
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u16 uVar2;
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s16 sVar4;
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register s32 d __asm__("$16");
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memcpy(buf, &D_801D891C, 4);
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iVar5 = ((s32 (*)(void))func_8012C1B8)();
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*(s32 *)(param_1 + 0x20) = iVar5;
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d = iVar5;
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if (iVar5 == 0) {
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((void (*)(s32))func_8012CAE4)(param_1);
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} else {
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((void (*)(s32, void *))func_8001CA88)(d, &D_801D95D0);
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uVar2 = *(u16 *)(param_1 + 0x70);
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*(s16 *)(d + 0x76) = -0x10;
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sVar4 = (uVar2 & 0xf) * 0x600 + 0xc00;
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*(s16 *)(d + 0x1a) = sVar4;
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*(s16 *)(d + 0x18) = sVar4;
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*(u32 *)(d + 4) = *(u32 *)(d + 4) | 0x50000000;
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if (func_8012E504(param_1, 0x33) == 0) {
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*(s16 *)(param_1 + 0xfc) = 1;
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func_800233CC(&D_801D95D0, 0x10);
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memcpy(&D_801D95D4, buf, 4);
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} else {
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*(s16 *)(param_1 + 0xfc) = 0;
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}
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((void (*)(s32))func_80142B2C)(param_1);
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}
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}
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DEFINE_func_801432FC() /* dedup: shared engine-core @0x801432FC (src/shared) */
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@@ -1279,7 +1327,54 @@ void func_80145934(void) {
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}
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INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077", func_80145A2C);
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// @class: other
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// @stuck: none — MATCH (62 ins). Sibling func_80145934 (byte-matched, same shape) is the template. Tail is default-then-conditional-override (matches asm .L80145AEC), and a §5a cross-jump barrier prevents the two identical D_801890E4 loads (>=0x6A4 and >=0x384) from being tail-merged.
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extern s32 func_80029504(void);
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extern void func_800D185C(u8 *a0);
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extern void func_80145B24(void);
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extern u8 D_801890E4;
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extern u8 D_80188FC4;
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extern u8 D_80188FA0;
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extern u8 D_80188F7C;
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extern u8 D_801890C0;
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extern u8 D_8018909C;
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extern u8 D_80188F58;
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extern u8 D_80189078;
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void func_80145A2C(void) {
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s32 v;
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void *p;
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v = func_80029504();
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if (v >= 0x6A4) {
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p = &D_801890E4;
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/* §5a cross-jump barrier — LOAD-BEARING: keeps this D_801890E4 load from being
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* tail-merged with the v>=0x384 D_801890E4 load below (emits zero machine code). */
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__asm__ __volatile__("" ::: "memory");
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} else if (v >= 0x5DC) {
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p = &D_80188FC4;
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} else if (v >= 0x578) {
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p = &D_80188FA0;
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} else if (v >= 0x514) {
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p = &D_80188F7C;
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} else if (v >= 0x384) {
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p = &D_801890E4;
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} else if (v >= 0x258) {
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p = &D_801890C0;
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} else if (v >= 0xC8) {
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p = &D_8018909C;
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} else {
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p = &D_80188F58;
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if (v >= 0xA) {
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p = &D_80189078;
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}
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}
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((void (*)(void *))func_800D185C)(p);
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func_80145B24();
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}
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// @class: regalloc-order
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// @stuck: none — MATCH (53 ins). Key: pin register u8 *p __asm__("$17") = &D_800AF630 (forces $s1 live across all calls + the -0x20 frame with $s1 saved), store *(s16*)(p+0xA3DA)=0x3000 at the end. Offset 0xA3DA = 0x800B9A0A - 0x800AF630.
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@@ -1293,7 +1388,49 @@ DEFINE_func_80145C54() /* dedup: shared engine-core @0x80145C54 (src/shared) */
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INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077", func_80145CEC);
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INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077", func_80145EE8);
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// @class: schedule
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// @stuck: branch layout — 3-way dispatch on param_1; trying switch form
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extern s32 func_80029178(s32 arg);
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extern void func_80146014(s32 a0);
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extern unsigned char D_801884DC[];
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extern unsigned char D_8018850C[];
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extern unsigned char D_8018855C[];
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extern unsigned char D_8018858C[];
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extern unsigned char D_801885BC[];
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void func_80145EE8(s32 param_1)
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{
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switch (param_1) {
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case 0:
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if (((unsigned char (*)(int))func_80029178)(0x1F) != 0) {
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((void (*)(void *))func_80146014)(D_801884DC);
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}
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if (((unsigned char (*)(int))func_80029178)(0x21) != 0) {
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((void (*)(void *))func_80146014)(D_8018850C);
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}
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if (((unsigned char (*)(int))func_80029178)(0x1E) != 0) {
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((void (*)(void *))func_80146014)(D_8018855C);
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}
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if (((unsigned char (*)(int))func_80029178)(0x1D) != 0) {
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((void (*)(void *))func_80146014)(D_8018858C);
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}
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if (((unsigned char (*)(int))func_80029178)(0x20) == 0) {
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return;
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}
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((void (*)(void *))func_80146014)(D_801885BC);
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break;
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case 1:
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((void (*)(void *))func_80146014)(D_801884DC);
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((void (*)(void *))func_80146014)(D_8018850C);
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((void (*)(void *))func_80146014)(D_8018855C);
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((void (*)(void *))func_80146014)(D_8018858C);
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((void (*)(void *))func_80146014)(D_801885BC);
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break;
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}
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}
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DEFINE_func_80146014() /* dedup: shared engine-core @0x80146014 (src/shared) */
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@@ -4177,7 +4314,63 @@ DEFINE_func_801582C0() /* dedup: shared engine-core @0x801582C0 (src/shared) */
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DEFINE_func_80158344() /* dedup: shared engine-core @0x80158344 (src/shared) */
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INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077", func_80158434);
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// @class: other
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// @stuck: none — MATCH (branch-polarity invert on both dispatch ifs + goto block-order to put the v1!=0/L508 paths as fallthrough; phantom 0x10 frame via address-taken frame_pad[4] + (void)& — zero code)
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extern void func_8014CBF8(void *a0);
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extern void func_801474EC(s32 *a0);
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extern void func_801477E8(s32 *a0, s32 a1);
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extern void func_80146DB8(s32 *a0, s32 *a1);
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extern void func_80148038(s32 a0, s32 a1);
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extern void func_80147460(s32 a0);
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extern void func_80147AD4(s32 a0, s32 a1, s32 a2, s32 a3);
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extern void func_801473EC(s32 *a0);
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extern s32 func_801615C4(void *a0, s32 a1);
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extern s32 func_80146E98(s32 a0);
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extern void func_80154274(s32 *a0, s32 a1);
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extern void func_80146CA0(void *a0);
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extern int func_80155FF8(int arg, int a1);
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extern u8 D_80188E4C;
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extern u8 D_800D533C;
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void func_80158434(s32 param_1)
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{
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u32 uVar1;
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u32 uVar2;
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s32 frame_pad[4];
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(void)&frame_pad;
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*(u32 *)(param_1 + 0x44) = *(u32 *)(param_1 + 0x44) | 2;
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if ((*(u16 *)(param_1 + 0xB8) & 0x4000) != 0) {
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*(s32 *)(param_1 + 0x234) = *(s32 *)(param_1 + 0x234) + 1;
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((s32 (*)(void))func_8014CBF8)();
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((void (*)(s32))func_801474EC)(param_1);
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((void (*)(s32, s32))func_801477E8)(param_1, 0xFFFA0000);
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((void (*)(s32, s32))func_80146DB8)(param_1, (s32)&D_80188E4C);
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}
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if (*(s32 *)(param_1 + 0x234) != 0) {
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func_80148038(param_1, 0x10000);
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func_80147460(param_1);
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func_80147AD4(param_1, 0, 0, 0);
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((void (*)(s32))func_801473EC)(param_1);
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}
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uVar1 = ((s32 (*)(s32, s32))func_801615C4)(param_1, 0);
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if (uVar1 != 0) {
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if (uVar1 == 1) goto LAB_80158508;
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uVar2 = uVar1 & 0x2000;
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} else {
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uVar2 = func_80146E98(param_1);
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}
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if (uVar2 == 0) goto LAB_80158528;
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LAB_80158508:
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((void (*)(s32, s32))func_80154274)(param_1, (s32)&D_800D533C);
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((void (*)(s32))func_80146CA0)(param_1);
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return;
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LAB_80158528:
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((void (*)(s32, s32))func_80155FF8)(param_1, *(u8 *)(param_1 + 0x1AA));
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}
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INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077", func_80158548);
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@@ -5393,7 +5586,65 @@ DEFINE_func_8015FDCC() /* dedup: shared engine-core @0x8015FDCC (src/shared) */
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INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077", func_8015FE70);
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INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077", func_8015FF20);
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// @class: struct
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// @stuck: none — MATCH (75 ins). Key: share func_8016004C via if/else join (do NOT duplicate it in the v2<0 arm — that emits an extra move a0,s0 + shifts the tail schedule); reload 0x1A0 byte after the inner if for the two global stores + func_80165670
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#include "common.h"
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extern s32 D_800AE6B0;
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extern void (*D_801891B8[])(void *);
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extern u8 D_80078EC1;
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extern u8 D_80078EC2;
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extern u16 D_801270C0;
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extern void func_8016007C(s32 a0);
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extern void func_80147078(s32 *a0, s16 a1);
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extern void func_80159B70(void *a0);
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extern u8 func_801656E8(s32 a0, s32 a1);
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extern void func_80150820(s32 a0, s32 a1);
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extern void func_8014BFF4(s32 a0, s32 a1);
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extern void func_80165670(s32 a0, s32 a1);
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extern void func_80165840(void);
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extern void func_801658DC(void);
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extern void func_80154A74(s32 a0, s32 a1);
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extern void func_8016004C(s32 a0);
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void func_8015FF20(void *param_1) {
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s32 v2;
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u8 cur;
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if ((D_800AE6B0 & 0x80FFFFFF) != 0) {
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((void (*)(void))func_8016007C)();
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D_801891B8[*(u16 *)param_1](param_1);
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((void (*)(void *, s16))func_80147078)(param_1, 0);
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func_80159B70(param_1);
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return;
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}
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v2 = *(s32 *)((s32)param_1 + 0x184);
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if (v2 < 0) {
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func_80150820((s32)param_1, func_801656E8((s32)param_1, v2 & 0xFF) & 0xFF);
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} else {
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if (*(u8 *)((s32)param_1 + 0x1A0) != *(u8 *)((s32)param_1 + 0x196)) {
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*(u8 *)((s32)param_1 + 0x1A0) = (u8)v2;
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*(u8 *)((s32)param_1 + 0x197) = 0;
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*(u8 *)((s32)param_1 + 0xBE) = 0;
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*(u8 *)((s32)param_1 + 0xBF) = 0;
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func_8014BFF4((s32)param_1, 1);
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}
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cur = *(u8 *)((s32)param_1 + 0x1A0);
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D_80078EC1 = cur;
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D_80078EC2 = cur;
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func_80165670((s32)param_1, cur);
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((void (*)(void *))func_80165840)(param_1);
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((void (*)(void *))func_801658DC)(param_1);
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func_80154A74((s32)param_1, 0x11);
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D_801270C0 = 1;
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}
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((void (*)(void *))func_8016004C)(param_1);
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}
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DEFINE_func_8016004C() /* dedup: shared engine-core @0x8016004C (src/shared) */
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@@ -9692,7 +9943,46 @@ void func_8017BCF4(int param_1)
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}
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INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077", func_8017BD50);
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// @class: regalloc-order
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// @stuck: none — MATCH (branch-polarity invert: fn-ptr non-zero call is the fall-through arm)
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extern void func_8017B0E4(int, int);
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extern void func_8012A4BC(void);
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extern s16 D_801DA71C;
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extern void (*D_801DA760)(void);
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extern short D_801DA7A4;
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extern short D_801DA7A6;
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extern short D_801DA7A8;
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extern s16 D_801DAAB8;
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extern s32 D_80114F24;
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extern s32 D_80114F28;
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extern s32 D_80114F2C;
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extern s32 D_80114F30;
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extern s32 D_80114F34;
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extern s32 D_80114F38;
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void func_8017BD50(int param_1)
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{
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func_8017B0E4(param_1, 6);
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D_801DA71C = D_801DA71C + 1;
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if (D_801DA71C >= 0x19) {
|
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if (D_801DA760 != 0) {
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(*D_801DA760)();
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} else {
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D_80114F30 = D_80114F30 + D_801DA7A4;
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D_80114F34 = D_80114F34 + D_801DA7A6;
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D_80114F38 = D_80114F38 + D_801DA7A8;
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D_80114F24 = D_80114F24 + D_801DA7A4;
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D_80114F28 = D_80114F28 + D_801DA7A6;
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D_80114F2C = D_80114F2C + D_801DA7A8;
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func_8012A4BC();
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}
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||||
D_801DAAB8 = 0;
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}
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||||
}
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||||
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||||
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extern s32 (*D_8018A4FC[])(void *);
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@@ -10801,7 +11091,69 @@ void func_8018047C(int param_1)
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void func_80180588(void) {
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}
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||||
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INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077", func_80180590);
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||||
// @class: regalloc-order
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||||
// @stuck: none — MATCH (70 ins). Twin of matched func_801807B8 + 0x70==4 branching. Two §17 levers: (1) memory barrier between the 0x5c store and the *(p+0x20+0x10)=0 store stops gcc folding the if/else 0xc800 into the bne delay slot and keeps the merged value in $v0 (the missing-instruction class); (2) pin uVar3 (the D_8018A8x symbol selected by the branch, OR'd with 0x40000000 for the 0x58 store) to $v0 so the OR is `or $v0,$v0($v0=sym),$v1(const)` — natural alloc put the symbol in $v1.
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||||
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||||
extern void func_8012C1B8(void);
|
||||
extern void func_8012CAE4(void *a0);
|
||||
extern void func_8001C214(s32 a0, s32 a1);
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||||
extern void func_8001D0E8(s32 a0, s32 a1, s32 a2);
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||||
extern void func_8012A828(s32 a0, void *a1);
|
||||
extern void func_8012B2CC(s32 a0);
|
||||
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||||
extern int D_801D15C4;
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||||
extern int D_801D1CBC;
|
||||
extern int D_8018A8A4;
|
||||
extern int D_8018A8B4;
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||||
extern int D_8018A8C4;
|
||||
extern M2C_UNK D_80186E48;
|
||||
|
||||
void func_80180590(int param_1)
|
||||
{
|
||||
int iVar2;
|
||||
register unsigned int uVar3 __asm__("$2");
|
||||
int uVar5;
|
||||
int uVar6;
|
||||
unsigned short uVar1;
|
||||
|
||||
iVar2 = ((int (*)(void))func_8012C1B8)();
|
||||
*(int *)(param_1 + 0x20) = iVar2;
|
||||
if (iVar2 == 0) {
|
||||
((void (*)(int))func_8012CAE4)(param_1);
|
||||
} else {
|
||||
int ppuVar4;
|
||||
ppuVar4 = (int)&D_801D15C4;
|
||||
if (*(char *)(param_1 + 0x70) == 4) {
|
||||
ppuVar4 = (int)&D_801D1CBC;
|
||||
}
|
||||
((void (*)(int, int))func_8001C214)(iVar2, ppuVar4);
|
||||
if (*(char *)(param_1 + 0x70) != 4) {
|
||||
uVar5 = 0x168;
|
||||
uVar3 = (int)&D_8018A8A4;
|
||||
uVar6 = 0x140;
|
||||
} else {
|
||||
uVar5 = 0x7fff;
|
||||
uVar6 = 0x7fff;
|
||||
uVar3 = (int)&D_8018A8B4;
|
||||
}
|
||||
*(unsigned int *)(param_1 + 0x58) = uVar3 | 0x40000000;
|
||||
func_8001D0E8(*(int *)(param_1 + 0x20), uVar5, uVar6);
|
||||
*(int *)(param_1 + 0x78) = (int)&D_8018A8C4;
|
||||
*(char *)(param_1 + 0x75) = 4;
|
||||
func_8012A828(param_1, &D_80186E48);
|
||||
*(short *)(param_1 + 2) = 1;
|
||||
if (*(char *)(param_1 + 0x70) == 4) {
|
||||
uVar1 = *(unsigned short *)(param_1 + 0x5c) | 0x8000;
|
||||
} else {
|
||||
uVar1 = 0xc800;
|
||||
}
|
||||
*(unsigned short *)(param_1 + 0x5c) = uVar1;
|
||||
__asm__ __volatile__("" ::: "memory");
|
||||
*(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0;
|
||||
func_8012B2CC(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
extern s32 D_801270C8;
|
||||
extern void func_8017F714(void);
|
||||
@@ -11781,7 +12133,56 @@ void func_80185618(s32 param_1) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077", func_801856F8);
|
||||
// @class: schedule
|
||||
// @stuck: none — MATCH (71 ins). Tail schedule: read out.c into an explicit temp BEFORE the 0x5a/1 const stores so gcc hoists its lhu early (load-delay filled by li 0x5a) and stores out.c last from a held reg; without the temp gcc instead deferred out.b's store. in/out are two separate SV3{s16 a,b,c} stack slots (sp+0x10, sp+0x18) for ((void (*)(int, void *, void *))func_8012F214)(a0,&in,&out). 0x34 compare reads u16 (lhu, not lh).
|
||||
|
||||
extern void func_8012B2CC(s32 a0);
|
||||
extern void func_8012B23C(s32 a0);
|
||||
extern void func_8012B14C(s32 a0, s32 a1);
|
||||
extern void func_8012F214(s32 a0, s32 a1, s32 a2);
|
||||
extern void func_8012AD80(s32 a0);
|
||||
extern s32 func_8012BEE8(s32 a0);
|
||||
extern void func_8012C218(void *a0);
|
||||
|
||||
extern int D_801B12AC;
|
||||
|
||||
typedef struct { short a, b, c; } SV3;
|
||||
|
||||
void func_801856F8(int param_1)
|
||||
{
|
||||
SV3 in;
|
||||
SV3 out;
|
||||
short c;
|
||||
|
||||
if (*(unsigned short *)(param_1 + 0x34) == 0) {
|
||||
*(short *)(*(int *)(param_1 + 0x20) + 0x12) =
|
||||
*(short *)(*(int *)(*(int *)(param_1 + 0x64) + 0x20) + 0x12);
|
||||
((void (*)(void))func_8012B2CC)();
|
||||
func_8012B23C(param_1);
|
||||
((void (*)(int, void *))func_8012B14C)(param_1, &D_801B12AC);
|
||||
in.a = 0;
|
||||
in.b = 0;
|
||||
in.c = 0x10;
|
||||
((void (*)(int, void *, void *))func_8012F214)(param_1, &in, &out);
|
||||
*(short *)(param_1 + 6) = out.a;
|
||||
*(short *)(param_1 + 0xa) = out.b;
|
||||
c = out.c;
|
||||
*(int *)(param_1 + 0x1c) = 0x5a;
|
||||
*(short *)(param_1 + 0x34) = 1;
|
||||
*(short *)(param_1 + 0xe) = c;
|
||||
}
|
||||
*(short *)(*(int *)(param_1 + 0x20) + 0x10) =
|
||||
*(short *)(*(int *)(param_1 + 0x20) + 0x10) - 0x80;
|
||||
*(short *)(*(int *)(param_1 + 0x20) + 0x12) =
|
||||
*(short *)(*(int *)(param_1 + 0x20) + 0x12) + 4;
|
||||
*(short *)(*(int *)(param_1 + 0x20) + 0x14) =
|
||||
*(short *)(*(int *)(param_1 + 0x20) + 0x14) + 5;
|
||||
func_8012AD80(param_1);
|
||||
if (func_8012BEE8(param_1) != 0) {
|
||||
((void (*)(int))func_8012C218)(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
// @class: other
|
||||
// @stuck: none — MATCH (expected); 16-bit sh stores via short* casts, s0=param_1 call-crossing
|
||||
|
||||
Reference in New Issue
Block a user