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feat(decomp): main lane m17 — 7 banked

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One clean whole-EXE rebuild verified the batch (gate_main), and main re-checked
BYTE-IDENTICAL against config/check.us.sha before anything was credited.

  FGO_03_OBJ_160
  func_80014004
  func_80015310
  func_80016EF8
  func_800191A8
  func_80028F54
  func_8002A4D8
This commit is contained in:
Drew T
2026-08-25 04:04:32 -06:00
parent 3eb8056f22
commit 235cac48e6
2 changed files with 121 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/800.c
+41 -6
View File
@@ -821,7 +821,11 @@ INCLUDE_ASM("asm/nonmatchings/800", func_80013FBC);
INCLUDE_ASM("asm/nonmatchings/800", func_80013FE0);
INCLUDE_ASM("asm/nonmatchings/800", func_80014004);
void func_80014004(unsigned short *a0, unsigned short *a1) {
a0[0] = a1[0];
a0[3] = a1[1];
a0[6] = a1[2];
}
void func_80014028(s32 *a0, s32 *a1) {
*(u16 *)((s32)a0 + 0x2) = *(u16 *)((s32)a1 + 0x0);
@@ -1811,7 +1815,22 @@ void func_800152F4(s32 idx) {
D_800B93D8[((idx << 16) >> 16) * 8] = 0;
}
INCLUDE_ASM("asm/nonmatchings/800", func_80015310);
extern s16 D_800B93D8[];
void func_80015310(void) {
extern DispSlot_800184F0 D_800B97D8[];
s32 pad[2];
DispSlot_800184F0 *p;
DispSlot_800184F0 *end;
p = (DispSlot_800184F0 *)D_800B93D8;
end = D_800B97D8;
for (; p < end; p++) {
p->flag = 0;
}
}
INCLUDE_ASM("asm/nonmatchings/800", func_8001534C);
@@ -3324,7 +3343,10 @@ void func_80016ED4(void *arg0)
func_80016F18(arg0, 0, 0);
}
INCLUDE_ASM("asm/nonmatchings/800", func_80016EF8);
void func_80016EF8(void *arg0, s32 arg1)
{
func_80016F18(arg0, arg1, 0);
}
/* ---- PsyQ GTE inline macros (same spelling as the matched ov_SC03_* TUs) ---- */
@@ -5189,7 +5211,11 @@ s32 func_80019198(void) {
return D_800747C0;
}
INCLUDE_ASM("asm/nonmatchings/800", func_800191A8);
extern s32 D_80078E30;
void func_800191A8(void) {
D_80078E30 = -1;
}
INCLUDE_ASM("asm/nonmatchings/800", func_800191BC);
@@ -12602,7 +12628,11 @@ INCLUDE_ASM("asm/nonmatchings/800", func_80028F10);
INCLUDE_ASM("asm/nonmatchings/800", func_80028F34);
INCLUDE_ASM("asm/nonmatchings/800", func_80028F54);
extern void func_80029124(s32, s32);
void func_80028F54(s32 a0) {
func_80029124(0x12, a0 & 0xFF);
}
INCLUDE_ASM("asm/nonmatchings/800", func_80028F78);
@@ -13241,7 +13271,12 @@ s32 func_8002A4C8(void) {
return D_80078EF0;
}
INCLUDE_ASM("asm/nonmatchings/800", func_8002A4D8);
extern s32 D_80078EEC;
extern u8 D_800638FC[];
s32 func_8002A4D8(void) {
return *(u16 *)(D_800638FC + D_80078EEC * 16);
}
extern s32 D_80078EEC;
extern u8 D_800638FE[];
src/800b_5.c
+80 -1
View File
@@ -22,7 +22,86 @@ INCLUDE_ASM("asm/nonmatchings/800b_5", FGO_03_OBJ_64);
INCLUDE_ASM("asm/nonmatchings/800b_5", FGO_03_OBJ_CC);
INCLUDE_ASM("asm/nonmatchings/800b_5", FGO_03_OBJ_160);
__asm__(".text\n.align 2\n.globl FGO_03_OBJ_160\n.ent\tFGO_03_OBJ_160\n"
"FGO_03_OBJ_160:\n.frame $sp,0,$31\n"
".set\tnoreorder\n"
"multu $t1, $t2\n"
"nop\n"
"nop\n"
"mflo $t7\n"
"sra $t6, $t7, 12\n"
"sh $t6, 0($a1)\n"
"multu $t5, $t1\n"
"nop\n"
"nop\n"
"mflo $t7\n"
"sra $t6, $t7, 12\n"
"nop\n"
"multu $t3, $t4\n"
"sh $t6, 6($a1)\n"
"nop\n"
"mflo $t7\n"
"sra $t8, $t7, 12\n"
"nop\n"
"multu $t8, $t2\n"
"nop\n"
"nop\n"
"mflo $t7\n"
"sra $t6, $t7, 12\n"
"nop\n"
"multu $t5, $t0\n"
"nop\n"
"nop\n"
"mflo $t7\n"
"sra $t9, $t7, 12\n"
"subu $t7, $t6, $t9\n"
"multu $t0, $t2\n"
"sh $t7, 2($a1)\n"
"nop\n"
"mflo $t6\n"
"sra $t7, $t6, 12\n"
"nop\n"
"multu $t8, $t5\n"
"nop\n"
"nop\n"
"mflo $t6\n"
"sra $t9, $t6, 12\n"
"addu $t6, $t9, $t7\n"
"multu $t4, $t0\n"
"sh $t6, 8($a1)\n"
"nop\n"
"mflo $t7\n"
"sra $t8, $t7, 12\n"
"nop\n"
"multu $t8, $t2\n"
"nop\n"
"nop\n"
"mflo $t7\n"
"sra $t6, $t7, 12\n"
"nop\n"
"multu $t3, $t5\n"
"nop\n"
"nop\n"
"mflo $t7\n"
"sra $t9, $t7, 12\n"
"addu $t7, $t6, $t9\n"
"multu $t3, $t2\n"
"sh $t7, 4($a1)\n"
"nop\n"
"mflo $t6\n"
"sra $t7, $t6, 12\n"
"nop\n"
"multu $t8, $t5\n"
"nop\n"
"nop\n"
"mflo $t6\n"
"sra $t9, $t6, 12\n"
"subu $t6, $t9, $t7\n"
"sh $t6, 10($a1)\n"
"jr $ra\n"
"nop\n"
".set\treorder\n.end\tFGO_03_OBJ_160\n");
__asm__(".word 0");
INCLUDE_ASM("asm/nonmatchings/800b_5", RotMatrixX);