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phase-36: S104 s104_d39 — func_80185484 banked at 0 through the whole-object gate + propagated — 2 levers → 0: (s16) casts at BOTH shift sites (c-typeck.c:2418-2450, cse.c:5577-5667)

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This commit is contained in:
Drew T
2026-09-11 00:07:41 -06:00
parent 261c01c397
commit 27fb22cadb
7 changed files with 330 additions and 294 deletions
Download Patch File Download Diff File Expand all files Collapse all files
.run/P36/agents/ov_SC06_010__func_80181408/body.c
+25 -58
View File
@@ -13,73 +13,40 @@ void aF8017EF54(s32 a0)
u16 sxy[2]; /* sp+0x18 */
s32 z; /* sp+0x1C */
s32 flag; /* sp+0x20 */
s32 pad2[2]; /* sp+0x24 -- dead, sizes the frame */
} L;
s32 v1;
s32 cool;
s32 old;
if (*(u16 *)(a0 + 0x0) == 0) {
return;
}
old = *(s16 *)(a0 + 0x84);
v1 = old;
if (old != 0) {
goto L_dec;
}
if (*(s16 *)(a0 + 0x84) == 0) {
L.v[0] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x48);
L.v[1] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x4C);
L.v[2] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x50);
func_8004914C(&D_800AF648);
func_800491AC(&D_800AF648_b);
RotTransPers((s32)L.v, (s32)L.sxy, &L.z, &L.flag);
L.v[0] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x48);
L.v[1] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x4C);
L.v[2] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x50);
func_8004914C(&D_800AF648);
func_800491AC(&D_800AF648_b);
RotTransPers((s32)L.v, (s32)L.sxy, &L.z, &L.flag);
if (L.flag >= 0 && (u16)(L.sxy[0] + 0xEF) < 0x1DF
&& (u16)(L.sxy[1] + 0xB3) < 0x167) {
s32 sx = (s16)L.sxy[0];
s32 av;
if (L.flag < 0) {
cool = 0xA;
goto L_join;
}
if ((u32)((L.sxy[0] + 0xEF) & 0xFFFF) >= 0x1DF) {
cool = 0xA;
goto L_join;
}
if ((u32)((L.sxy[1] + 0xB3) & 0xFFFF) >= 0x167) {
goto L_snd_skip;
}
{
s32 sx = (s16)L.sxy[0];
s32 av;
av = sx;
if (sx < 0) {
av = -sx;
av = (sx < 0) ? -sx : sx;
av = ((0xF0 - av) * 0x7F) / 0xF0;
sx = (sx + 0xF0) / 0x1E;
if (sx == 0x10) {
sx = 0xF;
}
sx = sx << 8;
func_8002D4C8(0x849, (av | (0x3000 | sx)) & 0xFFFF);
}
av = ((0xF0 - av) * 0x7F) / 0xF0;
sx = (sx + 0xF0) / 0x1E;
if (sx == 0x10) {
sx = 0xF;
}
sx = sx << 8;
func_8002D4C8(0x849, (av | (0x3000 | sx)) & 0xFFFF);
*(s16 *)(a0 + 0x84) = 0xA;
} else {
(*(s16 *)(a0 + 0x84))--;
}
L_snd_skip:
cool = 0xA;
goto L_join;
L_dec:
cool = v1 - 1;
L_join:
*(s16 *)(a0 + 0x84) = cool;
{
s32 p = a0;
*(u16 *)(p + 0xFC) = *(u16 *)(p + 0xFC) + 0x280;
*(u16 *)(p + 0xFE) = *(u16 *)(p + 0xFE) - 0x280;
((void (*)(void *))func_80181234)((void *)p);
}
*(u16 *)(a0 + 0xFC) += 0x280;
*(u16 *)(a0 + 0xFE) -= 0x280;
((void (*)(void *))func_80181234)((void *)a0);
}
.run/P36/agents/ov_SC06_010__func_80181408/mechanism.md
+87
View File
@@ -0,0 +1,87 @@
# func_80181408 (ov_SC06_010, def name aF8017EF54) — P36 S104 d34 — CLOSED at 0, zero levers
Score: 26 (body_free.c) -> 2 (declaration alias) -> 6 (structured, frame only) -> **0**. Lever count 2 NEEDED
(pin $4 + `"memory"` barrier) + 3 REMOVED pins + 1 unmarked dead `pad2[2]` -> **0** (no pin, no asm statement, no
volatile, no pad, no do-while). The one non-trivial construct left is the body-local DECLARATION alias
`extern u8 D_800AF648_b __asm__("D_800AF648");` (METHOD step 3's allowed alias — the same spelling this TU's already-banked
siblings use at lines 7029/8041/8579/8686/8783/8980/9187). Copies: all 6 other copies close with the same text
(scratch/copies.md), plus a bonus same-TU sibling func_8017F278.
## (a) The residual in one sentence
Two independent defects: (1) the second `&D_800AF648` call argument was served from a callee-saved register (`s1`
holding the param, `s0` the address: frame 64, two extra saves) where the target re-materialises `lui/addiu a0` per call;
(2) the tail `move a0,s0` was hoisted above `sh v0,132(s0)` and the store then addressed through `a0`.
## (b) The passes and decisions (file:line read; each proven on bytes with dumps under scratch/dumps_a1, dumps_a7n)
1. **cse merges the two address loads.** Both `&D_800AF648` expand to `(set (reg P) (symbol_ref "D_800AF648"))`
(scratch/dumps_a3 .rtl insns 56/63); cse hashes a SYMBOL_REF by its NAME POINTER (`cse.c:1937-1939`) and
`exp_equiv_p` compares it by pointer (`cse.c:2107-2108`), so the second load becomes a copy of the first pseudo,
which lives across the call -> `$s0`. A body-local `extern ... __asm__("D_800AF648")` has a different name string
pointer, so the two loads never share a class. (Proven: a1 = body_free + alias only: 26 -> 2.) Even a trivial lever-free
body (func_8012E32C in ov_SC06_008) keeps the address in `$s0`, so no ordinary spelling of the same symbol twice avoids it.
2. **The tail order is a BLOCK boundary, not a scheduling barrier.** In the goto text the join label precedes the
`0x84` store, so store + tail are one block; sched1 hoists the call-argument copy `(set a0 (reg param))` (insn 246)
above the store (dumps_a1 .sched), then local-alloc's `optimize_reg_copy_1` (`local-alloc.c:700`, called at `:1007`)
rewrites every later use of the dying param as `a0` — including the store (dumps_a1 .lreg insn 225). The target's
order comes from a store written IN EACH ARM of an if/else: the join label then sits between the store and the tail
(sched cannot cross it), and the post-reload jump pass (`toplev.c:3142`, `jump_optimize(insns,1,1,0)`;
`find_cross_jump` `jump.c:1941`/`:2371`) merges the two identical `sh v0,132(s0)` into one (dumps_a7n: 2 stores
in .greg, 1 in .jump2). The `"memory"` barrier was faking that label.
3. **The `move v1,v0` copy and the 8 extra frame bytes both come from `(*(s16 *)(a0 + 0x84))--`.** The test
`*(s16 *)(a0+0x84) == 0` loads a HImode pseudo r75 and sign-extends it (r77 = r75<<16, r76 = r77>>16); the else-arm
decrement reads the same lvalue and cse forwards r75 (no store between). combine's 3-insn combine (i1 = the load,
`added_sets_1` because r75 is still used in the else arm, `combine.c:1460-1462`) yields `lh` into r76 plus the kept
copy `(set (reg:HI 75) (subreg:HI (reg:SI 76) 0))` — the delay-slot `move v1,v0` (r76 dies at the branch -> v0,
r75 lives into the arm -> v1). The eliminated shift temp r77's death note finds no insn and combine plants
`(use (reg:SI 77))` at the label (`combine.c:10831-10845`, dumps_a7n .combine insn 222); r77 then has a reference but
no set, gets no hard register (.greg: "77 conflicts:" empty, no disposition) and reload gives it a stack slot at
sp+40 -> frame 56 = the target. The tree's `v1 = old;` copy and its dead `pad2[2]` were faking exactly these two
artefacts. (Proven: a2n = structured + `old`/`v1` + no pad scores 6, frame 48; a7n = `--` + no pad scores 0.)
## (c) The moves that closed it (each one line)
- the second call takes `&D_800AF648_b`, a body-local `extern u8 D_800AF648_b __asm__("D_800AF648");` (26 -> 2);
- the goto chain -> structured `if (*(s16 *)(a0 + 0x84) == 0) { ...; store 0xA; } else { decrement; }` with the flag/X/Y
gates as one `&&` condition, the store written in each arm (removes the barrier);
- the decrement written as `(*(s16 *)(a0 + 0x84))--;` directly on the lvalue (removes `old`, `v1`, `cool` and the pad);
- readability only (all still 0): `+= 0x280` / `-= 0x280`, `(sx < 0) ? -sx : sx`, `(u16)(L.sxy[0] + 0xEF) < 0x1DF`,
the tail through `a0` (no `p` copy). One tidy that did NOT hold: folding `sx << 8` into the call argument (18).
## (d) GENERATOR PROPOSAL
When a body reads `old = *(s16 *)(P + K); v1 = old; if (old != 0) goto L_dec; ... cool = C; goto L_join; L_dec: cool =
v1 - 1; L_join: *(s16 *)(P + K) = cool; [barrier]` — emit the structured
`if (*(s16 *)(P + K) == 0) { ...; *(s16 *)(P + K) = C; } else { (*(s16 *)(P + K))--; }`, deleting the copy variable,
the barrier AND any dead `pad` array (then re-add a pad only if the frame is still short — the `--` spelling brings its
own 8-byte dead slot); and whenever the same `&SYM` is passed to two calls and the target re-materialises it, add the
`SYM_b __asm__("SYM")` alias to the second.
## (e) What did not work (byte evidence)
- the structured body keeping `old`/`v1` AND the dead `pad2[2]` (a2): 0 — but that keeps two fakes (the decompiler's copy
variable and a dead array sizing the frame); with the pad removed it scores 6 (frame 48): the copy then comes from `v1`
but the dead slot does not. Conversely the `--` form WITH the pad scores 6 (frame 64);
- the structured body with a plain `old` (s32) and no `v1`: 7 (COUNT; reorg steals `addiu v0,v0,-1` into the bnez slot —
the header's lever-1 observation, still true for an SImode `old`);
- `s16 old` + no pad: 0 as well (a5n) — equivalent to the `--` form (the HImode copy is the point); the `--` form is kept as
the most natural;
- `old--; store old;` (a8): 7;
- the goto body with the alias only (a1): 2 — the tail order needs the block boundary.
## (f) Where the method fell short / what helped
- METHOD 14's "try the structured spelling EARLY" was the whole close; the generators could not reach it (every R-family
mutates the goto text). The second half (the `--` spelling) is a WIDTH move in disguise (METHOD 3 S103 c4: a HImode
destination keeps a copy) — it is reached only by deleting the decompiler's SImode `old`.
- `residual.txt` classed it COUNT/"s1->s0 x3"; the real defect was a register-held constant address (a missing
instruction pair + an extra callee-saved register), visible only in the whole objdump.
- The header's MATCH-lever notes (lever 1 = `v1` pin, lever 3 = `pad2`) were CLAIMS about the goto shape; both are
artefacts of one decrement spelling. A dead pad sizing the frame should be re-checked against `.greg` for a
no-disposition pseudo whenever the body text changes.
## (g) Structs answer
No struct was needed to close this body. The one remaining non-plain construct is the name alias for the second address;
a struct type on D_800AF648 (MATRIX-like) cannot remove it, since cse keys on the symbol NAME (`cse.c:1937`, `:2107`), not
the type. A structs-phase lead: D_800AF630 (6019 refs), D_800AF634, D_800AF638 and D_800AF648 cluster within 0x18 bytes, so
the original may have passed `&view.matrix` (a `(const (plus (symbol_ref D_800AF630) 0x18))`) to one call and the bare
symbol to the other — two different rtx that cse keeps apart. That would reproduce the linked bytes but NOT this object's
relocations (`addiu a0,a0,24` against D_800AF630 vs `addiu a0,a0,0` against D_800AF648), so it is untestable under the
object-level scorer; the alias is the object-exact spelling. Giving `a0` an entity struct (fields 0x0 u16 active, 0x20
parent ptr, 0x84 s16 cooldown, 0xFC/0xFE u16 accumulators) is pure readability here — the decisions above do not depend on
aggregate-vs-scalar marking (no `expr.c:4568` channel involved). No signature change.
.run/P36/delever/calibration.json
+188 -188
View File
@@ -1,7 +1,7 @@
{
"head": "e0c9c7848",
"head": "261c01c39",
"stamp": "15956e4a96c4",
"generated": "2026-09-11 00:05",
"generated": "2026-09-11 00:06",
"aliases": [
"main",
"ov_SC03_014",
@@ -21,207 +21,207 @@
"main": {
"objects": 85,
"identical": 85,
"seconds": 11.241999999999997,
"mean_s": 0.132
"seconds": 10.728000000000007,
"mean_s": 0.126
},
"ov_SC03_014": {
"objects": 32,
"identical": 32,
"seconds": 6.772999999999999,
"mean_s": 0.212
"seconds": 6.699000000000001,
"mean_s": 0.209
},
"ov_SC03_015": {
"objects": 32,
"identical": 32,
"seconds": 6.7219999999999995,
"mean_s": 0.21
"seconds": 6.7909999999999995,
"mean_s": 0.212
},
"ov_SC04_011": {
"objects": 28,
"identical": 28,
"seconds": 5.9670000000000005,
"mean_s": 0.213
"seconds": 6.377000000000001,
"mean_s": 0.228
}
},
"per_object_seconds": {
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"build/src/800_b.o": 0.154,
"build/src/800_b_2.o": 0.489,
"build/src/800_b_o0a.o": 0.09,
"build/src/800_c.o": 0.332,
"build/src/800b2.o": 0.163,
"build/src/apicard1.o": 0.115,
"build/src/apicard2.o": 0.141,
"build/src/apicard3.o": 0.154,
"build/src/apicard4.o": 0.119,
"build/src/apicard5.o": 0.13,
"build/src/apicard6.o": 0.173,
"build/src/apicard7.o": 0.109,
"build/src/boot.o": 0.103,
"build/src/gap.o": 0.086,
"build/src/libapi1.o": 0.103,
"build/src/libapi2.o": 0.08,
"build/src/libc2_1.o": 0.124,
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"build/src/libcd1.o": 0.096,
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"build/src/libetc.o": 0.082,
"build/src/libgpu.o": 0.082,
"build/src/libgpu2.o": 0.099,
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.run/P36/delever/ledger.jsonl
+3
View File
@@ -29313,3 +29313,6 @@
{"ts": "2026-09-11 00:04:50", "label": "s104_d38", "rung": "E", "calib": {"head": "ad48b5154", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_011/ov_SC02_011_jr_80183178.c", "fn": "func_801865E4", "addr": 2149082596, "aliases": null, "header": false, "includers": 0, "nhash_before": "14fd912d7def99f08a8fb9422ce2a548ce3f5559", "nhash_after": "ce87444018bb866c0139b4c990b4d1aa6b604068", "source": ".run/P36/agents/ov_SC02_031__func_801818A4/scratch/sib_func_801865E4.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.215, "objects": ["build/src/ov_SC02_011/ov_SC02_011_jr_80183178.o"], "before_text": "int func_801865E4(int a0, void* a1)\n{\n s16 stack_buf[8];\n s16 *s0 = (s16 *)a1;\n s16 v0;\n s32 result;\n s32 ret;\n\n do { v0 = s0[2]; } while (0);\n stack_buf[0] = v0;\n v0 = s0[3];\n stack_buf[4] = v0;\n v0 = s0[5];\n stack_buf[5] = v0;\n stack_buf[1] = v0;\n v0 = s0[6];\n stack_buf[6] = v0;\n stack_buf[2] = v0;\n\n result = func_80186680((s32)a0, (s32)&stack_buf[0], (s32)&stack_buf[4]);\n\n if (result != 0) {\n ret = 1;\n } else {\n v0 = s0[7];\n stack_buf[6] = v0;\n stack_buf[2] = v0;\n result = func_80186680((s32)a0, (s32)&stack_buf[0], (s32)&stack_buf[4]);\n ret = (result != 0);\n }\n return ret;\n}\n", "after_text": "int func_801865E4(int a0, void* a1)\n{\n s16 stack_buf[8];\n s16 v0;\n s32 result;\n s32 ret;\n\n v0 = ((s16 *)a1)[2];\n stack_buf[0] = v0;\n v0 = ((s16 *)a1)[3];\n stack_buf[4] = v0;\n v0 = ((s16 *)a1)[5];\n stack_buf[5] = v0;\n stack_buf[1] = v0;\n v0 = ((s16 *)a1)[6];\n stack_buf[6] = v0;\n stack_buf[2] = v0;\n\n result = func_80186680((s32)a0, (s32)&stack_buf[0], (s32)&stack_buf[4]);\n\n if (result != 0) {\n ret = 1;\n } else {\n v0 = ((s16 *)a1)[7];\n stack_buf[6] = v0;\n stack_buf[2] = v0;\n result = func_80186680((s32)a0, (s32)&stack_buf[0], (s32)&stack_buf[4]);\n ret = (result != 0);\n }\n return ret;\n}\n"}
{"ts": "2026-09-11 00:05:28", "label": "s104_d38", "rung": "E", "calib": {"head": "1e0da4358", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c", "fn": "func_801848A4", "addr": 2149075108, "aliases": null, "header": false, "includers": 0, "nhash_before": "14fd912d7def99f08a8fb9422ce2a548ce3f5559", "nhash_after": "ce87444018bb866c0139b4c990b4d1aa6b604068", "source": ".run/P36/agents/ov_SC02_031__func_801818A4/scratch/sib_func_801848A4.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.451, "objects": ["build/src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.o"], "before_text": "int func_801848A4(int a0, void* a1)\n{\n s16 stack_buf[8];\n s16 *s0 = (s16 *)a1;\n s16 v0;\n s32 result;\n s32 ret;\n\n do { v0 = s0[2]; } while (0);\n stack_buf[0] = v0;\n v0 = s0[3];\n stack_buf[4] = v0;\n v0 = s0[5];\n stack_buf[5] = v0;\n stack_buf[1] = v0;\n v0 = s0[6];\n stack_buf[6] = v0;\n stack_buf[2] = v0;\n\n result = func_80184940((s32)a0, (s32)&stack_buf[0], (s32)&stack_buf[4]);\n\n if (result != 0) {\n ret = 1;\n } else {\n v0 = s0[7];\n stack_buf[6] = v0;\n stack_buf[2] = v0;\n result = func_80184940((s32)a0, (s32)&stack_buf[0], (s32)&stack_buf[4]);\n ret = (result != 0);\n }\n return ret;\n}\n", "after_text": "int func_801848A4(int a0, void* a1)\n{\n s16 stack_buf[8];\n s16 v0;\n s32 result;\n s32 ret;\n\n v0 = ((s16 *)a1)[2];\n stack_buf[0] = v0;\n v0 = ((s16 *)a1)[3];\n stack_buf[4] = v0;\n v0 = ((s16 *)a1)[5];\n stack_buf[5] = v0;\n stack_buf[1] = v0;\n v0 = ((s16 *)a1)[6];\n stack_buf[6] = v0;\n stack_buf[2] = v0;\n\n result = func_80184940((s32)a0, (s32)&stack_buf[0], (s32)&stack_buf[4]);\n\n if (result != 0) {\n ret = 1;\n } else {\n v0 = ((s16 *)a1)[7];\n stack_buf[6] = v0;\n stack_buf[2] = v0;\n result = func_80184940((s32)a0, (s32)&stack_buf[0], (s32)&stack_buf[4]);\n ret = (result != 0);\n }\n return ret;\n}\n"}
{"ts": "2026-09-11 00:06:07", "label": "s104_d38", "rung": "E", "calib": {"head": "e0c9c7848", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_014/ov_SC03_014_jr_801848E4.c", "fn": "func_80188FB4", "addr": 2149093300, "aliases": null, "header": false, "includers": 0, "nhash_before": "01a7cf1701049d0bba9001aebe678d5707cdbf89", "nhash_after": "db3916ef4eca15c3c78557810e7a65b12ef78d8d", "source": ".run/P36/agents/ov_SC02_031__func_801818A4/scratch/sib_func_80188FB4.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 2, "seconds": 0.552, "objects": ["build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o", "build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o"], "before_text": "int func_80188FB4(int a0, void* a1)\n{\n s16 stack_buf[8];\n u16 *s0 = (u16 *)a1;\n u16 v0;\n s32 result;\n\n do { stack_buf[0] = (s0[2]); } while (0);\n v0 = s0[3];\n stack_buf[4] = v0;\n v0 = s0[5];\n stack_buf[5] = v0;\n stack_buf[1] = v0;\n v0 = s0[6];\n stack_buf[6] = v0;\n stack_buf[2] = v0;\n\n result = func_80189050((s32)a0, (s32)&stack_buf[0], (s32)&stack_buf[4]);\n if (result != 0) {\n return 1;\n }\n\n v0 = s0[7];\n stack_buf[6] = v0;\n stack_buf[2] = v0;\n\n result = func_80189050((s32)a0, (s32)&stack_buf[0], (s32)&stack_buf[4]);\n if (result != 0) {\n return 1;\n }\n return 0;\n}\n", "after_text": "int func_80188FB4(int a0, void* a1)\n{\n s16 stack_buf[8];\n u16 v0;\n s32 result;\n\n stack_buf[0] = ((u16 *)a1)[2];\n v0 = ((u16 *)a1)[3];\n stack_buf[4] = v0;\n v0 = ((u16 *)a1)[5];\n stack_buf[5] = v0;\n stack_buf[1] = v0;\n v0 = ((u16 *)a1)[6];\n stack_buf[6] = v0;\n stack_buf[2] = v0;\n\n result = func_80189050((s32)a0, (s32)&stack_buf[0], (s32)&stack_buf[4]);\n if (result != 0) {\n return 1;\n }\n\n v0 = ((u16 *)a1)[7];\n stack_buf[6] = v0;\n stack_buf[2] = v0;\n\n result = func_80189050((s32)a0, (s32)&stack_buf[0], (s32)&stack_buf[4]);\n if (result != 0) {\n return 1;\n }\n return 0;\n}\n"}
{"ts": "2026-09-11 00:07:21", "label": "s104_d39", "rung": "E", "calib": {"head": "261c01c39", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_090/ov_SC03_090_jr_8017CA80.c", "fn": "func_80185484", "addr": 2149078148, "aliases": null, "header": false, "includers": 0, "nhash_before": "8a17d17992fa37bb6deb51dcfbea0021776883db", "nhash_after": "2d83efe5fc150e0ca7cdbc5d860c783250692b93", "source": ".run/P36/agents/ov_SC03_090__func_80185484/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.348, "objects": ["build/src/ov_SC03_090/ov_SC03_090_jr_8017CA80.o"], "before_text": "s32 func_80185484_body(s32 a0) {\n extern void func_8012BE54(s32 a0);\n extern u16 D_80126B62;\n extern u8 D_801A31B0[];\n\n s32 ent; /* $s1 */\n s32 p;\n s32 h;\n s32 h2;\n s32 ret;\n s32 s0;\n s32 r;\n s32 v;\n s32 g;\n s32 d;\n u16 arr[3];\n\n ent = a0;\n p = *(s32 *)(ent + 0x20);\n h = *(s16 *)(p + 0x18);\n __asm__(\"\" : \"=r\"(h) : \"0\"(h)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n ret = ((s32 (*)(s32))func_8012BE54)(ent);\n s0 = h >> 8;\n if (ret > s0 * s0) {\n return 0;\n }\n v = *(s16 *)(ent + 0xA);\n h2 = *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A);\n __asm__ __volatile__(\"\" : \"=r\"(h2) : \"0\"(h2)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n g = *(s16 *)&D_80126B62;\n r = h2 >> 6;\n d = v - g;\n if (d >= 0 ? r < d : r < g - v) {\n return 0;\n }\n a0 = 1;\n arr[0] = *(u16 *)(ent + 0x6);\n arr[1] = *(u16 *)(ent + 0xA);\n arr[2] = *(u16 *)(ent + 0xE);\n func_8012F568(1, 0x4201, 0, 0x1C, (s32)arr, (s32)D_801A31B0);\n}\n", "after_text": "s32 func_80185484_body(s32 a0) {\n extern void func_8012BE54(s32 a0);\n extern u16 D_80126B62;\n extern u8 D_801A31B0[];\n\n s32 h;\n s32 h2;\n s32 ret;\n s32 s0;\n s32 r;\n s32 v;\n s32 g;\n s32 d;\n u16 arr[3];\n\n h = *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18);\n ret = ((s32 (*)(s32))func_8012BE54)(a0);\n s0 = (s16)h >> 8;\n if (ret > s0 * s0) {\n return 0;\n }\n v = *(s16 *)(a0 + 0xA);\n h2 = *(s16 *)(*(s32 *)(a0 + 0x20) + 0x1A);\n g = *(s16 *)&D_80126B62;\n r = (s16)h2 >> 6;\n d = v - g;\n if (d >= 0 ? r < d : r < g - v) {\n return 0;\n }\n arr[0] = *(u16 *)(a0 + 0x6);\n arr[1] = *(u16 *)(a0 + 0xA);\n arr[2] = *(u16 *)(a0 + 0xE);\n func_8012F568(1, 0x4201, 0, 0x1C, (s32)arr, (s32)D_801A31B0);\n}\n"}
{"ts": "2026-09-11 00:07:39", "label": "s104_d39", "rung": "E", "calib": {"head": "261c01c39", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_104/ov_SC03_104_jr_80182038.c", "fn": "func_80183318", "addr": 2149069592, "aliases": null, "header": false, "includers": 0, "nhash_before": "8a17d17992fa37bb6deb51dcfbea0021776883db", "nhash_after": "2d83efe5fc150e0ca7cdbc5d860c783250692b93", "source": "propagate:src/ov_SC03_090/ov_SC03_090_jr_8017CA80.c:func_80185484", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.197, "objects": ["build/src/ov_SC03_104/ov_SC03_104_jr_80182038.o"], "before_text": "s32 func_80185484_body(s32 a0) {\n extern void func_8012BE54(s32 a0);\n extern u16 D_80126B62;\n extern u8 D_8019A078[];\n\n s32 ent; /* $s1 */\n s32 p;\n s32 h;\n s32 h2;\n s32 ret;\n s32 s0;\n s32 r;\n s32 v;\n s32 g;\n s32 d;\n u16 arr[3];\n\n ent = a0;\n p = *(s32 *)(ent + 0x20);\n h = *(s16 *)(p + 0x18);\n __asm__(\"\" : \"=r\"(h) : \"0\"(h)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n ret = ((s32 (*)(s32))func_8012BE54)(ent);\n s0 = h >> 8;\n if (ret > s0 * s0) {\n return 0;\n }\n v = *(s16 *)(ent + 0xA);\n h2 = *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A);\n __asm__ __volatile__(\"\" : \"=r\"(h2) : \"0\"(h2)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n g = *(s16 *)&D_80126B62;\n r = h2 >> 6;\n d = v - g;\n if (d >= 0 ? r < d : r < g - v) {\n return 0;\n }\n a0 = 1;\n arr[0] = *(u16 *)(ent + 0x6);\n arr[1] = *(u16 *)(ent + 0xA);\n arr[2] = *(u16 *)(ent + 0xE);\n func_8012F568(1, 0x4201, 0, 0x1C, (s32)arr, (s32)D_8019A078);\n}\n", "after_text": "s32 func_80185484_body(s32 a0) {\n extern void func_8012BE54(s32 a0);\n extern u16 D_80126B62;\n extern u8 D_8019A078[];\n\n s32 h;\n s32 h2;\n s32 ret;\n s32 s0;\n s32 r;\n s32 v;\n s32 g;\n s32 d;\n u16 arr[3];\n\n h = *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18);\n ret = ((s32 (*)(s32))func_8012BE54)(a0);\n s0 = (s16)h >> 8;\n if (ret > s0 * s0) {\n return 0;\n }\n v = *(s16 *)(a0 + 0xA);\n h2 = *(s16 *)(*(s32 *)(a0 + 0x20) + 0x1A);\n g = *(s16 *)&D_80126B62;\n r = (s16)h2 >> 6;\n d = v - g;\n if (d >= 0 ? r < d : r < g - v) {\n return 0;\n }\n arr[0] = *(u16 *)(a0 + 0x6);\n arr[1] = *(u16 *)(a0 + 0xA);\n arr[2] = *(u16 *)(a0 + 0xE);\n func_8012F568(1, 0x4201, 0, 0x1C, (s32)arr, (s32)D_8019A078);\n}\n"}
{"ts": "2026-09-11 00:07:40", "label": "s104_d39", "rung": "E", "calib": {"head": "261c01c39", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_089/ov_SC03_089_jr_8017CA80.c", "fn": "func_801857A8", "addr": 2149078952, "aliases": null, "header": false, "includers": 0, "nhash_before": "8a17d17992fa37bb6deb51dcfbea0021776883db", "nhash_after": "2d83efe5fc150e0ca7cdbc5d860c783250692b93", "source": "propagate:src/ov_SC03_090/ov_SC03_090_jr_8017CA80.c:func_80185484", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.42, "objects": ["build/src/ov_SC03_089/ov_SC03_089_jr_8017CA80.o"], "before_text": "s32 func_80185484_body(s32 a0) {\n extern void func_8012BE54(s32 a0);\n extern u16 D_80126B62;\n extern u8 D_801A3D08[];\n\n s32 ent; /* $s1 */\n s32 p;\n s32 h;\n s32 h2;\n s32 ret;\n s32 s0;\n s32 r;\n s32 v;\n s32 g;\n s32 d;\n u16 arr[3];\n\n ent = a0;\n p = *(s32 *)(ent + 0x20);\n h = *(s16 *)(p + 0x18);\n __asm__(\"\" : \"=r\"(h) : \"0\"(h)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n ret = ((s32 (*)(s32))func_8012BE54)(ent);\n s0 = h >> 8;\n if (ret > s0 * s0) {\n return 0;\n }\n v = *(s16 *)(ent + 0xA);\n h2 = *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A);\n __asm__ __volatile__(\"\" : \"=r\"(h2) : \"0\"(h2)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n g = *(s16 *)&D_80126B62;\n r = h2 >> 6;\n d = v - g;\n if (d >= 0 ? r < d : r < g - v) {\n return 0;\n }\n a0 = 1;\n arr[0] = *(u16 *)(ent + 0x6);\n arr[1] = *(u16 *)(ent + 0xA);\n arr[2] = *(u16 *)(ent + 0xE);\n func_8012F568(1, 0x4201, 0, 0x1C, (s32)arr, (s32)D_801A3D08);\n}\n", "after_text": "s32 func_80185484_body(s32 a0) {\n extern void func_8012BE54(s32 a0);\n extern u16 D_80126B62;\n extern u8 D_801A3D08[];\n\n s32 h;\n s32 h2;\n s32 ret;\n s32 s0;\n s32 r;\n s32 v;\n s32 g;\n s32 d;\n u16 arr[3];\n\n h = *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18);\n ret = ((s32 (*)(s32))func_8012BE54)(a0);\n s0 = (s16)h >> 8;\n if (ret > s0 * s0) {\n return 0;\n }\n v = *(s16 *)(a0 + 0xA);\n h2 = *(s16 *)(*(s32 *)(a0 + 0x20) + 0x1A);\n g = *(s16 *)&D_80126B62;\n r = (s16)h2 >> 6;\n d = v - g;\n if (d >= 0 ? r < d : r < g - v) {\n return 0;\n }\n arr[0] = *(u16 *)(a0 + 0x6);\n arr[1] = *(u16 *)(a0 + 0xA);\n arr[2] = *(u16 *)(a0 + 0xE);\n func_8012F568(1, 0x4201, 0, 0x1C, (s32)arr, (s32)D_801A3D08);\n}\n"}
src/ov_SC03_089/ov_SC03_089_jr_8017CA80.c
+9 -16
View File
@@ -6421,8 +6421,6 @@ s32 func_80185484_body(s32 a0) {
extern u16 D_80126B62;
extern u8 D_801A3D08[];
s32 ent; /* $s1 */
s32 p;
s32 h;
s32 h2;
s32 ret;
@@ -6433,28 +6431,23 @@ s32 func_80185484_body(s32 a0) {
s32 d;
u16 arr[3];
ent = a0;
p = *(s32 *)(ent + 0x20);
h = *(s16 *)(p + 0x18);
__asm__("" : "=r"(h) : "0"(h)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9)
ret = ((s32 (*)(s32))func_8012BE54)(ent);
s0 = h >> 8;
h = *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18);
ret = ((s32 (*)(s32))func_8012BE54)(a0);
s0 = (s16)h >> 8;
if (ret > s0 * s0) {
return 0;
}
v = *(s16 *)(ent + 0xA);
h2 = *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A);
__asm__ __volatile__("" : "=r"(h2) : "0"(h2)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9)
v = *(s16 *)(a0 + 0xA);
h2 = *(s16 *)(*(s32 *)(a0 + 0x20) + 0x1A);
g = *(s16 *)&D_80126B62;
r = h2 >> 6;
r = (s16)h2 >> 6;
d = v - g;
if (d >= 0 ? r < d : r < g - v) {
return 0;
}
a0 = 1;
arr[0] = *(u16 *)(ent + 0x6);
arr[1] = *(u16 *)(ent + 0xA);
arr[2] = *(u16 *)(ent + 0xE);
arr[0] = *(u16 *)(a0 + 0x6);
arr[1] = *(u16 *)(a0 + 0xA);
arr[2] = *(u16 *)(a0 + 0xE);
func_8012F568(1, 0x4201, 0, 0x1C, (s32)arr, (s32)D_801A3D08);
}
src/ov_SC03_090/ov_SC03_090_jr_8017CA80.c
+9 -16
View File
@@ -6382,8 +6382,6 @@ s32 func_80185484_body(s32 a0) {
extern u16 D_80126B62;
extern u8 D_801A31B0[];
s32 ent; /* $s1 */
s32 p;
s32 h;
s32 h2;
s32 ret;
@@ -6394,28 +6392,23 @@ s32 func_80185484_body(s32 a0) {
s32 d;
u16 arr[3];
ent = a0;
p = *(s32 *)(ent + 0x20);
h = *(s16 *)(p + 0x18);
__asm__("" : "=r"(h) : "0"(h)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9)
ret = ((s32 (*)(s32))func_8012BE54)(ent);
s0 = h >> 8;
h = *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18);
ret = ((s32 (*)(s32))func_8012BE54)(a0);
s0 = (s16)h >> 8;
if (ret > s0 * s0) {
return 0;
}
v = *(s16 *)(ent + 0xA);
h2 = *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A);
__asm__ __volatile__("" : "=r"(h2) : "0"(h2)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9)
v = *(s16 *)(a0 + 0xA);
h2 = *(s16 *)(*(s32 *)(a0 + 0x20) + 0x1A);
g = *(s16 *)&D_80126B62;
r = h2 >> 6;
r = (s16)h2 >> 6;
d = v - g;
if (d >= 0 ? r < d : r < g - v) {
return 0;
}
a0 = 1;
arr[0] = *(u16 *)(ent + 0x6);
arr[1] = *(u16 *)(ent + 0xA);
arr[2] = *(u16 *)(ent + 0xE);
arr[0] = *(u16 *)(a0 + 0x6);
arr[1] = *(u16 *)(a0 + 0xA);
arr[2] = *(u16 *)(a0 + 0xE);
func_8012F568(1, 0x4201, 0, 0x1C, (s32)arr, (s32)D_801A31B0);
}
src/ov_SC03_104/ov_SC03_104_jr_80182038.c
+9 -16
View File
@@ -3654,8 +3654,6 @@ s32 func_80185484_body(s32 a0) {
extern u16 D_80126B62;
extern u8 D_8019A078[];
s32 ent; /* $s1 */
s32 p;
s32 h;
s32 h2;
s32 ret;
@@ -3666,28 +3664,23 @@ s32 func_80185484_body(s32 a0) {
s32 d;
u16 arr[3];
ent = a0;
p = *(s32 *)(ent + 0x20);
h = *(s16 *)(p + 0x18);
__asm__("" : "=r"(h) : "0"(h)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9)
ret = ((s32 (*)(s32))func_8012BE54)(ent);
s0 = h >> 8;
h = *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18);
ret = ((s32 (*)(s32))func_8012BE54)(a0);
s0 = (s16)h >> 8;
if (ret > s0 * s0) {
return 0;
}
v = *(s16 *)(ent + 0xA);
h2 = *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A);
__asm__ __volatile__("" : "=r"(h2) : "0"(h2)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9)
v = *(s16 *)(a0 + 0xA);
h2 = *(s16 *)(*(s32 *)(a0 + 0x20) + 0x1A);
g = *(s16 *)&D_80126B62;
r = h2 >> 6;
r = (s16)h2 >> 6;
d = v - g;
if (d >= 0 ? r < d : r < g - v) {
return 0;
}
a0 = 1;
arr[0] = *(u16 *)(ent + 0x6);
arr[1] = *(u16 *)(ent + 0xA);
arr[2] = *(u16 *)(ent + 0xE);
arr[0] = *(u16 *)(a0 + 0x6);
arr[1] = *(u16 *)(a0 + 0xA);
arr[2] = *(u16 *)(a0 + 0xE);
func_8012F568(1, 0x4201, 0, 0x1C, (s32)arr, (s32)D_8019A078);
}