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feat(phase-30): T3 wave-4 — 60/68 drafts banked across 14 binaries (parallel gate); R22 140/140
Wave 4 launched 70 agents / 14 binaries; 58 returned before the pause (all match_one MATCH) and their drafts + 10 partials gated to 60 banks. fn-count 92.59 -> 92.61%, distinct 70,506 -> 70,581. R22 clean-fleet 140 passed / 0 failed under the campaign lock. Propagation deliberately deferred (--no-propagate) — it runs per-function, routed by tier (§123).
This commit is contained in:
Drew T
@@ -1357,3 +1357,11 @@
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{"ts": "2026-07-30 21:54:33", "addr": "0x80186f78", "name": "func_80186F78", "reach": null, "klass": null, "nins": null, "status": "near", "closeness": 0, "where_stuck": "match_one MATCH but gate rejected (declaration/TU plumbing)", "best_draft": ".run/backlog_drafts/func_80186F78.c", "binary": "ov_SC06_018", "source": "p30w3", "residual": null, "passes_tried": null}
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{"ts": "2026-07-30 21:54:33", "addr": "0x80187250", "name": "func_80187250", "reach": null, "klass": null, "nins": null, "status": "near", "closeness": 0, "where_stuck": "match_one MATCH but gate rejected (declaration/TU plumbing)", "best_draft": ".run/backlog_drafts/func_80187250.c", "binary": "ov_SC06_018", "source": "p30w3", "residual": null, "passes_tried": null}
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{"ts": "2026-07-30 21:54:33", "addr": "0x80187844", "name": "func_80187844", "reach": null, "klass": null, "nins": null, "status": "near", "closeness": 0, "where_stuck": "match_one MATCH but gate rejected (declaration/TU plumbing)", "best_draft": ".run/backlog_drafts/func_80187844.c", "binary": "ov_SC06_018", "source": "p30w3", "residual": null, "passes_tried": null}
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{"ts": "2026-07-30 23:04:56", "addr": "0x80185680", "name": "func_80185680", "reach": null, "klass": null, "nins": null, "status": "near", "closeness": 16, "where_stuck": "residual: 16 mismatch", "best_draft": ".run/backlog_drafts/func_80185680.c", "binary": "ov_SC02_017", "source": "p30w4", "residual": [[26, "24020001 li\tv0,1", "02002021 addu $a0, $s0, $zero"], [27, "a602005e sh\tv0,94(s0)", "9482005c lhu $v0, 0x5C($a0)"], [28, "9602005c lhu\tv0,92(s0)", "8c830020 lw $v1, 0x20($a0)"], [29, "8e030020 lw\tv1,32(s0)", "24050001 addiu $a1, $zero, 0x1"], [30, "02002021 move\ta0,s0", "a4800060 sh $zero, 0x60($a0)"], [31, "a6000060 sh\tzero,96(s0)", "34420001 ori $v0, $v0, 0x1"], [32, "34420001 ori\tv0,v0,0x1", "a482005c sh $v0, 0x5C($a0)"], [33, "a602005c sh\tv0,92(s0)", "94620012 lhu $v0, 0x12($v1)"], [34, "94620012 lhu\tv0,18(v1)", "24030001 addiu $v1, $zero, 0x1"], [35, "24050001 li\ta1,1", "a483005e sh $v1, 0x5E($a0)"], [41, "8e030020 lw\tv1,32(s0)", "8e040020 lw $a0, 0x20($s0)"], [43, "84640018 lh\ta0,24(v1)", "84830018 lh $v1, 0x18($a0)"], [45, "00441023 subu\tv0,v0,a0", "00431023 subu $v0, $v0, $v1"], [50, "00821021 addu\tv0,a0,v0", "00621021 addu $v0, $v1, $v0"], [51, "a462001c sh\tv0,28(v1)", "a482001c sh $v0, 0x1C($a0)"], [52, "a4620018 sh\tv0,24(v1)", "a4820018 sh $v0, 0x18($a0)"]], "passes_tried": null}
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{"ts": "2026-07-30 23:06:10", "addr": "0x8018a150", "name": "func_8018A150", "reach": null, "klass": null, "nins": null, "status": "near", "closeness": 21, "where_stuck": "residual: 21 mismatch", "best_draft": ".run/backlog_drafts/func_8018A150.c", "binary": "ov_SC02_027", "source": "p30w4", "residual": [[0, "27bdffe0 addiu\tsp,sp,-32", "27bdffe8 addiu $sp, $sp, -0x18"], [1, "afbf0018 sw\tra,24(sp)", "afbf0010 sw $ra, 0x10($sp)"], [18, "00401821 move\tv1,v0", "28426000 slti $v0, $v0, 0x6000"], [19, "28426000 slti\tv0,v0,24576", "14400003 bnez $v0, .L8018A1AC"], [20, "10400007 beqz\tv0,70 <func_8018A150+0x70>", "24026000 addiu $v0, $zero, 0x6000"], [21, "24026000 li\tv0,24576", "08062871 j .L8018A1C4"], [22, "94820106 lhu\tv0,262(a0)", "a48200fe sh $v0, 0xFE($a0)"], [23, "00000000 nop", "94820106 lhu $v0, 0x106($a0)"], [24, "24450400 addiu\ta1,v0,1024", "948300fe lhu $v1, 0xFE($a0)"], [25, "3062ffff andi\tv0,v1,0xffff", "24420400 addiu $v0, $v0, 0x400"], [26, "00451021 addu\tv0,v0,a1", "00621821 addu $v1, $v1, $v0"], [27, "a4850106 sh\ta1,262(a0)", "a4820106 sh $v0, 0x106($a0)"], [28, "a48200fe sh\tv0,254(a0)", "a48300fe sh $v1, 0xFE($a0)"], [31, "2445ff80 addiu\ta1,v0,-128", "2442ff80 addiu $v0, $v0, -0x80"], [32, "00651021 addu\tv0,v1,a1", "00621821 addu $v1, $v1, $v0"], [33, "a48200fc sh\tv0,252(a0)", "a48300fc sh $v1, 0xFC($a0)"], [34, "00021400 sll\tv0,v0,0x10", "00031c00 sll $v1, $v1, 16"], [35, "04410009 bgez\tv0,b4 <func_8018A150+0xb4>", "04610009 bgez $v1, .L8018A204"], [36, "a4850104 sh\ta1,260(a0)", "a4820104 sh $v0, 0x104($a0)"], [47, "8fbf0018 lw\tra,24(sp)", "8fbf0010 lw $ra, 0x10($sp)"], [48, "27bd0020 addiu\tsp,sp,32", "27bd0018 addiu $sp, $sp, 0x18"]], "passes_tried": null}
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{"ts": "2026-07-30 23:06:50", "addr": "0x80183cbc", "name": "func_80183CBC", "reach": null, "klass": null, "nins": null, "status": "near", "closeness": 5, "where_stuck": "residual: 5 mismatch", "best_draft": ".run/backlog_drafts/func_80183CBC.c", "binary": "ov_SC02_035", "source": "p30w4", "residual": [[15, "10400002 beqz\tv0,48 <func_80183CBC+0x48>", "14400002 bnez $v0, .L80183D04"], [16, "24030001 li\tv1,1", "24020003 addiu $v0, $zero, 0x3"], [17, "24030003 li\tv1,3", "24020001 addiu $v0, $zero, 0x1"], [18, "8e020078 lw\tv0,120(s0)", "a6020002 sh $v0, 0x2($s0)"], [19, "a6030002 sh\tv1,2(s0)", "8e020078 lw $v0, 0x78($s0)"]], "passes_tried": null}
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{"ts": "2026-07-30 23:07:30", "addr": "0x8017ea1c", "name": "func_8017EA1C", "reach": null, "klass": null, "nins": null, "status": "near", "closeness": 12, "where_stuck": "residual: 12 mismatch", "best_draft": ".run/backlog_drafts/func_8017EA1C.c", "binary": "ov_SC02_041", "source": "p30w4", "residual": [[25, "97a50010 lhu\ta1,16(sp)", "97a30010 lhu $v1, 0x10($sp)"], [26, "9603000a lhu\tv1,10(s0)", "9605002e lhu $a1, 0x2E($s0)"], [27, "96060030 lhu\ta2,48(s0)", "00431021 addu $v0, $v0, $v1"], [28, "00451021 addu\tv0,v0,a1", "a6020006 sh $v0, 0x6($s0)"], [29, "a6020006 sh\tv0,6(s0)", "9602000a lhu $v0, 0xA($s0)"], [30, "9602001a lhu\tv0,26(s0)", "96030030 lhu $v1, 0x30($s0)"], [31, "9605002e lhu\ta1,46(s0)", "97a60014 lhu $a2, 0x14($sp)"], [32, "00661823 subu\tv1,v1,a2", "00431023 subu $v0, $v0, $v1"], [33, "a603000a sh\tv1,10(s0)", "a602000a sh $v0, 0xA($s0)"], [34, "97a30014 lhu\tv1,20(sp)", "9602001a lhu $v0, 0x1A($s0)"], [36, "00431021 addu\tv0,v0,v1", "a605002e sh $a1, 0x2E($s0)"], [37, "a605002e sh\ta1,46(s0)", "00461021 addu $v0, $v0, $a2"]], "passes_tried": null}
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{"ts": "2026-07-30 23:08:10", "addr": "0x8017d900", "name": "func_8017D900", "reach": null, "klass": null, "nins": null, "status": "near", "closeness": 18, "where_stuck": "residual: 18 mismatch", "best_draft": ".run/backlog_drafts/func_8017D900.c", "binary": "ov_SC03_014", "source": "p30w4", "residual": [[31, "92020000 lbu\tv0,0(s0)", "3c05801f lui $a1, %hi(D_801EA88C)"], [32, "3c060000 lui\ta2,0x0", "24a5a88c addiu $a1, $a1, %lo(D_801EA88C)"], [33, "24c60000 addiu\ta2,a2,0", "8a020003 lwl $v0, 0x3($s0)"], [34, "8a030003 lwl\tv1,3(s0)", "9a020000 lwr $v0, 0x0($s0)"], [35, "9a030000 lwr\tv1,0(s0)", "00000000 nop"], [36, "00000000 nop", "a8a20003 swl $v0, 0x3($a1)"], [37, "a8c30003 swl\tv1,3(a2)", "b8a20000 swr $v0, 0x0($a1)"], [38, "b8c30000 swr\tv1,0(a2)", "92020000 lbu $v0, 0x0($s0)"], [39, "14400003 bnez\tv0,ac <func_8017D900+0xac>", "00000000 nop"], [40, "00000000 nop", "14400003 bnez $v0, .L8017D9B0"], [42, "02202021 move\ta0,s1", "0c051b0f jal func_80146C3C"], [43, "8fbf0018 lw\tra,24(sp)", "02202021 addu $a0, $s1, $zero"], [44, "8fb10014 lw\ts1,20(sp)", "8fbf0018 lw $ra, 0x18($sp)"], [45, "8fb00010 lw\ts0,16(sp)", "8fb10014 lw $s1, 0x14($sp)"], [46, "27bd0020 addiu\tsp,sp,32", "8fb00010 lw $s0, 0x10($sp)"], [47, "03e00008 jr\tra", "27bd0020 addiu $sp, $sp, 0x20"], [48, "00000000 nop", "03e00008 jr $ra"], [49, "--", "00000000 nop"]], "passes_tried": null}
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{"ts": "2026-07-30 23:08:10", "addr": "0x801846e4", "name": "func_801846E4", "reach": null, "klass": null, "nins": null, "status": "near", "closeness": 21, "where_stuck": "residual: 21 mismatch", "best_draft": ".run/backlog_drafts/func_801846E4.c", "binary": "ov_SC03_014", "source": "p30w4", "residual": [[0, "27bdffe0 addiu\tsp,sp,-32", "27bdffd8 addiu $sp, $sp, -0x28"], [1, "00002021 move\ta0,zero", "afbf0024 sw $ra, 0x24($sp)"], [2, "00002821 move\ta1,zero", "afbe0020 sw $fp, 0x20($sp)"], [3, "3c060000 lui\ta2,0x0", "03a0f021 addu $fp, $sp, $zero"], [4, "24c60000 addiu\ta2,a2,0", "afa00010 sw $zero, 0x10($sp)"], [5, "00003821 move\ta3,zero", "00002021 addu $a0, $zero, $zero"], [6, "afbf0018 sw\tra,24(sp)", "00002821 addu $a1, $zero, $zero"], [8, "afa00010 sw\tzero,16(sp)", "24c6ee50 addiu $a2, $a2, %lo(D_800AEE50)"], [9, "8fbf0018 lw\tra,24(sp)", "00003821 addu $a3, $zero, $zero"], [10, "27bd0020 addiu\tsp,sp,32", "0c006aef jal func_8001ABBC"], [11, "03e00008 jr\tra", "00000000 nop"], [12, "00000000 nop", "afc20018 sw $v0, 0x18($fp)"], [13, "--", "8fc20018 lw $v0, 0x18($fp)"], [14, "--", "080611c9 j .L80184724"], [15, "--", "00000000 nop"], [16, "--", "03c0e821 addu $sp, $fp, $zero"], [17, "--", "8fbf0024 lw $ra, 0x24($sp)"], [18, "--", "8fbe0020 lw $fp, 0x20($sp)"], [19, "--", "27bd0028 addiu $sp, $sp, 0x28"], [20, "--", "03e00008 jr $ra"], [21, "--", "00000000 nop"]], "passes_tried": null}
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{"ts": "2026-07-30 23:08:51", "addr": "0x80187940", "name": "func_80187940", "reach": null, "klass": null, "nins": null, "status": "near", "closeness": 26, "where_stuck": "residual: 26 mismatch", "best_draft": ".run/backlog_drafts/func_80187940.c", "binary": "ov_SC04_011", "source": "p30w4", "residual": [[19, "3c040000 lui\ta0,0x0", "02003821 addu $a3, $s0, $zero"], [20, "8c840000 lw\ta0,0(a0)", "3c048012 lui $a0, %hi(D_80126B78)"], [21, "3c050000 lui\ta1,0x0", "8c846b78 lw $a0, %lo(D_80126B78)($a0)"], [22, "8ca50000 lw\ta1,0(a1)", "3c058012 lui $a1, %hi(D_80126B90)"], [24, "02003821 move\ta3,s0", "0c04d622 jal func_80135888"], [25, "1040000e beqz\tv0,a0 <func_80187940+0xa0>", "02408821 addu $s1, $s2, $zero"], [26, "24040001 li\ta0,1", "14400003 bnez $v0, .L801879B8"], [27, "24054017 li\ta1,16407", "24040001 addiu $a0, $zero, 0x1"], [28, "00123400 sll\ta2,s2,0x10", "08061e7a j .L801879E8"], [29, "00063403 sra\ta2,a2,0x10", "00001021 addu $v0, $zero, $zero"], [30, "24070078 li\ta3,120", "24054017 addiu $a1, $zero, 0x4017"], [31, "3c020000 lui\tv0,0x0", "00123400 sll $a2, $s2, 16"], [32, "24420000 addiu\tv0,v0,0", "00063403 sra $a2, $a2, 16"], [33, "afb00010 sw\ts0,16(sp)", "24070078 addiu $a3, $zero, 0x78"], [35, "afa20014 sw\tv0,20(sp)", "244252a8 addiu $v0, $v0, %lo(D_801152A8)"], [36, "3c010000 lui\tat,0x0", "afb00010 sw $s0, 0x10($sp)"], [37, "a4320000 sh\ts2,0(at)", "0c04bd5a jal func_8012F568"], [40, "00001021 move\tv0,zero", "3c018012 lui $at, %hi(D_80126B9A)"], [41, "8fbf0034 lw\tra,52(sp)", "a4316b9a sh $s1, %lo(D_80126B9A)($at)"], [42, "8fb20030 lw\ts2,48(sp)", "8fbf0034 lw $ra, 0x34($sp)"], [43, "8fb1002c lw\ts1,44(sp)", "8fb20030 lw $s2, 0x30($sp)"], [44, "8fb00028 lw\ts0,40(sp)", "8fb1002c lw $s1, 0x2C($sp)"], [45, "27bd0038 addiu\tsp,sp,56", "8fb00028 lw $s0, 0x28($sp)"], [46, "03e00008 jr\tra", "27bd0038 addiu $sp, $sp, 0x38"]], "passes_tried": null}
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{"ts": "2026-07-30 23:08:51", "addr": "0x801885c0", "name": "func_801885C0", "reach": null, "klass": null, "nins": null, "status": "near", "closeness": 1, "where_stuck": "residual: 1 mismatch", "best_draft": ".run/backlog_drafts/func_801885C0.c", "binary": "ov_SC04_011", "source": "p30w4", "residual": [[8, "3402ffd8 li\tv0,0xffd8", "2402ffd8 addiu $v0, $zero, -0x28"]], "passes_tried": null}
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+925
-943
File diff suppressed because it is too large
Load Diff
+4
-4
@@ -2,13 +2,13 @@
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> Generated by `tools/family_hseq.py` from the 138 overlay sigs + per-overlay src stubs. Ranked by TEMPLATABLE byte-weight (PURE+IMM members × nins × 4). The byte-gate is the arbiter.
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>
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> **Scope: the 138 OVERLAYS only** (no main, no resident) · generated at HEAD `commit:1251` · stub set derived from `corpus.stubs` — the same oracle `progress.py` counts, so same-tree overlay totals agree by construction; compare digests only at the same HEAD.
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> **Scope: the 138 OVERLAYS only** (no main, no resident) · generated at HEAD `commit:1255` · stub set derived from `corpus.stubs` — the same oracle `progress.py` counts, so same-tree overlay totals agree by construction; compare digests only at the same HEAD.
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**Fleet (overlays):** 92.6% fn / 88.4% instr / 79.2% distinct-code matched. Unmatched: 26,075 instances / 1,519,281 ins (17,299 distinct classes).
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**Fleet (overlays):** 92.9% fn / 88.6% instr / 79.6% distinct-code matched. Unmatched: 25,089 instances / 1,485,836 ins (16,864 distinct classes).
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**Tail cross-check (Phase-25 close):** 15,370 tail fns / 654,517 ins → 524 h_seq families ≥2, **138 substantial (nins≥80) / 261,689 ins**.
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**Tail cross-check (Phase-25 close):** 14,935 tail fns / 649,147 ins → 512 h_seq families ≥2, **138 substantial (nins≥80) / 261,689 ins**.
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**Full frontier (all unmatched by h_seq):** 2472 target families (≥2 members or a matched sibling) + 3768 singletons (Step-D residue). Substantial: **478 families / 677,508 templatable ins**, 30 with a matched sibling (zero-crack). Substantial member classes: 3,624 PURE · 40 IMM · 6 STRUCT-excluded.
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**Full frontier (all unmatched by h_seq):** 2432 target families (≥2 members or a matched sibling) + 3768 singletons (Step-D residue). Substantial: **476 families / 675,867 templatable ins**, 28 with a matched sibling (zero-crack). Substantial member classes: 3,612 PURE · 40 IMM · 6 STRUCT-excluded.
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## Top substantial families (by templatable byte-weight)
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+34
-34
@@ -4,16 +4,16 @@
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# cross-binary collapsible-byte leverage: docs/duplicates.cross.md.
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# THREE progress metrics (all matter — see the labels):
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FLEET fn-count byte-ident: 327501 / 353720 = 92.59% (REAL+LINKED+empties; FUNCTION-count, ×134-inflated — one crack counts per overlay)
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FLEET instr-weighted : 11591233 / 13141652 = 88.2% (shipped .text across main + resident + 138 overlays; the decomp.dev-DISPLAY number)
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FLEET distinct-code(uniq): 4431928 / 5634875 = 78.7% (70506/87459 unique fns; the DISTINCT-RE number)
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FLEET fn-count byte-ident: 327576 / 353720 = 92.61% (REAL+LINKED+empties; FUNCTION-count, ×134-inflated — one crack counts per overlay)
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FLEET instr-weighted : 11594524 / 13141652 = 88.2% (shipped .text across main + resident + 138 overlays; the decomp.dev-DISPLAY number)
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FLEET distinct-code(uniq): 4435219 / 5634875 = 78.7% (70581/87459 unique fns; the DISTINCT-RE number)
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MAIN game-code weighted : 436 / 60201 = 0.7% (INCLUDED in the fleet numbers above since 2026-07-22 — roadmap §1 metrics contract; LINKED-excluding Ghidra sig dated 2026-06-14; caveat is R34: no independent second oracle for a PS-X EXE, NOT drift)
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(fleet EXCLUDING main, for continuity with pre-2026-07-22 readings: 11590797 / 13081451 = 88.6%)
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(fleet EXCLUDING main, for continuity with pre-2026-07-22 readings: 11594088 / 13081451 = 88.6%)
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FLEET REAL substantive : 325646 (of which dedup-shared 240081 via 1890 groups / 240155 instances)
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FLEET REAL substantive : 325721 (of which dedup-shared 240081 via 1890 groups / 240155 instances)
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FLEET LINKED PsyQ objs : 959
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FLEET NON_MATCHING : 7 (0 in any default build — G4)
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FLEET INCLUDE_ASM stubs : 26212
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FLEET INCLUDE_ASM stubs : 26137
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FLEET matchable : 353720
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| binary | REAL | shared | LINKED | byte-ident | matchable | byte-ident % |
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@@ -28,25 +28,25 @@ FLEET matchable : 353720
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| ov_SC01_008 | 2320 | 1738 | 0 | 2322 | 2426 | 95.7% |
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| ov_SC01_009 | 2345 | 1739 | 0 | 2346 | 2507 | 93.6% |
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| ov_SC01_074 | 2326 | 1739 | 0 | 2328 | 2425 | 96.0% |
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| ov_SC01_077 | 2496 | 1706 | 0 | 2498 | 2585 | 96.6% |
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| ov_SC01_077 | 2501 | 1706 | 0 | 2503 | 2585 | 96.8% |
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| ov_SC01_080 | 2360 | 1742 | 0 | 2360 | 2512 | 93.9% |
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| ov_SC01_084 | 2376 | 1742 | 0 | 2381 | 2579 | 92.3% |
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| ov_SC02_000 | 2427 | 1777 | 0 | 2427 | 2683 | 90.5% |
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| ov_SC01_084 | 2381 | 1742 | 0 | 2386 | 2579 | 92.5% |
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| ov_SC02_000 | 2432 | 1777 | 0 | 2432 | 2683 | 90.6% |
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| ov_SC02_003 | 2427 | 1777 | 0 | 2427 | 2683 | 90.5% |
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| ov_SC02_004 | 2325 | 1742 | 0 | 2325 | 2401 | 96.8% |
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| ov_SC02_005 | 2457 | 1738 | 0 | 2467 | 2927 | 84.3% |
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| ov_SC02_011 | 2468 | 1745 | 0 | 2479 | 2893 | 85.7% |
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| ov_SC02_005 | 2462 | 1738 | 0 | 2472 | 2927 | 84.5% |
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| ov_SC02_011 | 2473 | 1745 | 0 | 2484 | 2893 | 85.9% |
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| ov_SC02_015 | 2330 | 1744 | 0 | 2330 | 2414 | 96.5% |
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| ov_SC02_016 | 2374 | 1744 | 0 | 2377 | 2545 | 93.4% |
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| ov_SC02_017 | 2428 | 1744 | 0 | 2436 | 2732 | 89.2% |
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| ov_SC02_017 | 2432 | 1744 | 0 | 2440 | 2732 | 89.3% |
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| ov_SC02_021 | 2335 | 1744 | 0 | 2335 | 2437 | 95.8% |
|
||||
| ov_SC02_026 | 2357 | 1742 | 0 | 2363 | 2572 | 91.9% |
|
||||
| ov_SC02_027 | 2384 | 1742 | 0 | 2393 | 2692 | 88.9% |
|
||||
| ov_SC02_026 | 2362 | 1742 | 0 | 2368 | 2572 | 92.1% |
|
||||
| ov_SC02_027 | 2388 | 1742 | 0 | 2397 | 2692 | 89.0% |
|
||||
| ov_SC02_028 | 2386 | 1742 | 0 | 2396 | 2701 | 88.7% |
|
||||
| ov_SC02_031 | 2373 | 1743 | 0 | 2378 | 2562 | 92.8% |
|
||||
| ov_SC02_035 | 2342 | 1742 | 0 | 2345 | 2520 | 93.1% |
|
||||
| ov_SC02_035 | 2344 | 1742 | 0 | 2347 | 2520 | 93.1% |
|
||||
| ov_SC02_039 | 2324 | 1742 | 0 | 2324 | 2416 | 96.2% |
|
||||
| ov_SC02_041 | 2368 | 1742 | 0 | 2371 | 2561 | 92.6% |
|
||||
| ov_SC02_041 | 2373 | 1742 | 0 | 2376 | 2561 | 92.8% |
|
||||
| ov_SC03_001 | 2475 | 1743 | 0 | 2492 | 2869 | 86.9% |
|
||||
| ov_SC03_002 | 2387 | 1747 | 0 | 2402 | 2631 | 91.3% |
|
||||
| ov_SC03_003 | 2331 | 1742 | 0 | 2332 | 2423 | 96.2% |
|
||||
@@ -56,7 +56,7 @@ FLEET matchable : 353720
|
||||
| ov_SC03_011 | 2347 | 1742 | 0 | 2353 | 2527 | 93.1% |
|
||||
| ov_SC03_012 | 2322 | 1742 | 0 | 2323 | 2406 | 96.6% |
|
||||
| ov_SC03_013 | 2349 | 1742 | 0 | 2349 | 2493 | 94.2% |
|
||||
| ov_SC03_014 | 2419 | 1767 | 0 | 2419 | 2685 | 90.1% |
|
||||
| ov_SC03_014 | 2422 | 1767 | 0 | 2422 | 2685 | 90.2% |
|
||||
| ov_SC03_015 | 2419 | 1767 | 0 | 2419 | 2685 | 90.1% |
|
||||
| ov_SC03_023 | 2333 | 1742 | 0 | 2334 | 2435 | 95.9% |
|
||||
| ov_SC03_024 | 2399 | 1747 | 0 | 2406 | 2641 | 91.1% |
|
||||
@@ -67,19 +67,19 @@ FLEET matchable : 353720
|
||||
| ov_SC03_089 | 2365 | 1742 | 0 | 2372 | 2581 | 91.9% |
|
||||
| ov_SC03_090 | 2368 | 1742 | 0 | 2376 | 2625 | 90.5% |
|
||||
| ov_SC03_091 | 2370 | 1742 | 0 | 2378 | 2640 | 90.1% |
|
||||
| ov_SC03_092 | 2387 | 1742 | 0 | 2399 | 2587 | 92.7% |
|
||||
| ov_SC03_092 | 2388 | 1742 | 0 | 2400 | 2587 | 92.8% |
|
||||
| ov_SC03_093 | 2358 | 1742 | 0 | 2362 | 2563 | 92.2% |
|
||||
| ov_SC03_094 | 2349 | 1742 | 0 | 2355 | 2577 | 91.4% |
|
||||
| ov_SC03_095 | 2337 | 1742 | 0 | 2340 | 2474 | 94.6% |
|
||||
| ov_SC03_096 | 2338 | 1742 | 0 | 2341 | 2465 | 95.0% |
|
||||
| ov_SC03_097 | 2379 | 1742 | 0 | 2386 | 2603 | 91.7% |
|
||||
| ov_SC03_097 | 2380 | 1742 | 0 | 2387 | 2603 | 91.7% |
|
||||
| ov_SC03_098 | 2349 | 1742 | 0 | 2352 | 2541 | 92.6% |
|
||||
| ov_SC03_099 | 2339 | 1742 | 0 | 2342 | 2504 | 93.5% |
|
||||
| ov_SC03_100 | 2352 | 1742 | 0 | 2356 | 2539 | 92.8% |
|
||||
| ov_SC03_100 | 2353 | 1742 | 0 | 2357 | 2539 | 92.8% |
|
||||
| ov_SC03_101 | 2356 | 1742 | 0 | 2360 | 2528 | 93.4% |
|
||||
| ov_SC03_102 | 2339 | 1742 | 0 | 2342 | 2492 | 94.0% |
|
||||
| ov_SC03_103 | 2344 | 1744 | 0 | 2347 | 2510 | 93.5% |
|
||||
| ov_SC03_104 | 2373 | 1742 | 0 | 2380 | 2616 | 91.0% |
|
||||
| ov_SC03_104 | 2374 | 1742 | 0 | 2381 | 2616 | 91.0% |
|
||||
| ov_SC03_105 | 2359 | 1742 | 0 | 2366 | 2597 | 91.1% |
|
||||
| ov_SC03_108 | 2327 | 1742 | 0 | 2327 | 2443 | 95.3% |
|
||||
| ov_SC03_109 | 2330 | 1742 | 0 | 2332 | 2424 | 96.2% |
|
||||
@@ -98,20 +98,20 @@ FLEET matchable : 353720
|
||||
| ov_SC03_125 | 2374 | 1742 | 0 | 2386 | 2588 | 92.2% |
|
||||
| ov_SC03_126 | 2333 | 1744 | 0 | 2333 | 2423 | 96.3% |
|
||||
| ov_SC04_000 | 2360 | 1746 | 0 | 2369 | 2546 | 93.0% |
|
||||
| ov_SC04_002 | 2383 | 1742 | 0 | 2387 | 2636 | 90.6% |
|
||||
| ov_SC04_002 | 2384 | 1742 | 0 | 2388 | 2636 | 90.6% |
|
||||
| ov_SC04_003 | 2348 | 1742 | 0 | 2352 | 2502 | 94.0% |
|
||||
| ov_SC04_004 | 2361 | 1742 | 0 | 2363 | 2558 | 92.4% |
|
||||
| ov_SC04_005 | 2372 | 1742 | 0 | 2378 | 2612 | 91.0% |
|
||||
| ov_SC04_005 | 2373 | 1742 | 0 | 2379 | 2612 | 91.1% |
|
||||
| ov_SC04_006 | 2337 | 1742 | 0 | 2339 | 2454 | 95.3% |
|
||||
| ov_SC04_007 | 2366 | 1742 | 0 | 2370 | 2569 | 92.3% |
|
||||
| ov_SC04_007 | 2367 | 1742 | 0 | 2371 | 2569 | 92.3% |
|
||||
| ov_SC04_008 | 2325 | 1742 | 0 | 2325 | 2415 | 96.3% |
|
||||
| ov_SC04_009 | 2341 | 1742 | 0 | 2344 | 2441 | 96.0% |
|
||||
| ov_SC04_010 | 2329 | 1742 | 0 | 2330 | 2419 | 96.3% |
|
||||
| ov_SC04_011 | 2394 | 1742 | 0 | 2400 | 2803 | 85.6% |
|
||||
| ov_SC04_011 | 2397 | 1742 | 0 | 2403 | 2803 | 85.7% |
|
||||
| ov_SC04_012 | 2327 | 1742 | 0 | 2328 | 2420 | 96.2% |
|
||||
| ov_SC04_015 | 2399 | 1743 | 0 | 2410 | 2611 | 92.3% |
|
||||
| ov_SC04_016 | 2329 | 1742 | 0 | 2331 | 2440 | 95.5% |
|
||||
| ov_SC04_018 | 2476 | 1777 | 0 | 2476 | 2857 | 86.7% |
|
||||
| ov_SC04_018 | 2481 | 1777 | 0 | 2481 | 2857 | 86.8% |
|
||||
| ov_SC04_019 | 2476 | 1777 | 0 | 2476 | 2857 | 86.7% |
|
||||
| ov_SC04_020 | 2362 | 1742 | 0 | 2374 | 2567 | 92.5% |
|
||||
| ov_SC04_021 | 2333 | 1744 | 0 | 2333 | 2423 | 96.3% |
|
||||
@@ -132,23 +132,23 @@ FLEET matchable : 353720
|
||||
| ov_SC05_019 | 2333 | 1744 | 0 | 2333 | 2423 | 96.3% |
|
||||
| ov_SC06_000 | 2418 | 1751 | 0 | 2421 | 2691 | 90.0% |
|
||||
| ov_SC06_006 | 2352 | 1742 | 0 | 2353 | 2511 | 93.7% |
|
||||
| ov_SC06_008 | 2376 | 1744 | 0 | 2382 | 2542 | 93.7% |
|
||||
| ov_SC06_010 | 2355 | 1742 | 0 | 2360 | 2517 | 93.8% |
|
||||
| ov_SC06_008 | 2377 | 1744 | 0 | 2383 | 2542 | 93.7% |
|
||||
| ov_SC06_010 | 2356 | 1742 | 0 | 2361 | 2517 | 93.8% |
|
||||
| ov_SC06_011 | 2337 | 1742 | 0 | 2341 | 2468 | 94.9% |
|
||||
| ov_SC06_013 | 2331 | 1742 | 0 | 2332 | 2425 | 96.2% |
|
||||
| ov_SC06_014 | 2338 | 1742 | 0 | 2340 | 2453 | 95.4% |
|
||||
| ov_SC06_015 | 2336 | 1742 | 0 | 2336 | 2421 | 96.5% |
|
||||
| ov_SC06_016 | 2353 | 1742 | 0 | 2355 | 2549 | 92.4% |
|
||||
| ov_SC06_018 | 2375 | 1744 | 0 | 2382 | 2665 | 89.4% |
|
||||
| ov_SC06_018 | 2380 | 1744 | 0 | 2387 | 2665 | 89.6% |
|
||||
| ov_SC06_020 | 2348 | 1744 | 0 | 2349 | 2518 | 93.3% |
|
||||
| ov_SC06_022 | 2373 | 1742 | 0 | 2381 | 2642 | 90.1% |
|
||||
| ov_SC06_024 | 2383 | 1742 | 0 | 2389 | 2667 | 89.6% |
|
||||
| ov_SC06_025 | 2362 | 1742 | 0 | 2367 | 2572 | 92.0% |
|
||||
| ov_SC06_024 | 2384 | 1742 | 0 | 2390 | 2667 | 89.6% |
|
||||
| ov_SC06_025 | 2363 | 1742 | 0 | 2368 | 2572 | 92.1% |
|
||||
| ov_SC06_027 | 2323 | 1742 | 0 | 2324 | 2408 | 96.5% |
|
||||
| ov_SC06_029 | 2387 | 1742 | 0 | 2399 | 2662 | 90.1% |
|
||||
| ov_SC06_029 | 2388 | 1742 | 0 | 2400 | 2662 | 90.2% |
|
||||
| ov_SC06_030 | 2336 | 1742 | 0 | 2336 | 2456 | 95.1% |
|
||||
| ov_SC06_032 | 2369 | 1743 | 0 | 2376 | 2658 | 89.4% |
|
||||
| ov_SC06_033 | 2369 | 1743 | 0 | 2376 | 2631 | 90.3% |
|
||||
| ov_SC06_032 | 2370 | 1743 | 0 | 2377 | 2658 | 89.4% |
|
||||
| ov_SC06_033 | 2370 | 1743 | 0 | 2377 | 2631 | 90.3% |
|
||||
| ov_SC07_000 | 2349 | 1746 | 0 | 2351 | 2521 | 93.3% |
|
||||
| ov_SC07_001 | 2335 | 1742 | 0 | 2337 | 2454 | 95.2% |
|
||||
| ov_SC07_002 | 2363 | 1742 | 0 | 2367 | 2579 | 91.8% |
|
||||
|
||||
@@ -427,7 +427,28 @@ void func_80128AF4(void) {
|
||||
|
||||
DEFINE_func_80128C14() /* dedup: shared engine-core @0x80128C14 (src/shared) */
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077_a", func_80128C98);
|
||||
#include "common.h"
|
||||
|
||||
typedef struct {
|
||||
s32 word0;
|
||||
s32 word4;
|
||||
} CdFileLoc;
|
||||
|
||||
extern s16 D_80186DCC[];
|
||||
extern CdFileLoc cdFileLocTable[];
|
||||
extern s32 D_801D7F90;
|
||||
extern void func_8001ABBC(s32 a0, s32 a1, void *a2, s32 a3, s32 a4);
|
||||
|
||||
s32 func_80128C98(s32 arg0) {
|
||||
s16 idx = D_80186DCC[arg0];
|
||||
|
||||
if (idx >= 0) {
|
||||
func_8001ABBC(0, 0, (u8 *)&cdFileLocTable[idx], D_801D7F90, 0);
|
||||
} else {
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077_a", func_80128CFC);
|
||||
|
||||
|
||||
@@ -2168,7 +2168,37 @@ s32 func_80131FDC(s16 *a0) {
|
||||
return D_801870A4[(u16)a0[1]]();
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077_jr_8012ACE0", func_80132018);
|
||||
#include "common.h"
|
||||
|
||||
extern void func_8012C1B8(void);
|
||||
extern void func_8012CAE4(void *a0);
|
||||
extern void func_8001C214(int, int);
|
||||
|
||||
/* §37 asm-label aliases: D_80187044 is declared in this TU as `void (*[])(void)`
|
||||
* (func_80131EEC's dispatch table) — a conflicting type. The 20-byte-stride view
|
||||
* below is this function's own. D_80187048 == D_80187044 + 4 is a SEPARATE
|
||||
* per-overlay symbol and is referenced BY NAME, never as base+literal (§84). */
|
||||
extern int tbl_D_80187044[][5] __asm__("D_80187044");
|
||||
extern int tbl_D_80187048[][5] __asm__("D_80187048");
|
||||
|
||||
void func_80132018(int param_1)
|
||||
{
|
||||
int v0;
|
||||
|
||||
v0 = ((int (*)(void))func_8012C1B8)();
|
||||
*(int *)(param_1 + 0x20) = v0;
|
||||
if (v0 == 0) {
|
||||
((void (*)(int))func_8012CAE4)(param_1);
|
||||
} else {
|
||||
func_8001C214(v0, 0);
|
||||
*(short *)(param_1 + 0x5c) = 0x80;
|
||||
*(unsigned short *)(param_1 + 2) += 1;
|
||||
*(int *)(param_1 + 0x58) = (int)&tbl_D_80187048[*(unsigned short *)(param_1 + 0x70) & 0xfff];
|
||||
*(int *)(param_1 + 0xdc) = tbl_D_80187044[*(unsigned short *)(param_1 + 0x70) & 0xfff][0];
|
||||
*(short *)(param_1 + 0xfc) = (*(unsigned short *)(param_1 + 0x70) >> 12) << 9;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
DEFINE_func_801320D0() /* dedup: shared engine-core @0x801320D0 (src/shared) */
|
||||
|
||||
|
||||
@@ -1373,7 +1373,40 @@ DEFINE_func_801377B4() /* dedup: shared engine-core @0x801377B4 (src/shared) */
|
||||
|
||||
DEFINE_func_80137840() /* dedup: shared engine-core @0x80137840 (src/shared) */
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077_jr_80135D20", func_801378F0);
|
||||
#include "common.h"
|
||||
|
||||
extern void func_80016714(void *a0, s32 a1);
|
||||
extern void func_8013A860(void);
|
||||
extern u8 D_80127520[];
|
||||
extern u8 aD801269F0[] __asm__("D_801269F0"); /* §37 alias: TU canon is `extern int D_801269F0` */
|
||||
extern u8 D_80126A28[];
|
||||
extern u8 D_801870D0[];
|
||||
|
||||
void func_801378F0(void) {
|
||||
s32 i;
|
||||
s32 si;
|
||||
s32 di;
|
||||
u8 *p;
|
||||
|
||||
func_80016714(D_80127520, 0xBFC);
|
||||
i = 0;
|
||||
si = 0;
|
||||
p = aD801269F0;
|
||||
di = 0;
|
||||
do {
|
||||
func_80016714(p, 0x4C);
|
||||
*(u16 *)&D_80126A28[di] = *(u16 *)&D_801870D0[si];
|
||||
*(u16 *)&D_80126A28[di + 2] = *(u16 *)&D_801870D0[si + 2];
|
||||
*(u16 *)&D_80126A28[di + 4] = *(u16 *)&D_801870D0[si + 4];
|
||||
*(u16 *)&D_80126A28[di + 6] = *(u16 *)&D_801870D0[si + 6];
|
||||
p += 0x4C;
|
||||
i += 1;
|
||||
si += 8;
|
||||
di += 0x4C;
|
||||
} while (i < 3);
|
||||
func_8013A860();
|
||||
}
|
||||
|
||||
|
||||
DEFINE_func_801379D8() /* dedup: shared engine-core @0x801379D8 (src/shared) */
|
||||
|
||||
|
||||
@@ -1686,7 +1686,50 @@ DEFINE_func_80157BC8() /* dedup: shared engine-core @0x80157BC8 (src/shared) */
|
||||
|
||||
DEFINE_func_80157CCC() /* dedup: shared engine-core @0x80157CCC (src/shared) */
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077_jr_80154C24", func_80157D20);
|
||||
#include "common.h"
|
||||
|
||||
/* func_80157D20 — 21-ins plumbing shim (×138 overlays).
|
||||
*
|
||||
* §71 sibling-first: the immediate neighbour func_801578C0 in this very TU
|
||||
* (src/ov_SC01_077/ov_SC01_077_jr_80154C24.c L1592) already matches with
|
||||
* `((void (*)(void))func_80156648)();` — the zero-argument call form. The
|
||||
* target likewise sets up NO argument registers before `jal func_80156648`
|
||||
* ($a0/$a1 still carry this function's own incoming args), so the call is
|
||||
* argument-less here too.
|
||||
*
|
||||
* The `lhu %lo(D_80188E58)($at)` with `sll $s0,$s0,1` => a plain u16 array
|
||||
* indexed by the second parameter, NOT hoisted into a pointer (§20: a pointer
|
||||
* var would keep one address register live across the call; the target rebuilds
|
||||
* the %hi/%lo pair inline after the call returns).
|
||||
*
|
||||
* §73 PARAMS axis / §42 lever 6 — the fleet canon for this symbol is
|
||||
* `extern void func_80157D20(void);` (this TU's carried decl layer, L399, and
|
||||
* every sibling overlay's). A 2-param definition hard-errors with
|
||||
* `conflicting types` in the real TU (rtu_match, byte-verified), and the canon
|
||||
* cannot be widened from a draft (that is an R22 fleet edit). So keep the
|
||||
* `(void)` signature and capture $a0/$a1 with register pins copied into NORMAL
|
||||
* pseudos — the copies are live across `jal func_80156648`, so they get the
|
||||
* callee-saved homes the target uses ($s1 = a0, $s0 = a1). A direct
|
||||
* `register` use would leave the values in call-clobbered $a0/$a1.
|
||||
*/
|
||||
|
||||
extern void func_80156648(s32 *a0);
|
||||
extern void func_80147078(s32 *a0, s16 a1);
|
||||
extern void func_80157D74(u16 *a0);
|
||||
extern u16 D_80188E58[];
|
||||
|
||||
void func_80157D20(void)
|
||||
{
|
||||
register void *a0v __asm__("$4");
|
||||
register s32 a1v __asm__("$5");
|
||||
void *param_1 = a0v;
|
||||
s32 param_2 = a1v;
|
||||
|
||||
((void (*)(void))func_80156648)();
|
||||
((void (*)(void *, s32))func_80147078)(param_1, D_80188E58[param_2]);
|
||||
((void (*)(void *))func_80157D74)(param_1);
|
||||
}
|
||||
|
||||
|
||||
DEFINE_func_80157D74() /* dedup: shared engine-core @0x80157D74 (src/shared) */
|
||||
|
||||
|
||||
@@ -4522,7 +4522,22 @@ void func_80171854(void *a0) {
|
||||
|
||||
DEFINE_func_80171884() /* dedup: shared engine-core @0x80171884 (src/shared) */
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077_jr_8016AB6C", func_801718AC);
|
||||
#include "common.h"
|
||||
|
||||
extern s32 D_80126B58;
|
||||
extern s32 D_80126D50;
|
||||
extern s32 D_80126D54;
|
||||
extern u8 D_80126D6C;
|
||||
|
||||
extern void func_80171A1C(u8 *a0);
|
||||
|
||||
void func_801718AC(void *arg0) {
|
||||
D_80126D54 = (s32)arg0;
|
||||
D_80126D6C = 0;
|
||||
D_80126D50 = *(s32 *)arg0 | (D_80126D50 & 0x7F000000);
|
||||
func_80171A1C((u8 *)&D_80126B58);
|
||||
}
|
||||
|
||||
|
||||
DEFINE_func_80171904() /* dedup: shared engine-core @0x80171904 (src/shared) */
|
||||
|
||||
|
||||
@@ -3340,7 +3340,28 @@ void func_8017BEF8(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084_jr_8017AE2C", func_8017BF34);
|
||||
#include "common.h"
|
||||
|
||||
/* func_8017BF34 — tiny entity tick (20 ins).
|
||||
* +0x30 s32 suppress flag (lw / bnez)
|
||||
* +0x2E u16 sound id passed to func_80147324 (lhu)
|
||||
* +0x02 u16 state word, bumped unconditionally (lhu / addiu / sh)
|
||||
*
|
||||
* §71 sibling-first: same TU's func_8017BFE0 has the identical
|
||||
* `if (f30 == 0) func_80147324(fXX);` + `f02 += 1` pair.
|
||||
* §3-T4: target is `bnez $v0, .L` => source condition is `== 0`.
|
||||
*/
|
||||
|
||||
extern void func_80147324(s32 arg0);
|
||||
|
||||
void func_8017BF34(void *a0)
|
||||
{
|
||||
if (*(s32 *)((s32)a0 + 0x30) == 0) {
|
||||
func_80147324(*(u16 *)((s32)a0 + 0x2E));
|
||||
}
|
||||
*(u16 *)((s32)a0 + 0x2) = *(u16 *)((s32)a0 + 0x2) + 1;
|
||||
}
|
||||
|
||||
|
||||
// @class: plumbing
|
||||
// @stuck: none — signed s32 counter at 0x1C, delay-slot store is the unconditional bump
|
||||
@@ -3409,7 +3430,31 @@ void func_8017BFE0(Ent_8017BFE0 *param_1)
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084_jr_8017AE2C", func_8017C064);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084_jr_8017AE2C", func_8017C1CC);
|
||||
#include "common.h"
|
||||
|
||||
/* func_8017C1CC — countdown tick on the u16 at 0x12.
|
||||
* Subtract 0x100; while the (signed) result is still positive keep running the
|
||||
* per-frame handler at 8017C218, otherwise hand off to the engine-core
|
||||
* despawn/next-state routine at 80146C3C.
|
||||
* 0x12 u16 countdown / angle-ish field (lhu / sh), tested SIGNED as s16
|
||||
*/
|
||||
|
||||
extern void func_8017C218(int);
|
||||
extern void func_80146C3C(void);
|
||||
|
||||
void func_8017C1CC(int param_1)
|
||||
{
|
||||
unsigned short uVar1;
|
||||
|
||||
uVar1 = *(unsigned short *)(param_1 + 0x12) - 0x100;
|
||||
*(unsigned short *)(param_1 + 0x12) = uVar1;
|
||||
if ((short)uVar1 > 0) {
|
||||
func_8017C218(param_1);
|
||||
} else {
|
||||
((void (*)(int))func_80146C3C)(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084_jr_8017AE2C", func_8017C218);
|
||||
|
||||
@@ -3421,7 +3466,25 @@ void func_8017C524(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084_jr_8017AE2C", func_8017C560);
|
||||
#include "common.h"
|
||||
|
||||
/* func_8017C560 — the minimal state-advance tick: play the sound id held at
|
||||
* +0x2E, then bump the state word at +0x02.
|
||||
*
|
||||
* §71 sibling-first: same entity record as func_8017C610 / func_8017C69C /
|
||||
* func_8017C5A0 in this TU — u16 sound id passed to func_80147324 (lhu, no
|
||||
* extend), u16 state word at +0x02 read with lhu and stored with sh. The
|
||||
* pointer survives the jal in $s0, which is just the natural allocation for a
|
||||
* parameter live across a call. */
|
||||
|
||||
extern void func_80147324(s32 arg0);
|
||||
|
||||
void func_8017C560(void *a0)
|
||||
{
|
||||
func_80147324(*(u16 *)((s32)a0 + 0x2E));
|
||||
*(u16 *)((s32)a0 + 0x2) = *(u16 *)((s32)a0 + 0x2) + 1;
|
||||
}
|
||||
|
||||
|
||||
#include "common.h"
|
||||
|
||||
@@ -3532,7 +3595,36 @@ void func_8017C69C(void *a0)
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084_jr_8017AE2C", func_8017C770);
|
||||
#include "common.h"
|
||||
|
||||
/* func_8017C770 — entity tick: decay the u16 timer @0x12 by 0x100, read the
|
||||
* sub-object pointer @0x34 up-front, then either advance (func_8017C218) while
|
||||
* the timer is still positive, or reset the three scale halfwords @0x60/0x62/0x64
|
||||
* to 0x1000 and run the teardown helper.
|
||||
* §71 sibling-first: same shape as func_8017C610 / func_8017C69C in this TU.
|
||||
* §3-T4: target is `sll $v0,16 ; blez -> else` => `if (v > 0) { advance }`. */
|
||||
|
||||
extern void func_8017C218(int);
|
||||
extern void func_80146C3C(void);
|
||||
|
||||
void func_8017C770(void *a0)
|
||||
{
|
||||
void *obj;
|
||||
s16 v;
|
||||
|
||||
v = *(u16 *)((s32)a0 + 0x12) - 0x100;
|
||||
obj = *(void **)((s32)a0 + 0x34);
|
||||
*(s16 *)((s32)a0 + 0x12) = v;
|
||||
if (v > 0) {
|
||||
((void (*)(void *))func_8017C218)(a0);
|
||||
} else {
|
||||
*(s16 *)((s32)obj + 0x64) = 0x1000;
|
||||
*(s16 *)((s32)obj + 0x62) = 0x1000;
|
||||
*(s16 *)((s32)obj + 0x60) = 0x1000;
|
||||
func_80146C3C();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern void (*D_8018A28C[])(void);
|
||||
@@ -3610,7 +3702,42 @@ void func_8017C800(void *a0)
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084_jr_8017AE2C", func_8017C8B4);
|
||||
#include "common.h"
|
||||
|
||||
/* func_8017C8B4 — frame-counter tick with a 10-frame window: read the counter at
|
||||
* +0x1C, store counter+1, and branch on the OLD value. While t < 10 it pokes the
|
||||
* engine-global helper func_800D22E4 (NO argument — the target leaves the jal delay
|
||||
* slot as a `nop`, so this call takes zero args) and then runs the per-entity update
|
||||
* func_8017C910; once the window expires it hands the entity to the shared
|
||||
* engine-core teardown func_80146C3C.
|
||||
*
|
||||
* §71 sibling-first: identical shape to func_8017C69C / func_8017C610 in this TU —
|
||||
* `void *a0` entity pointer that survives every jal in $s0, counter at +0x1C read
|
||||
* into a local BEFORE the store of counter+1.
|
||||
* §3-T4: target is `slti $v0,$v0,0xA ; beqz $v0,else` => `if (t < 0xA) { then }`,
|
||||
* i.e. the `beqz` arm is the ELSE, not the then.
|
||||
* Cast-at-use-site (house convention) for the two engine-core callees, whose
|
||||
* carried decl layer in this TU prototypes them as `(s32 a0)` / `(void)`.
|
||||
*/
|
||||
|
||||
extern void func_800D22E4(s32 a0);
|
||||
extern void func_80146C3C(void);
|
||||
extern void func_8017C910(void *a0);
|
||||
|
||||
void func_8017C8B4(void *a0)
|
||||
{
|
||||
s32 t;
|
||||
|
||||
t = *(s32 *)((s32)a0 + 0x1C);
|
||||
*(s32 *)((s32)a0 + 0x1C) = t + 1;
|
||||
if (t < 0xA) {
|
||||
((void (*)(void))func_800D22E4)();
|
||||
func_8017C910(a0);
|
||||
} else {
|
||||
((void (*)(void *))func_80146C3C)(a0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084_jr_8017AE2C", func_8017C910);
|
||||
|
||||
|
||||
@@ -3151,7 +3151,21 @@ void func_80182154(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_jr_8017FCB0", func_80182190);
|
||||
#include "common.h"
|
||||
|
||||
extern void func_8016EDEC(s32 a0, s32 a1, s32 a2);
|
||||
extern void func_800167B8(s32 a0);
|
||||
extern void func_801824E0(void *a0);
|
||||
extern s32 D_801E8770;
|
||||
|
||||
s32 func_80182190(s32 param_1) {
|
||||
D_801E8770 = 0;
|
||||
((void (*)(void *, s32))func_8016EDEC)((void *)func_801824E0, 0x1000000);
|
||||
func_800167B8(0);
|
||||
*(u8 *)(param_1 + 0x15) = *(u8 *)(param_1 + 0x15) + 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_jr_8017FCB0", func_801821E8);
|
||||
|
||||
@@ -3367,7 +3381,42 @@ INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_jr_8017FCB0", func_801839C
|
||||
DEFINE_func_80183A78() /* dedup: shared engine-core @0x80183A78 (src/shared) */
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_jr_8017FCB0", func_80183A80);
|
||||
#include "common.h"
|
||||
|
||||
extern s16 D_8018EDD0[];
|
||||
extern u8 D_801A7CB0;
|
||||
extern s32 func_8013767C(s32 a0);
|
||||
extern void func_80147324(s32 a0);
|
||||
|
||||
void func_80183A80(s32 a0) {
|
||||
s16 v;
|
||||
s16 d;
|
||||
|
||||
v = D_8018EDD0[*(u8 *)(a0 + 0x20C)];
|
||||
if (v != 0) {
|
||||
d = v - *(u16 *)(a0 + 0xE);
|
||||
v = d;
|
||||
if (d < 0) {
|
||||
v = -d;
|
||||
}
|
||||
if (v < 0x180) {
|
||||
*(s32 *)(a0 + 0x198) = func_8013767C((s32)&D_801A7CB0);
|
||||
switch (*(u8 *)(a0 + 0x20C)) {
|
||||
case 0:
|
||||
func_80147324(0x5A1);
|
||||
break;
|
||||
case 1:
|
||||
func_80147324(0x5F1);
|
||||
break;
|
||||
case 2:
|
||||
func_80147324(0x5F2);
|
||||
break;
|
||||
}
|
||||
*(u8 *)(a0 + 0x20C) += 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_jr_8017FCB0", func_80183B64);
|
||||
|
||||
@@ -3562,9 +3611,50 @@ INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_jr_8017FCB0", func_80186E6
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_jr_8017FCB0", func_80186F44);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_jr_8017FCB0", func_80186FDC);
|
||||
#include "common.h"
|
||||
|
||||
extern void func_8012CBCC(s32 a0);
|
||||
extern s32 func_80143B6C(s32 a0, s32 a1);
|
||||
|
||||
s32 func_80186FDC(s32 param_1) {
|
||||
s32 p;
|
||||
|
||||
p = *(s32 *)(param_1 + 0x20);
|
||||
*(s16 *)(p + 0x12) = *(u16 *)(p + 0x12) + 0x100;
|
||||
if (((s32 (*)(void))func_8012CBCC)() != 0) {
|
||||
*(s32 *)(param_1 + 0x18) = 0xFFE80000;
|
||||
*(s32 *)(param_1 + 0x14) = 0xFFC80000;
|
||||
*(s32 *)(param_1 + 0x44) = 0;
|
||||
*(s32 *)(param_1 + 0x48) = 0x80000;
|
||||
*(s32 *)(param_1 + 0x4C) = 0;
|
||||
func_80143B6C(param_1, 0);
|
||||
*(s16 *)(param_1 + 0xFC) = 0x40;
|
||||
*(s16 *)(param_1 + 0x2) = *(u16 *)(param_1 + 0x2) + 1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#include "common.h"
|
||||
|
||||
extern void func_8012AD80(s32 a0);
|
||||
extern void func_8012C218(void *a0);
|
||||
|
||||
void func_80187060(int param_1) {
|
||||
short v;
|
||||
|
||||
*(short *)(*(int *)(param_1 + 0x20) + 0x12) =
|
||||
*(short *)(*(int *)(param_1 + 0x20) + 0x12) + 0x100;
|
||||
*(short *)(*(int *)(param_1 + 0x20) + 0x14) =
|
||||
*(short *)(*(int *)(param_1 + 0x20) + 0x14) + 0x20;
|
||||
v = *(unsigned short *)(param_1 + 0xFC) - 1;
|
||||
*(short *)(param_1 + 0xFC) = v;
|
||||
if (v == 0) {
|
||||
((void (*)(void))func_8012C218)();
|
||||
} else {
|
||||
((void (*)(void))func_8012AD80)();
|
||||
}
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_jr_8017FCB0", func_80187060);
|
||||
|
||||
|
||||
extern void (*D_8018F3D4[])(void);
|
||||
@@ -4081,7 +4171,68 @@ INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_jr_8017FCB0", func_8018A3F
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_jr_8017FCB0", func_8018A440);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_jr_8017FCB0", func_8018A550);
|
||||
#include "common.h"
|
||||
|
||||
extern void func_8001D074(s32 a0, s32 a1);
|
||||
extern void func_8001CD04(s32 a0, s32 a1);
|
||||
|
||||
typedef struct Obj_8018A550 {
|
||||
s32 f0; /* 0x00 */
|
||||
u32 f4; /* 0x04 */
|
||||
s32 f8; /* 0x08 */
|
||||
s32 fC; /* 0x0C */
|
||||
s32 f10; /* 0x10 */
|
||||
s32 f14; /* 0x14 */
|
||||
s16 f18; /* 0x18 */
|
||||
s16 f1A; /* 0x1A */
|
||||
s16 f1C; /* 0x1C */
|
||||
s16 f1E; /* 0x1E */
|
||||
} Obj_8018A550;
|
||||
|
||||
typedef struct Rec_8018A550 {
|
||||
u16 f0; /* 0x00 */
|
||||
u16 f2; /* 0x02 */
|
||||
s16 f4; /* 0x04 */
|
||||
s16 f6; /* 0x06 */
|
||||
s32 f8; /* 0x08 */
|
||||
s32 fC; /* 0x0C */
|
||||
} Rec_8018A550;
|
||||
|
||||
typedef struct Ctl_8018A550 {
|
||||
s32 f0; /* 0x00 */
|
||||
s16 ids[8]; /* 0x04 */
|
||||
Obj_8018A550 *slots[8]; /* 0x14 */
|
||||
} Ctl_8018A550;
|
||||
|
||||
void func_8018A550(Ctl_8018A550 *ctl, Rec_8018A550 *rec)
|
||||
{
|
||||
s32 i;
|
||||
Obj_8018A550 *m;
|
||||
s16 v;
|
||||
u16 t;
|
||||
|
||||
do {
|
||||
for (i = 0; i < 8; i++) {
|
||||
if (ctl->slots[i] == 0) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
m = (Obj_8018A550 *)((s32 (*)(s32, s32))func_8001D074)(0x7E, 0x100);
|
||||
if (m != 0) {
|
||||
((void (*)(Obj_8018A550 *, s32))func_8001CD04)(m, rec->fC);
|
||||
m->f4 |= 0xF0000000;
|
||||
v = rec->f6;
|
||||
m->f1C = v;
|
||||
m->f1A = v;
|
||||
m->f18 = v;
|
||||
ctl->slots[i] = m;
|
||||
ctl->ids[i] = rec->f4;
|
||||
}
|
||||
t = rec->f0;
|
||||
rec++;
|
||||
} while (t != 0xFF);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -4892,7 +4892,24 @@ INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_8017AE2C", func_8018A30
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_8017AE2C", func_8018A3B4);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_8017AE2C", func_8018A47C);
|
||||
#include "common.h"
|
||||
|
||||
/* 8-byte, alignment-1 blob: the target copies it with lwl/lwr + swl/swr,
|
||||
* which is gcc's emit_block_move for align < 4. */
|
||||
typedef struct {
|
||||
char b[8];
|
||||
} Blob8_8018A47C;
|
||||
|
||||
extern Blob8_8018A47C D_801E2F28;
|
||||
extern void func_8018A6A0(s32 a0, Blob8_8018A47C *a1);
|
||||
|
||||
void func_8018A47C(s32 a0) {
|
||||
Blob8_8018A47C tmp;
|
||||
|
||||
tmp = D_801E2F28;
|
||||
func_8018A6A0(a0, &tmp);
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_8017AE2C", func_8018A4C4);
|
||||
|
||||
@@ -5117,7 +5134,49 @@ void func_8018C274(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_8017AE2C", func_8018C2B0);
|
||||
#include "common.h"
|
||||
|
||||
// @stuck: none — MATCH (42 ins), iteration 1, rtu_match clean.
|
||||
// Saturating add of a 3-byte RGB triple by a signed delta.
|
||||
// Idioms: (1) `s8` by-value param => entry `sll/sra 24` for the sign test only;
|
||||
// combine folds the extension back out of `~a1`/`-a1`/`a0[i]+a1` because every
|
||||
// consumer is 8-bit (andi 0xFF / sb), so $a1 is used RAW after the test.
|
||||
// (2) branch sense read off the target `sltu` operand ORDER (§3-T4): positive arm
|
||||
// `sltu lim,p[i]` => store when `p[i] <= lim`; negative arm `sltu p[i],lim`
|
||||
// => store when `p[i] >= lim`.
|
||||
// (3) the third `if` written out in BOTH arms; jump.c cross-jumps the identical
|
||||
// tails into the shared `j .L8018C344` (§5a) — do not hoist it after the if/else.
|
||||
void func_8018C2B0(u8 *a0, s8 a1) {
|
||||
u8 lim;
|
||||
|
||||
if (a1 == 0) {
|
||||
return;
|
||||
}
|
||||
if (a1 > 0) {
|
||||
lim = ~a1;
|
||||
if (a0[0] <= lim) {
|
||||
a0[0] = a0[0] + a1;
|
||||
}
|
||||
if (a0[1] <= lim) {
|
||||
a0[1] = a0[1] + a1;
|
||||
}
|
||||
if (a0[2] <= lim) {
|
||||
a0[2] = a0[2] + a1;
|
||||
}
|
||||
} else {
|
||||
lim = -a1;
|
||||
if (a0[0] >= lim) {
|
||||
a0[0] = a0[0] + a1;
|
||||
}
|
||||
if (a0[1] >= lim) {
|
||||
a0[1] = a0[1] + a1;
|
||||
}
|
||||
if (a0[2] >= lim) {
|
||||
a0[2] = a0[2] + a1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern void (*D_80196B98[])(void);
|
||||
@@ -5364,7 +5423,27 @@ void func_8018ECB8(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_8017AE2C", func_8018ECF4);
|
||||
#include "common.h"
|
||||
|
||||
extern s32 func_8001CC3C(s32 a0, s32 a1, s32 a2, s32 a3);
|
||||
extern u8 D_800D387C[];
|
||||
|
||||
void func_8018ECF4(s32 arg0) {
|
||||
s32 iVar1;
|
||||
|
||||
iVar1 = *(s32 *)(arg0 + 0x20);
|
||||
((void (*)(s32, s32, s32, s32))func_8001CC3C)(iVar1, (s32)&D_800D387C, 0x270, 0x120);
|
||||
*(u8 *)(iVar1 + 0x27) = 0x9C;
|
||||
*(u16 *)(iVar1 + 0x1A) = 0x7000;
|
||||
*(u16 *)(iVar1 + 0x18) = 0x7000;
|
||||
*(u8 *)(iVar1 + 0x26) = 0x90;
|
||||
*(u8 *)(iVar1 + 0x25) = 0x90;
|
||||
*(u8 *)(iVar1 + 0x24) = 0x90;
|
||||
*(u32 *)(iVar1 + 4) = *(u32 *)(iVar1 + 4) | 0x50000000;
|
||||
*(s16 *)(arg0 + 0x2C) = 0x46;
|
||||
*(s16 *)(arg0 + 0x2) += 1;
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_8017AE2C", func_8018ED84);
|
||||
|
||||
@@ -5643,7 +5722,27 @@ extern void func_80146C3C(void);
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_8017AE2C", func_80190384);
|
||||
#include "common.h"
|
||||
|
||||
extern void func_80017254(void *a0);
|
||||
extern void func_800176F0(void *a0);
|
||||
extern u8 D_80196DAC[];
|
||||
extern u8 D_80196DD4[];
|
||||
|
||||
void func_80190384(void) {
|
||||
u8 *p;
|
||||
s32 i;
|
||||
|
||||
func_80017254(D_80196DAC);
|
||||
i = 0;
|
||||
p = D_80196DD4;
|
||||
do {
|
||||
func_800176F0(p);
|
||||
i++;
|
||||
p += 0x34;
|
||||
} while (i < 4);
|
||||
}
|
||||
|
||||
|
||||
extern s32 func_80146994(s32 a0, s32 a1, s32 a2, s32 a3);
|
||||
void func_801903DC(void *arg0) {
|
||||
@@ -5651,7 +5750,20 @@ extern s32 func_80146994(s32 a0, s32 a1, s32 a2, s32 a3);
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_8017AE2C", func_80190408);
|
||||
#include "common.h"
|
||||
|
||||
extern s32 D_80126B58;
|
||||
extern s32 func_8014C050(s32 a0, s32 a1);
|
||||
|
||||
void func_80190408(void) {
|
||||
s32 t;
|
||||
|
||||
t = func_8014C050((s32)&D_80126B58, 0x28);
|
||||
if (t != 0) {
|
||||
*(u16 *)(t + 2) += 1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern void (*D_80196F00[])(void);
|
||||
|
||||
@@ -4029,7 +4029,50 @@ INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8017AE2C", func_80181EF
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8017AE2C", func_80181F6C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8017AE2C", func_80181FA0);
|
||||
#include "common.h"
|
||||
|
||||
// func_80181FA0 — MATCH (60 ins), match_one + rtu_match. Two levers:
|
||||
// 1) §20 pointer-var-to-the-global: `u16 *p = &D_800B99DA;` and read `*p`
|
||||
// twice. The bare global would fold %lo into each access independently
|
||||
// (two lui/lhu pairs, no $s1); the pointer var force_regs the address so
|
||||
// CSE hoists it into the callee-saved $s1 across both calls.
|
||||
// 2) SEPARATE temps `t` and `u` for the two call results (NOT one reused
|
||||
// `t`). gcc-2.7.2 expand_divmod emits `move temp,op0; bgez temp; temp+=d-1`
|
||||
// for a signed /2^k; cse.c make_regs_eqv only makes `temp` the canonical
|
||||
// reg of the quantity when temp's REGNO_LAST_UID outlives op0's. Reusing
|
||||
// one `t` across both calls stretches op0's last-use past temp's, so op0
|
||||
// stays canonical and cse rewrites the pair to `bgez $v0` + `addiu
|
||||
// $v1,$v0,3` — the copy then fills the delay slot and the function comes
|
||||
// out 1 instruction short. Split temps ⇒ op0 dies immediately ⇒ target's
|
||||
// `addu $v1,$v0,$zero; bgez $v1; nop; addiu $v1,$v1,3`.
|
||||
// (The 2nd division still coalesces temp/u into $v0, matching `bgez $v0`.)
|
||||
|
||||
extern u16 D_800B99DA;
|
||||
extern s32 func_80012F74(s32 a0, s32 a1, s32 a2, s32 a3);
|
||||
extern s32 func_80047948(s32 a0);
|
||||
extern s32 func_8004787C(s32 a0);
|
||||
|
||||
void func_80181FA0(s32 param_1) {
|
||||
u16 *p = &D_800B99DA;
|
||||
s32 t;
|
||||
s32 u;
|
||||
|
||||
*(s16 *)(param_1 + 0x20E) = func_80012F74(*(s16 *)(param_1 + 0x20E), 0, 10, 1);
|
||||
*(s16 *)(param_1 + 0x12E) = 1;
|
||||
t = func_8004787C((*p & 0x3F) << 6);
|
||||
*(s16 *)(param_1 + 0x128) = *(s16 *)(param_1 + 0x20E) + t / 4;
|
||||
u = func_80047948((*p & 0x3F) << 6);
|
||||
*(s16 *)(param_1 + 0x12C) = u / 8;
|
||||
if (*(s16 *)(param_1 + 0x13A) != 0) {
|
||||
*(s16 *)(param_1 + 0x13A) += *(s8 *)(param_1 + 0x20D);
|
||||
*(s16 *)(param_1 + 0x20C) -= 0xE0;
|
||||
if (*(s16 *)(param_1 + 0x13A) < 0) {
|
||||
*(s16 *)(param_1 + 0x13A) = 0;
|
||||
*(s16 *)(param_1 + 0x20C) = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
extern void func_8016EE40(s32 a0, s32 a1, s32 a2);
|
||||
extern M2C_UNK D_80194FF4;
|
||||
@@ -5147,7 +5190,35 @@ extern void func_8012C098(void);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8017AE2C", func_8018BAD8);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8017AE2C", func_8018BB44);
|
||||
#include "common.h"
|
||||
|
||||
/* func_8018BB44 — light/colour ramp-up on the entity's attached prim block.
|
||||
*
|
||||
* If the s16 flag at 0xFE is set, bump the three u16 colour words at
|
||||
* 0x18/0x1A/0x1C of the block pointed to by the word at 0x20 by 0x40 each,
|
||||
* then clamp all three to 0x1800 once the first one reaches it.
|
||||
*
|
||||
* Widths pinned off the target: `lh` at 0xFE and at 0x18 (the signed compare),
|
||||
* `lhu` for the three read-modify-writes, `sh` for every store. The pointer at
|
||||
* 0x20 is re-loaded before each RMW (the `sh` stores may alias it), which is
|
||||
* exactly what writing the deref inline gives.
|
||||
*/
|
||||
void func_8018BB44(int param_1) {
|
||||
int v1;
|
||||
|
||||
if (*(short *)(param_1 + 0xfe) != 0) {
|
||||
*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x18) += 0x40;
|
||||
*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x1a) += 0x40;
|
||||
*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x1c) += 0x40;
|
||||
v1 = *(int *)(param_1 + 0x20);
|
||||
if (*(short *)(v1 + 0x18) >= 0x1800) {
|
||||
*(short *)(v1 + 0x1c) = 0x1800;
|
||||
*(short *)(v1 + 0x1a) = 0x1800;
|
||||
*(short *)(v1 + 0x18) = 0x1800;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8017AE2C", func_8018BBCC);
|
||||
|
||||
@@ -6185,7 +6256,32 @@ INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8017AE2C", func_8019074
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8017AE2C", func_801909D8);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8017AE2C", func_80190B6C);
|
||||
#include "common.h"
|
||||
|
||||
/* func_80190B6C — "is another entity of type 0x35C sharing my 0x64 owner?"
|
||||
*
|
||||
* Walks the 0x60-entry entity table at D_801202A0 (stride 0x10C) with an int
|
||||
* counter (the target keeps the count in $a2 and `slti ...,0x60`, so it is a
|
||||
* counted loop, NOT the D_80126720 pointer-bound idiom the sibling walkers
|
||||
* use). Returns 1 for the first entry whose u16 kind == 0x35C, whose word at
|
||||
* 0x64 equals the caller's word at 0x64, and which is not the caller itself.
|
||||
*/
|
||||
s32 func_80190B6C(s32 arg0) {
|
||||
extern u8 D_801202A0[];
|
||||
u8 *p;
|
||||
s32 i;
|
||||
|
||||
p = D_801202A0;
|
||||
for (i = 0; i < 0x60; i++) {
|
||||
if (*(u16 *)p == 0x35C && *(s32 *)(arg0 + 0x64) == *(s32 *)(p + 0x64) &&
|
||||
arg0 != (s32)p) {
|
||||
return 1;
|
||||
}
|
||||
p += 0x10C;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
#include "common.h"
|
||||
|
||||
@@ -6208,9 +6304,53 @@ void func_80190BC4(s32 arg0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8017AE2C", func_80190C40);
|
||||
#include "common.h"
|
||||
|
||||
/* func_80190C40 — guard-then-free tail (cookbook §71 sibling shape:
|
||||
* src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c func_80144458 tail, and
|
||||
* src/ov_SC03_099/ov_SC03_099_jr_80140608.c:2432 func_80016714(x, 0x38)). */
|
||||
|
||||
extern void func_80016714(void *a0, s32 a1);
|
||||
extern void func_8012C218(void *a0);
|
||||
|
||||
void func_80190C40(void *arg0) {
|
||||
void *temp_a0;
|
||||
|
||||
temp_a0 = *(void **)((char *)arg0 + 0xCC);
|
||||
if (temp_a0 != NULL) {
|
||||
func_80016714(temp_a0, 0x38);
|
||||
}
|
||||
func_8012C218(arg0);
|
||||
}
|
||||
|
||||
|
||||
#include "common.h"
|
||||
|
||||
/* Sibling shape: DEFINE_func_80143BDC() in src/shared/engine_core.h (cookbook §71) */
|
||||
|
||||
extern s32 func_8012C51C(void *a0, s32 a1);
|
||||
|
||||
struct S80190C84 {
|
||||
s16 f0, f2, f4, f6, f8, fA, fC, fE;
|
||||
s32 f10;
|
||||
};
|
||||
|
||||
void func_80190C84(s32 a0, u16 *a1, s16 a2) {
|
||||
struct S80190C84 sp;
|
||||
u16 t;
|
||||
sp.f0 = a1[0];
|
||||
sp.f2 = a1[1];
|
||||
t = a1[2];
|
||||
sp.f6 = 0x35C;
|
||||
sp.fA = 0;
|
||||
sp.f8 = 0;
|
||||
sp.fE = a2;
|
||||
sp.f10 = 0;
|
||||
sp.fC = 0x7FFF;
|
||||
sp.f4 = t;
|
||||
func_8012C51C(&sp, a0);
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8017AE2C", func_80190C84);
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -3403,7 +3403,18 @@ s32 func_8017FAF8(void) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_8017FB00);
|
||||
#include "common.h"
|
||||
|
||||
extern void (*D_8018E234[])(void);
|
||||
extern void func_8017FCFC(void *a0);
|
||||
|
||||
void func_8017FB00(void *a0) {
|
||||
D_8018E234[*(u16 *)((s32)a0 + 0x2)]();
|
||||
if (*(u16 *)a0 != 0) {
|
||||
func_8017FCFC(a0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_8017FB60);
|
||||
|
||||
@@ -3930,7 +3941,58 @@ extern void func_8012A828(s32, void*);
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_80184C58);
|
||||
#include "common.h"
|
||||
|
||||
extern s32 func_8012BCCC(s32 a0);
|
||||
extern void func_8001C924(s32 a0, void *a1);
|
||||
extern void func_8012A828(s32 a0, void *a1);
|
||||
extern s32 func_8012B8E4(s32 a0, s32 a1);
|
||||
extern s32 func_8012BEE8(s32 a0);
|
||||
extern u8 D_801D29A8;
|
||||
extern u8 D_801D5AD4[];
|
||||
|
||||
// @class: straight-derive
|
||||
// @stuck: none — MATCH (52 ins) on iteration 1, confirmed by rtu_match.
|
||||
//
|
||||
// Two things that could have been mis-read off the target asm:
|
||||
//
|
||||
// 1. RELOAD_CSE DELETES A REDUNDANT ARG MOVE — do not read "no arg setup" as
|
||||
// "zero-arg call". `jal func_8012BCCC` at 0x80184C7C has a bare `nop` delay
|
||||
// slot and NO `addu $a0,$s0,$zero` before it, which looks like `f()`. It is
|
||||
// `f(a0)`: the incoming param is still live in $a0 in that fall-through
|
||||
// block, so gcc-2.7.2's reload_cse_regs (reload1.c) deletes the redundant
|
||||
// `move $a0,$s0`. The SAME move survives at .L80184CD0 (0x80184CD0) because
|
||||
// reload_cse's value tracking resets at a CODE_LABEL. So: an arg move that
|
||||
// is present on the labelled arm and absent on the fall-through arm is ONE
|
||||
// source-level call shape, not two.
|
||||
//
|
||||
// 2. `lui $v1,1 / slt $v1,$v1,$v0` is `ret <= 0x10000`, not `ret < 0x10001`.
|
||||
// gcc lowers `a <= C` to `!(C < a)` and puts the CONSTANT in the first slt
|
||||
// operand; writing `< 0x10001` would have materialised 0x10001 instead.
|
||||
//
|
||||
// Statement order in the then-arm is the Ghidra order (0x1C store, then the
|
||||
// 0x34 increment): memrefs_conflict_p disambiguates `+0x1C`/4 from `+0x34`/2
|
||||
// off the same base, so sched2 legally hoists the `lhu 0x34` above the `sw`
|
||||
// to cover its load delay — which is exactly the target's interleave.
|
||||
void func_80184C58(s32 a0) {
|
||||
s32 v;
|
||||
|
||||
if (*(u16 *)(a0 + 0x34) == 0) {
|
||||
if (func_8012BCCC(a0) <= 0x10000) {
|
||||
func_8001C924(*(s32 *)(a0 + 0x20), (void *)&D_801D29A8);
|
||||
func_8012A828(a0, (void *)&(*(u8 *)D_801D5AD4));
|
||||
*(s32 *)(a0 + 0x1C) = 0x1E;
|
||||
*(u16 *)(a0 + 0x34) += 1;
|
||||
}
|
||||
} else {
|
||||
v = func_8012B8E4(a0, 0xA);
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += v;
|
||||
if (func_8012BEE8(a0) != 0 || v == 0) {
|
||||
*(s16 *)(a0 + 0x2) = 5;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_80184D28);
|
||||
|
||||
@@ -3952,7 +4014,48 @@ INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_8018501
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_80185064);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_8018518C);
|
||||
#include "common.h"
|
||||
|
||||
/* func_8018518C — entity state-kick #0xB.
|
||||
* Sets the state word at 0x02 to 0xB, hands the entity to the script runner
|
||||
* func_8012A828 with table D_801D5AD4, clears bit 3 of the flag word at 0xDC,
|
||||
* then picks the timer at 0x1C: a fixed 30 when bit 6 was set (also clearing
|
||||
* bit 6), otherwise rand() % 16 + 15. Finally, if func_8012BD3C(e,0x400,0x8000)
|
||||
* returns 0, bit 3 at 0xDC is set again.
|
||||
*
|
||||
* §71 sibling-first: func_80184D28 (same TU, same D_801D5AD4 script table) is
|
||||
* the same `sh 0x2 / jal func_8012A828 / jal rand / sw 0x1C` skeleton and pins
|
||||
* the widths: `sh` at 0x02, `sw` at 0x1C/0xDC, and the s16 store scheduled into
|
||||
* the jal delay slot.
|
||||
*/
|
||||
|
||||
extern void func_8012A828(s32 a0, void *a1);
|
||||
extern s32 func_8012BD3C(s32 a0, s32 a1, s32 a2);
|
||||
extern s32 rand(void);
|
||||
extern u8 D_801D5AD4[];
|
||||
|
||||
void func_8018518C(void *a0) {
|
||||
s32 flags;
|
||||
s32 cleared;
|
||||
s32 timer;
|
||||
|
||||
*(s16 *)((s32)a0 + 0x2) = 0xB;
|
||||
func_8012A828((s32)a0, D_801D5AD4);
|
||||
flags = *(s32 *)((s32)a0 + 0xDC);
|
||||
cleared = flags & ~8;
|
||||
*(s32 *)((s32)a0 + 0xDC) = cleared;
|
||||
if (flags & 0x40) {
|
||||
*(s32 *)((s32)a0 + 0xDC) = cleared & ~0x40;
|
||||
timer = 30;
|
||||
} else {
|
||||
timer = rand() % 16 + 15;
|
||||
}
|
||||
*(s32 *)((s32)a0 + 0x1C) = timer;
|
||||
if (func_8012BD3C((s32)a0, 0x400, 0x8000) == 0) {
|
||||
*(s32 *)((s32)a0 + 0xDC) |= 8;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_80185244);
|
||||
|
||||
@@ -4058,7 +4161,53 @@ INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_8018576
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_801857C4);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_8018583C);
|
||||
#include "common.h"
|
||||
|
||||
// @class: plumbing
|
||||
// @stuck: none — MATCH (52 ins), iteration 1. Keys: (1) §3-T4 — Ghidra inverted the arms; the
|
||||
// target's `beqz $v0,.L8018589C` means the (flags&2)!=0 arm FALLS THROUGH, so write
|
||||
// `if (*(s32*)(p+0xDC) & 2) {A} else {B}`; (2) the 0x5C zero-store is unconditional (it sits in
|
||||
// the beqz delay slot), so it is the FIRST statement, above the if; (3) both `*(s32*)(p+0x20)`
|
||||
// reads in arm A are written as separate expressions — the intervening `sh` to 0x10 blocks CSE,
|
||||
// which is why the target reloads 0x20 twice; (4) the tail compare is `iVar1 <= 0x8FFF`, NOT
|
||||
// Ghidra's `< 0x9000`: 0x9000 does not fit the signed 16-bit `slti` immediate, so gcc
|
||||
// materialises the bound with `ori $v1,$zero,0x8FFF` and emits the operand-reversed
|
||||
// `slt $v1,$v1,$v0` + `bnez` over the 0x51F assignment (write the constant as 0x8FFF).
|
||||
extern void func_8012A828(s32 a0, void *a1);
|
||||
extern void func_8001C924(s32 a0, void *a1);
|
||||
extern s32 func_8012BCCC(s32 a0);
|
||||
extern void func_8002D4C8(s32 a0, s32 a1);
|
||||
|
||||
extern u8 D_801D609C;
|
||||
extern u8 D_801D4358;
|
||||
extern u8 D_801D5FBC;
|
||||
|
||||
void func_8018583C(s32 param_1) {
|
||||
s32 iVar1;
|
||||
s32 uVar2;
|
||||
|
||||
*(s16 *)(param_1 + 0x5C) = 0;
|
||||
if (*(s32 *)(param_1 + 0xDC) & 2) {
|
||||
*(s32 *)(param_1 + 0x1C) = 0x2D;
|
||||
func_8012A828(param_1, &D_801D609C);
|
||||
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x10) = 0;
|
||||
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12) =
|
||||
(*(u16 *)(param_1 + 0x62) + 0x800) & 0xFFF;
|
||||
*(s16 *)(param_1 + 0x52) = 0;
|
||||
} else {
|
||||
*(s32 *)(param_1 + 0x1C) = 0x37;
|
||||
func_8001C924(*(s32 *)(param_1 + 0x20), &D_801D4358);
|
||||
func_8012A828(param_1, &D_801D5FBC);
|
||||
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12) = *(u16 *)(param_1 + 0x62);
|
||||
}
|
||||
iVar1 = func_8012BCCC(param_1);
|
||||
uVar2 = 0x520;
|
||||
if (iVar1 <= 0x8FFF) {
|
||||
uVar2 = 0x51F;
|
||||
}
|
||||
func_8002D4C8(uVar2, 0);
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_8018590C);
|
||||
|
||||
|
||||
@@ -3575,7 +3575,38 @@ INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_80180BC
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_80180BFC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_80180C80);
|
||||
#include "common.h"
|
||||
|
||||
extern s32 func_8012BCCC(s32 a0);
|
||||
extern s32 func_8012B864(s32 a0);
|
||||
extern s32 func_8012B608(s32 a0, s32 a1, s32 a2);
|
||||
extern void func_8012B1B4(s32 a0, s32 a1);
|
||||
extern void func_8012CBCC(s32 a0);
|
||||
extern void func_8012E688(void*, s32, s32);
|
||||
extern u8 D_801AA150[];
|
||||
extern s16 D_80126CB6;
|
||||
|
||||
void func_80180C80(s32 a0) {
|
||||
s32 r;
|
||||
|
||||
if (func_8012BCCC(a0) > 0x63FFF) {
|
||||
*(u16 *)(a0 + 0x2) = 5;
|
||||
} else {
|
||||
r = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12),
|
||||
func_8012B864(a0), 0x10);
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + r;
|
||||
func_8012B1B4(a0, (s32)D_801AA150);
|
||||
*(s32 *)(a0 + 0x14) =
|
||||
*(s32 *)(a0 + 0x14) +
|
||||
((D_80126CB6 - *(s16 *)(a0 + 0xA)) << 8);
|
||||
if (((s32 (*)(s32))func_8012CBCC)(a0)) {
|
||||
*(s16 *)(a0 + 0x16) = -0x18;
|
||||
((void (*)(s32, s32, s32))func_8012E688)(a0, 0xBA2, 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#include "common.h"
|
||||
|
||||
@@ -3644,9 +3675,71 @@ void func_80180E94(s32 a0) {
|
||||
void func_80180F70(void) {
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_80180F78);
|
||||
#include "common.h"
|
||||
|
||||
/* func_80180F78 — per-frame entity tick:
|
||||
* - decrement the timer at 0x1C if non-zero
|
||||
* - fade the two u16 colour/alpha words at +0x18 / +0x1A of the display record
|
||||
* hanging off 0x20 by 0x100 each
|
||||
* - once the second one drops to <= 0x80, tear the entity down
|
||||
*
|
||||
* §71 sibling-first: DEFINE_func_801319E0() (engine_core.h L17451) is the same
|
||||
* `func_8002A04C(arg0); func_8012C218((void *)arg0);` teardown tail with arg0
|
||||
* living in $s0 across the calls — signature and casts copied from it.
|
||||
*/
|
||||
|
||||
extern void func_8002A04C(s32 a0);
|
||||
extern void func_8012C218(void *a0);
|
||||
|
||||
void func_80180F78(s32 arg0) {
|
||||
if (*(s32 *)(arg0 + 0x1C) != 0) {
|
||||
*(s32 *)(arg0 + 0x1C) -= 1;
|
||||
}
|
||||
*(u16 *)(*(s32 *)(arg0 + 0x20) + 0x18) -= 0x100;
|
||||
*(u16 *)(*(s32 *)(arg0 + 0x20) + 0x1A) -= 0x100;
|
||||
if (*(s16 *)(*(s32 *)(arg0 + 0x20) + 0x1A) < 0x81) {
|
||||
if (*(s16 *)(arg0 + 0x70) == 1) {
|
||||
/* LOAD-BEARING: hoisting the argument load into its own local
|
||||
* emits `lw $a0,0xCC($s0)` ABOVE the guard branch and leaves the
|
||||
* beqz delay slot a nop. Inlining it at the call site instead
|
||||
* gives beqz/nop/lw -> 3 mismatches (class DELAY-SLOT). A/B-tested. */
|
||||
void *temp = *(void **)(arg0 + 0xCC);
|
||||
if (arg0 != 0) {
|
||||
func_8012C218(temp);
|
||||
}
|
||||
}
|
||||
func_8002A04C(arg0);
|
||||
func_8012C218((void *)arg0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#include "common.h"
|
||||
|
||||
extern s32 func_8012C354(s32 a0, s32 a1);
|
||||
extern void func_8012A828(s32 a0, s32 a1);
|
||||
extern s32 func_8012C588(s32 a0, s32 a1);
|
||||
|
||||
extern u8 D_801AA218[];
|
||||
extern u8 D_80186448[];
|
||||
extern u16 D_801AA24C[];
|
||||
extern u16 D_801AA24E[];
|
||||
extern u16 D_801AA250[];
|
||||
extern s16 D_801AA252[];
|
||||
|
||||
void func_80181030(s32 a0) {
|
||||
if (func_8012C354(a0, (s32)D_801AA218) != 0) {
|
||||
func_8012A828(a0, (s32)D_80186448);
|
||||
*(s16 *)(a0 + 0x2) = 1;
|
||||
*(u8 *)(a0 + 0x75) = 0;
|
||||
*(u16 *)(a0 + 0x12) = D_801AA24C[*(s16 *)(a0 + 0xFC) * 4];
|
||||
*(u16 *)(a0 + 0x16) = D_801AA24E[*(s16 *)(a0 + 0xFC) * 4];
|
||||
*(u16 *)(a0 + 0x1A) = D_801AA250[*(s16 *)(a0 + 0xFC) * 4];
|
||||
*(s32 *)(a0 + 0x1C) = D_801AA252[*(s16 *)(a0 + 0xFC) * 4];
|
||||
func_8012C588(0x1C4, a0);
|
||||
}
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_80181030);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_801810F4);
|
||||
|
||||
@@ -3691,7 +3784,30 @@ void func_801811C4(s32 param_1)
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_801812A8);
|
||||
#include "common.h"
|
||||
|
||||
extern s32 rand(void);
|
||||
extern s32 func_8004787C(s32 a0);
|
||||
|
||||
void func_801812A8(s32 a0) {
|
||||
s32 t;
|
||||
|
||||
if (*(s32 *)(a0 + 0x1C) == 0) {
|
||||
*(s32 *)(*(s32 *)(a0 + 0x20) + 0x4) &= 0x7FFFFFFF;
|
||||
*(s16 *)(a0 + 0xFE) += 0x40;
|
||||
if (*(s16 *)(a0 + 0xFE) >= 0x800) {
|
||||
*(s16 *)(a0 + 0xFE) = 0;
|
||||
*(s32 *)(a0 + 0x1C) = rand() & 0x1F;
|
||||
*(s32 *)(*(s32 *)(a0 + 0x20) + 0x4) |= 0x80000000;
|
||||
}
|
||||
t = (*(s16 *)(a0 + 0x70) * func_8004787C(*(s16 *)(a0 + 0xFE))) >> 12;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x18) =
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = t + 0x800;
|
||||
} else {
|
||||
*(s32 *)(a0 + 0x1C) -= 1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#include "common.h"
|
||||
|
||||
@@ -3971,7 +4087,29 @@ void func_80185634(void *a0) {
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_801856E4);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_80185794);
|
||||
#include "common.h"
|
||||
|
||||
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
|
||||
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801CCC48,
|
||||
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
|
||||
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
|
||||
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
|
||||
|
||||
struct B16_80185794 { s32 w[4]; };
|
||||
|
||||
extern struct B16_80185794 D_800A5E88;
|
||||
extern struct B16_80185794 D_801CCC48;
|
||||
extern s32 D_800A5E90;
|
||||
extern s32 func_8004787C(s32 a0);
|
||||
extern void func_80028620(s32 a0, void *a1);
|
||||
|
||||
void func_80185794(void *a0) {
|
||||
D_800A5E88 = D_801CCC48;
|
||||
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
|
||||
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
|
||||
func_80028620(0, &D_800A5E88);
|
||||
}
|
||||
|
||||
|
||||
void func_80185844(void) {
|
||||
}
|
||||
|
||||
@@ -3183,7 +3183,21 @@ void func_8017D898(s32 arg0)
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_8017E778);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_8017E7B8);
|
||||
#include "common.h"
|
||||
|
||||
extern u8 D_8018F8F0[];
|
||||
extern u8 D_8018F990[];
|
||||
extern u8 *D_801274C8;
|
||||
extern void *D_801274CC;
|
||||
extern int func_8017FAB0(int param_1);
|
||||
|
||||
void func_8017E7B8(void)
|
||||
{
|
||||
D_801274C8 = D_8018F8F0;
|
||||
D_801274CC = D_8018F990;
|
||||
func_8017FAB0(1);
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_8017E7F8);
|
||||
|
||||
@@ -3496,7 +3510,33 @@ INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_801812C
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_80181328);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_8018152C);
|
||||
#include "common.h"
|
||||
|
||||
extern s32 func_8012B6D4(s16 *a0, s16 *a1);
|
||||
extern u8 D_80126B5C;
|
||||
extern s32 *D_80126B78;
|
||||
|
||||
// @class: branch-polarity
|
||||
// @stuck: none — MATCH (32 ins), iteration 2. §3-T4: gcc-2.7.2 lays this out as
|
||||
// "branch TO the then-arm, fall through to the else", so the source condition is
|
||||
// `d < 0x800` (the bnez sense read off the target opcode), NOT Ghidra's inverted
|
||||
// arm order. The wrong polarity also cost one instruction (match_one printed
|
||||
// LENGTH-DRIFT/-1): with the arms swapped, the `sll $v0,$s0,16` of the s16 param
|
||||
// lands in the branch delay slot and is SHARED by both arms; the correct polarity
|
||||
// puts `addiu $v1,$zero,0x1000` there and each arm gets its own sll/sra.
|
||||
// a1 is an ANSI s16 param (sign-extended at each use, once per arm) — not K&R §43.
|
||||
s32 func_8018152C(s32 a0, s16 a1) {
|
||||
s32 d;
|
||||
|
||||
d = (func_8012B6D4((s16 *)&D_80126B5C, (s16 *)(a0 + 4)) -
|
||||
*(s16 *)((s32)D_80126B78 + 0x12)) & 0xFFF;
|
||||
if (d < 0x800) {
|
||||
return d < a1;
|
||||
} else {
|
||||
return (0x1000 - d) < a1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern void (*D_8018F450[])(void);
|
||||
@@ -4230,9 +4270,68 @@ INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_80189EB
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_80189F28);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_80189FD8);
|
||||
#include "common.h"
|
||||
|
||||
extern u16 D_800AF7BC;
|
||||
extern u16 D_800AF7BE;
|
||||
extern u8 D_801DA8C8[];
|
||||
|
||||
extern s32 func_8012E778(int param_1, int param_2);
|
||||
extern s32 func_8012C51C(int a0, int a1);
|
||||
|
||||
void func_80189FD8(int param_1, int param_2)
|
||||
{
|
||||
s32 i;
|
||||
|
||||
i = 0;
|
||||
if (func_8012E778(param_1, ((s32)(D_800AF7BE >> 1) << 16) | (D_800AF7BC >> 1)) != 0) {
|
||||
do {
|
||||
if (D_801DA8C8[i] == 0) {
|
||||
D_801DA8C8[i] = 1;
|
||||
*(s32 *)(param_2 + 0x10) = i | 0x80000000;
|
||||
*(u16 *)(param_2 + 8) = *(u16 *)(param_1 + 0x70);
|
||||
func_8012C51C(param_2, param_1);
|
||||
return;
|
||||
}
|
||||
i++;
|
||||
} while (i < 5);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#include "common.h"
|
||||
|
||||
extern s32 func_8012C194(void);
|
||||
extern void func_8001CD50(s32 a0, s32 a1);
|
||||
extern void func_800233CC(void *, unsigned short);
|
||||
extern void func_8018A41C(s32 a0);
|
||||
extern u32 D_801DA788;
|
||||
|
||||
void func_8018A090(void *a0)
|
||||
{
|
||||
s32 iVar2;
|
||||
u32 *puVar3;
|
||||
|
||||
*(s16 *)((s32)a0 + 0xFC) = 0x7000;
|
||||
*(s16 *)((s32)a0 + 0x100) = 0;
|
||||
*(s16 *)((s32)a0 + 0xFE) = 0;
|
||||
*(s16 *)((s32)a0 + 0x104) = 0;
|
||||
*(s16 *)((s32)a0 + 0x106) = 0;
|
||||
puVar3 = (u32 *)((u8 *)&D_801DA788 + (*(s16 *)((s32)a0 + 0xDC) * 0x40));
|
||||
iVar2 = func_8012C194();
|
||||
*(s32 *)((s32)a0 + 0x20) = iVar2;
|
||||
if (iVar2 != 0) {
|
||||
func_8001CD50(iVar2, (s32)puVar3);
|
||||
*(s16 *)(iVar2 + 0x10) = 0x400;
|
||||
*(u32 *)(iVar2 + 4) = *(u32 *)(iVar2 + 4) | 0x60000000;
|
||||
func_800233CC(puVar3, 0x40);
|
||||
puVar3[0] = 0x808080;
|
||||
puVar3[1] = 0x808080;
|
||||
func_8018A41C((s32)a0);
|
||||
*(s16 *)((s32)a0 + 2) = 3;
|
||||
}
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_8018A090);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_8018A150);
|
||||
|
||||
|
||||
@@ -3254,7 +3254,32 @@ void func_8017D0F4(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035_jr_8017BEBC", func_8017D130);
|
||||
#include "common.h"
|
||||
|
||||
/* 8 bytes, align 2 -> lwl/lwr/swl/swr copy (cookbook §48-C2) */
|
||||
typedef struct {
|
||||
s16 v[4];
|
||||
} Blk8_80126940;
|
||||
|
||||
extern s32 D_80126B58;
|
||||
extern u16 func_80148800(s32 *a0);
|
||||
extern s16 D_80187F38[];
|
||||
extern Blk8_80126940 D_80126940;
|
||||
extern void func_8017D1D0(s32 param_1, s16 *param_2);
|
||||
|
||||
void func_8017D130(s32 a0) {
|
||||
Blk8_80126940 sp10;
|
||||
u8 t;
|
||||
|
||||
if (func_80148800(&D_80126B58) & 3) {
|
||||
t = (*(u8 *)(a0 + 5) + 1) & 1;
|
||||
*(u8 *)(a0 + 5) = t;
|
||||
*(s32 *)(a0 + 0x14) = D_80187F38[t];
|
||||
}
|
||||
sp10 = D_80126940;
|
||||
func_8017D1D0(a0, sp10.v);
|
||||
}
|
||||
|
||||
|
||||
|
||||
// @class: schedule
|
||||
@@ -3800,7 +3825,21 @@ extern void func_8012CBCC(s32 a0);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035_jr_8017BEBC", func_801831EC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035_jr_8017BEBC", func_80183258);
|
||||
#include "common.h"
|
||||
|
||||
extern void (*D_801B977C[])(void);
|
||||
extern void func_80183F2C(void *a0);
|
||||
|
||||
void func_80183258(void *a0) {
|
||||
D_801B977C[*(u16 *)((s32)a0 + 0x2)]();
|
||||
if (*(u16 *)((s32)a0 + 0x0) != 0) {
|
||||
*(s32 *)((s32)a0 + 0xE8) = *(s32 *)((s32)a0 + 0xE8) + 1;
|
||||
if ((*(s32 *)((s32)a0 + 0xE8) & 0xF) == 0) {
|
||||
func_80183F2C(a0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035_jr_8017BEBC", func_801832D4);
|
||||
|
||||
|
||||
@@ -3171,7 +3171,17 @@ void func_8017BEBC(s32 arg0)
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_jr_8017BEBC", func_8017CD9C);
|
||||
#include "common.h"
|
||||
|
||||
extern void func_80019064(void *a0);
|
||||
extern u8 D_801887F8;
|
||||
extern void (*D_80188850[])(void *);
|
||||
|
||||
void func_8017CD9C(void *a0) {
|
||||
func_80019064(&D_801887F8);
|
||||
D_80188850[*(u16 *)((s32)a0 + 0x2)](a0);
|
||||
}
|
||||
|
||||
|
||||
extern void func_8014E934(s32 a0);
|
||||
extern void func_8014CC28(s32 a0);
|
||||
@@ -3443,7 +3453,52 @@ extern void func_8012BF4C(s32 *a0, s16 a1);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_jr_8017BEBC", func_8017E654);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_jr_8017BEBC", func_8017E7A4);
|
||||
#include "common.h"
|
||||
|
||||
extern void func_80149350(s32 arg0);
|
||||
extern void func_8012F214(s32 a0, s32 a1, s32 a2);
|
||||
extern s32 func_8012E544(s32 a0);
|
||||
extern u8 *func_801290DC(s32 a0, u8 *a1);
|
||||
extern s32 D_80126B58;
|
||||
extern u8 D_801202A0[];
|
||||
extern u8 D_80188C98[];
|
||||
|
||||
void func_8017E7A4(void *a0) {
|
||||
s32 t;
|
||||
u8 *r;
|
||||
u8 *p;
|
||||
s32 i;
|
||||
s32 o;
|
||||
s16 out[4];
|
||||
|
||||
t = *(s16 *)((s32)a0 + 0x70);
|
||||
r = &D_80188C98[t * 8];
|
||||
switch (t) {
|
||||
case 0:
|
||||
((void (*)(void *, void *, void *))func_80149350)(&D_80126B58, r, out);
|
||||
func_801290DC(0x56, (u8 *)out);
|
||||
break;
|
||||
case 1:
|
||||
o = func_8012E544(0x245);
|
||||
if (o == 0) {
|
||||
return;
|
||||
}
|
||||
((void (*)(void *, void *, void *))func_8012F214)((void *)o, r, out);
|
||||
func_801290DC(0x56, (u8 *)out);
|
||||
break;
|
||||
default:
|
||||
p = D_801202A0;
|
||||
for (i = 0; i < 0x60; i++) {
|
||||
if (*(u16 *)p == *(s16 *)(r + 6)) {
|
||||
((void (*)(void *, void *, void *))func_8012F214)(p, r, out);
|
||||
func_801290DC(0x56, (u8 *)out);
|
||||
}
|
||||
p += 0x10C;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern void (*D_80188CCC[])(void);
|
||||
@@ -3453,7 +3508,44 @@ void func_8017E890(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_jr_8017BEBC", func_8017E8CC);
|
||||
#include "common.h"
|
||||
|
||||
/* func_8017E8CC — state entry: init the sub-object at +4/+0x10, bind the
|
||||
* primitive at +0x20 to the command list D_80188CC0 (0x270 / 0x100), paint
|
||||
* its RGB (0x40,0x40,0x40) + code 0x9C, OR 0xD0000000 into its tag word,
|
||||
* clear the counter at +0x2C, then seed three random fields and bump the
|
||||
* state word at +2.
|
||||
*/
|
||||
|
||||
extern void func_800159E4(s32 a0, s32 a1);
|
||||
extern s32 func_8001CC3C(s32 a0, s32 a1, s32 a2, s32 a3);
|
||||
extern void func_80146E90(s32 *a0, s32 a1);
|
||||
extern int rand(void);
|
||||
|
||||
void func_8017E8CC(int param_1)
|
||||
{
|
||||
extern unsigned char D_80188CC0[];
|
||||
int p;
|
||||
int r1;
|
||||
int r2;
|
||||
|
||||
p = *(int *)(param_1 + 0x20);
|
||||
((void (*)(int, int))func_800159E4)(param_1 + 4, param_1 + 0x10);
|
||||
((void (*)(int, int, int, int))func_8001CC3C)(p, (int)D_80188CC0, 0x270, 0x100);
|
||||
*(unsigned char *)(p + 0x27) = 0x9c;
|
||||
*(unsigned char *)(p + 0x26) = 0x40;
|
||||
*(unsigned char *)(p + 0x25) = 0x40;
|
||||
*(unsigned char *)(p + 0x24) = 0x40;
|
||||
*(unsigned int *)(p + 4) = *(unsigned int *)(p + 4) | 0xd0000000;
|
||||
*(int *)(param_1 + 0x2c) = 0;
|
||||
*(unsigned short *)(param_1 + 0x30) = (rand() & 3) + 1;
|
||||
r1 = rand();
|
||||
r2 = rand();
|
||||
*(unsigned short *)(p + 0x12) = (r1 & 3) * 0x400 + (r2 & 0xf) * 0x44;
|
||||
((void (*)(int, int))func_80146E90)(param_1, rand() & 0xf);
|
||||
*(unsigned short *)(param_1 + 2) = *(unsigned short *)(param_1 + 2) + 1;
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_jr_8017BEBC", func_8017E9B0);
|
||||
|
||||
@@ -3508,7 +3600,60 @@ void func_8017EE2C(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_jr_8017BEBC", func_8017EE68);
|
||||
|
||||
|
||||
|
||||
|
||||
// @class: regalloc-order
|
||||
// @stuck: none — MATCH (83 ins). $s3 is a dual-copy of iVar3 used only in the ==0 tail block; natural C coalesces to one $s0, so pin iVar3=$s0 and iVar3b=$s3 (different hard regs prevent gcc coalescing the copy). Also: outer+inner branch polarity inverted (if!=0 / if!=0 puts both short blocks at the tail as beqz targets); base = (int)D_801B9014 + idx*0x40 (materialize form, arg to callees).
|
||||
|
||||
extern void func_801465C0(void);
|
||||
extern void func_8001CD9C(int, void*);
|
||||
extern void func_800233CC(void*, unsigned short);
|
||||
extern void func_8017F05C(void*);
|
||||
extern void func_8017F02C(s32*);
|
||||
extern int rand(void);
|
||||
|
||||
void func_8017EE68(int param_1)
|
||||
{
|
||||
|
||||
extern unsigned char D_801B9014[];
|
||||
register int iVar3 __asm__("$16");
|
||||
register int iVar3b __asm__("$19");
|
||||
int iVar5;
|
||||
short sVar2;
|
||||
|
||||
iVar5 = (int)D_801B9014 + *(int *)(param_1 + 0x2c) * 0x40;
|
||||
iVar3 = ((int (*)(void))func_801465C0)();
|
||||
*(int *)(param_1 + 0x20) = iVar3;
|
||||
iVar3b = iVar3;
|
||||
if (iVar3 != 0) {
|
||||
((void (*)(int, int))func_8001CD9C)(iVar3, iVar5);
|
||||
((void (*)(int, int))func_800233CC)(iVar5, 0x10);
|
||||
((void (*)(int))func_8017F05C)(iVar5);
|
||||
*(unsigned int *)(iVar3 + 4) = *(unsigned int *)(iVar3 + 4) | 0x50000000;
|
||||
if (*(int *)(param_1 + 0x2c) != 0) {
|
||||
sVar2 = (rand() & 3) * 0x800 + 0x1000;
|
||||
*(short *)(iVar3 + 0x1a) = sVar2;
|
||||
*(short *)(iVar3 + 0x18) = sVar2;
|
||||
*(unsigned short *)(param_1 + 0x12) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x12) = -*(short *)(param_1 + 0x12);
|
||||
}
|
||||
*(unsigned short *)(param_1 + 0x1a) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x1a) = -*(short *)(param_1 + 0x1a);
|
||||
}
|
||||
} else {
|
||||
*(short *)(iVar3b + 0x1a) = 0x4000;
|
||||
*(short *)(iVar3b + 0x18) = 0x4000;
|
||||
}
|
||||
*(short *)(param_1 + 2) = *(short *)(param_1 + 2) + 1;
|
||||
} else {
|
||||
((void (*)(int))func_8017F02C)(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_jr_8017BEBC", func_8017EFB4);
|
||||
|
||||
@@ -4156,7 +4301,29 @@ INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_jr_8017BEBC", func_80182B3
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_jr_8017BEBC", func_80182BAC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_jr_8017BEBC", func_80182CCC);
|
||||
#include "common.h"
|
||||
|
||||
extern s32 *D_80126B78;
|
||||
extern u8 D_801AD36C[];
|
||||
extern u8 D_801152A8[];
|
||||
|
||||
extern void func_8012F14C(s32);
|
||||
extern s32 func_80135888(s32 a0, s32 a1, s32 a2, s32 a3);
|
||||
extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5);
|
||||
|
||||
s32 func_80182CCC(s32 arg0) {
|
||||
s32 buf1[2];
|
||||
s32 buf2[2];
|
||||
|
||||
((void (*)(s32, s32, s32))func_8012F14C)((s32)D_80126B78 + 0x34, (s32)D_801AD36C, (s32)buf1);
|
||||
((void (*)(s32, s32, s32))func_8012F14C)((s32)D_80126B78 + 0x34, (s32)(D_801AD36C + 8), (s32)buf2);
|
||||
if (func_80135888(*(s32 *)(arg0 + 0x20), *(s32 *)(arg0 + 0x58), (s32)buf1, (s32)buf2) != 0) {
|
||||
func_8012F568(1, 0x18, *(s16 *)(*(s32 *)(arg0 + 0x20) + 0x12), 0x18, (s32)buf2, (s32)D_801152A8);
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_jr_8017BEBC", func_80182D80);
|
||||
|
||||
|
||||
@@ -3704,7 +3704,20 @@ void func_801805BC(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_jr_8017EB7C", func_801805F8);
|
||||
#include "common.h"
|
||||
|
||||
extern u8 D_8018F450;
|
||||
|
||||
extern void func_8014706C(void *a0);
|
||||
extern void func_80154274(s32 *a0, s32 a1);
|
||||
extern s32 func_80171990(u8 *a0);
|
||||
|
||||
void func_801805F8(s32 a0) {
|
||||
func_8014706C((void *)a0);
|
||||
func_80154274((s32 *)a0, (s32)&D_8018F450);
|
||||
func_80171990((u8 *)a0);
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_jr_8017EB7C", func_80180638);
|
||||
|
||||
@@ -3765,7 +3778,35 @@ INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_jr_8017EB7C", func_80180AC
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_jr_8017EB7C", func_80180B20);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_jr_8017EB7C", func_80180B84);
|
||||
extern void func_8014659C(void);
|
||||
extern void func_8001C810(s32 a0, s32 a1);
|
||||
extern void func_80146CA0(void *a0);
|
||||
extern void func_80162CCC(void);
|
||||
|
||||
extern u16 D_800DF2E0;
|
||||
extern s32 D_8018F510;
|
||||
extern s32 D_8018F56C[];
|
||||
|
||||
void func_80180B84(int param_1) {
|
||||
s32 iVar1;
|
||||
|
||||
iVar1 = ((s32 (*)(void))func_8014659C)();
|
||||
*(s32 *)(param_1 + 0x20) = iVar1;
|
||||
if (iVar1 != 0) {
|
||||
((void (*)(s32, void *))func_8001C810)(iVar1, &D_800DF2E0);
|
||||
*(s32 **)(iVar1 + 0x80) = &D_8018F510;
|
||||
*(u32 *)(iVar1 + 4) = *(u32 *)(iVar1 + 4) | 0x50000000;
|
||||
*(u16 *)(iVar1 + 0x2c) = *(u16 *)(iVar1 + 0x2c) | 0xb0;
|
||||
*(s32 *)(param_1 + 0x58) = (s32)&D_8018F56C[*(s32 *)(param_1 + 0x50) * 2];
|
||||
*(u16 *)(iVar1 + 0x1c) = 0;
|
||||
*(u16 *)(iVar1 + 0x1a) = 0;
|
||||
*(u16 *)(iVar1 + 0x18) = 0;
|
||||
((void (*)(s32))func_80146CA0)(param_1);
|
||||
} else {
|
||||
((void (*)(s32))func_80162CCC)(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#include "common.h"
|
||||
|
||||
@@ -4768,7 +4809,51 @@ INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_jr_8017EB7C", func_801897C
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_jr_8017EB7C", func_80189824);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_jr_8017EB7C", func_801898BC);
|
||||
#include "common.h"
|
||||
|
||||
extern u8 D_801EAC94;
|
||||
extern u8 D_801EAC95;
|
||||
extern u8 D_801EAC96;
|
||||
|
||||
// @class: plumbing
|
||||
// @stuck: none — MATCH (45 ins), iteration 3; rtu_match MATCH too.
|
||||
// Notes for the family (this shape repeats across 6 overlays):
|
||||
// * The target's 0x10 frame with NO saves/spills is NOT a phantom frame that
|
||||
// needs inducing: at this toolchain a `void f(void*)` leaf already emits
|
||||
// `addiu $sp,-0x10` / `+0x10` as the BASE frame. Adding the cookbook-§5
|
||||
// `s32 frame_pad[N]` INDUCE local OVERSHOOTS (N=2 -> 0x18, N=4 -> 0x20);
|
||||
// write no local at all. gcc schedules that stack-adjust down into the
|
||||
// first `bnez`'s delay slot on its own — no fence needed.
|
||||
// * `slti $v0,$v0,0x801` + `bnez`-skip is `if (x > 0x800)` (§3-T4: read the
|
||||
// sense off the opcode; Ghidra's `0x800 < x` happens to agree here).
|
||||
// * The `andi $v1,$v0,0xFF` after the if/else join is the u8 local `v`: the
|
||||
// QI pseudo is zero-extended once at its first int use and CSE shares that
|
||||
// masked copy with the second (`v*12` then `v*4`, `v*4` re-used for 0x96).
|
||||
// An `s32 v` would drop the andi (sb truncates anyway).
|
||||
void func_801898BC(void *a0) {
|
||||
s16 *p;
|
||||
s32 t;
|
||||
u8 v;
|
||||
|
||||
p = *(s16 **)((s32)a0 + 0x20);
|
||||
if (*(s16 *)((s32)p + 0x18) > 0x800) {
|
||||
*(s16 *)((s32)p + 0x18) = *(s16 *)((s32)p + 0x18) - 0x200;
|
||||
}
|
||||
if (*(s16 *)((s32)p + 0x1A) > 0x800) {
|
||||
*(s16 *)((s32)p + 0x1A) = *(s16 *)((s32)p + 0x1A) - 0x200;
|
||||
}
|
||||
t = *(s32 *)((s32)a0 + 0x1C) + 1;
|
||||
*(s32 *)((s32)a0 + 0x1C) = t;
|
||||
if (t & 0x10) {
|
||||
v = ((t & 0xF) >> 1) + 9;
|
||||
} else {
|
||||
v = 0x10 - ((t & 0xF) >> 1);
|
||||
}
|
||||
D_801EAC94 = v * 12;
|
||||
D_801EAC95 = v * 4;
|
||||
D_801EAC96 = v * 4;
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern void (*D_80191C0C[])(void);
|
||||
|
||||
@@ -4361,7 +4361,44 @@ INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092_jr_8017AE2C", func_801828A
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092_jr_8017AE2C", func_801828FC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092_jr_8017AE2C", func_80182978);
|
||||
|
||||
extern void func_8012C1B8(void);
|
||||
extern void func_8012CAE4(void *a0);
|
||||
extern void func_8001CA1C(s32 a0, s32 a1);
|
||||
extern void func_8012A828(s32, void*);
|
||||
extern s32 rand(void);
|
||||
|
||||
|
||||
void func_80182978(s32 param_1)
|
||||
{
|
||||
|
||||
extern u8 D_801AD7D4[];
|
||||
extern u8 D_801AD834[];
|
||||
s32 v0;
|
||||
s16 sVar1;
|
||||
|
||||
v0 = ((s32 (*)(void))func_8012C1B8)();
|
||||
*(s32 *)(param_1 + 0x20) = v0;
|
||||
if (v0 == 0) {
|
||||
((void (*)(s32))func_8012CAE4)(param_1);
|
||||
} else {
|
||||
func_8001CA1C(v0, (s32)D_801AD7D4);
|
||||
((void (*)(s32, s32))func_8012A828)(param_1, (s32)D_801AD834);
|
||||
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x18) = 0x10;
|
||||
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x1a) = 0x10;
|
||||
*(s32 *)(param_1 + 0x94) = rand() & 7;
|
||||
*(u32 *)(*(s32 *)(param_1 + 0x20) + 4) |= 0x50000000;
|
||||
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x2c) |= 0x10;
|
||||
if ((u32)(*(u16 *)(param_1 + 0x70) - 1) >= 0x6fff) {
|
||||
*(u16 *)(param_1 + 0x70) = rand() & 0x77ff;
|
||||
sVar1 = 2;
|
||||
} else {
|
||||
sVar1 = 1;
|
||||
}
|
||||
*(s16 *)(param_1 + 2) = sVar1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092_jr_8017AE2C", func_80182A5C);
|
||||
|
||||
|
||||
@@ -3953,7 +3953,44 @@ INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097_jr_8017D898", func_80183DB
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097_jr_8017D898", func_80183E04);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097_jr_8017D898", func_80183E80);
|
||||
|
||||
extern void func_8012C1B8(void);
|
||||
extern void func_8012CAE4(void *a0);
|
||||
extern void func_8001CA1C(s32 a0, s32 a1);
|
||||
extern void func_8012A828(s32, void*);
|
||||
extern s32 rand(void);
|
||||
|
||||
|
||||
void func_80183E80(s32 param_1)
|
||||
{
|
||||
|
||||
extern u8 D_8019CA34[];
|
||||
extern u8 D_8019CA94[];
|
||||
s32 v0;
|
||||
s16 sVar1;
|
||||
|
||||
v0 = ((s32 (*)(void))func_8012C1B8)();
|
||||
*(s32 *)(param_1 + 0x20) = v0;
|
||||
if (v0 == 0) {
|
||||
((void (*)(s32))func_8012CAE4)(param_1);
|
||||
} else {
|
||||
func_8001CA1C(v0, (s32)D_8019CA34);
|
||||
((void (*)(s32, s32))func_8012A828)(param_1, (s32)D_8019CA94);
|
||||
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x18) = 0x10;
|
||||
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x1a) = 0x10;
|
||||
*(s32 *)(param_1 + 0x94) = rand() & 7;
|
||||
*(u32 *)(*(s32 *)(param_1 + 0x20) + 4) |= 0x50000000;
|
||||
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x2c) |= 0x10;
|
||||
if ((u32)(*(u16 *)(param_1 + 0x70) - 1) >= 0x6fff) {
|
||||
*(u16 *)(param_1 + 0x70) = rand() & 0x77ff;
|
||||
sVar1 = 2;
|
||||
} else {
|
||||
sVar1 = 1;
|
||||
}
|
||||
*(s16 *)(param_1 + 2) = sVar1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097_jr_8017D898", func_80183F64);
|
||||
|
||||
|
||||
@@ -3503,7 +3503,44 @@ INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100_jr_8017D898", func_8018076
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100_jr_8017D898", func_801807BC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100_jr_8017D898", func_80180838);
|
||||
|
||||
extern void func_8012C1B8(void);
|
||||
extern void func_8012CAE4(void *a0);
|
||||
extern void func_8001CA1C(s32 a0, s32 a1);
|
||||
extern void func_8012A828(s32, void*);
|
||||
extern s32 rand(void);
|
||||
|
||||
|
||||
void func_80180838(s32 param_1)
|
||||
{
|
||||
|
||||
extern u8 D_801A04B0[];
|
||||
extern u8 D_801A0510[];
|
||||
s32 v0;
|
||||
s16 sVar1;
|
||||
|
||||
v0 = ((s32 (*)(void))func_8012C1B8)();
|
||||
*(s32 *)(param_1 + 0x20) = v0;
|
||||
if (v0 == 0) {
|
||||
((void (*)(s32))func_8012CAE4)(param_1);
|
||||
} else {
|
||||
func_8001CA1C(v0, (s32)D_801A04B0);
|
||||
((void (*)(s32, s32))func_8012A828)(param_1, (s32)D_801A0510);
|
||||
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x18) = 0x10;
|
||||
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x1a) = 0x10;
|
||||
*(s32 *)(param_1 + 0x94) = rand() & 7;
|
||||
*(u32 *)(*(s32 *)(param_1 + 0x20) + 4) |= 0x50000000;
|
||||
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x2c) |= 0x10;
|
||||
if ((u32)(*(u16 *)(param_1 + 0x70) - 1) >= 0x6fff) {
|
||||
*(u16 *)(param_1 + 0x70) = rand() & 0x77ff;
|
||||
sVar1 = 2;
|
||||
} else {
|
||||
sVar1 = 1;
|
||||
}
|
||||
*(s16 *)(param_1 + 2) = sVar1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100_jr_8017D898", func_8018091C);
|
||||
|
||||
|
||||
@@ -4612,7 +4612,44 @@ INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104_jr_8017CA80", func_8018774
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104_jr_8017CA80", func_801877A0);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104_jr_8017CA80", func_8018781C);
|
||||
|
||||
extern void func_8012C1B8(void);
|
||||
extern void func_8012CAE4(void *a0);
|
||||
extern void func_8001CA1C(s32 a0, s32 a1);
|
||||
extern void func_8012A828(s32, void*);
|
||||
extern s32 rand(void);
|
||||
|
||||
|
||||
void func_8018781C(s32 param_1)
|
||||
{
|
||||
|
||||
extern u8 D_8019D698[];
|
||||
extern u8 D_8019D6F8[];
|
||||
s32 v0;
|
||||
s16 sVar1;
|
||||
|
||||
v0 = ((s32 (*)(void))func_8012C1B8)();
|
||||
*(s32 *)(param_1 + 0x20) = v0;
|
||||
if (v0 == 0) {
|
||||
((void (*)(s32))func_8012CAE4)(param_1);
|
||||
} else {
|
||||
func_8001CA1C(v0, (s32)D_8019D698);
|
||||
((void (*)(s32, s32))func_8012A828)(param_1, (s32)D_8019D6F8);
|
||||
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x18) = 0x10;
|
||||
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x1a) = 0x10;
|
||||
*(s32 *)(param_1 + 0x94) = rand() & 7;
|
||||
*(u32 *)(*(s32 *)(param_1 + 0x20) + 4) |= 0x50000000;
|
||||
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x2c) |= 0x10;
|
||||
if ((u32)(*(u16 *)(param_1 + 0x70) - 1) >= 0x6fff) {
|
||||
*(u16 *)(param_1 + 0x70) = rand() & 0x77ff;
|
||||
sVar1 = 2;
|
||||
} else {
|
||||
sVar1 = 1;
|
||||
}
|
||||
*(s16 *)(param_1 + 2) = sVar1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104_jr_8017CA80", func_80187900);
|
||||
|
||||
|
||||
@@ -3741,7 +3741,60 @@ void func_80180B04(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_002/nonmatchings/ov_SC04_002_jr_8017BEBC", func_80180B40);
|
||||
|
||||
|
||||
|
||||
|
||||
// @class: regalloc-order
|
||||
// @stuck: none — MATCH (83 ins). $s3 is a dual-copy of iVar3 used only in the ==0 tail block; natural C coalesces to one $s0, so pin iVar3=$s0 and iVar3b=$s3 (different hard regs prevent gcc coalescing the copy). Also: outer+inner branch polarity inverted (if!=0 / if!=0 puts both short blocks at the tail as beqz targets); base = (int)D_801C100C + idx*0x40 (materialize form, arg to callees).
|
||||
|
||||
extern void func_801465C0(void);
|
||||
extern void func_8001CD9C(int, void*);
|
||||
extern void func_800233CC(void*, unsigned short);
|
||||
extern void func_80180D34(void*);
|
||||
extern void func_80180D04(s32*);
|
||||
extern int rand(void);
|
||||
|
||||
void func_80180B40(int param_1)
|
||||
{
|
||||
|
||||
extern unsigned char D_801C100C[];
|
||||
register int iVar3 __asm__("$16");
|
||||
register int iVar3b __asm__("$19");
|
||||
int iVar5;
|
||||
short sVar2;
|
||||
|
||||
iVar5 = (int)D_801C100C + *(int *)(param_1 + 0x2c) * 0x40;
|
||||
iVar3 = ((int (*)(void))func_801465C0)();
|
||||
*(int *)(param_1 + 0x20) = iVar3;
|
||||
iVar3b = iVar3;
|
||||
if (iVar3 != 0) {
|
||||
((void (*)(int, int))func_8001CD9C)(iVar3, iVar5);
|
||||
((void (*)(int, int))func_800233CC)(iVar5, 0x10);
|
||||
((void (*)(int))func_80180D34)(iVar5);
|
||||
*(unsigned int *)(iVar3 + 4) = *(unsigned int *)(iVar3 + 4) | 0x50000000;
|
||||
if (*(int *)(param_1 + 0x2c) != 0) {
|
||||
sVar2 = (rand() & 3) * 0x800 + 0x1000;
|
||||
*(short *)(iVar3 + 0x1a) = sVar2;
|
||||
*(short *)(iVar3 + 0x18) = sVar2;
|
||||
*(unsigned short *)(param_1 + 0x12) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x12) = -*(short *)(param_1 + 0x12);
|
||||
}
|
||||
*(unsigned short *)(param_1 + 0x1a) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x1a) = -*(short *)(param_1 + 0x1a);
|
||||
}
|
||||
} else {
|
||||
*(short *)(iVar3b + 0x1a) = 0x4000;
|
||||
*(short *)(iVar3b + 0x18) = 0x4000;
|
||||
}
|
||||
*(short *)(param_1 + 2) = *(short *)(param_1 + 2) + 1;
|
||||
} else {
|
||||
((void (*)(int))func_80180D04)(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_002/nonmatchings/ov_SC04_002_jr_8017BEBC", func_80180C8C);
|
||||
|
||||
|
||||
@@ -3699,7 +3699,60 @@ void func_8017FF1C(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_005/nonmatchings/ov_SC04_005_jr_8017BEBC", func_8017FF58);
|
||||
|
||||
|
||||
|
||||
|
||||
// @class: regalloc-order
|
||||
// @stuck: none — MATCH (83 ins). $s3 is a dual-copy of iVar3 used only in the ==0 tail block; natural C coalesces to one $s0, so pin iVar3=$s0 and iVar3b=$s3 (different hard regs prevent gcc coalescing the copy). Also: outer+inner branch polarity inverted (if!=0 / if!=0 puts both short blocks at the tail as beqz targets); base = (int)D_801C1C4C + idx*0x40 (materialize form, arg to callees).
|
||||
|
||||
extern void func_801465C0(void);
|
||||
extern void func_8001CD9C(int, void*);
|
||||
extern void func_800233CC(void*, unsigned short);
|
||||
extern void func_8018014C(void*);
|
||||
extern void func_8018011C(s32*);
|
||||
extern int rand(void);
|
||||
|
||||
void func_8017FF58(int param_1)
|
||||
{
|
||||
|
||||
extern unsigned char D_801C1C4C[];
|
||||
register int iVar3 __asm__("$16");
|
||||
register int iVar3b __asm__("$19");
|
||||
int iVar5;
|
||||
short sVar2;
|
||||
|
||||
iVar5 = (int)D_801C1C4C + *(int *)(param_1 + 0x2c) * 0x40;
|
||||
iVar3 = ((int (*)(void))func_801465C0)();
|
||||
*(int *)(param_1 + 0x20) = iVar3;
|
||||
iVar3b = iVar3;
|
||||
if (iVar3 != 0) {
|
||||
((void (*)(int, int))func_8001CD9C)(iVar3, iVar5);
|
||||
((void (*)(int, int))func_800233CC)(iVar5, 0x10);
|
||||
((void (*)(int))func_8018014C)(iVar5);
|
||||
*(unsigned int *)(iVar3 + 4) = *(unsigned int *)(iVar3 + 4) | 0x50000000;
|
||||
if (*(int *)(param_1 + 0x2c) != 0) {
|
||||
sVar2 = (rand() & 3) * 0x800 + 0x1000;
|
||||
*(short *)(iVar3 + 0x1a) = sVar2;
|
||||
*(short *)(iVar3 + 0x18) = sVar2;
|
||||
*(unsigned short *)(param_1 + 0x12) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x12) = -*(short *)(param_1 + 0x12);
|
||||
}
|
||||
*(unsigned short *)(param_1 + 0x1a) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x1a) = -*(short *)(param_1 + 0x1a);
|
||||
}
|
||||
} else {
|
||||
*(short *)(iVar3b + 0x1a) = 0x4000;
|
||||
*(short *)(iVar3b + 0x18) = 0x4000;
|
||||
}
|
||||
*(short *)(param_1 + 2) = *(short *)(param_1 + 2) + 1;
|
||||
} else {
|
||||
((void (*)(int))func_8018011C)(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_005/nonmatchings/ov_SC04_005_jr_8017BEBC", func_801800A4);
|
||||
|
||||
@@ -4071,7 +4071,60 @@ void func_801852DC(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_007/nonmatchings/ov_SC04_007_jr_8017BEBC", func_80185318);
|
||||
|
||||
|
||||
|
||||
|
||||
// @class: regalloc-order
|
||||
// @stuck: none — MATCH (83 ins). $s3 is a dual-copy of iVar3 used only in the ==0 tail block; natural C coalesces to one $s0, so pin iVar3=$s0 and iVar3b=$s3 (different hard regs prevent gcc coalescing the copy). Also: outer+inner branch polarity inverted (if!=0 / if!=0 puts both short blocks at the tail as beqz targets); base = (int)D_801B54EC + idx*0x40 (materialize form, arg to callees).
|
||||
|
||||
extern void func_801465C0(void);
|
||||
extern void func_8001CD9C(int, void*);
|
||||
extern void func_800233CC(void*, unsigned short);
|
||||
extern void func_8018550C(void*);
|
||||
extern void func_801854DC(s32*);
|
||||
extern int rand(void);
|
||||
|
||||
void func_80185318(int param_1)
|
||||
{
|
||||
|
||||
extern unsigned char D_801B54EC[];
|
||||
register int iVar3 __asm__("$16");
|
||||
register int iVar3b __asm__("$19");
|
||||
int iVar5;
|
||||
short sVar2;
|
||||
|
||||
iVar5 = (int)D_801B54EC + *(int *)(param_1 + 0x2c) * 0x40;
|
||||
iVar3 = ((int (*)(void))func_801465C0)();
|
||||
*(int *)(param_1 + 0x20) = iVar3;
|
||||
iVar3b = iVar3;
|
||||
if (iVar3 != 0) {
|
||||
((void (*)(int, int))func_8001CD9C)(iVar3, iVar5);
|
||||
((void (*)(int, int))func_800233CC)(iVar5, 0x10);
|
||||
((void (*)(int))func_8018550C)(iVar5);
|
||||
*(unsigned int *)(iVar3 + 4) = *(unsigned int *)(iVar3 + 4) | 0x50000000;
|
||||
if (*(int *)(param_1 + 0x2c) != 0) {
|
||||
sVar2 = (rand() & 3) * 0x800 + 0x1000;
|
||||
*(short *)(iVar3 + 0x1a) = sVar2;
|
||||
*(short *)(iVar3 + 0x18) = sVar2;
|
||||
*(unsigned short *)(param_1 + 0x12) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x12) = -*(short *)(param_1 + 0x12);
|
||||
}
|
||||
*(unsigned short *)(param_1 + 0x1a) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x1a) = -*(short *)(param_1 + 0x1a);
|
||||
}
|
||||
} else {
|
||||
*(short *)(iVar3b + 0x1a) = 0x4000;
|
||||
*(short *)(iVar3b + 0x18) = 0x4000;
|
||||
}
|
||||
*(short *)(param_1 + 2) = *(short *)(param_1 + 2) + 1;
|
||||
} else {
|
||||
((void (*)(int))func_801854DC)(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_007/nonmatchings/ov_SC04_007_jr_8017BEBC", func_80185464);
|
||||
|
||||
|
||||
@@ -3807,7 +3807,26 @@ INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80185A3
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80185B04);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80185B5C);
|
||||
#include "common.h"
|
||||
|
||||
extern s32 D_801EFC48;
|
||||
extern s32 D_801EFC4C[];
|
||||
extern s32 func_8004787C(s32 a0);
|
||||
|
||||
void func_80185B5C(u16 id)
|
||||
{
|
||||
s32 obj;
|
||||
s32 q;
|
||||
|
||||
obj = D_801EFC4C[*(u8 *)(id * 8 + *(s32 *)(D_801EFC48 + 0xCC) + 6)];
|
||||
if (obj != 0) {
|
||||
*(u16 *)(obj + 0xEE) = *(u16 *)(obj + 0xEE) + *(u16 *)(obj + 0xF2);
|
||||
q = func_8004787C(*(s16 *)(obj + 0xEE)) / 22;
|
||||
*(s16 *)(obj + 0xEC) = q;
|
||||
*(s16 *)(obj + 0xE4) = *(u16 *)(obj + 0xF0) + q;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80185C04);
|
||||
|
||||
@@ -4047,7 +4066,18 @@ INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80189D3
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80189DFC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80189EAC);
|
||||
#include "common.h"
|
||||
|
||||
extern s32 func_8012C658(s32 arg0, s32 arg1, s32 arg2);
|
||||
|
||||
void func_80189EAC(s32 arg0) {
|
||||
s32 i;
|
||||
|
||||
for (i = 0; i < 8; i++) {
|
||||
func_8012C658(0x276, i, arg0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80189EFC);
|
||||
|
||||
@@ -4184,7 +4214,39 @@ INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_8018BEE
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_8018C024);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_8018C07C);
|
||||
#include "common.h"
|
||||
struct vec;
|
||||
|
||||
extern void func_8012931C(struct vec *a0);
|
||||
extern void func_801292C8(u8 *a0);
|
||||
extern void func_801885C0(s32 a0);
|
||||
|
||||
extern u8 D_801EFE60;
|
||||
extern u8 D_801EFE61;
|
||||
extern u8 D_801EFE62;
|
||||
|
||||
void func_8018C07C(s32 arg0) {
|
||||
s16 v;
|
||||
u8 *p;
|
||||
|
||||
func_8012931C((struct vec *)arg0);
|
||||
v = *(s16 *)(*(s32 *)(arg0 + 0x20) + 0x18);
|
||||
if (v >= 0x400) {
|
||||
*(s16 *)(*(s32 *)(arg0 + 0x20) + 0x18) = v - 0x400;
|
||||
*(u16 *)(*(s32 *)(arg0 + 0x20) + 0x1A) =
|
||||
*(u16 *)(*(s32 *)(arg0 + 0x20) + 0x1A) - 0x400;
|
||||
if ((*(u16 *)(arg0 + 0x2C) & 1) == 0) {
|
||||
p = &D_801EFE60;
|
||||
*p -= 8;
|
||||
D_801EFE61 -= 0x20;
|
||||
D_801EFE62 -= 0x30;
|
||||
func_801885C0(arg0);
|
||||
}
|
||||
} else {
|
||||
func_801292C8((u8 *)arg0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_8018C14C);
|
||||
|
||||
|
||||
@@ -4175,7 +4175,32 @@ INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_801801E
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_80180284);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_8018034C);
|
||||
#include "common.h"
|
||||
|
||||
/* func_8018034C — state-entry init (family exemplar, reach x11).
|
||||
* Sets the actor's state id (halfword @ +0x2) then runs the fixed
|
||||
* five-call entry chain. Sibling style copied from func_80180164
|
||||
* in the same TU (cookbook §71). */
|
||||
|
||||
extern void func_8012E8E0(s32, s32);
|
||||
extern void func_8012E88C(s32);
|
||||
extern void func_8012A828(s32 *a0, s32 a1); /* fleet-canonical sig (TU L3775) */
|
||||
extern void func_80184C90(s32);
|
||||
extern void func_80184ED4(s32, s32, s32, s32);
|
||||
|
||||
extern short D_801918F4;
|
||||
extern short D_801B9DF8;
|
||||
extern short D_801B65B8;
|
||||
|
||||
void func_8018034C(void *arg0) {
|
||||
*(short *)((char *)arg0 + 0x2) = 2;
|
||||
func_8012E8E0((s32)arg0, (s32)&D_801918F4);
|
||||
func_8012E88C((s32)arg0);
|
||||
func_8012A828((s32 *)arg0, (s32)&D_801B9DF8);
|
||||
func_80184C90((s32)arg0);
|
||||
func_80184ED4((s32)arg0, (s32)&D_801B65B8, 0, 0x60);
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_801803BC);
|
||||
|
||||
@@ -4204,7 +4229,24 @@ extern s32 func_80029178(s32 arg);
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_80180580);
|
||||
#include "common.h"
|
||||
|
||||
/* func_80180580 — guarded dispatch: ask func_80184BAC(9, 0x11); if it answers
|
||||
* NON-zero, run func_8018034C on the incoming entity. The entity pointer is
|
||||
* live across the jal, so it lands in $s0 and comes back out as $a0.
|
||||
* §71 sibling: func_80181B34 in this same TU is the identical shape.
|
||||
* §3-T4: target branch is `beqz $v0, ret` => the C condition is `!= 0`
|
||||
* (the sibling's is `bnez` => `== 0`; polarity is read off the opcode). */
|
||||
|
||||
extern s32 func_80184BAC(s32 arg0, s32 arg1);
|
||||
extern void func_8018034C(void *arg0);
|
||||
|
||||
void func_80180580(void *arg0) {
|
||||
if (func_80184BAC(9, 0x11) != 0) {
|
||||
func_8018034C(arg0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_801805C0);
|
||||
|
||||
@@ -4326,7 +4368,34 @@ s32 func_80180D38(void *a0)
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_80180E28);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_80180EE8);
|
||||
#include "common.h"
|
||||
|
||||
extern s32 func_80185BE0(s32 a0);
|
||||
extern s32 func_80184FA4(s32 a0);
|
||||
extern void func_80184ED4(s32, s32, s32, s32);
|
||||
extern void func_801808FC(void *a0);
|
||||
extern u8 D_801B6620[];
|
||||
|
||||
void func_80180EE8(void *a0)
|
||||
{
|
||||
if (*(u16 *)((s32)a0 + 0x34) == 0) {
|
||||
if (func_80185BE0(6) == 0) {
|
||||
return;
|
||||
}
|
||||
if (func_80184FA4((s32)a0) == 0) {
|
||||
return;
|
||||
}
|
||||
((void (*)(void *, void *, s32, s32))func_80184ED4)(a0, D_801B6620, 0, 0x40);
|
||||
*(s16 *)((s32)a0 + 0x34) = 1;
|
||||
return;
|
||||
}
|
||||
|
||||
*(s32 *)(*(s32 *)((s32)a0 + 0xCC) + 0xB0) = 2;
|
||||
if (func_80184FA4((s32)a0) != 0) {
|
||||
func_801808FC(a0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_80180F7C);
|
||||
|
||||
@@ -4460,7 +4529,27 @@ void func_80181B34(void *arg0) {
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_80181B74);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_80181BEC);
|
||||
#include "common.h"
|
||||
|
||||
extern s32 func_80184FA4(s32 a0);
|
||||
extern void func_80184ED4(s32 a0, s32 a1, s32 a2, s32 a3);
|
||||
extern s32 func_80185BE0(s32 a0);
|
||||
extern void func_8018170C(void *a0);
|
||||
extern u8 D_801B662C[];
|
||||
|
||||
void func_80181BEC(void *arg0) {
|
||||
if (*(u16 *)((char *)arg0 + 0x34) == 0) {
|
||||
if (((s32 (*)(void))func_80184FA4)() != 0) {
|
||||
func_80184ED4((s32)arg0, (s32)&D_801B662C[0], 1, 0x80);
|
||||
*(s16 *)((char *)arg0 + 0x34) = 1;
|
||||
}
|
||||
} else if (func_80185BE0(3) != 0) {
|
||||
if (func_80184FA4((s32)arg0) != 0) {
|
||||
func_8018170C(arg0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* func_80181C78 — guarded dispatch: ask func_80184BAC(15, 0x11); if it answers
|
||||
@@ -5176,7 +5265,23 @@ INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_8018589
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_80185904);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_80185978);
|
||||
#include "common.h"
|
||||
|
||||
extern s16 D_801B8788[];
|
||||
extern s32 D_801B8748[][2];
|
||||
|
||||
void func_80185978(s32 a0) {
|
||||
*(s16 *)(a0 + 0x2) = 3;
|
||||
*(s16 *)(a0 + 0x34) = 0;
|
||||
*(s16 *)(a0 + 0xFE) = 0;
|
||||
*(s16 *)(a0 + 0x100) = 0;
|
||||
*(s16 *)(a0 + 0x102) = 2;
|
||||
*(s32 *)(*(s32 *)(a0 + 0x20) + 0x24) = D_801B8748[D_801B8788[*(s16 *)(a0 + 0x70)]][0];
|
||||
*(s16 *)(a0 + 0x84) = 0;
|
||||
*(s16 *)(a0 + 0x5C) = 0x800;
|
||||
*(s32 *)(a0 + 0xB0) = 0;
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8017AE2C", func_801859D8);
|
||||
|
||||
|
||||
@@ -4458,7 +4458,60 @@ void func_80184034(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_008/nonmatchings/ov_SC06_008_jr_8017C294", func_80184070);
|
||||
|
||||
|
||||
|
||||
|
||||
// @class: regalloc-order
|
||||
// @stuck: none — MATCH (83 ins). $s3 is a dual-copy of iVar3 used only in the ==0 tail block; natural C coalesces to one $s0, so pin iVar3=$s0 and iVar3b=$s3 (different hard regs prevent gcc coalescing the copy). Also: outer+inner branch polarity inverted (if!=0 / if!=0 puts both short blocks at the tail as beqz targets); base = (int)D_801AA194 + idx*0x40 (materialize form, arg to callees).
|
||||
|
||||
extern void func_801465C0(void);
|
||||
extern void func_8001CD9C(int, void*);
|
||||
extern void func_800233CC(void*, unsigned short);
|
||||
extern void func_80184264(void*);
|
||||
extern void func_80184234(s32*);
|
||||
extern int rand(void);
|
||||
|
||||
void func_80184070(int param_1)
|
||||
{
|
||||
|
||||
extern unsigned char D_801AA194[];
|
||||
register int iVar3 __asm__("$16");
|
||||
register int iVar3b __asm__("$19");
|
||||
int iVar5;
|
||||
short sVar2;
|
||||
|
||||
iVar5 = (int)D_801AA194 + *(int *)(param_1 + 0x2c) * 0x40;
|
||||
iVar3 = ((int (*)(void))func_801465C0)();
|
||||
*(int *)(param_1 + 0x20) = iVar3;
|
||||
iVar3b = iVar3;
|
||||
if (iVar3 != 0) {
|
||||
((void (*)(int, int))func_8001CD9C)(iVar3, iVar5);
|
||||
((void (*)(int, int))func_800233CC)(iVar5, 0x10);
|
||||
((void (*)(int))func_80184264)(iVar5);
|
||||
*(unsigned int *)(iVar3 + 4) = *(unsigned int *)(iVar3 + 4) | 0x50000000;
|
||||
if (*(int *)(param_1 + 0x2c) != 0) {
|
||||
sVar2 = (rand() & 3) * 0x800 + 0x1000;
|
||||
*(short *)(iVar3 + 0x1a) = sVar2;
|
||||
*(short *)(iVar3 + 0x18) = sVar2;
|
||||
*(unsigned short *)(param_1 + 0x12) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x12) = -*(short *)(param_1 + 0x12);
|
||||
}
|
||||
*(unsigned short *)(param_1 + 0x1a) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x1a) = -*(short *)(param_1 + 0x1a);
|
||||
}
|
||||
} else {
|
||||
*(short *)(iVar3b + 0x1a) = 0x4000;
|
||||
*(short *)(iVar3b + 0x18) = 0x4000;
|
||||
}
|
||||
*(short *)(param_1 + 2) = *(short *)(param_1 + 2) + 1;
|
||||
} else {
|
||||
((void (*)(int))func_80184234)(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_008/nonmatchings/ov_SC06_008_jr_8017C294", func_801841BC);
|
||||
|
||||
|
||||
@@ -3935,7 +3935,60 @@ void func_8017D9E4(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_010/nonmatchings/ov_SC06_010_jr_8017A4AC", func_8017DA20);
|
||||
|
||||
|
||||
|
||||
|
||||
// @class: regalloc-order
|
||||
// @stuck: none — MATCH (83 ins). $s3 is a dual-copy of iVar3 used only in the ==0 tail block; natural C coalesces to one $s0, so pin iVar3=$s0 and iVar3b=$s3 (different hard regs prevent gcc coalescing the copy). Also: outer+inner branch polarity inverted (if!=0 / if!=0 puts both short blocks at the tail as beqz targets); base = (int)D_801B203C + idx*0x40 (materialize form, arg to callees).
|
||||
|
||||
extern void func_801465C0(void);
|
||||
extern void func_8001CD9C(int, void*);
|
||||
extern void func_800233CC(void*, unsigned short);
|
||||
extern void func_8017DC14(void*);
|
||||
extern void func_8017DBE4(s32*);
|
||||
extern int rand(void);
|
||||
|
||||
void func_8017DA20(int param_1)
|
||||
{
|
||||
|
||||
extern unsigned char D_801B203C[];
|
||||
register int iVar3 __asm__("$16");
|
||||
register int iVar3b __asm__("$19");
|
||||
int iVar5;
|
||||
short sVar2;
|
||||
|
||||
iVar5 = (int)D_801B203C + *(int *)(param_1 + 0x2c) * 0x40;
|
||||
iVar3 = ((int (*)(void))func_801465C0)();
|
||||
*(int *)(param_1 + 0x20) = iVar3;
|
||||
iVar3b = iVar3;
|
||||
if (iVar3 != 0) {
|
||||
((void (*)(int, int))func_8001CD9C)(iVar3, iVar5);
|
||||
((void (*)(int, int))func_800233CC)(iVar5, 0x10);
|
||||
((void (*)(int))func_8017DC14)(iVar5);
|
||||
*(unsigned int *)(iVar3 + 4) = *(unsigned int *)(iVar3 + 4) | 0x50000000;
|
||||
if (*(int *)(param_1 + 0x2c) != 0) {
|
||||
sVar2 = (rand() & 3) * 0x800 + 0x1000;
|
||||
*(short *)(iVar3 + 0x1a) = sVar2;
|
||||
*(short *)(iVar3 + 0x18) = sVar2;
|
||||
*(unsigned short *)(param_1 + 0x12) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x12) = -*(short *)(param_1 + 0x12);
|
||||
}
|
||||
*(unsigned short *)(param_1 + 0x1a) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x1a) = -*(short *)(param_1 + 0x1a);
|
||||
}
|
||||
} else {
|
||||
*(short *)(iVar3b + 0x1a) = 0x4000;
|
||||
*(short *)(iVar3b + 0x18) = 0x4000;
|
||||
}
|
||||
*(short *)(param_1 + 2) = *(short *)(param_1 + 2) + 1;
|
||||
} else {
|
||||
((void (*)(int))func_8017DBE4)(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_010/nonmatchings/ov_SC06_010_jr_8017A4AC", func_8017DB6C);
|
||||
|
||||
|
||||
@@ -4676,7 +4676,46 @@ INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_80184C7
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_801850F4);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_80185268);
|
||||
#include "common.h"
|
||||
|
||||
/* func_80185268 — randomised state entry (state word 0x19):
|
||||
* set the state at 0x02, push command list D_801CC7A0, seed the timer at
|
||||
* 0x1C with rand()%64 + 0x80, nudge the value at 0xE8 by a random 0..1023
|
||||
* in a random direction, then park 18000 at 0x48.
|
||||
*
|
||||
* §71 sibling-first: func_80183CDC / func_8018598C (same TU, MATCHed) are the
|
||||
* same `if ((rand() & 1) != 0) v = base + off; else v = base - off;` idiom.
|
||||
*/
|
||||
|
||||
extern s32 rand(void);
|
||||
extern void func_8012A828(s32 a0, void *a1);
|
||||
extern u8 D_801CC7A0[];
|
||||
|
||||
void func_80185268(s32 param_1) {
|
||||
s32 r;
|
||||
s32 off;
|
||||
s32 base;
|
||||
s32 nv;
|
||||
|
||||
*(s16 *)(param_1 + 2) = 0x19;
|
||||
func_8012A828(param_1, D_801CC7A0);
|
||||
|
||||
r = rand();
|
||||
*(s32 *)(param_1 + 0x1C) = r % 0x40 + 0x80;
|
||||
|
||||
r = rand();
|
||||
off = r % 0x400;
|
||||
base = *(s32 *)(param_1 + 0xE8);
|
||||
if ((rand() & 1) != 0) {
|
||||
nv = base + off;
|
||||
} else {
|
||||
nv = base - off;
|
||||
}
|
||||
*(s32 *)(param_1 + 0xE8) = nv;
|
||||
|
||||
*(s32 *)(param_1 + 0x48) = 18000;
|
||||
}
|
||||
|
||||
|
||||
#include "common.h"
|
||||
|
||||
@@ -5157,7 +5196,34 @@ INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_8018868
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_801886B0);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_80188B00);
|
||||
#include "common.h"
|
||||
|
||||
extern void func_80049CAC(s32, s32);
|
||||
extern void func_800484EC(s32, s32, s32);
|
||||
extern void func_8012B260(u8 *a0);
|
||||
|
||||
void func_80188B00(s32 p) {
|
||||
s32 g10[4]; /* sp+0x10 */
|
||||
u16 g20[4]; /* sp+0x20 */
|
||||
s32 buf28[8]; /* sp+0x28 */
|
||||
u16 v;
|
||||
|
||||
g10[2] = 0xFFF00000;
|
||||
g10[1] = 0;
|
||||
g10[0] = 0;
|
||||
g20[0] = 0x10;
|
||||
v = *(u16 *)(*(s32 *)(*(s32 *)(p + 0x64) + 0x20) + 0x12) +
|
||||
*(u16 *)(p + 0xFC);
|
||||
g20[1] = v;
|
||||
*(u16 *)(p + 0xFE) = v;
|
||||
g20[2] = 0;
|
||||
((void (*)(void *, void *))func_80049CAC)(g20, buf28);
|
||||
((void (*)(void *, void *, s32))func_800484EC)(buf28, g10, p + 0x10);
|
||||
*(u16 *)(p + 2) = 8;
|
||||
*(s32 *)(p + 0x1C) = 0x40;
|
||||
((void (*)(s32))func_8012B260)(p);
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_80188B9C);
|
||||
|
||||
@@ -5189,7 +5255,28 @@ void func_801894B4(void *a0) {
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_801894F0);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_80189954);
|
||||
#include "common.h"
|
||||
|
||||
extern s32 func_8012CBF4(s32 a0);
|
||||
extern s32 func_8012BEE8(s32 a0);
|
||||
extern void func_8012C218(void *a0); /* TU-canonical (ov_SC06_018_jr_8017C24C L5455) */
|
||||
extern void func_80017274(s32 a0, s32 a1);
|
||||
|
||||
void func_80189954(s32 param_1) {
|
||||
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x10) + *(u16 *)(param_1 + 0xFE);
|
||||
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) + *(u16 *)(param_1 + 0x100);
|
||||
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x14) =
|
||||
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x14) + *(u16 *)(param_1 + 0x102);
|
||||
|
||||
if (func_8012CBF4(param_1) != 0 || func_8012BEE8(param_1) != 0) {
|
||||
func_8012C218((void *)param_1);
|
||||
} else {
|
||||
func_80017274(param_1 + 0xDC, *(s32 *)(param_1 + 0x20) + 0x34);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern void (*D_801B55A0[])(void);
|
||||
@@ -5215,9 +5302,73 @@ void func_80189FCC(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_8018A008);
|
||||
#include "common.h"
|
||||
|
||||
extern u8 D_800D387C[];
|
||||
extern u8 D_800D3888[];
|
||||
extern void func_80128EA8(s32 a0, s32 a1, s32 a2);
|
||||
|
||||
void func_8018A008(s32 param_1) {
|
||||
s32 t;
|
||||
|
||||
*(u32 *)(*(s32 *)(param_1 + 0x20) + 0x20) = (u32)&D_800D387C;
|
||||
|
||||
*(u32 *)(*(s32 *)(param_1 + 0x20) + 4) |= 0x50000000;
|
||||
|
||||
*(u8 *)(*(s32 *)(param_1 + 0x20) + 0x27) = 0x9c;
|
||||
|
||||
t = *(s32 *)(param_1 + 0x20);
|
||||
*(u16 *)(t + 0x1a) = 0x2000;
|
||||
*(u16 *)(t + 0x18) = 0x2000;
|
||||
|
||||
*(u8 *)(*(s32 *)(param_1 + 0x20) + 0x24) = 0xff;
|
||||
*(u8 *)(*(s32 *)(param_1 + 0x20) + 0x25) = 0;
|
||||
*(u8 *)(*(s32 *)(param_1 + 0x20) + 0x26) = 0;
|
||||
|
||||
func_80128EA8(*(s32 *)(param_1 + 0x20), param_1 + 0x24, (s32)&D_800D3888);
|
||||
|
||||
*(u16 *)(param_1 + 2) = *(u16 *)(param_1 + 2) + 1;
|
||||
}
|
||||
|
||||
|
||||
#include "common.h"
|
||||
|
||||
extern void func_8012931C(s32 a0);
|
||||
extern s32 func_80128ED8(void *a0, void *a1);
|
||||
extern void func_801292C8(s32 a0);
|
||||
|
||||
void func_8018A0B8(s32 param_1) {
|
||||
s32 q;
|
||||
u8 a;
|
||||
u8 b;
|
||||
u16 h;
|
||||
|
||||
q = *(s32 *)(param_1 + 0x20);
|
||||
|
||||
a = *(u8 *)(q + 0x24) - 0x20;
|
||||
*(u8 *)(q + 0x24) = a;
|
||||
if (a < 0x80) {
|
||||
*(u8 *)(q + 0x24) = 0x80;
|
||||
}
|
||||
|
||||
b = *(u8 *)(q + 0x25) + 0x20;
|
||||
*(u8 *)(q + 0x25) = b;
|
||||
if (b > 0x80) {
|
||||
*(u8 *)(q + 0x25) = 0x80;
|
||||
}
|
||||
|
||||
h = *(u16 *)(q + 0x1A) + 0x400;
|
||||
*(u8 *)(q + 0x26) = *(u8 *)(q + 0x25);
|
||||
*(u16 *)(q + 0x1A) = h;
|
||||
*(u16 *)(q + 0x18) = h;
|
||||
|
||||
func_8012931C(param_1);
|
||||
|
||||
if (func_80128ED8((void *)q, (void *)(param_1 + 0x24)) != 0) {
|
||||
func_801292C8(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_8018A0B8);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_8018A170);
|
||||
|
||||
|
||||
@@ -52,7 +52,6 @@ extern s32 func_80165A50(s32);
|
||||
extern void func_80029514(s32);
|
||||
extern u8 D_800AF630[];
|
||||
extern u8 D_80078EC0;
|
||||
extern s32 D_80126B58;
|
||||
extern s32 func_80028FBC(void);
|
||||
extern s32 func_80029000(void);
|
||||
extern s32 func_80028D9C(void);
|
||||
@@ -76,7 +75,6 @@ extern s32 func_80146128(void);
|
||||
extern void func_80146360(void);
|
||||
extern void func_801463A0();
|
||||
extern void func_8014607C(void);
|
||||
extern s32 *D_80126B78;
|
||||
extern u8 D_80078EC1;
|
||||
extern s32 D_80078EC8;
|
||||
extern s32 D_8011F730;
|
||||
@@ -613,7 +611,6 @@ extern s32 func_8014E83C(s32 arg0, s16 * arg1, s16 * arg2);
|
||||
extern void func_8014E934(s32 _arg0);
|
||||
extern s32 func_8014EA4C(void *a0, void *a1, void *a2, s32 a3);
|
||||
extern s32 func_8014E98C(void *a0);
|
||||
extern u16 D_800B99DA;
|
||||
extern s32 D_801150D8;
|
||||
extern s16 D_801152AA;
|
||||
extern u8 D_80126720[];
|
||||
@@ -3575,7 +3572,60 @@ void func_801814D0(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_8018150C);
|
||||
|
||||
|
||||
|
||||
|
||||
// @class: regalloc-order
|
||||
// @stuck: none — MATCH (83 ins). $s3 is a dual-copy of iVar3 used only in the ==0 tail block; natural C coalesces to one $s0, so pin iVar3=$s0 and iVar3b=$s3 (different hard regs prevent gcc coalescing the copy). Also: outer+inner branch polarity inverted (if!=0 / if!=0 puts both short blocks at the tail as beqz targets); base = (int)D_801E1174 + idx*0x40 (materialize form, arg to callees).
|
||||
|
||||
extern void func_801465C0(void);
|
||||
extern void func_8001CD9C(int, void*);
|
||||
extern void func_800233CC(void*, unsigned short);
|
||||
extern void func_80181700(void*);
|
||||
extern void func_801816D0(s32*);
|
||||
extern int rand(void);
|
||||
|
||||
void func_8018150C(int param_1)
|
||||
{
|
||||
|
||||
extern unsigned char D_801E1174[];
|
||||
register int iVar3 __asm__("$16");
|
||||
register int iVar3b __asm__("$19");
|
||||
int iVar5;
|
||||
short sVar2;
|
||||
|
||||
iVar5 = (int)D_801E1174 + *(int *)(param_1 + 0x2c) * 0x40;
|
||||
iVar3 = ((int (*)(void))func_801465C0)();
|
||||
*(int *)(param_1 + 0x20) = iVar3;
|
||||
iVar3b = iVar3;
|
||||
if (iVar3 != 0) {
|
||||
((void (*)(int, int))func_8001CD9C)(iVar3, iVar5);
|
||||
((void (*)(int, int))func_800233CC)(iVar5, 0x10);
|
||||
((void (*)(int))func_80181700)(iVar5);
|
||||
*(unsigned int *)(iVar3 + 4) = *(unsigned int *)(iVar3 + 4) | 0x50000000;
|
||||
if (*(int *)(param_1 + 0x2c) != 0) {
|
||||
sVar2 = (rand() & 3) * 0x800 + 0x1000;
|
||||
*(short *)(iVar3 + 0x1a) = sVar2;
|
||||
*(short *)(iVar3 + 0x18) = sVar2;
|
||||
*(unsigned short *)(param_1 + 0x12) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x12) = -*(short *)(param_1 + 0x12);
|
||||
}
|
||||
*(unsigned short *)(param_1 + 0x1a) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x1a) = -*(short *)(param_1 + 0x1a);
|
||||
}
|
||||
} else {
|
||||
*(short *)(iVar3b + 0x1a) = 0x4000;
|
||||
*(short *)(iVar3b + 0x18) = 0x4000;
|
||||
}
|
||||
*(short *)(param_1 + 2) = *(short *)(param_1 + 2) + 1;
|
||||
} else {
|
||||
((void (*)(int))func_801816D0)(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_80181658);
|
||||
|
||||
|
||||
@@ -3825,7 +3825,60 @@ void func_801839F0(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_025/nonmatchings/ov_SC06_025_jr_8017BEBC", func_80183A2C);
|
||||
|
||||
|
||||
|
||||
|
||||
// @class: regalloc-order
|
||||
// @stuck: none — MATCH (83 ins). $s3 is a dual-copy of iVar3 used only in the ==0 tail block; natural C coalesces to one $s0, so pin iVar3=$s0 and iVar3b=$s3 (different hard regs prevent gcc coalescing the copy). Also: outer+inner branch polarity inverted (if!=0 / if!=0 puts both short blocks at the tail as beqz targets); base = (int)D_801B1BE4 + idx*0x40 (materialize form, arg to callees).
|
||||
|
||||
extern void func_801465C0(void);
|
||||
extern void func_8001CD9C(int, void*);
|
||||
extern void func_800233CC(void*, unsigned short);
|
||||
extern void func_80183C20(void*);
|
||||
extern void func_80183BF0(s32*);
|
||||
extern int rand(void);
|
||||
|
||||
void func_80183A2C(int param_1)
|
||||
{
|
||||
|
||||
extern unsigned char D_801B1BE4[];
|
||||
register int iVar3 __asm__("$16");
|
||||
register int iVar3b __asm__("$19");
|
||||
int iVar5;
|
||||
short sVar2;
|
||||
|
||||
iVar5 = (int)D_801B1BE4 + *(int *)(param_1 + 0x2c) * 0x40;
|
||||
iVar3 = ((int (*)(void))func_801465C0)();
|
||||
*(int *)(param_1 + 0x20) = iVar3;
|
||||
iVar3b = iVar3;
|
||||
if (iVar3 != 0) {
|
||||
((void (*)(int, int))func_8001CD9C)(iVar3, iVar5);
|
||||
((void (*)(int, int))func_800233CC)(iVar5, 0x10);
|
||||
((void (*)(int))func_80183C20)(iVar5);
|
||||
*(unsigned int *)(iVar3 + 4) = *(unsigned int *)(iVar3 + 4) | 0x50000000;
|
||||
if (*(int *)(param_1 + 0x2c) != 0) {
|
||||
sVar2 = (rand() & 3) * 0x800 + 0x1000;
|
||||
*(short *)(iVar3 + 0x1a) = sVar2;
|
||||
*(short *)(iVar3 + 0x18) = sVar2;
|
||||
*(unsigned short *)(param_1 + 0x12) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x12) = -*(short *)(param_1 + 0x12);
|
||||
}
|
||||
*(unsigned short *)(param_1 + 0x1a) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x1a) = -*(short *)(param_1 + 0x1a);
|
||||
}
|
||||
} else {
|
||||
*(short *)(iVar3b + 0x1a) = 0x4000;
|
||||
*(short *)(iVar3b + 0x18) = 0x4000;
|
||||
}
|
||||
*(short *)(param_1 + 2) = *(short *)(param_1 + 2) + 1;
|
||||
} else {
|
||||
((void (*)(int))func_80183BF0)(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_025/nonmatchings/ov_SC06_025_jr_8017BEBC", func_80183B78);
|
||||
|
||||
|
||||
@@ -4452,7 +4452,60 @@ void func_8018B574(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_029/nonmatchings/ov_SC06_029_jr_8017C954", func_8018B5B0);
|
||||
|
||||
|
||||
|
||||
|
||||
// @class: regalloc-order
|
||||
// @stuck: none — MATCH (83 ins). $s3 is a dual-copy of iVar3 used only in the ==0 tail block; natural C coalesces to one $s0, so pin iVar3=$s0 and iVar3b=$s3 (different hard regs prevent gcc coalescing the copy). Also: outer+inner branch polarity inverted (if!=0 / if!=0 puts both short blocks at the tail as beqz targets); base = (int)D_801E19A4 + idx*0x40 (materialize form, arg to callees).
|
||||
|
||||
extern void func_801465C0(void);
|
||||
extern void func_8001CD9C(int, void*);
|
||||
extern void func_800233CC(void*, unsigned short);
|
||||
extern void func_8018B7A4(void*);
|
||||
extern void func_8018B774(s32*);
|
||||
extern int rand(void);
|
||||
|
||||
void func_8018B5B0(int param_1)
|
||||
{
|
||||
|
||||
extern unsigned char D_801E19A4[];
|
||||
register int iVar3 __asm__("$16");
|
||||
register int iVar3b __asm__("$19");
|
||||
int iVar5;
|
||||
short sVar2;
|
||||
|
||||
iVar5 = (int)D_801E19A4 + *(int *)(param_1 + 0x2c) * 0x40;
|
||||
iVar3 = ((int (*)(void))func_801465C0)();
|
||||
*(int *)(param_1 + 0x20) = iVar3;
|
||||
iVar3b = iVar3;
|
||||
if (iVar3 != 0) {
|
||||
((void (*)(int, int))func_8001CD9C)(iVar3, iVar5);
|
||||
((void (*)(int, int))func_800233CC)(iVar5, 0x10);
|
||||
((void (*)(int))func_8018B7A4)(iVar5);
|
||||
*(unsigned int *)(iVar3 + 4) = *(unsigned int *)(iVar3 + 4) | 0x50000000;
|
||||
if (*(int *)(param_1 + 0x2c) != 0) {
|
||||
sVar2 = (rand() & 3) * 0x800 + 0x1000;
|
||||
*(short *)(iVar3 + 0x1a) = sVar2;
|
||||
*(short *)(iVar3 + 0x18) = sVar2;
|
||||
*(unsigned short *)(param_1 + 0x12) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x12) = -*(short *)(param_1 + 0x12);
|
||||
}
|
||||
*(unsigned short *)(param_1 + 0x1a) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x1a) = -*(short *)(param_1 + 0x1a);
|
||||
}
|
||||
} else {
|
||||
*(short *)(iVar3b + 0x1a) = 0x4000;
|
||||
*(short *)(iVar3b + 0x18) = 0x4000;
|
||||
}
|
||||
*(short *)(param_1 + 2) = *(short *)(param_1 + 2) + 1;
|
||||
} else {
|
||||
((void (*)(int))func_8018B774)(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_029/nonmatchings/ov_SC06_029_jr_8017C954", func_8018B6FC);
|
||||
|
||||
|
||||
@@ -52,7 +52,6 @@ extern s32 func_80165A50(s32);
|
||||
extern void func_80029514(s32);
|
||||
extern u8 D_800AF630[];
|
||||
extern u8 D_80078EC0;
|
||||
extern s32 D_80126B58;
|
||||
extern s32 func_80028FBC(void);
|
||||
extern s32 func_80029000(void);
|
||||
extern s32 func_80028D9C(void);
|
||||
@@ -76,7 +75,6 @@ extern s32 func_80146128(void);
|
||||
extern void func_80146360(void);
|
||||
extern void func_801463A0();
|
||||
extern void func_8014607C(void);
|
||||
extern s32 *D_80126B78;
|
||||
extern u8 D_80078EC1;
|
||||
extern s32 D_80078EC8;
|
||||
extern s32 D_8011F730;
|
||||
@@ -613,7 +611,6 @@ extern s32 func_8014E83C(s32 arg0, s16 * arg1, s16 * arg2);
|
||||
extern void func_8014E934(s32 _arg0);
|
||||
extern s32 func_8014EA4C(void *a0, void *a1, void *a2, s32 a3);
|
||||
extern s32 func_8014E98C(void *a0);
|
||||
extern u16 D_800B99DA;
|
||||
extern s32 D_801150D8;
|
||||
extern s16 D_801152AA;
|
||||
extern u8 D_80126720[];
|
||||
@@ -3377,7 +3374,60 @@ void func_8017DF40(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_032/nonmatchings/ov_SC06_032_jr_8017C24C", func_8017DF7C);
|
||||
|
||||
|
||||
|
||||
|
||||
// @class: regalloc-order
|
||||
// @stuck: none — MATCH (83 ins). $s3 is a dual-copy of iVar3 used only in the ==0 tail block; natural C coalesces to one $s0, so pin iVar3=$s0 and iVar3b=$s3 (different hard regs prevent gcc coalescing the copy). Also: outer+inner branch polarity inverted (if!=0 / if!=0 puts both short blocks at the tail as beqz targets); base = (int)D_801D04FC + idx*0x40 (materialize form, arg to callees).
|
||||
|
||||
extern void func_801465C0(void);
|
||||
extern void func_8001CD9C(int, void*);
|
||||
extern void func_800233CC(void*, unsigned short);
|
||||
extern void func_8017E170(void*);
|
||||
extern void func_8017E140(s32*);
|
||||
extern int rand(void);
|
||||
|
||||
void func_8017DF7C(int param_1)
|
||||
{
|
||||
|
||||
extern unsigned char D_801D04FC[];
|
||||
register int iVar3 __asm__("$16");
|
||||
register int iVar3b __asm__("$19");
|
||||
int iVar5;
|
||||
short sVar2;
|
||||
|
||||
iVar5 = (int)D_801D04FC + *(int *)(param_1 + 0x2c) * 0x40;
|
||||
iVar3 = ((int (*)(void))func_801465C0)();
|
||||
*(int *)(param_1 + 0x20) = iVar3;
|
||||
iVar3b = iVar3;
|
||||
if (iVar3 != 0) {
|
||||
((void (*)(int, int))func_8001CD9C)(iVar3, iVar5);
|
||||
((void (*)(int, int))func_800233CC)(iVar5, 0x10);
|
||||
((void (*)(int))func_8017E170)(iVar5);
|
||||
*(unsigned int *)(iVar3 + 4) = *(unsigned int *)(iVar3 + 4) | 0x50000000;
|
||||
if (*(int *)(param_1 + 0x2c) != 0) {
|
||||
sVar2 = (rand() & 3) * 0x800 + 0x1000;
|
||||
*(short *)(iVar3 + 0x1a) = sVar2;
|
||||
*(short *)(iVar3 + 0x18) = sVar2;
|
||||
*(unsigned short *)(param_1 + 0x12) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x12) = -*(short *)(param_1 + 0x12);
|
||||
}
|
||||
*(unsigned short *)(param_1 + 0x1a) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x1a) = -*(short *)(param_1 + 0x1a);
|
||||
}
|
||||
} else {
|
||||
*(short *)(iVar3b + 0x1a) = 0x4000;
|
||||
*(short *)(iVar3b + 0x18) = 0x4000;
|
||||
}
|
||||
*(short *)(param_1 + 2) = *(short *)(param_1 + 2) + 1;
|
||||
} else {
|
||||
((void (*)(int))func_8017E140)(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_032/nonmatchings/ov_SC06_032_jr_8017C24C", func_8017E0C8);
|
||||
|
||||
|
||||
@@ -52,7 +52,6 @@ extern s32 func_80165A50(s32);
|
||||
extern void func_80029514(s32);
|
||||
extern u8 D_800AF630[];
|
||||
extern u8 D_80078EC0;
|
||||
extern s32 D_80126B58;
|
||||
extern s32 func_80028FBC(void);
|
||||
extern s32 func_80029000(void);
|
||||
extern s32 func_80028D9C(void);
|
||||
@@ -76,7 +75,6 @@ extern s32 func_80146128(void);
|
||||
extern void func_80146360(void);
|
||||
extern void func_801463A0();
|
||||
extern void func_8014607C(void);
|
||||
extern s32 *D_80126B78;
|
||||
extern u8 D_80078EC1;
|
||||
extern s32 D_80078EC8;
|
||||
extern s32 D_8011F730;
|
||||
@@ -613,7 +611,6 @@ extern s32 func_8014E83C(s32 arg0, s16 * arg1, s16 * arg2);
|
||||
extern void func_8014E934(s32 _arg0);
|
||||
extern s32 func_8014EA4C(void *a0, void *a1, void *a2, s32 a3);
|
||||
extern s32 func_8014E98C(void *a0);
|
||||
extern u16 D_800B99DA;
|
||||
extern s32 D_801150D8;
|
||||
extern s16 D_801152AA;
|
||||
extern u8 D_80126720[];
|
||||
@@ -3438,7 +3435,60 @@ void func_8017EAC8(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_033/nonmatchings/ov_SC06_033_jr_8017C24C", func_8017EB04);
|
||||
|
||||
|
||||
|
||||
|
||||
// @class: regalloc-order
|
||||
// @stuck: none — MATCH (83 ins). $s3 is a dual-copy of iVar3 used only in the ==0 tail block; natural C coalesces to one $s0, so pin iVar3=$s0 and iVar3b=$s3 (different hard regs prevent gcc coalescing the copy). Also: outer+inner branch polarity inverted (if!=0 / if!=0 puts both short blocks at the tail as beqz targets); base = (int)D_801D05BC + idx*0x40 (materialize form, arg to callees).
|
||||
|
||||
extern void func_801465C0(void);
|
||||
extern void func_8001CD9C(int, void*);
|
||||
extern void func_800233CC(void*, unsigned short);
|
||||
extern void func_8017ECF8(void*);
|
||||
extern void func_8017ECC8(s32*);
|
||||
extern int rand(void);
|
||||
|
||||
void func_8017EB04(int param_1)
|
||||
{
|
||||
|
||||
extern unsigned char D_801D05BC[];
|
||||
register int iVar3 __asm__("$16");
|
||||
register int iVar3b __asm__("$19");
|
||||
int iVar5;
|
||||
short sVar2;
|
||||
|
||||
iVar5 = (int)D_801D05BC + *(int *)(param_1 + 0x2c) * 0x40;
|
||||
iVar3 = ((int (*)(void))func_801465C0)();
|
||||
*(int *)(param_1 + 0x20) = iVar3;
|
||||
iVar3b = iVar3;
|
||||
if (iVar3 != 0) {
|
||||
((void (*)(int, int))func_8001CD9C)(iVar3, iVar5);
|
||||
((void (*)(int, int))func_800233CC)(iVar5, 0x10);
|
||||
((void (*)(int))func_8017ECF8)(iVar5);
|
||||
*(unsigned int *)(iVar3 + 4) = *(unsigned int *)(iVar3 + 4) | 0x50000000;
|
||||
if (*(int *)(param_1 + 0x2c) != 0) {
|
||||
sVar2 = (rand() & 3) * 0x800 + 0x1000;
|
||||
*(short *)(iVar3 + 0x1a) = sVar2;
|
||||
*(short *)(iVar3 + 0x18) = sVar2;
|
||||
*(unsigned short *)(param_1 + 0x12) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x12) = -*(short *)(param_1 + 0x12);
|
||||
}
|
||||
*(unsigned short *)(param_1 + 0x1a) = (rand() & 0xf) + 3;
|
||||
if ((rand() & 1) != 0) {
|
||||
*(short *)(param_1 + 0x1a) = -*(short *)(param_1 + 0x1a);
|
||||
}
|
||||
} else {
|
||||
*(short *)(iVar3b + 0x1a) = 0x4000;
|
||||
*(short *)(iVar3b + 0x18) = 0x4000;
|
||||
}
|
||||
*(short *)(param_1 + 2) = *(short *)(param_1 + 2) + 1;
|
||||
} else {
|
||||
((void (*)(int))func_8017ECC8)(param_1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC06_033/nonmatchings/ov_SC06_033_jr_8017C24C", func_8017EC50);
|
||||
|
||||
|
||||
Reference in New Issue
Block a user