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feat(phase-30 S38/S2): jr-family sweep — func_80181CE4 x3 sibling slots
jtbl_family_bank (the §53 carve path; family_sweep --hseq refuses has_mid_jr families BY DESIGN — a 0% from the carve-less tool is an artifact, not a wall). Each sibling individually byte-gated: carve -> extract -> remap -> whole-binary build, kept iff byte-identical else reverted. Committed per family because jtbl_family_bank requires a clean tree between families. R22 clean-fleet runs once over the batch.
This commit is contained in:
Drew T
+3
-3
@@ -2703,7 +2703,7 @@ ov_SC03_117_ELF := $(ov_SC03_117_OUT).elf
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ov_SC03_117_MAPFILE := $(ov_SC03_117_OUT).map
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ov_SC03_117_LD_SCRIPT := $(ov_SC03_117_OUT).ld
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ov_SC03_117_SPLAT_YAML := config/splat.ov_SC03_117.yaml
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ov_SC03_117_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_117.o,ov_SC03_117_jr_8012ACE0.o,tail2.data.o,ov_SC03_117_jr_80135888.o,tail3.data.o,ov_SC03_117_jr_80135A4C.o,tail4.data.o,ov_SC03_117_jr_80135D20.o,tail5.data.o,ov_SC03_117_jr_801380E0.o,ov_SC03_117_o0c.o,tail6.data.o,ov_SC03_117_jr_8013F350.o,tail7.data.o,ov_SC03_117_jr_8013FFD8.o,tail8.data.o,ov_SC03_117_jr_80140608.o,tail9.data.o,ov_SC03_117_jr_8015444C.o,ov_SC03_117_jr_80154C24.o,ov_SC03_117_jr_801588CC.o,ov_SC03_117_jr_80159C84.o,tail10.data.o,ov_SC03_117_jr_8015A3C8.o,tail11.data.o,ov_SC03_117_jr_8015AE2C.o,tail12.data.o,ov_SC03_117_jr_8015C32C.o,tail13.data.o,ov_SC03_117_jr_8016AB6C.o,tail14.data.o,ov_SC03_117_jr_80171B4C.o,ov_SC03_117_jr_801734BC.o,tail15.data.o,ov_SC03_117_jr_801789AC.o,ov_SC03_117_jr_80178D40.o,tail16.data.o,ov_SC03_117_jr_8017A4AC.o,tail17.data.o,ov_SC03_117_jr_8017AE2C.o,ov_SC03_117_jr_8017BEBC.o,tail18.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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ov_SC03_117_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_117.o,ov_SC03_117_jr_8012ACE0.o,tail2.data.o,ov_SC03_117_jr_80135888.o,tail3.data.o,ov_SC03_117_jr_80135A4C.o,tail4.data.o,ov_SC03_117_jr_80135D20.o,tail5.data.o,ov_SC03_117_jr_801380E0.o,ov_SC03_117_o0c.o,tail6.data.o,ov_SC03_117_jr_8013F350.o,tail7.data.o,ov_SC03_117_jr_8013FFD8.o,tail8.data.o,ov_SC03_117_jr_80140608.o,tail9.data.o,ov_SC03_117_jr_8015444C.o,ov_SC03_117_jr_80154C24.o,ov_SC03_117_jr_801588CC.o,ov_SC03_117_jr_80159C84.o,tail10.data.o,ov_SC03_117_jr_8015A3C8.o,tail11.data.o,ov_SC03_117_jr_8015AE2C.o,tail12.data.o,ov_SC03_117_jr_8015C32C.o,tail13.data.o,ov_SC03_117_jr_8016AB6C.o,tail14.data.o,ov_SC03_117_jr_80171B4C.o,ov_SC03_117_jr_801734BC.o,tail15.data.o,ov_SC03_117_jr_801789AC.o,ov_SC03_117_jr_80178D40.o,tail16.data.o,ov_SC03_117_jr_8017A4AC.o,tail17.data.o,ov_SC03_117_jr_8017AE2C.o,ov_SC03_117_jr_8017BEBC.o,tail18.data.o,ov_SC03_117_jr_80181C80.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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build/src/ov_SC03_117/ov_SC03_117.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
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build/src/ov_SC03_117/ov_SC03_117_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
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build/src/ov_SC03_117/ov_SC03_117_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
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@@ -2738,7 +2738,7 @@ ov_SC03_118_ELF := $(ov_SC03_118_OUT).elf
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ov_SC03_118_MAPFILE := $(ov_SC03_118_OUT).map
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ov_SC03_118_LD_SCRIPT := $(ov_SC03_118_OUT).ld
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ov_SC03_118_SPLAT_YAML := config/splat.ov_SC03_118.yaml
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ov_SC03_118_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_118.o,ov_SC03_118_jr_8012ACE0.o,tail2.data.o,ov_SC03_118_jr_80135888.o,tail3.data.o,ov_SC03_118_jr_80135A4C.o,tail4.data.o,ov_SC03_118_jr_80135D20.o,tail5.data.o,ov_SC03_118_jr_801380E0.o,ov_SC03_118_o0c.o,tail6.data.o,ov_SC03_118_jr_8013F350.o,tail7.data.o,ov_SC03_118_jr_8013FFD8.o,tail8.data.o,ov_SC03_118_jr_80140608.o,tail9.data.o,ov_SC03_118_jr_8015444C.o,ov_SC03_118_jr_80154C24.o,ov_SC03_118_jr_801588CC.o,ov_SC03_118_jr_80159C84.o,tail10.data.o,ov_SC03_118_jr_8015A3C8.o,tail11.data.o,ov_SC03_118_jr_8015AE2C.o,tail12.data.o,ov_SC03_118_jr_8015C32C.o,tail13.data.o,ov_SC03_118_jr_8016AB6C.o,tail14.data.o,ov_SC03_118_jr_80171B4C.o,ov_SC03_118_jr_801734BC.o,tail15.data.o,ov_SC03_118_jr_801789AC.o,ov_SC03_118_jr_80178D40.o,tail16.data.o,ov_SC03_118_jr_8017A4AC.o,tail17.data.o,ov_SC03_118_jr_8017AE2C.o,tail18.data.o,ov_SC03_118_jr_8017FB84.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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ov_SC03_118_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_118.o,ov_SC03_118_jr_8012ACE0.o,tail2.data.o,ov_SC03_118_jr_80135888.o,tail3.data.o,ov_SC03_118_jr_80135A4C.o,tail4.data.o,ov_SC03_118_jr_80135D20.o,tail5.data.o,ov_SC03_118_jr_801380E0.o,ov_SC03_118_o0c.o,tail6.data.o,ov_SC03_118_jr_8013F350.o,tail7.data.o,ov_SC03_118_jr_8013FFD8.o,tail8.data.o,ov_SC03_118_jr_80140608.o,tail9.data.o,ov_SC03_118_jr_8015444C.o,ov_SC03_118_jr_80154C24.o,ov_SC03_118_jr_801588CC.o,ov_SC03_118_jr_80159C84.o,tail10.data.o,ov_SC03_118_jr_8015A3C8.o,tail11.data.o,ov_SC03_118_jr_8015AE2C.o,tail12.data.o,ov_SC03_118_jr_8015C32C.o,tail13.data.o,ov_SC03_118_jr_8016AB6C.o,tail14.data.o,ov_SC03_118_jr_80171B4C.o,ov_SC03_118_jr_801734BC.o,tail15.data.o,ov_SC03_118_jr_801789AC.o,ov_SC03_118_jr_80178D40.o,tail16.data.o,ov_SC03_118_jr_8017A4AC.o,tail17.data.o,ov_SC03_118_jr_8017AE2C.o,tail18.data.o,ov_SC03_118_jr_8017FB84.o,tail19.data.o,ov_SC03_118_jr_801863CC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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build/src/ov_SC03_118/ov_SC03_118.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
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build/src/ov_SC03_118/ov_SC03_118_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
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build/src/ov_SC03_118/ov_SC03_118_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
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@@ -2773,7 +2773,7 @@ ov_SC03_119_ELF := $(ov_SC03_119_OUT).elf
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ov_SC03_119_MAPFILE := $(ov_SC03_119_OUT).map
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ov_SC03_119_LD_SCRIPT := $(ov_SC03_119_OUT).ld
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ov_SC03_119_SPLAT_YAML := config/splat.ov_SC03_119.yaml
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ov_SC03_119_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_119.o,ov_SC03_119_jr_8012ACE0.o,tail2.data.o,ov_SC03_119_jr_80135888.o,tail3.data.o,ov_SC03_119_jr_80135A4C.o,tail4.data.o,ov_SC03_119_jr_80135D20.o,tail5.data.o,ov_SC03_119_jr_801380E0.o,ov_SC03_119_o0c.o,tail6.data.o,ov_SC03_119_jr_8013F350.o,tail7.data.o,ov_SC03_119_jr_8013FFD8.o,tail8.data.o,ov_SC03_119_jr_80140608.o,tail9.data.o,ov_SC03_119_jr_8015444C.o,ov_SC03_119_jr_80154C24.o,ov_SC03_119_jr_801588CC.o,ov_SC03_119_jr_80159C84.o,tail10.data.o,ov_SC03_119_jr_8015A3C8.o,tail11.data.o,ov_SC03_119_jr_8015AE2C.o,tail12.data.o,ov_SC03_119_jr_8015C32C.o,tail13.data.o,ov_SC03_119_jr_8016AB6C.o,tail14.data.o,ov_SC03_119_jr_80171B4C.o,ov_SC03_119_jr_801734BC.o,tail15.data.o,ov_SC03_119_jr_801789AC.o,ov_SC03_119_jr_80178D40.o,tail16.data.o,ov_SC03_119_jr_8017A4AC.o,tail17.data.o,ov_SC03_119_jr_8017AE2C.o,tail18.data.o,ov_SC03_119_jr_8017FB84.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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ov_SC03_119_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_119.o,ov_SC03_119_jr_8012ACE0.o,tail2.data.o,ov_SC03_119_jr_80135888.o,tail3.data.o,ov_SC03_119_jr_80135A4C.o,tail4.data.o,ov_SC03_119_jr_80135D20.o,tail5.data.o,ov_SC03_119_jr_801380E0.o,ov_SC03_119_o0c.o,tail6.data.o,ov_SC03_119_jr_8013F350.o,tail7.data.o,ov_SC03_119_jr_8013FFD8.o,tail8.data.o,ov_SC03_119_jr_80140608.o,tail9.data.o,ov_SC03_119_jr_8015444C.o,ov_SC03_119_jr_80154C24.o,ov_SC03_119_jr_801588CC.o,ov_SC03_119_jr_80159C84.o,tail10.data.o,ov_SC03_119_jr_8015A3C8.o,tail11.data.o,ov_SC03_119_jr_8015AE2C.o,tail12.data.o,ov_SC03_119_jr_8015C32C.o,tail13.data.o,ov_SC03_119_jr_8016AB6C.o,tail14.data.o,ov_SC03_119_jr_80171B4C.o,ov_SC03_119_jr_801734BC.o,tail15.data.o,ov_SC03_119_jr_801789AC.o,ov_SC03_119_jr_80178D40.o,tail16.data.o,ov_SC03_119_jr_8017A4AC.o,tail17.data.o,ov_SC03_119_jr_8017AE2C.o,tail18.data.o,ov_SC03_119_jr_8017FB84.o,tail19.data.o,ov_SC03_119_jr_801863CC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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build/src/ov_SC03_119/ov_SC03_119.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
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build/src/ov_SC03_119/ov_SC03_119_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
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build/src/ov_SC03_119/ov_SC03_119_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
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@@ -121,6 +121,7 @@ segments:
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- [0x52354, c, ov_SC03_117_jr_8017A4AC]
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- [0x52cd4, c, ov_SC03_117_jr_8017AE2C]
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- [0x53d64, c, ov_SC03_117_jr_8017BEBC]
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- [0x59b28, c, ov_SC03_117_jr_80181C80]
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- [0x5c718, data, tail]
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- [0xa3c1c, .rodata, ov_SC03_117] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0xa3cf8, .rodata, ov_SC03_117_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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@@ -164,6 +165,8 @@ segments:
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- [0xa4d3c, .rodata, ov_SC03_117_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0xa4d50, .rodata, ov_SC03_117_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0xa4d70, data, tail18]
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- [0xa4db0, .rodata, ov_SC03_117_jr_80181C80] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0xa4e18, data, tail19]
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- [0xA67EC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
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- [0xA67EF] # EOF marker = the 0.4.dec byte length
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# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
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@@ -121,6 +121,7 @@ segments:
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- [0x52354, c, ov_SC03_118_jr_8017A4AC]
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- [0x52cd4, c, ov_SC03_118_jr_8017AE2C]
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- [0x57a2c, c, ov_SC03_118_jr_8017FB84]
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- [0x5e274, c, ov_SC03_118_jr_801863CC]
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- [0x617c4, data, tail]
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- [0xa9b78, .rodata, ov_SC03_118] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0xa9c54, .rodata, ov_SC03_118_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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@@ -165,6 +166,8 @@ segments:
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- [0xaacac, data, tail18]
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- [0xaacd8, .rodata, ov_SC03_118_jr_8017FB84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0xaacf8, data, tail19]
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- [0xaad00, .rodata, ov_SC03_118_jr_801863CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0xaad68, data, tail20]
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- [0xAC6F4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
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- [0xAC6F7] # EOF marker = the 0.4.dec byte length
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# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
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@@ -121,6 +121,7 @@ segments:
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- [0x52354, c, ov_SC03_119_jr_8017A4AC]
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- [0x52cd4, c, ov_SC03_119_jr_8017AE2C]
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- [0x57a2c, c, ov_SC03_119_jr_8017FB84]
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- [0x5e274, c, ov_SC03_119_jr_801863CC]
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- [0x617c4, data, tail]
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- [0xa9b78, .rodata, ov_SC03_119] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0xa9c54, .rodata, ov_SC03_119_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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@@ -165,6 +166,8 @@ segments:
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- [0xaacac, data, tail18]
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- [0xaacd8, .rodata, ov_SC03_119_jr_8017FB84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0xaacf8, data, tail19]
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- [0xaad00, .rodata, ov_SC03_119_jr_801863CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0xaad68, data, tail20]
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- [0xAC6F4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
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- [0xAC6F7] # EOF marker = the 0.4.dec byte length
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# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
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@@ -4635,946 +4635,3 @@ void func_801819C4(void *a0) {
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INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80181A30);
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INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80181C80);
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extern s32 func_8004787C(s32 a0);
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extern s32 func_80047948(s32 a0);
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extern void func_80049CAC(s32 a0, s32 a1);
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extern void func_8012C218(void *a0);
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extern s32 func_8012CEB0(s32 a0, s32 a1, s32 a2);
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#define SRM_80186B78(r0) __asm__ __volatile__( \
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"lw $12, 0(%0)\n" \
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"lw $13, 4(%0)\n" \
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"ctc2 $12, $0\n" \
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"ctc2 $13, $1\n" \
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"lw $12, 8(%0)\n" \
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"lw $13, 12(%0)\n" \
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"lw $14, 16(%0)\n" \
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"ctc2 $12, $2\n" \
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"ctc2 $13, $3\n" \
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"ctc2 $14, $4\n" \
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: : "r"(r0) : "$12", "$13", "$14", "memory")
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#define STM_80186B78(r0) __asm__ __volatile__( \
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"lw $12, 20(%0)\n" \
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"lw $13, 24(%0)\n" \
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"ctc2 $12, $5\n" \
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"lw $14, 28(%0)\n" \
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"ctc2 $13, $6\n" \
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"ctc2 $14, $7\n" \
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: : "r"(r0) : "$12", "$13", "$14", "memory")
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void func_8018242C(s32 a0)
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{
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u16 out[4]; /* sp+0x10 */
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s16 sv[4]; /* sp+0x18 */
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s16 pos[4]; /* sp+0x20 */
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s32 flag; /* sp+0x28 */
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s16 *p;
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if (*(s16 *)(*(s32 *)(a0 + 0x64) + 0x36) != *(s16 *)(a0 + 0xFE)) {
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((void (*)(void))func_8012C218)();
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return;
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}
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if (*(s16 *)(a0 + 0x70) == 1 || *(s16 *)(a0 + 0x70) == 8) {
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s32 ang;
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s32 t;
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ang = (*(u16 *)(a0 + 0xFC) + 0x40) & 0xFFF;
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p = *(s16 **)(a0 + 0xCC);
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*(s16 *)(a0 + 0xFC) = ang;
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t = (func_8004787C(ang) >> 6) + 0xBF;
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p[2] = t;
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p[1] = t;
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p[0] = t;
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}
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if (*(s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 4) < 0) {
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{ register s32 *q __asm__("$3"); q = *(s32 **)(a0 + 0x20);
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q[1] = q[1] | 0x80000000; }
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} else {
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__asm__ __volatile__("");
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*(s32 *)(*(s32 *)(a0 + 0x20) + 4) =
|
||||
*(s32 *)(*(s32 *)(a0 + 0x20) + 4) & 0x7FFFFFFF;
|
||||
}
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) =
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x18);
|
||||
|
||||
if (*(s16 *)(*(s32 *)(a0 + 0x64) + 0x70) < 8) {
|
||||
*(s16 *)(a0 + 0x108) = (*(u16 *)(a0 + 0x108) + 0x40) & 0xFFF;
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) & 0xFFF;
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12) & 0xFFF;
|
||||
|
||||
flag = *(s16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12) -
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12);
|
||||
if (flag > 0x800) {
|
||||
flag = flag - 0x1000;
|
||||
}
|
||||
if (flag < -0x800) {
|
||||
flag = flag + 0x1000;
|
||||
}
|
||||
if (flag > 0x200) {
|
||||
s32 t = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) - 0x200;
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) = t + flag;
|
||||
} else if (flag < -0x200) {
|
||||
s32 t = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + 0x200;
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) = t + flag;
|
||||
} else {
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + (flag / 16);
|
||||
}
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) +
|
||||
(func_8004787C(*(s16 *)(a0 + 0x108)) >> 6);
|
||||
|
||||
func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
|
||||
SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
|
||||
STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
|
||||
|
||||
p = *(s16 **)(a0 + 0xD0);
|
||||
sv[0] = 0;
|
||||
sv[1] = 0;
|
||||
sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
|
||||
RotTransSV(sv, out, &flag);
|
||||
|
||||
*(s16 *)(a0 + 6) = out[0];
|
||||
*(s16 *)(a0 + 0xA) = out[1];
|
||||
*(s16 *)(a0 + 0xE) = out[2];
|
||||
out[1] = out[1] - 0x40;
|
||||
|
||||
pos[0] = *(u16 *)(a0 + 6);
|
||||
pos[1] = *(u16 *)(a0 + 0xA) + 0x10;
|
||||
pos[2] = *(u16 *)(a0 + 0xE);
|
||||
flag = func_8012CEB0((s32)out, (s32)pos, 1);
|
||||
if (flag & 0x1000) {
|
||||
return;
|
||||
}
|
||||
if (flag != 0) {
|
||||
s32 d;
|
||||
s32 t = pos[1] - 0x10;
|
||||
d = *(s16 *)(a0 + 0xA) - t;
|
||||
if (d < 5) {
|
||||
return;
|
||||
}
|
||||
if (d > 0x40) {
|
||||
d = 0x40;
|
||||
}
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) + (d << 4);
|
||||
|
||||
func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
|
||||
SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
|
||||
STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
|
||||
|
||||
p = *(s16 **)(a0 + 0xD0);
|
||||
sv[0] = 0;
|
||||
sv[1] = 0;
|
||||
sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
|
||||
RotTransSV(sv, out, &flag);
|
||||
|
||||
*(s16 *)(a0 + 6) = out[0];
|
||||
*(s16 *)(a0 + 0xA) = out[1];
|
||||
*(s16 *)(a0 + 0xE) = out[2];
|
||||
} else {
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) - 0x80;
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) & 0xFFF;
|
||||
if ((u32)(*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) - 0x801) < 0x3FF) {
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = 0xC00;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
s32 ang;
|
||||
s32 ang2;
|
||||
|
||||
ang = (*(u16 *)(a0 + 0x102) + *(u16 *)(a0 + 0x106)) & 0xFFF;
|
||||
*(s16 *)(a0 + 0x102) = ang;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = func_80047948(ang) >> 6;
|
||||
|
||||
ang2 = (*(u16 *)(a0 + 0x104) + *(u16 *)(a0 + 0x100)) & 0xFFF;
|
||||
*(s16 *)(a0 + 0x104) = ang2;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x14) = func_80047948(ang2) >> 6;
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) + 0xC00;
|
||||
|
||||
func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
|
||||
SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
|
||||
STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
|
||||
|
||||
p = *(s16 **)(a0 + 0xD0);
|
||||
sv[0] = 0;
|
||||
sv[1] = 0;
|
||||
sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
|
||||
RotTransSV(sv, out, &flag);
|
||||
|
||||
*(s16 *)(a0 + 6) = out[0];
|
||||
*(s16 *)(a0 + 0xA) = out[1];
|
||||
*(s16 *)(a0 + 0xE) = out[2];
|
||||
}
|
||||
{ s32 pad[2]; } /* LEVER 1: frame pad. INNER-BLOCK + LAST is load-bearing --
|
||||
a function-scope decl takes 0x28 and evicts flag to 0x30 */
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80182A34);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80182B68);
|
||||
|
||||
extern s32 func_8004787C(s32 a0);
|
||||
extern s32 func_80047948(s32 a0);
|
||||
extern void func_80049CAC(s32 a0, s32 a1);
|
||||
extern void func_8012C218(void *a0);
|
||||
#define SRM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 0(%0)\n" \
|
||||
"lw $13, 4(%0)\n" \
|
||||
"ctc2 $12, $0\n" \
|
||||
"ctc2 $13, $1\n" \
|
||||
"lw $12, 8(%0)\n" \
|
||||
"lw $13, 12(%0)\n" \
|
||||
"lw $14, 16(%0)\n" \
|
||||
"ctc2 $12, $2\n" \
|
||||
"ctc2 $13, $3\n" \
|
||||
"ctc2 $14, $4\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
#define STM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 20(%0)\n" \
|
||||
"lw $13, 24(%0)\n" \
|
||||
"ctc2 $12, $5\n" \
|
||||
"lw $14, 28(%0)\n" \
|
||||
"ctc2 $13, $6\n" \
|
||||
"ctc2 $14, $7\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
#define SRM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 0(%0)\n" \
|
||||
"lw $13, 4(%0)\n" \
|
||||
"ctc2 $12, $0\n" \
|
||||
"ctc2 $13, $1\n" \
|
||||
"lw $12, 8(%0)\n" \
|
||||
"lw $13, 12(%0)\n" \
|
||||
"lw $14, 16(%0)\n" \
|
||||
"ctc2 $12, $2\n" \
|
||||
"ctc2 $13, $3\n" \
|
||||
"ctc2 $14, $4\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
#define STM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 20(%0)\n" \
|
||||
"lw $13, 24(%0)\n" \
|
||||
"ctc2 $12, $5\n" \
|
||||
"lw $14, 28(%0)\n" \
|
||||
"ctc2 $13, $6\n" \
|
||||
"ctc2 $14, $7\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
|
||||
void func_80182F28(s32 a0)
|
||||
{
|
||||
u16 out[4]; /* sp+0x10 */
|
||||
s16 sv[4]; /* sp+0x18 */
|
||||
s16 pos[4]; /* sp+0x20 */
|
||||
s32 flag; /* sp+0x28 */
|
||||
s16 *p;
|
||||
|
||||
if (*(s16 *)(*(s32 *)(a0 + 0x64) + 0x36) != *(s16 *)(a0 + 0xFE)) {
|
||||
((void (*)(void))func_8012C218)();
|
||||
return;
|
||||
}
|
||||
|
||||
if (*(s16 *)(a0 + 0x70) == 0x11) {
|
||||
s32 ang;
|
||||
s32 t;
|
||||
ang = (*(u16 *)(a0 + 0xFC) + 0x40) & 0xFFF;
|
||||
p = *(s16 **)(a0 + 0xCC);
|
||||
*(s16 *)(a0 + 0xFC) = ang;
|
||||
t = (func_8004787C(ang) >> 6) + 0xBF;
|
||||
p[2] = t;
|
||||
p[1] = t;
|
||||
p[0] = t;
|
||||
}
|
||||
|
||||
if (*(s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 4) < 0) {
|
||||
{ register s32 *q __asm__("$3"); q = *(s32 **)(a0 + 0x20);
|
||||
q[1] = q[1] | 0x80000000; }
|
||||
} else {
|
||||
__asm__ __volatile__("");
|
||||
*(s32 *)(*(s32 *)(a0 + 0x20) + 4) =
|
||||
*(s32 *)(*(s32 *)(a0 + 0x20) + 4) & 0x7FFFFFFF;
|
||||
}
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) =
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x18);
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x14) =
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x14);
|
||||
|
||||
{
|
||||
s32 ang;
|
||||
s32 ang2;
|
||||
|
||||
ang = (*(u16 *)(a0 + 0x102) + *(u16 *)(a0 + 0x106)) & 0xFFF;
|
||||
*(s16 *)(a0 + 0x102) = ang;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = func_80047948(ang) >> 3;
|
||||
|
||||
ang2 = (*(u16 *)(a0 + 0x104) + *(u16 *)(a0 + 0x100)) & 0xFFF;
|
||||
*(s16 *)(a0 + 0x104) = ang2;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12) = func_80047948(ang2) >> 3;
|
||||
|
||||
func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
|
||||
SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
|
||||
STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
|
||||
|
||||
p = *(s16 **)(a0 + 0xD0);
|
||||
sv[0] = 0;
|
||||
sv[1] = 0;
|
||||
sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
|
||||
RotTransSV(sv, out, &flag);
|
||||
|
||||
*(s16 *)(a0 + 6) = out[0];
|
||||
*(s16 *)(a0 + 0xA) = out[1];
|
||||
*(s16 *)(a0 + 0xE) = out[2];
|
||||
}
|
||||
{ s32 pad[2]; } /* LEVER 1: frame pad -- matches func_80186B78's byte-verified 8-byte
|
||||
trailing dead local (docs/matching-cookbook.md §136 L6). */
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_8018316C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_8018321C);
|
||||
|
||||
|
||||
extern void (*D_801C3740[])(void);
|
||||
|
||||
void func_80183300(void *a0) {
|
||||
D_801C3740[*(u16 *)((s32)a0 + 0x2)]();
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_8018333C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_801833A0);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80183434);
|
||||
|
||||
extern void func_8012E688(s32 arg0, s32 arg1, s32 arg2);
|
||||
void func_8018355C(void *param) {
|
||||
if (*(s16 *)((char *)param + 0x76) > 0) {
|
||||
func_8012E688((s32)param, 0x8C6, 0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
extern void func_8012E688(s32 arg0, s32 arg1, s32 arg2);
|
||||
extern void func_8002AC00(s32 arg0);
|
||||
void func_8018358C(void *arg0) {
|
||||
func_8012E688((s32)arg0, 0x8C7, 0);
|
||||
func_8002AC00(0x10);
|
||||
}
|
||||
|
||||
|
||||
void func_801835B8(void) {
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_801835C0);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_801836AC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_8018372C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_801837E0);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_801838C0);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80183928);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80183988);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80183A18);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80183A8C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80183ADC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80183B5C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80183BFC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80183CCC);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
extern void func_8012C218(void *a0);
|
||||
void func_80183D60(void *a0)
|
||||
{
|
||||
register s32 v0 __asm__("$2");
|
||||
register s32 v1 __asm__("$3");
|
||||
v0 = (*((s32 *) (((s32) a0) + 0x8)) = (*((s32 *) (((s32) a0) + 0x8))) + 0x40000);
|
||||
v1 = 0x400000;
|
||||
if (v1 < v0)
|
||||
{
|
||||
v1 = v1 / 65536;
|
||||
((s32 (*)(s32)) func_8012C218)((s32) a0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80183D9C);
|
||||
|
||||
|
||||
extern void func_8001CD50(s32 a0, s32 a1);
|
||||
extern void func_800233CC(void *, unsigned short);
|
||||
|
||||
void func_80183E84(void *a0)
|
||||
{
|
||||
|
||||
extern u8 D_801CE6D8[];
|
||||
s32 s1;
|
||||
u8 *p;
|
||||
|
||||
s1 = *(s32 *)((s32)a0 + 0x20);
|
||||
p = D_801CE6D8 + *(s32 *)((s32)a0 + 0x2C) * 0x40;
|
||||
func_8001CD50(s1, (s32)p);
|
||||
*(s16 *)(s1 + 0x1E) = 0xCCC;
|
||||
*(s16 *)(s1 + 0x10) = 0x400;
|
||||
*(s16 *)(s1 + 0x1A) = 0;
|
||||
*(s16 *)(s1 + 0x18) = 0;
|
||||
*(s32 *)(s1 + 4) = *(s32 *)(s1 + 4) | 0x50000000;
|
||||
func_800233CC(p, 0x80);
|
||||
p[2] = 0xFF;
|
||||
p[1] = 0xFF;
|
||||
p[0] = 0xFF;
|
||||
p[5] = 0x40;
|
||||
p[4] = 0x40;
|
||||
p[6] = 0x80;
|
||||
*(s32 *)((s32)a0 + 0x1C) = 0x10;
|
||||
*(u16 *)((s32)a0 + 2) = *(u16 *)((s32)a0 + 2) + 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* Declaration reconciliation with src/ov_SC03_118/ov_SC03_118_jr_8017FB84.c:
|
||||
* - D_801CE6D8: the TU already declares it at line 4526 as `extern u8 D_801CE6D8[];`
|
||||
* (used by the banked func_801885D0 just above the splice point). The draft had
|
||||
* `extern s32 D_801CE6D8[]` -> "conflicting types". Lever (A): conform the decl
|
||||
* VERBATIM and keep the disagreement at the use site, which already casts the
|
||||
* decayed pointer to s32. Zero bytes change.
|
||||
* - func_801292C8: not declared anywhere in this TU, but src/shared/engine_core.h
|
||||
* declares it as `extern void func_801292C8(u8 *a0);` inside four DEFINE_ macros
|
||||
* (6304/8491/13623/13794). None of those macros is expanded in this TU today, but
|
||||
* conforming to that shape now makes the splice conflict-proof if one ever is.
|
||||
* $a0 already holds the incoming pointer, so passing it costs no instruction
|
||||
* (jal + nop delay slot, exactly as in the target).
|
||||
*/
|
||||
|
||||
extern void func_801292C8(u8 *a0);
|
||||
|
||||
void func_80183F48(void *a0) {
|
||||
|
||||
extern u8 D_801CE6D8[];
|
||||
s32 v0;
|
||||
s32 v1;
|
||||
s32 a1;
|
||||
s32 a2;
|
||||
u8 *v1ptr;
|
||||
|
||||
v0 = *(s32 *)((s32)a0 + 0x1C);
|
||||
v1 = *(s32 *)((s32)a0 + 0x2C);
|
||||
a1 = v0 - 1;
|
||||
/* §21 zero-byte re-tie barrier: without it gcc's scheduler hoists the 0x2C load
|
||||
* (and its sll) ahead of the 0x1C load + addiu pair -- the 4-slot SCHEDULE-REORDER
|
||||
* residual. Folding the shift into the address expression fixes the order but then
|
||||
* swaps $v0/$v1 across the sll/lui pair (REGALLOC-PERM). The re-tie keeps the
|
||||
* in-place `v1 <<= 6` form (so the shift stays in $v1) AND anchors it after the
|
||||
* two loads. Emits no code. */
|
||||
__asm__ __volatile__("" : "=r"(v1) : "0"(v1));
|
||||
v1 = v1 << 6;
|
||||
a2 = (s32)D_801CE6D8 + v1;
|
||||
v1ptr = *(u8 **)((s32)a0 + 0x20);
|
||||
|
||||
*(s32 *)((s32)a0 + 0x1C) = a1;
|
||||
|
||||
if (!(a1 == -1)) {
|
||||
v0 = 0x10 - a1;
|
||||
*(u16 *)((s32)v1ptr + 0x1A) = v0 << 8;
|
||||
*(u16 *)((s32)v1ptr + 0x18) = v0 << 8;
|
||||
|
||||
v1 = *(s32 *)((s32)a0 + 0x1C);
|
||||
v0 = (v1 << 8) - v1;
|
||||
if (v0 < 0) {
|
||||
v0 = v0 + 0xF;
|
||||
}
|
||||
v0 = (u32)v0 >> 4;
|
||||
|
||||
*(u8 *)(a2 + 0x2) = v0;
|
||||
*(u8 *)(a2 + 0x1) = v0;
|
||||
*(u8 *)(a2 + 0x0) = v0;
|
||||
|
||||
v0 = *(s32 *)((s32)a0 + 0x1C) << 2;
|
||||
*(u8 *)(a2 + 0x5) = v0;
|
||||
*(u8 *)(a2 + 0x4) = v0;
|
||||
|
||||
*(u8 *)(a2 + 0x6) = *(s32 *)((s32)a0 + 0x1C) << 3;
|
||||
} else {
|
||||
func_801292C8((u8 *)a0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_80183FFC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_8018403C);
|
||||
|
||||
extern void (*D_801CB124[])(void);
|
||||
|
||||
void func_80184090(void *a0) {
|
||||
D_801CB124[*(u16 *)((s32)a0 + 0x2)]();
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* Declarations conform VERBATIM to the ones already present in
|
||||
* src/ov_SC03_014/ov_SC03_014_jr_801848E4.c (lines 58, 2524, 2527, 3139,
|
||||
* 3222, 3244, 3245). Type mismatches are resolved by casting AT THE USE. */
|
||||
extern s32 func_8012C354(s32*, s32);
|
||||
extern s32 func_80029178(s32 arg);
|
||||
extern s32 func_801788B8(s32 arg0, s32 arg1);
|
||||
extern s32 func_8012C658(s32 arg0, s32 arg1, s32 arg2);
|
||||
extern void func_8012CAE4(void *a0);
|
||||
extern void func_8012A828(s32, s32);
|
||||
/* not declared anywhere in the TU */
|
||||
extern void func_80184778(void);
|
||||
|
||||
void func_801840CC(void *a0) {
|
||||
|
||||
extern s32 D_801CAE7C[];
|
||||
extern u8 D_801CAE14[];
|
||||
extern u8 D_80184BE8[];
|
||||
s32 res1, res2, arr_elem;
|
||||
void *ptr;
|
||||
u16 idx;
|
||||
s16 val;
|
||||
|
||||
res1 = ((s32 (*)(s32, s32))func_8012C354)((s32)a0, (s32)D_801CAE14);
|
||||
if (res1 == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
ptr = *(void **)((s32)a0 + 0xDC);
|
||||
idx = *(u16 *)((s32)ptr + 0xA);
|
||||
arr_elem = D_801CAE7C[idx];
|
||||
|
||||
res1 = func_80029178(arr_elem);
|
||||
|
||||
if ((res1 & 0xFF) == 0) {
|
||||
res2 = func_801788B8((s32)a0, (s32)func_80184778);
|
||||
*(s32 *)((s32)a0 + 0xCC) = res2;
|
||||
} else {
|
||||
val = *(s16 *)((s32)a0 + 0x70);
|
||||
val |= 0x4000;
|
||||
*(s16 *)((s32)a0 + 0x70) = val;
|
||||
}
|
||||
|
||||
res2 = func_8012C658(0x8F, *(s16 *)((s32)a0 + 0x70), (s32)a0);
|
||||
*(s32 *)((s32)a0 + 0x6C) = res2;
|
||||
|
||||
if (res2 == 0) {
|
||||
func_8012CAE4(a0);
|
||||
} else {
|
||||
((void (*)(s32, void *))func_8012A828)((s32)a0, D_80184BE8);
|
||||
*(u16 *)((s32)a0 + 0x2) = 1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
s32 func_801841A0(void *a0) {
|
||||
void *p1, *p2;
|
||||
u16 val;
|
||||
long x;
|
||||
|
||||
p1 = *(void **)(a0 + 0x20);
|
||||
p2 = *(void **)(a0 + 0x6C);
|
||||
val = *(u16 *)(p1 + 0x12);
|
||||
p2 = *(void **)(p2 + 0x20);
|
||||
val += 0x800;
|
||||
val &= 0xFFF;
|
||||
*(u16 *)(p2 + 0x12) = val;
|
||||
x = 2;
|
||||
*(u16 *)(a0 + 0x2) = x;
|
||||
return x;
|
||||
}
|
||||
|
||||
|
||||
void func_801841C8(void) {
|
||||
}
|
||||
|
||||
|
||||
/* Declarations copied VERBATIM from src/ov_SC03_014/ov_SC03_014_jr_801848E4.c
|
||||
* (func_80029178 @ line 58/3176, func_80029124 @ line 43/3253,
|
||||
* func_80178CBC @ line 2537). The D_801E3* globals are not declared
|
||||
* anywhere in the TU. */
|
||||
extern s32 func_80029178(s32 arg);
|
||||
extern void func_80029124(s32 a0, s32 a1);
|
||||
extern void func_80178CBC(s32 arg0, s32 arg1);
|
||||
|
||||
void func_801841D0(void *a0) {
|
||||
|
||||
extern s32 D_801CB060;
|
||||
extern s32 D_801CB04C;
|
||||
extern s32 D_801CB048;
|
||||
extern s32 D_801CB0E0;
|
||||
extern s32 D_801CB074;
|
||||
extern s32 D_801CAF40[];
|
||||
extern s32 D_801CAFC4[];
|
||||
s32 *s0;
|
||||
s32 *p;
|
||||
u16 v0;
|
||||
|
||||
s0 = *(s32 **)((char *)a0 + 0xDC);
|
||||
v0 = *(u16 *)((char *)s0 + 0x8);
|
||||
|
||||
if (!(v0 & 0x8000)) {
|
||||
v0 = (func_80029178(0x1D)) & 0xFF;
|
||||
|
||||
if (v0 != 0) {
|
||||
u16 flags2;
|
||||
D_801CB060 = *(s32 *)((char *)s0 + 0x4);
|
||||
flags2 = *(u16 *)((char *)s0 + 0x8);
|
||||
|
||||
if (!(flags2 & 0x4000)) {
|
||||
v0 = *(u16 *)((char *)s0 + 0xC);
|
||||
D_801CB048 = 0;
|
||||
D_801CB04C = D_801CAFC4[v0];
|
||||
} else {
|
||||
D_801CB04C = 0;
|
||||
v0 = *(u16 *)((char *)s0 + 0xC);
|
||||
func_80029124(D_801CAFC4[v0], 1);
|
||||
D_801CB048 = 2;
|
||||
}
|
||||
} else {
|
||||
D_801CB060 = *(s32 *)((char *)s0 + 0x0);
|
||||
v0 = *(u16 *)((char *)s0 + 0xC);
|
||||
D_801CB048 = 0;
|
||||
D_801CB04C = D_801CAF40[v0];
|
||||
}
|
||||
|
||||
func_80178CBC((s32)a0, (s32)&D_801CB074);
|
||||
} else {
|
||||
p = &D_801CB0E0;
|
||||
*p = *(s32 *)((char *)s0 + 0x0);
|
||||
func_80178CBC((s32)a0, (s32)(p - 7));
|
||||
}
|
||||
|
||||
*(u16 *)(a0 + 0x2) = 4;
|
||||
*(u16 *)(a0 + 0x70) |= 0x8000;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* Declarations copied VERBATIM from src/ov_SC03_014/ov_SC03_014_jr_801848E4.c
|
||||
* (lines 43, 45, 58, 65, 2528, 2538, 2712, 3177, 3282).
|
||||
* Type mismatches resolved by casting AT THE USE (func_80178D18). */
|
||||
extern s32 func_801789AC(s32 arg0);
|
||||
extern void func_80178D18(void);
|
||||
extern s32 func_80029178(s32 arg);
|
||||
extern void func_80029514(s32);
|
||||
extern void func_80029124(s32, s32);
|
||||
extern void func_80145EE8(s32 param_1);
|
||||
extern void func_8012C218(void *a0);
|
||||
extern s32 func_80184520(void);
|
||||
|
||||
void func_8018431C(void *arg0) {
|
||||
|
||||
extern s32 D_801CAE7C[];
|
||||
extern void func_8002AC00(s32 arg0); /* not declared anywhere in the TU */
|
||||
s32 ptr;
|
||||
|
||||
ptr = *(s32 *)((s32)arg0 + 0xDC);
|
||||
|
||||
if (func_801789AC((s32)arg0) != 0) {
|
||||
((void (*)(void *))func_80178D18)(arg0);
|
||||
|
||||
if ((u8)func_80029178(D_801CAE7C[*(u16 *)(ptr + 0xA)]) != 0) {
|
||||
if (D_801CAE7C[*(u16 *)(ptr + 0xA)] == 0x54) {
|
||||
func_80029514(0x5A);
|
||||
func_80029124(0xEA, 1);
|
||||
}
|
||||
|
||||
if ((*(u16 *)(ptr + 0x8) & 0x4000) != 0) {
|
||||
if ((u8)func_80029178(0x1D) != 0) {
|
||||
func_80145EE8(0);
|
||||
}
|
||||
}
|
||||
|
||||
if (func_80184520() == 1) {
|
||||
func_8002AC00(0x26);
|
||||
}
|
||||
|
||||
*(u16 *)((s32)arg0 + 0x70) &= 0x8000;
|
||||
func_8012C218(*(void **)((s32)arg0 + 0xCC));
|
||||
}
|
||||
|
||||
*(u16 *)((s32)arg0 + 0x2) = 2;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
extern void func_8012C218(void *a0);
|
||||
void func_8018443C(void * arg0) {
|
||||
*(short *)((char *)arg0 + 0x2) = 2;
|
||||
((void (*)(s32 *))func_8012C218)(*(s32 **)((char *)arg0 + 0xcc));
|
||||
}
|
||||
|
||||
|
||||
void func_80184468(void *a0) {
|
||||
*(short *)(*(int *)((char *)a0 + 0x6c) + 0xfe) = 1;
|
||||
}
|
||||
|
||||
|
||||
void func_80184478(void *a0) {
|
||||
*(short *)(*(int *)((char *)a0 + 0x6c) + 0xfe) = 2;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
extern void func_80029124(s32, s32);
|
||||
|
||||
void func_80184488(void *a0) {
|
||||
|
||||
extern s32 D_801CAE7C[];
|
||||
u16 idx = *(u16 *)(*(s32 *)(a0 + 0xDC) + 0xA);
|
||||
func_80029124(D_801CAE7C[idx], 1);
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern s32 D_80126B58;
|
||||
extern void func_8014ADA8(s32 a0, s32 a1);
|
||||
|
||||
void func_801844C8(void * arg0) {
|
||||
s32 temp_v0;
|
||||
|
||||
temp_v0 = *(s32 *)((s32)arg0 + 0xdc);
|
||||
((void (*)(s32 *, s32))func_8014ADA8)((s32 *)&D_80126B58, *(u16 *)(temp_v0 + 0xc));
|
||||
}
|
||||
|
||||
|
||||
extern s16 func_80174764(void);
|
||||
s32 func_801844FC(void) {
|
||||
return ((s32 (*)(void))func_80174764)() == 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
extern s32 func_80029178(s32 arg);
|
||||
|
||||
s32 func_80184520(void) {
|
||||
|
||||
extern s32 D_801CAE7C[];
|
||||
s32 i;
|
||||
|
||||
for (i = 0; i < 0x26; i++) {
|
||||
if ((u8)func_80029178(D_801CAE7C[i]) == 0) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
extern void (*D_801CB14C[])(void);
|
||||
|
||||
void func_80184584(void *a0) {
|
||||
D_801CB14C[*(u16 *)((s32)a0 + 0x2)]();
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
extern s32 func_8012C354(s32*, s32);
|
||||
extern void func_8012A828(s32, s32);
|
||||
|
||||
void func_801845C0(void *a0) {
|
||||
|
||||
extern u8 D_801CAE48[];
|
||||
extern u8 D_801CB80C[];
|
||||
extern u8 D_801CB5EC[];
|
||||
s32 ptr;
|
||||
unsigned short v1;
|
||||
unsigned short v0;
|
||||
|
||||
if (((s32 (*)(s32, s32))func_8012C354)((s32)a0, (s32)D_801CAE48) == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
ptr = *(s32 *)((s32)a0 + 0x64);
|
||||
v1 = *(unsigned short *)(ptr + 0x36);
|
||||
v0 = *(unsigned short *)((s32)a0 + 0x70);
|
||||
*(unsigned short *)((s32)a0 + 0xFC) = v1;
|
||||
|
||||
if (v0 & 0x4000) {
|
||||
((void (*)(s32, void *))func_8012A828)((s32)a0, D_801CB80C);
|
||||
*(unsigned short *)((s32)a0 + 0x5C) = 0;
|
||||
} else {
|
||||
((void (*)(s32, void *))func_8012A828)((s32)a0, D_801CB5EC);
|
||||
}
|
||||
|
||||
*(unsigned short *)((s32)a0 + 0x2) = 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
extern void func_8012C218(void *a0);
|
||||
extern void func_8012A828(s32, s32);
|
||||
extern void func_8002D4C8(s32 a0, s32 a1);
|
||||
|
||||
void func_80184648(void *a0) {
|
||||
|
||||
extern u8 D_801CB5FC[];
|
||||
extern u8 D_801CB704[];
|
||||
s16 mode;
|
||||
|
||||
if (*(s16 *)((s32)a0 + 0xFC) != *(s16 *)(*(s32 *)((s32)a0 + 0x64) + 0x36)) {
|
||||
((void (*)(void))func_8012C218)();
|
||||
return;
|
||||
}
|
||||
|
||||
mode = *(s16 *)((s32)a0 + 0xFE);
|
||||
if (mode == 1) {
|
||||
*(s16 *)((s32)a0 + 0x2) = 2;
|
||||
*(s32 *)((s32)a0 + 0x1C) = 0x20;
|
||||
((void (*)(s32, void *))func_8012A828)((s32)a0, D_801CB5FC);
|
||||
*(s16 *)((s32)a0 + 0x5C) = 0;
|
||||
func_8002D4C8(0x5BF, 0);
|
||||
} else if (mode == 2) {
|
||||
*(s16 *)((s32)a0 + 0x2) = 2;
|
||||
*(s32 *)((s32)a0 + 0x1C) = 0x20;
|
||||
((void (*)(s32, void *))func_8012A828)((s32)a0, D_801CB704);
|
||||
*(u16 *)((s32)a0 + 0x5C) = 0x8C00;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* func_80184708 — guarded state-kick: if the s16 at 0x98 is clear, set the
|
||||
* state word at 0x02 to 1, hand the entity to func_8012A828 with one of two
|
||||
* script tables selected by the s16 flag at 0xFE (== 1 -> D_801CB80C, else
|
||||
* D_801CB5EC), then clear that flag.
|
||||
*
|
||||
* §71 sibling-first: func_8018A06C (same TU, 0x148 bytes earlier) is the same
|
||||
* two-arm `((void (*)(s32, void *))func_8012A828)(entity, D_801CB80C / D_801CB5EC)` selector and pins
|
||||
* the widths: `lh` at 0x98/0xFE, `sh` at 0x02.
|
||||
*/
|
||||
|
||||
extern void func_8012A828(s32, s32);
|
||||
|
||||
void func_80184708(void *a0) {
|
||||
|
||||
extern u8 D_801CB80C[];
|
||||
extern u8 D_801CB5EC[];
|
||||
if (*(s16 *)((s32)a0 + 0x98) == 0) {
|
||||
*(s16 *)((s32)a0 + 0x2) = 1;
|
||||
if (*(s16 *)((s32)a0 + 0xFE) == 1) {
|
||||
((void (*)(s32, void *))func_8012A828)((s32)a0, D_801CB80C);
|
||||
} else {
|
||||
((void (*)(s32, void *))func_8012A828)((s32)a0, D_801CB5EC);
|
||||
}
|
||||
*(s16 *)((s32)a0 + 0xFE) = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
extern s32 *D_80126B78;
|
||||
extern u8 D_801CB13C[];
|
||||
extern s32 func_8012BDBC(s32 a0, s32 a1);
|
||||
extern s32 func_80135888(s32 a0, s32 a1, s32 a2, s32 a3);
|
||||
extern void func_80172710(void);
|
||||
extern s32 func_80178BF8();
|
||||
#define gte_SetRotMatrix(r0) __asm__ volatile ( \
|
||||
"lw $12, 0( %0 );" \
|
||||
"lw $13, 4( %0 );" \
|
||||
"ctc2 $12, $0;" \
|
||||
"ctc2 $13, $1;" \
|
||||
"lw $12, 8( %0 );" \
|
||||
"lw $13, 12( %0 );" \
|
||||
"lw $14, 16( %0 );" \
|
||||
"ctc2 $12, $2;" \
|
||||
"ctc2 $13, $3;" \
|
||||
"ctc2 $14, $4" \
|
||||
: \
|
||||
: "r"( r0 ) \
|
||||
: "$12", "$13", "$14" )
|
||||
#define gte_SetTransMatrix(r0) __asm__ volatile ( \
|
||||
"lw $12, 20( %0 );" \
|
||||
"lw $13, 24( %0 );" \
|
||||
"ctc2 $12, $5;" \
|
||||
"lw $14, 28( %0 );" \
|
||||
"ctc2 $13, $6;" \
|
||||
"ctc2 $14, $7" \
|
||||
: \
|
||||
: "r"( r0 ) \
|
||||
: "$12", "$13", "$14" )
|
||||
|
||||
s32 aF8018A224() __asm__("func_80184778");
|
||||
|
||||
s32 aF8018A224(param_1)
|
||||
void *param_1;
|
||||
{
|
||||
s32 *m;
|
||||
s32 obj;
|
||||
s32 sv0[2];
|
||||
s32 sv1[2];
|
||||
s32 flag;
|
||||
|
||||
m = (s32 *)((u8 *)D_80126B78 + 0x34);
|
||||
obj = *(s32 *)((s32)param_1 + 0x64);
|
||||
|
||||
gte_SetRotMatrix(m);
|
||||
gte_SetTransMatrix(m);
|
||||
|
||||
RotTransSV(D_801CB13C, sv0, &flag);
|
||||
RotTransSV(D_801CB13C + 8, sv1, &flag);
|
||||
|
||||
if (func_80135888(*(s32 *)(obj + 0x20), *(s32 *)(obj + 0x58), (s32)sv0, (s32)sv1) == 0) {
|
||||
return 0;
|
||||
}
|
||||
if (func_8012BDBC(obj, 0x300) == 0) {
|
||||
return 0;
|
||||
}
|
||||
*(s16 *)(obj + 0x2) = 3;
|
||||
func_80178BF8();
|
||||
return (s32)func_80172710;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -5237,969 +5237,3 @@ void func_801860E8(s32 a0) {
|
||||
func_80016638(&D_800A6518[bp->f * 20], 0x10, 1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_801863CC);
|
||||
|
||||
extern s32 func_8004787C(s32 a0);
|
||||
extern s32 func_80047948(s32 a0);
|
||||
extern void func_80049CAC(s32 a0, s32 a1);
|
||||
extern void func_8012C218(void *a0);
|
||||
extern s32 func_8012CEB0(s32 a0, s32 a1, s32 a2);
|
||||
#define SRM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 0(%0)\n" \
|
||||
"lw $13, 4(%0)\n" \
|
||||
"ctc2 $12, $0\n" \
|
||||
"ctc2 $13, $1\n" \
|
||||
"lw $12, 8(%0)\n" \
|
||||
"lw $13, 12(%0)\n" \
|
||||
"lw $14, 16(%0)\n" \
|
||||
"ctc2 $12, $2\n" \
|
||||
"ctc2 $13, $3\n" \
|
||||
"ctc2 $14, $4\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
#define STM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 20(%0)\n" \
|
||||
"lw $13, 24(%0)\n" \
|
||||
"ctc2 $12, $5\n" \
|
||||
"lw $14, 28(%0)\n" \
|
||||
"ctc2 $13, $6\n" \
|
||||
"ctc2 $14, $7\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
|
||||
void func_80186B78(s32 a0)
|
||||
{
|
||||
u16 out[4]; /* sp+0x10 */
|
||||
s16 sv[4]; /* sp+0x18 */
|
||||
s16 pos[4]; /* sp+0x20 */
|
||||
s32 flag; /* sp+0x28 */
|
||||
s16 *p;
|
||||
|
||||
if (*(s16 *)(*(s32 *)(a0 + 0x64) + 0x36) != *(s16 *)(a0 + 0xFE)) {
|
||||
((void (*)(void))func_8012C218)();
|
||||
return;
|
||||
}
|
||||
|
||||
if (*(s16 *)(a0 + 0x70) == 1 || *(s16 *)(a0 + 0x70) == 8) {
|
||||
s32 ang;
|
||||
s32 t;
|
||||
ang = (*(u16 *)(a0 + 0xFC) + 0x40) & 0xFFF;
|
||||
p = *(s16 **)(a0 + 0xCC);
|
||||
*(s16 *)(a0 + 0xFC) = ang;
|
||||
t = (func_8004787C(ang) >> 6) + 0xBF;
|
||||
p[2] = t;
|
||||
p[1] = t;
|
||||
p[0] = t;
|
||||
}
|
||||
|
||||
if (*(s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 4) < 0) {
|
||||
{ register s32 *q __asm__("$3"); q = *(s32 **)(a0 + 0x20);
|
||||
q[1] = q[1] | 0x80000000; }
|
||||
} else {
|
||||
__asm__ __volatile__("");
|
||||
*(s32 *)(*(s32 *)(a0 + 0x20) + 4) =
|
||||
*(s32 *)(*(s32 *)(a0 + 0x20) + 4) & 0x7FFFFFFF;
|
||||
}
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) =
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x18);
|
||||
|
||||
if (*(s16 *)(*(s32 *)(a0 + 0x64) + 0x70) < 8) {
|
||||
*(s16 *)(a0 + 0x108) = (*(u16 *)(a0 + 0x108) + 0x40) & 0xFFF;
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) & 0xFFF;
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12) & 0xFFF;
|
||||
|
||||
flag = *(s16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12) -
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12);
|
||||
if (flag > 0x800) {
|
||||
flag = flag - 0x1000;
|
||||
}
|
||||
if (flag < -0x800) {
|
||||
flag = flag + 0x1000;
|
||||
}
|
||||
if (flag > 0x200) {
|
||||
s32 t = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) - 0x200;
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) = t + flag;
|
||||
} else if (flag < -0x200) {
|
||||
s32 t = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + 0x200;
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) = t + flag;
|
||||
} else {
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + (flag / 16);
|
||||
}
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) +
|
||||
(func_8004787C(*(s16 *)(a0 + 0x108)) >> 6);
|
||||
|
||||
func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
|
||||
SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
|
||||
STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
|
||||
|
||||
p = *(s16 **)(a0 + 0xD0);
|
||||
sv[0] = 0;
|
||||
sv[1] = 0;
|
||||
sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
|
||||
RotTransSV(sv, out, &flag);
|
||||
|
||||
*(s16 *)(a0 + 6) = out[0];
|
||||
*(s16 *)(a0 + 0xA) = out[1];
|
||||
*(s16 *)(a0 + 0xE) = out[2];
|
||||
out[1] = out[1] - 0x40;
|
||||
|
||||
pos[0] = *(u16 *)(a0 + 6);
|
||||
pos[1] = *(u16 *)(a0 + 0xA) + 0x10;
|
||||
pos[2] = *(u16 *)(a0 + 0xE);
|
||||
flag = func_8012CEB0((s32)out, (s32)pos, 1);
|
||||
if (flag & 0x1000) {
|
||||
return;
|
||||
}
|
||||
if (flag != 0) {
|
||||
s32 d;
|
||||
s32 t = pos[1] - 0x10;
|
||||
d = *(s16 *)(a0 + 0xA) - t;
|
||||
if (d < 5) {
|
||||
return;
|
||||
}
|
||||
if (d > 0x40) {
|
||||
d = 0x40;
|
||||
}
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) + (d << 4);
|
||||
|
||||
func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
|
||||
SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
|
||||
STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
|
||||
|
||||
p = *(s16 **)(a0 + 0xD0);
|
||||
sv[0] = 0;
|
||||
sv[1] = 0;
|
||||
sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
|
||||
RotTransSV(sv, out, &flag);
|
||||
|
||||
*(s16 *)(a0 + 6) = out[0];
|
||||
*(s16 *)(a0 + 0xA) = out[1];
|
||||
*(s16 *)(a0 + 0xE) = out[2];
|
||||
} else {
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) - 0x80;
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) & 0xFFF;
|
||||
if ((u32)(*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) - 0x801) < 0x3FF) {
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = 0xC00;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
s32 ang;
|
||||
s32 ang2;
|
||||
|
||||
ang = (*(u16 *)(a0 + 0x102) + *(u16 *)(a0 + 0x106)) & 0xFFF;
|
||||
*(s16 *)(a0 + 0x102) = ang;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = func_80047948(ang) >> 6;
|
||||
|
||||
ang2 = (*(u16 *)(a0 + 0x104) + *(u16 *)(a0 + 0x100)) & 0xFFF;
|
||||
*(s16 *)(a0 + 0x104) = ang2;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x14) = func_80047948(ang2) >> 6;
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) + 0xC00;
|
||||
|
||||
func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
|
||||
SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
|
||||
STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
|
||||
|
||||
p = *(s16 **)(a0 + 0xD0);
|
||||
sv[0] = 0;
|
||||
sv[1] = 0;
|
||||
sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
|
||||
RotTransSV(sv, out, &flag);
|
||||
|
||||
*(s16 *)(a0 + 6) = out[0];
|
||||
*(s16 *)(a0 + 0xA) = out[1];
|
||||
*(s16 *)(a0 + 0xE) = out[2];
|
||||
}
|
||||
{ s32 pad[2]; } /* LEVER 1: frame pad. INNER-BLOCK + LAST is load-bearing --
|
||||
a function-scope decl takes 0x28 and evicts flag to 0x30 */
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80187180);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_801872B4);
|
||||
|
||||
extern s32 func_8004787C(s32 a0);
|
||||
extern s32 func_80047948(s32 a0);
|
||||
extern void func_80049CAC(s32 a0, s32 a1);
|
||||
extern void func_8012C218(void *a0);
|
||||
#define SRM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 0(%0)\n" \
|
||||
"lw $13, 4(%0)\n" \
|
||||
"ctc2 $12, $0\n" \
|
||||
"ctc2 $13, $1\n" \
|
||||
"lw $12, 8(%0)\n" \
|
||||
"lw $13, 12(%0)\n" \
|
||||
"lw $14, 16(%0)\n" \
|
||||
"ctc2 $12, $2\n" \
|
||||
"ctc2 $13, $3\n" \
|
||||
"ctc2 $14, $4\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
#define STM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 20(%0)\n" \
|
||||
"lw $13, 24(%0)\n" \
|
||||
"ctc2 $12, $5\n" \
|
||||
"lw $14, 28(%0)\n" \
|
||||
"ctc2 $13, $6\n" \
|
||||
"ctc2 $14, $7\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
#define SRM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 0(%0)\n" \
|
||||
"lw $13, 4(%0)\n" \
|
||||
"ctc2 $12, $0\n" \
|
||||
"ctc2 $13, $1\n" \
|
||||
"lw $12, 8(%0)\n" \
|
||||
"lw $13, 12(%0)\n" \
|
||||
"lw $14, 16(%0)\n" \
|
||||
"ctc2 $12, $2\n" \
|
||||
"ctc2 $13, $3\n" \
|
||||
"ctc2 $14, $4\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
#define STM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 20(%0)\n" \
|
||||
"lw $13, 24(%0)\n" \
|
||||
"ctc2 $12, $5\n" \
|
||||
"lw $14, 28(%0)\n" \
|
||||
"ctc2 $13, $6\n" \
|
||||
"ctc2 $14, $7\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
|
||||
void func_80187674(s32 a0)
|
||||
{
|
||||
u16 out[4]; /* sp+0x10 */
|
||||
s16 sv[4]; /* sp+0x18 */
|
||||
s16 pos[4]; /* sp+0x20 */
|
||||
s32 flag; /* sp+0x28 */
|
||||
s16 *p;
|
||||
|
||||
if (*(s16 *)(*(s32 *)(a0 + 0x64) + 0x36) != *(s16 *)(a0 + 0xFE)) {
|
||||
((void (*)(void))func_8012C218)();
|
||||
return;
|
||||
}
|
||||
|
||||
if (*(s16 *)(a0 + 0x70) == 0x11) {
|
||||
s32 ang;
|
||||
s32 t;
|
||||
ang = (*(u16 *)(a0 + 0xFC) + 0x40) & 0xFFF;
|
||||
p = *(s16 **)(a0 + 0xCC);
|
||||
*(s16 *)(a0 + 0xFC) = ang;
|
||||
t = (func_8004787C(ang) >> 6) + 0xBF;
|
||||
p[2] = t;
|
||||
p[1] = t;
|
||||
p[0] = t;
|
||||
}
|
||||
|
||||
if (*(s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 4) < 0) {
|
||||
{ register s32 *q __asm__("$3"); q = *(s32 **)(a0 + 0x20);
|
||||
q[1] = q[1] | 0x80000000; }
|
||||
} else {
|
||||
__asm__ __volatile__("");
|
||||
*(s32 *)(*(s32 *)(a0 + 0x20) + 4) =
|
||||
*(s32 *)(*(s32 *)(a0 + 0x20) + 4) & 0x7FFFFFFF;
|
||||
}
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) =
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x18);
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x14) =
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x14);
|
||||
|
||||
{
|
||||
s32 ang;
|
||||
s32 ang2;
|
||||
|
||||
ang = (*(u16 *)(a0 + 0x102) + *(u16 *)(a0 + 0x106)) & 0xFFF;
|
||||
*(s16 *)(a0 + 0x102) = ang;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = func_80047948(ang) >> 3;
|
||||
|
||||
ang2 = (*(u16 *)(a0 + 0x104) + *(u16 *)(a0 + 0x100)) & 0xFFF;
|
||||
*(s16 *)(a0 + 0x104) = ang2;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12) = func_80047948(ang2) >> 3;
|
||||
|
||||
func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
|
||||
SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
|
||||
STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
|
||||
|
||||
p = *(s16 **)(a0 + 0xD0);
|
||||
sv[0] = 0;
|
||||
sv[1] = 0;
|
||||
sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
|
||||
RotTransSV(sv, out, &flag);
|
||||
|
||||
*(s16 *)(a0 + 6) = out[0];
|
||||
*(s16 *)(a0 + 0xA) = out[1];
|
||||
*(s16 *)(a0 + 0xE) = out[2];
|
||||
}
|
||||
{ s32 pad[2]; } /* LEVER 1: frame pad -- matches func_80186B78's byte-verified 8-byte
|
||||
trailing dead local (docs/matching-cookbook.md §136 L6). */
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_801878B8);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80187968);
|
||||
|
||||
|
||||
extern void (*D_801C705C[])(void);
|
||||
|
||||
void func_80187A4C(void *a0) {
|
||||
D_801C705C[*(u16 *)((s32)a0 + 0x2)]();
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80187A88);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80187AEC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80187B80);
|
||||
|
||||
|
||||
extern void func_8012E688(s32 arg0, s32 arg1, s32 arg2);
|
||||
void func_80187CA8(void *a0) {
|
||||
if (*(s16 *)((s32)a0 + 0x76) > 0) {
|
||||
func_8012E688((s32)a0, 0x8C6, 0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
extern void func_8012E688(s32 arg0, s32 arg1, s32 arg2);
|
||||
extern void func_8002AC00(s32 arg0);
|
||||
|
||||
void func_80187CD8(void * _arg0) {
|
||||
((void (*)(void *, s32, s32))func_8012E688)(_arg0, 0x8C7, 0);
|
||||
((void (*)(s32))func_8002AC00)(0x10);
|
||||
}
|
||||
|
||||
|
||||
DEFINE_func_80187D04() /* dedup: shared engine-core @0x80187D04 (src/shared) */
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80187D0C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80187DF8);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80187E78);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80187F2C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_8018800C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188074);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_801880D4);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188164);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_801881D8);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188228);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_801882A8);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188348);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188418);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
extern void func_8012C218(void *a0);
|
||||
void func_801884AC(void *a0)
|
||||
{
|
||||
register s32 v0 __asm__("$2");
|
||||
register s32 v1 __asm__("$3");
|
||||
v0 = (*((s32 *) (((s32) a0) + 0x8)) = (*((s32 *) (((s32) a0) + 0x8))) + 0x40000);
|
||||
v1 = 0x400000;
|
||||
if (v1 < v0)
|
||||
{
|
||||
v1 = v1 / 65536;
|
||||
((s32 (*)(s32)) func_8012C218)((s32) a0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_801884E8);
|
||||
|
||||
|
||||
extern void func_8001CD50(s32 a0, s32 a1);
|
||||
extern void func_800233CC(void *, unsigned short);
|
||||
|
||||
void func_801885D0(void *a0)
|
||||
{
|
||||
|
||||
extern u8 D_801D45D8[];
|
||||
s32 s1;
|
||||
u8 *p;
|
||||
|
||||
s1 = *(s32 *)((s32)a0 + 0x20);
|
||||
p = D_801D45D8 + *(s32 *)((s32)a0 + 0x2C) * 0x40;
|
||||
func_8001CD50(s1, (s32)p);
|
||||
*(s16 *)(s1 + 0x1E) = 0xCCC;
|
||||
*(s16 *)(s1 + 0x10) = 0x400;
|
||||
*(s16 *)(s1 + 0x1A) = 0;
|
||||
*(s16 *)(s1 + 0x18) = 0;
|
||||
*(s32 *)(s1 + 4) = *(s32 *)(s1 + 4) | 0x50000000;
|
||||
func_800233CC(p, 0x80);
|
||||
p[2] = 0xFF;
|
||||
p[1] = 0xFF;
|
||||
p[0] = 0xFF;
|
||||
p[5] = 0x40;
|
||||
p[4] = 0x40;
|
||||
p[6] = 0x80;
|
||||
*(s32 *)((s32)a0 + 0x1C) = 0x10;
|
||||
*(u16 *)((s32)a0 + 2) = *(u16 *)((s32)a0 + 2) + 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* Declaration reconciliation with src/ov_SC03_118/ov_SC03_118_jr_8017FB84.c:
|
||||
* - D_801D45D8: the TU already declares it at line 4526 as `extern u8 D_801D45D8[];`
|
||||
* (used by the banked func_801885D0 just above the splice point). The draft had
|
||||
* `extern s32 D_801D45D8[]` -> "conflicting types". Lever (A): conform the decl
|
||||
* VERBATIM and keep the disagreement at the use site, which already casts the
|
||||
* decayed pointer to s32. Zero bytes change.
|
||||
* - func_801292C8: not declared anywhere in this TU, but src/shared/engine_core.h
|
||||
* declares it as `extern void func_801292C8(u8 *a0);` inside four DEFINE_ macros
|
||||
* (6304/8491/13623/13794). None of those macros is expanded in this TU today, but
|
||||
* conforming to that shape now makes the splice conflict-proof if one ever is.
|
||||
* $a0 already holds the incoming pointer, so passing it costs no instruction
|
||||
* (jal + nop delay slot, exactly as in the target).
|
||||
*/
|
||||
|
||||
extern void func_801292C8(u8 *a0);
|
||||
|
||||
void func_80188694(void *a0) {
|
||||
|
||||
extern u8 D_801D45D8[];
|
||||
s32 v0;
|
||||
s32 v1;
|
||||
s32 a1;
|
||||
s32 a2;
|
||||
u8 *v1ptr;
|
||||
|
||||
v0 = *(s32 *)((s32)a0 + 0x1C);
|
||||
v1 = *(s32 *)((s32)a0 + 0x2C);
|
||||
a1 = v0 - 1;
|
||||
/* §21 zero-byte re-tie barrier: without it gcc's scheduler hoists the 0x2C load
|
||||
* (and its sll) ahead of the 0x1C load + addiu pair -- the 4-slot SCHEDULE-REORDER
|
||||
* residual. Folding the shift into the address expression fixes the order but then
|
||||
* swaps $v0/$v1 across the sll/lui pair (REGALLOC-PERM). The re-tie keeps the
|
||||
* in-place `v1 <<= 6` form (so the shift stays in $v1) AND anchors it after the
|
||||
* two loads. Emits no code. */
|
||||
__asm__ __volatile__("" : "=r"(v1) : "0"(v1));
|
||||
v1 = v1 << 6;
|
||||
a2 = (s32)D_801D45D8 + v1;
|
||||
v1ptr = *(u8 **)((s32)a0 + 0x20);
|
||||
|
||||
*(s32 *)((s32)a0 + 0x1C) = a1;
|
||||
|
||||
if (!(a1 == -1)) {
|
||||
v0 = 0x10 - a1;
|
||||
*(u16 *)((s32)v1ptr + 0x1A) = v0 << 8;
|
||||
*(u16 *)((s32)v1ptr + 0x18) = v0 << 8;
|
||||
|
||||
v1 = *(s32 *)((s32)a0 + 0x1C);
|
||||
v0 = (v1 << 8) - v1;
|
||||
if (v0 < 0) {
|
||||
v0 = v0 + 0xF;
|
||||
}
|
||||
v0 = (u32)v0 >> 4;
|
||||
|
||||
*(u8 *)(a2 + 0x2) = v0;
|
||||
*(u8 *)(a2 + 0x1) = v0;
|
||||
*(u8 *)(a2 + 0x0) = v0;
|
||||
|
||||
v0 = *(s32 *)((s32)a0 + 0x1C) << 2;
|
||||
*(u8 *)(a2 + 0x5) = v0;
|
||||
*(u8 *)(a2 + 0x4) = v0;
|
||||
|
||||
*(u8 *)(a2 + 0x6) = *(s32 *)((s32)a0 + 0x1C) << 3;
|
||||
} else {
|
||||
func_801292C8((u8 *)a0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188748);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188788);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_801887DC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188990);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188C8C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188DE4);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188E8C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188EB0);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188F14);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188F90);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80188FB0);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80189074);
|
||||
|
||||
|
||||
extern void (*D_801D1070[])(void);
|
||||
|
||||
void func_8018913C(void *a0) {
|
||||
D_801D1070[*(u16 *)((s32)a0 + 0x2)]();
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* Declarations conform VERBATIM to the ones already present in
|
||||
* src/ov_SC03_014/ov_SC03_014_jr_801848E4.c (lines 58, 2524, 2527, 3139,
|
||||
* 3222, 3244, 3245). Type mismatches are resolved by casting AT THE USE. */
|
||||
extern s32 func_8012C354(s32 a0, s32 a1);
|
||||
extern s32 func_80029178(s32 arg);
|
||||
extern s32 func_801788B8(s32 arg0, s32 arg1);
|
||||
extern s32 func_8012C658(s32 arg0, s32 arg1, s32 arg2);
|
||||
extern void func_8012CAE4(void *a0);
|
||||
extern s32 func_8012A828(void*, void*);
|
||||
/* not declared anywhere in the TU */
|
||||
extern void func_80189824(void);
|
||||
|
||||
void func_80189178(void *a0) {
|
||||
|
||||
extern s32 D_801D0DC8[];
|
||||
extern u8 D_801D0D60[];
|
||||
extern u8 D_80189C94[];
|
||||
s32 res1, res2, arr_elem;
|
||||
void *ptr;
|
||||
u16 idx;
|
||||
s16 val;
|
||||
|
||||
res1 = func_8012C354((s32)a0, (s32)D_801D0D60);
|
||||
if (res1 == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
ptr = *(void **)((s32)a0 + 0xDC);
|
||||
idx = *(u16 *)((s32)ptr + 0xA);
|
||||
arr_elem = D_801D0DC8[idx];
|
||||
|
||||
res1 = func_80029178(arr_elem);
|
||||
|
||||
if ((res1 & 0xFF) == 0) {
|
||||
res2 = func_801788B8((s32)a0, (s32)func_80189824);
|
||||
*(s32 *)((s32)a0 + 0xCC) = res2;
|
||||
} else {
|
||||
val = *(s16 *)((s32)a0 + 0x70);
|
||||
val |= 0x4000;
|
||||
*(s16 *)((s32)a0 + 0x70) = val;
|
||||
}
|
||||
|
||||
res2 = func_8012C658(0x8F, *(s16 *)((s32)a0 + 0x70), (s32)a0);
|
||||
*(s32 *)((s32)a0 + 0x6C) = res2;
|
||||
|
||||
if (res2 == 0) {
|
||||
func_8012CAE4(a0);
|
||||
} else {
|
||||
((void (*)(s32, void *))func_8012A828)((s32)a0, D_80189C94);
|
||||
*(u16 *)((s32)a0 + 0x2) = 1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
s32 func_8018924C(void *a0) {
|
||||
void *p1, *p2;
|
||||
u16 val;
|
||||
long x;
|
||||
|
||||
p1 = *(void **)(a0 + 0x20);
|
||||
p2 = *(void **)(a0 + 0x6C);
|
||||
val = *(u16 *)(p1 + 0x12);
|
||||
p2 = *(void **)(p2 + 0x20);
|
||||
val += 0x800;
|
||||
val &= 0xFFF;
|
||||
*(u16 *)(p2 + 0x12) = val;
|
||||
x = 2;
|
||||
*(u16 *)(a0 + 0x2) = x;
|
||||
return x;
|
||||
}
|
||||
|
||||
|
||||
DEFINE_func_80189274() /* dedup: shared engine-core @0x80189274 (src/shared) */
|
||||
|
||||
|
||||
/* Declarations copied VERBATIM from src/ov_SC03_014/ov_SC03_014_jr_801848E4.c
|
||||
* (func_80029178 @ line 58/3176, func_80029124 @ line 43/3253,
|
||||
* func_80178CBC @ line 2537). The D_801E3* globals are not declared
|
||||
* anywhere in the TU. */
|
||||
extern s32 func_80029178(s32 arg);
|
||||
extern void func_80029124(s32 a0, s32 a1);
|
||||
extern void func_80178CBC(s32 arg0, s32 arg1);
|
||||
|
||||
void func_8018927C(void *a0) {
|
||||
|
||||
extern s32 D_801D0FAC;
|
||||
extern s32 D_801D0F98;
|
||||
extern s32 D_801D0F94;
|
||||
extern s32 D_801D102C;
|
||||
extern s32 D_801D0FC0;
|
||||
extern s32 D_801D0E8C[];
|
||||
extern s32 D_801D0F10[];
|
||||
s32 *s0;
|
||||
s32 *p;
|
||||
u16 v0;
|
||||
|
||||
s0 = *(s32 **)((char *)a0 + 0xDC);
|
||||
v0 = *(u16 *)((char *)s0 + 0x8);
|
||||
|
||||
if (!(v0 & 0x8000)) {
|
||||
v0 = (func_80029178(0x1D)) & 0xFF;
|
||||
|
||||
if (v0 != 0) {
|
||||
u16 flags2;
|
||||
D_801D0FAC = *(s32 *)((char *)s0 + 0x4);
|
||||
flags2 = *(u16 *)((char *)s0 + 0x8);
|
||||
|
||||
if (!(flags2 & 0x4000)) {
|
||||
v0 = *(u16 *)((char *)s0 + 0xC);
|
||||
D_801D0F94 = 0;
|
||||
D_801D0F98 = D_801D0F10[v0];
|
||||
} else {
|
||||
D_801D0F98 = 0;
|
||||
v0 = *(u16 *)((char *)s0 + 0xC);
|
||||
func_80029124(D_801D0F10[v0], 1);
|
||||
D_801D0F94 = 2;
|
||||
}
|
||||
} else {
|
||||
D_801D0FAC = *(s32 *)((char *)s0 + 0x0);
|
||||
v0 = *(u16 *)((char *)s0 + 0xC);
|
||||
D_801D0F94 = 0;
|
||||
D_801D0F98 = D_801D0E8C[v0];
|
||||
}
|
||||
|
||||
func_80178CBC((s32)a0, (s32)&D_801D0FC0);
|
||||
} else {
|
||||
p = &D_801D102C;
|
||||
*p = *(s32 *)((char *)s0 + 0x0);
|
||||
func_80178CBC((s32)a0, (s32)(p - 7));
|
||||
}
|
||||
|
||||
*(u16 *)(a0 + 0x2) = 4;
|
||||
*(u16 *)(a0 + 0x70) |= 0x8000;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* Declarations copied VERBATIM from src/ov_SC03_014/ov_SC03_014_jr_801848E4.c
|
||||
* (lines 43, 45, 58, 65, 2528, 2538, 2712, 3177, 3282).
|
||||
* Type mismatches resolved by casting AT THE USE (func_80178D18). */
|
||||
extern s32 func_801789AC(s32 arg0);
|
||||
extern void func_80178D18(void);
|
||||
extern s32 func_80029178(s32 arg);
|
||||
extern void func_80029514(s32);
|
||||
extern void func_80029124(s32, s32);
|
||||
extern void func_80145EE8(s32 param_1);
|
||||
extern void func_8012C218(void *a0);
|
||||
extern s32 func_801895CC(void);
|
||||
|
||||
void func_801893C8(void *arg0) {
|
||||
|
||||
extern s32 D_801D0DC8[];
|
||||
extern void func_8002AC00(s32 arg0); /* not declared anywhere in the TU */
|
||||
s32 ptr;
|
||||
|
||||
ptr = *(s32 *)((s32)arg0 + 0xDC);
|
||||
|
||||
if (func_801789AC((s32)arg0) != 0) {
|
||||
((void (*)(void *))func_80178D18)(arg0);
|
||||
|
||||
if ((u8)func_80029178(D_801D0DC8[*(u16 *)(ptr + 0xA)]) != 0) {
|
||||
if (D_801D0DC8[*(u16 *)(ptr + 0xA)] == 0x54) {
|
||||
func_80029514(0x5A);
|
||||
func_80029124(0xEA, 1);
|
||||
}
|
||||
|
||||
if ((*(u16 *)(ptr + 0x8) & 0x4000) != 0) {
|
||||
if ((u8)func_80029178(0x1D) != 0) {
|
||||
func_80145EE8(0);
|
||||
}
|
||||
}
|
||||
|
||||
if (func_801895CC() == 1) {
|
||||
func_8002AC00(0x26);
|
||||
}
|
||||
|
||||
*(u16 *)((s32)arg0 + 0x70) &= 0x8000;
|
||||
func_8012C218(*(void **)((s32)arg0 + 0xCC));
|
||||
}
|
||||
|
||||
*(u16 *)((s32)arg0 + 0x2) = 2;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern void func_8012C218(void *a0);
|
||||
s32 func_801894E8(void * arg0)
|
||||
{
|
||||
*(short *)((char *)arg0 + 0x2) = 2;
|
||||
((void (*)(s32 *))func_8012C218)(*(s32 **)((char *)arg0 + 0xcc));
|
||||
}
|
||||
|
||||
|
||||
void func_80189514(void *a0) {
|
||||
*(short *)(*(int *)((char *)a0 + 0x6c) + 0xfe) = 1;
|
||||
}
|
||||
|
||||
|
||||
void func_80189524(void *a0) {
|
||||
*(short *)(*(int *)((char *)a0 + 0x6c) + 0xfe) = 2;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
extern void func_80029124(s32, s32);
|
||||
|
||||
void func_80189534(void *a0) {
|
||||
|
||||
extern s32 D_801D0DC8[];
|
||||
u16 idx = *(u16 *)(*(s32 *)(a0 + 0xDC) + 0xA);
|
||||
func_80029124(D_801D0DC8[idx], 1);
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern s32 D_80126B58;
|
||||
extern void func_8014ADA8(s32 a0, s32 a1);
|
||||
|
||||
void func_80189574(void * arg0) {
|
||||
s32 temp_v0;
|
||||
|
||||
temp_v0 = *(s32 *)((s32)arg0 + 0xdc);
|
||||
((void (*)(s32 *, s32))func_8014ADA8)((s32 *)&D_80126B58, *(u16 *)(temp_v0 + 0xc));
|
||||
}
|
||||
|
||||
|
||||
extern s16 func_80174764(void);
|
||||
s32 func_801895A8(void) {
|
||||
return ((s32 (*)(void))func_80174764)() == 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
extern s32 func_80029178(s32 arg);
|
||||
|
||||
s32 func_801895CC(void) {
|
||||
|
||||
extern s32 D_801D0DC8[];
|
||||
s32 i;
|
||||
|
||||
for (i = 0; i < 0x26; i++) {
|
||||
if ((u8)func_80029178(D_801D0DC8[i]) == 0) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern void (*D_801D1098[])(void);
|
||||
|
||||
void func_80189630(void *a0) {
|
||||
D_801D1098[*(u16 *)((s32)a0 + 0x2)]();
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
extern s32 func_8012C354(s32 a0, s32 a1);
|
||||
extern s32 func_8012A828(void*, void*);
|
||||
|
||||
void func_8018966C(void *a0) {
|
||||
|
||||
extern u8 D_801D0D94[];
|
||||
extern u8 D_801D1758[];
|
||||
extern u8 D_801D1538[];
|
||||
s32 ptr;
|
||||
unsigned short v1;
|
||||
unsigned short v0;
|
||||
|
||||
if (func_8012C354((s32)a0, (s32)D_801D0D94) == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
ptr = *(s32 *)((s32)a0 + 0x64);
|
||||
v1 = *(unsigned short *)(ptr + 0x36);
|
||||
v0 = *(unsigned short *)((s32)a0 + 0x70);
|
||||
*(unsigned short *)((s32)a0 + 0xFC) = v1;
|
||||
|
||||
if (v0 & 0x4000) {
|
||||
((void (*)(s32, void *))func_8012A828)((s32)a0, D_801D1758);
|
||||
*(unsigned short *)((s32)a0 + 0x5C) = 0;
|
||||
} else {
|
||||
((void (*)(s32, void *))func_8012A828)((s32)a0, D_801D1538);
|
||||
}
|
||||
|
||||
*(unsigned short *)((s32)a0 + 0x2) = 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
extern void func_8012C218(void *a0);
|
||||
extern s32 func_8012A828(void*, void*);
|
||||
extern void func_8002D4C8(s32 a0, s32 a1);
|
||||
|
||||
void func_801896F4(void *a0) {
|
||||
|
||||
extern u8 D_801D1548[];
|
||||
extern u8 D_801D1650[];
|
||||
s16 mode;
|
||||
|
||||
if (*(s16 *)((s32)a0 + 0xFC) != *(s16 *)(*(s32 *)((s32)a0 + 0x64) + 0x36)) {
|
||||
((void (*)(void))func_8012C218)();
|
||||
return;
|
||||
}
|
||||
|
||||
mode = *(s16 *)((s32)a0 + 0xFE);
|
||||
if (mode == 1) {
|
||||
*(s16 *)((s32)a0 + 0x2) = 2;
|
||||
*(s32 *)((s32)a0 + 0x1C) = 0x20;
|
||||
((void (*)(s32, void *))func_8012A828)((s32)a0, D_801D1548);
|
||||
*(s16 *)((s32)a0 + 0x5C) = 0;
|
||||
func_8002D4C8(0x5BF, 0);
|
||||
} else if (mode == 2) {
|
||||
*(s16 *)((s32)a0 + 0x2) = 2;
|
||||
*(s32 *)((s32)a0 + 0x1C) = 0x20;
|
||||
((void (*)(s32, void *))func_8012A828)((s32)a0, D_801D1650);
|
||||
*(u16 *)((s32)a0 + 0x5C) = 0x8C00;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* func_801897B4 — guarded state-kick: if the s16 at 0x98 is clear, set the
|
||||
* state word at 0x02 to 1, hand the entity to func_8012A828 with one of two
|
||||
* script tables selected by the s16 flag at 0xFE (== 1 -> D_801D1758, else
|
||||
* D_801D1538), then clear that flag.
|
||||
*
|
||||
* §71 sibling-first: func_8018A06C (same TU, 0x148 bytes earlier) is the same
|
||||
* two-arm `((void (*)(s32, void *))func_8012A828)(entity, D_801D1758 / D_801D1538)` selector and pins
|
||||
* the widths: `lh` at 0x98/0xFE, `sh` at 0x02.
|
||||
*/
|
||||
|
||||
extern s32 func_8012A828(void*, void*);
|
||||
|
||||
void func_801897B4(void *a0) {
|
||||
|
||||
extern u8 D_801D1758[];
|
||||
extern u8 D_801D1538[];
|
||||
if (*(s16 *)((s32)a0 + 0x98) == 0) {
|
||||
*(s16 *)((s32)a0 + 0x2) = 1;
|
||||
if (*(s16 *)((s32)a0 + 0xFE) == 1) {
|
||||
((void (*)(s32, void *))func_8012A828)((s32)a0, D_801D1758);
|
||||
} else {
|
||||
((void (*)(s32, void *))func_8012A828)((s32)a0, D_801D1538);
|
||||
}
|
||||
*(s16 *)((s32)a0 + 0xFE) = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
extern s32 *D_80126B78;
|
||||
extern u8 D_801D1088[];
|
||||
extern s32 func_8012BDBC(s32 a0, s32 a1);
|
||||
extern s32 func_80135888(s32 a0, s32 a1, s32 a2, s32 a3);
|
||||
extern void func_80172710(void);
|
||||
extern s32 func_80178BF8();
|
||||
#define gte_SetRotMatrix(r0) __asm__ volatile ( \
|
||||
"lw $12, 0( %0 );" \
|
||||
"lw $13, 4( %0 );" \
|
||||
"ctc2 $12, $0;" \
|
||||
"ctc2 $13, $1;" \
|
||||
"lw $12, 8( %0 );" \
|
||||
"lw $13, 12( %0 );" \
|
||||
"lw $14, 16( %0 );" \
|
||||
"ctc2 $12, $2;" \
|
||||
"ctc2 $13, $3;" \
|
||||
"ctc2 $14, $4" \
|
||||
: \
|
||||
: "r"( r0 ) \
|
||||
: "$12", "$13", "$14" )
|
||||
#define gte_SetTransMatrix(r0) __asm__ volatile ( \
|
||||
"lw $12, 20( %0 );" \
|
||||
"lw $13, 24( %0 );" \
|
||||
"ctc2 $12, $5;" \
|
||||
"lw $14, 28( %0 );" \
|
||||
"ctc2 $13, $6;" \
|
||||
"ctc2 $14, $7" \
|
||||
: \
|
||||
: "r"( r0 ) \
|
||||
: "$12", "$13", "$14" )
|
||||
|
||||
s32 aF8018A224() __asm__("func_80189824");
|
||||
|
||||
s32 aF8018A224(param_1)
|
||||
void *param_1;
|
||||
{
|
||||
s32 *m;
|
||||
s32 obj;
|
||||
s32 sv0[2];
|
||||
s32 sv1[2];
|
||||
s32 flag;
|
||||
|
||||
m = (s32 *)((u8 *)D_80126B78 + 0x34);
|
||||
obj = *(s32 *)((s32)param_1 + 0x64);
|
||||
|
||||
gte_SetRotMatrix(m);
|
||||
gte_SetTransMatrix(m);
|
||||
|
||||
RotTransSV(D_801D1088, sv0, &flag);
|
||||
RotTransSV(D_801D1088 + 8, sv1, &flag);
|
||||
|
||||
if (func_80135888(*(s32 *)(obj + 0x20), *(s32 *)(obj + 0x58), (s32)sv0, (s32)sv1) == 0) {
|
||||
return 0;
|
||||
}
|
||||
if (func_8012BDBC(obj, 0x300) == 0) {
|
||||
return 0;
|
||||
}
|
||||
*(s16 *)(obj + 0x2) = 3;
|
||||
func_80178BF8();
|
||||
return (s32)func_80172710;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user