mirror of
https://github.com/Druthulu/BFM-decomp
synced 2026-10-09 01:59:26 -04:00
phase-36: S104 s104_e28 — func_801889B4 banked at 0 through the whole-object gate + propagated — e28 copy
This commit is contained in:
Drew T
+173
-173
@@ -1,5 +1,5 @@
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{
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"head": "d5f20736f",
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"head": "74d6fd377",
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"stamp": "15956e4a96c4",
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"generated": "2026-09-11 04:03",
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"aliases": [
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@@ -21,206 +21,206 @@
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|
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|
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"seconds": 2.3
|
||||
|
||||
@@ -29509,3 +29509,4 @@
|
||||
{"ts": "2026-09-11 04:03:16", "label": "s104_e28", "rung": "E", "calib": {"head": "35d2e015a", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c", "fn": "func_80182464", "addr": 2149065828, "aliases": null, "header": false, "includers": 0, "nhash_before": "c14557a4b51dff0187a4a237dae680ffe50aa7fc", "nhash_after": "6ce5b43df7dc0a19586ffb136ddd0573222e4738", "source": ".run/P36/agents/ov_SC06_000__func_80182464/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.281, "objects": ["build/src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.o"], "before_text": "void func_80182464(s32 a0, s32 a1)\n{\n extern void func_80049CAC(s32 a0, s32 a1);\n extern void func_8017EF68(s32 a0, s32 a1, s32 a2);\n extern s16 D_801AEBAA[];\n extern s32 D_801B20E0;\n extern s32 D_801A3A0C;\n extern s32 D_801AEB74;\n register s16 *q asm(\"$17\"); // !FAKE: pin $17 \u2014 NEEDED DIFFERS (P36 rung B tus7)\n\n q = D_801AEBAA;\n *q = a0;\n func_80049CAC((s32)q - 2, (s32)q - 78);\n __asm__(\"\" : \"=r\"(q) : \"0\"(q)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus7)\n D_801AEB74 = (s16)a1;\n *(s32 *)((s32)q - 82) = 0;\n func_8017EF68((s32)&D_801B20E0, (s32)&D_801A3A0C, (s32)q - 82);\n}\n", "after_text": "void func_80182464(s32 a0, s32 a1)\n{\n extern void func_80049CAC(s32 a0, s32 a1);\n extern void func_8017EF68(s32 a0, s32 a1, s32 a2);\n extern s16 D_801AEBAA[];\n extern s32 D_801B20E0;\n extern s32 D_801A3A0C;\n extern s32 D_801AEB74;\n s16 *q;\n s32 *r;\n\n q = D_801AEBAA;\n *q = a0;\n func_80049CAC((s32)q - 2, (s32)q - 78);\n D_801AEB74 = (s16)a1;\n r = (s32 *)((s32)q - 82);\n *r = 0;\n func_8017EF68((s32)&D_801B20E0, (s32)&D_801A3A0C, (s32)r);\n}\n"}
|
||||
{"ts": "2026-09-11 04:03:34", "label": "s104_e28", "rung": "E", "calib": {"head": "d5f20736f", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c", "fn": "func_801842CC", "addr": 2149073612, "aliases": null, "header": false, "includers": 0, "nhash_before": "2436cc7f18b3dc6e51fffcf1c59ebb55dfe99abe", "nhash_after": "4f1baf09d60c63bd3fcb30d002ef0f4e2d413239", "source": ".run/P36/agents/ov_SC06_000__func_801842CC/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.277, "objects": ["build/src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.o"], "before_text": "void func_801842CC(s32 arg0)\n{\n s32 s0;\n for (s0 = 0; s0 < 0x49; s0 += 0x18) {\n s32 a1 = func_80132EF4(arg0, 0x22);\n if (a1 == 0)\n continue;\n {\n s32 v0;\n register s32 v1 __asm__(\"v1\"); // !FAKE: pin v1 \u2014 NEEDED DIFFERS (P36 rung B tus7)\n register s32 a0 __asm__(\"a0\"); // !FAKE: pin a0 \u2014 NEEDED DIFFERS (P36 rung B tus7)\n v0 = *(u16 *)(arg0 + 0x84);\n a0 = *(u16 *)(a1 + 0xE);\n v0 &= 0x4;\n v1 = v0 * 2;\n __asm__(\"\":\"=r\"(v1):\"0\"(v1)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus7)\n v1 = v1 + v0;\n v1 = s0 + v1;\n v1 = v1 - 0x2A;\n v0 = *(u16 *)(a1 + 0x6);\n a0 += 0x28;\n *(u16 *)(a1 + 0xE) = a0;\n v0 -= v1;\n *(u16 *)(a1 + 0x6) = v0;\n v0 = *(u16 *)(a1 + 0xA);\n v1 = v1 << 16;\n v0 -= 0x20;\n *(u16 *)(a1 + 0xA) = v0;\n v0 = v1 >> 16;\n if (v0 >= 0) {\n v0 = v0 << 7;\n } else {\n v0 = v0 << 7;\n v0 = -v0;\n }\n v0 += 0x1000;\n *(u16 *)(a1 + 0x34) = v0;\n *(s32 *)(a1 + 0x14) = 0xFFFE0000;\n *(s32 *)(a1 + 0x18) = 0x30000;\n }\n }\n}\n", "after_text": "void func_801842CC(s32 arg0)\n{\n s32 i;\n for (i = 0; i < 0x49; i += 0x18) {\n s32 e = func_80132EF4(arg0, 0x22);\n if (e != 0) {\n s32 t;\n s32 v;\n s32 d;\n s32 z;\n t = *(u16 *)(arg0 + 0x84) & 4;\n z = *(u16 *)(e + 0xE);\n d = i + t * 3 - 0x2A;\n do { // !FAKE: do-while \u2014 its LOOP notes are sched1 barriers (sched.c:2053-2080): the +6 load stays after d, the +E store before the sign extension (P36 S104 e28)\n v = *(u16 *)(e + 0x6);\n z += 0x28;\n *(u16 *)(e + 0xE) = z;\n } while (0);\n v -= d;\n *(u16 *)(e + 0x6) = v;\n v = *(u16 *)(e + 0xA);\n v -= 0x20;\n *(u16 *)(e + 0xA) = v;\n v = (s16)d;\n if (v >= 0) {\n v = v << 7;\n } else {\n v = -(v << 7);\n }\n *(u16 *)(e + 0x34) = v + 0x1000;\n *(s32 *)(e + 0x14) = 0xFFFE0000;\n *(s32 *)(e + 0x18) = 0x30000;\n }\n }\n}\n"}
|
||||
{"ts": "2026-09-11 04:03:49", "label": "s104_e28", "rung": "E", "calib": {"head": "d5f20736f", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_024/ov_SC03_024_jr_8017DF84.c", "fn": "func_80182108", "addr": 2149064968, "aliases": null, "header": false, "includers": 0, "nhash_before": "2436cc7f18b3dc6e51fffcf1c59ebb55dfe99abe", "nhash_after": "4f1baf09d60c63bd3fcb30d002ef0f4e2d413239", "source": "propagate:src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801842CC", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.125, "objects": ["build/src/ov_SC03_024/ov_SC03_024_jr_8017DF84.o"], "before_text": "void func_80182108(s32 arg0)\n{\n s32 s0;\n for (s0 = 0; s0 < 0x49; s0 += 0x18) {\n s32 a1 = func_80132EF4(arg0, 0x22);\n if (a1 == 0)\n continue;\n {\n s32 v0;\n register s32 v1 __asm__(\"v1\"); // !FAKE: pin v1 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n register s32 a0 __asm__(\"a0\"); // !FAKE: pin a0 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n v0 = *(u16 *)(arg0 + 0x84);\n a0 = *(u16 *)(a1 + 0xE);\n v0 &= 0x4;\n v1 = v0 * 2;\n __asm__(\"\":\"=r\"(v1):\"0\"(v1)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus8)\n v1 = v1 + v0;\n v1 = s0 + v1;\n v1 = v1 - 0x2A;\n v0 = *(u16 *)(a1 + 0x6);\n a0 += 0x28;\n *(u16 *)(a1 + 0xE) = a0;\n v0 -= v1;\n *(u16 *)(a1 + 0x6) = v0;\n v0 = *(u16 *)(a1 + 0xA);\n v1 = v1 << 16;\n v0 -= 0x20;\n *(u16 *)(a1 + 0xA) = v0;\n v0 = v1 >> 16;\n if (v0 >= 0) {\n v0 = v0 << 7;\n } else {\n v0 = v0 << 7;\n v0 = -v0;\n }\n v0 += 0x1000;\n *(u16 *)(a1 + 0x34) = v0;\n *(s32 *)(a1 + 0x14) = 0xFFFE0000;\n *(s32 *)(a1 + 0x18) = 0x30000;\n }\n }\n}\n", "after_text": "void func_80182108(s32 arg0)\n{\n s32 i;\n for (i = 0; i < 0x49; i += 0x18) {\n s32 e = func_80132EF4(arg0, 0x22);\n if (e != 0) {\n s32 t;\n s32 v;\n s32 d;\n s32 z;\n t = *(u16 *)(arg0 + 0x84) & 4;\n z = *(u16 *)(e + 0xE);\n d = i + t * 3 - 0x2A;\n do { // !FAKE: do-while \u2014 its LOOP notes are sched1 barriers (sched.c:2053-2080): the +6 load stays after d, the +E store before the sign extension (P36 S104 e28)\n v = *(u16 *)(e + 0x6);\n z += 0x28;\n *(u16 *)(e + 0xE) = z;\n } while (0);\n v -= d;\n *(u16 *)(e + 0x6) = v;\n v = *(u16 *)(e + 0xA);\n v -= 0x20;\n *(u16 *)(e + 0xA) = v;\n v = (s16)d;\n if (v >= 0) {\n v = v << 7;\n } else {\n v = -(v << 7);\n }\n *(u16 *)(e + 0x34) = v + 0x1000;\n *(s32 *)(e + 0x14) = 0xFFFE0000;\n *(s32 *)(e + 0x18) = 0x30000;\n }\n }\n}\n"}
|
||||
{"ts": "2026-09-11 04:04:09", "label": "s104_e28", "rung": "E", "calib": {"head": "74d6fd377", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_014/ov_SC03_014_jr_801848E4.c", "fn": "func_801889B4", "addr": 2149091764, "aliases": null, "header": false, "includers": 0, "nhash_before": "c37935424c92c8244a8a16d51015a10e07b0be21", "nhash_after": "1fa9f7614c96a234d41e70c40f81b66946e4e89c", "source": ".run/P36/agents/ov_SC06_000__func_801842CC/scratch/copy_801889B4_dw.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 2, "seconds": 0.343, "objects": ["build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o", "build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o"], "before_text": "void func_801889B4(s32 arg0)\n{\n s32 s0;\n for (s0 = 0; s0 < 0x49; s0 += 0x18) {\n s32 a1 = func_80132EF4(arg0, 0x22);\n if (a1 == 0)\n continue;\n {\n s32 v0;\n register s32 v1 __asm__(\"v1\"); // !FAKE: pin v1 \u2014 NEEDED DIFFERS (P36 rung B tus10)\n register s32 a0 __asm__(\"a0\"); // !FAKE: pin a0 \u2014 NEEDED DIFFERS (P36 rung B tus10)\n v0 = *(u16 *)(arg0 + 0x84);\n a0 = *(u16 *)(a1 + 0xE);\n v0 &= 0x4;\n v1 = v0 * 2;\n __asm__(\"\":\"=r\"(v1):\"0\"(v1)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus10)\n v1 = v1 + v0;\n v1 = s0 + v1;\n v1 = v1 - 0x2A;\n v0 = *(u16 *)(a1 + 0x6);\n a0 -= 0x28;\n *(u16 *)(a1 + 0xE) = a0;\n v0 -= v1;\n *(u16 *)(a1 + 0x6) = v0;\n v0 = *(u16 *)(a1 + 0xA);\n v1 = v1 << 16;\n v0 -= 0x20;\n *(u16 *)(a1 + 0xA) = v0;\n v0 = v1 >> 16;\n if (v0 >= 0) {\n v0 = v0 << 7;\n } else {\n v0 = v0 << 7;\n v0 = -v0;\n }\n v0 += 0x1000;\n *(u16 *)(a1 + 0x34) = v0;\n *(s32 *)(a1 + 0x14) = 0xFFFE0000;\n *(s32 *)(a1 + 0x18) = 0xFFFD0000;\n }\n }\n}\n", "after_text": "void func_801889B4(s32 arg0)\n{\n s32 i;\n for (i = 0; i < 0x49; i += 0x18) {\n s32 e = func_80132EF4(arg0, 0x22);\n if (e != 0) {\n s32 t;\n s32 v;\n s32 d;\n s32 z;\n t = *(u16 *)(arg0 + 0x84) & 4;\n z = *(u16 *)(e + 0xE);\n d = i + t * 3 - 0x2A;\n do { // !FAKE: do-while \u2014 its LOOP notes are sched1 barriers (sched.c:2053-2080): the +6 load stays after d, the +E store before the sign extension (P36 S104 e28)\n v = *(u16 *)(e + 0x6);\n z -= 0x28;\n *(u16 *)(e + 0xE) = z;\n } while (0);\n v -= d;\n *(u16 *)(e + 0x6) = v;\n v = *(u16 *)(e + 0xA);\n v -= 0x20;\n *(u16 *)(e + 0xA) = v;\n v = (s16)d;\n if (v >= 0) {\n v = v << 7;\n } else {\n v = -(v << 7);\n }\n *(u16 *)(e + 0x34) = v + 0x1000;\n *(s32 *)(e + 0x14) = 0xFFFE0000;\n *(s32 *)(e + 0x18) = 0xFFFD0000;\n }\n }\n}\n"}
|
||||
|
||||
@@ -5011,43 +5011,36 @@ void func_80188634(void *a0) {
|
||||
|
||||
void func_801889B4(s32 arg0)
|
||||
{
|
||||
s32 s0;
|
||||
for (s0 = 0; s0 < 0x49; s0 += 0x18) {
|
||||
s32 a1 = func_80132EF4(arg0, 0x22);
|
||||
if (a1 == 0)
|
||||
continue;
|
||||
{
|
||||
s32 v0;
|
||||
register s32 v1 __asm__("v1"); // !FAKE: pin v1 — NEEDED DIFFERS (P36 rung B tus10)
|
||||
register s32 a0 __asm__("a0"); // !FAKE: pin a0 — NEEDED DIFFERS (P36 rung B tus10)
|
||||
v0 = *(u16 *)(arg0 + 0x84);
|
||||
a0 = *(u16 *)(a1 + 0xE);
|
||||
v0 &= 0x4;
|
||||
v1 = v0 * 2;
|
||||
__asm__("":"=r"(v1):"0"(v1)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus10)
|
||||
v1 = v1 + v0;
|
||||
v1 = s0 + v1;
|
||||
v1 = v1 - 0x2A;
|
||||
v0 = *(u16 *)(a1 + 0x6);
|
||||
a0 -= 0x28;
|
||||
*(u16 *)(a1 + 0xE) = a0;
|
||||
v0 -= v1;
|
||||
*(u16 *)(a1 + 0x6) = v0;
|
||||
v0 = *(u16 *)(a1 + 0xA);
|
||||
v1 = v1 << 16;
|
||||
v0 -= 0x20;
|
||||
*(u16 *)(a1 + 0xA) = v0;
|
||||
v0 = v1 >> 16;
|
||||
if (v0 >= 0) {
|
||||
v0 = v0 << 7;
|
||||
s32 i;
|
||||
for (i = 0; i < 0x49; i += 0x18) {
|
||||
s32 e = func_80132EF4(arg0, 0x22);
|
||||
if (e != 0) {
|
||||
s32 t;
|
||||
s32 v;
|
||||
s32 d;
|
||||
s32 z;
|
||||
t = *(u16 *)(arg0 + 0x84) & 4;
|
||||
z = *(u16 *)(e + 0xE);
|
||||
d = i + t * 3 - 0x2A;
|
||||
do { // !FAKE: do-while — its LOOP notes are sched1 barriers (sched.c:2053-2080): the +6 load stays after d, the +E store before the sign extension (P36 S104 e28)
|
||||
v = *(u16 *)(e + 0x6);
|
||||
z -= 0x28;
|
||||
*(u16 *)(e + 0xE) = z;
|
||||
} while (0);
|
||||
v -= d;
|
||||
*(u16 *)(e + 0x6) = v;
|
||||
v = *(u16 *)(e + 0xA);
|
||||
v -= 0x20;
|
||||
*(u16 *)(e + 0xA) = v;
|
||||
v = (s16)d;
|
||||
if (v >= 0) {
|
||||
v = v << 7;
|
||||
} else {
|
||||
v0 = v0 << 7;
|
||||
v0 = -v0;
|
||||
v = -(v << 7);
|
||||
}
|
||||
v0 += 0x1000;
|
||||
*(u16 *)(a1 + 0x34) = v0;
|
||||
*(s32 *)(a1 + 0x14) = 0xFFFE0000;
|
||||
*(s32 *)(a1 + 0x18) = 0xFFFD0000;
|
||||
*(u16 *)(e + 0x34) = v + 0x1000;
|
||||
*(s32 *)(e + 0x14) = 0xFFFE0000;
|
||||
*(s32 *)(e + 0x18) = 0xFFFD0000;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user