feat(phase-30 S48-T6): propagate func_80187130 to its zero-crack siblings

This commit is contained in:
Drew T
2026-08-12 16:18:34 -06:00
parent dce3d4c235
commit 2cf997f278
5 changed files with 270 additions and 9 deletions
+53 -1
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@@ -2976,7 +2976,59 @@ void func_801810E8(s32 param_1) {
INCLUDE_ASM("asm/ov_SC06_020/nonmatchings/ov_SC06_020_jr_80180B04", func_801811A8);
INCLUDE_ASM("asm/ov_SC06_020/nonmatchings/ov_SC06_020_jr_80180B04", func_801812A0);
extern void func_8012EC04(s32 param_1, s32 param_2, s32 *param_3);
extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5);
extern s32 func_80135888(s32 a0, s32 a1, s32 a2, s32 a3);
#define gte_SetRotMatrix(r0) __asm__ volatile ( \
"lw $12, 0( %0 );" \
"lw $13, 4( %0 );" \
"ctc2 $12, $0;" \
"ctc2 $13, $1;" \
"lw $12, 8( %0 );" \
"lw $13, 12( %0 );" \
"lw $14, 16( %0 );" \
"ctc2 $12, $2;" \
"ctc2 $13, $3;" \
"ctc2 $14, $4" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
#define gte_SetTransMatrix(r0) __asm__ volatile ( \
"lw $12, 20( %0 );" \
"lw $13, 24( %0 );" \
"ctc2 $12, $5;" \
"lw $14, 28( %0 );" \
"ctc2 $13, $6;" \
"ctc2 $14, $7" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
s32 func_801812A0(s32 param_1, s32 param_2)
{
extern s32 *D_80126B78;
extern s32 *D_80126B90;
extern u8 D_8019EBC4[];
s32 buf[8];
s16 v1[4];
s32 v2[4];
s16 scratch[4];
s16 sVar1;
func_8012EC04(param_1, 0xB, buf);
gte_SetRotMatrix(buf);
gte_SetTransMatrix(buf);
RotTransSV(D_8019EBC4, v1, scratch);
RotTransSV(D_8019EBC4 + 8, v2, scratch);
if (func_80135888((s32)D_80126B78, (s32)D_80126B90, (s32)v1, (s32)v2) != 0) {
sVar1 = *(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12);
func_8012F568(1, 1, sVar1, param_2, (s32)v2, (s32)D_801152A8);
return 1;
}
return 0;
}
+53 -1
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@@ -3008,7 +3008,59 @@ void func_8018500C(s32 param_1) {
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80184A28", func_801850CC);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80184A28", func_801851C4);
extern void func_8012EC04(s32 param_1, s32 param_2, s32 *param_3);
extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5);
extern s32 func_80135888(s32 a0, s32 a1, s32 a2, s32 a3);
#define gte_SetRotMatrix(r0) __asm__ volatile ( \
"lw $12, 0( %0 );" \
"lw $13, 4( %0 );" \
"ctc2 $12, $0;" \
"ctc2 $13, $1;" \
"lw $12, 8( %0 );" \
"lw $13, 12( %0 );" \
"lw $14, 16( %0 );" \
"ctc2 $12, $2;" \
"ctc2 $13, $3;" \
"ctc2 $14, $4" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
#define gte_SetTransMatrix(r0) __asm__ volatile ( \
"lw $12, 20( %0 );" \
"lw $13, 24( %0 );" \
"ctc2 $12, $5;" \
"lw $14, 28( %0 );" \
"ctc2 $13, $6;" \
"ctc2 $14, $7" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
s32 func_801851C4(s32 param_1, s32 param_2)
{
extern s32 *D_80126B78;
extern s32 *D_80126B90;
extern u8 D_801BD2EC[];
s32 buf[8];
s16 v1[4];
s32 v2[4];
s16 scratch[4];
s16 sVar1;
func_8012EC04(param_1, 0xB, buf);
gte_SetRotMatrix(buf);
gte_SetTransMatrix(buf);
RotTransSV(D_801BD2EC, v1, scratch);
RotTransSV(D_801BD2EC + 8, v2, scratch);
if (func_80135888((s32)D_80126B78, (s32)D_80126B90, (s32)v1, (s32)v2) != 0) {
sVar1 = *(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12);
func_8012F568(1, 1, sVar1, param_2, (s32)v2, (s32)D_801152A8);
return 1;
}
return 0;
}
+54 -1
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@@ -3041,7 +3041,60 @@ void func_801874E4(s32 param_1) {
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_80186F00", func_801875A4);
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_80186F00", func_8018769C);
extern void func_8012EC04(s32 param_1, s32 param_2, s32 *param_3);
extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5);
extern s32 func_80135888(s32 a0, s32 a1, s32 a2, s32 a3);
#define gte_SetRotMatrix(r0) __asm__ volatile ( \
"lw $12, 0( %0 );" \
"lw $13, 4( %0 );" \
"ctc2 $12, $0;" \
"ctc2 $13, $1;" \
"lw $12, 8( %0 );" \
"lw $13, 12( %0 );" \
"lw $14, 16( %0 );" \
"ctc2 $12, $2;" \
"ctc2 $13, $3;" \
"ctc2 $14, $4" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
#define gte_SetTransMatrix(r0) __asm__ volatile ( \
"lw $12, 20( %0 );" \
"lw $13, 24( %0 );" \
"ctc2 $12, $5;" \
"lw $14, 28( %0 );" \
"ctc2 $13, $6;" \
"ctc2 $14, $7" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
s32 func_8018769C(s32 param_1, s32 param_2)
{
extern u8 D_801152A8[];
extern s32 *D_80126B78;
extern s32 *D_80126B90;
extern u8 D_801BC430[];
s32 buf[8];
s16 v1[4];
s32 v2[4];
s16 scratch[4];
s16 sVar1;
func_8012EC04(param_1, 0xB, buf);
gte_SetRotMatrix(buf);
gte_SetTransMatrix(buf);
RotTransSV(D_801BC430, v1, scratch);
RotTransSV(D_801BC430 + 8, v2, scratch);
if (func_80135888((s32)D_80126B78, (s32)D_80126B90, (s32)v1, (s32)v2) != 0) {
sVar1 = *(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12);
func_8012F568(1, 1, sVar1, param_2, (s32)v2, (s32)D_801152A8);
return 1;
}
return 0;
}
+55 -3
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@@ -584,7 +584,7 @@ extern s32 func_8014E284(s32 a0, s16 *a1, s16 *a2);
extern s32 func_8014E048(s32 a0, u16 *a1, u16 *a2); /* u16*: def lhu semantics (T5b reconcile; ptr param type codegen-neutral for the caller) */
extern s32 func_80135A4C(s32 a0, s32 a1, s32 *a2, s32 a3);
extern s32 func_80133784(s32 a0, void *a1, s32 a2);
extern u8 D_801152A8[]; /* canonical TU type (engine_core) — read via *(u16*) cast */
/* canonical TU type (engine_core) — read via *(u16*) cast */
extern s16 D_801152AC;
extern s32 func_8014E048(s32 param_1, u16 * param_2, u16 * param_3);
extern void func_8014E48C(s32 a0);
@@ -619,7 +619,6 @@ extern s32 func_8014F468(void);
extern int func_8014F74C();
extern int func_8014F6F4(void);
extern u8 D_800D3918[];
extern u8 D_801152A8[];
extern s32 D_801152BC;
extern int func_8014F74C(s32 arg0);
extern s32 func_8014FA70(s32 a0);
@@ -3045,7 +3044,60 @@ void func_80181D1C(s32 param_1) {
INCLUDE_ASM("asm/ov_SC06_032/nonmatchings/ov_SC06_032_jr_80181014", func_80181DDC);
INCLUDE_ASM("asm/ov_SC06_032/nonmatchings/ov_SC06_032_jr_80181014", func_80181ED4);
extern void func_8012EC04(s32 param_1, s32 param_2, s32 *param_3);
extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5);
extern s32 func_80135888(s32 a0, s32 a1, s32 a2, s32 a3);
#define gte_SetRotMatrix(r0) __asm__ volatile ( \
"lw $12, 0( %0 );" \
"lw $13, 4( %0 );" \
"ctc2 $12, $0;" \
"ctc2 $13, $1;" \
"lw $12, 8( %0 );" \
"lw $13, 12( %0 );" \
"lw $14, 16( %0 );" \
"ctc2 $12, $2;" \
"ctc2 $13, $3;" \
"ctc2 $14, $4" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
#define gte_SetTransMatrix(r0) __asm__ volatile ( \
"lw $12, 20( %0 );" \
"lw $13, 24( %0 );" \
"ctc2 $12, $5;" \
"lw $14, 28( %0 );" \
"ctc2 $13, $6;" \
"ctc2 $14, $7" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
s32 func_80181ED4(s32 param_1, s32 param_2)
{
extern u8 D_801152A8[];
extern s32 *D_80126B78;
extern s32 *D_80126B90;
extern u8 D_801A6824[];
s32 buf[8];
s16 v1[4];
s32 v2[4];
s16 scratch[4];
s16 sVar1;
func_8012EC04(param_1, 0xB, buf);
gte_SetRotMatrix(buf);
gte_SetTransMatrix(buf);
RotTransSV(D_801A6824, v1, scratch);
RotTransSV(D_801A6824 + 8, v2, scratch);
if (func_80135888((s32)D_80126B78, (s32)D_80126B90, (s32)v1, (s32)v2) != 0) {
sVar1 = *(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12);
func_8012F568(1, 1, sVar1, param_2, (s32)v2, (s32)D_801152A8);
return 1;
}
return 0;
}
+55 -3
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@@ -584,7 +584,7 @@ extern s32 func_8014E284(s32 a0, s16 *a1, s16 *a2);
extern s32 func_8014E048(s32 a0, u16 *a1, u16 *a2); /* u16*: def lhu semantics (T5b reconcile; ptr param type codegen-neutral for the caller) */
extern s32 func_80135A4C(s32 a0, s32 a1, s32 *a2, s32 a3);
extern s32 func_80133784(s32 a0, void *a1, s32 a2);
extern u8 D_801152A8[]; /* canonical TU type (engine_core) — read via *(u16*) cast */
/* canonical TU type (engine_core) — read via *(u16*) cast */
extern s16 D_801152AC;
extern s32 func_8014E048(s32 param_1, u16 * param_2, u16 * param_3);
extern void func_8014E48C(s32 a0);
@@ -619,7 +619,6 @@ extern s32 func_8014F468(void);
extern int func_8014F74C();
extern int func_8014F6F4(void);
extern u8 D_800D3918[];
extern u8 D_801152A8[];
extern s32 D_801152BC;
extern int func_8014F74C(s32 arg0);
extern s32 func_8014FA70(s32 a0);
@@ -3129,7 +3128,60 @@ void func_80185A00(s32 param_1) {
INCLUDE_ASM("asm/ov_SC06_033/nonmatchings/ov_SC06_033_jr_80184CF8", func_80185AC0);
INCLUDE_ASM("asm/ov_SC06_033/nonmatchings/ov_SC06_033_jr_80184CF8", func_80185BB8);
extern void func_8012EC04(s32 param_1, s32 param_2, s32 *param_3);
extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5);
extern s32 func_80135888(s32 a0, s32 a1, s32 a2, s32 a3);
#define gte_SetRotMatrix(r0) __asm__ volatile ( \
"lw $12, 0( %0 );" \
"lw $13, 4( %0 );" \
"ctc2 $12, $0;" \
"ctc2 $13, $1;" \
"lw $12, 8( %0 );" \
"lw $13, 12( %0 );" \
"lw $14, 16( %0 );" \
"ctc2 $12, $2;" \
"ctc2 $13, $3;" \
"ctc2 $14, $4" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
#define gte_SetTransMatrix(r0) __asm__ volatile ( \
"lw $12, 20( %0 );" \
"lw $13, 24( %0 );" \
"ctc2 $12, $5;" \
"lw $14, 28( %0 );" \
"ctc2 $13, $6;" \
"ctc2 $14, $7" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
s32 func_80185BB8(s32 param_1, s32 param_2)
{
extern u8 D_801152A8[];
extern s32 *D_80126B78;
extern s32 *D_80126B90;
extern u8 D_801AFBB8[];
s32 buf[8];
s16 v1[4];
s32 v2[4];
s16 scratch[4];
s16 sVar1;
func_8012EC04(param_1, 0xB, buf);
gte_SetRotMatrix(buf);
gte_SetTransMatrix(buf);
RotTransSV(D_801AFBB8, v1, scratch);
RotTransSV(D_801AFBB8 + 8, v2, scratch);
if (func_80135888((s32)D_80126B78, (s32)D_80126B90, (s32)v1, (s32)v2) != 0) {
sVar1 = *(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12);
func_8012F568(1, 1, sVar1, param_2, (s32)v2, (s32)D_801152A8);
return 1;
}
return 0;
}