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https://github.com/Druthulu/BFM-decomp
synced 2026-10-05 00:47:54 -04:00
feat(phase-31): worker gate — +4 fns x0 propagated (fleet 95.5%)
This commit is contained in:
@@ -4084,7 +4084,75 @@ void func_80180050(void *a0) {
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}
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INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_8018008C);
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#include "common.h"
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/* 8-byte block, align 2 -> lwl/lwr/swl/swr copy (cookbook §48-C2, matches
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* the Blk8_80126940_* family in shared/engine_types.h) */
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typedef struct {
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s16 v[4];
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} Blk8_80126940_8018008C;
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extern Blk8_80126940_8018008C D_80126940;
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extern Blk8_80126940_8018008C D_801274E8;
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extern s32 D_80126954;
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extern s32 D_8012695C;
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extern s16 D_80126968;
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extern s16 D_8012696A;
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extern s16 D_8012696C;
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extern s16 D_80126976;
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extern s16 D_80126978;
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extern s16 D_8012697A;
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extern void func_8012A018(s32 a0, s32 a1);
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extern void func_80180050(void *a0);
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extern void func_80180570(s32 a0);
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extern void func_801803D8(s32 param_1, s16 *param_2);
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extern u8 D_80194328[];
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extern u8 D_80194314[];
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extern u8 D_801942EC[];
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extern u8 D_80194300[];
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void func_8018008C(s32 a0) {
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s32 s0 = a0;
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Blk8_80126940_8018008C local = D_80126940;
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if (local.v[2] >= 0x1501) {
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D_801274E8 = local;
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D_80126954 = 0x12C;
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D_8012695C = 0x2EE;
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D_80126968 = 0x155;
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D_8012696A = 0x800;
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D_8012696C = 0;
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D_80126976 = 0;
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D_80126978 = -0x96;
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D_8012697A = 0;
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func_8012A018((s32)func_80180050, 1);
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} else {
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s32 msg;
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if (local.v[2] >= 0x901) {
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msg = (s32)&D_80194328;
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} else {
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if (local.v[0] >= 0x441) {
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msg = (s32)&D_80194314;
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} else {
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if (local.v[2] >= 0x341) {
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msg = (s32)&D_80194300;
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} else {
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msg = (s32)&D_801942EC;
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}
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}
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}
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func_80180570(msg);
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}
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if (local.v[1] >= -0x67F) {
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local.v[1] = -0x680;
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}
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func_801803D8(s0, local.v);
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}
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extern s32 D_801151D4;
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void func_80180200(void) {
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@@ -4781,7 +4849,64 @@ void func_80186470(void *a0) {
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}
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INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80186518);
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#include "common.h"
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extern void *D_801DEC8C;
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extern void func_8001C1E4(void *a0, s32 a1);
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void func_80186518(void *a0, void *a1, s32 a2) {
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register void *self0 __asm__("$8");
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s32 flag;
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void *tbl;
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s32 base;
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s32 base2;
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self0 = a0;
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flag = *(u16 *)((s32)a1 + 0x86);
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tbl = D_801DEC8C;
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if (flag & 8) {
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base = a2 * 12 + (s32)tbl;
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*(s16 *)((s32)a1 + 0x6) = *(u16 *)(base + 0) - *(u16 *)(base - 0xC);
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*(s16 *)((s32)a1 + 0xA) = *(u16 *)(base + 2) - *(u16 *)(base - 0xA);
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*(s16 *)((s32)a1 + 0xE) = *(u16 *)(base + 4) - *(u16 *)(base - 8);
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*(u16 *)(*(s32 *)((s32)a1 + 0x20) + 0x10) =
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*(u16 *)(base + 6) - *(u16 *)(base - 6);
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*(u16 *)(*(s32 *)((s32)a1 + 0x20) + 0x12) =
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*(u16 *)(base + 8) - *(u16 *)(base - 4);
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*(u16 *)(*(s32 *)((s32)a1 + 0x20) + 0x14) =
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*(u16 *)(base + 0xA) - *(u16 *)(base - 2);
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func_8001C1E4(*(void **)((s32)a1 + 0x20),
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*(s32 *)(*(s32 *)((s32)a1 + 0x64) + 0x20));
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} else {
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u16 *dst;
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s32 i;
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base2 = *(s32 *)(*(s32 *)((s32)self0 + 0x20) + 0x20);
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if (base2 != 0) {
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s32 row2 = a2 * 12 + base2;
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*(u16 *)(*(s32 *)((s32)a1 + 0x20) + 0x10) = *(u16 *)(row2 + 6);
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*(u16 *)(*(s32 *)((s32)a1 + 0x20) + 0x12) =
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*(u16 *)(row2 + 8) + *(u16 *)(*(s32 *)((s32)self0 + 0x20) + 0x12);
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*(u16 *)(*(s32 *)((s32)a1 + 0x20) + 0x14) = *(u16 *)(row2 + 0xA);
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}
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*(s16 *)((s32)a1 + 0x6) = *(s32 *)(*(s32 *)((s32)a1 + 0x20) + 0x48);
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*(s16 *)((s32)a1 + 0xA) = *(s32 *)(*(s32 *)((s32)a1 + 0x20) + 0x4C);
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*(s16 *)((s32)a1 + 0xE) = *(s32 *)(*(s32 *)((s32)a1 + 0x20) + 0x50);
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dst = (u16 *)((s32)a1 + 0xE4);
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for (i = 0; i < 4; i++) {
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*dst = *(u16 *)(*(s32 *)((s32)a1 + 0x20) + 0x10);
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dst++;
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*dst = *(u16 *)(*(s32 *)((s32)a1 + 0x20) + 0x12);
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dst++;
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*dst = *(u16 *)(*(s32 *)((s32)a1 + 0x20) + 0x14);
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dst++;
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}
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}
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}
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INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_801866C4);
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@@ -5048,7 +5173,72 @@ void func_801873D0(void) {
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INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_801873D8);
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INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_801873F8);
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#include "common.h"
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extern void func_80016714(void *a0, s32 a1);
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extern void func_8012C218(void *a0);
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extern void func_8002D4C8(s32 a0, s32 a1);
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extern void func_8012B414(int a0);
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extern void func_80187D68(void *a0);
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extern void *D_801EFD70[4];
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void func_801873F8(void *a0)
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{
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void *s2 = a0;
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void *s3;
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u16 val;
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s32 i;
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s3 = *(void **)((s32)s2 + 0xCC);
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if (*(s16 *)(*(s32 *)((s32)s2 + 0x20) + 0x18) != 0) {
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*(s16 *)(*(s32 *)((s32)s2 + 0x20) + 0x18) -= 0x400;
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val = *(u16 *)(*(s32 *)((s32)s2 + 0x20) + 0x18);
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*(s16 *)(*(s32 *)((s32)s2 + 0x20) + 0x1A) = val;
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if (s3 != NULL) {
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*(s16 *)((s32)s3 + 0x18) = val;
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*(s16 *)((s32)s3 + 0x1A) = val;
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}
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for (i = 0; i < 4; i++) {
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register void *entry __asm__("$4") = D_801EFD70[i];
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if (entry != NULL) {
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*(s16 *)((s32)entry + 0x18) = val;
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*(s16 *)((s32)entry + 0x1A) = val;
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}
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}
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if (*(s16 *)(*(s32 *)((s32)s2 + 0x20) + 0x18) != 0) {
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goto special;
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}
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}
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for (i = 0; i < 4; i++) {
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if (D_801EFD70[i] != NULL) {
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func_80016714(D_801EFD70[i], 0x38);
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}
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}
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if (*(void **)((s32)s2 + 0xD0) != NULL) {
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func_80016714(*(void **)((s32)s2 + 0xD0), 0x38);
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}
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if (*(void **)((s32)s2 + 0xD4) != NULL) {
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func_80016714(*(void **)((s32)s2 + 0xD4), 0x38);
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}
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if (s3 != NULL) {
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func_80016714(s3, 0x84);
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}
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func_8012C218(s2);
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func_8002D4C8(4, 0x88A);
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func_8002D4C8(4, 0x88B);
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return;
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special:
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*(s16 *)(*(s32 *)((s32)s2 + 0x20) + 0x14) =
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*(u16 *)(*(s32 *)((s32)s2 + 0x20) + 0x14) + 0x100;
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func_8012B414((s32)s2);
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func_80187D68(s2);
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}
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INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80187574);
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@@ -5093,7 +5283,102 @@ void func_80187698(void *a0) {
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INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_801876A0);
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INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_8018778C);
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#include "common.h"
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typedef struct { s16 x, y, z, w; } Vec4S16_8018778C;
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extern s32 func_8012B70C(s16 *a0, s16 *a1);
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extern s32 func_80187940(s32 arg0, s32 arg1, s32 arg2, s16 arg3);
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extern u16 D_80126B5E;
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extern u16 D_80126B62;
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extern u16 D_80126B66;
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/* func_8018778C — ov_SC04_011, 109 ins, MATCH.
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*
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* Residual class cracked on the 2nd pass: "header-load-chain-schedule-intrinsic" was NOT
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* intrinsic — it was two sched1 LUID/birthing-boost artifacts introduced by the draft's own
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* scaffolding (gcc-2.7.2-map/sched.md §S1 + §S2):
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*
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* 1. NO explicit `c140`/`c40` locals and NO hoisted `i = 0;` before the loop. Writing the
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* -0x140 / -0x40 constants INLINE in the loop body and using a plain `for (i = 0; ...)`
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* lets loop.c hoist the constant loads into the preheader, which puts their LUIDs AFTER
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* the call's arg setup. Only then do `addiu $a0,$sp,0x10` / `addiu $a1,$sp,0x18` win the
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* LUID tie-break and land early (target idx 12/14) as the fillers of the FIRST P-chain's
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* load-delay slots — instead of sinking next to the jal. Explicit early locals for those
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* constants (the 1st-pass draft) forced the opposite order and cost 22 instructions.
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* This is also what fixes the global temps' register choice ($v1/$a2/$v0, not $v1/$a1/$v0).
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*
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* 2. HEADER STATEMENT ORDER is the schedule (§S1): the three self-position reads come FIRST,
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* in field order, and only then the three target-position globals in x,y,z order. A 120-way
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* sweep over every A-vs-B interleaving x every v18 field order has exactly ONE zero-diff
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* point — this one; the next best (v18 written x,z,y) is 2 off, and ANY interleaving that
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* puts a v18 store before v10.z is >= 20 off.
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*
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* Note the two 1st-pass levers that are NOT needed once the above is right: the loop body writes
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* v18 before v10 per call (kept), but the struct stays s16-typed (u16 would emit `ori` for
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* -0x280), and no register pins / pointer locals are involved at all — an early `s16 *p1 = &v18`
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* gets the birthing boost (REG_N_SETS==1) and sinks right back to the call.
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*/
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void func_8018778C(void *a0)
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{
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Vec4S16_8018778C v10;
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Vec4S16_8018778C v18;
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s32 i;
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s16 ang;
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v10.x = *(s32 *)(*(s32 *)(*(s32 *)((s32)a0 + 0x64) + 0x20) + 0x48);
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v10.y = *(s32 *)(*(s32 *)(*(s32 *)((s32)a0 + 0x64) + 0x20) + 0x4C);
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v10.z = *(s32 *)(*(s32 *)(*(s32 *)((s32)a0 + 0x64) + 0x20) + 0x50);
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v18.x = D_80126B5E;
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v18.y = D_80126B62;
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v18.z = D_80126B66;
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ang = func_8012B70C((s16 *)&v10, (s16 *)&v18) & 0xFFF;
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for (i = 0; i < 3; i++) {
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s16 x = (i << 6) - 0x40;
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v18.x = x;
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v10.x = x;
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v10.z = -0x140;
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v18.z = 0;
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v18.y = -0x40;
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v10.y = -0x40;
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if (func_80187940((s32)a0, (s32)&v10, (s32)&v18, ang)) {
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return;
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}
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v18.y = 0;
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v10.y = 0;
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if (func_80187940((s32)a0, (s32)&v10, (s32)&v18, ang)) {
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return;
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}
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v18.y = 0x40;
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v10.y = 0x40;
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if (func_80187940((s32)a0, (s32)&v10, (s32)&v18, ang)) {
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return;
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}
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v10.z = -0x280;
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v18.z = -0x140;
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if (func_80187940((s32)a0, (s32)&v10, (s32)&v18, ang)) {
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return;
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}
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v18.y = 0;
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v10.y = 0;
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if (func_80187940((s32)a0, (s32)&v10, (s32)&v18, ang)) {
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return;
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}
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v18.y = -0x40;
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v10.y = -0x40;
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if (func_80187940((s32)a0, (s32)&v10, (s32)&v18, ang)) {
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return;
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}
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}
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}
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#include "common.h"
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