src(phase-36): T4 batch tus7 — delever: batch tus7 — 300 files (TUs; 983 drawable) · 1407 bodies: 432 lever-free, 973 residue, 2 refused · sites removed 1855 / needed 2032 / refused 6 / deferred 0 · replays 589 (0 disagreed) · compiles 3211 in 101 s wall · final 300/300 identical · written 300 files | R22 check-all: 218 passed, 0 failed of 218 | census: THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 36,764 sites in 13,224 bodies (2,199 distinct) · marked !FAKE 29,045 · UNMARKED 7,719 (delever_cycle)

This commit is contained in:
Drew T
2026-09-09 04:02:44 -06:00
parent 3e60fdf418
commit 34f03003df
311 changed files with 10377 additions and 4180 deletions
+476
View File
@@ -0,0 +1,476 @@
clean: removed build/, expected/, and the regenerated splat tree (asm/, assets/, undefined_*_auto.txt).
disc-extract: up to date — extracted/retail/ matches the committed manifest (sha1 e5c6019249dec3c71bb2cf40658a78439dddb037)
splat 0.41.0 (powered by spimdisasm 1.41.0)
0%| | 0/1096 [00:00<?, ?it/s]
Loading symbols (symbols.us): 0%| | 0/1096 [00:00<?, ?it/s]
Loading symbols (symbols.us): 100%|██████████| 1096/1096 [00:00<00:00, 152890.45it/s]
0%| | 0/47 [00:00<?, ?it/s]
Loading symbols (symbols.us.ram): 0%| | 0/47 [00:00<?, ?it/s]
Loading symbols (symbols.us.ram): 100%|██████████| 47/47 [00:00<00:00, 426693.26it/s]
0%| | 0/2 [00:00<?, ?it/s]
Scanning header: 0%| | 0/2 [00:00<?, ?it/s]
Scanning main: 0%| | 0/2 [00:00<?, ?it/s]
Rodata segment '800' may belong to the text segment '800'
Based on the usage from the function LzssDecodeSector to the symbol jtbl_80072A38
The rodata segment '800' has jumptables that are not aligned properly file-wise, indicating one or more likely file split.
File split suggestions for this segment will follow in config yaml format:
- [0x6324C, .rodata]
- [0x63388, .rodata]
- [0x633FC, .rodata]
Rodata segment '800_b' may belong to the text segment '800_b'
Based on the usage from the function func_8002B0B4 to the symbol jtbl_80072E44
Rodata segment '800_b_2' may belong to the text segment '800_b_2'
Based on the usage from the function func_8002DC68 to the symbol jtbl_80072F3C
The rodata segment '800_b_2' has jumptables that are not aligned properly file-wise, indicating one or more likely file split.
File split suggestions for this segment will follow in config yaml format:
- [0x63920, .rodata]
Rodata segment '800_c' may belong to the text segment '800_c'
Based on the usage from the function func_80035270 to the symbol jtbl_800732A0
Scanning main: 100%|██████████| 2/2 [00:01<00:00, 1.24it/s]
Scanning main: 100%|██████████| 2/2 [00:01<00:00, 1.24it/s]
0%| | 0/2 [00:00<?, ?it/s]
Splitting header: 0%| | 0/2 [00:00<?, ?it/s]
Splitting main: 0%| | 0/2 [00:00<?, ?it/s]
Splitting main: 100%|██████████| 2/2 [00:01<00:00, 1.93it/s]
Splitting main: 100%|██████████| 2/2 [00:01<00:00, 1.93it/s]
0%| | 0/2 [00:00<?, ?it/s]
Linker script header: 0%| | 0/2 [00:00<?, ?it/s]
Linker script main: 0%| | 0/2 [00:00<?, ?it/s]
Linker script main: 100%|██████████| 2/2 [00:00<00:00, 77.65it/s]
Split 340 KB (82.28%) in defined segments
header: 2 KB (0.50%) 1 split, 0 cached
c: 338 KB (81.78%) 85 split, 0 cached
unknown: 0 B (0.00%) from unknown bin files
ld_interleave --order: .main island = 8 pieces [53198.data.o, 800.o, 63470.data.o, 800_b.o, 800_b_2.o, 63940.data.o, 800_c.o, 63C4C.data.o]; pre=0 text=85 empties=166 bss=85
[ OK ] ov_SC05_000
[ OK ] ov_SC01_000
[ OK ] resident
[ OK ] ov_SC04_000
[ OK ] ov_SC06_000
[ OK ] ov_SC01_006
[ OK ] ov_SC03_002
[ OK ] ov_SC02_003
[ OK ] ov_SC04_019
[ OK ] ov_SC02_000
[ OK ] ov_SC01_005
[ OK ] ov_SC01_077
[ OK ] ov_SC01_001
[ OK ] ov_SC04_018
[ OK ] ov_SC03_001
[ OK ] ov_SC03_006
[ OK ] ov_SC01_004
[ OK ] ov_SC01_074
[ OK ] ov_SC01_008
[ OK ] ov_SC07_000
[ OK ] ov_SC02_004
[ OK ] ov_SC02_015
[ OK ] ov_SC01_080
[ OK ] ov_SC01_084
[ OK ] ov_SC02_021
[ OK ] ov_SC01_009
[ OK ] ov_SC02_016
[ OK ] ov_SC02_005
[ OK ] ov_SC02_031
[ OK ] ov_SC02_026
[ OK ] ov_SC02_027
[ OK ] ov_SC02_039
[ OK ] ov_SC02_028
[ OK ] ov_SC02_011
[ OK ] ov_SC03_003
[ OK ] ov_SC03_012
[ OK ] ov_SC02_035
[ OK ] ov_SC02_017
[ OK ] ov_SC02_041
[ OK ] ov_SC03_010
[ OK ] ov_SC03_011
[ OK ] ov_SC03_013
[ OK ] ov_SC03_023
[ OK ] ov_SC03_007
[ OK ] ov_SC03_024
[ OK ] ov_SC03_014
[ OK ] ov_SC03_092
[ OK ] ov_SC03_029
[ OK ] ov_SC03_015
[ OK ] ov_SC03_089
[ OK ] ov_SC03_028
[ OK ] ov_SC03_031
[ OK ] ov_SC03_094
[ OK ] ov_SC03_093
[ OK ] ov_SC03_090
[ OK ] ov_SC03_096
[ OK ] ov_SC03_091
[ OK ] ov_SC03_095
[ OK ] ov_SC03_030
[ OK ] ov_SC03_097
[ OK ] ov_SC03_098
[ OK ] ov_SC03_101
[ OK ] ov_SC03_099
[ OK ] ov_SC03_109
[ OK ] ov_SC03_108
[ OK ] ov_SC03_100
[ OK ] ov_SC03_102
[ OK ] ov_SC03_103
[ OK ] ov_SC03_110
[ OK ] ov_SC03_105
[ OK ] ov_SC03_113
[ OK ] ov_SC03_111
[ OK ] ov_SC03_115
[ OK ] ov_SC03_114
[ OK ] ov_SC03_112
[ OK ] ov_SC03_104
[ OK ] ov_SC03_116
[ OK ] ov_SC03_126
[ OK ] ov_SC03_121
[ OK ] ov_SC03_117
[ OK ] ov_SC04_003
[ OK ] ov_SC04_006
[ OK ] ov_SC04_008
[ OK ] ov_SC03_118
[ OK ] ov_SC04_004
[ OK ] ov_SC04_009
[ OK ] ov_SC03_119
[ OK ] ov_SC03_125
[ OK ] ov_SC04_002
[ OK ] ov_SC04_005
[ OK ] ov_SC04_007
[ OK ] ov_SC04_010
[ OK ] ov_SC03_124
[ OK ] ov_SC04_012
[ OK ] ov_SC04_021
[ OK ] ov_SC05_006
[ OK ] ov_SC05_002
[ OK ] ov_SC04_016
[ OK ] ov_SC05_004
[ OK ] ov_SC04_015
[ OK ] ov_SC04_020
[ OK ] ov_SC05_007
[ OK ] ov_SC05_001
[ OK ] ov_SC05_003
[ OK ] ov_SC05_005
[ OK ] ov_SC05_009
[ OK ] ov_SC05_008
[ OK ] ov_SC04_011
[ OK ] ov_SC05_011
[ OK ] ov_SC05_010
[ OK ] ov_SC05_019
[ OK ] ov_SC06_015
[ OK ] ov_SC06_010
[ OK ] ov_SC06_014
[ OK ] ov_SC06_013
[ OK ] ov_SC06_008
[ OK ] ov_SC06_011
[ OK ] ov_SC06_016
[ OK ] ov_SC06_020
[ OK ] ov_SC05_018
[ OK ] ov_SC05_017
[ OK ] ov_SC06_018
[ OK ] ov_SC06_027
[ OK ] ov_SC06_022
[ OK ] ov_SC06_006
[ OK ] ov_SC06_025
[ OK ] ov_SC06_024
[ OK ] md_MAIN_013
[ OK ] md_MAIN_014
[ OK ] ov_SC07_008
[ OK ] ov_SC07_002
[ OK ] md_MAIN_016
[ OK ] md_MAIN_015
[ OK ] md_MAIN_017
[ OK ] md_MAIN_018
[ OK ] md_MAIN_020
[ OK ] md_MAIN_019
[ OK ] md_MAIN_021
[ OK ] ov_SC06_030
[ OK ] ov_SC07_001
[ OK ] md_MAIN_022
[ OK ] md_MAIN_023
[ OK ] md_MAIN_024
[ OK ] md_MAIN_025
[ OK ] md_MAIN_027
[ OK ] md_MAIN_026
[ OK ] md_MAIN_028
[ OK ] ov_SC07_009
[ OK ] md_MAIN_030
[ OK ] md_MAIN_031
[ OK ] md_MAIN_032
[ OK ] md_MAIN_033
[ OK ] md_MAIN_029
[ OK ] md_MAIN_034
[ OK ] md_MAIN_035
[ OK ] md_MAIN_037
[ OK ] md_MAIN_036
[ OK ] md_MAIN_039
[ OK ] ov_SC06_032
[ OK ] ov_MAIN_012
[ OK ] ov_SC06_029
[ OK ] md_MAIN_038
[ OK ] md_MAIN_040
[ OK ] ov_SC07_011
[ OK ] md_MAIN_041
[ OK ] md_MAIN_042
[ OK ] md_MAIN_043
[ OK ] md_MAIN_044
[ OK ] ov_SC07_010
[ OK ] ov_SC06_033
[ OK ] md_MAIN_047
[ OK ] md_MAIN_046
[ OK ] md_MAIN_045
[ OK ] md_MAIN_008
[ OK ] md_MAIN_001
[ OK ] md_MAIN_011
[ OK ] md_SC03_073
[ OK ] md_SC03_074
[ OK ] md_SC03_078
[ OK ] md_SC03_075
[ OK ] md_SC03_077
[ OK ] md_SC03_076
[ OK ] md_SC03_132
[ OK ] md_SC03_079
[ OK ] md_SC03_133
[ OK ] ov_SC07_007
[ OK ] md_SC03_137
[ OK ] md_SC03_135
[ OK ] md_SC03_136
[ OK ] md_SC03_134
[ OK ] ov_SC03_107
[ OK ] md_SC03_138
[ OK ] md_SC04_024
[ OK ] md_MAIN_003
[ OK ] md_SC04_025
[ OK ] md_SC04_029
[ OK ] md_SC04_026
[ OK ] md_SC04_028
[ OK ] md_SC04_027
[ OK ] md_SC05_023
[ OK ] md_SC05_028
[ OK ] md_SC05_025
[ OK ] md_MAIN_007
[ OK ] md_SC04_030
[ OK ] md_SC05_027
[ OK ] md_SC05_024
[ OK ] md_MAIN_009
[ OK ] md_SC05_029
[ OK ] md_SC05_026
[ OK ] md_SC03_054
[ OK ] md_SC03_056
[ OK ] md_SC03_053
[ OK ] md_SC02_009
[ OK ] ov_SC07_006
[ OK ] ov_SC02_037
[ OK ] md_SC07_003
[ OK ] md_SC07_004
extract-all: 217 extracted, 0 failed of 217 (+ main, serial)
[ OK ] resident
[ OK ] ov_SC05_000
[ OK ] ov_SC01_006
[ OK ] ov_SC01_000
[ OK ] ov_SC04_000
[ OK ] ov_SC03_006
[ OK ] ov_SC01_005
[ OK ] ov_SC01_001
[ OK ] ov_SC01_077
[ OK ] ov_SC03_002
[ OK ] ov_SC06_000
[ OK ] ov_SC04_019
[ OK ] ov_SC02_000
[ OK ] ov_SC04_018
[ OK ] ov_SC02_003
[ OK ] ov_SC03_001
[ OK ] ov_SC07_000
[ OK ] ov_SC01_004
[ OK ] ov_SC01_008
[ OK ] ov_SC01_080
[ OK ] ov_SC02_004
[ OK ] ov_SC01_009
[ OK ] ov_SC02_015
[ OK ] ov_SC01_074
[ OK ] ov_SC01_084
[ OK ] ov_SC02_016
[ OK ] ov_SC02_017
[ OK ] ov_SC02_021
[ OK ] ov_SC02_026
[ OK ] ov_SC02_011
[ OK ] ov_SC02_005
[ OK ] ov_SC02_027
[ OK ] ov_SC02_031
[ OK ] ov_SC02_028
[ OK ] ov_SC02_035
[ OK ] ov_SC02_039
[ OK ] ov_SC03_003
[ OK ] ov_SC03_010
[ OK ] ov_SC02_041
[ OK ] ov_SC03_011
[ OK ] ov_SC03_012
[ OK ] ov_SC03_007
[ OK ] ov_SC03_013
[ OK ] ov_SC03_023
[ OK ] ov_SC03_014
[ OK ] ov_SC03_015
[ OK ] ov_SC03_024
[ OK ] ov_SC03_030
[ OK ] ov_SC03_031
[ OK ] ov_SC03_089
[ OK ] ov_SC03_029
[ OK ] ov_SC03_028
[ OK ] ov_SC03_095
[ OK ] ov_SC03_092
[ OK ] ov_SC03_094
[ OK ] ov_SC03_093
[ OK ] ov_SC03_090
[ OK ] ov_SC03_091
[ OK ] ov_SC03_096
[ OK ] ov_SC03_097
[ OK ] main
[ OK ] ov_SC03_098
[ OK ] ov_SC03_101
[ OK ] ov_SC03_099
[ OK ] ov_SC03_100
[ OK ] ov_SC03_102
[ OK ] ov_SC03_103
[ OK ] ov_SC03_109
[ OK ] ov_SC03_104
[ OK ] ov_SC03_108
[ OK ] ov_SC03_111
[ OK ] ov_SC03_110
[ OK ] ov_SC03_113
[ OK ] ov_SC03_105
[ OK ] ov_SC03_114
[ OK ] ov_SC03_112
[ OK ] ov_SC03_115
[ OK ] ov_SC03_116
[ OK ] ov_SC03_117
[ OK ] ov_SC03_118
[ OK ] ov_SC03_119
[ OK ] ov_SC03_121
[ OK ] ov_SC03_125
[ OK ] ov_SC04_002
[ OK ] ov_SC04_004
[ OK ] ov_SC03_124
[ OK ] ov_SC03_126
[ OK ] ov_SC04_006
[ OK ] ov_SC04_003
[ OK ] ov_SC04_007
[ OK ] ov_SC04_008
[ OK ] ov_SC04_009
[ OK ] ov_SC04_005
[ OK ] ov_SC04_010
[ OK ] ov_SC04_012
[ OK ] ov_SC04_016
[ OK ] ov_SC04_015
[ OK ] ov_SC04_011
[ OK ] ov_SC04_021
[ OK ] ov_SC05_001
[ OK ] ov_SC05_003
[ OK ] ov_SC05_002
[ OK ] ov_SC05_005
[ OK ] ov_SC04_020
[ OK ] ov_SC05_008
[ OK ] ov_SC05_009
[ OK ] ov_SC05_004
[ OK ] ov_SC05_006
[ OK ] ov_SC05_007
[ OK ] ov_SC05_010
[ OK ] ov_SC05_011
[ OK ] ov_SC05_019
[ OK ] ov_SC05_018
[ OK ] ov_SC06_006
[ OK ] ov_SC06_010
[ OK ] ov_SC05_017
[ OK ] ov_SC06_013
[ OK ] ov_SC06_008
[ OK ] ov_SC06_011
[ OK ] ov_SC06_015
[ OK ] ov_SC06_014
[ OK ] ov_SC06_016
[ OK ] ov_SC06_020
[ OK ] ov_SC06_022
[ OK ] ov_SC06_018
[ OK ] ov_SC06_024
[ OK ] ov_SC06_027
[ OK ] ov_SC06_025
[ OK ] md_MAIN_013
[ OK ] md_MAIN_014
[ OK ] md_MAIN_015
[ OK ] md_MAIN_016
[ OK ] md_MAIN_017
[ OK ] ov_SC06_030
[ OK ] md_MAIN_018
[ OK ] md_MAIN_019
[ OK ] ov_SC06_029
[ OK ] ov_SC07_001
[ OK ] ov_SC07_008
[ OK ] ov_SC07_002
[ OK ] md_MAIN_021
[ OK ] md_MAIN_020
[ OK ] md_MAIN_022
[ OK ] ov_SC07_009
[ OK ] md_MAIN_023
[ OK ] md_MAIN_024
[ OK ] md_MAIN_025
[ OK ] ov_SC07_007
[ OK ] md_MAIN_026
[ OK ] md_MAIN_027
[ OK ] md_MAIN_029
[ OK ] md_MAIN_030
[ OK ] md_MAIN_028
[ OK ] md_MAIN_032
[ OK ] md_MAIN_031
[ OK ] md_MAIN_033
[ OK ] md_MAIN_034
[ OK ] md_MAIN_037
[ OK ] md_MAIN_039
[ OK ] md_MAIN_038
[ OK ] md_MAIN_036
[ OK ] md_MAIN_041
[ OK ] md_MAIN_035
[ OK ] md_MAIN_042
[ OK ] md_MAIN_040
[ OK ] md_MAIN_043
[ OK ] ov_SC07_006
[ OK ] md_MAIN_044
[ OK ] md_MAIN_047
[ OK ] md_MAIN_008
[ OK ] md_MAIN_045
[ OK ] md_MAIN_046
[ OK ] md_MAIN_001
[ OK ] ov_SC07_011
[ OK ] md_MAIN_011
[ OK ] ov_SC06_033
[ OK ] md_SC03_074
[ OK ] md_SC03_073
[ OK ] md_SC03_075
[ OK ] md_SC03_078
[ OK ] md_SC03_079
[ OK ] ov_SC07_010
[ OK ] md_SC03_077
[ OK ] md_SC03_076
[ OK ] md_SC03_132
[ OK ] md_SC03_134
[ OK ] md_SC03_133
[ OK ] md_SC07_003
[ OK ] md_SC03_137
[ OK ] ov_MAIN_012
[ OK ] md_SC04_024
[ OK ] md_SC03_136
[ OK ] md_SC04_025
[ OK ] md_SC04_026
[ OK ] md_SC03_138
[ OK ] md_SC03_135
[ OK ] md_SC04_030
[ OK ] md_MAIN_003
[ OK ] md_SC04_029
[ OK ] md_SC04_028
[ OK ] md_SC05_024
+106 -102
View File
@@ -41,7 +41,7 @@
"addu": 968,
"and": 2,
"andi": 1,
"la": 145,
"la": 144,
"lh": 134,
"li": 1,
"lui": 5,
@@ -55,14 +55,14 @@
},
"kinds": {
"asm-body/direct": 13,
"barrier/direct": 4941,
"barrier/direct": 4879,
"barrier/via-macro": 2,
"gte/direct": 1140,
"gte/via-macro": 5751,
"instruction/direct": 1700,
"instruction/direct": 1699,
"instruction/via-macro": 22,
"keepalive/direct": 2089,
"launder/direct": 4532,
"keepalive/direct": 2050,
"launder/direct": 4397,
"launder/via-macro": 440,
"verbatim-body/direct": 2682
}
@@ -70,65 +70,65 @@
"binaries": 218,
"classes": {
"A": {
"bodies": 11348,
"distinct_bodies": 1831,
"bodies": 10964,
"distinct_bodies": 1804,
"file_scope": 0,
"in_bodies": 24841,
"in_bodies": 23262,
"kinds": {
"pin": 24841
"pin": 23262
},
"marked": 16440,
"sites": 24841,
"marked": 17729,
"sites": 23262,
"tus": 2676,
"unmarked": 8401
"unmarked": 5533
},
"B": {
"bodies": 10122,
"distinct_bodies": 1200,
"bodies": 10052,
"distinct_bodies": 1196,
"file_scope": 13,
"in_bodies": 23299,
"in_bodies": 23062,
"kinds": {
"asm-body": 13,
"barrier": 4943,
"barrier": 4881,
"gte": 6891,
"instruction": 1722,
"keepalive": 2089,
"launder": 4972,
"instruction": 1721,
"keepalive": 2050,
"launder": 4837,
"verbatim-body": 2682
},
"marked": 10712,
"sites": 23312,
"tus": 2450,
"unmarked": 12600
"marked": 11453,
"sites": 23075,
"tus": 2432,
"unmarked": 11622
},
"C": {
"bodies": 710,
"distinct_bodies": 146,
"file_scope": 424,
"in_bodies": 1748,
"bodies": 678,
"distinct_bodies": 143,
"file_scope": 423,
"in_bodies": 1714,
"kinds": {
"cast": 1615,
"decl-body": 131,
"decl-file": 424,
"cast": 1612,
"decl-body": 100,
"decl-file": 423,
"param": 2
},
"marked": 1,
"sites": 2172,
"tus": 757,
"unmarked": 2171
"marked": 2,
"sites": 2137,
"tus": 726,
"unmarked": 2135
},
"D": {
"bodies": 69,
"distinct_bodies": 69,
"bodies": 67,
"distinct_bodies": 67,
"file_scope": 0,
"in_bodies": 86,
"in_bodies": 83,
"kinds": {
"register": 86
"register": 83
},
"marked": 0,
"sites": 86,
"tus": 19,
"unmarked": 86
"sites": 83,
"tus": 17,
"unmarked": 83
},
"E": {
"bodies": 737,
@@ -175,33 +175,37 @@
"expected": 45,
"got": 45,
"name": "src/800.c func_800226C0 pins",
"ok": true
"ok": true,
"status": "OK"
},
{
"expected": 26,
"got": 26,
"name": "src/shared/ov/func_80178004.h pins",
"ok": true
"ok": true,
"status": "OK"
},
{
"expected": 3,
"got": 3,
"got": 0,
"name": "ov_SC03_006 func_80184034 bare-name pins",
"ok": true
"ok": true,
"status": "N-A"
},
{
"expected": 0,
"got": 0,
"name": "engine_prelude.h asm sites (a macro definition only)",
"ok": true
"ok": true,
"status": "OK"
}
],
"coverage": {
"asm": {
"comment_dead": 6792,
"live": 51761,
"live": 49945,
"macro_block": 7189,
"raw": 65742
"raw": 63926
},
"attribute": {
"comment_dead": 0,
@@ -217,30 +221,30 @@
},
"register": {
"comment_dead": 8584,
"live": 24927,
"live": 23345,
"macro_block": 18,
"raw": 33529
"raw": 31947
},
"volatile": {
"comment_dead": 2607,
"live": 3914,
"live": 3877,
"macro_block": 6510,
"raw": 13031
"raw": 12994
}
},
"coverage_ok": true,
"elapsed_s": 35.7,
"elapsed_s": 50.8,
"generated": "2026-09-09",
"head": "ca761c4f6",
"head": "3e60fdf41",
"headers": 3181,
"levers_AB": {
"asm": 13739,
"bodies": 13622,
"distinct_bodies": 2225,
"marked": 27018,
"pins": 24841,
"sites": 38580,
"unmarked": 11562,
"asm": 13502,
"bodies": 13224,
"distinct_bodies": 2199,
"marked": 29045,
"pins": 23262,
"sites": 36764,
"unmarked": 7719,
"what": "register pins + asm statements excluding GTE ops: the classes the phase drives to 0"
},
"macro_definitions": {
@@ -386,74 +390,74 @@
"sample": []
},
"pins": {
"bare_name": 74,
"init": 3421,
"bare_name": 65,
"init": 3142,
"registers": {
"$0": 1337,
"$0": 1335,
"$1": 2,
"$10": 166,
"$11": 30,
"$11": 29,
"$12": 420,
"$13": 25,
"$14": 153,
"$13": 24,
"$14": 152,
"$15": 8,
"$16": 2478,
"$17": 2116,
"$18": 731,
"$19": 685,
"$2": 4400,
"$20": 381,
"$21": 572,
"$22": 155,
"$23": 287,
"$16": 2115,
"$17": 1785,
"$18": 653,
"$19": 671,
"$2": 4243,
"$20": 376,
"$21": 445,
"$22": 30,
"$23": 162,
"$24": 4,
"$25": 7,
"$25": 6,
"$29": 13,
"$3": 2736,
"$4": 3125,
"$5": 2587,
"$6": 625,
"$7": 788,
"$8": 611,
"$9": 325,
"$3": 2707,
"$4": 3074,
"$5": 2580,
"$6": 609,
"$7": 782,
"$8": 482,
"$9": 324,
"3": 1,
"4": 1,
"5": 2,
"6": 6,
"6": 5,
"7": 5,
"9": 4,
"a0": 17,
"a0": 14,
"a1": 3,
"s0": 2,
"s1": 1,
"s2": 1,
"v0": 16,
"v1": 15
"v0": 13,
"v1": 13
},
"sites": 24841,
"sites": 23262,
"sp": 13,
"spelling": {
"__asm__": 24635,
"asm": 206
"__asm__": 23101,
"asm": 161
},
"volatile_qualified": 136,
"zero": 1337
"volatile_qualified": 135,
"zero": 1335
},
"src_stamp": "22522952c40f4327",
"src_stamp": "585eacba5f94123d",
"tus": 4121,
"unclassified": 0,
"union_AD": {
"bodies": 17120,
"bodies": 16689,
"by_kind": {
"main": 204,
"md": 213,
"ov": 16294,
"ov": 15863,
"resident": 16,
"shared": 393
},
"copies_in_multi": 15086,
"distinct_bodies": 2537,
"multi_copy_classes": 503
"copies_in_multi": 14675,
"distinct_bodies": 2507,
"multi_copy_classes": 493
},
"verbatim_excluded": {
"functions": 13,
@@ -489,9 +493,9 @@
},
"volatile": {
"kinds": {
"cast": 1615,
"decl-body": 131,
"decl-file": 424,
"cast": 1612,
"decl-body": 100,
"decl-file": 423,
"param": 2
}
}
+14 -14
View File
@@ -1,29 +1,29 @@
lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13)
coverage asm raw 65742 = live 51761 + macro-block 7189 + comment/dead 6792
coverage register raw 33529 = live 24927 + macro-block 18 + comment/dead 8584
coverage volatile raw 13031 = live 3914 + macro-block 6510 + comment/dead 2607
coverage asm raw 63926 = live 49945 + macro-block 7189 + comment/dead 6792
coverage register raw 31947 = live 23345 + macro-block 18 + comment/dead 8584
coverage volatile raw 12994 = live 3877 + macro-block 6510 + comment/dead 2607
coverage builtin raw 599 = live 445 + macro-block 0 + comment/dead 154
coverage attribute raw 76 = live 76 + macro-block 0 + comment/dead 0
class sites in-bodies file-scope bodies distinct TUs marked unmarked kinds
A pins 24841 24841 0 11348 1831 2676 16440 8401 {'pin': 24841}
B asm 23312 23299 13 10122 1200 2450 10712 12600 {'barrier': 4943, 'launder': 4972, 'keepalive': 2089, 'instruction': 1722, 'gte': 6891, 'asm-body': 13, 'verbatim-body': 2682}
C volatile 2172 1748 424 710 146 757 1 2171 {'cast': 1615, 'decl-body': 131, 'decl-file': 424, 'param': 2}
D register 86 86 0 69 69 19 0 86 {'register': 86}
A pins 23262 23262 0 10964 1804 2676 17729 5533 {'pin': 23262}
B asm 23075 23062 13 10052 1196 2432 11453 11622 {'gte': 6891, 'barrier': 4881, 'instruction': 1721, 'launder': 4837, 'keepalive': 2050, 'asm-body': 13, 'verbatim-body': 2682}
C volatile 2137 1714 423 678 143 726 2 2135 {'decl-body': 100, 'decl-file': 423, 'cast': 1612, 'param': 2}
D register 83 83 0 67 67 17 0 83 {'register': 83}
E asm-label 7428 1005 6423 737 117 2080 0 7428 {'asm-label': 7428}
F builtin 445 445 0 428 29 302 0 445 {'builtin': 445}
G attribute 76 1 75 1 1 40 0 76 {'attribute': 76}
UNION A–D: 17,120 bodies · 2,537 distinct (addresses normalized) · 503 multi-copy classes holding 15,086 bodies · by kind {'ov': 16294, 'shared': 393, 'md': 213, 'resident': 16, 'main': 204}
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 38,580 sites in 13,622 bodies (2,225 distinct) · marked !FAKE 27,018 · UNMARKED 11,562
UNION A–D: 16,689 bodies · 2,507 distinct (addresses normalized) · 493 multi-copy classes holding 14,675 bodies · by kind {'ov': 15863, 'shared': 393, 'main': 204, 'md': 213, 'resident': 16}
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 36,764 sites in 13,224 bodies (2,199 distinct) · marked !FAKE 29,045 · UNMARKED 7,719
orphan !FAKE markers (no pin/asm site on the line nor below): 0
pins: 24,841 · $0 1,337 · $sp 13 · with initializer 3,421 · volatile-qualified 136 · bare-name 74 · spellings {'__asm__': 24635, 'asm': 206}
pins: 23,262 · $0 1,335 · $sp 13 · with initializer 3,142 · volatile-qualified 135 · bare-name 65 · spellings {'__asm__': 23101, 'asm': 161}
whole-body asm routines in C shells, manifest PERMANENT (hand asm, NOT levers): 22 routines · 2,682 sites (2,660 private copies + 22 shared headers); asm-bodies NOT permanent (levers): 13 site(s) ['func_8001E378:DECOMPILE-NOW', 'func_80020F34:DECOMPILE-NOW', 'func_800249F0:DECOMPILE-NOW', 'func_80025CBC:DECOMPILE-NOW', 'func_80026514:UNCERTAIN', 'func_800268D0:UNCERTAIN', 'func_80027058:DECOMPILE-NOW', 'func_80027200:DECOMPILE-NOW', 'func_800CBA44:DECOMPILE-NOW', 'func_8017D810:DECOMPILE-NOW', 'func_8017E26C:UNCERTAIN', 'func_80184440:DECOMPILE-NOW', 'func_801A3BCC:DECOMPILE-NOW']
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 4941, 'barrier/via-macro': 2, 'gte/direct': 1140, 'gte/via-macro': 5751, 'instruction/direct': 1700, 'instruction/via-macro': 22, 'keepalive/direct': 2089, 'launder/direct': 4532, 'launder/via-macro': 440, 'verbatim-body/direct': 2682}
instruction mnemonics: {'addu': 968, 'move': 407, 'la': 145, 'lh': 134, 'addiu': 24, 'RTP_SND': 22, '.section': 7, 'lui': 5, 'and': 2, 'andi': 1, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 4879, 'barrier/via-macro': 2, 'gte/direct': 1140, 'gte/via-macro': 5751, 'instruction/direct': 1699, 'instruction/via-macro': 22, 'keepalive/direct': 2050, 'launder/direct': 4397, 'launder/via-macro': 440, 'verbatim-body/direct': 2682}
instruction mnemonics: {'addu': 968, 'move': 407, 'la': 144, 'lh': 134, 'addiu': 24, 'RTP_SND': 22, '.section': 7, 'lui': 5, 'and': 2, 'andi': 1, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
gte mnemonics: {'gte_ldv0': 653, 'swc2': 449, 'lwc2': 435, 'gte_stsxy': 361, 'gte_rtps': 356, 'gte_stflg': 319, 'gte_rtpt': 289, 'gte_stsxy3': 191, 'gte_ldrgb': 162, 'gte_ldv3c': 159, 'gte_rt': 155, 'gte_SetRotMatrix': 150, 'gte_SetTransMatrix': 145, 'gte_stsv': 145, 'gte_stlvnl': 143, 'gte_ldv3': 140, 'gte_ldIR0z': 133, 'gte_ldIRGB': 133, 'gte_dpcl': 133, 'gte_stORGB': 133, 'gte_mvmva0': 131, 'gte_stsz4': 126, 'gte_stsz3': 123, 'gte_stszotz': 113, 'gte_nclip': 96, 'gte_stopz': 96, 'gte_stsxy3c': 94, 'lw': 80, 'lhu': 70, 'mfc2': 61}
asm-bearing macro definitions: 9,540 (338 names, 32 with >1 text) kinds {'gte': 9102, 'launder': 428, 'instruction': 9, 'barrier': 1}
controls (R39):
src/800.c func_800226C0 pins got 45 expected 45 OK
src/shared/ov/func_80178004.h pins got 26 expected 26 OK
ov_SC03_006 func_80184034 bare-name pins got 3 expected 3 OK
ov_SC03_006 func_80184034 bare-name pins got 0 expected 3 N-A
engine_prelude.h asm sites (a macro definition only) got 0 expected 0 OK
elapsed 35.7 s
elapsed 50.8 s
+750
View File
@@ -0,0 +1,750 @@
03:55:20 apply tus7: 300 files, control src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c IDENTICAL (0.25 s), calibration 3e60fdf41, census 22522952c40f4327
03:55:20 apply tus7: phase 1 (exemplar files) 36, phase 2 (copies replay) 264
03:55:21 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:21 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:21 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:21 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:22 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:23 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:23 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:23 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:23 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:23 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:23 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:23 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:23 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017E8A4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:23 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:24 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017D214 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:24 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:24 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:24 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017BF50 A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:24 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017ECA8 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:24 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017BEBC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:24 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017EB2C A=DIFFERS B: removed 2 needed 1 compiles 4
03:55:24 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017D72C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:25 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017BF70 A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:25 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017EDD4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:25 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017D7B4 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:25 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:25 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017E5C4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:25 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017C6CC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:25 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017DCF8 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:25 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017BEBC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:26 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:26 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017BF50 A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:26 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017EF50 A=DIFFERS B: removed 1 needed 3 compiles 5
03:55:26 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017EDE8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:26 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017E1D4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:26 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017C730 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:26 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017F07C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:26 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:26 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017CAD4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:27 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017F63C A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:27 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017E724 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:27 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017DBAC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:27 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017E73C A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:27 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8018009C A=COMPILE-ERROR B: removed 0 needed 1 compiles 2
03:55:27 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017F53C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:27 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:28 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017F5D8 A=DIFFERS B: removed 5 needed 3 compiles 9
03:55:28 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017ECEC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:28 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017DA20 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:28 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017FBFC A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:28 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017E2CC A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:28 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_80180D48 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:28 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017F114 A=DIFFERS B: removed 4 needed 4 compiles 9
03:55:28 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017DC50 A=DIFFERS B: removed 2 needed 3 compiles 6
03:55:28 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017E010 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:28 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017EE3C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:28 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017E2F8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017E830 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017E464 A=DIFFERS B: removed 5 needed 6 compiles 12
03:55:29 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017DCE4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_80180E40 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:29 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017F5B4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017EB78 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017DBE4 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:29 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017FCFC A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:29 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017F5BC A=DIFFERS B: removed 2 needed 1 compiles 4
03:55:29 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017E5C0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80180C74 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017E35C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017E6A4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:30 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8018107C A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:30 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_801818A4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:30 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017EDB8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:30 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80180F74 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:30 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017F554 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:30 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017FD14 A=DIFFERS B: removed 2 needed 1 compiles 4
03:55:31 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8018130C A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:31 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017E764 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:31 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017E710 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:31 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017FFB4 A=DIFFERS B: removed 1 needed 2 compiles 4
03:55:31 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80181AB4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:31 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017F724 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:31 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017FB04 A=DIFFERS B: removed 6 needed 4 compiles 11
03:55:31 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80181EF0 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:31 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017F1F0 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:31 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8018047C A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:32 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017ED28 A=DIFFERS B: removed 3 needed 4 compiles 8
03:55:32 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017F8F4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:32 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80181744 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:32 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_801816C8 A=DIFFERS B: removed 1 needed 2 compiles 4
03:55:32 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017F2D0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:32 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_80180590 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:32 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F024 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:32 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8018045C A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:32 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017F368 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:32 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017FAC4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:33 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80182AB4 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:33 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017FC94 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:33 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F10C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:33 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:<file-scope> A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:33 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801823BC A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:33 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80180598 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:33 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017EE80 A=DIFFERS B: removed 4 needed 1 compiles 6
03:55:34 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017FE64 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:34 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:34 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_801831B4 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:34 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017FA18 A=DIFFERS B: removed 1 needed 2 compiles 4
03:55:34 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017F510 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:34 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017F0EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:34 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8018000C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:35 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80183BB0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:35 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_80180EDC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:35 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80181D1C A=DIFFERS B: removed 0 needed 5 compiles 6
03:55:35 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80182464 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:35 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180164 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:35 src/ov_SC01_077/ov_SC01_077_after.c:func_80145934 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:35 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_80180054 A=DIFFERS B: removed 2 needed 9 compiles 12
03:55:35 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:35 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801803B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:35 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80184B94 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:36 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80180728 A=DIFFERS B: removed 0 needed 5 compiles 6
03:55:36 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80182560 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:36 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_801802BC A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:36 src/ov_SC01_077/ov_SC01_077_after.c:func_80145A2C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:36 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80181DAC A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:36 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80182080 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:36 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_80180224 A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:36 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180510 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:36 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801809E4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:37 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:37 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180764 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:37 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017E83C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:37 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801808BC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:38 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182014 A=DIFFERS B: removed 1 needed 2 compiles 4
03:55:38 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F278 A=DIFFERS B: removed 3 needed 5 compiles 9
03:55:38 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_801804F4 A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:38 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80180D54 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:38 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:38 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80182614 A=DIFFERS B: removed 1 needed 2 compiles 4
03:55:38 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:38 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180A14 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:38 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017EC90 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:38 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_80182058 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:39 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180CDC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:39 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8018270C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:39 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801810E4 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:39 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017F37C A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:39 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182B9C A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:39 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180F84 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:39 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_80180960 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:39 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017C360 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:40 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:40 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8018122C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:40 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80182F4C A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:40 src/ov_SC01_077/ov_SC01_077_after.c:func_80148AFC A=DIFFERS B: removed 1 needed 6 compiles 8
03:55:40 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801815D4 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:40 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F438 A=DIFFERS B: removed 0 needed 4 compiles 5
03:55:40 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017F794 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:40 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_80182F3C A=DIFFERS B: removed 0 needed 4 compiles 5
03:55:40 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017D710 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:41 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801814D4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:41 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182ED4 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:41 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80181854 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:41 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8018177C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:41 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_80181A60 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:41 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_801834C0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:41 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017DCC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:42 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80181918 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:42 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:42 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182FA8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:42 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801819D8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:42 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017FD6C A=DIFFERS B: removed 1 needed 3 compiles 5
03:55:42 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017DE10 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:42 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_801843DC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:42 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80183A70 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:43 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80181C38 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:43 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_80180598 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:43 src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:43 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80181D98 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:43 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F600 A=DIFFERS B: removed 0 needed 4 compiles 5
03:55:43 src/ov_SC01_077/ov_SC01_077_after.c:func_80148D44 A=DIFFERS B: removed 2 needed 2 compiles 5
03:55:43 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:43 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017F67C A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:43 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80181DBC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:43 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801835B0 A=DIFFERS B: removed 0 needed 7 compiles 8
03:55:44 src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:44 src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:44 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80181F40 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:44 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_801806B8 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:44 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801820AC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:44 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017FD9C A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:44 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80183DAC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:44 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801820C0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:44 src/ov_SC01_077/ov_SC01_077_after.c:func_80148E54 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:45 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80183D18 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:45 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017E324 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:45 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8018230C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:45 src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:45 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8018178C A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:45 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_80180FE4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:46 src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017E230 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:46 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017FC80 A=DIFFERS B: removed 0 needed 4 compiles 5
03:55:46 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017E8D4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:46 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80183130 A=DIFFERS B: removed 6 needed 2 compiles 9
03:55:46 src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017E614 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:46 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80182334 A=DIFFERS B: removed 1 needed 3 compiles 5
03:55:46 src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:47 src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:47 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017FE3C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:47 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017EA24 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:47 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_801832A8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:47 src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017E834 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:47 src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:47 src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:48 src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:<file-scope> A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:48 src/ov_SC01_077/ov_SC01_077_after.c:func_8014D820 A=DIFFERS B: removed 1 needed 2 compiles 4
03:55:48 src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017CE58 A=DIFFERS B: removed 0 needed 11 compiles 12
03:55:48 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017F2E0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:48 src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017C25C A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:49 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801842CC A=DIFFERS B: removed 1 needed 3 compiles 5
03:55:49 src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017CC70 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:49 src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017E044 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:49 src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017C80C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:49 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017F9BC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:49 src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017D220 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:49 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801846D0 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:49 src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:49 src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:49 src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017C95C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:49 src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017E780 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:49 src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:49 src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017D370 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:49 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80182560 A=DIFFERS B: removed 5 needed 1 compiles 7
03:55:50 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801805D0 A=DIFFERS B: removed 0 needed 4 compiles 5
03:55:50 src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017D218 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:50 src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017EE8C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:50 src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:50 src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:50 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80184398 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:50 src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017DD34 A=DIFFERS B: removed 0 needed 4 compiles 5
03:55:50 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801849A0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:51 src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:51 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80180A88 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:51 src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:51 src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:51 src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c:func_8017E060 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:52 src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:52 src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c:func_8017DE40 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:52 src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:52 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801848A4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:52 src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:52 src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:53 src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80175AB8 A=DIFFERS B: removed 0 needed 5 compiles 6
03:55:53 src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:53 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80184CE8 A=DIFFERS B: removed 1 needed 2 compiles 4
03:55:53 src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:53 src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:53 src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80175DA8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:54 src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:54 src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017D9E4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:54 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80184A68 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:54 src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017EE10 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:54 src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:55 src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017FB10 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:55 src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017C234 A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:55 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181234 A=DIFFERS B: removed 0 needed 4 compiles 5
03:55:55 src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017DB60 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:55 src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:55 src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:55 src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:55 src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:55 src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017DF44 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:55 src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:56 src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:56 src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:56 src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_8017E230 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:56 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80185354 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:56 src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:56 src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:56 src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:57 src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:57 src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:57 src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:57 src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:57 src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:57 src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:57 src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:57 src/ov_SC06_032/ov_SC06_032_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:58 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80185520 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:58 src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:58 src/ov_SC06_032/ov_SC06_032_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:58 src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c:func_8017BEF8 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:58 src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c:func_8017DA30 A=DIFFERS B: removed 2 needed 2 compiles 5
03:55:58 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181408 A=DIFFERS B: removed 3 needed 2 compiles 6
03:55:58 src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c:func_8017DCB4 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:58 src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_801821D4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:59 src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017DF84 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:59 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801856A0 A=DIFFERS B: removed 4 needed 1 compiles 6
03:56:00 src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c:func_8017D2D4 A=DIFFERS B: removed 0 needed 4 compiles 5
03:56:00 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8018179C A=DIFFERS B: removed 1 needed 2 compiles 4
03:56:00 src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c:func_8017BF14 A=DIFFERS B: removed 0 needed 4 compiles 5
03:56:00 src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80177B5C A=DIFFERS B: removed 8 needed 15 compiles 24
03:56:00 src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_801825BC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:00 src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80178840 A=DIFFERS B: removed 1 needed 1 compiles 3
03:56:01 src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80178970 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:01 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80186B70 A=DIFFERS B: removed 1 needed 4 compiles 6
03:56:02 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181AD8 A=DIFFERS B: removed 2 needed 1 compiles 4
03:56:02 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8018594C A=DIFFERS B: removed 1 needed 3 compiles 5
03:56:02 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181D80 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:03 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80187314 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:03 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181FC4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:04 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80187AB8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:05 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80182A2C A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:05 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80187B34 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:06 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80182C70 A=DIFFERS B: removed 1 needed 1 compiles 3
03:56:06 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80185BD4 A=DIFFERS B: removed 3 needed 2 compiles 6
03:56:08 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8018315C A=DIFFERS B: removed 2 needed 1 compiles 4
03:56:09 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80183884 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:09 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801869CC A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:10 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80183FD4 A=DIFFERS B: removed 1 needed 1 compiles 3
03:56:10 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801877D8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:11 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801879C4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:11 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801841A4 A=DIFFERS B: removed 1 needed 1 compiles 3
03:56:13 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801890C4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:13 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80184394 A=DIFFERS B: removed 2 needed 1 compiles 4
03:56:15 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801848A4 A=DIFFERS B: removed 1 needed 1 compiles 3
03:56:16 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801896EC A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:16 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80184EFC A=DIFFERS B: removed 2 needed 1 compiles 4
03:56:17 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801858F4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:18 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80189A84 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:18 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185994 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:20 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185C04 A=DIFFERS B: removed 1 needed 2 compiles 4
03:56:21 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8018A6F4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:21 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185CD8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:22 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185FC8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:22 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8018AF88 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:29 src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:29 src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:29 src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:29 src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:34 src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:34 src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:34 src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:34 src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:35 src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:35 src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:35 src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:35 src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:35 src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:35 src/ov_SC03_105/ov_SC03_105_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:35 src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:35 src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:36 src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC03_105/ov_SC03_105_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:36 src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:36 src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:36 src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:37 src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c:func_8017CD2C A=DIFFERS B: removed 0 needed 4 compiles 5
03:56:37 src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:37 src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:37 src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:37 src/ov_SC05_010/ov_SC05_010_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:37 src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:37 src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:func_8017DD3C A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:37 src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:37 src/ov_SC06_016/ov_SC06_016_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:37 src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:37 src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:38 src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:38 src/ov_SC05_010/ov_SC05_010_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:38 src/ov_SC06_016/ov_SC06_016_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:38 src/ov_SC06_029/ov_SC06_029_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:38 src/ov_SC06_030/ov_SC06_030_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:38 src/ov_SC01_001/ov_SC01_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:38 src/ov_SC07_002/ov_SC07_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:38 src/ov_SC01_000/ov_SC01_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:38 src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:38 src/ov_SC01_004/ov_SC01_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:38 src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:38 src/ov_SC06_029/ov_SC06_029_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:39 src/ov_SC06_030/ov_SC06_030_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:39 src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:39 src/ov_SC01_000/ov_SC01_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:39 src/ov_SC01_001/ov_SC01_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:39 src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:39 src/ov_SC07_002/ov_SC07_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:39 src/ov_SC01_008/ov_SC01_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:39 src/ov_SC01_004/ov_SC01_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:40 src/ov_SC01_009/ov_SC01_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC01_005/ov_SC01_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC01_074/ov_SC01_074_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC01_084/ov_SC01_084_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC01_008/ov_SC01_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:40 src/ov_SC02_021/ov_SC02_021_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC02_035/ov_SC02_035_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC01_009/ov_SC01_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:40 src/ov_SC02_016/ov_SC02_016_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC02_027/ov_SC02_027_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC02_028/ov_SC02_028_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC02_039/ov_SC02_039_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC02_041/ov_SC02_041_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC01_074/ov_SC01_074_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:40 src/ov_SC01_084/ov_SC01_084_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC02_021/ov_SC02_021_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC02_035/ov_SC02_035_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC02_028/ov_SC02_028_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC02_027/ov_SC02_027_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC01_005/ov_SC01_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC02_039/ov_SC02_039_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC02_016/ov_SC02_016_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC02_041/ov_SC02_041_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC03_010/ov_SC03_010_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:41 src/ov_SC03_011/ov_SC03_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_013/ov_SC03_013_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_089/ov_SC03_089_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_029/ov_SC03_029_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_010/ov_SC03_010_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:42 src/ov_SC03_011/ov_SC03_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:42 src/ov_SC03_090/ov_SC03_090_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_094/ov_SC03_094_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_096/ov_SC03_096_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_095/ov_SC03_095_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_091/ov_SC03_091_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_013/ov_SC03_013_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:42 src/ov_SC03_097/ov_SC03_097_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:43 src/ov_SC03_089/ov_SC03_089_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:43 src/ov_SC03_093/ov_SC03_093_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:43 src/ov_SC03_090/ov_SC03_090_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:43 src/ov_SC03_095/ov_SC03_095_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:43 src/ov_SC03_029/ov_SC03_029_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:43 src/ov_SC03_099/ov_SC03_099_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:43 src/ov_SC03_094/ov_SC03_094_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:43 src/ov_SC03_096/ov_SC03_096_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:43 src/ov_SC03_091/ov_SC03_091_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:43 src/ov_SC03_098/ov_SC03_098_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:44 src/ov_SC03_097/ov_SC03_097_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:44 src/ov_SC03_093/ov_SC03_093_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:44 src/ov_SC03_099/ov_SC03_099_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:44 src/ov_SC03_102/ov_SC03_102_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:44 src/ov_SC03_100/ov_SC03_100_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:44 src/ov_SC03_101/ov_SC03_101_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:44 src/ov_SC03_108/ov_SC03_108_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:44 src/ov_SC03_104/ov_SC03_104_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:44 src/ov_SC03_103/ov_SC03_103_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:44 src/ov_SC03_112/ov_SC03_112_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:45 src/ov_SC03_102/ov_SC03_102_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:45 src/ov_SC03_098/ov_SC03_098_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:45 src/ov_SC03_101/ov_SC03_101_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:45 src/ov_SC03_110/ov_SC03_110_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:45 src/ov_SC03_100/ov_SC03_100_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:45 src/ov_SC03_113/ov_SC03_113_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:45 src/ov_SC03_108/ov_SC03_108_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:45 src/ov_SC03_103/ov_SC03_103_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:45 src/ov_SC03_104/ov_SC03_104_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:45 src/ov_SC03_115/ov_SC03_115_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:45 src/ov_SC03_114/ov_SC03_114_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:45 src/ov_SC03_112/ov_SC03_112_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:46 src/ov_SC03_113/ov_SC03_113_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:46 src/ov_SC03_121/ov_SC03_121_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC03_110/ov_SC03_110_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:46 src/ov_SC04_000/ov_SC04_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC03_115/ov_SC03_115_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:46 src/ov_SC03_117/ov_SC03_117_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC03_114/ov_SC03_114_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:46 src/ov_SC04_002/ov_SC04_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC04_006/ov_SC04_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC04_003/ov_SC04_003_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC04_005/ov_SC04_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC04_007/ov_SC04_007_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC03_121/ov_SC03_121_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:46 src/ov_SC04_000/ov_SC04_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:46 src/ov_SC03_117/ov_SC03_117_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:47 src/ov_SC04_009/ov_SC04_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:47 src/ov_SC04_002/ov_SC04_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:47 src/ov_SC04_005/ov_SC04_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:47 src/ov_SC04_010/ov_SC04_010_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:47 src/ov_SC04_016/ov_SC04_016_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:47 src/ov_SC04_006/ov_SC04_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:47 src/ov_SC04_007/ov_SC04_007_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:47 src/ov_SC05_000/ov_SC05_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:47 src/ov_SC04_003/ov_SC04_003_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:47 src/ov_SC05_002/ov_SC05_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:47 src/ov_SC04_010/ov_SC04_010_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:47 src/ov_SC05_001/ov_SC05_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:47 src/ov_SC04_009/ov_SC04_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:48 src/ov_SC04_016/ov_SC04_016_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:48 src/ov_SC05_003/ov_SC05_003_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:48 src/ov_SC05_002/ov_SC05_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:48 src/ov_SC05_004/ov_SC05_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:48 src/ov_SC05_000/ov_SC05_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:48 src/ov_SC05_006/ov_SC05_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:48 src/ov_SC05_007/ov_SC05_007_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:48 src/ov_SC05_001/ov_SC05_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:48 src/ov_SC05_009/ov_SC05_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:48 src/ov_SC05_003/ov_SC05_003_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:48 src/ov_SC05_005/ov_SC05_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:48 src/ov_SC05_011/ov_SC05_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:48 src/ov_SC06_006/ov_SC06_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:49 src/ov_SC05_004/ov_SC05_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:49 src/ov_SC05_007/ov_SC05_007_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:49 src/ov_SC05_006/ov_SC05_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:49 src/ov_SC06_008/ov_SC06_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:49 src/ov_SC05_009/ov_SC05_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:49 src/ov_SC06_013/ov_SC06_013_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:49 src/ov_SC05_011/ov_SC05_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:49 src/ov_SC06_011/ov_SC06_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:49 src/ov_SC05_005/ov_SC05_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:49 src/ov_SC06_006/ov_SC06_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:49 src/ov_SC06_015/ov_SC06_015_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:49 src/ov_SC06_014/ov_SC06_014_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:49 src/ov_SC06_008/ov_SC06_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:50 src/ov_SC06_013/ov_SC06_013_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:50 src/ov_SC06_018/ov_SC06_018_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:50 src/ov_SC06_011/ov_SC06_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:50 src/ov_SC06_022/ov_SC06_022_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:50 src/ov_SC06_020/ov_SC06_020_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:50 src/ov_SC06_024/ov_SC06_024_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:50 src/ov_SC06_025/ov_SC06_025_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:50 src/ov_SC06_015/ov_SC06_015_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:50 src/ov_SC06_014/ov_SC06_014_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:50 src/ov_SC06_027/ov_SC06_027_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:50 src/ov_SC06_022/ov_SC06_022_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:50 src/ov_SC07_000/ov_SC07_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:50 src/ov_SC06_018/ov_SC06_018_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:51 src/ov_SC06_033/ov_SC06_033_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:51 src/ov_SC07_001/ov_SC07_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:51 src/ov_SC06_024/ov_SC06_024_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:51 src/ov_SC06_025/ov_SC06_025_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:51 src/ov_SC06_020/ov_SC06_020_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:51 src/ov_SC06_027/ov_SC06_027_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:51 src/ov_SC07_008/ov_SC07_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:51 src/ov_SC01_000/ov_SC01_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:51 src/ov_SC07_000/ov_SC07_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:51 src/ov_SC06_033/ov_SC06_033_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:51 src/ov_SC07_009/ov_SC07_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:51 src/ov_SC01_001/ov_SC01_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:51 src/ov_SC01_004/ov_SC01_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC07_001/ov_SC07_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:52 src/ov_SC01_008/ov_SC01_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC01_009/ov_SC01_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC01_074/ov_SC01_074.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC07_008/ov_SC07_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:52 src/ov_SC01_077/ov_SC01_077_a.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC01_005/ov_SC01_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC01_080/ov_SC01_080.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC01_084/ov_SC01_084.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC07_009/ov_SC07_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:52 src/ov_SC02_005/ov_SC02_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC02_004/ov_SC02_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_015/ov_SC02_015.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_011/ov_SC02_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_021/ov_SC02_021.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_016/ov_SC02_016.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_000/ov_SC02_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_026/ov_SC02_026.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_017/ov_SC02_017.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_027/ov_SC02_027.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_031/ov_SC02_031.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_028/ov_SC02_028.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_035/ov_SC02_035.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_039/ov_SC02_039.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_041/ov_SC02_041.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC03_002/ov_SC03_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC03_001/ov_SC03_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC03_003/ov_SC03_003.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_006/ov_SC03_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_007/ov_SC03_007.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_010/ov_SC03_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_011/ov_SC03_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_012/ov_SC03_012.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_023/ov_SC03_023.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_013/ov_SC03_013.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_024/ov_SC03_024.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_028/ov_SC03_028.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_029/ov_SC03_029.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_030/ov_SC03_030.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_089/ov_SC03_089.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_031/ov_SC03_031.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_014/ov_SC03_014.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_090/ov_SC03_090.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_091/ov_SC03_091.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_094/ov_SC03_094.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_092/ov_SC03_092.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_093/ov_SC03_093.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_096/ov_SC03_096.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_097/ov_SC03_097.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_095/ov_SC03_095.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_098/ov_SC03_098.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_099/ov_SC03_099.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_100/ov_SC03_100.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_101/ov_SC03_101.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_102/ov_SC03_102.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_103/ov_SC03_103.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_104/ov_SC03_104.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_105/ov_SC03_105.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_108/ov_SC03_108.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_109/ov_SC03_109.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_110/ov_SC03_110.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_112/ov_SC03_112.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_111/ov_SC03_111.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_113/ov_SC03_113.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_114/ov_SC03_114.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_116/ov_SC03_116.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_115/ov_SC03_115.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_117/ov_SC03_117.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_121/ov_SC03_121.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_124/ov_SC03_124.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_125/ov_SC03_125.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC04_000/ov_SC04_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC04_002/ov_SC04_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC04_005/ov_SC04_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC04_003/ov_SC04_003.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC04_004/ov_SC04_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_118/ov_SC03_118.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_006/ov_SC04_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_008/ov_SC04_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_007/ov_SC04_007.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_009/ov_SC04_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_012/ov_SC04_012.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_010/ov_SC04_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_016/ov_SC04_016.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_015/ov_SC04_015.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC05_000/ov_SC05_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_020/ov_SC04_020.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC05_001/ov_SC05_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_018/ov_SC04_018.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC05_002/ov_SC05_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC05_003/ov_SC05_003.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC05_004/ov_SC05_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC05_005/ov_SC05_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_006/ov_SC05_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_009/ov_SC05_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_007/ov_SC05_007.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_008/ov_SC05_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_010/ov_SC05_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_011/ov_SC05_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_017/ov_SC05_017.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC06_000/ov_SC06_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_018/ov_SC05_018.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC06_006/ov_SC06_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC06_008/ov_SC06_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC06_011/ov_SC06_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC06_010/ov_SC06_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC06_014/ov_SC06_014.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC06_013/ov_SC06_013.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_018/ov_SC06_018.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_015/ov_SC06_015.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_016/ov_SC06_016.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_020/ov_SC06_020.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_022/ov_SC06_022.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_024/ov_SC06_024.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_025/ov_SC06_025.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_027/ov_SC06_027.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_029/ov_SC06_029.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_030/ov_SC06_030.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_032/ov_SC06_032.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_033/ov_SC06_033.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC07_000/ov_SC07_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC07_001/ov_SC07_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC07_008/ov_SC07_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC07_002/ov_SC07_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:57:00 src/ov_SC07_009/ov_SC07_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:57:00 src/ov_SC04_008/ov_SC04_008_jr_801734BC.c:func_80178970 A=DIFFERS B: removed 0 needed 1 compiles 2
03:57:00 src/ov_SC05_009/ov_SC05_009_jr_801734BC.c:func_80178970 A=DIFFERS B: removed 0 needed 1 compiles 2
03:57:01 delever: batch tus7 — 300 files (TUs; 983 drawable) · 1407 bodies: 432 lever-free, 973 residue, 2 refused · sites removed 1855 / needed 2032 / refused 6 / deferred 0 · replays 589 (0 disagreed) · compiles 3211 in 101 s wall · final 300/300 identical · written 300 files
File diff suppressed because it is too large Load Diff
+5
View File
@@ -0,0 +1,5 @@
delever_oracle --calibrate main ov_SC03_014 ov_SC03_015 ov_SC04_011: 177/177 objects byte-identical untouched; twin checks 32 (0 mismatch); positive control DIFFERS on build/src/800.o; 3.3 s — OK
main 85/85 identical, mean 0.113 s per object
ov_SC03_014 32/32 identical, mean 0.196 s per object
ov_SC03_015 32/32 identical, mean 0.191 s per object
ov_SC04_011 28/28 identical, mean 0.202 s per object
+187 -187
View File
@@ -1,7 +1,7 @@
{
"head": "ca761c4f6",
"head": "3e60fdf41",
"stamp": "b44c5a8a3423",
"generated": "2026-09-09 03:51",
"generated": "2026-09-09 03:55",
"aliases": [
"main",
"ov_SC03_014",
@@ -21,207 +21,207 @@
"main": {
"objects": 85,
"identical": 85,
"seconds": 9.647999999999998,
"mean_s": 0.114
"seconds": 9.612,
"mean_s": 0.113
},
"ov_SC03_014": {
"objects": 32,
"identical": 32,
"seconds": 6.121000000000001,
"mean_s": 0.191
"seconds": 6.269,
"mean_s": 0.196
},
"ov_SC03_015": {
"objects": 32,
"identical": 32,
"seconds": 6.161000000000002,
"mean_s": 0.193
"seconds": 6.098000000000001,
"mean_s": 0.191
},
"ov_SC04_011": {
"objects": 28,
"identical": 28,
"seconds": 5.426000000000001,
"mean_s": 0.194
"seconds": 5.646,
"mean_s": 0.202
}
},
"per_object_seconds": {
"build/src/800.o": 1.15,
"build/src/800_b.o": 0.101,
"build/src/800_b_2.o": 0.37,
"build/src/800_b_o0a.o": 0.197,
"build/src/800_c.o": 0.277,
"build/src/800b2.o": 0.171,
"build/src/apicard1.o": 0.145,
"build/src/apicard2.o": 0.087,
"build/src/apicard3.o": 0.147,
"build/src/apicard4.o": 0.079,
"build/src/apicard5.o": 0.131,
"build/src/apicard6.o": 0.117,
"build/src/apicard7.o": 0.095,
"build/src/boot.o": 0.12,
"build/src/gap.o": 0.125,
"build/src/libapi1.o": 0.083,
"build/src/libapi2.o": 0.066,
"build/src/libc2_1.o": 0.077,
"build/src/libc2_2.o": 0.101,
"build/src/libcd1.o": 0.093,
"build/src/libcd2.o": 0.088,
"build/src/libetc.o": 0.073,
"build/src/libgpu.o": 0.075,
"build/src/libgpu2.o": 0.082,
"build/src/libgs1.o": 0.078,
"build/src/libgs2.o": 0.082,
"build/src/libgs3.o": 0.067,
"build/src/libgs4.o": 0.07,
"build/src/libgs5.o": 0.117,
"build/src/libgs6.o": 0.081,
"build/src/libgs7.o": 0.064,
"build/src/libgs8.o": 0.149,
"build/src/libgte1.o": 0.091,
"build/src/libgte10.o": 0.146,
"build/src/libgte11.o": 0.077,
"build/src/libgte12.o": 0.067,
"build/src/800.o": 0.836,
"build/src/800_b.o": 0.151,
"build/src/800_b_2.o": 0.345,
"build/src/800_b_o0a.o": 0.093,
"build/src/800_c.o": 0.418,
"build/src/800b2.o": 0.115,
"build/src/apicard1.o": 0.08,
"build/src/apicard2.o": 0.083,
"build/src/apicard3.o": 0.114,
"build/src/apicard4.o": 0.106,
"build/src/apicard5.o": 0.109,
"build/src/apicard6.o": 0.122,
"build/src/apicard7.o": 0.12,
"build/src/boot.o": 0.131,
"build/src/gap.o": 0.158,
"build/src/libapi1.o": 0.127,
"build/src/libapi2.o": 0.088,
"build/src/libc2_1.o": 0.073,
"build/src/libc2_2.o": 0.064,
"build/src/libcd1.o": 0.186,
"build/src/libcd2.o": 0.099,
"build/src/libetc.o": 0.079,
"build/src/libgpu.o": 0.125,
"build/src/libgpu2.o": 0.092,
"build/src/libgs1.o": 0.072,
"build/src/libgs2.o": 0.081,
"build/src/libgs3.o": 0.069,
"build/src/libgs4.o": 0.09,
"build/src/libgs5.o": 0.166,
"build/src/libgs6.o": 0.099,
"build/src/libgs7.o": 0.098,
"build/src/libgs8.o": 0.074,
"build/src/libgte1.o": 0.077,
"build/src/libgte10.o": 0.066,
"build/src/libgte11.o": 0.067,
"build/src/libgte12.o": 0.154,
"build/src/libgte13.o": 0.075,
"build/src/libgte14.o": 0.13,
"build/src/libgte15.o": 0.096,
"build/src/libgte16.o": 0.063,
"build/src/libgte17.o": 0.076,
"build/src/libgte18.o": 0.111,
"build/src/libgte19.o": 0.106,
"build/src/libgte2.o": 0.068,
"build/src/libgte20.o": 0.07,
"build/src/libgte21.o": 0.157,
"build/src/libgte22.o": 0.067,
"build/src/libgte23.o": 0.073,
"build/src/libgte24.o": 0.102,
"build/src/libgte25.o": 0.089,
"build/src/libgte26.o": 0.079,
"build/src/libgte27.o": 0.072,
"build/src/libgte28.o": 0.09,
"build/src/libgte29.o": 0.148,
"build/src/libgte3.o": 0.08,
"build/src/libgte30.o": 0.169,
"build/src/libgte4.o": 0.096,
"build/src/libgte5.o": 0.069,
"build/src/libgte6.o": 0.099,
"build/src/libgte7.o": 0.067,
"build/src/libgte8.o": 0.134,
"build/src/libgte9.o": 0.072,
"build/src/libmcrd1.o": 0.084,
"build/src/libmcrd2.o": 0.067,
"build/src/libpad1.o": 0.066,
"build/src/libpad2.o": 0.092,
"build/src/sgap.o": 0.084,
"build/src/sgap_2.o": 0.069,
"build/src/sgap_3.o": 0.121,
"build/src/sgap_4.o": 0.084,
"build/src/sgap_5.o": 0.085,
"build/src/sgap_6.o": 0.083,
"build/src/sgap_8.o": 0.154,
"build/src/snd1.o": 0.088,
"build/src/snd10.o": 0.07,
"build/src/snd11.o": 0.078,
"build/src/snd12.o": 0.072,
"build/src/snd2.o": 0.077,
"build/src/snd3.o": 0.067,
"build/src/snd4.o": 0.071,
"build/src/snd5.o": 0.081,
"build/src/snd6.o": 0.123,
"build/src/snd7.o": 0.14,
"build/src/snd8.o": 0.12,
"build/src/snd9.o": 0.075,
"build/src/ov_SC03_014/ov_SC03_014.o": 0.18,
"build/src/ov_SC03_014/ov_SC03_014_after.o": 0.572,
"build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.491,
"build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.164,
"build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.107,
"build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.171,
"build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.19,
"build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.154,
"build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.163,
"build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.086,
"build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.248,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.132,
"build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.238,
"build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.153,
"build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.089,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.092,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.119,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.531,
"build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.319,
"build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.12,
"build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.222,
"build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.113,
"build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.13,
"build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.086,
"build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.2,
"build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.227,
"build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.091,
"build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.33,
"build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.116,
"build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.068,
"build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.092,
"build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.127,
"build/src/ov_SC03_015/ov_SC03_015.o": 0.145,
"build/src/ov_SC03_015/ov_SC03_015_after.o": 0.731,
"build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.434,
"build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.063,
"build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.069,
"build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.134,
"build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.208,
"build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.13,
"build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.107,
"build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.102,
"build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.195,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.074,
"build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.225,
"build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.151,
"build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.137,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.13,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.148,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.67,
"build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.314,
"build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.166,
"build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.222,
"build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.11,
"build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.109,
"build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.097,
"build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.232,
"build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.261,
"build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.106,
"build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.348,
"build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.07,
"build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.106,
"build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.086,
"build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.081,
"build/src/ov_SC04_011/ov_SC04_011.o": 0.152,
"build/src/ov_SC04_011/ov_SC04_011_after.o": 0.537,
"build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.451,
"build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.111,
"build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.068,
"build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.263,
"build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.17,
"build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.133,
"build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.102,
"build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.077,
"build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.197,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.099,
"build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.212,
"build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.199,
"build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.11,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.083,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.139,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.477,
"build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.291,
"build/src/ov_SC04_011/ov_SC04_011_jr_80171B4C.o": 0.144,
"build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.208,
"build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.078,
"build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.158,
"build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.087,
"build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.133,
"build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.593,
"build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.074,
"build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.08
"build/src/libgte14.o": 0.065,
"build/src/libgte15.o": 0.077,
"build/src/libgte16.o": 0.076,
"build/src/libgte17.o": 0.071,
"build/src/libgte18.o": 0.067,
"build/src/libgte19.o": 0.09,
"build/src/libgte2.o": 0.069,
"build/src/libgte20.o": 0.098,
"build/src/libgte21.o": 0.144,
"build/src/libgte22.o": 0.077,
"build/src/libgte23.o": 0.082,
"build/src/libgte24.o": 0.146,
"build/src/libgte25.o": 0.123,
"build/src/libgte26.o": 0.074,
"build/src/libgte27.o": 0.1,
"build/src/libgte28.o": 0.105,
"build/src/libgte29.o": 0.07,
"build/src/libgte3.o": 0.073,
"build/src/libgte30.o": 0.068,
"build/src/libgte4.o": 0.145,
"build/src/libgte5.o": 0.158,
"build/src/libgte6.o": 0.076,
"build/src/libgte7.o": 0.069,
"build/src/libgte8.o": 0.101,
"build/src/libgte9.o": 0.132,
"build/src/libmcrd1.o": 0.092,
"build/src/libmcrd2.o": 0.086,
"build/src/libpad1.o": 0.09,
"build/src/libpad2.o": 0.123,
"build/src/sgap.o": 0.102,
"build/src/sgap_2.o": 0.153,
"build/src/sgap_3.o": 0.12,
"build/src/sgap_4.o": 0.09,
"build/src/sgap_5.o": 0.101,
"build/src/sgap_6.o": 0.08,
"build/src/sgap_8.o": 0.119,
"build/src/snd1.o": 0.091,
"build/src/snd10.o": 0.079,
"build/src/snd11.o": 0.073,
"build/src/snd12.o": 0.118,
"build/src/snd2.o": 0.069,
"build/src/snd3.o": 0.081,
"build/src/snd4.o": 0.091,
"build/src/snd5.o": 0.092,
"build/src/snd6.o": 0.071,
"build/src/snd7.o": 0.097,
"build/src/snd8.o": 0.067,
"build/src/snd9.o": 0.069,
"build/src/ov_SC03_014/ov_SC03_014.o": 0.206,
"build/src/ov_SC03_014/ov_SC03_014_after.o": 0.574,
"build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.482,
"build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.064,
"build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.086,
"build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.181,
"build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.283,
"build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.139,
"build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.103,
"build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.112,
"build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.258,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.097,
"build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.328,
"build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.199,
"build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.081,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.074,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.105,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.534,
"build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.312,
"build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.113,
"build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.234,
"build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.153,
"build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.145,
"build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.087,
"build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.198,
"build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.272,
"build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.072,
"build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.373,
"build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.068,
"build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.106,
"build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.091,
"build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.139,
"build/src/ov_SC03_015/ov_SC03_015.o": 0.163,
"build/src/ov_SC03_015/ov_SC03_015_after.o": 0.618,
"build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.455,
"build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.071,
"build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.094,
"build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.228,
"build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.182,
"build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.125,
"build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.119,
"build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.073,
"build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.217,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.1,
"build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.265,
"build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.099,
"build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.114,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.136,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.124,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.529,
"build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.35,
"build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.117,
"build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.259,
"build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.077,
"build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.169,
"build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.147,
"build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.222,
"build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.253,
"build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.062,
"build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.409,
"build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.068,
"build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.064,
"build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.061,
"build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.128,
"build/src/ov_SC04_011/ov_SC04_011.o": 0.187,
"build/src/ov_SC04_011/ov_SC04_011_after.o": 0.536,
"build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.494,
"build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.097,
"build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.091,
"build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.156,
"build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.193,
"build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.121,
"build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.106,
"build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.095,
"build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.245,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.151,
"build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.203,
"build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.178,
"build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.112,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.09,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.108,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.453,
"build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.267,
"build/src/ov_SC04_011/ov_SC04_011_jr_80171B4C.o": 0.15,
"build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.215,
"build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.089,
"build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.117,
"build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.104,
"build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.121,
"build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.829,
"build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.066,
"build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.072
},
"ok": true,
"seconds": 3.2
"seconds": 3.3
}
+6
View File
@@ -5,3 +5,9 @@ cycle: batch tus4 committed 5e10b19e8 — delever: batch tus4 — 300 files (TUs
log: tus5 THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 39,918 sites in 13,820 bodies (2,224 distinct) · marked !FAKE 25,081 · UNMARKED 14,837
cycle: batch tus5 committed ca761c4f6 — delever: batch tus5 — 300 files (TUs; 1583 drawable) · 1225 bodies: 63 lever-free, 1162 residue, 0 refused · sites removed 1821 / needed 5783 / refused 0 / deferred 0 · replays 624 (0 disagreed) · compiles 3110 in 73 s wall · final 300/300 identical · written 300 files | check-all: 218 passed, 0 failed of 218
log: tus6 THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 38,580 sites in 13,622 bodies (2,225 distinct) · marked !FAKE 27,018 · UNMARKED 11,562
cycle: batch tus6 committed 3e60fdf41 — delever: batch tus6 — 300 files (TUs; 1283 drawable) · 1409 bodies: 301 lever-free, 1108 residue, 0 refused · sites removed 1667 / needed 2377 / refused 0 / deferred 0 · replays 897 (0 disagreed) · compiles 2505 in 63 s wall · final 300/300 identical · written 300 files | check-all: 218 passed, 0 failed of 218
cycle: the census FAILED after batch tus7
engine_prelude.h asm sites (a macro definition only) got 0 expected 0 OK
elapsed 35.9 s
lever_census: a known-true control MISMATCHED (R39) — the instrument is wrong, not the tree
cycle exit=1
File diff suppressed because it is too large Load Diff
+753
View File
@@ -0,0 +1,753 @@
delever --plan: 300 of 983 drawable files · 1407 bodies (1197 in multi-copy classes) · 3893 removable sites · 0 deferred asm-bodies
03:55:20 apply tus7: 300 files, control src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c IDENTICAL (0.25 s), calibration 3e60fdf41, census 22522952c40f4327
03:55:20 apply tus7: phase 1 (exemplar files) 36, phase 2 (copies replay) 264
03:55:21 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:21 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:21 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:21 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:22 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:22 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:23 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:23 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:23 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:23 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:23 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:23 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:23 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:23 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017E8A4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:23 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:24 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017D214 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:24 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:24 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:24 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017BF50 A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:24 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017ECA8 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:24 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017BEBC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:24 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017EB2C A=DIFFERS B: removed 2 needed 1 compiles 4
03:55:24 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017D72C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:25 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017BF70 A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:25 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017EDD4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:25 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017D7B4 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:25 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:25 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017E5C4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:25 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017C6CC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:25 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017DCF8 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:25 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017BEBC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:26 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:26 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017BF50 A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:26 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017EF50 A=DIFFERS B: removed 1 needed 3 compiles 5
03:55:26 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017EDE8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:26 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017E1D4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:26 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017C730 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:26 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017F07C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:26 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:26 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017CAD4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:27 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017F63C A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:27 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017E724 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:27 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017DBAC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:27 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017E73C A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:27 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8018009C A=COMPILE-ERROR B: removed 0 needed 1 compiles 2
03:55:27 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017F53C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:27 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:28 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017F5D8 A=DIFFERS B: removed 5 needed 3 compiles 9
03:55:28 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017ECEC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:28 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017DA20 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:28 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017FBFC A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:28 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017E2CC A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:28 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_80180D48 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:28 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017F114 A=DIFFERS B: removed 4 needed 4 compiles 9
03:55:28 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017DC50 A=DIFFERS B: removed 2 needed 3 compiles 6
03:55:28 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017E010 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:28 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017EE3C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:28 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017E2F8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017E830 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017E464 A=DIFFERS B: removed 5 needed 6 compiles 12
03:55:29 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017DCE4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_80180E40 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:29 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017F5B4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017EB78 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017DBE4 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:29 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017FCFC A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:29 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017F5BC A=DIFFERS B: removed 2 needed 1 compiles 4
03:55:29 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017E5C0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80180C74 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017E35C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:29 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017E6A4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:30 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8018107C A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:30 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_801818A4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:30 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017EDB8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:30 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80180F74 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:30 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017F554 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:30 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017FD14 A=DIFFERS B: removed 2 needed 1 compiles 4
03:55:31 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8018130C A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:31 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017E764 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:31 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017E710 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:31 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017FFB4 A=DIFFERS B: removed 1 needed 2 compiles 4
03:55:31 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80181AB4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:31 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017F724 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:31 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017FB04 A=DIFFERS B: removed 6 needed 4 compiles 11
03:55:31 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80181EF0 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:31 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017F1F0 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:31 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8018047C A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:32 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017ED28 A=DIFFERS B: removed 3 needed 4 compiles 8
03:55:32 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017F8F4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:32 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80181744 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:32 src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_801816C8 A=DIFFERS B: removed 1 needed 2 compiles 4
03:55:32 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017F2D0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:32 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_80180590 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:32 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F024 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:32 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8018045C A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:32 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017F368 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:32 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017FAC4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:33 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80182AB4 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:33 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017FC94 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:33 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F10C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:33 src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:<file-scope> A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:33 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801823BC A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:33 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80180598 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:33 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017EE80 A=DIFFERS B: removed 4 needed 1 compiles 6
03:55:34 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017FE64 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:34 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:34 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_801831B4 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:34 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017FA18 A=DIFFERS B: removed 1 needed 2 compiles 4
03:55:34 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017F510 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:34 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017F0EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:34 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8018000C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:35 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80183BB0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:35 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_80180EDC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:35 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80181D1C A=DIFFERS B: removed 0 needed 5 compiles 6
03:55:35 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80182464 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:35 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180164 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:35 src/ov_SC01_077/ov_SC01_077_after.c:func_80145934 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:35 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_80180054 A=DIFFERS B: removed 2 needed 9 compiles 12
03:55:35 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:35 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801803B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:35 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80184B94 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:36 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80180728 A=DIFFERS B: removed 0 needed 5 compiles 6
03:55:36 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80182560 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:36 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_801802BC A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:36 src/ov_SC01_077/ov_SC01_077_after.c:func_80145A2C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:36 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80181DAC A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:36 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80182080 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:36 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_80180224 A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:36 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180510 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:36 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801809E4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:37 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:37 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180764 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:37 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017E83C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:37 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801808BC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:38 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182014 A=DIFFERS B: removed 1 needed 2 compiles 4
03:55:38 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F278 A=DIFFERS B: removed 3 needed 5 compiles 9
03:55:38 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_801804F4 A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:38 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80180D54 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:38 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:38 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80182614 A=DIFFERS B: removed 1 needed 2 compiles 4
03:55:38 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:38 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180A14 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:38 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017EC90 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:38 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_80182058 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:39 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180CDC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:39 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8018270C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:39 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801810E4 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:39 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017F37C A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:39 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182B9C A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:39 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180F84 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:39 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_80180960 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:39 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017C360 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:40 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:40 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8018122C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:40 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80182F4C A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:40 src/ov_SC01_077/ov_SC01_077_after.c:func_80148AFC A=DIFFERS B: removed 1 needed 6 compiles 8
03:55:40 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801815D4 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:40 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F438 A=DIFFERS B: removed 0 needed 4 compiles 5
03:55:40 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017F794 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:40 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_80182F3C A=DIFFERS B: removed 0 needed 4 compiles 5
03:55:40 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017D710 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:41 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801814D4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:41 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182ED4 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:41 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80181854 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:41 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8018177C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:41 src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_80181A60 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:41 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_801834C0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:41 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017DCC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:42 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80181918 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:42 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:42 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182FA8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:42 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801819D8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:42 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017FD6C A=DIFFERS B: removed 1 needed 3 compiles 5
03:55:42 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017DE10 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:42 src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_801843DC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:42 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80183A70 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:43 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80181C38 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:43 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_80180598 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:43 src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:43 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80181D98 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:43 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F600 A=DIFFERS B: removed 0 needed 4 compiles 5
03:55:43 src/ov_SC01_077/ov_SC01_077_after.c:func_80148D44 A=DIFFERS B: removed 2 needed 2 compiles 5
03:55:43 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:43 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017F67C A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:43 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80181DBC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:43 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801835B0 A=DIFFERS B: removed 0 needed 7 compiles 8
03:55:44 src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:44 src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:44 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80181F40 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:44 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_801806B8 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:44 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801820AC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:44 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017FD9C A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:44 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80183DAC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:44 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801820C0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:44 src/ov_SC01_077/ov_SC01_077_after.c:func_80148E54 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:45 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80183D18 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:45 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017E324 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:45 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8018230C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:45 src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:45 src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8018178C A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:45 src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_80180FE4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:46 src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017E230 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:46 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017FC80 A=DIFFERS B: removed 0 needed 4 compiles 5
03:55:46 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017E8D4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:46 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80183130 A=DIFFERS B: removed 6 needed 2 compiles 9
03:55:46 src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017E614 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:46 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80182334 A=DIFFERS B: removed 1 needed 3 compiles 5
03:55:46 src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:47 src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:47 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017FE3C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:47 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017EA24 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:47 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_801832A8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:47 src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017E834 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:47 src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:47 src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:48 src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:<file-scope> A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:48 src/ov_SC01_077/ov_SC01_077_after.c:func_8014D820 A=DIFFERS B: removed 1 needed 2 compiles 4
03:55:48 src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017CE58 A=DIFFERS B: removed 0 needed 11 compiles 12
03:55:48 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017F2E0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:48 src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017C25C A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:49 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801842CC A=DIFFERS B: removed 1 needed 3 compiles 5
03:55:49 src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017CC70 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:49 src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017E044 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:49 src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017C80C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:49 src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017F9BC A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:49 src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017D220 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:49 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801846D0 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:49 src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:49 src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:49 src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017C95C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:49 src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017E780 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:49 src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:49 src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017D370 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:49 src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80182560 A=DIFFERS B: removed 5 needed 1 compiles 7
03:55:50 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801805D0 A=DIFFERS B: removed 0 needed 4 compiles 5
03:55:50 src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017D218 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:50 src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017EE8C A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:50 src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:50 src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:50 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80184398 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:50 src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017DD34 A=DIFFERS B: removed 0 needed 4 compiles 5
03:55:50 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801849A0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:51 src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:51 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80180A88 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:51 src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:51 src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:51 src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c:func_8017E060 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:52 src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:52 src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c:func_8017DE40 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:52 src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:52 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801848A4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:52 src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:52 src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:53 src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80175AB8 A=DIFFERS B: removed 0 needed 5 compiles 6
03:55:53 src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:53 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80184CE8 A=DIFFERS B: removed 1 needed 2 compiles 4
03:55:53 src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:53 src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:53 src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80175DA8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:54 src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:54 src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017D9E4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:54 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80184A68 A=DIFFERS B: removed 1 needed 1 compiles 3
03:55:54 src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017EE10 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:54 src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:55 src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017FB10 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:55 src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017C234 A=DIFFERS B: removed 3 needed 1 compiles 5
03:55:55 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181234 A=DIFFERS B: removed 0 needed 4 compiles 5
03:55:55 src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017DB60 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:55 src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:55 src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:55 src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:55 src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:55 src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017DF44 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:55 src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:56 src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:56 src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:56 src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_8017E230 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:56 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80185354 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:56 src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:56 src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:56 src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:57 src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:57 src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:57 src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:57 src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:57 src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:57 src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:57 src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:57 src/ov_SC06_032/ov_SC06_032_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:58 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80185520 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:58 src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:58 src/ov_SC06_032/ov_SC06_032_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:55:58 src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c:func_8017BEF8 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:58 src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c:func_8017DA30 A=DIFFERS B: removed 2 needed 2 compiles 5
03:55:58 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181408 A=DIFFERS B: removed 3 needed 2 compiles 6
03:55:58 src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c:func_8017DCB4 A=DIFFERS B: removed 0 needed 2 compiles 3
03:55:58 src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_801821D4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:59 src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017DF84 A=DIFFERS B: removed 0 needed 1 compiles 2
03:55:59 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801856A0 A=DIFFERS B: removed 4 needed 1 compiles 6
03:56:00 src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c:func_8017D2D4 A=DIFFERS B: removed 0 needed 4 compiles 5
03:56:00 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8018179C A=DIFFERS B: removed 1 needed 2 compiles 4
03:56:00 src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c:func_8017BF14 A=DIFFERS B: removed 0 needed 4 compiles 5
03:56:00 src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80177B5C A=DIFFERS B: removed 8 needed 15 compiles 24
03:56:00 src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_801825BC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:00 src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80178840 A=DIFFERS B: removed 1 needed 1 compiles 3
03:56:01 src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80178970 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:01 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80186B70 A=DIFFERS B: removed 1 needed 4 compiles 6
03:56:02 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181AD8 A=DIFFERS B: removed 2 needed 1 compiles 4
03:56:02 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8018594C A=DIFFERS B: removed 1 needed 3 compiles 5
03:56:02 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181D80 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:03 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80187314 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:03 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181FC4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:04 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80187AB8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:05 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80182A2C A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:05 src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80187B34 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:06 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80182C70 A=DIFFERS B: removed 1 needed 1 compiles 3
03:56:06 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80185BD4 A=DIFFERS B: removed 3 needed 2 compiles 6
03:56:08 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8018315C A=DIFFERS B: removed 2 needed 1 compiles 4
03:56:09 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80183884 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:09 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801869CC A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:10 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80183FD4 A=DIFFERS B: removed 1 needed 1 compiles 3
03:56:10 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801877D8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:11 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801879C4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:11 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801841A4 A=DIFFERS B: removed 1 needed 1 compiles 3
03:56:13 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801890C4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:13 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80184394 A=DIFFERS B: removed 2 needed 1 compiles 4
03:56:15 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801848A4 A=DIFFERS B: removed 1 needed 1 compiles 3
03:56:16 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801896EC A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:16 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80184EFC A=DIFFERS B: removed 2 needed 1 compiles 4
03:56:17 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801858F4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:18 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80189A84 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:18 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185994 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:20 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185C04 A=DIFFERS B: removed 1 needed 2 compiles 4
03:56:21 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8018A6F4 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:21 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185CD8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:22 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185FC8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:22 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8018AF88 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:26 src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:27 src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:28 src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:29 src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:29 src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:29 src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:29 src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:31 src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:32 src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:33 src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:34 src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:34 src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:34 src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:34 src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:35 src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:35 src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:35 src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:35 src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:35 src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:35 src/ov_SC03_105/ov_SC03_105_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:35 src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:35 src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:36 src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC03_105/ov_SC03_105_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:36 src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:36 src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:36 src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:36 src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:37 src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c:func_8017CD2C A=DIFFERS B: removed 0 needed 4 compiles 5
03:56:37 src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:37 src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:37 src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:37 src/ov_SC05_010/ov_SC05_010_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:37 src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:37 src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:func_8017DD3C A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:37 src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:37 src/ov_SC06_016/ov_SC06_016_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:37 src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:37 src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:38 src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:38 src/ov_SC05_010/ov_SC05_010_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:38 src/ov_SC06_016/ov_SC06_016_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:38 src/ov_SC06_029/ov_SC06_029_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:38 src/ov_SC06_030/ov_SC06_030_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:38 src/ov_SC01_001/ov_SC01_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:38 src/ov_SC07_002/ov_SC07_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:38 src/ov_SC01_000/ov_SC01_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:38 src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:38 src/ov_SC01_004/ov_SC01_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:38 src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:38 src/ov_SC06_029/ov_SC06_029_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:39 src/ov_SC06_030/ov_SC06_030_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:39 src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:39 src/ov_SC01_000/ov_SC01_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:39 src/ov_SC01_001/ov_SC01_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:39 src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:39 src/ov_SC07_002/ov_SC07_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:39 src/ov_SC01_008/ov_SC01_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:39 src/ov_SC01_004/ov_SC01_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:40 src/ov_SC01_009/ov_SC01_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC01_005/ov_SC01_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC01_074/ov_SC01_074_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC01_084/ov_SC01_084_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC01_008/ov_SC01_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:40 src/ov_SC02_021/ov_SC02_021_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC02_035/ov_SC02_035_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC01_009/ov_SC01_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:40 src/ov_SC02_016/ov_SC02_016_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC02_027/ov_SC02_027_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC02_028/ov_SC02_028_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC02_039/ov_SC02_039_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC02_041/ov_SC02_041_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:40 src/ov_SC01_074/ov_SC01_074_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:40 src/ov_SC01_084/ov_SC01_084_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC02_021/ov_SC02_021_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC02_035/ov_SC02_035_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC02_028/ov_SC02_028_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC02_027/ov_SC02_027_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC01_005/ov_SC01_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC02_039/ov_SC02_039_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC02_016/ov_SC02_016_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC02_041/ov_SC02_041_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:41 src/ov_SC03_010/ov_SC03_010_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:41 src/ov_SC03_011/ov_SC03_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_013/ov_SC03_013_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_089/ov_SC03_089_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_029/ov_SC03_029_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_010/ov_SC03_010_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:42 src/ov_SC03_011/ov_SC03_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:42 src/ov_SC03_090/ov_SC03_090_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_094/ov_SC03_094_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_096/ov_SC03_096_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_095/ov_SC03_095_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_091/ov_SC03_091_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:42 src/ov_SC03_013/ov_SC03_013_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:42 src/ov_SC03_097/ov_SC03_097_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:43 src/ov_SC03_089/ov_SC03_089_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:43 src/ov_SC03_093/ov_SC03_093_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:43 src/ov_SC03_090/ov_SC03_090_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:43 src/ov_SC03_095/ov_SC03_095_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:43 src/ov_SC03_029/ov_SC03_029_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:43 src/ov_SC03_099/ov_SC03_099_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:43 src/ov_SC03_094/ov_SC03_094_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:43 src/ov_SC03_096/ov_SC03_096_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:43 src/ov_SC03_091/ov_SC03_091_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:43 src/ov_SC03_098/ov_SC03_098_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:44 src/ov_SC03_097/ov_SC03_097_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:44 src/ov_SC03_093/ov_SC03_093_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:44 src/ov_SC03_099/ov_SC03_099_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:44 src/ov_SC03_102/ov_SC03_102_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:44 src/ov_SC03_100/ov_SC03_100_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:44 src/ov_SC03_101/ov_SC03_101_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:44 src/ov_SC03_108/ov_SC03_108_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:44 src/ov_SC03_104/ov_SC03_104_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:44 src/ov_SC03_103/ov_SC03_103_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:44 src/ov_SC03_112/ov_SC03_112_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:45 src/ov_SC03_102/ov_SC03_102_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:45 src/ov_SC03_098/ov_SC03_098_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:45 src/ov_SC03_101/ov_SC03_101_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:45 src/ov_SC03_110/ov_SC03_110_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:45 src/ov_SC03_100/ov_SC03_100_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:45 src/ov_SC03_113/ov_SC03_113_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:45 src/ov_SC03_108/ov_SC03_108_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:45 src/ov_SC03_103/ov_SC03_103_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:45 src/ov_SC03_104/ov_SC03_104_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:45 src/ov_SC03_115/ov_SC03_115_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:45 src/ov_SC03_114/ov_SC03_114_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:45 src/ov_SC03_112/ov_SC03_112_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:46 src/ov_SC03_113/ov_SC03_113_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:46 src/ov_SC03_121/ov_SC03_121_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC03_110/ov_SC03_110_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:46 src/ov_SC04_000/ov_SC04_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC03_115/ov_SC03_115_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:46 src/ov_SC03_117/ov_SC03_117_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC03_114/ov_SC03_114_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:46 src/ov_SC04_002/ov_SC04_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC04_006/ov_SC04_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC04_003/ov_SC04_003_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC04_005/ov_SC04_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC04_007/ov_SC04_007_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:46 src/ov_SC03_121/ov_SC03_121_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:46 src/ov_SC04_000/ov_SC04_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:46 src/ov_SC03_117/ov_SC03_117_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:47 src/ov_SC04_009/ov_SC04_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:47 src/ov_SC04_002/ov_SC04_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:47 src/ov_SC04_005/ov_SC04_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:47 src/ov_SC04_010/ov_SC04_010_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:47 src/ov_SC04_016/ov_SC04_016_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:47 src/ov_SC04_006/ov_SC04_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:47 src/ov_SC04_007/ov_SC04_007_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:47 src/ov_SC05_000/ov_SC05_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:47 src/ov_SC04_003/ov_SC04_003_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:47 src/ov_SC05_002/ov_SC05_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:47 src/ov_SC04_010/ov_SC04_010_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:47 src/ov_SC05_001/ov_SC05_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:47 src/ov_SC04_009/ov_SC04_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:48 src/ov_SC04_016/ov_SC04_016_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:48 src/ov_SC05_003/ov_SC05_003_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:48 src/ov_SC05_002/ov_SC05_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:48 src/ov_SC05_004/ov_SC05_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:48 src/ov_SC05_000/ov_SC05_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:48 src/ov_SC05_006/ov_SC05_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:48 src/ov_SC05_007/ov_SC05_007_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:48 src/ov_SC05_001/ov_SC05_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:48 src/ov_SC05_009/ov_SC05_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:48 src/ov_SC05_003/ov_SC05_003_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:48 src/ov_SC05_005/ov_SC05_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:48 src/ov_SC05_011/ov_SC05_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:48 src/ov_SC06_006/ov_SC06_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:49 src/ov_SC05_004/ov_SC05_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:49 src/ov_SC05_007/ov_SC05_007_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:49 src/ov_SC05_006/ov_SC05_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:49 src/ov_SC06_008/ov_SC06_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:49 src/ov_SC05_009/ov_SC05_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:49 src/ov_SC06_013/ov_SC06_013_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:49 src/ov_SC05_011/ov_SC05_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:49 src/ov_SC06_011/ov_SC06_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:49 src/ov_SC05_005/ov_SC05_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:49 src/ov_SC06_006/ov_SC06_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:49 src/ov_SC06_015/ov_SC06_015_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:49 src/ov_SC06_014/ov_SC06_014_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:49 src/ov_SC06_008/ov_SC06_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:50 src/ov_SC06_013/ov_SC06_013_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:50 src/ov_SC06_018/ov_SC06_018_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:50 src/ov_SC06_011/ov_SC06_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:50 src/ov_SC06_022/ov_SC06_022_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:50 src/ov_SC06_020/ov_SC06_020_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:50 src/ov_SC06_024/ov_SC06_024_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:50 src/ov_SC06_025/ov_SC06_025_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:50 src/ov_SC06_015/ov_SC06_015_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:50 src/ov_SC06_014/ov_SC06_014_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:50 src/ov_SC06_027/ov_SC06_027_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:50 src/ov_SC06_022/ov_SC06_022_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:50 src/ov_SC07_000/ov_SC07_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:50 src/ov_SC06_018/ov_SC06_018_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:51 src/ov_SC06_033/ov_SC06_033_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:51 src/ov_SC07_001/ov_SC07_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:51 src/ov_SC06_024/ov_SC06_024_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:51 src/ov_SC06_025/ov_SC06_025_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:51 src/ov_SC06_020/ov_SC06_020_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:51 src/ov_SC06_027/ov_SC06_027_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:51 src/ov_SC07_008/ov_SC07_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:51 src/ov_SC01_000/ov_SC01_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:51 src/ov_SC07_000/ov_SC07_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:51 src/ov_SC06_033/ov_SC06_033_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:51 src/ov_SC07_009/ov_SC07_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
03:56:51 src/ov_SC01_001/ov_SC01_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:51 src/ov_SC01_004/ov_SC01_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC07_001/ov_SC07_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:52 src/ov_SC01_008/ov_SC01_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC01_009/ov_SC01_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC01_074/ov_SC01_074.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC07_008/ov_SC07_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:52 src/ov_SC01_077/ov_SC01_077_a.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC01_005/ov_SC01_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC01_080/ov_SC01_080.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC01_084/ov_SC01_084.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC07_009/ov_SC07_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
03:56:52 src/ov_SC02_005/ov_SC02_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:52 src/ov_SC02_004/ov_SC02_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_015/ov_SC02_015.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_011/ov_SC02_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_021/ov_SC02_021.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_016/ov_SC02_016.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_000/ov_SC02_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_026/ov_SC02_026.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_017/ov_SC02_017.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_027/ov_SC02_027.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_031/ov_SC02_031.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_028/ov_SC02_028.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_035/ov_SC02_035.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_039/ov_SC02_039.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC02_041/ov_SC02_041.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC03_002/ov_SC03_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC03_001/ov_SC03_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:53 src/ov_SC03_003/ov_SC03_003.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_006/ov_SC03_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_007/ov_SC03_007.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_010/ov_SC03_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_011/ov_SC03_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_012/ov_SC03_012.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_023/ov_SC03_023.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_013/ov_SC03_013.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_024/ov_SC03_024.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_028/ov_SC03_028.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_029/ov_SC03_029.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_030/ov_SC03_030.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_089/ov_SC03_089.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_031/ov_SC03_031.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_014/ov_SC03_014.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:54 src/ov_SC03_090/ov_SC03_090.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_091/ov_SC03_091.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_094/ov_SC03_094.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_092/ov_SC03_092.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_093/ov_SC03_093.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_096/ov_SC03_096.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_097/ov_SC03_097.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_095/ov_SC03_095.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_098/ov_SC03_098.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_099/ov_SC03_099.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_100/ov_SC03_100.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_101/ov_SC03_101.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_102/ov_SC03_102.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_103/ov_SC03_103.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_104/ov_SC03_104.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_105/ov_SC03_105.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_108/ov_SC03_108.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:55 src/ov_SC03_109/ov_SC03_109.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_110/ov_SC03_110.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_112/ov_SC03_112.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_111/ov_SC03_111.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_113/ov_SC03_113.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_114/ov_SC03_114.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_116/ov_SC03_116.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_115/ov_SC03_115.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_117/ov_SC03_117.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_121/ov_SC03_121.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_124/ov_SC03_124.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_125/ov_SC03_125.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC04_000/ov_SC04_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC04_002/ov_SC04_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC04_005/ov_SC04_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC04_003/ov_SC04_003.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC04_004/ov_SC04_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:56 src/ov_SC03_118/ov_SC03_118.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_006/ov_SC04_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_008/ov_SC04_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_007/ov_SC04_007.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_009/ov_SC04_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_012/ov_SC04_012.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_010/ov_SC04_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_016/ov_SC04_016.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_015/ov_SC04_015.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC05_000/ov_SC05_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_020/ov_SC04_020.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC05_001/ov_SC05_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC04_018/ov_SC04_018.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC05_002/ov_SC05_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC05_003/ov_SC05_003.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC05_004/ov_SC05_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:57 src/ov_SC05_005/ov_SC05_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_006/ov_SC05_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_009/ov_SC05_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_007/ov_SC05_007.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_008/ov_SC05_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_010/ov_SC05_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_011/ov_SC05_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_017/ov_SC05_017.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC06_000/ov_SC06_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC05_018/ov_SC05_018.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC06_006/ov_SC06_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC06_008/ov_SC06_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC06_011/ov_SC06_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC06_010/ov_SC06_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC06_014/ov_SC06_014.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:58 src/ov_SC06_013/ov_SC06_013.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_018/ov_SC06_018.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_015/ov_SC06_015.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_016/ov_SC06_016.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_020/ov_SC06_020.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_022/ov_SC06_022.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_024/ov_SC06_024.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_025/ov_SC06_025.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_027/ov_SC06_027.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_029/ov_SC06_029.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_030/ov_SC06_030.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_032/ov_SC06_032.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC06_033/ov_SC06_033.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC07_000/ov_SC07_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC07_001/ov_SC07_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC07_008/ov_SC07_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:56:59 src/ov_SC07_002/ov_SC07_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:57:00 src/ov_SC07_009/ov_SC07_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
03:57:00 src/ov_SC04_008/ov_SC04_008_jr_801734BC.c:func_80178970 A=DIFFERS B: removed 0 needed 1 compiles 2
03:57:00 src/ov_SC05_009/ov_SC05_009_jr_801734BC.c:func_80178970 A=DIFFERS B: removed 0 needed 1 compiles 2
03:57:01 delever: batch tus7 — 300 files (TUs; 983 drawable) · 1407 bodies: 432 lever-free, 973 residue, 2 refused · sites removed 1855 / needed 2032 / refused 6 / deferred 0 · replays 589 (0 disagreed) · compiles 3211 in 101 s wall · final 300/300 identical · written 300 files
tus7 wall=104.41 s
exit=0
+3 -1
View File
@@ -360,7 +360,9 @@ accumulate here as the phase produces them.**
- **2026-09-09 — T4 batch `tus6`** (`.run/P36/delever/run_tus6.log`, `batch_tus6.json`): `delever: batch tus6 — 300 files (TUs; 1283 drawable) · 1409 bodies: 301 lever-free, 1108 residue, 0 refused · sites removed 1667 / needed 2377 / refused 0 / deferred 0 · replays 897 (0 disagreed) · compiles 2505 in 63 s wall · final 300/300 identical · written 300 files` → R22 (`.run/P36/baseline/r22_tus6.log`) **`check-all: 218 passed, 0 failed of 218`** (`wall=114.08 s`) → census `THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 38,580 sites in 13,622 bodies (2,225 distinct) · marked !FAKE 27,018 · UNMARKED 11,562`.
## 🛑 SESSION CHECKPOINT — S98 (2026-09-09): T0 ☑ T1 ☑ T1b ☑ T2 ☑ T3 ☑ — all committed (T3 = `39e3e1851` tools, `cd24727dd` + `7ee458dd7` the ov_SC04_011 batches, this close); NEXT = T4 the mechanical campaign: `tools/delever_cycle.sh` over the whole population (TUs then headers), unattended, one commit per batch, R22 every batch | the number: 53,033 sites in 15,638 bodies (2,246 distinct), 310 marked, 0 orphans | last batch `tus6` on ca761c4f6: THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 38,580 sites in 13,622 bodies (2,225 distinct) · marked !FAKE 27,018 · UNMARKED 11,562
- **2026-09-09 — T4 batch `tus7`** (`.run/P36/delever/run_tus7.log`, `batch_tus7.json`): `delever: batch tus7 — 300 files (TUs; 983 drawable) · 1407 bodies: 432 lever-free, 973 residue, 2 refused · sites removed 1855 / needed 2032 / refused 6 / deferred 0 · replays 589 (0 disagreed) · compiles 3211 in 101 s wall · final 300/300 identical · written 300 files` → R22 (`.run/P36/baseline/r22_tus7.log`) **`check-all: 218 passed, 0 failed of 218`** (`wall=116.04 s`) → census `THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 36,764 sites in 13,224 bodies (2,199 distinct) · marked !FAKE 29,045 · UNMARKED 7,719`.
## 🛑 SESSION CHECKPOINT — S98 (2026-09-09): T0 ☑ T1 ☑ T1b ☑ T2 ☑ T3 ☑ — all committed (T3 = `39e3e1851` tools, `cd24727dd` + `7ee458dd7` the ov_SC04_011 batches, this close); NEXT = T4 the mechanical campaign: `tools/delever_cycle.sh` over the whole population (TUs then headers), unattended, one commit per batch, R22 every batch | the number: 53,033 sites in 15,638 bodies (2,246 distinct), 310 marked, 0 orphans | last batch `tus7` on 3e60fdf41: THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 36,764 sites in 13,224 bodies (2,199 distinct) · marked !FAKE 29,045 · UNMARKED 7,719
### 0. How to use this block
A fresh session reads CLAUDE.md's load order, replays this block verbatim, confirms the effort (T4/T5/T6/T8/T9 are xHigh per the plan, Max is
+10 -11
View File
@@ -217,7 +217,7 @@ void func_801287B8(void) {
{
/* D_801A5878 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801A5878;
register volatile s32 *p __asm__("$4") = &D_801A5878; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -491,17 +491,17 @@ void func_8012956C(void) {
extern u8 D_801A5858;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -511,7 +511,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -552,7 +551,7 @@ void func_8012956C(void) {
D_801A43E0[idx], D_801A43E1[idx], D_801A43E2[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801A5858;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+9 -9
View File
@@ -2631,8 +2631,8 @@ extern s16 D_801A5842;
extern s16 D_801A584C;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801A5840;
s32 pv = param_1;
s16 *g = &D_801A5840;
switch (g[0]) {
case 0:
@@ -2777,8 +2777,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2923,8 +2923,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2948,7 +2948,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801A56E6;
v790 = D_801A56E8;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801A5870 = 1;
D_801A5674 = 0x1E;
D_80126990 = v794;
@@ -3208,8 +3208,8 @@ extern void (*D_801A56BC[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801A56BC;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801F3158 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801F3158;
register volatile s32 *p __asm__("$4") = &D_801F3158; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_801F3138;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_801EC670[idx], D_801EC671[idx], D_801EC672[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801F3138;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+9 -9
View File
@@ -2629,8 +2629,8 @@ extern s16 D_801F3122;
extern s16 D_801F312C;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801F3120;
s32 pv = param_1;
s16 *g = &D_801F3120;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801ED976;
v790 = D_801ED978;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801F3150 = 1;
D_801ED904 = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801ED94C[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801ED94C;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_80190360 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_80190360;
register volatile s32 *p __asm__("$4") = &D_80190360; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_80190340;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_8018EDD8[idx], D_8018EDD9[idx], D_8018EDDA[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_80190340;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+9 -9
View File
@@ -2629,8 +2629,8 @@ extern s16 D_8019032A;
extern s16 D_80190334;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_80190328;
s32 pv = param_1;
s16 *g = &D_80190328;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801900DE;
v790 = D_801900E0;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_80190358 = 1;
D_8019006C = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801900B4[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801900B4;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801CDFC0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801CDFC0;
register volatile s32 *p __asm__("$4") = &D_801CDFC0; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_801CDFA0;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_801CC538[idx], D_801CC539[idx], D_801CC53A[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801CDFA0;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+9 -9
View File
@@ -2629,8 +2629,8 @@ extern s16 D_801CDF8A;
extern s16 D_801CDF94;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801CDF88;
s32 pv = param_1;
s16 *g = &D_801CDF88;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801CD83E;
v790 = D_801CD840;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801CDFB8 = 1;
D_801CD7CC = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801CD814[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801CD814;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801A3570 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801A3570;
register volatile s32 *p __asm__("$4") = &D_801A3570; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_801A3550;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_801A1FE8[idx], D_801A1FE9[idx], D_801A1FEA[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801A3550;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+9 -9
View File
@@ -2629,8 +2629,8 @@ extern s16 D_801A353A;
extern s16 D_801A3544;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801A3538;
s32 pv = param_1;
s16 *g = &D_801A3538;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801A32EE;
v790 = D_801A32F0;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801A3568 = 1;
D_801A327C = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801A32C4[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801A32C4;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801F33F0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801F33F0;
register volatile s32 *p __asm__("$4") = &D_801F33F0; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_801F33D0;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_801F1E48[idx], D_801F1E49[idx], D_801F1E4A[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801F33D0;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+9 -9
View File
@@ -2623,8 +2623,8 @@ extern s16 D_801F33BA;
extern s16 D_801F33C4;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801F33B8;
s32 pv = param_1;
s16 *g = &D_801F33B8;
switch (g[0]) {
case 0:
@@ -2769,8 +2769,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2915,8 +2915,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2940,7 +2940,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801F314E;
v790 = D_801F3150;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801F33E8 = 1;
D_801F30DC = 0x1E;
D_80126990 = v794;
@@ -3200,8 +3200,8 @@ extern void (*D_801F3124[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801F3124;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_8019BD00 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_8019BD00;
register volatile s32 *p __asm__("$4") = &D_8019BD00; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_8019BCE0;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_8019A8C8[idx], D_8019A8C9[idx], D_8019A8CA[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_8019BCE0;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+9 -9
View File
@@ -2629,8 +2629,8 @@ extern s16 D_8019BCCA;
extern s16 D_8019BCD4;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_8019BCC8;
s32 pv = param_1;
s16 *g = &D_8019BCC8;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_8019BBCE;
v790 = D_8019BBD0;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_8019BCF8 = 1;
D_8019BB5C = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_8019BBA4[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_8019BBA4;
+10 -11
View File
@@ -260,7 +260,7 @@ void func_801287B8(void) {
{
/* D_801DAAC0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801DAAC0;
register volatile s32 *p __asm__("$4") = &D_801DAAC0; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -566,17 +566,17 @@ void func_8012956C(void) {
extern u8 D_801DAAA0;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -586,7 +586,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -627,7 +626,7 @@ void func_8012956C(void) {
D_801D9488[idx], D_801D9489[idx], D_801D948A[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801DAAA0;
s = base->f40;
temp_a3 = base->f38;
+22 -24
View File
@@ -63,7 +63,7 @@ void func_80145934(void) {
p = &D_80189054;
/* §5a cross-jump barrier — LOAD-BEARING: keeps this D_80189054 load from being
* tail-merged with the v>=0x384 D_80189054 load below (emits zero machine code). */
__asm__ __volatile__("" ::: "memory");
__asm__ __volatile__("" ::: "memory"); // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
} else if (v >= 0x5DC) {
p = &D_80188FC4;
} else if (v >= 0x578) {
@@ -110,7 +110,7 @@ void func_80145A2C(void) {
p = &D_801890E4;
/* §5a cross-jump barrier — LOAD-BEARING: keeps this D_801890E4 load from being
* tail-merged with the v>=0x384 D_801890E4 load below (emits zero machine code). */
__asm__ __volatile__("" ::: "memory");
__asm__ __volatile__("" ::: "memory"); // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
} else if (v >= 0x5DC) {
p = &D_80188FC4;
} else if (v >= 0x578) {
@@ -755,11 +755,11 @@ extern ActorFn D_80188614[];
int func_80148AFC(void *a0) {
s32 p = (s32)a0;
s32 iVar5 = *(s32 *)(p + 0x20);
register s32 tmp __asm__("$5") = (ratan2(*(s32 *)(D_801151D4 + 0x44) - *(s32 *)(D_801151D4 + 0x50),
register s32 tmp __asm__("$5") = (ratan2(*(s32 *)(D_801151D4 + 0x44) - *(s32 *)(D_801151D4 + 0x50), // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
*(s32 *)(D_801151D4 + 0x48) - *(s32 *)(D_801151D4 + 0x3C)) - 0x400) & 0xFFF;
s32 sVar3;
u8 bVar1;
__asm__("" : "=r"(tmp) : "0"(tmp));
__asm__("" : "=r"(tmp) : "0"(tmp)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
sVar3 = tmp;
bVar1 = *(u8 *)(p + 0xA9);
@@ -769,15 +769,15 @@ int func_80148AFC(void *a0) {
case 0x53:
case 0x73:
{
register u32 bb __asm__("$3");
register s32 c80 __asm__("$2") = 0x80;
register s32 lo __asm__("$4");
register s32 hi __asm__("$2");
register u32 bb __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
register s32 c80 __asm__("$2") = 0x80; // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 lo;
register s32 hi __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
bb = *(u16 *)(p + 0xAE);
lo = bb & 0xFF;
if (lo != c80 || (hi = bb >> 8) != 0x80) {
s32 sVar4;
__asm__ __volatile__("" : : : "memory");
__asm__ __volatile__("" : : : "memory"); // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
sVar4 = ratan2((*(u16 *)(p + 0xAE) & 0xFF) - 0x80, 0x80 - (*(u16 *)(p + 0xAE) >> 8));
*(u16 *)(iVar5 + 0x12) = (sVar3 + sVar4) & 0xFFF;
return 1;
@@ -834,8 +834,8 @@ extern u16 D_80126C06;
extern s32 D_80188654[];
s32 func_80148D44(void) {
register s32 ang __asm__("$16");
register s32 a __asm__("$4");
s32 ang;
register s32 a __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
s32 p;
s32 res;
s32 d;
@@ -844,7 +844,7 @@ s32 func_80148D44(void) {
a = (ratan2(*(s32 *)(p + 0x44) - *(s32 *)(p + 0x50),
*(s32 *)(p + 0x48) - *(s32 *)(p + 0x3c)) - 0x400) & 0xFFF;
d = (s32)D_80126C01;
__asm__ __volatile__("" : : "r"(a));
__asm__ __volatile__("" : : "r"(a)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
ang = a;
if (d == 0x53) {
goto final;
@@ -867,7 +867,6 @@ final:
if (((e & 0xff) == 0x80) && ((e >> 8) == (e & 0xff))) {
return -1;
}
__asm__ __volatile__("" : : : "memory");
res = (ang + ratan2((D_80126C06 & 0xff) - 0x80, 0x80 - (D_80126C06 >> 8))) & 0xFFF;
}
return res;
@@ -880,10 +879,10 @@ extern s32 D_801151D4;
extern s16 (*D_80188694[])();
s32 func_80148E54(s32 arg0) {
register s32 tmp __asm__("$4") = (ratan2(*(s32 *)(D_801151D4 + 0x44) - *(s32 *)(D_801151D4 + 0x50),
register s32 tmp __asm__("$4") = (ratan2(*(s32 *)(D_801151D4 + 0x44) - *(s32 *)(D_801151D4 + 0x50), // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
*(s32 *)(D_801151D4 + 0x48) - *(s32 *)(D_801151D4 + 0x3C)) - 0x400) & 0xFFF;
s32 ang;
__asm__("" : "=r"(tmp) : "0"(tmp));
__asm__("" : "=r"(tmp) : "0"(tmp)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
ang = tmp;
switch (*(u8 *)(arg0 + 0xA9)) {
@@ -1097,7 +1096,7 @@ extern s16 currentLocationId;
s32 func_80149FB0(s32 a0) {
s32 *p = &D_801886D4[0];
register s32 v __asm__("$3") = *p;
s32 v = *p;
u8 *q = &D_80078E78[0];
s32 loc;
@@ -1931,7 +1930,7 @@ s32 func_8014D820(s32 a0, u16 *a1, u16 *a2x)
} Ent;
int new_var2;
s16 new_var3;
register u16 *a2 __asm__("$7");
register u16 *a2 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
V4 out[3];
V4 pos;
Desc desc;
@@ -1955,11 +1954,11 @@ register u16 *a2 __asm__("$7");
s32 t;
s32 u;
s32 a0v;
__asm__ __volatile__("" : "=r"(a2) : "0"(a2x));
__asm__ __volatile__("" : "=r"(a2) : "0"(a2x)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
t = a2[0];
u = a1[0];
dx = t - u;
__asm__ __volatile__("" : "=r"(a0v) : "0"(a0));
a0v = a0;
new_var3 = (s16) dx;
t = a2[2];
u = a1[2];
@@ -2915,7 +2914,7 @@ s32 func_8015094C(s32 param_1) {
struct { s32 x, mid, y; s32 _pad[9]; } arg; /* 0x30 @ 0x10 */
S16 local; /* 0x10 @ 0x40 */
s32 pad1[4]; /* 0x10 @ 0x50 */
register u8 *cam __asm__("$17") = D_80126948;
u8 *cam = D_80126948;
s32 ret;
local = D_801D8924;
@@ -3033,7 +3032,7 @@ extern void (*D_80188798[])(void);
void func_80150B28(int param_1) {
u32 idx;
register u32 sub __asm__("$2");
u32 sub;
if ((D_800AE6B0 & 0x80FFFFFF) == 0) {
idx = *(u16 *)(param_1 + 0x16C);
@@ -3322,8 +3321,8 @@ void func_801523F4(s32 arg0)
{
s32 pad[4];
s32 buf[4];
register s32 s0a __asm__("$16"); /* $s0 = buf */
register s32 s2a __asm__("$18") = (s32)&D_80188880; /* $s2 = &D_80188880 */
s32 s0a; /* $s0 = buf */
s32 s2a = (s32)&D_80188880; /* $s2 = &D_80188880 */
((void (*)(s32, s32))func_80146E90)(arg0, 0);
func_80019064(&D_80062C04);
@@ -3605,7 +3604,6 @@ void func_80153D7C(s32 param_1)
if (currentLocationId == 0x3075) *(u8 *)(param_1 + 0xde) = 0x14;
else *(u8 *)(param_1 + 0xde) = 10;
*(u8 *)(param_1 + 0xdf) = 0;
__asm__ __volatile__("" ::: "memory");
func_80146CA0((void *)param_1);
}
@@ -1450,7 +1450,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+44 -45
View File
@@ -2754,8 +2754,8 @@ extern void func_8012F14C(s32 a0, s32 a1, s32 a2);
s32 func_801749C8(s32 param_1)
{
Buf_c1 buf;
register s32 iVar5 __asm__("$18");
register u32 iVar4 __asm__("$17");
s32 iVar5;
u32 iVar4;
*(s32 *)(param_1 + 8) = (s16)((s16 (*)(s32, s32, s32))func_80012C6C)((s32)*(s16 *)(param_1 + 8), (s32)*(s16 *)(param_1 + 0xc), 4);
*(s32 *)(param_1 + 0x10) = (s16)((s16 (*)(s32, s32, s32))func_80012C6C)((s32)*(s16 *)(param_1 + 0x10), (s32)*(s16 *)(param_1 + 0x14), 4);
@@ -3120,19 +3120,19 @@ void func_80175AB8(param_1)
u8 *arr;
u32 *slot;
u32 *p;
register u32 *a0v __asm__("$4");
register u32 *a0v __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 uv;
s32 k;
s16 q;
s32 r1;
s32 a2v;
register s32 sum __asm__("$5");
register s32 sum __asm__("$5"); // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
s32 r2;
s32 idx;
s16 sv;
p = (u32 *)(D_800AF638[param_1].g0 + D_800AF634[param_1].g0 * 4);
__asm__("" : "=r"(base) : "0"(&D_8011F7F0)); /* L1 */
__asm__("" : "=r"(base) : "0"(&D_8011F7F0)); /* L1 */ // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
arr = base - 0x48;
slot = (u32 *)(param_1 * 4 + (s32)arr);
*(volatile u32 *)&slot[6] = (u32)p; /* L2 */
@@ -3161,7 +3161,7 @@ void func_80175AB8(param_1)
(s16)(*(u16 *)(base - 0x32) + 0x65));
idx = D_8011F83A & 0x7F;
D_8011F83A = idx;
__asm__ __volatile__("" ::: "memory");
__asm__ __volatile__("" ::: "memory"); // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
((void (*)(s32, u8 *))func_80024054)(((s32 *)D_8018A23C)[idx], local);
p = func_80178298(p, local,
(s16)(*(u16 *)(base - 0x34) + 0x39),
@@ -3300,7 +3300,7 @@ void func_80175DA8(param_1)
fl = *(s16 *)(base + 0x1E) & 0x8000;
/* §5a zero-byte sched fence: without it sched1 hoists the `la D_800D43D4`
into the lh's load-delay slot, dropping the target's nop (-1 ins). */
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg = (s32)&D_800D43D4;
if (fl != 0) {
arg = (s32)&D_800D4414;
@@ -3700,10 +3700,10 @@ void func_80176734(s32 param_1)
extern void func_801775E0(s32 param_1, s32 param_2);
s32 st, cach, flag, cur;
register s32 chg __asm__("$21"); /* L7 */
register s32 chg2 __asm__("$16"); /* L7 */
s32 chg; /* L7 */
register s32 chg2 __asm__("$16"); /* L7 */ // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 amp; /* $s0, disjoint from chg2 */
register u16 tgt __asm__("$5"); /* L7 */
register u16 tgt __asm__("$5"); /* L7 */ // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
s32 pv; /* L6: the param copy that owns $s6 */
s32 ix; /* L6: block A's index, hoisted out of the block */
u8 dum[8]; /* L5: dead frame slot (target .frame vars=8) */
@@ -3717,7 +3717,7 @@ void func_80176734(s32 param_1)
/* ---- block A: pulse byte ---- */
{
register s32 p __asm__("$5"); /* L7 */
register s32 p __asm__("$5"); /* L7 */ // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
u8 *q;
p = *(s32 *)(ix + 0x28);
q = (u8 *)(p + 0x3C); /* L2: must live in the entry BB */
@@ -3737,7 +3737,7 @@ void func_80176734(s32 param_1)
/* ---- block B: 0x48 animation already running ---- */
if (*(u8 *)(flag + 0x48) != 0) {
register s32 pp __asm__("$5"); /* L7 */
register s32 pp __asm__("$5"); /* L7 */ // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
pp = *(s32 *)(((pv << 16) >> 14) + st + 0x28);
*(u8 *)(pp + 0xD) = D_8018A2D8[*(u8 *)(flag + 0x48)];
if (*(u8 *)(flag + 0x48) < 4) {
@@ -3768,7 +3768,7 @@ void func_80176734(s32 param_1)
}
/* ---- block C: 0x48 changed -> start the animation ---- */
} else if (*(u8 *)(cach + 0x48) != *(u8 *)(cur + 0x48)) {
register s32 pp __asm__("$5"); /* L7 */
register s32 pp __asm__("$5"); /* L7 */ // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
u8 k; /* L1: gives the `andi $v1,$v1,0xFF` index mask */
if (*(u8 *)(cach + 0x48) == 0 && *(u8 *)(cur + 0x48) != 0)
*(u8 *)(flag + 0x48) = 5;
@@ -3818,7 +3818,7 @@ L9C0:
{
u8 m = D_800B9A13; /* L1 */
if (m != 3) { /* inverted: `chg = 0` belongs out of line */
register s32 t __asm__("$2"); /* L3a: pin + 2 uses keeps `chg = t` alive */
register s32 t __asm__("$2"); /* L3a: pin + 2 uses keeps `chg = t` alive */ // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
t = (*(u8 *)(st + 7) != m);
chg = t;
if (t != 0) *(u8 *)(st + 7) = m;
@@ -3848,7 +3848,7 @@ L9C0:
{
s32 av;
av = amp;
__asm__("" : "=r"(av) : "0"(av)); /* L3b: keeps the `move $v0,$s0` at the merge */
__asm__("" : "=r"(av) : "0"(av)); /* L3b: keeps the `move $v0,$s0` at the merge */ // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
if (av != 0) {
*(u8 *)(flag + 0x47) = 1;
*(u8 *)(cach + 0x4B) = *(u8 *)(cur + 0x48) | 0xF0;
@@ -3864,11 +3864,11 @@ L9C0:
tgt = *(u16 *)&D_80126CE0;
if (D_80126CE0 != 0) {
u16 v; /* dies at the mask -> destructive `andi $v1,$v1` */
register s32 t __asm__("$2");
register s32 t __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
v = tgt;
*(u8 *)(cach + 0x4B) = v;
t = (*(u8 *)(cach + 0x47) != (v & 0xFF));
__asm__("" : "=r"(t) : "0"(t)); /* L3b */
__asm__("" : "=r"(t) : "0"(t)); /* L3b */ // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
chg2 = t;
} else {
u32 cv = *(u8 *)(cach + 0x47); /* L8: one load, two compares, no re-mask */
@@ -3884,12 +3884,12 @@ L9C0:
/* ---- block J: nothing-changed fast path. The target re-tests chg after the flag load;
the fence below is what stops cse from folding that second test away. ---- */
{
register s32 c __asm__("$3");
register s32 c __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
c = chg;
if (chg2 != 0) goto Lbig;
if (c != 0) goto Lbig;
if (*(u8 *)(flag + 0x47) == 0) goto Ltail;
__asm__("" : "=r"(c) : "0"(c)); /* L3b */
__asm__("" : "=r"(c) : "0"(c)); /* L3b */ // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
if (c == 0) goto Lzero;
}
Lbig:
@@ -4130,19 +4130,19 @@ s32 tbli;
s32 x;
s32 y;
{
register u32 bb __asm__("$14");
u32 bb;
u32 *q;
register u32 v __asm__("$25");
register u32 cl __asm__("$3");
register u32 cs __asm__("$5");
register u32 ca __asm__("$8");
u32 v;
register u32 cl __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
register u32 cs __asm__("$5"); // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
u32 ca;
s16 i;
u32 mk1;
u32 cc1;
u32 flag;
register u32 nn __asm__("$2");
register u32 nn __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
u32 n;
register u32 t __asm__("$13");
u32 t;
u32 col;
u32 uv;
u32 tt;
@@ -4153,18 +4153,18 @@ register u32 t __asm__("$13");
u32 g;
u32 gg;
u32 w3;
register u32 yr __asm__("$16");
register u32 yt __asm__("$4");
register u32 tr __asm__("$21");
register u32 xr __asm__("$17");
register u32 c3 __asm__("$18");
register s32 ff __asm__("$19");
register s32 two __asm__("$20");
register u32 yr __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
register u32 yt __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
register u32 tr __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung B tus7)
register u32 xr __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
u32 c3;
s32 ff;
s32 two;
yt = y;
tr = tbli;
__asm__("" : "=r"(tr) : "0"(tr));
__asm__("" : "=r"(tr) : "0"(tr)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
xr = x;
__asm__("" : "=r"(xr) : "0"(xr));
__asm__("" : "=r"(xr) : "0"(xr)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
mk1 = 0xFFFFFF;
cc1 = 0x74808080;
bb = bits;
@@ -4182,11 +4182,11 @@ __asm__("" : "=r"(xr) : "0"(xr));
x2 = (x + 5) & 0xFFFF;
p[1] = cc1;
yr = yt;
__asm__("" : "=r"(yr) : "0"(yr));
__asm__("" : "=r"(yr) : "0"(yr)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
yt = (s16) yt;
cs = (yt + 1) << 16;
w = cs | x1;
__asm__("" : "=r"(w) : "0"(w));
__asm__("" : "=r"(w) : "0"(w)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
cl = ((v << 6) | 0x4016) << 16;
p[2] = w;
p[3] = cl | 0x1800;
@@ -4220,13 +4220,12 @@ __asm__("" : "=r"(w) : "0"(w));
}
p = q;
__asm__("" : "=r"(v) : "0"(v));
g = (((u32) (p - 5)) & 0xFFFFFF) | 0x3000000;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
cs = yr << 16;
p[0] = g;
w3 = cs | ((xr + 0x2A) & 0xFFFF);
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
cl = ((v << 6) | 0x4016) << 16;
uv = ((s16) tr) << 4;
p[2] = w3;
@@ -4235,7 +4234,7 @@ __asm__ __volatile__("");
p[3] = cl | tt;
p += 5;
p[0] = (((u32) (p - 5)) & 0xFFFFFF) | 0x3000000;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
cs = cs | ((xr + 0x32) & 0xFFFF);
uv = uv | 0x1008;
cl = cl | uv;
@@ -4243,7 +4242,7 @@ __asm__ __volatile__("");
p[2] = cs;
p[3] = cl;
p += 5;
__asm__("" :: "r"(tr), "r"(xr));
__asm__("" :: "r"(tr), "r"(xr)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
return p;
}
@@ -4391,8 +4390,8 @@ extern int D_8018A360;
extern int D_8018A36C[];
void func_80178840(int param_1) {
register int p __asm__("$16");
register int s1byte __asm__("$17");
register int p __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
int s1byte;
p = param_1;
if ((*(unsigned short *)(p + 0x5c) & 1) != 0) {
s1byte = *(unsigned char *)(p + 0x5e);
@@ -4415,7 +4414,7 @@ extern s16 D_801DAAB8;
int func_80178970(void)
{
register int r __asm__("$2");
register int r __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
int v;
v = ((s32 (*)(void))func_801789AC)();
+38 -41
View File
@@ -2773,8 +2773,8 @@ extern s16 D_801DAA8A;
extern s16 D_801DAA94;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801DAA88;
s32 pv = param_1;
s16 *g = &D_801DAA88;
switch (g[0]) {
case 0:
@@ -2918,8 +2918,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238 *)&buf[0] = *(Blk8_8017B238 *)src;
*(Blk8_8017B238 *)&buf[8] = *(Blk8_8017B238 *)(src + 8);
} else {
@@ -3058,8 +3058,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -3083,7 +3083,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801DA78E;
v790 = D_801DA790;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801DAAB8 = 1;
D_801DA71C = 0x1E;
D_80126990 = v794;
@@ -3329,8 +3329,8 @@ extern void (*D_801DA764[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801DA764;
@@ -4276,7 +4276,7 @@ extern u16 D_80126B66;
s32 func_8017DAEC(s32 param_1)
{
register St_8017DAEC *s __asm__("$16") = (St_8017DAEC *)param_1;
St_8017DAEC *s = (St_8017DAEC *)param_1;
Loc_8017DAEC loc;
s16 b5e;
u16 b66;
@@ -4815,7 +4815,7 @@ void func_8017E8A4(u16 *param_1)
if (1 < (u16)(*param_1 - 0x19)) {
if (D_801270D4 < 0x1e) {
__asm__ __volatile__("" ::: "$4");
__asm__ __volatile__("" ::: "$4"); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
if (((s32 (*)(u16 *))func_80172658)(param_1) == 0) {
return;
}
@@ -4939,13 +4939,12 @@ void func_8017EB2C(int param_1, int param_2)
}
if (p != 0) {
int t;
register s32 d __asm__("$5");
register s32 r __asm__("$2");
s32 d;
register s32 r __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
t = rand();
s1 = t - (t / 256) * 256;
r = rand() % 640;
d = (s32)*(u16 *)(base + 0xe) - 0x140;
__asm__("" : "=r"(d) : "0"(d));
d += r;
*(s16 *)(p + 0xe) = d;
if ((param_2 & 1) != 0) {
@@ -5074,16 +5073,16 @@ s32 func_8017EF50(s32 param_1)
extern void func_8012931C(struct vec *a0);
extern void func_801292C8(u8 *a0);
register unsigned short c __asm__("$5");
register int d __asm__("$4");
register int g __asm__("$6");
register unsigned short c __asm__("$5"); // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
int d;
register int g __asm__("$6"); // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B tus7)
int a;
int e;
((void (*)(int))func_8012931C)(((int)param_1));
a = *(int *)(((int)param_1) + 0x10);
c = *(unsigned short *)(((int)param_1) + 0x34);
e = *(int *)(((int)param_1) + 0x2c);
__asm__ __volatile__("" : : "r"(a));
__asm__ __volatile__("" : : "r"(a)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
d = *(int *)(((int)param_1) + 0x30);
{
unsigned short cp1 = c + 1;
@@ -5151,15 +5150,15 @@ extern void func_8002D4C8(int, int);
void func_8017F114(void)
{
register int iVar1 __asm__("$3");
register int iVar5 __asm__("$6");
register int iVar7 __asm__("$8");
register int iVar8 __asm__("$9");
register short *psVar6 __asm__("$7");
register short *psVar2 __asm__("$4");
register int uVar4 __asm__("$5");
int iVar1;
int iVar5;
int iVar7;
int iVar8;
register short *psVar6 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register short *psVar2 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
register int uVar4 __asm__("$5"); // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
int uVar3;
register int num __asm__("$2");
register int num __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
uVar4 = 0;
if ((D_800B99DA & 4) == 0) {
@@ -5214,7 +5213,7 @@ extern s32 func_8012C51C(void *a0, s32 a1);
M2C_UNK func_8017F240(void)
{
register s32 *p __asm__("$16");
s32 *p;
p = &D_801270D0;
if (*p == 0) {
((void (*)(u8 *, s32))func_8012C51C)(&D_8018A868, 0);
@@ -5352,8 +5351,8 @@ void func_8017F5BC(int param_1)
{
int iVar1;
int c70;
register short vf4 __asm__("$3");
register unsigned short v5c __asm__("$2");
short vf4;
register unsigned short v5c __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
struct buf_8017F5BC sp;
*(short *)(param_1 + 2) = 2;
@@ -5366,7 +5365,6 @@ void func_8017F5BC(int param_1)
*(int *)(param_1 + 0xdc) = 0;
v5c = *(unsigned short *)(param_1 + 0x5c) & 0x73ff;
*(unsigned short *)(param_1 + 0x5c) = v5c;
__asm__ __volatile__("");
if (c70 != 4) {
sp.f0 = *(short *)(param_1 + 6) + 0xf0;
sp.f2 = *(short *)(param_1 + 10);
@@ -5610,9 +5608,9 @@ void func_8017FD14(void *a0)
u32 *pal;
u8 *base;
u8 *pp;
register u8 *prim __asm__("$20");
register u8 *fp __asm__("$16");
register void *av __asm__("$17");
u8 *prim;
register u8 *fp __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
void *av;
av = a0;
func_8004914C(&D_800AF648);
@@ -5840,14 +5838,14 @@ extern s32 func_8012BEE8(s32 a0);
extern int func_8012D714(int, int);
extern void func_8017F694(void *arg0);
extern void func_8002D4C8(s32 a0, s32 a1);
extern volatile unsigned short D_80126B96;
extern unsigned short D_80126B96;
void func_8018047C(int param_1)
{
int iVar1;
if ((*(char *)(param_1 + 0x70) == 4) || (iVar1 = ((int (*)(void))func_8012BEE8)(), iVar1 != 0)) {
register int sum __asm__("$3");
int sum;
sum = *(int *)(param_1 + 0xe0);
sum += *(int *)(param_1 + 0xe4);
*(int *)(param_1 + 0xdc) += sum;
@@ -5861,7 +5859,7 @@ void func_8018047C(int param_1)
if (2 <= *(unsigned short *)(param_1 + 0x34)) {
((void (*)(int))func_8017F694)(param_1);
} else {
register int cnt __asm__("$4");
register int cnt __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*(unsigned short *)(param_1 + 0x34) == 0) {
func_8002D4C8(0x487, 0);
}
@@ -5898,7 +5896,7 @@ extern M2C_UNK D_80186E48;
void func_80180590(int param_1)
{
int iVar2;
register unsigned int uVar3 __asm__("$2");
register unsigned int uVar3 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
int uVar5;
int uVar6;
unsigned short uVar1;
@@ -5935,7 +5933,7 @@ void func_80180590(int param_1)
uVar1 = 0xc800;
}
*(unsigned short *)(param_1 + 0x5c) = uVar1;
__asm__ __volatile__("" ::: "memory");
__asm__ __volatile__("" ::: "memory"); // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
*(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0;
func_8012B2CC(param_1);
}
@@ -6098,8 +6096,8 @@ extern void func_8012ADE4(u8 *a0);
s32 func_801809BC(s32 param_1, s32 param_2)
{
register s32 p1 __asm__("$16") = param_1;
register s32 p2 __asm__("$17") = param_2;
s32 p1 = param_1;
s32 p2 = param_2;
SVEC in;
SVEC out;
SVEC buf;
@@ -6109,7 +6107,6 @@ s32 func_801809BC(s32 param_1, s32 param_2)
s32 a0v;
a0v = p1 + 4;
__asm__ __volatile__("" : : "r"(p2), "r"(a0v));
if (((s32 (*)(s32, s32))func_8012BC60)(a0v, p2 + 4) >= 0x1000) {
return 0;
}
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801C7EE0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801C7EE0;
register volatile s32 *p __asm__("$4") = &D_801C7EE0; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_801C7EC4;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_801C46F8[idx], D_801C46F9[idx], D_801C46FA[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801C7EC4;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+47 -47
View File
@@ -2629,8 +2629,8 @@ extern s16 D_801C7EAA;
extern s16 D_801C7EB4;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801C7EA8;
s32 pv = param_1;
s16 *g = &D_801C7EA8;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801C59FE;
v790 = D_801C5A00;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801C7EDC = 1;
D_801C598C = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801C59D4[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801C59D4;
@@ -3949,7 +3949,7 @@ void func_8017D72C(s32 arg0) {
* func_8012A828, so the target's `addu $s0,$v0,$zero` copy survives.
* Without the pin gcc coalesces the two pseudos (`lbu $s0` / `sh $s0`)
* and the copy disappears -- one instruction short. */
register s32 t __asm__("$2");
register s32 t __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 v;
u16 t5c;
s32 t5e;
@@ -4205,8 +4205,8 @@ void func_8017DCF8(s32 arg0) {
extern s32 D_80186FB0[];
extern u8 D_80186F6C;
extern u8 D_80186F5C;
register s32 param_1 __asm__("$16") = arg0;
register s32 iVar1 __asm__("$17");
s32 param_1 = arg0;
register s32 iVar1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
s32 ret;
s32 iVar2;
@@ -4667,8 +4667,8 @@ void func_8017E724(s32 param_1)
{
s16 arr[3];
s32 a;
register s32 cur __asm__("$16");
register s32 ang __asm__("$17");
register s32 cur __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
register s32 ang __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
s32 d;
s32 d2;
s32 t;
@@ -5258,7 +5258,7 @@ typedef struct {
void func_8017F53C(s32 arg0)
{
register s32 param_1 __asm__("$16") = arg0;
register s32 param_1 __asm__("$16") = arg0; // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 ret;
s32 handle;
s32 cnt;
@@ -5299,7 +5299,7 @@ void func_8017F53C(s32 arg0)
void func_8017F638(s32 arg0) {
volatile u8 sp18[8];
u8 sp18[8];
s32 v1;
extern s32 D_801270C8;
extern void func_8017F458(void);
@@ -5565,10 +5565,10 @@ void func_8017FCC0(void) {
extern u16 D_801C7600[];
void func_8017FCFC(u16 *a0) {
register u16 *p __asm__("$5");
register s32 i __asm__("$6");
register s32 c __asm__("$7");
register u16 *q __asm__("$3");
u16 *p;
s32 i;
s32 c;
register u16 *q __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
p = D_801C7600;
i = 0;
@@ -5740,9 +5740,9 @@ void func_8017FFB4(s32 arg0)
extern u8 D_80189974;
extern s32 D_801C7EC0;
register s32 s0 __asm__("$16");
register s32 s1 __asm__("$17");
register s32 s2 __asm__("$18") = arg0;
register s32 s0 __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 s1;
register s32 s2 __asm__("$18") = arg0; // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus7)
s32 v0;
v0 = ((s32 (*)(void))func_8012C1B8)();
@@ -5907,8 +5907,8 @@ void func_8018045C(s32 arg0)
extern u8 D_801AE850;
extern u8 D_8018A044;
register s32 s0 __asm__("$16");
register s32 s1 __asm__("$17");
register s32 s0 __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
register s32 s1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
s32 v0;
s0 = arg0;
@@ -5956,8 +5956,8 @@ extern s32 D_80127190;
void func_80180598(s32 arg0)
{
register s32 param_1 __asm__("$16") = arg0;
register s32 iVar1 __asm__("$17");
register s32 param_1 __asm__("$16") = arg0; // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
register s32 iVar1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
s32 ret;
s32 v0;
@@ -6109,14 +6109,14 @@ void func_80180728(s32 a0) {
`s32 j = i;` keeps the sign-extend alive (it is never dead under
an `sb`, measured) and cse then commons it with the index's own
extend, costing the copy and the folded `sra 10` (§241). */
__asm__("" : "=r"(j) : "0"(i));
__asm__("" : "=r"(j) : "0"(i)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
v1b = j * 4 + 4;
/* offset-first spelling: the target is `addu $a0,$v0,$s2`, not
`addu $a0,$s2,$v0` that `&base[i]` produces. */
elem = (Str_801C5B00 *)(i * 0x40 + (s32)base);
/* §34 zero-byte fence: without it sched sinks the address below
`j * 8 + 8` (target order is v1b, address, v0b). */
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
v0b = j * 8 + 8;
((u8 *)elem)[1] = v1b;
@@ -6149,15 +6149,15 @@ void func_80180728(s32 a0) {
sp20[2] = 0;
sp20[1] = 0;
sp20[0] = 0;
__asm__("" : "=r"(p0) : "0"(p0));
__asm__("" : "=r"(p1) : "0"(p1));
__asm__("" : "=r"(p0) : "0"(p0)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
__asm__("" : "=r"(p1) : "0"(p1)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
func_800D20C0(p0, p1, 1);
func_800D23D0(sp28);
t = sp28[1];
/* §34 fence: sched2 otherwise emits the `0x2($s1)` load first, which flips
both loads' registers ($a0/$v1) as well as their order. */
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
v1 = *(u16 *)(a0 + 2);
*(u16 *)(a0 + 0xDC) = 0;
*(u16 *)(a0 + 0x84) = 8;
@@ -6224,7 +6224,7 @@ void func_801809E4(s32 param_1) {
allocates it $s2 and gives the 0x19 hoist $s3 -- the exact inverse of the
target (21-ins residual, register-only). Pinning $s3 = $19 restores the
target allocation. */
register s16 mask __asm__("$19");
register s16 mask __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B tus7)
u8 *p;
if (*(s32 *)(param_1 + 0x1C) != 0) {
@@ -6386,7 +6386,7 @@ void func_80180D54(s32 param_1) {
u16 sp10[6];
u16 *p0;
u16 *p1;
register s16 mask __asm__("$19");
register s16 mask __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B tus7)
s16 i;
u8 *p;
u8 *q;
@@ -6397,8 +6397,8 @@ void func_80180D54(s32 param_1) {
sp10[0] = 0;
p0 = sp10;
p1 = sp10 + 4;
__asm__("" : "=r"(p0) : "0"(p0));
__asm__("" : "=r"(p1) : "0"(p1));
__asm__("" : "=r"(p0) : "0"(p0)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
__asm__("" : "=r"(p1) : "0"(p1)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
func_800D20C0(p0, p1, 1);
func_800D23D0(sp10 + 4);
cnt = *(s32 *)(param_1 + 0x1C);
@@ -6552,7 +6552,7 @@ void func_801810E4(void *a0) {
s16 c;
/* §136d-1 / RC-12: the `$0`-add opaque copy — keeps `y` a distinct pseudo
from the temp cse would otherwise canonicalise it onto. */
register s32 zr __asm__("$0");
register s32 zr __asm__("$0"); // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
t = D_80127190 - 0x128;
y = t + zr;
@@ -6600,7 +6600,7 @@ void func_801810E4(void *a0) {
*(s32 *)((u8 *)a0 + 0x1C) = m;
/* §5a barrier: without it both sched1 and sched2 sink this store below the
three &v/&v2 address insns (byte-attributed with -fno-schedule-insns*). */
__asm__ __volatile__("" ::: "memory");
__asm__ __volatile__("" ::: "memory"); // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
*(s32 *)((u8 *)a0 + 0x18) = v.vz << 9;
func_800D20C0(&v, &v2, 1);
@@ -6735,8 +6735,8 @@ void func_801815D4(s32 param_1) {
sp10[2] = 0;
sp10[1] = 0;
sp10[0] = 0;
__asm__("" : "=r"(p0) : "0"(p0));
__asm__("" : "=r"(p1) : "0"(p1));
__asm__("" : "=r"(p0) : "0"(p0)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
__asm__("" : "=r"(p1) : "0"(p1)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
func_800D20C0(p0, p1, 1);
func_800D23D0(sp10 + 4);
D_801C7540 = sp10[5] - 0x400;
@@ -6888,7 +6888,7 @@ void func_80181854(void *a0) {
the "memory" clobber): without it both schedulers sink this store past the
two argument insns below and it steals the jal's delay slot. Same lever as
the §5a barrier in func_801810E4. */
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
func_801696D8((s32)a0, (s32)&mtx);
if (--*(s32 *)((u8 *)a0 + 0x1C) == -1) {
@@ -6907,7 +6907,7 @@ extern u16 D_80126B66;
void func_80181918(s32 arg0) {
s32 pad[12];
u16 t;
register u16 cnt __asm__("$6");
register u16 cnt __asm__("$6"); // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B tus7)
t = rand();
*(u16 *)(arg0 + 6) = D_80126B5E + D_80126B6A * 32 + (t & 0x1FF) - 0xFF;
@@ -7104,8 +7104,8 @@ extern s32 func_8012C658(s32 a0, s32 a1, s32 a2);
* the target has them the other way round. `s` holds D_80126D50 so the
* unconditional `*p = 1` lands in the bnez delay slot. */
void func_80181D98(void *a0) {
register s32 *p __asm__("$17");
register SpotDef_8018A278 *t __asm__("$16");
s32 *p;
register SpotDef_8018A278 *t __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 e;
s32 s;
u16 v;
@@ -7176,7 +7176,7 @@ extern s32 D_801270D0;
extern void func_8002D59C(s32, s32, s32);
void func_80181FAC(s32 arg0) {
register s32 id __asm__("$5");
s32 id;
s32 dist;
s32 vol;
@@ -7233,7 +7233,7 @@ void func_801820AC(s32 arg0) {
u16 buf[3];
s32 t, yaw, sn, cs, base, len, rot, sum, ang, d, q;
s16 mode;
register s32 am __asm__("$4");
register s32 am __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
d = D_8018A2AC;
sum = *(u16 *)(arg0 + 0xFC) + d;
@@ -7373,7 +7373,7 @@ void func_8018230C(s32 arg0) {
w = D_8018A304 + D_8018A306 * c;
bp = base;
{
register u16 z __asm__("$3");
register u16 z __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
base[0] = *(u16 *)(arg0 + 6);
base[1] = *(u16 *)(arg0 + 0xA);
z = *(u16 *)(arg0 + 0xE);
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801C7B88 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801C7B88;
register volatile s32 *p __asm__("$4") = &D_801C7B88; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_801C7820;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_801C61A0[idx], D_801C61A1[idx], D_801C61A2[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801C7820;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+9 -9
View File
@@ -2630,8 +2630,8 @@ extern s16 D_801C780A;
extern s16 D_801C7814;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801C7808;
s32 pv = param_1;
s16 *g = &D_801C7808;
switch (g[0]) {
case 0:
@@ -2776,8 +2776,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2922,8 +2922,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2947,7 +2947,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801C74A6;
v790 = D_801C74A8;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801C7AB8 = 1;
D_801C7434 = 0x1E;
D_80126990 = v794;
@@ -3214,8 +3214,8 @@ extern void (*D_801C747C[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801C747C;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801E87C0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801E87C0;
register volatile s32 *p __asm__("$4") = &D_801E87C0; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_801E8774;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_801E6CD0[idx], D_801E6CD1[idx], D_801E6CD2[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801E8774;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+13 -13
View File
@@ -2626,8 +2626,8 @@ extern s16 D_801E875A;
extern s16 D_801E8764;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801E8758;
s32 pv = param_1;
s16 *g = &D_801E8758;
switch (g[0]) {
case 0:
@@ -2772,8 +2772,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2918,8 +2918,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2943,7 +2943,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801E7FD6;
v790 = D_801E7FD8;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801E87BC = 1;
D_801E7F64 = 0x1E;
D_80126990 = v794;
@@ -3203,8 +3203,8 @@ extern void (*D_801E7FAC[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801E7FAC;
@@ -3794,17 +3794,17 @@ void func_8017D230(u16 *a0, void *a1) {
int func_8017D2D4(short *param_1, short *param_2, short *param_3, int param_4) {
register int i2o __asm__("$5");
register int i4o __asm__("$9");
register int i2o __asm__("$5"); // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
register int i4o __asm__("$9"); // !FAKE: pin $9 — NEEDED DIFFERS (P36 rung B tus7)
short sVar1; int rx, rz, uVar5;
i4o = param_2[1];
__asm__ __volatile__("" : : "r"(i4o));
__asm__ __volatile__("" : : "r"(i4o)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
i2o = param_1[1]; uVar5 = 0;
if (i2o >= i4o) {
rx = param_1[0] - i2o * (param_2[0] - param_1[0]);
rz = param_1[2] - i2o * (param_2[2] - param_1[2]);
} else {
register int den __asm__("$3");
register int den __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
int p2x = param_2[0], p2z = param_2[2];
den = i2o - i4o;
rx = p2x + i4o * (p2x - param_1[0]) / den;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_80196358 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_80196358;
register volatile s32 *p __asm__("$4") = &D_80196358; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_80196338;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_80194F20[idx], D_80194F21[idx], D_80194F22[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_80196338;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+14 -14
View File
@@ -2629,8 +2629,8 @@ extern s16 D_80196322;
extern s16 D_8019632C;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_80196320;
s32 pv = param_1;
s16 *g = &D_80196320;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_80196226;
v790 = D_80196228;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_80196350 = 1;
D_801961B4 = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801961FC[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801961FC;
@@ -4098,7 +4098,7 @@ extern u8 D_801817A4[];
extern u8 D_801817B0[];
void func_8017DA30(s32 a0) {
register s32 ent __asm__("$16");
register s32 ent __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 sub;
s32 hw;
u32 r;
@@ -4114,14 +4114,14 @@ void func_8017DA30(s32 a0) {
func_80128EA8(sub, (s32)((u8 *)ent + 0x24), (s32)D_800D3888);
hw = 0x2C;
} else {
register s32 q __asm__("$4");
register s32 p __asm__("$5");
register s32 e __asm__("$6");
register s32 q __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
s32 p;
s32 e;
func_8001CC3C(sub, (s32)D_801817A4, 0, 0);
q = sub;
p = (s32)((u8 *)ent + 0x24);
e = (s32)D_801817B0;
__asm__ __volatile__("" : "=r"(q), "=r"(p), "=r"(e) : "0"(q), "1"(p), "2"(e));
__asm__ __volatile__("" : "=r"(q), "=r"(p), "=r"(e) : "0"(q), "1"(p), "2"(e)); // !FAKE: launder — REFUSED launder with 3 outputs (P36 rung B tus7)
*(u8 *)((u8 *)q + 0x27) = 0x33;
func_80128EA8(q, p, e);
hw = 0x1C;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801E4BE0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801E4BE0;
register volatile s32 *p __asm__("$4") = &D_801E4BE0; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_801E4BC0;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_801E2F98[idx], D_801E2F99[idx], D_801E2F9A[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801E4BC0;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+17 -18
View File
@@ -2621,8 +2621,8 @@ extern s16 D_801E4BAA;
extern s16 D_801E4BB4;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801E4BA8;
s32 pv = param_1;
s16 *g = &D_801E4BA8;
switch (g[0]) {
case 0:
@@ -2767,8 +2767,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2913,8 +2913,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2938,7 +2938,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801E429E;
v790 = D_801E42A0;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801E4BD8 = 1;
D_801E422C = 0x1E;
D_80126990 = v794;
@@ -3198,8 +3198,8 @@ extern void (*D_801E4274[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801E4274;
@@ -3736,7 +3736,7 @@ void func_8017C41C(void *a0) {
if (*(s16 *)((s32)a0 + 0xFC) == 0xB) {
s32 f = *(s32 *)((s32)a0 + 0x1C);
s32 v = -(f & 1) & 0xC0;
__asm__("" : "=r"(v) : "0"(v));
__asm__("" : "=r"(v) : "0"(v)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
f = f + 1;
*(s32 *)((s32)a0 + 0x1C) = f;
D_801E4321 = v;
@@ -3760,16 +3760,15 @@ void func_8017C41C(void *a0) {
D_801E4325 = c * 255 / h;
D_801E431D = c * 255 / h;
} else {
register u8 *q __asm__("$6");
u8 *q;
u16 bs;
s32 x;
s16 y;
t = (c - h) * 255 / h;
q = &D_801E431D;
__asm__("" : "=r"(q) : "0"(q));
__asm__("" : "=r"(q) : "0"(q)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
bs = (u16)D_801E42F8;
x = bs + hw;
__asm__("" :: "r"(hw));
y = x - 4;
D_801E4325 = 0xFF;
*q = 0xFF;
@@ -3785,7 +3784,7 @@ void func_8017C41C(void *a0) {
}
p = &D_801E4378;
__asm__("" : "=r"(p) : "0"(p));
__asm__("" : "=r"(p) : "0"(p)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
D_801E4368 = *(u16 *)((s32)p - 0x18) + (u16)D_801942E0;
*p = D_801E4368 - 4;
w = (void *)((s32)p - 0x80);
@@ -3907,17 +3906,17 @@ void func_8017CC88(u16 *a0, void *a1) {
int func_8017CD2C(short *param_1, short *param_2, short *param_3, int param_4) {
register int i2o __asm__("$5");
register int i4o __asm__("$9");
register int i2o __asm__("$5"); // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
register int i4o __asm__("$9"); // !FAKE: pin $9 — NEEDED DIFFERS (P36 rung B tus7)
short sVar1; int rx, rz, uVar5;
i4o = param_2[1];
__asm__ __volatile__("" : : "r"(i4o));
__asm__ __volatile__("" : : "r"(i4o)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
i2o = param_1[1]; uVar5 = 0;
if (i2o >= i4o) {
rx = param_1[0] - i2o * (param_2[0] - param_1[0]);
rz = param_1[2] - i2o * (param_2[2] - param_1[2]);
} else {
register int den __asm__("$3");
register int den __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
int p2x = param_2[0], p2z = param_2[2];
den = i2o - i4o;
rx = p2x + i4o * (p2x - param_1[0]) / den;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801EBA10 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801EBA10;
register volatile s32 *p __asm__("$4") = &D_801EBA10; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_801EB9F0;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_801E9E78[idx], D_801E9E79[idx], D_801E9E7A[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801EB9F0;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+21 -21
View File
@@ -2615,8 +2615,8 @@ extern s16 D_801EB9DA;
extern s16 D_801EB9E4;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801EB9D8;
s32 pv = param_1;
s16 *g = &D_801EB9D8;
switch (g[0]) {
case 0:
@@ -2764,8 +2764,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2910,8 +2910,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2935,7 +2935,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801EB17E;
v790 = D_801EB180;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801EBA08 = 1;
D_801EB10C = 0x1E;
D_80126990 = v794;
@@ -3201,8 +3201,8 @@ extern void (*D_801EB154[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801EB154;
@@ -3476,8 +3476,8 @@ void func_8017C360(s32 a0) {
s32 s0;
s32 s2;
s32 s3;
register s32 v1 __asm__("$3");
register s32 v0 __asm__("$2");
register s32 v1 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
register s32 v0 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 rnd;
s32 scale;
@@ -3514,7 +3514,7 @@ void func_8017C360(s32 a0) {
sp10[2] = scale;
ApplyMatrixSV(sp18, sp10, sp10);
{
register s32 c __asm__("$4");
register s32 c __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
s32 z;
c = *(u16 *)(a0 + 0x2);
*(s32 *)(a0 + 0x10) = sp10[0] << 8;
@@ -4485,7 +4485,7 @@ void func_8017D710(s32 a0) {
permutation. */
raw = ((s32 (*)(s32))func_8012CBA4)(a0);
flags = raw;
__asm__ __volatile__("" : "=r"(flags) : "0"(flags));
__asm__ __volatile__("" : "=r"(flags) : "0"(flags)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
/* `m` blocks fold_truthop from merging the two bitfield tests below into a single
`andi $v1,$s1,0xe000` -- the target keeps `& 0x8000` and `& 0x6000` separate. */
@@ -4632,7 +4632,7 @@ void func_8017D710(s32 a0) {
copies vanish and everything from .L8017CD18 on drifts by 2 instructions. */
{
s32 fire = ret;
__asm__ __volatile__("" : "=r"(ret) : "0"(ret));
__asm__ __volatile__("" : "=r"(ret) : "0"(ret)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
if (fire != 0) {
func_80146A6C(2, (void *)s0, 0, 0, 0, 2, 0);
}
@@ -4761,7 +4761,7 @@ extern void func_8012B0B4(unsigned int *param_1, int param_2, int param_3);
void func_8017DCC0(s32 a0, s16 a1, s16 a2) {
u32 buf[4];
register s32 hi __asm__("$2");
register s32 hi __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 lo;
func_8012B0B4(buf, *(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), a1 << 4);
@@ -4846,7 +4846,7 @@ void func_8017DE10(s32 a0) {
u8 out[8];
Mtx8_8017DE10 m;
s32 base;
register s32 ang __asm__("$2");
register s32 ang __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s16 arg;
*(s16 *)(in + 0) = *(u16 *)(a0 + 0x6) + *(u16 *)(a0 + 0x12);
@@ -5937,8 +5937,8 @@ void func_8017F67C(void *a0)
extern u16 D_80194C30[][2];
s16 n;
register s32 tmp __asm__("$4");
register s32 t __asm__("$17");
register s32 tmp __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
register s32 t __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
s16 v;
SVECTOR_8017C290 vec1;
SVECTOR_8017C290 vec2;
@@ -6348,11 +6348,11 @@ void func_8017FD9C(s32 arg0) {
u8 *p = &D_801EB488;
D_801EB489 = D_801EB48A = *p = func_80012F74(*p, 0, 10, 1);
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
*(Quad_801EA880_8017FD9C *)&D_801EB48C = *(Quad_801EA880_8017FD9C *)p;
*(Quad_801EA880_8017FD9C *)&D_801EB490 = *(Quad_801EA880_8017FD9C *)p;
*(Quad_801EA880_8017FD9C *)&D_801EB494 = *(Quad_801EA880_8017FD9C *)p;
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
((void (*)(s32))func_80146C3C)(arg0);
}
@@ -7359,7 +7359,7 @@ void func_80180FE4(s32 arg0)
mx = wx >> 16;
wy = part->yy;
mny = wy;
__asm__ volatile ("" :: "r"(mny));
__asm__ volatile ("" :: "r"(mny)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
my = wy >> 16;
wz = part->zz;
box[0].vx = mn; box[0].vy = mny;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_80190630 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_80190630;
register volatile s32 *p __asm__("$4") = &D_80190630; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_80190610;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_8018EFF8[idx], D_8018EFF9[idx], D_8018EFFA[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_80190610;
s = base->f40;
temp_a3 = base->f38;
@@ -1400,7 +1400,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+12 -12
View File
@@ -2627,8 +2627,8 @@ extern s16 D_801905FA;
extern s16 D_80190604;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801905F8;
s32 pv = param_1;
s16 *g = &D_801905F8;
switch (g[0]) {
case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801902FE;
v790 = D_80190300;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_80190628 = 1;
D_8019028C = 0x1E;
D_80126990 = v794;
@@ -3204,8 +3204,8 @@ extern void (*D_801902D4[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801902D4;
@@ -3816,7 +3816,7 @@ extern s32 rand(void);
void func_8017D9E4(s32 param_1) {
u16 delta[4];
register s32 t __asm__("$3");
register s32 t __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
s32 t2;
s16 d;
s32 obj;
@@ -3870,7 +3870,7 @@ extern u8 *func_801290DC(s32 a0, u8 *a1);
extern s32 D_80181D90;
void func_8017DB60(void *a0) {
register s8 *s0 __asm__("$16");
register s8 *s0 __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 t;
u8 *p;
s32 x;
@@ -4138,7 +4138,7 @@ void func_8017DF44(void *a0) {
* swaps $v0/$v1 across the sll/lui pair (REGALLOC-PERM). The re-tie keeps the
* in-place `v1 <<= 6` form (so the shift stays in $v1) AND anchors it after the
* two loads. Emits no code. */
__asm__ __volatile__("" : "=r"(v1) : "0"(v1));
__asm__ __volatile__("" : "=r"(v1) : "0"(v1)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
v1 = v1 << 6;
a2 = (s32)D_80190330 + v1;
v1ptr = *(u8 **)((s32)a0 + 0x20);
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801B4A68 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801B4A68;
register volatile s32 *p __asm__("$4") = &D_801B4A68; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_801B4A48;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_801B2C10[idx], D_801B2C11[idx], D_801B2C12[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801B4A48;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+9 -9
View File
@@ -2624,8 +2624,8 @@ extern s16 D_801B4A32;
extern s16 D_801B4A3C;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801B4A30;
s32 pv = param_1;
s16 *g = &D_801B4A30;
switch (g[0]) {
case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801B3F16;
v790 = D_801B3F18;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801B4A60 = 1;
D_801B3EA4 = 0x1E;
D_80126990 = v794;
@@ -3207,8 +3207,8 @@ extern void (*D_801B3EEC[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801B3EEC;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801EFCC8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801EFCC8;
register volatile s32 *p __asm__("$4") = &D_801EFCC8; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_801EFCA8;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_801EE438[idx], D_801EE439[idx], D_801EE43A[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801EFCA8;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+12 -12
View File
@@ -2618,8 +2618,8 @@ extern s16 D_801EFC92;
extern s16 D_801EFC9C;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801EFC90;
s32 pv = param_1;
s16 *g = &D_801EFC90;
switch (g[0]) {
case 0:
@@ -2767,8 +2767,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2913,8 +2913,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2938,7 +2938,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801EF73E;
v790 = D_801EF740;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801EFCC0 = 1;
D_801EF6CC = 0x1E;
D_80126990 = v794;
@@ -3201,8 +3201,8 @@ extern void (*D_801EF714[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801EF714;
@@ -4394,8 +4394,8 @@ void func_8017DD3C(s32 a0) {
s32 s0;
s32 s2;
s32 s3;
register s32 v1 __asm__("$3");
register s32 v0 __asm__("$2");
register s32 v1 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
register s32 v0 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 rnd;
s32 scale;
@@ -4432,7 +4432,7 @@ void func_8017DD3C(s32 a0) {
sp10[2] = scale;
ApplyMatrixSV(sp18, sp10, sp10);
{
register s32 c __asm__("$4");
register s32 c __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
s32 z;
c = *(u16 *)(a0 + 0x2);
*(s32 *)(a0 + 0x10) = sp10[0] << 8;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_80193830 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_80193830;
register volatile s32 *p __asm__("$4") = &D_80193830; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_80193810;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_801919A8[idx], D_801919A9[idx], D_801919AA[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_80193810;
s = base->f40;
temp_a3 = base->f38;
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
(*(s16 *)&D_800B9AAC) = 0x7fff;
D_800B9B00 = 0x7fff;
__asm__ __volatile__("" ::: "memory");
for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
p[1] |= 0x80000000;
+9 -9
View File
@@ -2629,8 +2629,8 @@ extern s16 D_801937FA;
extern s16 D_80193804;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801937F8;
s32 pv = param_1;
s16 *g = &D_801937F8;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_80192CAE;
v790 = D_80192CB0;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_80193828 = 1;
D_80192C3C = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_80192C84[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_80192C84;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801D0250 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801D0250;
register volatile s32 *p __asm__("$4") = &D_801D0250; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_801D0230;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_801CEDE8[idx], D_801CEDE9[idx], D_801CEDEA[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801D0230;
s = base->f40;
temp_a3 = base->f38;
+12 -12
View File
@@ -2629,8 +2629,8 @@ extern s16 D_801D021A;
extern s16 D_801D0224;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801D0218;
s32 pv = param_1;
s16 *g = &D_801D0218;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801D00EE;
v790 = D_801D00F0;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801D0248 = 1;
D_801D007C = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801D00C4[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801D00C4;
@@ -3340,8 +3340,8 @@ void func_8017BF88(s32 a0) {
s32 s0;
s32 s2;
s32 s3;
register s32 v1 __asm__("$3");
register s32 v0 __asm__("$2");
register s32 v1 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
register s32 v0 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 rnd;
s32 scale;
@@ -3378,7 +3378,7 @@ void func_8017BF88(s32 a0) {
sp10[2] = scale;
ApplyMatrixSV(sp18, sp10, sp10);
{
register s32 c __asm__("$4");
register s32 c __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
s32 z;
c = *(u16 *)(a0 + 0x2);
*(s32 *)(a0 + 0x10) = sp10[0] << 8;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801DA9D0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801DA9D0;
register volatile s32 *p __asm__("$4") = &D_801DA9D0; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_801DA9B0;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_801D8B58[idx], D_801D8B59[idx], D_801D8B5A[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801DA9B0;
s = base->f40;
temp_a3 = base->f38;
+9 -9
View File
@@ -2628,8 +2628,8 @@ extern s16 D_801DA99A;
extern s16 D_801DA9A4;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801DA998;
s32 pv = param_1;
s16 *g = &D_801DA998;
switch (g[0]) {
case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801D9E5E;
v790 = D_801D9E60;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801DA9C8 = 1;
D_801D9DEC = 0x1E;
D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801D9E34[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801D9E34;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801D35D0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801D35D0;
register volatile s32 *p __asm__("$4") = &D_801D35D0; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_801D35B0;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_801D1AF8[idx], D_801D1AF9[idx], D_801D1AFA[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801D35B0;
s = base->f40;
temp_a3 = base->f38;
+9 -9
View File
@@ -2624,8 +2624,8 @@ extern s16 D_801D359A;
extern s16 D_801D35A4;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801D3598;
s32 pv = param_1;
s16 *g = &D_801D3598;
switch (g[0]) {
case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801D2DFE;
v790 = D_801D2E00;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801D35C8 = 1;
D_801D2D8C = 0x1E;
D_80126990 = v794;
@@ -3207,8 +3207,8 @@ extern void (*D_801D2DD4[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801D2DD4;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801B7AA0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801B7AA0;
register volatile s32 *p __asm__("$4") = &D_801B7AA0; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_801B7A80;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_801B6270[idx], D_801B6271[idx], D_801B6272[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801B7A80;
s = base->f40;
temp_a3 = base->f38;
+28 -29
View File
@@ -2620,8 +2620,8 @@ extern s16 D_801B7A6A;
extern s16 D_801B7A74;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801B7A68;
s32 pv = param_1;
s16 *g = &D_801B7A68;
switch (g[0]) {
case 0:
@@ -2769,8 +2769,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2915,8 +2915,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2940,7 +2940,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801B7576;
v790 = D_801B7578;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801B7A98 = 1;
D_801B7504 = 0x1E;
D_80126990 = v794;
@@ -3203,8 +3203,8 @@ extern void (*D_801B754C[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801B754C;
@@ -3340,8 +3340,8 @@ void func_8017BF88(s32 a0) {
s32 s0;
s32 s2;
s32 s3;
register s32 v1 __asm__("$3");
register s32 v0 __asm__("$2");
register s32 v1 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
register s32 v0 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 rnd;
s32 scale;
@@ -3378,7 +3378,7 @@ void func_8017BF88(s32 a0) {
sp10[2] = scale;
ApplyMatrixSV(sp18, sp10, sp10);
{
register s32 c __asm__("$4");
register s32 c __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
s32 z;
c = *(u16 *)(a0 + 0x2);
*(s32 *)(a0 + 0x10) = sp10[0] << 8;
@@ -4661,7 +4661,7 @@ void func_8017E1D4(s32 p) {
*(s16 *)(o + 0x18) = t1;
lim1 = **(s16 **)(p + 0x58);
lv1 = lim1;
__asm__("" : "=r"(lv1) : "0"(lv1));
__asm__("" : "=r"(lv1) : "0"(lv1)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
if (lim1 < t1) {
*(s16 *)(o + 0x1C) = lv1;
*(s16 *)(o + 0x18) = lv1;
@@ -4934,7 +4934,7 @@ void func_8017E73C(s32 a0) {
permutation. */
raw = ((s32 (*)(s32))func_8012CBA4)(a0);
flags = raw;
__asm__ __volatile__("" : "=r"(flags) : "0"(flags));
__asm__ __volatile__("" : "=r"(flags) : "0"(flags)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
/* `m` blocks fold_truthop from merging the two bitfield tests below into a single
`andi $v1,$s1,0xe000` -- the target keeps `& 0x8000` and `& 0x6000` separate. */
@@ -5081,7 +5081,7 @@ void func_8017E73C(s32 a0) {
copies vanish and everything from .L8017CD18 on drifts by 2 instructions. */
{
s32 fire = ret;
__asm__ __volatile__("" : "=r"(ret) : "0"(ret));
__asm__ __volatile__("" : "=r"(ret) : "0"(ret)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
if (fire != 0) {
func_80146A6C(2, (void *)s0, 0, 0, 0, 2, 0);
}
@@ -5210,7 +5210,7 @@ extern void func_8012B0B4(unsigned int *param_1, int param_2, int param_3);
void func_8017ECEC(s32 a0, s16 a1, s16 a2) {
u32 buf[4];
register s32 hi __asm__("$2");
register s32 hi __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 lo;
func_8012B0B4(buf, *(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), a1 << 4);
@@ -5297,7 +5297,7 @@ void func_8017EE3C(s32 a0) {
u8 out[8];
Mtx8_8017DE10_8017EE3C m;
s32 base;
register s32 ang __asm__("$2");
register s32 ang __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s16 arg;
*(s16 *)(in + 0) = *(u16 *)(a0 + 0x6) + *(u16 *)(a0 + 0x12);
@@ -5962,7 +5962,7 @@ void func_8017F5B4(s32 arg0, s32 arg1, s32 arg2)
if (tmpxy[2].vy > my) my = tmpxy[2].vy;
else if (tmpxy[2].vy < mny) mny = tmpxy[2].vy;
if (my >= -0x6E && mny < 0x6F) {
__asm__ __volatile__ ("" :: "r" (mny));
__asm__ __volatile__ ("" :: "r" (mny)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
if (g.sz0 > g.sz1) { za = g.sz0; if (za < g.sz2) za = g.sz2; }
else { za = g.sz1; if (za < g.sz2) za = g.sz2; }
g.opz = za;
@@ -6573,7 +6573,7 @@ void func_80181868(void *a0) {
s32 func_801818A4(void *a0, void *a1) {
s16 stack_buf[8];
register s16 *s0 __asm__("$16") = (s16 *)a1;
register s16 *s0 __asm__("$16") = (s16 *)a1; // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s16 v0;
s32 result;
s32 ret;
@@ -6860,8 +6860,8 @@ extern u8 D_80078EBA;
extern u8 D_80078EB1;
s32 func_80181EF0(void) {
register s32 m __asm__("$4");
register s32 c __asm__("$3");
register s32 m __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
register s32 c __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
m = D_80078EBA;
c = 4;
if (m == c) {
@@ -6909,7 +6909,7 @@ extern s32 D_80188E40[];
extern void func_8012C1B8(void);
void func_80181FA4(void *a0) {
register s32 t __asm__("$2");
s32 t;
s32 s1;
s32 v0;
@@ -6922,7 +6922,6 @@ void func_80181FA4(void *a0) {
}
func_8001C214(v0, 0);
*(s32 *)((s32)a0 + 0x58) = (s32)D_80188E40;
__asm__ volatile("");
t = *(u16 *)((s32)a0 + 0x2);
*(s16 *)((s32)a0 + 0x5C) = 0x80;
*(u16 *)((s32)a0 + 0x2) = t + 1;
@@ -7316,7 +7315,7 @@ extern void func_80128EA8(s32 a0, s32 a1, s32 a2);
extern u8 *func_801290DC(s32 a0, u8 *a1);
s32 func_80182AB4(s32 a0, s16 a1, s32 a2) {
register s32 ret __asm__("$2");
s32 ret;
u8 *p;
s32 s0;
s32 t;
@@ -7333,7 +7332,7 @@ s32 func_80182AB4(s32 a0, s16 a1, s32 a2) {
*(u16 *)(p + 0x1A) = a1;
*(u16 *)(p + 0x18) = a1;
*(u32 *)(p + 4) = *(u32 *)(p + 4) | 0x50000000;
__asm__("" ::: "memory");
__asm__("" ::: "memory"); // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
*(u32 *)(p + 4) = *(u32 *)(p + 4) | 0x80000000;
func_80128EA8((s32)p, t, (s32)&D_800D3888);
ret = s0;
@@ -7606,13 +7605,13 @@ void func_801831B4(void) {
case 0:
{
s32 *p;
register s32 val __asm__("$2");
register s32 val __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
func_8013C0F8((s32)&D_801A64C8);
p = &D_801B7930;
func_8017F53C((s32)p);
val = D_801B7A84;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801B7948 = 0;
D_801B794C = 0;
D_801B7950 = 0;
@@ -8028,7 +8027,7 @@ void func_80183BB0(s32 a0) {
s32 t;
s32 m;
s32 q;
register s32 n __asm__("$16");
register s32 n __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
unsigned int sp10;
p = *(s32 *)(a0 + 0x20); /* owner's actor */
@@ -8787,7 +8786,7 @@ extern s32 func_800132BC(s32 a0, s32 a1);
s32 func_80184B94(s32 param_1)
{
s32 iVar1;
register s32 uVar2 __asm__("$2");
register s32 uVar2 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
if (*(u16 *) (param_1 + 6) == 0x31 || *(u16 *) (param_1 + 6) == 0x32) {
return 1;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801BE9D8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801BE9D8;
register volatile s32 *p __asm__("$4") = &D_801BE9D8; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -494,17 +494,17 @@ void func_8012956C(void) {
extern u8 D_801BE9B8;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
D_801BD5A0[idx], D_801BD5A1[idx], D_801BD5A2[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801BE9B8;
s = base->f40;
temp_a3 = base->f38;
+9 -9
View File
@@ -2629,8 +2629,8 @@ extern s16 D_801BE9A2;
extern s16 D_801BE9AC;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801BE9A0;
s32 pv = param_1;
s16 *g = &D_801BE9A0;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801BE8A6;
v790 = D_801BE8A8;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801BE9D0 = 1;
D_801BE834 = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801BE87C[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801BE87C;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801A0D90 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801A0D90;
register volatile s32 *p __asm__("$4") = &D_801A0D90; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_801A0D70;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_8019F950[idx], D_8019F951[idx], D_8019F952[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801A0D70;
s = base->f40;
temp_a3 = base->f38;
+9 -9
View File
@@ -2629,8 +2629,8 @@ extern s16 D_801A0D5A;
extern s16 D_801A0D64;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801A0D58;
s32 pv = param_1;
s16 *g = &D_801A0D58;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801A0C56;
v790 = D_801A0C58;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801A0D88 = 1;
D_801A0BE4 = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801A0C2C[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801A0C2C;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801B9668 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801B9668;
register volatile s32 *p __asm__("$4") = &D_801B9668; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_801B9648;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_801B7CC8[idx], D_801B7CC9[idx], D_801B7CCA[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801B9648;
s = base->f40;
temp_a3 = base->f38;
+9 -9
View File
@@ -2629,8 +2629,8 @@ extern s16 D_801B9632;
extern s16 D_801B963C;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801B9630;
s32 pv = param_1;
s16 *g = &D_801B9630;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801B8FCE;
v790 = D_801B8FD0;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801B9660 = 1;
D_801B8F5C = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801B8FA4[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801B8FA4;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801EF3F8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801EF3F8;
register volatile s32 *p __asm__("$4") = &D_801EF3F8; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_801EF3C0;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_801ED348[idx], D_801ED349[idx], D_801ED34A[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801EF3C0;
s = base->f40;
temp_a3 = base->f38;
+40 -43
View File
@@ -2604,8 +2604,8 @@ extern s16 D_801EF3AA;
extern s16 D_801EF3B4;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801EF3A8;
s32 pv = param_1;
s16 *g = &D_801EF3A8;
switch (g[0]) {
case 0:
@@ -2753,8 +2753,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2899,8 +2899,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2924,7 +2924,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801EE64E;
v790 = D_801EE650;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801EF3F0 = 1;
D_801EE5DC = 0x1E;
D_80126990 = v794;
@@ -3187,8 +3187,8 @@ extern void (*D_801EE624[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801EE624;
@@ -3342,10 +3342,10 @@ extern s32 func_8012C750(s32 a0);
*/
void func_8017BF50(s32 a0)
{
register s32 s3 asm("$19");
register s16 *s0 asm("$16");
register s32 *s1 asm("$17");
register u8 *s2 asm("$18");
s32 s3;
s16 *s0;
register s32 *s1 asm("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
u8 *s2;
s16 s4;
Buf8017BF50 buf;
@@ -4058,11 +4058,11 @@ extern void func_8012C218(void *a0);
void func_8017DC50(arg0)
s32 arg0;
{
register s32 s0 __asm__("$16");
register s32 v0 __asm__("$2");
register s32 v1 __asm__("$3");
register s32 a0 __asm__("$4");
register s32 a1 __asm__("$5");
register s32 s0 __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 v0;
s32 v1;
register s32 a0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
register s32 a1 __asm__("$5"); // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
s0 = arg0;
v1 = func_8012CBCC(s0);
@@ -4107,7 +4107,7 @@ typedef struct { s16 vx, vy, vz, pad; } TmpVec_8017DCE4;
void func_8017DCE4(s32 a0)
{
register s32 pv __asm__("$16") = a0;
register s32 pv __asm__("$16") = a0; // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 s1;
s32 flags;
TmpVec_8017DCE4 tmp;
@@ -4819,7 +4819,7 @@ void func_8017EB98(s32 param_1)
MATRIX m1;
SVECTOR svec_in;
SVECTOR svec_out;
register s32 lim __asm__("$16");
s32 lim;
lim = *(u16 *)(param_1 + 0x9C);
@@ -4936,7 +4936,7 @@ void func_8017EDB8(void *a0) {
}
*(s16 *)((u8 *)s0 + 0x2) = (s16)v0;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
func_80187778((s32 *)s0, (s32)&D_801913D4);
v1p = *(void **)((u8 *)s0 + 0x68);
@@ -5127,7 +5127,7 @@ void func_8017F13C(void) {
void func_8017F1F0(s32 a0, s32 a1)
{
extern s32 D_801EEAEC[];
register s32 rv __asm__("$2");
register s32 rv __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 x = D_801EEAEC[0];
s32 y = a1;
s32 d;
@@ -5158,7 +5158,7 @@ void func_8017F1F0(s32 a0, s32 a1)
}
rv = 31;
done:
__asm__("" :: "r"(rv));
__asm__("" :: "r"(rv)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
}
@@ -5266,7 +5266,7 @@ void func_8017F368(u16 *a0, s32 a1)
extern u16 D_801915DE[][4];
extern u16 D_801915E0[][4];
extern u16 D_801915E2[][4];
register s32 zr __asm__("$0");
register s32 zr __asm__("$0"); // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
u16 pad0[16]; /* dead: locals begin at sp+0x30, va must land at sp+0x50 */
u16 va[16]; /* sp+0x50 — outer quad, 4 x SVECTOR */
@@ -5282,7 +5282,7 @@ void func_8017F368(u16 *a0, s32 a1)
s32 type2;
u16 *p1;
u16 *p2;
register u16 *dst __asm__("$4");
register u16 *dst __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
s32 i;
u8 *pk;
s32 j;
@@ -5483,8 +5483,8 @@ extern s32 rand(void);
void func_8017FA18(s32 param_1) {
s32 uVar1;
s32 iVar2;
register s32 iVar3 __asm__("$3");
register s32 iVar4 __asm__("$16");
register s32 iVar3 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
register s32 iVar4 __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
u32 uVar3;
uVar1 = *(u16 *)(param_1 + 0x34);
@@ -5551,7 +5551,6 @@ case2:
return;
case3:
__asm__ __volatile__("" ::: "memory");
iVar3 = *(s32 *)(param_1 + 0xe4);
iVar3 = iVar3 + *(s32 *)(param_1 + 0xe0);
*(s32 *)(param_1 + 0xdc) = *(s32 *)(param_1 + 0xdc) + iVar3;
@@ -5902,13 +5901,13 @@ void func_80180224(u8 *arg0)
extern u8 D_800D387C[];
extern u8 D_800D3888[];
register u8 *param_1 __asm__("$16"); /* $s0 */
register u8 *param_1 __asm__("$16"); /* $s0 */ // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 raw;
u32 buf[6];
param_1 = arg0;
{
register s32 s0 __asm__("$17"); /* $s1 -- scoped: dead after func_80128EA8 */
s32 s0; /* $s1 -- scoped: dead after func_80128EA8 */
s0 = ((s32 (*)(void))func_8012C194)();
if (s0 == 0) {
func_8012CAE4(param_1);
@@ -5937,8 +5936,8 @@ void func_80180224(u8 *arg0)
*(s32 *)(param_1 + 0x18) = 0;
func_8012B0B4((unsigned int *)buf, (raw & 0xFF00) >> 4, (raw & 0xFF) << 6);
{
register s32 full __asm__("$2");
register s32 low __asm__("$3");
s32 full;
s32 low;
full = *(s32 *)buf;
low = *(s16 *)buf;
*(s32 *)(param_1 + 0x48) = 0;
@@ -6386,7 +6385,6 @@ void func_80180BCC(void *arg0) {
s0 = (s32)arg0;
*(short *)((char *)arg0 + 0x2) = 3;
func_8012E88C((s32)arg0);
__asm__("" ::: "memory");
((void (*)(s32 *, s32))func_8012A828)((s32 *)s0, (s32)&D_801C3B38);
func_80187750((s32)s0);
func_80188A78((s32)s0, 0xC, 1);
@@ -6798,7 +6796,7 @@ void func_801813F0(void *arg0) {
extern s32 func_8018766C(s32 arg0, s32 arg1);
void func_80181458(s32 *arg0) {
register s32 *s0 asm("$16") = arg0;
s32 *s0 = arg0;
s32 v1;
*(s32 *)((u8 *)(*(s32 **)((u8 *)s0 + 0xCC)) + 0xB0) = 1;
if (func_8018766C(6, 0x12) != 0) {
@@ -6817,7 +6815,7 @@ extern short D_80191B3C;
extern void func_80187778(s32 *a0, s32 a1);
void func_801814C4(s32 *arg0) {
register s32 *s0 asm("$16") = arg0;
s32 *s0 = arg0;
s32 v0, v1;
*(s32 *)((u8 *)(*(s32 **)((u8 *)s0 + 0xCC)) + 0xB0) = 2;
v0 = func_8018766C(6, 0x12);
@@ -7440,7 +7438,7 @@ s32 func_80182058(void *a0)
* Without it gcc's find_cross_jump merges this `move v0,0; j epi`
* tail with the identical case-2 failure tail -> 58 ins instead of
* 60, and the case-2 `beq` then loses its delay-slot fill. */
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
return 0;
}
@@ -7668,7 +7666,6 @@ extern void func_80187994(s32 a0, s32 a1, s32 a2, s32 a3);
s0 = (s32)arg0;
*(s16*)((char *)arg0 + 0x2) = 2;
func_8012E88C((s32)arg0);
__asm__("" ::: "memory");
((void (*)(s32 *, s32))func_8012A828)((s32*)s0, (s32)&D_801C36E8);
func_80187750((s32)s0);
*(s16*)((char *)arg0 + 0x34) = 0;
@@ -8242,7 +8239,7 @@ s32 func_80182F3C(s32 a0) {
* global_alloc and lands in $a0 (costing a `move $v0,$a0` in each of the two
* delay slots the target leaves as `nop`). The pin restores the target's
* $v0 = pointer / $v1 = 0xA2 / $a0 = halfword assignment at zero byte cost. */
register s32 v __asm__("$2");
register s32 v __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 c;
/* +0x0 is a u16 object id; 0xA2 selects the 0xA4 partner lookup. */
@@ -8280,7 +8277,7 @@ s32 func_80182F3C(s32 a0) {
/* zero-byte re-tie (cookbook §189-C): without it cse folds
* `(raw & 0xFF) & 1` back onto the raw call result and emits
* `andi $v0,$v0,1`; the target reads the masked copy, `andi $v0,$a1,1`. */
__asm__("" : "=r"(c) : "0"(c));
__asm__("" : "=r"(c) : "0"(c)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
if (c != 0) {
result = (s32)&D_80191F80;
if ((c & 1) != 0) {
@@ -8315,7 +8312,7 @@ s32 func_80182F3C(s32 a0) {
break;
case 2:
c = func_800291B4(0xD9) & 0xFF;
__asm__("" : "=r"(c) : "0"(c));
__asm__("" : "=r"(c) : "0"(c)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
result = (s32)&D_80192190;
if ((c & 1) != 0) {
result = (s32)&D_801921E8;
@@ -8327,7 +8324,7 @@ s32 func_80182F3C(s32 a0) {
break;
default:
c = func_800291B4(0xD8) & 0xFF;
__asm__("" : "=r"(c) : "0"(c));
__asm__("" : "=r"(c) : "0"(c)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
result = (s32)&D_801920C8;
if ((c & 1) != 0) {
result = (s32)&D_80192120;
@@ -8540,7 +8537,7 @@ s32 func_801834C0(void *a0)
* Without it gcc's find_cross_jump merges this `move v0,0; j epi`
* tail with the identical case-2 failure tail -> 58 ins instead of
* 60, and the case-2 `beq` then loses its delay-slot fill. */
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
return 0;
}
@@ -9291,7 +9288,7 @@ extern void func_80172710(void);
s32 func_801843DC(param_1)
s32 param_1;
{
register s32 obj __asm__("$16") = param_1;
register s32 obj __asm__("$16") = param_1; // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 ptr;
s32 ptr2;
s32 result;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801CBAE0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801CBAE0;
register volatile s32 *p __asm__("$4") = &D_801CBAE0; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_801CBAA8;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_801CA3C8[idx], D_801CA3C9[idx], D_801CA3CA[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801CBAA8;
s = base->f40;
temp_a3 = base->f38;
+18 -18
View File
@@ -2627,8 +2627,8 @@ extern s16 D_801CBA92;
extern s16 D_801CBA9C;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801CBA90;
s32 pv = param_1;
s16 *g = &D_801CBA90;
switch (g[0]) {
case 0:
@@ -2776,8 +2776,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2922,8 +2922,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2947,7 +2947,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801CB6CE;
v790 = D_801CB6D0;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801CBAD8 = 1;
D_801CB65C = 0x1E;
D_80126990 = v794;
@@ -3213,8 +3213,8 @@ extern void (*D_801CB6A4[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801CB6A4;
@@ -3350,8 +3350,8 @@ void func_8017BF88(s32 a0) {
s32 s0;
s32 s2;
s32 s3;
register s32 v1 __asm__("$3");
register s32 v0 __asm__("$2");
register s32 v1 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
register s32 v0 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 rnd;
s32 scale;
@@ -3388,7 +3388,7 @@ void func_8017BF88(s32 a0) {
sp10[2] = scale;
ApplyMatrixSV(sp18, sp10, sp10);
{
register s32 c __asm__("$4");
register s32 c __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
s32 z;
c = *(u16 *)(a0 + 0x2);
*(s32 *)(a0 + 0x10) = sp10[0] << 8;
@@ -3483,10 +3483,10 @@ void func_8017C234(s32 a0)
{
extern u8 D_801CB700[];
register s32 s3 asm("$19");
register s16 *s0 asm("$16");
register s32 *s1 asm("$17");
register u8 *s2 asm("$18");
s32 s3;
s16 *s0;
register s32 *s1 asm("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
u8 *s2;
s16 s4;
Buf8017BF50_8017C234 buf;
@@ -3900,7 +3900,7 @@ void func_8017C9BC(s32 a0) {
permutation. */
raw = ((s32 (*)(s32))func_8012CBA4)(a0);
flags = raw;
__asm__ __volatile__("" : "=r"(flags) : "0"(flags));
__asm__ __volatile__("" : "=r"(flags) : "0"(flags)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
/* `m` blocks fold_truthop from merging the two bitfield tests below into a single
`andi $v1,$s1,0xe000` -- the target keeps `& 0x8000` and `& 0x6000` separate. */
@@ -4047,7 +4047,7 @@ void func_8017C9BC(s32 a0) {
copies vanish and everything from .L8017CD18 on drifts by 2 instructions. */
{
s32 fire = ret;
__asm__ __volatile__("" : "=r"(ret) : "0"(ret));
__asm__ __volatile__("" : "=r"(ret) : "0"(ret)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
if (fire != 0) {
func_80146A6C(2, (void *)s0, 0, 0, 0, 2, 0);
}
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_8018FB08 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_8018FB08;
register volatile s32 *p __asm__("$4") = &D_8018FB08; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_8018FAE8;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_8018E6D0[idx], D_8018E6D1[idx], D_8018E6D2[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_8018FAE8;
s = base->f40;
temp_a3 = base->f38;
+11 -11
View File
@@ -2629,8 +2629,8 @@ extern s16 D_8018FAD2;
extern s16 D_8018FADC;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_8018FAD0;
s32 pv = param_1;
s16 *g = &D_8018FAD0;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_8018F9D6;
v790 = D_8018F9D8;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_8018FB00 = 1;
D_8018F964 = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_8018F9AC[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_8018F9AC;
@@ -3337,8 +3337,8 @@ extern void func_80146E90(s32 *a0, s32 a1);
void func_8017BEF8(s32 param_1)
{
register s32 s0 __asm__("$16");
register s32 s1 __asm__("$17");
register s32 s0 __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
register s32 s1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
extern u8 D_80182CB0[];
s32 v0;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801F7848 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801F7848;
register volatile s32 *p __asm__("$4") = &D_801F7848; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_801F7828;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_801F6048[idx], D_801F6049[idx], D_801F604A[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801F7828;
s = base->f40;
temp_a3 = base->f38;
+87 -90
View File
@@ -2612,8 +2612,8 @@ void func_8017AE2C(s32 param_1) {
extern s16 D_801F7810;
extern s16 D_801F7812;
extern s16 D_801F781C;
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801F7810;
s32 pv = param_1;
s16 *g = &D_801F7810;
switch (g[0]) {
case 0:
@@ -2761,8 +2761,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2907,8 +2907,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2932,7 +2932,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801F734E;
v790 = D_801F7350;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801F7840 = 1;
D_801F72DC = 0x1E;
D_80126990 = v794;
@@ -3195,8 +3195,8 @@ extern void (*D_801F7324[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801F7324;
@@ -4551,7 +4551,7 @@ void func_8017E010(s32 a0) {
permutation. */
raw = ((s32 (*)(s32))func_8012CBA4)(a0);
flags = raw;
__asm__ __volatile__("" : "=r"(flags) : "0"(flags));
__asm__ __volatile__("" : "=r"(flags) : "0"(flags)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
/* `m` blocks fold_truthop from merging the two bitfield tests below into a single
`andi $v1,$s1,0xe000` -- the target keeps `& 0x8000` and `& 0x6000` separate. */
@@ -4698,7 +4698,7 @@ void func_8017E010(s32 a0) {
copies vanish and everything from .L8017CD18 on drifts by 2 instructions. */
{
s32 fire = ret;
__asm__ __volatile__("" : "=r"(ret) : "0"(ret));
__asm__ __volatile__("" : "=r"(ret) : "0"(ret)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
if (fire != 0) {
func_80146A6C(2, (void *)s0, 0, 0, 0, 2, 0);
}
@@ -4826,7 +4826,7 @@ extern void func_8012B0B4(unsigned int *param_1, int param_2, int param_3);
void func_8017E5C0(s32 a0, s16 a1, s16 a2) {
u32 buf[4];
register s32 hi __asm__("$2");
register s32 hi __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 lo;
func_8012B0B4(buf, *(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), a1 << 4);
@@ -4913,7 +4913,7 @@ void func_8017E710(s32 a0) {
u8 out[8];
Mtx8_8017DE10_8017E710 m;
s32 base;
register s32 ang __asm__("$2");
register s32 ang __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s16 arg;
*(s16 *)(in + 0) = *(u16 *)(a0 + 0x6) + *(u16 *)(a0 + 0x12);
@@ -5466,7 +5466,7 @@ void func_8017F2D0(s32 p) {
*(s16 *)(o + 0x18) = t1;
lim1 = **(s16 **)(p + 0x58);
lv1 = lim1;
__asm__("" : "=r"(lv1) : "0"(lv1));
__asm__("" : "=r"(lv1) : "0"(lv1)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
if (lim1 < t1) {
*(s16 *)(o + 0x1C) = lv1;
*(s16 *)(o + 0x18) = lv1;
@@ -5488,9 +5488,9 @@ void func_8017F394(void *a0) {
extern s32 func_80146E98(s32 a0);
extern void func_80162CCC(void);
register s32 s1 __asm__("$17") = (s32)a0;
register u16 *s2 __asm__("$18");
register u16 *s0 __asm__("$16");
s32 s1 = (s32)a0;
u16 *s2;
u16 *s0;
s2 = *(u16 **)(s1 + 0x4C);
s0 = *(u16 **)(s1 + 0x20);
@@ -6045,7 +6045,7 @@ void func_8017F510(s32 arg0, s32 arg1, s32 arg2)
if (tmpxy[2].vy > my) my = tmpxy[2].vy;
else if (tmpxy[2].vy < mny) mny = tmpxy[2].vy;
if (my >= -0x6E && mny < 0x6F) {
__asm__ __volatile__ ("" :: "r" (mny));
__asm__ __volatile__ ("" :: "r" (mny)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
if (g.sz0 > g.sz1) { za = g.sz0; if (za < g.sz2) za = g.sz2; }
else { za = g.sz1; if (za < g.sz2) za = g.sz2; }
g.opz = za;
@@ -6763,7 +6763,7 @@ extern s32 D_80190834;
void func_80181A14(void *a0)
{
register void *s0 __asm__("$16") = a0;
void *s0 = a0;
s32 v0;
s32 sp10[3];
@@ -7118,7 +7118,7 @@ void func_80182080(void *arg0)
q = &prim;
vz = 3;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
p = *(u16 **)a0;
dx = *(u16 *)(a0 + 0x12);
dy = *(u16 *)(a0 + 0x14);
@@ -7391,7 +7391,7 @@ extern s32 rand(void);
void func_801828B0(s32 a0) {
s32 obj;
s16 *tbl;
register s32 q __asm__("$16");
s32 q;
u32 buf[2];
s32 v;
@@ -7731,10 +7731,10 @@ extern u8 D_801AD31C[];
s32 func_80182F4C(s32 a0, s16 a1)
{
register u8 *base __asm__("$8");
u8 *base;
s16 val;
register u16 c0 __asm__("$11");
register u16 c1 __asm__("$7");
u16 c0;
u16 c1;
u16 outerIdx;
u16 innerIdx;
u16 diff;
@@ -7742,7 +7742,7 @@ s32 func_80182F4C(s32 a0, s16 a1)
u16 temp2;
u16 idx2;
u16 *tbl;
register s32 p1 __asm__("$4");
register s32 p1 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
s32 p2;
s32 p3;
u16 dx;
@@ -7851,7 +7851,7 @@ extern u8 D_80190F78[];
extern s32 D_80190D94;
void func_801831A8(s32 param_1) {
register s32 pv __asm__("$17") = param_1;
s32 pv = param_1;
switch (*(u16 *)(pv + 0x34)) {
case 0:
@@ -8215,7 +8215,7 @@ extern s32 func_80143970(s32 a0);
extern s32 D_801BFE40;
void func_80183A70(s32 a0) {
register s32 mask __asm__("$4");
register s32 mask __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
s32 p;
if (((s32 (*)(s32))func_8012BD14)(a0) <= 0x18FFF) {
@@ -8349,8 +8349,8 @@ extern s32 func_80184300(s32 a0);
void func_80183D18(void *a0) {
s32 s0 = (s32)a0;
s32 s1;
register s32 v1_addr asm("$3");
register u16 v0_val asm("$2");
s32 v1_addr;
register u16 v0_val asm("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
// Load pointer from offset 0x20 and modify value at offset 0x12
v1_addr = *(s32 *)(s0 + 0x20);
@@ -8533,9 +8533,9 @@ extern void func_801846D0(void *a0);
void func_80184034(s32 a0) {
if (*(s32 *)(a0 + 0x1C) < 0xC) {
register s32 mask __asm__("a0");
register s32 ptr __asm__("v0");
register s32 val __asm__("v1");
s32 mask;
s32 ptr;
s32 val;
mask = 0x80000000;
ptr = *(s32 *)(a0 + 0x20);
@@ -8779,9 +8779,9 @@ extern void func_800484EC(s32 a0, s32 a1, s32 a2);
void func_8018450C(s32 a0, s32 a1) {
typedef struct { s32 m[8]; } Mtx8_8017DE10_8017E710;
extern Mtx8_8017DE10_8017E710 D_800AE620;
register s32 obj __asm__("$18");
register s32 cur __asm__("$17");
register s32 r2 __asm__("$2");
s32 obj;
s32 cur;
s32 r2;
s32 flag;
u8 *base;
s32 vec[3];
@@ -8875,8 +8875,8 @@ void func_801846D0(void *a0) {
}
{
register u16 t88 __asm__("$2") = *(u16 *)(s0 + 0x88);
register u16 t8A __asm__("$3") = *(u16 *)(s0 + 0x8A);
register u16 t88 __asm__("$2") = *(u16 *)(s0 + 0x88); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
register u16 t8A __asm__("$3") = *(u16 *)(s0 + 0x8A); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
*(s16 *)(s0 + 0xDE) = 0;
*(s16 *)(s0 + 0xAA) = 0;
*(u16 *)(s0 + 0xE) = *(u16 *)(s0 + 0x8C);
@@ -9001,7 +9001,7 @@ void func_801849A0(s32 a0)
{
s32 t;
s32 u;
register s32 p __asm__("$3");
register s32 p __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
if (*(s16 *)(a0 + 0x102) == 0) {
if (func_8012E778(a0, 0x64008C) == 0) {
@@ -9160,13 +9160,13 @@ extern void func_8012B178(s32 a0, s32 a1);
void func_80184CE8(s32 a0)
{
register s32 s0 __asm__("$16");
register s32 v1 __asm__("$3");
s32 s0;
register s32 v1 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
s32 v0;
u16 *p;
s0 = a0;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
v0 = func_8012B8E4(s0, 8);
p = *(u16 **)(s0 + 0x20);
p[9] = p[9] + (u16)v0;
@@ -9338,7 +9338,7 @@ extern u8 D_800D3918[];
extern void func_8012B178(s32 a0, s32 a1);
void func_80185030(s32 s0) {
register s32 v0 __asm__("$2");
s32 v0;
s32 v1;
v0 = func_8012B8E4(s0, 8);
@@ -9473,7 +9473,6 @@ void func_801852C8(void *a0)
a1 = *(s32 *)((s32)a0 + 0x20);
v1 = *(u16 *)(a1 + 0x2C);
__asm__ __volatile__("" : : "r"(v1));
if (v1 & 0x10) {
*(u16 *)(a1 + 0x2C) = v1 & 0xFFEF;
b = *(s32 *)((s32)a0 + 0x20);
@@ -9720,11 +9719,11 @@ extern s32 func_8012C658(s32 arg0, s32 arg1, s32 arg2);
extern s32 rand(void);
void func_801856A0(s32 a0) {
register s32 obj __asm__("$19");
s32 obj;
s32 i;
register s32 t4 __asm__("$20");
register s32 tmp __asm__("$16");
register s32 q1 __asm__("$7");
s32 t4;
register s32 tmp __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 q1;
unsigned int *pbuf;
s32 r1, r2, r4;
s32 ang1, dist;
@@ -9770,7 +9769,7 @@ void func_801856A0(s32 a0) {
pos[1] = t1;
{
register s32 hi4 __asm__("$3");
s32 hi4;
hi4 = t4 >> 16;
pos[2] = *(u16 *)(obj + 0xE) + hi4;
}
@@ -9856,11 +9855,11 @@ extern u8 *func_801290DC(s32 a0, u8 *a1);
extern void func_8001CD50(s32 a0, s32 a1);
u8 * func_8018594C(s32 a0, s32 a1, s32 a2) {
register s32 s0 __asm__("$16") = a2;
register s32 s2 __asm__("$18") = a0;
s32 s0 = a2;
register s32 s2 __asm__("$18") = a0; // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus7)
u8 *s1;
u8 *ret;
register s32 v1 __asm__("$3");
register s32 v1 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
s1 = func_801290DC(0x17, (u8 *)a1);
@@ -9872,7 +9871,7 @@ u8 * func_8018594C(s32 a0, s32 a1, s32 a2) {
func_8001CD50(s0, (s32)(&((u8 *)D_801C5988)[a2 << 6]));
__asm__ volatile("move %0, %1" : "=r"(ret) : "r"(s1));
__asm__ volatile("move %0, %1" : "=r"(ret) : "r"(s1)); // !FAKE: instruction move — NEEDED DIFFERS (P36 rung B tus7)
v1 = 0xC00;
*(u16 *)((char *)s0 + 0x1E) = v1;
@@ -10068,11 +10067,11 @@ s32 func_80185BD4(s32 a0, s32 a1) {
func_8012B0B4((unsigned int *)buf, ang, 0x41);
{
register s32 t1 __asm__("$2") = *(s32 *)(p + 4);
register s32 v1 __asm__("$3") = buf[0];
register s32 t2 __asm__("$2");
register s32 t3 __asm__("$4");
register s32 t4 __asm__("$2");
s32 t1 = *(s32 *)(p + 4);
s32 v1 = buf[0];
register s32 t2 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 t3;
register s32 t4 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
*(s32 *)(a0 + 4) = t1;
@@ -10563,10 +10562,9 @@ void func_80186624(void *a0)
{
s32 buf[8];
u16 out[4];
register s32 zr __asm__("$0");
register s32 v0 __asm__("$4");
s32 v0;
v0 = ((s32 (*)(void))func_8012C1B8)() + zr;
v0 = ((s32 (*)(void))func_8012C1B8)() + 0;
*(s32 *)((s32)a0 + 0x20) = v0;
if (v0 == 0) {
func_8012CAE4(a0);
@@ -10754,7 +10752,7 @@ void func_801869CC(void *a0)
s32 *zb;
SVec8_8018E8A0_801869CC *src;
SVec8_8018E8A0_801869CC *dst;
register s32 d __asm__("$4");
register s32 d __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
s32 i, j, k, base, ang, t;
u32 col;
@@ -10773,7 +10771,7 @@ void func_801869CC(void *a0)
p = (s32 *)((s32)a0 + 0xCC);
for (i = 0, k = 0; i < ((Cnt_8018E8A0_801869CC *)a0)->f[0x84]; i++, k++, p += 3) {
zb = (s32 *)((s32)a0 + 0xD4);
{ register s32 c1 __asm__("$2"); register s32 c2 __asm__("$3");
{ register s32 c1 __asm__("$2"); register s32 c2 __asm__("$3"); // !FAKE: pin $2 — NEEDED DIFFERS; pin $3 — NEEDED DIFFERS (P36 rung B tus7)
c1 = *(s32 *)((s32)a0 + 0x1C); c2 = i * 4; d = c1 - c2; }
if (d > 0x40) {
if (i == 4) {
@@ -11429,7 +11427,7 @@ void func_801877D8(void *a0) {
LATER function in this TU, which blocks a byte-true decl of a different type.
Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
extern s32 D_801C9F04[];
register u8 *s0 __asm__("$16") = (u8 *)a0;
register u8 *s0 __asm__("$16") = (u8 *)a0; // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 v1;
*(s16 *)(s0 + 0x2) = 4;
@@ -11489,7 +11487,7 @@ void func_801879C4(void *a0) {
extern s32 D_801F7730;
extern s32 D_801C9F04[];
extern s32 D_801CAE68;
register u8 *s0 __asm__("$16") = (u8 *)a0;
register u8 *s0 __asm__("$16") = (u8 *)a0; // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 v0;
s32 *ptr;
@@ -12248,12 +12246,11 @@ extern void func_8012B23C(s32 a0);
extern void func_80132288(s32 *param_1, s32 *param_2, s32 param_3);
void func_80188978(s32 a0, s32 a1, s32 a2) {
register s32 s1 __asm__("$17") = a0;
register s32 s0 __asm__("$16");
register s32 s2 __asm__("$18") = a2;
s32 s1 = a0;
s32 s0;
s32 s2 = a2;
s32 p;
__asm__("" :: "r"(s1));
s0 = a1;
func_8012B23C(s1);
@@ -12329,10 +12326,10 @@ void func_80188AF4(s32 a0, s32 a1) {
pos[2] = *(s32 *)(a0 + 0xC) + out.vz;
{
register u16 rix __asm__("$2");
register u16 roy __asm__("$3");
register u16 roz __asm__("$7");
register u16 riz __asm__("$8");
u16 rix;
u16 roy;
u16 roz;
u16 riz;
rix = *(u16 *)(a0 + 0x3A);
roy = *((u16 *)&pos[1] + 1);
@@ -12577,7 +12574,7 @@ extern void func_8012B178(s32 a0, s32 a1);
extern s32 func_80189E88(s32 a0);
void func_801890C4(s32 s0) {
register s32 v0 __asm__("$2");
register s32 v0 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 v1;
v0 = func_8012BDBC(s0, 0x400);
@@ -12854,8 +12851,8 @@ void func_8018960C(s32 a0) {
void func_801896EC(s32 param_1) {
register s32 self __asm__("a1");
register s32 mask __asm__("a0");
register s32 self __asm__("a1"); // !FAKE: pin a1 — NEEDED DIFFERS (P36 rung B tus7)
register s32 mask __asm__("a0"); // !FAKE: pin a0 — NEEDED DIFFERS (P36 rung B tus7)
s32 t;
s32 q;
@@ -12879,7 +12876,7 @@ void func_801896EC(s32 param_1) {
p = *(s32 *)(self + 0x20);
g = *(s32 *)(self + 0xDC);
p = *(u16 *)(p + 0x18);
__asm__ __volatile__("" : : "r"(p), "r"(p), "r"(p));
__asm__ __volatile__("" : : "r"(p), "r"(p), "r"(p)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
g |= 0x80;
*(s32 *)(self + 0xDC) = g;
*(u16 *)(self + 0x104) = p;
@@ -13039,9 +13036,9 @@ extern void func_8018A05C(s32 a0);
void func_8018993C(s32 a0) {
if (*(s32 *)(a0 + 0x1C) < 0x11) {
register s32 mask __asm__("a0");
register s32 ptr __asm__("v0");
register s32 val __asm__("v1");
s32 mask;
s32 ptr;
s32 val;
mask = 0x80000000;
ptr = *(s32 *)(a0 + 0x20);
@@ -13110,8 +13107,8 @@ extern void func_8018A05C(s32 a0);
void func_80189A84(s32 a0)
{
register s32 v0 __asm__("$2");
register s32 v1 __asm__("$3");
register s32 v0 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
register s32 v1 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
v0 = *(s32 *)(a0 + 0xDC);
if ((v0 & 0x2) != 0) {
@@ -13148,7 +13145,7 @@ extern void func_8002D4C8(s32 a0, s32 a1);
void func_80189B3C(s32 a0) {
s32 i;
register s32 q __asm__("$16");
s32 q;
s32 r3;
u32 buf[2];
s32 v;
@@ -13509,7 +13506,7 @@ void func_8018A3D4(s32 param_1) {
*(s16 *)(param_1 + 0xFC) =
func_8012B744((void *)(param_1 + 0x4), (void *)(param_1 + 0x88));
} else {
register s32 t __asm__("$2") = rand() & 0x3FF;
s32 t = rand() & 0x3FF;
s32 v1 = t - 0x200;
if (v1 < 0) {
@@ -13615,7 +13612,7 @@ extern void func_8002AC00(s32 arg0);
extern void func_8012C098(void);
void func_8018A624(s32 arg0) {
register u8 val __asm__("$3");
u8 val;
/* Check field at +0x100 */
if (((s16 *)arg0)[0x80] == 0) {
@@ -13730,7 +13727,7 @@ s32 func_80188250_body(s32 a0) {
*(u16 *)(a0 + 6) = v18[0];
*(u16 *)(a0 + 0xA) = v18[1];
*(u16 *)(a0 + 0xE) = v18[2];
__asm__ __volatile__("" ::: "memory"); /* zero-byte cross-jump barrier (§5a) */
__asm__ __volatile__("" ::: "memory"); /* zero-byte cross-jump barrier (§5a) */ // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
return 1;
}
}
@@ -13751,7 +13748,7 @@ extern s32 D_801D7F38[];
void func_8018A86C(s32 arg0) {
void (*handler)(s32);
register u8 val __asm__("$3");
u8 val;
/* Load dispatch function from table indexed by field at +0x2 */
handler = (void (*)(s32))D_801D7F38[((u16 *)arg0)[1]];
@@ -14100,7 +14097,7 @@ extern s32 func_8012BEE8(s32 a0);
extern void func_80131E00();
void func_8018AF88(s32 param_1) {
register s32 a __asm__("$4");
register s32 a __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
s32 p;
s32 q;
s32 x;
@@ -14393,8 +14390,8 @@ void func_8018B4A4(s32 arg0) {
extern s32 func_8012BCCC(s32 a0);
void func_8018B5E0(s32 a0) {
register s32 result __asm__("$2");
register s32 threshold __asm__("$3");
s32 result;
s32 threshold;
if (*(s16 *)(a0 + 0x70) & 0x8000) {
result = func_8012BCCC(a0);
@@ -14465,7 +14462,7 @@ extern void func_8012A828(s32 a0, void *a1);
extern void func_8012CAE4(void *a0);
void func_8018B740(s32 s0) {
register s32 v1 __asm__("$3");
s32 v1;
s32 v0;
s32 a1v;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801EB258 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801EB258;
register volatile s32 *p __asm__("$4") = &D_801EB258; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_801EB238;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_801E89A0[idx], D_801E89A1[idx], D_801E89A2[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801EB238;
s = base->f40;
temp_a3 = base->f38;
+29 -31
View File
@@ -2626,8 +2626,8 @@ extern s16 D_801EB222;
extern s16 D_801EB22C;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801EB220;
s32 pv = param_1;
s16 *g = &D_801EB220;
switch (g[0]) {
case 0:
@@ -2772,8 +2772,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2918,8 +2918,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2943,7 +2943,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801E9CA6;
v790 = D_801E9CA8;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801EB250 = 1;
D_801E9C34 = 0x1E;
D_80126990 = v794;
@@ -3203,8 +3203,8 @@ extern void (*D_801E9C7C[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801E9C7C;
@@ -4322,8 +4322,8 @@ extern s16 D_801274EC;
void func_8017DE40(s32 param_1)
{
register s32 p1 __asm__("$17");
register s16 *p0 __asm__("$16");
s32 p1;
s16 *p0;
MTX_8017DE40 m1;
SV4_8017DE40 svec_in;
s16 vec[3];
@@ -4533,8 +4533,8 @@ extern s32 func_8017EA04(s32);
void func_8017E3C0(void *a0) {
s32 s0 = (s32)a0;
register s32 v1_addr asm("$3");
register u16 v0_val asm("$2");
s32 v1_addr;
u16 v0_val;
v1_addr = *(s32 *)(s0 + 0x20);
v0_val = *(u16 *)(v1_addr + 0x12);
@@ -4807,7 +4807,7 @@ typedef struct { s16 vx, vy, vz, pad; } SVEC_E83C;
s32 func_8017E83C(s32 arg0) {
extern u8 D_801202A0[];
register s32 ret __asm__("$23");
register s32 ret __asm__("$23"); // !FAKE: pin $23 — NEEDED DIFFERS (P36 rung B tus7)
s32 v;
u8 *p;
s32 i;
@@ -5006,9 +5006,9 @@ void func_8017EC90(a0, a1)
s32 a0;
s32 a1;
{
register s32 a0v __asm__("$4");
register s32 a1v __asm__("$5");
register s32 p __asm__("$18");
register s32 a0v __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
register s32 a1v __asm__("$5"); // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
register s32 p __asm__("$18"); // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus7)
s32 vec[3];
MTX_8017EA48 m;
s32 d;
@@ -5324,12 +5324,12 @@ extern void func_80180388(s32);
extern u8 D_800D3918[];
void func_8017F37C(s32 a0) {
register s32 s0 __asm__("$16");
register s32 s0 __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 v0;
s32 v1;
s0 = a0;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
v0 = func_8018033C(s0, 8);
v1 = *(s32 *)(s0 + 0x20);
*(u16 *)(v1 + 0x12) = *(u16 *)(v1 + 0x12) + v0;
@@ -5476,7 +5476,7 @@ extern void func_80180388(s32);
extern u8 D_800D3918[];
void func_8017F6A8(s32 param_1) {
register s32 v0 __asm__("$2");
s32 v0;
s32 v1;
v0 = func_8018033C(param_1, 8);
@@ -5526,12 +5526,11 @@ extern void func_8017FC6C(s32 a0);
extern s32 func_8012BEE8(s32 a0);
void func_8017F794(s32 a0) {
register s32 s0 __asm__("$16");
register s32 s0 __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s32 v0;
s32 v1;
s0 = a0;
__asm__ __volatile__("");
if (*(s32 *)(s0 + 0x1C) > 0x15) {
v0 = func_8018033C(s0, 8);
v1 = *(s32 *)(s0 + 0x20);
@@ -5800,11 +5799,11 @@ extern u8 *func_801290DC(s32 a0, u8 *a1);
extern void func_8001CD50(s32 a0, s32 a1);
u8 * func_8017FD6C(s32 a0, s32 a1, s32 a2) {
register s32 s0 __asm__("$16") = a2;
register s32 s2 __asm__("$18") = a0;
s32 s0 = a2;
register s32 s2 __asm__("$18") = a0; // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus7)
u8 *s1;
u8 *ret;
register s32 v1 __asm__("$3");
register s32 v1 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
s1 = func_801290DC(0x1d, (u8 *)a1);
@@ -5816,7 +5815,7 @@ u8 * func_8017FD6C(s32 a0, s32 a1, s32 a2) {
func_8001CD50(s0, (s32)(&((u8 *)D_8018BD88)[a2 << 6]));
__asm__ volatile("move %0, %1" : "=r"(ret) : "r"(s1));
__asm__ volatile("move %0, %1" : "=r"(ret) : "r"(s1)); // !FAKE: instruction move — NEEDED DIFFERS (P36 rung B tus7)
v1 = 0xC00;
*(u16 *)((char *)s0 + 0x1E) = v1;
@@ -6206,7 +6205,7 @@ extern u8 D_8018BF60[];
void func_80180598(void *a0)
{
register s32 s0 __asm__("$16") = (s32)a0;
register s32 s0 __asm__("$16") = (s32)a0; // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
s16 v1;
u16 v0;
s16 vec[3];
@@ -6306,7 +6305,7 @@ s32 func_801806B8(s32 a0, s32 a1, s32 a2, s32 a3)
func_8012F568(1, 0x5001, 0, 0, (s32)pointA, (s32)diff);
{
register s32 node __asm__("$2");
register s32 node __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
node = *(s32 *)(s0 + 0x20);
node = *(u16 *)(node + 0x12);
D_80126B9A = node;
@@ -6322,7 +6321,7 @@ s32 func_801806B8(s32 a0, s32 a1, s32 a2, s32 a3)
*(u16 *)(D_801270C8[0] + 0x5C) |= 1;
*(s16 *)(D_801270C8[0] + 0x5E) = 0x1E;
{
register s32 node __asm__("$2");
register s32 node __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
node = *(s32 *)(s0 + 0x20);
node = *(u16 *)(node + 0x12);
*(u16 *)(D_801270C8[0] + 0x62) = node;
@@ -7071,9 +7070,8 @@ void func_8018178C(s32 a0)
case 2:
if (func_8012CBCC(a0) != 0) {
*(s16 *)(a0 + 0x98) = 1;
__asm__ __volatile__("" ::: "memory");
{
register s32 t __asm__("$2");
register s32 t __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
t = *(u16 *)(a0 + 0x76) - 0xA;
*(u16 *)(a0 + 0x5C) = 0x8810;
*(s16 *)(a0 + 0x76) = t;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801A0160 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801A0160;
register volatile s32 *p __asm__("$4") = &D_801A0160; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_801A0140;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_8019EC00[idx], D_8019EC01[idx], D_8019EC02[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801A0140;
s = base->f40;
temp_a3 = base->f38;
+9 -9
View File
@@ -2629,8 +2629,8 @@ extern s16 D_801A012A;
extern s16 D_801A0134;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801A0128;
s32 pv = param_1;
s16 *g = &D_801A0128;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_8019FF06;
v790 = D_8019FF08;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801A0158 = 1;
D_8019FE94 = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_8019FEDC[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_8019FEDC;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801A2390 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801A2390;
register volatile s32 *p __asm__("$4") = &D_801A2390; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_801A2370;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_801A0E98[idx], D_801A0E99[idx], D_801A0E9A[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801A2370;
s = base->f40;
temp_a3 = base->f38;
+9 -9
View File
@@ -2629,8 +2629,8 @@ extern s16 D_801A235A;
extern s16 D_801A2364;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801A2358;
s32 pv = param_1;
s16 *g = &D_801A2358;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801A219E;
v790 = D_801A21A0;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801A2388 = 1;
D_801A212C = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801A2174[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801A2174;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801950F0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801950F0;
register volatile s32 *p __asm__("$4") = &D_801950F0; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_801950D0;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_80193CB8[idx], D_80193CB9[idx], D_80193CBA[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801950D0;
s = base->f40;
temp_a3 = base->f38;
+9 -9
View File
@@ -2629,8 +2629,8 @@ extern s16 D_801950BA;
extern s16 D_801950C4;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801950B8;
s32 pv = param_1;
s16 *g = &D_801950B8;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_80194FBE;
v790 = D_80194FC0;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801950E8 = 1;
D_80194F4C = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_80194F94[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_80194F94;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801AD4E8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801AD4E8;
register volatile s32 *p __asm__("$4") = &D_801AD4E8; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_801AD4C8;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_801ABF88[idx], D_801ABF89[idx], D_801ABF8A[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801AD4C8;
s = base->f40;
temp_a3 = base->f38;
+9 -9
View File
@@ -2629,8 +2629,8 @@ extern s16 D_801AD4B2;
extern s16 D_801AD4BC;
void func_8017AE2C(s32 param_1) {
register s32 pv __asm__("$16") = param_1;
register s16 *g __asm__("$17") = &D_801AD4B0;
s32 pv = param_1;
s16 *g = &D_801AD4B0;
switch (g[0]) {
case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
*(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
} else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
u8 buf[16];
if (((u32)param_2) >= 0xB) {
register u8 *src __asm__("$16");
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
__asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
*(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
*(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
} else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
v78C = *p78C;
v78E = D_801AD28E;
v790 = D_801AD290;
__asm__ __volatile__("");
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
D_801AD4E0 = 1;
D_801AD21C = 0x1E;
D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801AD264[10])(int);
void func_8017BC38(int param_1)
{
register int i __asm__("$17");
register void (**p)(int) __asm__("$16");
int i;
void (**p)(int);
i = 0;
p = D_801AD264;
+10 -11
View File
@@ -219,7 +219,7 @@ void func_801287B8(void) {
{
/* D_801EAFD0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
* lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
register volatile s32 *p __asm__("$4") = &D_801EAFD0;
register volatile s32 *p __asm__("$4") = &D_801EAFD0; // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
if (*p == 0) {
func_8013BC7C();
}
@@ -493,17 +493,17 @@ void func_8012956C(void) {
extern u8 D_801EAFB0;
extern u8 D_800AF630[];
extern u8 D_800A6518[];
register s32 *sp10 __asm__("$21");
register u8 *afbase __asm__("$22");
register s32 *sp0 __asm__("$23");
s32 *sp10;
u8 *afbase;
s32 *sp0;
Ent_956C *base;
s32 i;
s16 a1;
register u32 temp_a3 __asm__("$7");
register u32 arg0 __asm__("$4");
register u32 s __asm__("$2");
register u32 s2 __asm__("$3");
register u32 t6 __asm__("$8");
register u32 temp_a3 __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
register u32 arg0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
u32 s;
register u32 s2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
u32 t6;
s32 code;
sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
return;
}
base = (Ent_956C *)&D_800B9A78;
__asm__("" : "=r"(base) : "0"(base));
i = 0;
do {
s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
D_801E9508[idx], D_801E9509[idx], D_801E950A[idx]);
goto next;
do_default:
__asm__("");
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
arg0 = D_801EAFB0;
s = base->f40;
temp_a3 = base->f38;

Some files were not shown because too many files have changed in this diff Show More