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phase-36: S104 s104_e26 — func_8017F438 banked at 0 through the whole-object gate + propagated — 4 levers + pad → 0: bit 31 tested with & 0x80000000 (reorg.c:2799, :1335-1420; combine.c:10831-10845)

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Drew T
2026-09-11 03:58:51 -06:00
parent 195dee8a0c
commit 36a5bc3242
3 changed files with 194 additions and 202 deletions
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src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c
+10 -19
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@@ -5506,12 +5506,9 @@ extern void func_8002D4C8(s32 a0, s32 a1);
void func_8017F438(s32 param_1) {
u8 *s0 = (u8 *)param_1;
s32 pad_[4];
s32 t1;
s32 t2;
s32 p;
s32 q;
u32 uVar1;
t1 = *(s16 *)(s0 + 6);
t2 = *(s16 *)(s0 + 0xA);
@@ -5523,6 +5520,10 @@ void func_8017F438(s32 param_1) {
func_8002D4C8(0xB32, 0);
if (*(u16 *)s0 != 0) {
/* Copy the model's position/rotation into both attached objects and mirror the model's bit 31 into theirs.
* The bit is TESTED with the mask (not `< 0`): the mask register is loaded before the branch, cse reuses it
* for the `|=` (so the store's constant sits in the branch delay slot), and combine's sign test leaves a
* `(use)` of the dead AND result that reload gives a stack slot — the frame's 16 bytes (P36 S104 e26). */
p = *(s32 *)(s0 + 0xCC);
*(u16 *)(p + 0x8) = *(u16 *)(s0 + 0x6);
*(u16 *)(p + 0xA) = *(u16 *)(s0 + 0xA);
@@ -5530,16 +5531,11 @@ void func_8017F438(s32 param_1) {
*(u16 *)(p + 0x10) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x10);
*(u16 *)(p + 0x12) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x12) + *(u16 *)(s0 + 0xFC);
*(u16 *)(p + 0x14) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x14);
q = *(s32 *)(s0 + 0x20);
if (*(s32 *)(q + 4) < 0) {
register u32 val __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
val = *(u32 *)(p + 4);
uVar1 = val | 0x80000000;
if (*(u32 *)(*(s32 *)(s0 + 0x20) + 4) & 0x80000000) {
*(u32 *)(p + 4) |= 0x80000000;
} else {
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
uVar1 = *(u32 *)(p + 4) & 0x7FFFFFFF;
*(u32 *)(p + 4) &= 0x7FFFFFFF;
}
*(u32 *)(p + 4) = uVar1;
p = *(s32 *)(s0 + 0xD0);
*(u16 *)(p + 0x8) = *(u16 *)(s0 + 0x6);
@@ -5548,16 +5544,11 @@ void func_8017F438(s32 param_1) {
*(u16 *)(p + 0x10) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x10);
*(u16 *)(p + 0x12) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x12) + *(u16 *)(s0 + 0xFE);
*(u16 *)(p + 0x14) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x14);
q = *(s32 *)(s0 + 0x20);
if (*(s32 *)(q + 4) < 0) {
register u32 val __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
val = *(u32 *)(p + 4);
uVar1 = val | 0x80000000;
if (*(u32 *)(*(s32 *)(s0 + 0x20) + 4) & 0x80000000) {
*(u32 *)(p + 4) |= 0x80000000;
} else {
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
uVar1 = *(u32 *)(p + 4) & 0x7FFFFFFF;
*(u32 *)(p + 4) &= 0x7FFFFFFF;
}
*(u32 *)(p + 4) = uVar1;
}
}