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phase-36: S104 e31–e34 packs (800_b_2, ov_SC03_105, ov_SC04_015, resident)

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This commit is contained in:
Drew T
2026-09-11 04:13:32 -06:00
parent edd427861b
commit 3861dcbc30
123 changed files with 7515 additions and 97 deletions
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.run/P36/agents/ORDER.tsv
+16 -4
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@@ -1,5 +1,17 @@
rank fn alias copies best needed kinds regs tu
295 func_8018C14C ov_SC04_011 1 5 2 barrier,pin $0 src/ov_SC04_011/ov_SC04_011_jr_8017D494.c
286 func_8018BAC4 ov_SC04_011 1 9 2 pin $3 src/ov_SC04_011/ov_SC04_011_jr_8017D494.c
110 func_801836D4 ov_SC04_011 1 12 2 pin $2,$3 src/ov_SC04_011/ov_SC04_011_jr_8017D494.c
73 func_80180B24 ov_SC04_011 1 14 3 launder src/ov_SC04_011/ov_SC04_011_jr_8017D494.c
1 func_800D1984 resident 1 1 1 pin $0 src/resident/resident_jr_800D128C.c
17 func_800D1B80 resident 1 1 1 pin $0 src/resident/resident_jr_800D128C.c
25 func_80183DA0 ov_SC03_105 1 1 2 launder,pin $17 src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
4 func_800D1658 resident 1 4 3 pin $16,$2,$3 src/resident/resident_jr_800D128C.c
72 func_8017E830 ov_SC04_015 1 5 1 barrier src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
109 func_800335B8 main 1 7 2 launder src/800_b_2.c
102 func_80032A74 main 1 11 3 barrier,pin $2 src/800_b_2.c
3 func_80181C84 ov_SC03_105 1 13 2 pin $18,$3 src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
69 func_8017E2CC ov_SC04_015 1 13 2 pin $2,$3 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
3 func_800D128C resident 1 15 3 barrier,launder src/resident/resident_jr_800D128C.c
13 func_801834A4 ov_SC03_105 1 21 3 launder,pin $2 src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
105 func_8003324C main 1 22 2 keepalive,pin $16 src/800_b_2.c
79 func_8017EE80 ov_SC04_015 1 23 1 pin $18 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
75 func_8002FF0C main 1 23 3 barrier src/800_b_2.c
81 func_8017F0EC ov_SC04_015 1 56 1 launder src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
16 func_8018574C ov_SC03_105 1 None 1 pin $16 src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
1 rank fn alias copies best needed kinds regs tu
2 295 1 func_8018C14C func_800D1984 ov_SC04_011 resident 1 5 1 2 1 barrier,pin pin $0 src/ov_SC04_011/ov_SC04_011_jr_8017D494.c src/resident/resident_jr_800D128C.c
3 286 17 func_8018BAC4 func_800D1B80 ov_SC04_011 resident 1 9 1 2 1 pin $3 $0 src/ov_SC04_011/ov_SC04_011_jr_8017D494.c src/resident/resident_jr_800D128C.c
4 110 25 func_801836D4 func_80183DA0 ov_SC04_011 ov_SC03_105 1 12 1 2 pin launder,pin $2,$3 $17 src/ov_SC04_011/ov_SC04_011_jr_8017D494.c src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
5 73 4 func_80180B24 func_800D1658 ov_SC04_011 resident 1 14 4 3 launder pin $16,$2,$3 src/ov_SC04_011/ov_SC04_011_jr_8017D494.c src/resident/resident_jr_800D128C.c
6 72 func_8017E830 ov_SC04_015 1 5 1 barrier src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
7 109 func_800335B8 main 1 7 2 launder src/800_b_2.c
8 102 func_80032A74 main 1 11 3 barrier,pin $2 src/800_b_2.c
9 3 func_80181C84 ov_SC03_105 1 13 2 pin $18,$3 src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
10 69 func_8017E2CC ov_SC04_015 1 13 2 pin $2,$3 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
11 3 func_800D128C resident 1 15 3 barrier,launder src/resident/resident_jr_800D128C.c
12 13 func_801834A4 ov_SC03_105 1 21 3 launder,pin $2 src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
13 105 func_8003324C main 1 22 2 keepalive,pin $16 src/800_b_2.c
14 79 func_8017EE80 ov_SC04_015 1 23 1 pin $18 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
15 75 func_8002FF0C main 1 23 3 barrier src/800_b_2.c
16 81 func_8017F0EC ov_SC04_015 1 56 1 launder src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
17 16 func_8018574C ov_SC03_105 1 None 1 pin $16 src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
.run/P36/agents/main__func_8002FF0C/body_free.c
+73
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@@ -0,0 +1,73 @@
s32 func_8002FF0C(s32 a0, s32 a1) {
/* block scope: src/800_b.c declares this symbol `extern s16 D_800A46D2[]`
* further down the TU, and the ARRAY spelling materialises the address into
* a register (`la`) for both the store and the re-read -- the target keeps
* two independent %hi/%lo accesses, which only the scalar spelling emits. */
extern s16 D_800A46D2;
s32 b;
s32 i;
s32 idx24;
s32 j12;
s32 v1;
s16 t;
s16 r;
s16 *q;
u8 *w;
u8 *base;
s32 res;
if (D_800A46CC == 0) {
b = D_80064D49[a0].unk00;
i = b * 24;
v1 = *(s16 *)((u8 *)D_800A4644 + i);
if (v1 != 0 && v1 != D_80064D4A[a0 * 12]) {
t = *(s16 *)((u8 *)D_800A4648 + i);
*(s16 *)((u8 *)D_800C532A + t * 4) = -1;
*(s16 *)((u8 *)D_800A4644 + i) = 0;
*(s16 *)((u8 *)D_800A4648 + i) = 0;
}
idx24 = (b * 3) << 3;
if (D_800A4650[idx24] == 0) {
t = *(s16 *)((u8 *)D_800A4640 + idx24);
*(s16 *)((u8 *)D_800C5328 + t * 4) = -1;
func_80031A98();
}
q = D_800A46CE;
j12 = a0 * 12;
*q = b;
*(s16 *)((u8 *)D_800A4640 + idx24) = a0;
D_800A46D0 = a0;
D_800A46BC = a1;
*(s32 *)((u8 *)D_800A464C + idx24) = a1;
if (D_80064D4E[j12] != 0) {
D_800A4EF6 = D_80064D4E[j12];
}
r = func_80041A80(a1, -1, *(s32 *)((u8 *)D_800A463C + idx24));
D_800A46D2 = r;
base = (u8 *)q - 0x96;
w = idx24 + base;
*(s16 *)(w + 0xA) = r;
if (r == -1 || func_800419B0(D_800A46D2) == -1) {
D_800A4650[idx24] = 1;
return 1;
}
D_800A46CC = 1;
}
res = 0;
switch (D_800A46CC) {
case 1:
res = func_80030730();
break;
case 2:
res = func_80030A14();
break;
}
if (res != 0) {
s16 *p = &D_800A46D2;
func_800415A8(*p);
*p = -1;
*(s16 *)((u8 *)D_800A4642 + *(s16 *)D_800A46CE * 24) = -1;
return 1;
}
return 0;
}
.run/P36/agents/main__func_8002FF0C/body_tree.c
+76
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@@ -0,0 +1,76 @@
s32 func_8002FF0C(s32 a0, s32 a1) {
/* block scope: src/800_b.c declares this symbol `extern s16 D_800A46D2[]`
* further down the TU, and the ARRAY spelling materialises the address into
* a register (`la`) for both the store and the re-read -- the target keeps
* two independent %hi/%lo accesses, which only the scalar spelling emits. */
extern s16 D_800A46D2;
s32 b;
s32 i;
s32 idx24;
s32 j12;
s32 v1;
s16 t;
s16 r;
s16 *q;
u8 *w;
u8 *base;
s32 res;
if (D_800A46CC == 0) {
b = D_80064D49[a0].unk00;
i = b * 24;
v1 = *(s16 *)((u8 *)D_800A4644 + i);
if (v1 != 0 && v1 != D_80064D4A[a0 * 12]) {
t = *(s16 *)((u8 *)D_800A4648 + i);
*(s16 *)((u8 *)D_800C532A + t * 4) = -1;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9)
*(s16 *)((u8 *)D_800A4644 + i) = 0;
*(s16 *)((u8 *)D_800A4648 + i) = 0;
}
idx24 = (b * 3) << 3;
if (D_800A4650[idx24] == 0) {
t = *(s16 *)((u8 *)D_800A4640 + idx24);
*(s16 *)((u8 *)D_800C5328 + t * 4) = -1;
func_80031A98();
}
q = D_800A46CE;
j12 = a0 * 12;
*q = b;
*(s16 *)((u8 *)D_800A4640 + idx24) = a0;
D_800A46D0 = a0;
D_800A46BC = a1;
*(s32 *)((u8 *)D_800A464C + idx24) = a1;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9)
if (D_80064D4E[j12] != 0) {
D_800A4EF6 = D_80064D4E[j12];
}
r = func_80041A80(a1, -1, *(s32 *)((u8 *)D_800A463C + idx24));
D_800A46D2 = r;
base = (u8 *)q - 0x96;
w = idx24 + base;
*(s16 *)(w + 0xA) = r;
__asm__ __volatile__("" ::: "memory"); // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus9)
if (r == -1 || func_800419B0(D_800A46D2) == -1) {
D_800A4650[idx24] = 1;
return 1;
}
D_800A46CC = 1;
}
res = 0;
switch (D_800A46CC) {
case 1:
res = func_80030730();
break;
case 2:
res = func_80030A14();
break;
}
if (res != 0) {
s16 *p = &D_800A46D2;
func_800415A8(*p);
*p = -1;
*(s16 *)((u8 *)D_800A4642 + *(s16 *)D_800A46CE * 24) = -1;
return 1;
}
return 0;
}
.run/P36/agents/main__func_8002FF0C/history.txt
+14
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@@ -0,0 +1,14 @@
s6: verdict NO-MATCH start 27 best 23 compiles 191 path R7 block @2953 + R18 bystander @2956->2959
best-scoring single candidates of the last trace (move -> score [residual class]):
R18 bystander @2956->2959 -> 23 [COUNT] (from 27)
R8 base-shared tmp0 @2954 -> 26 [COUNT] (from 27)
R8 temp tmp1 @2979 -> 26 [COUNT] (from 26)
R7 block @2969 -> 26 [COUNT] (from 26)
R5 swap + @2982 -> 26 [COUNT] (from 26)
R9 swap-stmts @2969 -> 26 [COUNT] (from 26)
R8 base tmp1 @2979 -> 26 [COUNT] (from 26)
R5 swap + @2955 -> 26 [COUNT] (from 26)
R8 hoist tmp1 @2981 -> 26 [COUNT] (from 26)
R7 block @2971 -> 26 [COUNT] (from 26)
R6 inline w @2982 -> 26 [COUNT] (from 26)
R8 hoist tmp1 @2955 -> 26 [COUNT] (from 26)
.run/P36/agents/main__func_8002FF0C/neighbours.txt
+28
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@@ -0,0 +1,28 @@
--- func_8002FDE8 (line 2841) ---
/* func_8002FDE8 -- start resource `idx` playing out of the buffer `data`.
*
* Byte-shape notes (each measured against asm/nonmatchings/800_b_2/func_8002FDE8.s):
* - `extern s16 D_800A46D2;` at BLOCK SCOPE, exactly as func_8002FF0C and func_800301C8 do
* below: this TU declares the symbol `extern s16 D_800A46D2[]` further down, and the ARRAY
* spelling makes cse cache the address in a callee-saved register across the func_800419B0
* call; the target keeps two independent %hi/%lo accesses (the `sh` at 0x2066C and the `lh`
* at 0x206C8), which only the scalar spelling emits. This was the residual that held the
* function at closeness 35 for four prior attempts.
* - the FIRST zero-byte fence (cookbook S194-A, AFTER placement) keeps `idx | 0x4000` at the
* head of the join block, which is what lets reorg steal it into the `bltz` delay slot and
* eager-duplicate it on the taken path (0x20618 / 0x20630). Without it the function is
* 2 instructions short.
* - `one` is a real local, and the fence sits BETWEEN its assignment and the first store:
* the `li` must be the block's first insn while the `sb` sinks below the index computation.
* Writing the literal 1 at all three sites instead costs 10 mismatched.
* - `i4 = idx * 4;` is a separate statement. The `sb D_800A46B0` and the `lw D_800652F0`
* carry a memory dependence, so sched1 orders them by LUID; splitting the index out gives
* the `sll` a lower LUID than the `sb` and reproduces `sll / addu $a0 / sb / lw`.
* - the SECOND fence is the S47 live-length slider. `data` (2 refs / 15 insns, pri 1333) and
* the `1` constant (4 refs / 58 insns, pri 1379) are adjacent in global.c's allocno_compare,
* so the constant allocated first and took $s1. One extra static insn where the constant is
* live and `data` is dead lengthens it to 59 (pri 1355 -> ties/loses) and hands $s1 back to
* `data`, $s2 to the constant, exactly as the target.
* - the third `return 1` is spelled inside the `== -1` arm, not as a trailing fallthrough:
* the other spelling inverts the final `beq` into a `bne` and swaps the two tail blocks.
*/
.run/P36/agents/main__func_8002FF0C/related.txt
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=== lever-free bodies in main sharing a callee or global with func_8002FF0C (22 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_8002FB08 (src/800_b_2.c:2684) shares 9: D_80064D49 D_800A463C D_800A4640 D_800A4642 D_800A4650 D_800A46CC D_800C5328 func_80031A98 func_800415A8 ---
int func_8002FB08(int entry) {
s32 idx12;
s32 b;
s32 idx24;
s16 h;
s32 b2;
s32 idx24b;
s16 v;
s16 a4;
if (func_80037CD8((void *)func_800301A4) == 0) {
return 0;
}
idx12 = entry * 12;
b = D_80064D49[entry].unk00;
idx24 = b * 24;
D_800A46C8 = *(s32 *)((u8 *)D_800A463C + idx24);
if (D_800A4650[idx24] == 0) {
h = *(s16 *)((u8 *)D_800A4640 + idx24);
D_800C5328[h * 2] = -1;
}
func_80031A98();
b2 = D_80064D4D[idx12];
if (b2 != 0) {
idx24b = b2 * 24;
v = *(s16 *)((u8 *)D_800A4642 + idx24b);
if (v >= 0) {
func_8002EC10();
a4 = *(s16 *)((u8 *)D_800A4642 + idx24b);
func_800415A8(a4);
*(s16 *)((u8 *)D_800A4642 + idx24b) = -1;
*(s16 *)((u8 *)D_800A4640 + idx24b) = -1;
}
D_800A4650[idx24b] = 1;
}
D_800A46CC = 0;
D_8006AEF4 |= 2;
return 1;
}
--- func_80030A14 (src/800_b_2.c:3391) shares 9: D_800A4644 D_800A4648 D_800A4650 D_800A46CC D_800A46CE D_800A46D0 D_800A46D2 D_800C5328 D_800C532A ---
s32 func_80030A14(void) {
C24 sp10;
A12 *e;
u8 *p;
B12 *q;
s32 count;
s32 i;
s32 r;
s32 t;
if (func_80042374(0) == 0) {
return 0;
}
e = &D_80064D44[D_800A46D0];
p = e->unk00 + D_800760F0 * 2;
q = &D_8006A970[D_800A46CE[0]][D_800760F0];
t = D_800A46CE[0] * 24;
if (D_800760F4 < 11) {
if (e->unk06 != 0) {
*(s16 *)((u8 *)D_800A4646 + t) = e->unk07;
D_800A4644[D_800A46CE[0] * 12] = e->unk06;
D_800A4648[D_800A46CE[0] * 12] = e->unk08;
D_800C532A[e->unk08 * 2] = D_800A46CE[0];
}
count = D_800760F4;
D_800760F4 = 0;
D_800C5328[D_800A46D0 * 2] = D_800A46CE[0];
} else {
count = 10;
D_800760F4 -= 10;
}
for (i = 0; i < count; i++, p += 2, q++) {
if (func_8003F144(D_800A46D2[0], p[0], p[1], &sp10) == 0) {
r = func_8003F380(D_800A46D2[0], sp10.unk16);
if (r >= 0) {
q->unk0A = 1;
q->unk04 = sp10.unk04 << 8;
q->unk00 = r;
q->unk06 = sp10.unk10;
q->unk08 = sp10.unk12;
}
}
}
if (D_800760F4 == 0) {
D_800A4650[D_800A46CE[0] * 24] = 0;
D_800A46CC = 0;
return 1;
}
D_800760F0 += 10;
return 0;
}
--- func_8003750C (src/800_c.c:1928) shares 6: D_80064D4A D_800A4640 D_800C5328 D_800C532A func_80031A98 func_800415A8 ---
s32 func_8003750C(void) {
s32 i;
s32 val;
s32 k;
s32 h;
switch (D_8007629C) {
case 0:
if (D_8006AEF4 & 2) {
return 0;
}
D_8006AEF4 |= 2;
D_8007629C = 1;
/* fallthrough */
case 1:
if (D_8006AEF4 & 1) {
if (func_8003C4F0(0) == 0) {
return 0;
}
}
D_8007629C = D_8007629C + 1;
/* fallthrough */
case 2:
for (i = 0; i < 5; i++) {
if (D_80076248[i].unk09 == 0) {
continue;
}
val = D_80076248[i].unk00;
k = D_80076248[i].unk0A;
if (val & 0x6000) {
continue;
}
h = D_800A4640[k].unk04;
if (h != 0 && h != D_80064D4A[val].unk00) {
D_800C532A[D_800A4640[k].unk08 * 2] = -1;
D_800A4640[k].unk04 = 0;
D_800A4640[k].unk08 = 0;
}
if (D_800A4640[k].unk10 != 0) {
continue;
}
D_800A4640[k].unk10 = 1;
D_800C5328[D_800A4640[k].unk00 * 2] = -1;
if (D_800A4640[i].unk02 >= 0) {
func_800415A8(D_800A4640[i].unk02);
D_800A4640[i].unk02 = -1;
}
func_80031A98();
}
D_8007629C = 0;
D_80076298 = 0;
return 1;
default:
return 0;
}
}
--- func_80030730 (src/800_b_2.c:3287) shares 6: D_800A4640 D_800A46CC D_800A46CE D_800A46D2 D_800C5328 D_800C532A ---
s32 func_80030730(void) {
Blk28 sp10;
A12 *e;
B12 *p;
u8 *q;
s16 *pd;
s16 *pcc;
s32 n;
s32 n0;
s32 k;
s32 i;
s32 res;
if (func_80042374(0) == 0) {
return 0;
}
D_8006AEF4 &= 0xFC;
func_80037D74();
k = D_800A46CE[0] * 24;
D_800760F0 = 0;
e = &D_80064D44[D_800A46CE[1]];
n0 = e->pad04[0];
D_800760F4 = n0;
if (n0 == 0) {
*(u8 *)((u8 *)D_800A4640 + k + 0x10) = 0;
D_800A46CC = 0;
return 1;
}
q = e->unk00;
if (D_80065504[D_800A46CE[0]] < n0) {
D_800760F4 = D_80065504[D_800A46CE[0]];
}
p = D_8006A970[D_800A46CE[0]];
n = 10;
if (D_800760F4 < 11) {
if (e->unk06 != 0) {
*(s16 *)((u8 *)D_800A4640 + k + 0x06) = e->unk07;
D_800A4640[D_800A46CE[0]].unk04 = e->unk06;
D_800A4640[D_800A46CE[0]].unk08 = e->unk08;
D_800C532A[e->unk08 * 2] = D_800A46CE[0];
}
n = D_800760F4;
D_800760F4 = 0;
D_800C5328[D_800A46CE[1] * 2] = D_800A46CE[0];
} else {
D_800760F4 -= 10;
}
for (i = 0; i < n; i++, q += 2, p++) {
pd = D_800A46D2;
if (func_8003F144(*pd, q[0], q[1], (C24 *)&sp10) == 0) {
res = func_8003F380(*pd, sp10.unk16);
if (res >= 0) {
p->unk0A = 1;
p->unk04 = sp10.unk04 << 8;
p->unk00 = res;
p->unk06 = sp10.unk10;
p->unk08 = sp10.unk12;
}
}
}
if (D_800760F4 == 0) {
D_800A4640[D_800A46CE[0]].unk10 = 0;
D_800A46CC = 0;
return 1;
}
pcc = &D_800A46CC;
D_800760F0 = D_800760F0 + 10;
(*pcc)++;
return 0;
}
--- func_80030538 (src/800_b_2.c:3188) shares 4: D_800A4642 D_800A4650 D_800A46CC D_800A46CE ---
s32 func_80030538(void) {
s32 idx;
s16 ret;
idx = D_800A46CE[0];
ret = func_80042154(D_800A46C0 + D_800A46C4, 0x8000, *(s16 *)((u8 *)D_800A4642 + idx * 24));
switch (ret) {
case -2: {
s16 t2 = D_800A46CC + 1;
s32 t1 = D_800A46C4 + 0x8000;
D_800A46C4 = t1;
D_800A46CC = t2;
goto L_zero;
}
case -1:
D_800A4650[idx * 24] = 1;
D_800A46CC = D_800A46CC + 2;
return 1;
default: {
s16 *p = &D_800A46CC;
*p = *p + 2;
goto L_zero;
}
}
L_zero:
return 0;
}
--- func_80030634 (src/800_b_2.c:3226) shares 4: D_800A4642 D_800A4650 D_800A46CC D_800A46CE ---
s32 func_80030634(void) {
s32 t;
s32 k;
s16 r;
s16 *pcc;
if (func_80042374(0) != 0) {
t = D_800A46CE[0] * 3;
k = t << 3;
r = func_80042154((u8 *)(D_800A46C0 + D_800A46C4), 0x8000,
*(s16 *)((u8 *)D_800A4642 + k));
switch (r) {
case -2:
D_800A46C4 = D_800A46C4 + 0x8000;
break;
case -1:
D_800A4650[k] = 1;
D_800A46CC++;
break;
default:
pcc = &D_800A46CC;
(*pcc)++;
break;
}
}
return 0;
}
.run/P36/agents/main__func_8002FF0C/residual.txt
+42
View File
@@ -0,0 +1,42 @@
src/800_b_2.c:func_8002FF0C: score 27 (COUNT; mine 162 ins, target 166) — not yet
register pairs (mine -> target, count): v0->v1 x1, a0->v0 x1
replace mine[10:11] target[10:11]
10 bnez v0,3828 <func_8002FF0C+0x1d8> | bnez v0,3838 <func_8002FF0C+0x1e8>
replace mine[26:27] target[26:27]
26 beqz v1,3710 <func_8002FF0C+0xc0> | beqz v1,3714 <func_8002FF0C+0xc4>
replace mine[32:34] target[32:34]
32 beq v1,v0,370c <func_8002FF0C+0xbc> | beq v1,v0,3710 <func_8002FF0C+0xc0>
33 li v0,-1 | li v1,-1
replace mine[36:37] target[36:42]
36 lh v1,0(at) | lh v0,0(at)
37 -- | nop
38 -- | sll v0,v0,0x2
39 -- | lui at,0x0
40 -- | addu at,at,v0
41 -- | sh v1,0(at)
delete mine[43:47] target[48:48]
43 sll v1,v1,0x2 | --
44 lui at,0x0 | --
45 addu at,at,v1 | --
46 sh v0,0(at) | --
insert mine[79:79] target[80:83]
79 -- | lui at,0x0
80 -- | addu at,at,s0
81 -- | sw s3,0(at)
replace mine[82:85] target[86:87]
82 lui at,0x0 | nop
83 addu at,at,s0 | --
84 sw s3,0(at) | --
replace mine[100:101] target[102:103]
100 sra a0,v0,0x10 | sra v0,v0,0x10
replace mine[102:103] target[104:105]
102 beq a0,s1,3808 <func_8002FF0C+0x1b8> | beq v0,s1,3818 <func_8002FF0C+0x1c8>
insert mine[104:104] target[106:108]
104 -- | lui a0,0x0
105 -- | lh a0,0(a0)
replace mine[113:114] target[117:118]
113 j 38b4 <func_8002FF0C+0x264> | j 38c4 <func_8002FF0C+0x274>
replace mine[126:127] target[130:131]
126 j 386c <func_8002FF0C+0x21c> | j 387c <func_8002FF0C+0x22c>
replace mine[130:131] target[134:135]
130 j 386c <func_8002FF0C+0x21c> | j 387c <func_8002FF0C+0x22c>
.run/P36/agents/main__func_8002FF0C/sites.txt
+3
View File
@@ -0,0 +1,3 @@
NEEDED barrier line 2962
NEEDED barrier line 2979
NEEDED barrier memory line 2988
.run/P36/agents/main__func_8002FF0C/tu.txt
+2
View File
@@ -0,0 +1,2 @@
src/800_b_2.c
func_8002FF0C
.run/P36/agents/main__func_80032A74/body_free.c
+239
View File
@@ -0,0 +1,239 @@
void func_80032A74(Slot54 *arg0, s32 arg1, Rec14 *arg2, s32 flags) {
#define REQ ((Req32A74 *)arg0)
#define REC ((Rec32A74 *)arg2)
C24 sp10;
Chan32A74 *ch;
Voice32A74 *vo;
A12 *dd;
B12 *q;
u8 *cp;
const u16 *tA;
const u16 *tB;
u8 *vB;
s32 i2;
u16 v;
u32 vv;
s32 idx;
s32 w;
s32 n;
s32 flag;
s32 h;
s32 i;
s32 b;
s32 sub;
u8 pan;
u32 vol;
u32 mp;
u32 qq;
s32 tb;
u32 d;
s32 base;
u16 t16;
s32 t8;
s32 t32;
u32 gx;
tA = D_8007319E;
tB = D_800731A0;
vB = (u8 *)D_800A4C28;
v = REQ->unk02;
i = 7;
cp = (u8 *)arg0 + 7;
do {
cp[0xE] = 0;
i--;
cp--;
} while (i >= 0);
REQ->unk0C = 0;
for (;;) {
b = REC->unk08;
flag = 0;
if ((b & 0x80) == 0) {
dd = &D_80064D44[b];
sub = REC->unk09;
if (dd->unk06 != 0) {
gx = dd->unk07;
gx -= 0x100;
flag = (u32)sub < (u32)(u8)gx;
}
n = D_800C5328[b * 2];
if (n < 0) {
if (flag == 0) {
break;
}
n = D_800C532A[b * 2];
if (n < 0) {
break;
}
if (sub >= D_800A4646[n * 12]) {
break;
}
}
} else {
n = 4;
}
if ((flags & 0x1000) && (flags & 0x7F) < 0x30U) {
v >>= 1;
flags = (flags & 0xFF80) | (0x2F - ((0x2F - (flags & 0x7F)) >> 1));
}
idx = func_80030CA4(v);
if (idx != 0) {
idx--;
vo = (Voice32A74 *)(idx * 0x48 + (s32)vB);
if ((b & 0x80) == 0) {
q = &D_8006A970[n][REC->unk09];
vo->unk1C = q->unk00;
vo->unk18 = q->unk04;
vo->unk3A = q->unk06;
vo->unk3C = q->unk08;
} else {
if (func_8003F144(D_800A46A2, b & 0x7F, REC->unk09, &sp10) != 0) {
goto next;
}
h = func_8003F380(D_800A46A2, sp10.unk16);
if (h < 0) {
goto next;
}
tb = sp10.unk04;
vo->unk1C = h;
vo->unk18 = tb << 8;
vo->unk3A = sp10.unk10;
vo->unk3C = sp10.unk12;
}
w = idx + 0x10;
vo->unk00 = D_80073140[w];
ch = (Chan32A74 *)(D_800A4988 + idx * 0x54);
ch->unk4C = 0;
ch->unk4A = 0x7FFF;
if (REQ->unk00 & 0x80) {
ch->unk4D = 0;
} else {
ch->unk4D = 1;
}
t16 = REC->unk02;
ch->unk04 = 0;
ch->unk08 = v;
ch->unk0A = w;
ch->unk00 = t16;
t8 = REC->unk09;
ch->unk0E = b;
ch->unk36 = flag;
ch->unk10 = n;
ch->unk12 = 0;
ch->unk0C = t8;
t32 = REC->unk10;
ch->unk4F = 0;
ch->unk4E = 0x85;
ch->unk14 = t32;
vol = REC->unk06;
if (D_800A4F1E != 0) {
vol *= 0x70;
vol >>= 7;
}
if (flags & 0x1000) {
ch->unk48 = flags & 0x7F;
} else {
ch->unk48 = 0x7F;
}
ch->unk34 = vol & 0x7F;
pan = REC->unk07;
ch->unk35 = pan;
if (flags & 0x8000) {
ch->unk24 = REC->unk04 - 0x80;
} else {
ch->unk24 = REC->unk04;
}
ch->unk40 = (s32)func_80033324;
ch->unk44 = arg1;
if ((flags & 0x2000) && pan != 0) {
if ((flags & 0x3000) == 0x3000) {
ch->unk53 = D_8006AED8[(u32)(flags & 0xF00) >> 8];
} else {
ch->unk53 = flags & 0x7F;
}
} else {
ch->unk53 = 0;
}
if (REC->unk02 == 0) {
func_800316F8(ch);
}
{
u16 u18 = vo->unk18;
base = (u18 & 0xFF00) + (s8)u18 * 2;
}
base -= 0x3C00;
d = ch->unk24;
d -= base;
if (d >= 0x5300) {
vo->unk14 = 0x3FFF;
} else {
qq = D_8006AB30[d >> 8];
qq = qq * (0x100 - (d & 0xFF));
vo->unk14 = (qq + D_8006AB32[d >> 8] * (d & 0xFF)) >> 8;
}
vol = D_8006AA30[ch->unk34];
mp = vol * D_800A4EFA;
vol = mp >> 7;
mp = vol * ch->unk48;
vol = mp >> 7;
if (pan != 0) {
if (ch->unk53 != 0) {
pan += ch->unk53;
if (pan >= 0x42) {
pan -= 0x40;
if (pan >= 0x80) {
pan = 0x7F;
}
} else {
pan = 1;
}
}
if (D_800A4F19 != 0) {
vv = (vol * tA[pan]) >> 14;
vo->unk0A = vv;
vv = (vol * tB[0x7F - pan]) >> 14;
vo->unk08 = vv;
} else {
vv = (vol * D_8007321E) >> 14;
vo->unk0A = vv;
vo->unk08 = vv;
}
} else {
vv = vol;
vo->unk08 = vv;
vo->unk0A = vv;
}
ch->unk52 = pan;
vo->unk0C = 0;
vo->unk0E = 0;
vo->unk04 = 0x6009F;
if (D_800A4EF6 > REC->unk0A) {
func_8002F064(1, vo->unk00);
} else {
func_8002F064(0, vo->unk00);
}
t16 = ch->unk0A;
vo->unk45 = 0;
vo->unk44 = 1;
vo->unk40 = t16;
if (REC->unk02 == 0) {
func_8002EFF8(1, vo->unk00);
}
REQ->unk0C++;
REQ->unk0E[idx] = 1;
}
next:
if (REC->unk0B == 0) {
break;
}
arg2++;
v = REC->unk00;
}
if (REQ->unk0C == 0) {
REQ->unk00 = 0;
} else {
REQ->unk0A = 4;
}
}
.run/P36/agents/main__func_80032A74/body_tree.c
+241
View File
@@ -0,0 +1,241 @@
void func_80032A74(Slot54 *arg0, s32 arg1, Rec14 *arg2, s32 flags) {
#define REQ ((Req32A74 *)arg0)
#define REC ((Rec32A74 *)arg2)
C24 sp10;
Chan32A74 *ch;
Voice32A74 *vo;
A12 *dd;
B12 *q;
u8 *cp;
const u16 *tA;
const u16 *tB;
u8 *vB;
s32 i2;
u16 v;
u32 vv;
s32 idx;
s32 w;
s32 n;
s32 flag;
s32 h;
s32 i;
s32 b;
s32 sub;
u8 pan;
u32 vol;
u32 mp;
u32 qq;
s32 tb;
u32 d;
register s32 base __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus9)
u16 t16;
s32 t8;
s32 t32;
u32 gx;
tA = D_8007319E;
tB = D_800731A0;
vB = (u8 *)D_800A4C28;
v = REQ->unk02;
i = 7;
cp = (u8 *)arg0 + 7;
do {
cp[0xE] = 0;
i--;
cp--;
} while (i >= 0);
REQ->unk0C = 0;
for (;;) {
b = REC->unk08;
flag = 0;
if ((b & 0x80) == 0) {
dd = &D_80064D44[b];
sub = REC->unk09;
if (dd->unk06 != 0) {
gx = dd->unk07;
gx -= 0x100;
flag = (u32)sub < (u32)(u8)gx;
}
n = D_800C5328[b * 2];
if (n < 0) {
if (flag == 0) {
break;
}
n = D_800C532A[b * 2];
if (n < 0) {
break;
}
if (sub >= D_800A4646[n * 12]) {
break;
}
}
} else {
n = 4;
}
if ((flags & 0x1000) && (flags & 0x7F) < 0x30U) {
v >>= 1;
flags = (flags & 0xFF80) | (0x2F - ((0x2F - (flags & 0x7F)) >> 1));
}
idx = func_80030CA4(v);
if (idx != 0) {
idx--;
vo = (Voice32A74 *)(idx * 0x48 + (s32)vB);
if ((b & 0x80) == 0) {
q = &D_8006A970[n][REC->unk09];
vo->unk1C = q->unk00;
vo->unk18 = q->unk04;
vo->unk3A = q->unk06;
vo->unk3C = q->unk08;
} else {
if (func_8003F144(D_800A46A2, b & 0x7F, REC->unk09, &sp10) != 0) {
goto next;
}
h = func_8003F380(D_800A46A2, sp10.unk16);
if (h < 0) {
goto next;
}
tb = sp10.unk04;
vo->unk1C = h;
vo->unk18 = tb << 8;
vo->unk3A = sp10.unk10;
vo->unk3C = sp10.unk12;
}
w = idx + 0x10;
vo->unk00 = D_80073140[w];
ch = (Chan32A74 *)(D_800A4988 + idx * 0x54);
ch->unk4C = 0;
ch->unk4A = 0x7FFF;
if (REQ->unk00 & 0x80) {
ch->unk4D = 0;
} else {
ch->unk4D = 1;
}
t16 = REC->unk02;
ch->unk04 = 0;
ch->unk08 = v;
ch->unk0A = w;
ch->unk00 = t16;
t8 = REC->unk09;
ch->unk0E = b;
ch->unk36 = flag;
ch->unk10 = n;
ch->unk12 = 0;
ch->unk0C = t8;
t32 = REC->unk10;
ch->unk4F = 0;
ch->unk4E = 0x85;
ch->unk14 = t32;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9)
vol = REC->unk06;
if (D_800A4F1E != 0) {
vol *= 0x70;
vol >>= 7;
}
if (flags & 0x1000) {
ch->unk48 = flags & 0x7F;
} else {
ch->unk48 = 0x7F;
}
ch->unk34 = vol & 0x7F;
pan = REC->unk07;
ch->unk35 = pan;
if (flags & 0x8000) {
ch->unk24 = REC->unk04 - 0x80;
} else {
ch->unk24 = REC->unk04;
}
ch->unk40 = (s32)func_80033324;
ch->unk44 = arg1;
if ((flags & 0x2000) && pan != 0) {
if ((flags & 0x3000) == 0x3000) {
ch->unk53 = D_8006AED8[(u32)(flags & 0xF00) >> 8];
} else {
ch->unk53 = flags & 0x7F;
}
} else {
ch->unk53 = 0;
}
if (REC->unk02 == 0) {
func_800316F8(ch);
}
{
u16 u18 = vo->unk18;
base = (u18 & 0xFF00) + (s8)u18 * 2;
}
base -= 0x3C00;
d = ch->unk24;
d -= base;
if (d >= 0x5300) {
vo->unk14 = 0x3FFF;
} else {
qq = D_8006AB30[d >> 8];
qq = qq * (0x100 - (d & 0xFF));
vo->unk14 = (qq + D_8006AB32[d >> 8] * (d & 0xFF)) >> 8;
}
vol = D_8006AA30[ch->unk34];
mp = vol * D_800A4EFA;
vol = mp >> 7;
mp = vol * ch->unk48;
vol = mp >> 7;
if (pan != 0) {
if (ch->unk53 != 0) {
pan += ch->unk53;
if (pan >= 0x42) {
pan -= 0x40;
if (pan >= 0x80) {
pan = 0x7F;
}
} else {
pan = 1;
}
}
if (D_800A4F19 != 0) {
vv = (vol * tA[pan]) >> 14;
vo->unk0A = vv;
vv = (vol * tB[0x7F - pan]) >> 14;
vo->unk08 = vv;
} else {
vv = (vol * D_8007321E) >> 14;
vo->unk0A = vv;
vo->unk08 = vv;
}
} else {
vv = vol;
vo->unk08 = vv;
vo->unk0A = vv;
}
ch->unk52 = pan;
vo->unk0C = 0;
vo->unk0E = 0;
vo->unk04 = 0x6009F;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9)
if (D_800A4EF6 > REC->unk0A) {
func_8002F064(1, vo->unk00);
} else {
func_8002F064(0, vo->unk00);
}
t16 = ch->unk0A;
vo->unk45 = 0;
vo->unk44 = 1;
vo->unk40 = t16;
if (REC->unk02 == 0) {
func_8002EFF8(1, vo->unk00);
}
REQ->unk0C++;
REQ->unk0E[idx] = 1;
}
next:
if (REC->unk0B == 0) {
break;
}
arg2++;
v = REC->unk00;
}
if (REQ->unk0C == 0) {
REQ->unk00 = 0;
} else {
REQ->unk0A = 4;
}
}
.run/P36/agents/main__func_80032A74/history.txt
+14
View File
@@ -0,0 +1,14 @@
s6: verdict NO-MATCH start 11 best 11 compiles 186 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R6 inline vv @5560 -> 11 [COUNT] (from 11)
R18 bystander @5401->5404 -> 11 [COUNT] (from 11)
R7 block @5506 -> 11 [COUNT] (from 11)
R18 bystander @5401->5405 -> 11 [COUNT] (from 11)
R7 do-while @5506 -> 11 [COUNT] (from 11)
R18 bystander @5401->5406 -> 11 [COUNT] (from 11)
R7 block @5563 -> 11 [COUNT] (from 11)
R5 swap * @5537 -> 11 [COUNT] (from 11)
R18 bystander @5402->5405 -> 11 [COUNT] (from 11)
R7 do-while @5563 -> 11 [COUNT] (from 11)
R18 bystander @5402->5406 -> 11 [COUNT] (from 11)
R7 block @5473 -> 11 [COUNT] (from 11)
.run/P36/agents/main__func_80032A74/neighbours.txt
+17
View File
@@ -0,0 +1,17 @@
--- func_800322A8 (line 4559) ---
/* SECOND-PASS LEVER (sched.md S13, the bb0 head-skip escape). A first pass got
* to 3-off with a pure prologue-schedule residual: sched2 emitted
* `sw s5 / move s5 / srl` where the target has `srl / sw s5 / move s5`.
* Cause (read off the -dS dumps, not guessed): sched.c:3189-3213 pins the
* LEADING RUN of `pseudo = hard-arg-reg` param copies out of sched1's pool, so
* the a2->flags copy always kept a LOWER LUID than the `srl`; at sched2's T-15
* all three candidates tie at priority 1 and rank_for_schedule falls through to
* the LUID tie-break (2.7.2 sched.c:2428, highest LUID picked first = placed
* last), which put the srl last of the three.
* Fix: take the third parameter through a BODY-LOCAL copy declared AFTER
* `y = arg0 >> 16`. The head copy `pseudo = $a2` becomes a nop-move at reload
* (local-alloc ties the once-used incoming pseudo to $a2) and the REAL
* `move s5,a2` materialises at its statement position, where the S2 birthing
* boost sinks it below the srl -- giving it the HIGHER LUID. sched2 then picks
* it first, `sw s5` follows on the potential-hazard rule, and the srl lands at
* position 3. Do NOT reorder `flags = arg2;` above `y = arg0 >> 16;`. */
.run/P36/agents/main__func_80032A74/related.txt
+571
View File
@@ -0,0 +1,571 @@
=== lever-free bodies in main sharing a callee or global with func_80032A74 (27 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80030A14 (src/800_b_2.c:3391) shares 7: D_80064D44 D_8006A970 D_800A4646 D_800C5328 D_800C532A func_8003F144 func_8003F380 ---
s32 func_80030A14(void) {
C24 sp10;
A12 *e;
u8 *p;
B12 *q;
s32 count;
s32 i;
s32 r;
s32 t;
if (func_80042374(0) == 0) {
return 0;
}
e = &D_80064D44[D_800A46D0];
p = e->unk00 + D_800760F0 * 2;
q = &D_8006A970[D_800A46CE[0]][D_800760F0];
t = D_800A46CE[0] * 24;
if (D_800760F4 < 11) {
if (e->unk06 != 0) {
*(s16 *)((u8 *)D_800A4646 + t) = e->unk07;
D_800A4644[D_800A46CE[0] * 12] = e->unk06;
D_800A4648[D_800A46CE[0] * 12] = e->unk08;
D_800C532A[e->unk08 * 2] = D_800A46CE[0];
}
count = D_800760F4;
D_800760F4 = 0;
D_800C5328[D_800A46D0 * 2] = D_800A46CE[0];
} else {
count = 10;
D_800760F4 -= 10;
}
for (i = 0; i < count; i++, p += 2, q++) {
if (func_8003F144(D_800A46D2[0], p[0], p[1], &sp10) == 0) {
r = func_8003F380(D_800A46D2[0], sp10.unk16);
if (r >= 0) {
q->unk0A = 1;
q->unk04 = sp10.unk04 << 8;
q->unk00 = r;
q->unk06 = sp10.unk10;
q->unk08 = sp10.unk12;
}
}
}
if (D_800760F4 == 0) {
D_800A4650[D_800A46CE[0] * 24] = 0;
D_800A46CC = 0;
return 1;
}
D_800760F0 += 10;
return 0;
}
--- func_800336A8 (src/800_b_2.c:5992) shares 6: D_8006AA30 D_80073140 D_8007319E D_8007321E D_800A4988 D_800A4F19 ---
void func_800336A8(Req336A8 *arg)
{
Chan336A8 *ch;
Voice336A8 *vo;
u16 *p;
const u16 *q;
u32 m;
u32 n;
u32 v;
s32 i;
s32 j;
for (i = 0; i < 8; i++) {
if (arg->unk3A[i] == 0) {
continue;
}
ch = (Chan336A8 *)(D_800A4988 + i * 0x54);
vo = (Voice336A8 *)(D_800A4988 + 0x2A0 + i * 0x48);
vo->unk00 = D_80073140[ch->unk0A];
m = ch->unk34;
m = D_8006AA30[m];
m = m * *(s16 *)(D_800A4988 + 0x572);
m = m >> 7;
if (arg->unk16 != 0) {
m = m * arg->unk18;
m = m >> 15;
}
p = arg->unk1C;
for (j = 2; j >= 0; j--, p += 4) {
m = m * *p;
m = m >> 14;
}
n = ch->unk35;
if (n != 0) {
if (arg->unk38 != 0) {
n += arg->unk38;
if (n >= 0x42) {
n -= 0x40;
if (n >= 0x80) {
n = 0x7F;
}
} else {
n = 1;
}
}
ch->unk52 = n;
if (D_800A4F19 != 0) {
v = (m * D_8007319E[n]) >> 14;
vo->unk0A = v;
q = D_8007319E + 1;
v = (m * q[0x7F - n]) >> 14;
vo->unk08 = v;
} else {
v = (m * D_8007321E) >> 14;
vo->unk0A = v;
vo->unk08 = v;
}
} else {
v = m;
vo->unk0A = v;
vo->unk08 = v;
}
vo->unk40 = ch->unk0A;
if (vo->unk44 != 0) {
vo->unk04 |= 3;
} else {
vo->unk04 = 3;
vo->unk44 = 1;
}
}
}
--- func_80030730 (src/800_b_2.c:3287) shares 6: D_80064D44 D_8006A970 D_800C5328 D_800C532A func_8003F144 func_8003F380 ---
s32 func_80030730(void) {
Blk28 sp10;
A12 *e;
B12 *p;
u8 *q;
s16 *pd;
s16 *pcc;
s32 n;
s32 n0;
s32 k;
s32 i;
s32 res;
if (func_80042374(0) == 0) {
return 0;
}
D_8006AEF4 &= 0xFC;
func_80037D74();
k = D_800A46CE[0] * 24;
D_800760F0 = 0;
e = &D_80064D44[D_800A46CE[1]];
n0 = e->pad04[0];
D_800760F4 = n0;
if (n0 == 0) {
*(u8 *)((u8 *)D_800A4640 + k + 0x10) = 0;
D_800A46CC = 0;
return 1;
}
q = e->unk00;
if (D_80065504[D_800A46CE[0]] < n0) {
D_800760F4 = D_80065504[D_800A46CE[0]];
}
p = D_8006A970[D_800A46CE[0]];
n = 10;
if (D_800760F4 < 11) {
if (e->unk06 != 0) {
*(s16 *)((u8 *)D_800A4640 + k + 0x06) = e->unk07;
D_800A4640[D_800A46CE[0]].unk04 = e->unk06;
D_800A4640[D_800A46CE[0]].unk08 = e->unk08;
D_800C532A[e->unk08 * 2] = D_800A46CE[0];
}
n = D_800760F4;
D_800760F4 = 0;
D_800C5328[D_800A46CE[1] * 2] = D_800A46CE[0];
} else {
D_800760F4 -= 10;
}
for (i = 0; i < n; i++, q += 2, p++) {
pd = D_800A46D2;
if (func_8003F144(*pd, q[0], q[1], (C24 *)&sp10) == 0) {
res = func_8003F380(*pd, sp10.unk16);
if (res >= 0) {
p->unk0A = 1;
p->unk04 = sp10.unk04 << 8;
p->unk00 = res;
p->unk06 = sp10.unk10;
p->unk08 = sp10.unk12;
}
}
}
if (D_800760F4 == 0) {
D_800A4640[D_800A46CE[0]].unk10 = 0;
D_800A46CC = 0;
return 1;
}
pcc = &D_800A46CC;
D_800760F0 = D_800760F0 + 10;
(*pcc)++;
return 0;
}
--- func_800314DC (src/800_b_2.c:3910) shares 5: D_8006A970 D_8006AB30 D_8006AB32 D_80073140 D_800A4C28 ---
void func_800314DC(Obj *p) {
Slot *e;
s32 *r;
u16 h;
u32 t;
u32 d;
u32 q;
if (!(p->unk37 & 1)) {
return;
}
if (p->unk30 != 0) {
p->unk30--;
return;
}
if (p->unk2C < 0) {
p->unk24 += p->unk2C;
if (p->unk24 <= p->unk28) {
p->unk24 = p->unk28;
p->unk37 &= 0xFE;
}
} else {
p->unk24 += p->unk2C;
if (p->unk24 >= p->unk28) {
p->unk24 = p->unk28;
p->unk37 &= 0xFE;
}
}
if (!(p->unk37 & 1) && p->unk38 != 0) {
if (p->unk24 != p->unk3C) {
p->unk28 = p->unk3C;
if (p->unk3C < p->unk24) {
p->unk2C = -p->unk3A;
} else {
p->unk2C = p->unk3A;
}
}
p->unk38 = 0;
p->unk37 |= 1;
}
e = &D_800A4C28[p->unk51];
/* two statements: the pointer's uses all fold into one address, but reload still gives it the
8-byte stack slot the target's frame carries (S103 c35 / S104 d25, reload1.c:2331-2352) */
r = D_80073140;
r += p->unk0A;
e->unk00 = *r;
h = D_8006A970[p->unk10][p->unk0C].unk04;
t = h;
t = (t & 0xFF00) + ((s8)t * 2);
e->unk18 = h;
t -= 0x3C00;
d = p->unk24;
d -= t;
if (d >= 0x5300) {
e->unk14 = 0x3FFF;
} else {
q = D_8006AB30[d >> 8] * (0x100 - (d & 0xFF));
q += D_8006AB32[d >> 8] * (d & 0xFF);
e->unk14 = q >> 8;
}
e->unk40 = p->unk0A;
if (e->unk44 != 0) {
e->unk04 |= 0x10;
} else {
e->unk44 = 1;
e->unk04 = 0x10;
}
}
--- func_8002C8F4 (src/800_b_2.c:205) shares 5: D_800A4988 D_800A4EF6 D_800A4EFA D_800A4F19 D_800A4F1E ---
void func_8002C8F4(void)
{
s32 sp10[2];
s32 *p;
u8 *q;
s32 i;
s32 j;
s32 k;
s32 n;
s32 m;
func_8003A424();
func_8003D518();
p = &D_800A4EA4;
*p = 0x23CF;
D_800A4EA8 = 0x3FFF;
D_800A4EAA = 0x3FFF;
D_800A4EB4 = 0x3FFF;
D_800A4EB6 = 0x3FFF;
D_800A4EAC = 0;
D_800A4EAE = 0;
D_800A4EB8 = 0;
D_800A4EBC = 1;
D_800A4EC8 = 0;
func_8003C598(p);
func_8003BE24(1);
func_8002D1F0(4);
func_8003B280(1);
func_80037D98();
D_800A4E68 = 0x3C;
D_800A4E6C = 0x2F;
D_800A4E6E = 0x2F;
D_800A4E70 = 1;
D_800A4F18 = 1;
D_800A4F19 = 1;
D_800A4EF6 = 1;
(&D_800A4638)[1] = 0x1010;
D_800A4638 = 0;
D_800A4E7A = 0;
D_800A46E4 = 0;
D_800A4654 = 0x10000;
D_800A466C = 0x14000;
D_800A4684 = 0x18000;
D_800A469C = 0x39F00;
for (j = 0x54; j >= 0; j -= 0xC) {
*(s32 *)((u8 *)&D_800A64B0 + j) = 0;
}
for (i = 0; i < 5; i++) {
k = i * 0x18;
D_800A4650[k] = 1;
*(s16 *)((u8 *)D_800A4644 + k) = 0;
*(s16 *)((u8 *)D_800A4642 + k) = -1;
}
for (n = 0x24C; n >= 0; n -= 0x54) {
*(u16 *)((u8 *)D_800A46E8 + n) = 0;
}
m = 0x10;
for (i = 0, q = D_800A4988 + 0x4F; i < 8; i++, m++, q += 0x54) {
k = i * 0x48;
q[2] = i;
*(s16 *)(q - 0x45) = m;
q[-1] = 0;
*(s32 *)(q - 0x4B) = 0;
*(s32 *)(q - 0xF) = 0;
q[1] = 0;
*(s32 *)((u8 *)D_800A4C68 + k) = m;
D_800A4C6C[k] = 0;
D_800A4C6D[k] = 0;
}
func_8002CC4C();
D_800A4EFA = 0x7F;
D_800A4EF8 = 0x7F;
D_800A4F1B = 1;
D_800A46BA = 0;
D_800A2B98 = 0;
D_800C7D20 = 0;
D_800C7D2C = 0;
D_800A2BA0 = 0;
D_800A4F17 = 0;
D_800A4E8E = 0;
D_800A4EA2 = 0;
D_800A4EF0 = 0;
D_800A4EE8 = 0;
D_800A4EFC = 0;
D_800A4F20 = 0;
D_800A4F22 = 0;
D_800A4F1D = 0;
D_800A4EEC = 0;
D_800A4EE6 = 0;
D_800A4EE0 = 0x4000;
D_800A4EE4 = 0x4000;
D_800A4F24 = 0;
D_800A4F16 = 0;
func_8002FAE0();
func_80037CC8();
func_8003BE74(0, 0xFFFFFF);
sp10[0] = 1;
sp10[1] = 0;
func_8003B1EC(sp10);
D_800A4F1C = 0;
D_800A4F1E = 0;
func_80034C24();
func_80037004();
}
--- func_8002E138 (src/800_b_2.c:1362) shares 4: D_800A4EF6 D_800A4EFA D_800A4F19 D_800A4F1E ---
void func_8002E138(s32 a0, s32 a1, s32 a2) {
if ((u16)a0 == 0x7F) {
return;
}
switch ((u16)a0 - 1) {
case 0:
func_8002E638(a1 & 0xFFFF);
break;
case 7:
func_8002E700(a1 & 0xFFFF);
break;
case 1:
func_8002F0D0();
func_8002EDE4();
D_800A4F1B = 1;
D_800A4EE0 = 0x4000;
D_800A4F1C = 0;
D_8006A96E = 0;
D_8006A980 = 0;
D_8006A982 = 0;
D_8006A984 = 0;
D_800A4EE6 = 0;
D_800A4EFC = 0x1E;
D_800A4F1E = 0;
break;
case 2:
func_8002F0D0();
func_80031CC8();
D_800A4EFC = 0;
break;
case 3:
func_8002EED8((a1 & 0xFFFF) | (a2 << 16));
break;
case 4:
func_8002EE90();
break;
case 5:
case 15:
case 30:
D_800A4EF6 = 2;
break;
case 6:
case 16:
case 31:
D_800A4EF6 = 1;
break;
case 10:
if (D_800A4F19 != 0) {
func_8002E5BC();
}
break;
case 11:
if (D_800A4F19 == 0) {
func_8002E5F8();
}
break;
case 12:
func_8003491C((a1 & 0xFFFF) | (a2 << 16));
break;
case 13:
func_8002EB10();
break;
case 14:
func_8002EBAC();
break;
case 17:
func_8002E79C(a1 & 0xFFFF);
break;
case 18:
func_8002E8DC(a1 & 0xFFFF);
break;
case 19:
func_80031F14();
func_8002E818(0);
break;
case 20:
func_80031FC8();
func_8002E94C(0);
break;
case 21:
func_8002EEB8();
break;
case 22:
func_8002EC10();
break;
case 23:
case 25:
func_80031DEC();
break;
case 24:
case 26:
func_80031E94();
break;
case 27:
func_8002EFD0();
break;
case 28:
D_800A4F1B = 0;
break;
case 29:
D_800A4F1B = 1;
break;
case 32: {
s16 t = D_8006A994[a1 & 7];
D_800A4F16 = 1;
D_800A4EF8 = t;
break;
}
case 33:
D_800A4EFA = D_8006A994[a1 & 7];
break;
case 34:
{
u8 *p = &D_800A4F1C;
*p |= 1;
if (D_800A4E8C + 0x100 == 0x134) {
func_80038668(D_800A4E86, 3);
}
}
break;
case 35:
{
u8 *p = &D_800A4F1C;
*p |= 2;
if (D_800A4E8C + 0x100 == 0x134) {
func_80038668(D_800A4E86, 4);
}
}
break;
case 36:
{
u8 *p = &D_800A4F1C;
*p |= 4;
if (D_800A4E8C + 0x100 == 0x134) {
func_80038668(D_800A4E86, 5);
func_80038668(D_800A4E86, 6);
func_80038668(D_800A4E86, 7);
}
}
break;
case 37:
{
u8 *p = &D_800A4F1C;
*p |= 8;
if (D_800A4E8C + 0x100 == 0x134) {
func_80038668(D_800A4E86, 8);
}
}
break;
case 38:
if ((D_800A4E8E & 1) != 0) {
D_8006A990 = 0;
D_800A4F20 = a1;
} else {
func_8002D904(a1 & 0xFFFF);
}
break;
case 41:
D_800A4F1C = 0;
break;
case 39:
D_800A4F1E = 1;
break;
case 40:
D_800A4F1E = 0;
func_80031CC8();
break;
}
}
.run/P36/agents/main__func_80032A74/residual.txt
+19
View File
@@ -0,0 +1,19 @@
src/800_b_2.c:func_80032A74: score 11 (COUNT; mine 422 ins, target 422) — not yet
register pairs (mine -> target, count): v1->v0 x4
insert mine[189:189] target[189:190]
189 -- | sw v1,20(s0)
delete mine[191:192] target[192:192]
191 sw v1,20(s0) | --
replace mine[249:252] target[249:252]
249 addu v1,v1,v0 | addu v0,v1,v0
250 addiu v1,v1,-15360 | addiu v0,v0,-15360
251 subu a1,a1,v1 | subu a1,a1,v0
insert mine[349:349] target[349:350]
349 -- | ori v0,v0,0x9f
delete mine[350:353] target[351:351]
350 lui v1,0x0 | --
351 lh v1,0(v1) | --
352 ori v0,v0,0x9f | --
insert mine[356:356] target[354:356]
356 -- | lui v1,0x0
357 -- | lh v1,0(v1)
.run/P36/agents/main__func_80032A74/sites.txt
+3
View File
@@ -0,0 +1,3 @@
NEEDED pin $2 line 5399
NEEDED barrier line 5498
NEEDED barrier line 5581
.run/P36/agents/main__func_80032A74/tu.txt
+2
View File
@@ -0,0 +1,2 @@
src/800_b_2.c
func_80032A74
.run/P36/agents/main__func_8003324C/body_free.c
+37
View File
@@ -0,0 +1,37 @@
void func_8003324C(s32 arg0) {
u8 *base;
u8 *e;
s32 off;
s32 code;
off = (u16)arg0 * 0x54;
base = (u8 *)D_800A46E8;
e = base + off;
code = *(u16 *)e & 0x3F;
switch (code) {
case 1: {
Ent30D80 *p;
s32 i;
i = 0;
p = (Ent30D80 *)(base + 0x2A0);
for (; i < 8; i++, p++) {
u8 *q = e + i;
if (q[0xE] != 0) {
q[0xE] = 0;
p->unk40 = 0;
if (p->unk4E != 0) {
func_80030D80(p, 0);
}
}
}
*(u16 *)e = 0;
break;
}
case 5:
func_80034650(e, 0);
break;
}
}
.run/P36/agents/main__func_8003324C/body_tree.c
+38
View File
@@ -0,0 +1,38 @@
void func_8003324C(s32 arg0) {
u8 *base;
u8 *e;
s32 off;
s32 code;
off = (u16)arg0 * 0x54;
base = (u8 *)D_800A46E8;
e = base + off;
code = *(u16 *)e & 0x3F;
switch (code) {
case 1: {
register Ent30D80 *p __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus9)
s32 i;
i = 0;
p = (Ent30D80 *)(base + 0x2A0);
__asm__ ("" :: "r"(base)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus9)
for (; i < 8; i++, p++) {
u8 *q = e + i;
if (q[0xE] != 0) {
q[0xE] = 0;
p->unk40 = 0;
if (p->unk4E != 0) {
func_80030D80(p, 0);
}
}
}
*(u16 *)e = 0;
break;
}
case 5:
func_80034650(e, 0);
break;
}
}
.run/P36/agents/main__func_8003324C/history.txt
+14
View File
@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 26 best 22 compiles 168 path R7 do-while @5737 + R7 do-while @5758
best-scoring single candidates of the last trace (move -> score [residual class]):
R7 do-while @5758 -> 22 [COUNT] (from 26)
R7 do-while @5738 -> 22 [COUNT] (from 26)
R7 do-while @5762 -> 22 [COUNT] (from 26)
R12 width code s32->u16 @5733 -> 26 [COUNT] (from 26)
R8 hoist tmp0 @5735 -> 26 [COUNT] (from 26)
R7 block @5752 -> 26 [COUNT] (from 26)
R5 swap + @5737 -> 26 [COUNT] (from 26)
R10 param-copy arg0 @5734 -> 26 [COUNT] (from 26)
R12 width code s32->s16 @5733 -> 26 [COUNT] (from 26)
R6 inline code @5738 -> 26 [COUNT] (from 26)
R8 temp tmp0 @5738 -> 26 [COUNT] (from 26)
R5 swap + @5748 -> 26 [COUNT] (from 26)
.run/P36/agents/main__func_8003324C/neighbours.txt
+1
View File
@@ -0,0 +1 @@
.run/P36/agents/main__func_8003324C/related.txt
+221
View File
@@ -0,0 +1,221 @@
=== lever-free bodies in main sharing a callee or global with func_8003324C (21 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80031CC8 (src/800_b_2.c:4266) shares 2: D_800A46E8 func_80034650 ---
void func_80031CC8(void) {
extern u16 D_800A46E8[];
extern void func_8003350C(s32 a0, s32 a1);
extern void func_80034650(u8 *a0, s32 a1);
u8 *p;
s32 i;
p = (u8 *)D_800A46E8;
i = 0;
do {
switch (*(u16 *)p & 0x3F) {
case 1:
if (p[0xA] != 0) {
func_8003350C(i, 1);
}
break;
case 5:
func_80034650(p, 0);
break;
}
i += 1;
p += 0x54;
} while (i < 8);
}
--- func_800346D0 (src/800_b_2.c:6925) shares 2: D_800A46E8 func_80030D80 ---
void func_800346D0(s32 arg0) {
S54 *p;
S54 *q;
Ent30D80 *e;
Ent30D80 *ebase;
s32 i;
s32 j;
s32 lo;
s32 hi;
p = (S54 *)D_800A46E8;
i = 0;
lo = (arg0 << 16) >> 16;
hi = arg0 >> 16;
ebase = (Ent30D80 *)((u8 *)D_800A46E8 + 0x2A0);
q = (S54 *)((u8 *)D_800A46E8 + 6);
do {
if (*(u16 *)p == 5 && *((u16 *)q - 1) == lo && (hi == 0 || hi == *(u16 *)q)) {
j = 0;
e = ebase;
do {
if (p->flg[j] != 0) {
func_80030D80(e, 0);
}
j++;
e++;
} while (j < 8);
*(u16 *)p = 0;
}
i++;
q++;
p++;
} while (i < 8);
}
--- func_80034314 (src/800_b_2.c:6768) shares 2: D_800A46E8 func_80034650 ---
s32 func_80034314(u32 arg0, u8 *p, u32 arg2) {
u32 flags;
Snd54 *e;
Rec12 *rec;
u8 *q;
s16 *pa;
s32 idx;
s32 ret;
s32 i;
s32 j;
s32 b1;
u32 x;
u32 y;
y = arg0 >> 16;
flags = arg2;
x = arg0;
b1 = p[1];
if (b1 == 0) {
rec = &D_80068A54[p[3]];
} else {
if (D_800A4EE8 == 0) {
return 0;
}
if (D_800A4EF0 != b1) {
return 0;
}
rec = *(Rec12 **)((u8 *)D_800A4EE8 + 0x18) + p[3];
}
idx = func_800348A8(arg0);
if (idx != 0) {
ret = idx;
idx--;
e = (Snd54 *)((u8 *)D_800A46E8 + idx * 0x54);
if (flags & 0x1000) {
e->unk1C[0].unk06 = 1;
e->unk1C[0].unk02 = 0x100;
e->unk1C[0].unk04 = ((s32)(flags & 0x7F) * 0x3FFF) >> 7;
if (flags & 0x2000) {
e->unk38 = D_8006AED8[(flags >> 8) & 0xF];
} else {
e->unk38 = 0;
e->unk39 = 0;
}
return ret;
}
if (e->unk08 != 0) {
return 0;
}
func_80034650(e, 0);
} else {
idx = func_8003310C(rec->unk04);
if (idx == 0) {
return 0;
}
ret = idx;
idx--;
e = (Snd54 *)((u8 *)D_800A46E8 + idx * 0x54);
}
e->unk37 = rec->unk08;
e->unk34 = b1;
e->unk0C = rec->unk00;
e->unk02 = rec->unk04;
e->unk10 = e->unk0C;
e->unk04 = x;
e->unk06 = y;
e->unk14 = 1;
e->unk17 = p[2];
e->unk16 = 0;
e->unk18 = 0x7FFF;
e->unk08 = rec->unk06;
e->unk50 = 0;
e->unk52 = 0;
if (rec->unk08 & 0x10) {
e->unk48 = 1;
} else {
e->unk48 = 0;
}
if (rec->unk08 & 4) {
e->unk1A = 0x400;
} else if (rec->unk08 & 8) {
e->unk1A = 0x200;
} else {
e->unk1A = 0x5F;
}
e->unk36 = 0;
pa = &e->unk1C[0].unk00;
for (i = 0; i < 3; i++, pa = (s16 *)((u8 *)pa + 8)) {
pa[1] = 0x100;
*((u8 *)pa + 6) = 0;
if (i != 0) {
pa[0] = 0x3FFF;
pa[2] = 0x3FFF;
} else if (flags & 0x1000) {
pa[0] = ((flags & 0x7F) * 0x3FFF) >> 7;
pa[2] = ((flags & 0x7F) * 0x3FFF) >> 7;
if (flags & 0x2000) {
u8 tv = D_8006AED8[(flags >> 8) & 0xF];
e->unk38 = tv;
e->unk39 = tv;
}
} else {
pa[0] = 0x3FFF;
pa[2] = 0x3FFF;
e->unk38 = 0;
e->unk39 = 0;
}
}
q = e->unk3A;
for (j = 7; j >= 0; j--) {
*q++ = 0;
}
e->unk00 = 5;
return ret;
}
--- func_800342E8 (src/800_b_2.c:6687) shares 1: D_800A46E8 ---
void func_800342E8(u8 *a0, s32 a1) {
u32 t = a1 * 84 + (u32)D_800A46E8;
*(u8 *)(t + (u32)a0 + 0x3A) = 0;
}
--- func_800331D4 (src/800_b_2.c:5624) shares 1: D_800A46E8 ---
s32 func_800331D4(s32 arg0) {
u16 *p;
s32 i;
p = D_800A46E8;
for (i = 0; i < 8; i++, p += 0x2A) {
if ((*p & 0x3F) == 1 && p[2] == (arg0 & 0xFFFF) && (((u32)arg0 >> 16) == 0 || ((u32)arg0 >> 16) == p[3])) {
return ++i;
}
}
return 0;
}
--- func_800347C8 (src/800_b_2.c:6975) shares 1: D_800A46E8 ---
void func_800347C8(s32 arg0) {
Sl *e;
s32 i;
e = (Sl *)D_800A46E8;
for (i = 0; i < 8; i++, e++) {
if (e->state == 5 && e->id == (s16)arg0 &&
((arg0 >> 16) == 0 || (arg0 >> 16) == e->group)) {
e->active = 1;
}
}
}
.run/P36/agents/main__func_8003324C/residual.txt
+40
View File
@@ -0,0 +1,40 @@
src/800_b_2.c:func_8003324C: score 26 (COUNT; mine 58 ins, target 54) — not yet
register pairs (mine -> target, count): s3->s2 x2, s2->s0 x1
replace mine[0:1] target[0:1]
0 addiu sp,sp,-40 | addiu sp,sp,-32
delete mine[9:12] target[9:9]
9 sw s3,28(sp) | --
10 addu s3,v0,a0 | --
11 sw ra,32(sp) | --
insert mine[13:13] target[10:12]
13 -- | addu s2,v0,a0
14 -- | sw ra,28(sp)
replace mine[15:16] target[14:15]
15 lhu v0,0(s3) | lhu v0,0(s2)
replace mine[21:24] target[20:23]
21 beq v1,v0,6a50 <func_8003324C+0xc0> | beq v1,v0,6a44 <func_8003324C+0xb4>
22 move a0,s3 | move a0,s2
23 j 6a58 <func_8003324C+0xc8> | j 6a4c <func_8003324C+0xbc>
replace mine[26:29] target[25:27]
26 addiu s2,a0,672 | addiu s0,a0,672
27 addiu s0,a0,750 | addu v1,s2,s1
28 addu v1,s3,s1 | --
replace mine[34:35] target[32:33]
34 lbu v0,0(s0) | lbu v0,78(s0)
replace mine[37:39] target[35:37]
37 sw zero,-14(s0) | sw zero,64(s0)
38 move a0,s2 | move a0,s0
insert mine[42:42] target[40:42]
42 -- | slti v0,s1,8
43 -- | bnez v0,69f8 <func_8003324C+0x68>
replace mine[43:48] target[43:45]
43 slti v0,s1,8 | j 6a4c <func_8003324C+0xbc>
44 bnez v0,6a00 <func_8003324C+0x70> | sh zero,0(s2)
45 addiu s2,s2,84 | --
46 j 6a58 <func_8003324C+0xc8> | --
47 sh zero,0(s3) | --
replace mine[50:52] target[47:48]
50 lw ra,32(sp) | lw ra,28(sp)
51 lw s3,28(sp) | --
replace mine[55:56] target[51:52]
55 addiu sp,sp,40 | addiu sp,sp,32
.run/P36/agents/main__func_8003324C/sites.txt
+2
View File
@@ -0,0 +1,2 @@
NEEDED pin $16 line 5744
NEEDED keepalive line 5749
.run/P36/agents/main__func_8003324C/tu.txt
+2
View File
@@ -0,0 +1,2 @@
src/800_b_2.c
func_8003324C
.run/P36/agents/main__func_800335B8/body_free.c
+57
View File
@@ -0,0 +1,57 @@
void func_800335B8(s32 a0, s32 a1) {
u8 *e = (u8 *)D_800A46E8 + a0 * 0x54;
u8 *p;
s32 a2;
s32 v1;
s32 t0;
if ((*(u16 *)e & 0x3F) != 1) {
return;
}
/* copy-fence: keeps the `addu $t0,$a1,$zero` param copy alive (cse would
otherwise propagate $a1 into branch 2's `andi $a1,$t0,0x7F`). */
t0 = a1;
if (a1 & 0x1000) {
v1 = 0;
a2 = *(u16 *)(e + 0xC);
a1 = a1 & 0x7F;
t0 = 1;
p = (u8 *)D_800A46E8 + 0x2A0;
for (; v1 < 8; v1++, p += 0x54) {
u8 *rec;
if (a2 == 0) {
return;
}
if (*(u8 *)(e + v1 + 0xE) != 0) {
/* copy-fence: materialises the target's in-loop
`addu $v0,$a0,$zero` (reorg then steals it for the
beqz delay slot). Walking pointer, NOT p + v1*0x54,
so loop strength reduction still owns $a0. */
rec = p;
a2--;
*(u16 *)(rec + 0x48) = a1;
*(u8 *)(rec + 0x4F) = t0;
}
}
} else if (a1 & 0x2000) {
a2 = *(u16 *)(e + 0xC);
v1 = 0;
a1 = t0 & 0x7F;
p = (u8 *)D_800A46E8 + 0x2A0;
for (; v1 < 8; v1++) {
u8 *rec;
if (a2 == 0) {
return;
}
if (*(u8 *)(e + v1 + 0xE) != 0) {
rec = p + v1 * 0x54;
if (*(u8 *)(rec + 0x35) != 0) {
*(u8 *)(rec + 0x53) = a1;
}
a2--;
}
}
}
}
.run/P36/agents/main__func_800335B8/body_tree.c
+59
View File
@@ -0,0 +1,59 @@
void func_800335B8(s32 a0, s32 a1) {
u8 *e = (u8 *)D_800A46E8 + a0 * 0x54;
u8 *p;
s32 a2;
s32 v1;
s32 t0;
if ((*(u16 *)e & 0x3F) != 1) {
return;
}
/* copy-fence: keeps the `addu $t0,$a1,$zero` param copy alive (cse would
otherwise propagate $a1 into branch 2's `andi $a1,$t0,0x7F`). */
t0 = a1;
__asm__ ("" : "=r"(t0) : "0"(t0)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9)
if (a1 & 0x1000) {
v1 = 0;
a2 = *(u16 *)(e + 0xC);
a1 = a1 & 0x7F;
t0 = 1;
p = (u8 *)D_800A46E8 + 0x2A0;
for (; v1 < 8; v1++, p += 0x54) {
u8 *rec;
if (a2 == 0) {
return;
}
if (*(u8 *)(e + v1 + 0xE) != 0) {
/* copy-fence: materialises the target's in-loop
`addu $v0,$a0,$zero` (reorg then steals it for the
beqz delay slot). Walking pointer, NOT p + v1*0x54,
so loop strength reduction still owns $a0. */
rec = p;
__asm__ ("" : "=r"(rec) : "0"(rec)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9)
a2--;
*(u16 *)(rec + 0x48) = a1;
*(u8 *)(rec + 0x4F) = t0;
}
}
} else if (a1 & 0x2000) {
a2 = *(u16 *)(e + 0xC);
v1 = 0;
a1 = t0 & 0x7F;
p = (u8 *)D_800A46E8 + 0x2A0;
for (; v1 < 8; v1++) {
u8 *rec;
if (a2 == 0) {
return;
}
if (*(u8 *)(e + v1 + 0xE) != 0) {
rec = p + v1 * 0x54;
if (*(u8 *)(rec + 0x35) != 0) {
*(u8 *)(rec + 0x53) = a1;
}
a2--;
}
}
}
}
.run/P36/agents/main__func_800335B8/history.txt
+14
View File
@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 8 best 7 compiles 183 path R12 width t0 s32->u16 @5905 + R6 inline a1 @5940
best-scoring single candidates of the last trace (move -> score [residual class]):
R6 inline a1 @5940 -> 7 [COUNT] (from 8)
R12 width t0 s32->u16 @5905 -> 8 [COUNT] (from 8)
R8 temp tmp0 @5917 -> 8 [COUNT] (from 8)
R18 bystander @5916->5919 -> 8 [COUNT] (from 8)
R7 block @5917 -> 8 [COUNT] (from 8)
R10 param-copy a0 @5906 -> 8 [COUNT] (from 8)
R12 width t0 s32->s16 @5905 -> 8 [COUNT] (from 8)
R6 inline p @5941 -> 8 [COUNT] (from 8)
R8 base tmp0 @5917 -> 8 [COUNT] (from 8)
R7 do-while @5917 -> 8 [COUNT] (from 8)
R9 swap-stmts @5931 -> 8 [COUNT] (from 8)
R10 param-copy a1 @5906 -> 8 [COUNT] (from 8)
.run/P36/agents/main__func_800335B8/neighbours.txt
+1
View File
@@ -0,0 +1 @@
.run/P36/agents/main__func_800335B8/related.txt
+81
View File
@@ -0,0 +1,81 @@
=== lever-free bodies in main sharing a callee or global with func_800335B8 (18 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_800342E8 (src/800_b_2.c:6687) shares 1: D_800A46E8 ---
void func_800342E8(u8 *a0, s32 a1) {
u32 t = a1 * 84 + (u32)D_800A46E8;
*(u8 *)(t + (u32)a0 + 0x3A) = 0;
}
--- func_800331D4 (src/800_b_2.c:5624) shares 1: D_800A46E8 ---
s32 func_800331D4(s32 arg0) {
u16 *p;
s32 i;
p = D_800A46E8;
for (i = 0; i < 8; i++, p += 0x2A) {
if ((*p & 0x3F) == 1 && p[2] == (arg0 & 0xFFFF) && (((u32)arg0 >> 16) == 0 || ((u32)arg0 >> 16) == p[3])) {
return ++i;
}
}
return 0;
}
--- func_800347C8 (src/800_b_2.c:6975) shares 1: D_800A46E8 ---
void func_800347C8(s32 arg0) {
Sl *e;
s32 i;
e = (Sl *)D_800A46E8;
for (i = 0; i < 8; i++, e++) {
if (e->state == 5 && e->id == (s16)arg0 &&
((arg0 >> 16) == 0 || (arg0 >> 16) == e->group)) {
e->active = 1;
}
}
}
--- func_80034844 (src/800_b_2.c:6991) shares 1: D_800A46E8 ---
void func_80034844(void)
{
u8 *p = (u8 *)D_800A46E8;
s32 i;
for (i = 0; i < 8; i++, p += 0x54) {
if (*(u16 *)p == 5 && !(p[0x37] & 2)) {
p[0x16] = 1;
*(u16 *)(p + 0x1A) = 0x220;
}
}
}
--- func_800348A8 (src/800_b_2.c:7006) shares 1: D_800A46E8 ---
s32 func_800348A8(u32 arg0) {
u16 *p;
s32 i;
p = D_800A46E8;
for (i = 0; i < 8; i++, p += 0x2A) {
if (p[0] == 5 && p[2] == (arg0 & 0xFFFF) && ((arg0 >> 16) == 0 || p[3] == (arg0 >> 16))) {
return ++i;
}
}
return 0;
}
--- func_80031D70 (src/800_b_2.c:4291) shares 1: D_800A46E8 ---
void func_80031D70(void) {
extern u16 D_800A46E8[];
extern void func_8003350C(s32 a0, s32 a1);
u16 *p;
s32 i;
p = D_800A46E8;
i = 0;
do {
if (((*p & 0x3F) == 1) && (*(u8 *)(p + 5) != 0)) {
func_8003350C(i, 0);
}
i += 1;
p += 0x2A;
} while (i < 8);
}
.run/P36/agents/main__func_800335B8/residual.txt
+16
View File
@@ -0,0 +1,16 @@
src/800_b_2.c:func_800335B8: score 8 (COUNT; mine 59 ins, target 60) — not yet
register pairs (mine -> target, count): a1->t0 x1
replace mine[11:12] target[11:13]
11 bne v0,v1,6de0 <func_800335B8+0xe4> | bne v0,v1,6de4 <func_800335B8+0xe8>
12 -- | move t0,a1
replace mine[18:19] target[19:20]
18 addiu a0,a0,751 | addiu a0,a0,672
replace mine[24:25] target[25:26]
24 nop | move v0,a0
replace mine[26:28] target[27:29]
26 sh a1,-7(a0) | sh a1,72(v0)
27 sb t0,0(a0) | sb t0,79(v0)
replace mine[32:33] target[33:34]
32 j 6de0 <func_800335B8+0xe4> | j 6de4 <func_800335B8+0xe8>
replace mine[39:40] target[40:41]
39 andi a1,a1,0x7f | andi a1,t0,0x7f
.run/P36/agents/main__func_800335B8/sites.txt
+2
View File
@@ -0,0 +1,2 @@
NEEDED launder line 5917
NEEDED launder line 5936
.run/P36/agents/main__func_800335B8/tu.txt
+2
View File
@@ -0,0 +1,2 @@
src/800_b_2.c
func_800335B8
.run/P36/agents/ov_SC03_105__func_80181C84/body_free.c
+179
View File
@@ -0,0 +1,179 @@
void func_80181C84(s32 a0)
{
/* LOAD-BEARING pins: without them the entity lands in $s2 and the loop counter in $s1
* (measured, 40 rows). $s2=i, $s3=n, and q pinned to $v1 -- unpinned, local-alloc gives
* q=$a0 / (r%q)=$v1, the exact inverse of the target in BOTH div loops (20 rows). */
s32 s1;
Local_80181C84 local;
u8 *b58;
u16 tE;
u16 t34;
u16 t34b;
s32 i;
s32 n;
s32 q;
s32 r;
s32 p;
s32 tA;
s32 t6;
s1 = a0;
/* LOAD-BEARING: `u8 *` base + *(s16 *)(b58 + 6), the TU:5099/7196 idiom -- this is what
* parks &D_80126B58 in $s0 across the whole switch (prologue la, two `lh 0x6($s0)`). */
b58 = (u8 *)&D_80126B58;
switch (*(u16 *)(s1 + 0x34)) {
case 0:
*(s32 *)(s1 + 0x1C) = 0x40;
/* LOAD-BEARING: read 0x34 into a temp BEFORE the 0xE0 read-modify-write, store it after.
* Written inline, the lhu sinks below the lw and the +1 lands in the wrong register. */
t34 = *(u16 *)(s1 + 0x34) + 1;
*(s32 *)(s1 + 0xE0) = *(s32 *)(s1 + 0xE0) & ~0x10;
*(u16 *)(s1 + 0x34) = t34;
case 1:
if (func_8012BEE8(s1) == 0) {
return;
}
*(s16 *)(s1 + 0xA) = -0x102;
*(s16 *)(s1 + 0xE) = -0x1C8;
*(s32 *)(s1 + 0x1C) = 0x20;
*(u16 *)(s1 + 0x6) = 0;
*(s32 *)(s1 + 0x58) = ((s32)D_8018E2B8 | 0x40000000) | 0x20000000;
*(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;
func_80184604(*(s16 *)(b58 + 6) > 0 ? 4 : 6);
local.f0 = *(u16 *)(s1 + 0x6);
local.f1 = *(u16 *)(s1 + 0xA);
tE = *(u16 *)(s1 + 0xE);
local.f3 = 0x170;
local.f4 = 0x8000;
local.f5 = 0;
local.f6 = 0x7FFF;
local.f7 = 0x80;
local.f2 = tE;
i = 0;
do {
local.f8 = i << 10;
func_8012C51C(&local, s1);
i++;
} while (i < 4);
break;
case 2:
if (func_8012BEE8(s1) != 0) {
func_8018364C((void *)s1);
/* LOAD-BEARING: the duplicated store (§224), not a ternary. As `<= 0 ? 4 : 3` the
* shape is right but the result takes $v1; only the if/else lets it reuse the
* dead compare's $v0. Polarity matters too: the DEFAULT (delay-slot) value is 3. */
if (*(s16 *)(b58 + 6) <= 0) {
*(u16 *)(s1 + 0x34) = 4;
} else {
*(u16 *)(s1 + 0x34) = 3;
}
func_8002D4C8(0xC2D, 0);
}
break;
case 3:
*(u16 *)(s1 + 0x102) = *(u16 *)(s1 + 0x102) + 0x20;
if ((s16)*(u16 *)(s1 + 0x102) > 0x200) {
*(u16 *)(s1 + 0x102) = 0x200;
func_8013C9C4(D_8018AAA4);
*(u16 *)(s1 + 0x34) = 5;
*(s32 *)(s1 + 0x1C) = 0x40;
func_8002D4C8(0xC06, 0);
n = D_8018E88C[D_801BCBBC];
for (i = 0; i < n; i++) {
p = ((s32 (*)(void *, s16, s32))func_80183D38)((void *)s1, 0, 0);
if (p != 0) {
r = rand();
q = 0x1C0 / n;
/* LOAD-BEARING: load 0x6 BEFORE storing 0xA (they may alias, so gcc will
* not hoist it afterwards), fold the +-0x40 into t6, and write the sum
* back THROUGH t6 so it keeps t6's register instead of taking a new one. */
tA = *(u16 *)(p + 0xA) - 0xE0;
t6 = *(u16 *)(p + 0x6) + 0x40;
*(u16 *)(p + 0xA) = tA;
t6 = t6 + (i * q + r % q);
*(u16 *)(p + 0x6) = t6;
}
}
}
break;
case 4:
*(u16 *)(s1 + 0x102) = *(u16 *)(s1 + 0x102) - 0x20;
if ((s16)*(u16 *)(s1 + 0x102) < -0x200) {
*(s16 *)(s1 + 0x102) = -0x200;
func_8013C9C4(D_8018AAA4);
*(u16 *)(s1 + 0x34) = 6;
*(s32 *)(s1 + 0x1C) = 0x40;
func_8002D4C8(0xC06, 0);
n = D_8018E88C[D_801BCBBC];
for (i = 0; i < n; i++) {
p = ((s32 (*)(void *, s16, s32))func_80183D38)((void *)s1, 0, 0);
if (p != 0) {
r = rand();
q = 0x1C0 / n;
/* LOAD-BEARING: load 0x6 BEFORE storing 0xA (they may alias, so gcc will
* not hoist it afterwards), fold the +-0x40 into t6, and write the sum
* back THROUGH t6 so it keeps t6's register instead of taking a new one. */
tA = *(u16 *)(p + 0xA) - 0xE0;
t6 = *(u16 *)(p + 0x6) - 0x40;
*(u16 *)(p + 0xA) = tA;
t6 = t6 - (i * q + r % q);
*(u16 *)(p + 0x6) = t6;
}
}
}
break;
case 5:
case 6:
if (func_8012BEE8(s1) != 0) {
*(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 2;
}
break;
case 7:
*(u16 *)(s1 + 0x102) = *(u16 *)(s1 + 0x102) - 0x20;
if ((s16)*(u16 *)(s1 + 0x102) < 0) {
goto lShared;
}
break;
case 8:
*(u16 *)(s1 + 0x102) = *(u16 *)(s1 + 0x102) + 0x20;
if ((s16)*(u16 *)(s1 + 0x102) <= 0) {
break;
}
lShared:
/* LOAD-BEARING: a SEPARATE temp from case 0's t34 (sharing one kills case 0's coalesce),
* and the 0x34 load must HEAD the block -- it is a branch target, so reorg cannot
* speculate a load into case 8's blez delay slot, which is why the target has a nop. */
t34b = *(u16 *)(s1 + 0x34) + 1;
*(s32 *)(s1 + 0x1C) = 0x10;
*(u16 *)(s1 + 0x102) = 0;
*(s32 *)(s1 + 0xE0) = *(s32 *)(s1 + 0xE0) | 0x10;
*(u16 *)(s1 + 0x34) = t34b;
break;
case 9:
case 10:
if (func_8012BEE8(s1) != 0) {
func_801843DC(s1);
*(s32 *)(s1 + 0x1C) = 0x10;
*(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;
}
break;
case 11:
if (func_8012BEE8(s1) == 0) {
return;
}
func_80183F0C((void *)s1);
*(s32 *)(s1 + 0x4) = 0xFFF80000;
*(s32 *)(s1 + 0x8) = 0xFE5E0000;
*(s32 *)(s1 + 0xC) = 0xFE380000;
*(s32 *)(s1 + 0x58) = ((s32)D_8018E288 | 0x40000000) | 0x20000000;
return;
}
func_80183DA0(s1);
func_801834A4(s1);
func_801839A4(s1, 0x30);
if (func_8018233C(s1) == 1) {
func_801843DC(s1);
*(s32 *)(s1 + 0xE0) = *(s32 *)(s1 + 0xE0) | 0x10;
}
}
.run/P36/agents/ov_SC03_105__func_80181C84/body_tree.c
+179
View File
@@ -0,0 +1,179 @@
void func_80181C84(s32 a0)
{
/* LOAD-BEARING pins: without them the entity lands in $s2 and the loop counter in $s1
* (measured, 40 rows). $s2=i, $s3=n, and q pinned to $v1 -- unpinned, local-alloc gives
* q=$a0 / (r%q)=$v1, the exact inverse of the target in BOTH div loops (20 rows). */
s32 s1;
Local_80181C84 local;
u8 *b58;
u16 tE;
u16 t34;
u16 t34b;
register s32 i __asm__("$18"); // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus10)
s32 n;
register s32 q __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus10)
s32 r;
s32 p;
s32 tA;
s32 t6;
s1 = a0;
/* LOAD-BEARING: `u8 *` base + *(s16 *)(b58 + 6), the TU:5099/7196 idiom -- this is what
* parks &D_80126B58 in $s0 across the whole switch (prologue la, two `lh 0x6($s0)`). */
b58 = (u8 *)&D_80126B58;
switch (*(u16 *)(s1 + 0x34)) {
case 0:
*(s32 *)(s1 + 0x1C) = 0x40;
/* LOAD-BEARING: read 0x34 into a temp BEFORE the 0xE0 read-modify-write, store it after.
* Written inline, the lhu sinks below the lw and the +1 lands in the wrong register. */
t34 = *(u16 *)(s1 + 0x34) + 1;
*(s32 *)(s1 + 0xE0) = *(s32 *)(s1 + 0xE0) & ~0x10;
*(u16 *)(s1 + 0x34) = t34;
case 1:
if (func_8012BEE8(s1) == 0) {
return;
}
*(s16 *)(s1 + 0xA) = -0x102;
*(s16 *)(s1 + 0xE) = -0x1C8;
*(s32 *)(s1 + 0x1C) = 0x20;
*(u16 *)(s1 + 0x6) = 0;
*(s32 *)(s1 + 0x58) = ((s32)D_8018E2B8 | 0x40000000) | 0x20000000;
*(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;
func_80184604(*(s16 *)(b58 + 6) > 0 ? 4 : 6);
local.f0 = *(u16 *)(s1 + 0x6);
local.f1 = *(u16 *)(s1 + 0xA);
tE = *(u16 *)(s1 + 0xE);
local.f3 = 0x170;
local.f4 = 0x8000;
local.f5 = 0;
local.f6 = 0x7FFF;
local.f7 = 0x80;
local.f2 = tE;
i = 0;
do {
local.f8 = i << 10;
func_8012C51C(&local, s1);
i++;
} while (i < 4);
break;
case 2:
if (func_8012BEE8(s1) != 0) {
func_8018364C((void *)s1);
/* LOAD-BEARING: the duplicated store (§224), not a ternary. As `<= 0 ? 4 : 3` the
* shape is right but the result takes $v1; only the if/else lets it reuse the
* dead compare's $v0. Polarity matters too: the DEFAULT (delay-slot) value is 3. */
if (*(s16 *)(b58 + 6) <= 0) {
*(u16 *)(s1 + 0x34) = 4;
} else {
*(u16 *)(s1 + 0x34) = 3;
}
func_8002D4C8(0xC2D, 0);
}
break;
case 3:
*(u16 *)(s1 + 0x102) = *(u16 *)(s1 + 0x102) + 0x20;
if ((s16)*(u16 *)(s1 + 0x102) > 0x200) {
*(u16 *)(s1 + 0x102) = 0x200;
func_8013C9C4(D_8018AAA4);
*(u16 *)(s1 + 0x34) = 5;
*(s32 *)(s1 + 0x1C) = 0x40;
func_8002D4C8(0xC06, 0);
n = D_8018E88C[D_801BCBBC];
for (i = 0; i < n; i++) {
p = ((s32 (*)(void *, s16, s32))func_80183D38)((void *)s1, 0, 0);
if (p != 0) {
r = rand();
q = 0x1C0 / n;
/* LOAD-BEARING: load 0x6 BEFORE storing 0xA (they may alias, so gcc will
* not hoist it afterwards), fold the +-0x40 into t6, and write the sum
* back THROUGH t6 so it keeps t6's register instead of taking a new one. */
tA = *(u16 *)(p + 0xA) - 0xE0;
t6 = *(u16 *)(p + 0x6) + 0x40;
*(u16 *)(p + 0xA) = tA;
t6 = t6 + (i * q + r % q);
*(u16 *)(p + 0x6) = t6;
}
}
}
break;
case 4:
*(u16 *)(s1 + 0x102) = *(u16 *)(s1 + 0x102) - 0x20;
if ((s16)*(u16 *)(s1 + 0x102) < -0x200) {
*(s16 *)(s1 + 0x102) = -0x200;
func_8013C9C4(D_8018AAA4);
*(u16 *)(s1 + 0x34) = 6;
*(s32 *)(s1 + 0x1C) = 0x40;
func_8002D4C8(0xC06, 0);
n = D_8018E88C[D_801BCBBC];
for (i = 0; i < n; i++) {
p = ((s32 (*)(void *, s16, s32))func_80183D38)((void *)s1, 0, 0);
if (p != 0) {
r = rand();
q = 0x1C0 / n;
/* LOAD-BEARING: load 0x6 BEFORE storing 0xA (they may alias, so gcc will
* not hoist it afterwards), fold the +-0x40 into t6, and write the sum
* back THROUGH t6 so it keeps t6's register instead of taking a new one. */
tA = *(u16 *)(p + 0xA) - 0xE0;
t6 = *(u16 *)(p + 0x6) - 0x40;
*(u16 *)(p + 0xA) = tA;
t6 = t6 - (i * q + r % q);
*(u16 *)(p + 0x6) = t6;
}
}
}
break;
case 5:
case 6:
if (func_8012BEE8(s1) != 0) {
*(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 2;
}
break;
case 7:
*(u16 *)(s1 + 0x102) = *(u16 *)(s1 + 0x102) - 0x20;
if ((s16)*(u16 *)(s1 + 0x102) < 0) {
goto lShared;
}
break;
case 8:
*(u16 *)(s1 + 0x102) = *(u16 *)(s1 + 0x102) + 0x20;
if ((s16)*(u16 *)(s1 + 0x102) <= 0) {
break;
}
lShared:
/* LOAD-BEARING: a SEPARATE temp from case 0's t34 (sharing one kills case 0's coalesce),
* and the 0x34 load must HEAD the block -- it is a branch target, so reorg cannot
* speculate a load into case 8's blez delay slot, which is why the target has a nop. */
t34b = *(u16 *)(s1 + 0x34) + 1;
*(s32 *)(s1 + 0x1C) = 0x10;
*(u16 *)(s1 + 0x102) = 0;
*(s32 *)(s1 + 0xE0) = *(s32 *)(s1 + 0xE0) | 0x10;
*(u16 *)(s1 + 0x34) = t34b;
break;
case 9:
case 10:
if (func_8012BEE8(s1) != 0) {
func_801843DC(s1);
*(s32 *)(s1 + 0x1C) = 0x10;
*(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;
}
break;
case 11:
if (func_8012BEE8(s1) == 0) {
return;
}
func_80183F0C((void *)s1);
*(s32 *)(s1 + 0x4) = 0xFFF80000;
*(s32 *)(s1 + 0x8) = 0xFE5E0000;
*(s32 *)(s1 + 0xC) = 0xFE380000;
*(s32 *)(s1 + 0x58) = ((s32)D_8018E288 | 0x40000000) | 0x20000000;
return;
}
func_80183DA0(s1);
func_801834A4(s1);
func_801839A4(s1, 0x30);
if (func_8018233C(s1) == 1) {
func_801843DC(s1);
*(s32 *)(s1 + 0xE0) = *(s32 *)(s1 + 0xE0) | 0x10;
}
}
.run/P36/agents/ov_SC03_105__func_80181C84/history.txt
+15
View File
@@ -0,0 +1,15 @@
s3: verdict BUDGET start 96 best 13 compiles 400 path R7 do-while @2971 + R7 do-while @3020
s3b: verdict BUDGET start 96 best 13 compiles 400 path R7 do-while @2971 + R7 do-while @3020
best-scoring single candidates of the last trace (move -> score [residual class]):
R7 do-while @3020 -> 13 [COUNT] (from 16)
R7 do-while @3020 -> 13 [COUNT] (from 16)
R7 block @3052 -> 13 [COUNT] (from 13)
R5 swap + @3028 -> 13 [COUNT] (from 13)
R9 swap-stmts @3052 -> 13 [COUNT] (from 13)
R10 param-alias s1->a0 @2954 -> 13 [COUNT] (from 13)
R2 decl-order 1,0 -> 13 [COUNT] (from 13)
R7 block @3012 -> 13 [COUNT] (from 13)
R7 block @3014 -> 13 [COUNT] (from 13)
R9 swap-stmts @3053 -> 13 [COUNT] (from 13)
R7 block @3018 -> 13 [COUNT] (from 13)
R7 do-while @3018 -> 13 [COUNT] (from 13)
.run/P36/agents/ov_SC03_105__func_80181C84/neighbours.txt
+1
View File
@@ -0,0 +1 @@
.run/P36/agents/ov_SC03_105__func_80181C84/related.txt
+706
View File
@@ -0,0 +1,706 @@
=== lever-free bodies in ov_SC03_105 sharing a callee or global with func_80181C84 (123 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_801813BC (src/ov_SC03_105/ov_SC03_105_jr_801813BC.c:2955) shares 8: D_80126B58 D_8018E288 D_801BCBBC func_8002D4C8 func_8012BEE8 func_8018233C func_80183F0C func_80184604 ---
void func_801813BC(s32 a0) {
s16 sp10[8];
u8 *b58 = (u8 *)&D_80126B58;
s32 d1;
s32 d3;
s32 d5;
s32 c;
s32 t;
s32 tneg;
s32 tpos;
switch (*(u16 *)(a0 + 0x34)) {
case 0:
*(s32 *)(a0 + 0x1C) = 0x20;
func_8012E8A8((u8 *)a0);
*(u16 *)(a0 + 0x34) = 0xA;
*(s32 *)(a0 + 0x58) = ((s32)D_8018E2A8 | 0x40000000) | 0x20000000;
func_80183EE8();
func_80184604(8);
/* fallthrough */
case 10:
if (func_8012BEE8(a0) != 0) {
func_8012E88C((u8 *)a0);
*(s32 *)(a0 + 0x1C) = 1;
*(u16 *)(a0 + 0x34) = 1;
t = (rand() & 1) << 2;
*(s32 *)(a0 + 0xE0) |= t;
*(s32 *)(a0 + 0x4) = *(s32 *)(t + (s32)D_8018E844);
*(s32 *)(a0 + 0x8) = 0xFEFE0000;
*(s32 *)(a0 + 0xC) = *(s32 *)(b58 + 0xC);
func_8012B200((u8 *)a0);
func_801831E0(a0, 0);
func_8002D4C8(0x729, 0);
}
break;
case 1:
d1 = func_8004787C((*(s32 *)(a0 + 0x1C) << 5) & 0x7E0)
- func_8004787C(((*(s32 *)(a0 + 0x1C) - 1) << 5) & 0x7E0);
*(s32 *)(a0 + 0x14) = d1 * -0xC00;
func_80183CA4(a0);
c = *(s32 *)(a0 + 0x1C) + 1;
*(s32 *)(a0 + 0x1C) = c;
if (c >= 0x21) {
*(s32 *)(a0 + 0x1C) = 0x1E;
*(u16 *)(a0 + 0x34) += 1;
}
func_801831E0(a0, 3);
break;
case 2:
if (func_8012BEE8(a0) != 0) {
*(s32 *)(a0 + 0x1C) = 0x20;
*(u16 *)(a0 + 0x34) += 1;
}
func_801831E0(a0, 2);
break;
case 3:
d3 = func_8004787C((*(s32 *)(a0 + 0x1C) << 5) & 0x7E0)
- func_8004787C(((*(s32 *)(a0 + 0x1C) - 1) << 5) & 0x7E0);
*(s32 *)(a0 + 0x14) = d3 * -0xC00;
func_80183CA4(a0);
c = *(s32 *)(a0 + 0x1C) + 1;
*(s32 *)(a0 + 0x1C) = c;
if (c >= 0x41) {
*(s32 *)(a0 + 0x1C) = 0x1E;
*(u16 *)(a0 + 0x34) += 1;
func_8002D4C8(0x7A8, 0);
}
func_801831E0(a0, 3);
break;
case 4:
if (func_8012BEE8(a0) != 0) {
*(s32 *)(a0 + 0x1C) = 1;
*(u16 *)(a0 + 0x34) += 1;
if (*(s32 *)(a0 + 0xE0) & 4) {
tneg = -0xC0000 - D_801BCBBC * 0x20000;
*(s32 *)(a0 + 0x10) = tneg;
} else {
tpos = D_801BCBBC * 0x20000 + 0xC0000;
*(s32 *)(a0 + 0x10) = tpos;
}
*(s32 *)(a0 + 0xE0) |= (rand() & 1) << 3;
*(u16 *)(a0 + 0x5C) = *(u16 *)(*(s32 *)(a0 + 0x78) + 2);
}
func_801831E0(a0, 1);
break;
case 5:
d5 = func_8004787C((*(s32 *)(a0 + 0x1C) << 6) & 0x7C0)
- func_8004787C(((*(s32 *)(a0 + 0x1C) - 1) << 6) & 0x7C0);
*(s32 *)(a0 + 0x14) = d5 * -0xC00;
sp10[0] = *(s32 *)(a0 + 0x10) >> 8;
sp10[1] = *(s32 *)(a0 + 0x14) >> 8;
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x14) = func_80185628(D_800D3918, sp10);
if (func_80183CA4(a0) & 0x8000) {
if (*(s32 *)(a0 + 0xE0) & 8) {
*(s32 *)(a0 + 0x10) = -*(s32 *)(a0 + 0x10);
*(s32 *)(a0 + 0xE0) &= ~8;
} else {
*(u16 *)(a0 + 0x34) = 7;
func_8012B23C(a0);
*(u16 *)(a0 + 0x5C) = 0;
break;
}
}
c = *(s32 *)(a0 + 0x1C) + 1;
*(s32 *)(a0 + 0x1C) = c;
if (c >= 0x21) {
*(s32 *)(a0 + 0x1C) = 0x18;
*(u16 *)(a0 + 0x5C) = 0;
*(u16 *)(a0 + 0x34) += 1;
func_8002D4C8(0x7A8, 0);
}
func_80183174(a0, 1);
break;
case 6:
if (func_8012BEE8(a0) != 0) {
*(s32 *)(a0 + 0x1C) = 1;
*(u16 *)(a0 + 0x34) = 5;
*(u16 *)(a0 + 0x5C) = *(u16 *)(*(s32 *)(a0 + 0x78) + 2);
}
func_80183174(a0, 1);
break;
case 7:
if (func_80183CA4(a0) & 0x2000) {
*(s32 *)(a0 + 0x1C) = 0x18;
*(u16 *)(a0 + 0x34) += 1;
}
func_80183174(a0, 1);
break;
case 8:
if (func_8012BEE8(a0) == 0) {
func_80183174(a0, 1);
break;
}
*(s32 *)(a0 + 0x1C) = 0x1E;
*(u16 *)(a0 + 0x34) += 1;
func_80184604(-1);
break;
case 9:
if (func_8012BEE8(a0) != 0) {
func_80183F0C((void *)a0);
*(s32 *)(a0 + 0x4) = 0xFFF80000;
*(s32 *)(a0 + 0x8) = 0xFE5E0000;
*(s32 *)(a0 + 0xC) = 0xFE380000;
*(s32 *)(a0 + 0x58) = ((s32)D_8018E288 | 0x40000000) | 0x20000000;
*(s32 *)(a0 + 0x48) = 0;
*(s32 *)(a0 + 0xE0) &= ~4;
return;
}
break;
}
func_8018233C(a0);
}
--- func_801818E8 (src/ov_SC03_105/ov_SC03_105_jr_801813BC.c:3170) shares 7: D_801BCBBC func_8012BEE8 func_8018233C func_801839A4 func_80183D38 func_80183DA0 func_80183F0C ---
void func_801818E8(s32 a0) {
s32 s0 = a0;
s32 sp10[3]; /* world-space "to" vector handed to func_8012B77C */
s32 sp20; /* func_8012B77C output (packed angle pair) */
s32 t;
s32 v;
s32 p;
switch (*(u16 *)(s0 + 0x34)) {
case 0:
*(s16 *)&D_801BA5A4 = 0;
t = (s32)&D_8018E87C[(rand() & 1) * 8];
*(s16 *)((s32)sp10 + 0x2) = *(u16 *)(t + 0x0);
*(s16 *)((s32)sp10 + 0x6) = *(u16 *)(t + 0x2);
*(s16 *)((s32)sp10 + 0xA) = *(u16 *)(t + 0x4);
D_801BA594 = (u16 *)t;
func_8012B77C((s32)&sp20, s0 + 4, (s32)sp10);
*(s16 *)&D_801BA5A0 = sp20;
*(s16 *)&D_801BA5A2 = sp20 >> 16;
func_8018373C((void *)s0, 0xFFFC0000);
*(u16 *)(s0 + 0x34) += 1;
break;
case 1:
func_8012CBF4(s0);
if (func_80013478(s0 + 4, (s32)D_801BA594) < 0x101) {
*(u16 *)(s0 + 0x6) = D_801BA594[0];
*(u16 *)(s0 + 0xA) = D_801BA594[1];
*(u16 *)(s0 + 0xE) = D_801BA594[2];
*(u16 *)(s0 + 0x34) += 1;
*(s32 *)(s0 + 0x1C) = 0x10;
*(s16 *)&D_801BA5A0 = 0;
*(s16 *)&D_801BA5A2 = 0;
v = ((s32 (*)(void *))func_80183C20)((void *)s0);
*(s32 *)(s0 + 0xF0) = v;
*(s16 *)&D_801BA5A4 = v;
}
break;
case 2:
v = func_8012B608(*(s16 *)(*(s32 *)(s0 + 0x20) + 0x14), *(s32 *)(s0 + 0xF0), 0x8);
*(u16 *)(*(s32 *)(s0 + 0x20) + 0x14) += v;
if (func_8012BEE8(s0) != 0) {
*(s32 *)(s0 + 0x1C) = 0x100;
*(u16 *)(s0 + 0x34) += 1;
}
break;
case 3:
func_8018383C(s0, (s32)&D_8018E84C[D_801BCBBC * 16]);
if (func_80183A98((void *)s0) == 1 && D_801BCBBC == 2) {
p = ((s32 (*)(void *, s16, s32))func_80183D38)((void *)s0, 0, 0);
if (p != 0) {
*(u16 *)(p + 0xA) += 0x20;
}
}
v = func_8012B608(*(s16 *)(*(s32 *)(s0 + 0x20) + 0x14), *(s32 *)(s0 + 0xF0), 0x10);
*(u16 *)(*(s32 *)(s0 + 0x20) + 0x14) += v;
*(s16 *)&D_801BA5A4 = *(s32 *)(s0 + 0xF0);
if (func_8012BEE8(s0) != 0) {
*(s32 *)(s0 + 0xF0) = 0;
*(s32 *)(s0 + 0x1C) = 0x10;
*(u16 *)(s0 + 0x34) += 1;
*(s16 *)&D_801BA5A4 = 0;
sp10[0] = 0xFFF80000;
sp10[1] = 0xFE5E0000;
sp10[2] = 0xFE380000;
func_8012B77C((s32)&sp20, s0 + 4, (s32)sp10);
*(s16 *)&D_801BA5A0 = sp20;
*(s16 *)&D_801BA5A2 = sp20 >> 16;
func_8018373C((void *)s0, 0xFFFC0000);
}
break;
case 4:
v = func_8012B608(*(s16 *)(*(s32 *)(s0 + 0x20) + 0x14), *(s32 *)(s0 + 0xF0), 0x8);
*(u16 *)(*(s32 *)(s0 + 0x20) + 0x14) += v;
func_8012CBF4(s0);
sp10[0] = 0xFFF80000;
sp10[1] = 0xFE5E0000;
sp10[2] = 0xFE380000;
if (func_80013350(s0 + 4, (s32)sp10) < 0x41) {
func_80183F0C((void *)s0);
*(s32 *)(s0 + 0x4) = 0xFFF80000;
*(s32 *)(s0 + 0x8) = 0xFE5E0000;
*(s32 *)(s0 + 0xC) = 0xFE380000;
return;
}
break;
}
func_80183DA0(s0);
func_801824CC(s0, 0x1800, 0, -0x20, 0xA00000);
func_801839A4(s0, 0x30);
func_8018233C(s0);
}
--- func_801803A0 (src/ov_SC03_105/ov_SC03_105_jr_8017C8D0.c:4637) shares 6: D_80126B58 D_801BCBBC func_8012BEE8 func_8018233C func_80183D38 func_80183DA0 ---
void func_801803A0(s32 a0)
{
s32 s0 = a0;
s32 s3;
u8 *b58;
s32 v;
u32 v1;
/* LOAD-BEARING: ONE pointer temp per switch arm. A single temp assigned in both arms has
* reg_n_sets==2, which kills sched1's birthing_insn_p launch boost (§350): its `lw 0x20`
* floats to the block top, overlaps the `li $v1,0x40` range, and the allocno lands in $a0
* (measured 9 rows). Set once each, both loads sit after the sw and colour $v1. */
s32 pA;
s32 pB;
s32 i;
s32 r;
/* LOAD-BEARING: dead 16-byte aggregate gives the 0x40 frame (0x30 without it); gcc-2.7.2
* allocates an aggregate local at declaration even when unreferenced (§226/§333). */
s32 pad[4];
v = func_80047948((*(s32 *)(s0 + 0xEC) << 5) & 0xFE0);
*(u16 *)(s0 + 0x50) = ((u32)(v * 3)) >> 9;
v = func_8004787C((*(s32 *)(s0 + 0xEC) << 5) & 0x7E0);
*(u16 *)(s0 + 0x52) = ((u32)(v * 3)) >> 9;
/* LOAD-BEARING: `u8 *` base + `*(s16 *)(b58 + 6)` (the TU:7059 idiom), NOT an s16 array
* `tbl[3]`. The ARRAY_REF is a /s MEM and true_dependence's struct-vs-fixed-scalar escape
* lets the `lh 0x6($s1)` hoist above the `sh D_801BA59C` store; the cast INDIRECT_REF is
* not /s, so the load stays pinned after both global stores as in the target (§351; 4 rows).
* Keep it set ONCE — a §194-K re-tie moves the `la $s1` to the prologue top (§350). */
b58 = (u8 *)&D_80126B58;
switch (*(u16 *)(s0 + 0x34)) {
case 0:
v1 = *(u32 *)*(s32 *)(s0 + 0xCC);
s3 = 0x1800;
if (v1 == -2) goto lA;
if ((u32)v1 >= 0xFFFFFFFFu) goto lB;
if (v1 == -3) goto lC;
goto lD;
lA:
*(s32 *)(s0 + 0x1C) = 0x40;
pA = *(s32 *)(s0 + 0x20);
*(u16 *)(s0 + 0x34) = *(u16 *)(s0 + 0x34) + 1;
*(u16 *)(pA + 0x1A) = 0x2000;
*(u16 *)(pA + 0x18) = 0x2000;
goto lE;
lC:
*(u16 *)(s0 + 0x34) = 4;
*(s32 *)(s0 + 0x1C) = 0x3C;
for (i = 0; i < 3; i++) {
r = rand();
func_80183D38((void *)s0, i + 1, 0xFFFC0000 - ((r % 5) << 16));
}
goto lE;
lB:
*(s32 *)(s0 + 0xCC) = *(s32 *)((s32)&D_8018E610 + D_801BCBBC * 4);
return;
lD:
*(u16 *)(s0 + 2) = v1;
*(s32 *)(s0 + 0xCC) = *(s32 *)(s0 + 0xCC) + 4;
return;
lE:
*(s32 *)(s0 + 0xCC) = *(s32 *)(s0 + 0xCC) + 4;
break;
case 1:
s3 = 0x2000;
if (func_8012BEE8(s0) != 0) {
*(u16 *)(s0 + 0x34) = *(u16 *)(s0 + 0x34) + 1;
D_801BA59A = *(u16 *)(s0 + 0xA);
D_801BA59C = *(u16 *)(s0 + 0xE);
*(s16 *)(s0 + 0xE8) = (*(s16 *)(s0 + 6) - *(s16 *)(b58 + 6)) >> 1;
*(s32 *)(s0 + 0x1C) = 1;
*(u16 *)(s0 + 0xEA) = *(u16 *)(s0 + 0xA) + 0x102;
}
break;
case 2:
func_80183768((void *)s0, *(s16 *)(s0 + 0xE8), *(s16 *)(s0 + 0xEA));
func_8012CBF4(s0);
v = *(s32 *)(s0 + 0x1C) + 1;
*(s32 *)(s0 + 0x1C) = v;
s3 = 0x2000;
if (v >= 0x41) {
pB = *(s32 *)(s0 + 0x20);
*(s32 *)(s0 + 0x1C) = 0x1E;
*(u16 *)(s0 + 0x34) = 0;
*(u16 *)(pB + 0x1A) = 0x1800;
*(u16 *)(pB + 0x18) = 0x1800;
*(u16 *)(s0 + 0xA) = D_801BA59A;
*(u16 *)(s0 + 0xE) = D_801BA59C;
}
break;
case 4:
s3 = 0x1800;
if (func_8012BEE8(s0) != 0) {
*(u16 *)(s0 + 0x34) = 0;
*(s32 *)(s0 + 0x1C) = 0x1E;
}
break;
case 5:
func_8012AD80(s0);
s3 = 0x1800;
if (func_8012BEE8(s0) != 0) {
*(s32 *)(s0 + 0x1C) = 0x1E;
*(u16 *)(s0 + 0x34) = 0;
*(s32 *)(s0 + 0xC) = 0xFE380000;
}
break;
}
func_80183A64((s32 *)s0, 0x1800000, 0xFE800000);
func_8018388C((void *)s0, 0x30);
func_8018233C(s0);
func_80183DA0(s0);
func_801824CC(s0, (s16)s3, 0, -0x20, 0x800000);
*(s32 *)(s0 + 0xEC) += 1;
}
--- func_80180ABC (src/ov_SC03_105/ov_SC03_105_jr_8017C8D0.c:4965) shares 6: D_801BCBBC func_8002D4C8 func_8012BEE8 func_8012C51C func_80183DA0 func_80183F0C ---
void func_80180ABC(s32 a0)
{
s32 s1 = a0;
s32 sp18[3];
s32 sp28[2];
Local_80180ABC local;
u16 sc;
s32 v;
u16 t0;
u16 t2;
v = func_80047948((D_800B99DA << 5) & 0xFE0);
*(u16 *)(s1 + 0x50) = ((u32)(v * 3)) >> 9;
v = func_8004787C((D_800B99DA << 5) & 0x7E0);
*(u16 *)(s1 + 0x52) = ((u32)(v * 3)) >> 9;
sc = 0x2000;
switch (*(u16 *)(s1 + 0x34)) {
case 0:
/* LOAD-BEARING: 0x34 read into a temp BEFORE the D_801BA6B0 store. The cast
* lvalue has MEM_IN_STRUCT_P clear, so true_dependence keeps the edge and the
* lhu cannot hoist over the sb on its own (cookbook 439 alias dial). */
t0 = *(u16 *)(s1 + 0x34);
*(s32 *)(s1 + 0x1C) = 0x20;
D_801BA6B0 = 0x6C;
*(s32 *)(s1 + 0xF4) = 0;
*(u16 *)(s1 + 0x34) = t0 + 1;
/* fallthrough */
case 1:
*(s32 *)(s1 + 0xF4) = *(s32 *)(s1 + 0xF4) + 0x800;
if (*(s32 *)(s1 + 0xF4) > 0x10000) {
*(s32 *)(s1 + 0xF4) = 0x10000;
}
func_80184500(s1);
if (func_8012BEE8(s1) != 0) {
sp18[0] = 0xFFF80000;
sp18[1] = 0xFE5E0000;
sp18[2] = 0xFE380000;
func_8012B77C((s32)sp28, s1 + 4, (s32)sp18);
*(s16 *)&D_801BA5A0 = sp28[0];
*(s16 *)&D_801BA5A2 = sp28[0] >> 16;
func_8018373C((void *)s1, 0xFFFC0000);
*(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;
}
break;
case 2:
func_8012CBF4(s1);
sp18[0] = 0xFFF80000;
sp18[1] = 0xFE5E0000;
sp18[2] = 0xFE380000;
if (((s32 (*)(s32, void *))func_80013350)(s1 + 4, sp18) <= 0x100) {
func_8012A828(s1, D_801B1D08);
/* LOAD-BEARING, the whole arm (measured over all 180 legal statement
* permutations -- statement ORDER alone never moves it):
* (a) t2 and v must EACH be set TWICE inside this arm (`t2 = t2 + 1;`
* not `... = t2 + 1`). A pseudo set once gets sched1's
* birthing_insn_p launch boost (0x7f000001 in `cc1 -dS`), and the
* backward scheduler then places its `lhu` right against its
* consumer -- 4 slots too late. Two sets suppress the boost and
* the load floats to the top of the block, as in the target (§350).
* (b) the D_801BCBBC value REUSES the function-scope `v`, not a private
* temp. That is what colours it $v0 and 0x34's temp $v1; a private
* temp inverts the pair (2 rows) and needs a $2/$3 register pin to
* undo -- the pin is measured equivalent, this is the honest spelling. */
t2 = *(u16 *)(s1 + 0x34);
*(s32 *)(s1 + 0x1C) = 0xA;
v = D_801BCBBC;
*(s32 *)(s1 + 0x4) = 0xFFF80000;
*(s32 *)(s1 + 0x8) = 0xFE5E0000;
*(s32 *)(s1 + 0xC) = 0xFE380000;
t2 = t2 + 1;
v = v + 1;
*(s32 *)(s1 + 0xE4) = v;
*(u16 *)(s1 + 0x34) = t2;
func_80182BD8(s1, D_8018E61C, 4, 0);
}
break;
case 3:
func_80182BD8(s1, D_8018E61C, 4, 1);
if (func_8012BEE8(s1) != 0) {
*(s32 *)(s1 + 0x1C) = 0x96;
*(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;
}
if (*(s32 *)(s1 + 0x94) == 0) {
func_8002D4C8(0x7A7, 0);
}
break;
case 4:
func_80182BD8(s1, D_8018E61C, 4, 1);
if (*(s32 *)(s1 + 0x1C) % 50 == 0) {
if (*(s32 *)(s1 + 0xE4) != 0) {
local.f0 = *(u16 *)(s1 + 0x6);
local.f1 = *(u16 *)(s1 + 0xA);
local.f2 = *(u16 *)(s1 + 0xE);
local.f3 = 0x171;
local.f4 = 0;
local.f5 = 0;
local.f6 = 0x7FFF;
local.f7 = 0x400;
local.f8 = 0x4000;
func_8012C51C(&local, s1);
local.f7 = -0x400;
func_8012C51C(&local, s1);
*(s32 *)(s1 + 0xE4) = *(s32 *)(s1 + 0xE4) - 1;
}
}
if (func_8012BEE8(s1) != 0) {
*(s32 *)(s1 + 0x1C) = 0x20;
*(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;
*(s32 *)(s1 + 0xE0) = *(s32 *)(s1 + 0xE0) | 2;
}
if (*(s32 *)(s1 + 0x94) == 0) {
func_8002D4C8(0x7A7, 0);
}
break;
case 5:
*(s32 *)(s1 + 0xF4) = *(s32 *)(s1 + 0xF4) - 0x800;
if (*(s32 *)(s1 + 0xF4) < 0) {
*(s32 *)(s1 + 0xF4) = 0;
}
func_80184500(s1);
if (func_8012BEE8(s1) != 0) {
((void (*)(void *))func_80183F0C)((void *)s1);
D_801BA6B0 = 0;
((ObjE0_80180ABC *)s1)->xE0 &= ~2;
((void (*)(void *, void *))func_800599B8)(D_8018E7E0, D_8018E7C0);
}
break;
}
func_80183DA0(s1);
func_8018388C((void *)s1, 0x30);
/* LOAD-BEARING: the target zero-extends with `sll 16 ; srl 16`, NOT `andi 0xffff`.
* Every (u16)/&0xFFFF spelling collapses to a bare `move` here because combine knows
* the pseudo holds 0x2000 (cookbook 439 row 6, measured 10 ways). Only the explicit
* u32 shift pair survives. */
func_801824CC(s1, ((u32)sc << 16) >> 16, 0, -0x20, 0x800000);
}
--- func_801867D0 (src/ov_SC03_105/ov_SC03_105_jr_8018624C.c:267) shares 5: D_8018AAA4 D_801BCBBC func_8002D4C8 func_8012BEE8 func_8013C9C4 ---
void func_801867D0(s32 a0)
{
s32 s0 = a0;
s32 v0;
switch (*(u16 *)(s0 + 0x34)) {
case 0:
if (*(u32 *)(s0 + 0x94) < 0x1F && (*(s32 *)(s0 + 0x1C) & 3) == 0) {
func_8013C9C4(D_8018EDF4);
func_801871C0((void *)s0, 2, 2);
}
if (*(s32 *)(s0 + 0x94) == 0x13) {
func_8002D4C8(0xBC2, 0);
}
if (*(s32 *)(s0 + 0x94) == 0x24) {
func_8002D4C8(0xBC3, 0);
}
if (*(s32 *)(s0 + 0x94) == 0x32) {
func_8013C9C4(D_8018AAA4);
func_801871C0((void *)s0, 10, 5);
}
if (func_8012E544(0x222) == 0) {
func_8012A828(s0, D_801B2E28);
func_8012A828(*(s32 *)(s0 + 0x6C), D_801B2FC0);
((struct Ctr34 *)(s0 + 0x34))->h = ((struct Ctr34 *)(s0 + 0x34))->h + 1;
D_801BCBBC = D_801BCBBC + 1;
return;
}
*(s32 *)(s0 + 0x1C) = *(s32 *)(s0 + 0x1C) + 1;
if (*(s32 *)(s0 + 0x1C) >= 0x12C) {
v0 = func_8012E544(0x222);
if (v0 != 0) {
*(s16 *)(v0 + 0x100) = 1;
}
func_8012A828(s0, D_8018EACC);
func_8012A828(*(s32 *)(s0 + 0x6C), D_8018EC24);
*(u16 *)(s0 + 0x34) = 2;
}
return;
case 1:
if (*(s32 *)(s0 + 0x94) == 0x14) {
func_8013C9C4(D_8018AAA4);
func_801871C0((void *)s0, 10, 5);
func_80187434((void *)s0);
func_8002D4C8(0xC8F, 0);
}
if (*(s16 *)(s0 + 0x98) != 0) {
return;
}
if (D_801BCBBC < 3) {
*(s16 *)(s0 + 2) = 6;
} else {
*(s16 *)(s0 + 2) = 8;
}
return;
case 2:
if (*(s16 *)(s0 + 0x98) != 0) {
return;
}
func_8012A828(s0, D_8018E9BC);
func_8012A828(*(s32 *)(s0 + 0x6C), D_8018EAA4);
*(s16 *)(*(s32 *)(s0 + 0xCC) + 2) = 1;
func_8002D4C8(0x72F, 0);
*(s32 *)(s0 + 0x1C) = 0xA0;
*(u16 *)(s0 + 0x34) = *(u16 *)(s0 + 0x34) + 1;
return;
case 3:
if (*(s32 *)(s0 + 0x1C) == 0x64) {
*(s32 *)(*(s32 *)(*(s32 *)(s0 + 0xCC) + 0x20) + 4) &= 0x7FFFFFFF;
func_801870B4();
*(u16 *)(s0 + 0x34) = *(u16 *)(s0 + 0x34) + 1;
}
/* fall through */
case 4:
if (func_8012BEE8(s0) != 0) {
*(s16 *)(s0 + 2) = 3;
*(s16 *)(*(s32 *)(s0 + 0xCC) + 2) = 2;
*(s32 *)(s0 + 0x1C) = 0x5A;
func_8002D4C8(4, 0x72F);
}
break;
}
}
--- func_8018624C (src/ov_SC03_105/ov_SC03_105_jr_8018624C.c:77) shares 4: D_80126B58 func_8002D4C8 func_8012C51C func_8013C9C4 ---
void func_8018624C(void *arg0) {
s32 ent;
u8 *tbl;
s32 i;
s32 j;
s32 off;
s32 tmp;
s32 t2;
s16 *p;
s32 pad[2];
ent = (s32)arg0;
tbl = D_800AF630;
switch (*(u16 *)(ent + 0x34)) {
case 0:
case 2:
case 6:
case 8:
case 10:
case 12:
break;
case 1:
if ((*(u16 *)(tbl + 0xA3AA) & 3) == 0) {
func_8013C9C4(D_8018EDF4);
func_801871C0((void *)ent, 1, 1);
}
break;
case 3:
func_8012A828(ent, D_801B1DC8);
func_8012A828(*(s32 *)(ent + 0x6C), D_801B2410);
((void (*)(s32))func_801873C8)(ent);
*(u16 *)(ent + 0x34) += 1;
/* fallthrough */
case 4:
if ((u32)*(s32 *)(ent + 0x94) < 0x2C && (*(u16 *)(tbl + 0xA3AA) & 3) == 0) {
func_8013C9C4(D_8018EDF4);
func_801871C0((void *)ent, 1, 1);
}
if (*(s32 *)(ent + 0x94) == 0x2B) {
for (i = 0; i < 3; i++) {
j = 0;
off = 0;
for (; j < 3; j++) {
*(u16 *)(&D_8018EE5C + off) = (rand() % 3 + 1) | -0x8000;
tmp = func_8012C51C(D_8018EE54 + off, ent);
t2 = tmp;
off += 0x14;
}
}
func_801871C0((void *)ent, 0xA, 5);
func_80187434((void *)ent);
func_8002D4C8(0x726, 0);
func_8002D4C8(4, 0x79F);
}
if (*(s32 *)(ent + 0x94) == 0x4B) {
func_8002D4C8(0x727, 0);
}
if (*(s32 *)(ent + 0x94) == 0x84) {
func_8002D4C8(0xC05, 0);
}
if (*(s32 *)(ent + 0x94) == 0x5A) {
func_801871C0((void *)ent, 0xF, 5);
}
if (*(s32 *)(ent + 0x94) > 0x78 && (*(u16 *)(tbl + 0xA3AA) & 0xF) == 0) {
t2 = rand();
func_801871C0((void *)ent, t2 % 5 + 1, 2);
}
break;
case 5:
*(s32 *)(ent + 0x1C) = 0x1E;
*(u16 *)(ent + 0x34) += 1;
func_8002D4C8(0x72D, 0);
break;
case 7:
func_8012A568((void (*)(void))func_8017E08C);
*(u16 *)(*(s32 *)(ent + 0xD0) + 0x34) += 1;
func_8002D4C8(4, 0x733);
*(u16 *)(ent + 0x34) += 1;
break;
case 9:
tmp = func_8012C658(0x14B, 0, ent);
*(s32 *)(ent + 0xCC) = tmp;
func_8012C588(0x3BD, tmp);
*(u16 *)(ent + 0x34) += 1;
func_8002D4C8(0x72F, 0);
break;
case 11:
*(u16 *)(ent + 0x34) += 1;
func_801870B4();
break;
case 13:
p = &D_8018EE00;
func_8017BF08(p, p + 1, 2, 0x96);
*(u16 *)(ent + 0x34) += 1;
break;
}
if (*(u16 *)(ent + 0x34) >= 5 && (*(u16 *)(tbl + 0xA3AA) & 0x7F) == 0) {
func_801871C0((void *)ent, 5, 5);
}
if (func_801789AC(ent) == 1) {
((void (*)(s32))func_80178D18)(ent);
*(s16 *)(ent + 0x2) = 3;
*(s16 *)(*(s32 *)(ent + 0xCC) + 0x2) = 2;
*(s32 *)(ent + 0x1C) = 0x5A;
func_80147054(&D_80126B58);
func_8002D4C8(4, 0x72F);
}
}
.run/P36/agents/ov_SC03_105__func_80181C84/residual.txt
+174
View File
@@ -0,0 +1,174 @@
src/ov_SC03_105/ov_SC03_105_jr_80181C84.c:func_80181C84: score 96 (COUNT; mine 359 ins, target 359) — not yet
register pairs (mine -> target, count): s2->s1 x67, s1->s2 x14, a1->v1 x8
replace mine[1:3] target[1:3]
1 sw s2,64(sp) | sw s1,60(sp)
2 move s2,a0 | move s1,a0
replace mine[6:7] target[6:7]
6 sw s1,60(sp) | sw s2,64(sp)
replace mine[8:9] target[8:9]
8 lhu v1,52(s2) | lhu v1,52(s1)
replace mine[21:22] target[21:22]
21 lhu a0,52(s2) | lhu a0,52(s1)
replace mine[23:25] target[23:25]
23 sw v0,28(s2) | sw v0,28(s1)
24 lw v0,224(s2) | lw v0,224(s1)
replace mine[27:29] target[27:29]
27 sw v0,224(s2) | sw v0,224(s1)
28 sh a0,52(s2) | sh a0,52(s1)
replace mine[30:31] target[30:31]
30 move a0,s2 | move a0,s1
replace mine[33:34] target[33:34]
33 sh v0,10(s2) | sh v0,10(s1)
replace mine[35:36] target[35:36]
35 sh v0,14(s2) | sh v0,14(s1)
replace mine[37:38] target[37:38]
37 sw v0,28(s2) | sw v0,28(s1)
replace mine[43:44] target[43:44]
43 lhu v1,52(s2) | lhu v1,52(s1)
replace mine[45:47] target[45:47]
45 sh zero,6(s2) | sh zero,6(s1)
46 sw v0,88(s2) | sw v0,88(s1)
replace mine[48:49] target[48:49]
48 sh v1,52(s2) | sh v1,52(s1)
replace mine[55:57] target[55:57]
55 move s1,zero | move s2,zero
56 lhu v0,6(s2) | lhu v0,6(s1)
replace mine[59:60] target[59:60]
59 lhu v0,10(s2) | lhu v0,10(s1)
replace mine[62:63] target[62:63]
62 lhu v1,14(s2) | lhu v1,14(s1)
replace mine[73:74] target[73:74]
73 sll v0,s1,0xa | sll v0,s2,0xa
replace mine[77:80] target[77:80]
77 move a1,s2 | move a1,s1
78 addiu s1,s1,1 | addiu s2,s2,1
79 slti v0,s1,4 | slti v0,s2,4
replace mine[81:82] target[81:82]
81 sll v0,s1,0xa | sll v0,s2,0xa
replace mine[85:86] target[85:86]
85 move a0,s2 | move a0,s1
replace mine[89:90] target[89:90]
89 move a0,s2 | move a0,s1
replace mine[95:96] target[95:96]
95 sh v0,52(s2) | sh v0,52(s1)
replace mine[101:102] target[101:102]
101 lhu v0,258(s2) | lhu v0,258(s1)
replace mine[104:105] target[104:105]
104 sh v0,258(s2) | sh v0,258(s1)
replace mine[113:114] target[113:114]
113 sh v0,258(s2) | sh v0,258(s1)
replace mine[117:118] target[117:118]
117 sh v0,52(s2) | sh v0,52(s1)
replace mine[120:121] target[120:121]
120 sw v0,28(s2) | sw v0,28(s1)
replace mine[130:131] target[130:131]
130 move s1,zero | move s2,zero
replace mine[132:133] target[132:133]
132 move a0,s2 | move a0,s1
replace mine[151:152] target[151:152]
151 mflo a1 | mflo v1
replace mine[154:156] target[154:156]
154 div zero,v0,a1 | div zero,v0,v1
155 bnez a1,278 <func_80181C84+0x278> | bnez v1,278 <func_80181C84+0x278>
replace mine[159:160] target[159:160]
159 bne a1,at,290 <func_80181C84+0x290> | bne v1,at,290 <func_80181C84+0x290>
replace mine[167:168] target[167:169]
167 mult s1,a1 | mult s2,v1
168 -- | lhu v0,10(s0)
replace mine[169:170] target[170:171]
169 lhu v0,10(s0) | addiu v0,v0,-224
delete mine[171:172] target[172:172]
171 addiu v0,v0,-224 | --
replace mine[177:179] target[177:179]
177 addiu s1,s1,1 | addiu s2,s2,1
178 slt v0,s1,s3 | slt v0,s2,s3
replace mine[182:184] target[182:184]
182 move a0,s2 | move a0,s1
183 lhu v0,258(s2) | lhu v0,258(s1)
replace mine[186:187] target[186:187]
186 sh v0,258(s2) | sh v0,258(s1)
replace mine[195:196] target[195:196]
195 sh v0,258(s2) | sh v0,258(s1)
replace mine[199:200] target[199:200]
199 sh v0,52(s2) | sh v0,52(s1)
replace mine[202:203] target[202:203]
202 sw v0,28(s2) | sw v0,28(s1)
replace mine[212:213] target[212:213]
212 move s1,zero | move s2,zero
replace mine[214:215] target[214:215]
214 move a0,s2 | move a0,s1
replace mine[233:234] target[233:234]
233 mflo a1 | mflo v1
replace mine[236:238] target[236:238]
236 div zero,v0,a1 | div zero,v0,v1
237 bnez a1,3c0 <func_80181C84+0x3c0> | bnez v1,3c0 <func_80181C84+0x3c0>
replace mine[241:242] target[241:242]
241 bne a1,at,3d8 <func_80181C84+0x3d8> | bne v1,at,3d8 <func_80181C84+0x3d8>
replace mine[249:250] target[249:251]
249 mult s1,a1 | mult s2,v1
250 -- | lhu v0,10(s0)
replace mine[251:252] target[252:253]
251 lhu v0,10(s0) | addiu v0,v0,-224
delete mine[253:254] target[254:254]
253 addiu v0,v0,-224 | --
replace mine[259:261] target[259:261]
259 addiu s1,s1,1 | addiu s2,s2,1
260 slt v0,s1,s3 | slt v0,s2,s3
replace mine[264:265] target[264:265]
264 move a0,s2 | move a0,s1
replace mine[266:267] target[266:267]
266 move a0,s2 | move a0,s1
replace mine[269:270] target[269:270]
269 lhu v0,52(s2) | lhu v0,52(s1)
replace mine[273:275] target[273:275]
273 sh v0,52(s2) | sh v0,52(s1)
274 lhu v0,258(s2) | lhu v0,258(s1)
replace mine[277:278] target[277:278]
277 sh v0,258(s2) | sh v0,258(s1)
replace mine[283:284] target[283:284]
283 lhu v0,258(s2) | lhu v0,258(s1)
replace mine[286:287] target[286:287]
286 sh v0,258(s2) | sh v0,258(s1)
replace mine[290:291] target[290:291]
290 lhu v1,52(s2) | lhu v1,52(s1)
replace mine[292:295] target[292:295]
292 sw v0,28(s2) | sw v0,28(s1)
293 lw v0,224(s2) | lw v0,224(s1)
294 sh zero,258(s2) | sh zero,258(s1)
replace mine[297:298] target[297:298]
297 sw v0,224(s2) | sw v0,224(s1)
replace mine[299:300] target[299:300]
299 sh v1,52(s2) | sh v1,52(s1)
replace mine[301:302] target[301:302]
301 move a0,s2 | move a0,s1
replace mine[305:307] target[305:307]
305 move a0,s2 | move a0,s1
306 lhu v0,52(s2) | lhu v0,52(s1)
replace mine[308:309] target[308:309]
308 sw v1,28(s2) | sw v1,28(s1)
replace mine[311:312] target[311:312]
311 sh v0,52(s2) | sh v0,52(s1)
replace mine[313:314] target[313:314]
313 move a0,s2 | move a0,s1
replace mine[317:318] target[317:318]
317 move a0,s2 | move a0,s1
replace mine[319:320] target[319:320]
319 sw v0,4(s2) | sw v0,4(s1)
replace mine[321:322] target[321:322]
321 sw v0,8(s2) | sw v0,8(s1)
replace mine[323:324] target[323:324]
323 sw v0,12(s2) | sw v0,12(s1)
replace mine[331:332] target[331:332]
331 sw v0,88(s2) | sw v0,88(s1)
replace mine[333:334] target[333:334]
333 move a0,s2 | move a0,s1
replace mine[335:337] target[335:337]
335 move a0,s2 | move a0,s1
336 move a0,s2 | move a0,s1
replace mine[340:341] target[340:341]
340 move a0,s2 | move a0,s1
replace mine[345:347] target[345:347]
345 move a0,s2 | move a0,s1
346 lw v0,224(s2) | lw v0,224(s1)
replace mine[349:350] target[349:350]
349 sw v0,224(s2) | sw v0,224(s1)
.run/P36/agents/ov_SC03_105__func_80181C84/sites.txt
+4
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@@ -0,0 +1,4 @@
REMOVED pin $17 line 2940
NEEDED pin $18 line 2946
REMOVED pin $19 line 2947
NEEDED pin $3 line 2948
.run/P36/agents/ov_SC03_105__func_80181C84/tu.txt
+2
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@@ -0,0 +1,2 @@
src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
func_80181C84
.run/P36/agents/ov_SC03_105__func_801834A4/body_free.c
+41
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@@ -0,0 +1,41 @@
void func_801834A4(s32 arg0) {
extern s32 D_8018E894[];
u16 pos[3];
s32 i;
s32 j;
s32 u;
s32 base;
s32 tmp;
s32 mod;
s32 step;
s32 obj;
s32 half;
s32 hh;
s32 sign = 0;
if ((D_800B99DA & 7) == 0) {
pos[1] = 0;
pos[2] = 0;
for (i = 0; i < 6; i++) {
u = D_8018E894[i];
tmp = u * 0x600 + 0x2000;
base = tmp;
mod = (tmp << 16) >> 18;
step = u * 6 + 0x12;
half = step * 2;
pos[0] = step;
pos[1] -= 0x24;
for (j = 0; j < 4; j++) {
sign = half >> 31;
obj = func_801850D8(1, (s16)(base + rand() % mod), 0, 0, pos, arg0,
*(s32 *)(((rand() & 1) << 2) + (s32)D_8018E59C), 0);
if (obj != 0) {
*(s32 *)(obj + 0x20) |= 0x800000;
}
hh = half;
pos[0] -= hh / 3;
}
}
}
}
.run/P36/agents/ov_SC03_105__func_801834A4/body_tree.c
+42
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@@ -0,0 +1,42 @@
void func_801834A4(s32 arg0) {
extern s32 D_8018E894[];
u16 pos[3];
s32 i;
s32 j;
s32 u;
s32 base;
register s32 tmp __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus10)
s32 mod;
s32 step;
s32 obj;
s32 half;
register s32 hh __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus10)
s32 sign = 0;
if ((D_800B99DA & 7) == 0) {
pos[1] = 0;
pos[2] = 0;
for (i = 0; i < 6; i++) {
u = D_8018E894[i];
tmp = u * 0x600 + 0x2000;
base = tmp;
__asm__ ("" : "=r"(tmp) : "0"(tmp)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus10)
mod = (tmp << 16) >> 18;
step = u * 6 + 0x12;
half = step * 2;
pos[0] = step;
pos[1] -= 0x24;
for (j = 0; j < 4; j++) {
sign = half >> 31;
obj = func_801850D8(1, (s16)(base + rand() % mod), 0, 0, pos, arg0,
*(s32 *)(((rand() & 1) << 2) + (s32)D_8018E59C), 0);
if (obj != 0) {
*(s32 *)(obj + 0x20) |= 0x800000;
}
hh = half;
pos[0] -= hh / 3;
}
}
}
}
.run/P36/agents/ov_SC03_105__func_801834A4/history.txt
+14
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@@ -0,0 +1,14 @@
s6: verdict NO-MATCH start 41 best 21 compiles 187 path R7 do-while @3749 + R9 swap-stmts @3762
best-scoring single candidates of the last trace (move -> score [residual class]):
R9 swap-stmts @3762 -> 21 [COUNT] (from 31)
R7 do-while @3749 -> 27 [COUNT] (from 32)
R18 bystander @3751->3754 -> 28 [COUNT] (from 31)
R18 bystander @3752->3750 -> 28 [COUNT] (from 31)
R9 swap-stmts @3751 -> 28 [COUNT] (from 31)
R7 do-while @3749 -> 31 [COUNT] (from 41)
R6 inline hh @3762 -> 31 [COUNT] (from 31)
R7 block @3760 -> 31 [COUNT] (from 31)
R10 param-copy arg0 @3742 -> 31 [COUNT] (from 31)
R2 decl-order 1,0 -> 31 [COUNT] (from 31)
R4 decl-move tmp 6->0 -> 31 [COUNT] (from 31)
R8 base tmp0 @3760 -> 31 [COUNT] (from 31)
.run/P36/agents/ov_SC03_105__func_801834A4/neighbours.txt
+43
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@@ -0,0 +1,43 @@
=== THIS FUNCTION'S OWN HEADER (func_801834A4, line 3727) — read it in full ===
/* MATCH candidate (106/106 in match_one; see rtu_match below). T5x Fable, 2026-09-05.
*
* Carried over from the S71 body (byte-proven, do not touch):
* - `tmp` pinned to $2 forces the `addu $s6,$v0,$zero` base copy and makes the
* modulus read the pre-copy pseudo (`sll $v0,$v0,16`, not `$v0,$s6,16`).
* - `*(s32 *)(((rand() & 1) << 2) + (s32)D_8018E59C)` (sibling func_801831E0's
* spelling) keeps the D_8018E59C address from being hoisted.
*
* THE RESIDUAL THAT WAS CALLED A WALL (idx 82-89) and how it closes:
* The target hoists ONLY the /3 sign-correction `sra $s5,$s4,31` and keeps the
* const+mult+mfhi+subu inline. One `x / 3` can never do that: expand_divmod
* (expmed.c:3034-3057) emits K(const) B(smulsi3_highpart) C(sra 31) D(minus)
* ADJACENTLY from the SAME op0 rtx, so loop.c's invariant_p gives B and C the
* same verdict; if B is a movable, force_movables (loop.c:1193-1228) links K to it
* (K.lifetime += B.lifetime, K.savings DOUBLES) and K (29*6=174 >= 37) hoists.
* A hard-reg dividend kills all four (scan_loop:596 forces n_times_set[hard]=1).
*
* Lever = CSE, not loop.c. cse.c's canon_reg NEVER rewrites a hard register, but
* its hash/exp_equiv_p compare QUANTITIES. So:
* sign = half >> 31; at the TOP of the body: a movable by criterion (1)
* (maybe_never==0 there, scan_loop:696-706); life 71 -> hoisted.
* hh = half; hard $2 <- pseudo: cse puts $2 in half's quantity.
* pos[0] -= hh / 3; B reads $2 (call-used hard reg -> invariant_p==0 -> not a
* movable, so K stays unlinked: life 1 * sav 1 * 29 < 37 =
* "not desirable" -> lui/ori inline); C `(ashiftrt $2 31)`
* hashes into sign's `(ashiftrt half 31)` -> replaced by
* (reg sign); D becomes `B - sign`. The `hh = half` copy is
* then folded into the mult by combine (can_combine_p allows a
* hard i2dest with REG_DEAD in i3) -> no extra insn.
* Why $2 and not a callee-saved pin: the pinned reg enters regs_ever_live (flow runs
* before combine deletes the copy) -> global.c pass 0 hands it to the first callee-saved
* allocno (j took $s4, closeness 7). $2 is ever-live anyway and dead in that window.
* Why `= 0` at the declaration: an unread `sign` store is deleted by jump.c before cse
* (first_uid==last_uid). An asm feed keeps it alive but adds +2 weighted refs
* (sign 7/39 beats half 7/44 in allocno_compare -> half/sign swapped, closeness 4).
* The dead initializer survives jump/cse (two references), is deleted by flow as a
* dead store before regalloc and never counted, so sign = 5 refs/38 insns
* (10/38=.263) lands exactly between half (14/44=.318) and base (10/50=.2): the
* target's j,mod,i,half,sign,base,arg0 = $s1..$s7 order. match_one MATCH 106/106,
* rtu_match MATCH in the real TU (2026-09-05).
*/
.run/P36/agents/ov_SC03_105__func_801834A4/related.txt
+291
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@@ -0,0 +1,291 @@
=== lever-free bodies in ov_SC03_105 sharing a callee or global with func_801834A4 (30 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_8018423C (src/ov_SC03_105/ov_SC03_105_jr_80181C84.c:4327) shares 3: D_800B99DA D_8018E59C func_801850D8 ---
void func_8018423C(s32 arg0)
{
Vec4s16_8018423C pos;
Vec4s16_8018423C vec;
Vec4s16_8018423C tmp;
Vec4s16_8018423C out;
s32 i;
s32 j;
s32 k;
s32 step;
s32 r;
pos.f0 = *(u16 *)(arg0 + 6);
pos.f1 = *(u16 *)(arg0 + 0xA);
pos.f2 = *(u16 *)(arg0 + 0xE);
vec.f2 = 0;
vec.f0 = 0;
j = 0;
do {
i = j + 1;
vec.f1 = -(i << 7);
func_8012F214(arg0, (s32)&vec, (s32)&vec);
if (func_80135004(1, &pos, (s32)&vec) != 0) {
if ((D_800B99DA & 7) == 0) {
step = -0x40;
out = vec;
for (k = 0; k < 8; k++, step += 0x10) {
out.f0 = vec.f0 + step;
r = (s16)(rand() % 0x1000 + 0x2000);
func_801850D8(7, r, 0, 0, &out, 0, D_8018E59C[rand() & 1], 0);
}
}
return;
}
pos = vec;
j = i;
} while (i < 3);
}
--- func_80182DCC (src/ov_SC03_105/ov_SC03_105_jr_80181C84.c:3502) shares 3: D_800B99DA D_8018E59C func_801850D8 ---
void func_80182DCC(void *arg0) {
u16 sp20[3];
u8 *p = D_800AF630;
s32 i, j;
u32 base;
s32 range1;
s32 range2;
s32 range3;
s32 off;
s32 ret;
s32 h;
if (D_800B99DA % 7 == 0) {
base = 0x1400;
i = 0;
range1 = 0xA00;
sp20[0] = 0x30;
sp20[1] = 0;
sp20[2] = 0;
for (; i < 7; i++) {
ret = func_801850D8(1, base + rand() % range1, 0, 0, sp20, (s32)arg0,
*(s32 *)(((rand() & 1) << 2) + (s32)D_8018E59C), 0);
if (ret != 0) {
*(s32 *)(ret + 0x20) |= 0xA00000;
}
sp20[0] -= 0x10;
}
}
if (*(u16 *)(p + 0xA3AA) % 9 == 0) {
base = 0x2000;
i = 0;
range2 = 0x1000;
sp20[1] = 8;
sp20[2] = 0;
for (; i < 5; i++) {
sp20[0] = 8;
h = sp20[1];
h -= 0x20;
h -= i * 4;
sp20[1] = h;
for (j = 0; j < 3; j++) {
ret = func_801850D8(1, (s16)(base + rand() % range2 + i * 0x600), 0, 0, sp20,
(s32)arg0, *(s32 *)(((rand() & 1) << 2) + (s32)D_8018E59C), 0);
if (ret != 0) {
*(s32 *)(ret + 0x20) |= 0xA00000;
}
sp20[0] -= 8;
}
}
sp20[1] = 0;
i = 0;
range3 = base >> 1;
off = 0x800;
for (; i < 2; i++) {
sp20[0] = 8;
sp20[1] += 0x14;
for (j = 0; j < 3; j++) {
ret = func_801850D8(1, (s16)(base + rand() % range3 - off), 0, 0, sp20,
(s32)arg0, *(s32 *)(((rand() & 1) << 2) + (s32)D_8018E59C), 0);
if (ret != 0) {
*(s32 *)(ret + 0x20) |= 0xA00000;
}
sp20[0] -= 8;
}
off += 0x800;
}
}
}
--- func_801824CC (src/ov_SC03_105/ov_SC03_105_jr_80181C84.c:3244) shares 3: D_800B99DA D_8018E59C func_801850D8 ---
void func_801824CC(a0, a1, a2, a3, mask)
s32 a0;
s16 a1;
s16 a2;
s16 a3;
s32 mask;
{
Stk stk;
Vec3x16 vec;
s32 base;
s32 i;
s32 r;
u16 *p;
stk = *(Stk *)D_801B822C;
base = (func_8004787C((D_800B99DA << 6) & 0x7C0) << 4) >> 12;
if (D_800B99DA % 6 == 0) {
vec.f2 = 0;
for (i = 0; i < 5; i++) {
/* LOAD-BEARING: the explicit pointer temp. Writing the two loads as
* `*(u16 *)&stk.b[i * 4]` / `[i * 4 + 2]` inline permutes $v0/$v1 on the
* `sll`/`addiu $sp` pair that feeds the addu. */
p = (u16 *)&stk.b[i * 4];
vec.f0 = base + p[0];
vec.f1 = p[1];
r = func_801850D8(1, (s16)(a1 + rand() % ((a1 << 16) >> 17)), a2, a3, &vec, a0,
D_8018E59C[rand() & 1], 0);
if (r != 0) {
*(s32 *)(r + 0x20) |= mask;
}
}
}
if ((D_800B99DA & 3) == 0) {
vec.f0 = base;
vec.f1 = 0;
vec.f2 = 0;
r = func_801850D8(1, (s16)(a1 + rand() % ((a1 << 16) >> 17)), a2, a3, &vec, a0,
D_8018E59C[rand() & 1], -0x80000);
if (r != 0) {
*(s32 *)(r + 0x20) |= mask;
}
}
if (D_800B99DA % 5 == 0) {
vec.f1 = -4;
vec.f2 = 0;
for (i = 0; i < 2; i++) {
/* LOAD-BEARING association: `(i << 5) + (base - 0x10)`, NOT
* `base + (i << 5) - 0x10`. The latter makes `base + i*32` a giv of
* benefit 4 (> 2*biv_count), so strength_reduce reduces it to an extra
* induction pseudo — which also steals the last callee-saved register and
* pushes `mask` out of $fp into memory. Splitting the invariant off leaves
* a bare `i<<5` giv (benefit 2 - 2 = 0 => "not worth while"), and
* `base - 0x10` stays unhoisted inside the loop. */
vec.f0 = (i << 5) + (base - 0x10);
r = func_801850D8(1, (s16)(a1 + rand() % ((a1 << 16) >> 17)), a2, a3, &vec, a0,
D_8018E59C[rand() & 1], -0x60000);
if (r != 0) {
*(s32 *)(r + 0x20) |= mask;
}
}
}
if (D_800B99DA % 6 == 0) {
vec.f1 = -0x10;
vec.f2 = 0;
for (i = 0; i < 2; i++) {
vec.f0 = (i << 6) + (base - 0x20);
r = func_801850D8(1, (s16)(a1 + rand() % ((a1 << 16) >> 17)), a2, a3, &vec, a0,
D_8018E59C[rand() & 1], -0x60000);
if (r != 0) {
*(s32 *)(r + 0x20) |= mask;
}
}
}
}
--- func_801831E0 (src/ov_SC03_105/ov_SC03_105_jr_80181C84.c:3599) shares 3: D_800B99DA D_8018E59C func_801850D8 ---
void func_801831E0(s32 arg0, s32 arg1) {
extern u16 D_801BA6A0[];
extern u16 D_801BA5E8;
extern u16 D_801BA5EA;
extern u16 D_801BA5EC;
extern s32 D_8018E59C[];
u16 *w;
u16 *e;
u16 *m;
s32 ctr;
s32 q;
s32 ret;
s32 t;
w = D_801BA6A0;
switch (arg1) {
case 0:
ctr = 0x17;
do {
w[0] = *(u16 *)(arg0 + 6);
w[1] = *(u16 *)(arg0 + 0xA);
w[2] = *(u16 *)(arg0 + 0xE);
ctr--;
w -= 4;
} while (ctr >= 0);
break;
case 1:
case 3:
D_801BA5E8 = *(u16 *)(arg0 + 6);
D_801BA5EA = *(u16 *)(arg0 + 0xA);
D_801BA5EC = *(u16 *)(arg0 + 0xE);
ctr = 0x17;
do {
m = w + 1;
e = w + 2;
*w = *(w - 4);
*m = *(w - 3);
*e = *(w - 2);
if ((D_800B99DA & 7) == 0 && (ctr & 1) != 0) {
q = rand() % 4096;
if ((rand() & 1) == 0) {
t = -q;
q = t + 0x4000;
} else {
q = q + 0x4000;
}
ret = func_801850D8(5, (s16)q, 0, 0, w, 0, *(s32 *)(((rand() & 1) << 2) + (s32)D_8018E59C), 0);
if (ret != 0) {
*(s32 *)(ret + 0x54) = arg1 - 1;
*(s32 *)(ret + 0x50) = (s32)w;
*(s32 *)(ret + 0x20) |= 0x200000;
}
}
ctr--;
w -= 4;
} while (ctr > 0);
break;
case 2:
ctr = 0x17;
do {
if ((D_800B99DA & 7) == 0 && (ctr & 1) != 0) {
q = rand() % 4096;
if ((rand() & 1) == 0) {
t = -q;
q = t + 0x4000;
} else {
q = q + 0x4000;
}
ret = func_801850D8(5, (s16)q, 0, 0, w, 0, D_8018E59C[rand() & 1], 0);
if (ret != 0) {
*(s32 *)(ret + 0x50) = (s32)w;
*(s32 *)(ret + 0x54) = arg1;
*(s32 *)(ret + 0x20) |= 0x200000;
}
}
ctr--;
w -= 4;
} while (ctr > 0);
break;
}
}
--- func_80150FD8 (src/shared/ov/func_80150FD8.h:5) shares 1: D_800B99DA ---
void func_80150FD8(s32 a0) {
if (D_800B99DA & 7) {
func_80146994(0x34, a0, 0, 0);
}
}
--- func_80172414 (src/shared/ov/func_80172414.h:6) shares 1: D_800B99DA ---
void func_80172414(s32 a0) {
if (*(u16 *)(a0 + 0xB8) & 0x2000) {
func_80161C24(a0, *(u16 *)(a0 + 0x16E));
}
if (*(s32 *)(a0 + 0x2C) < (s32)0xFFF90000) {
if ((D_800B99DA & 7) == 0) {
func_8014C010(a0, 2);
}
}
}
.run/P36/agents/ov_SC03_105__func_801834A4/residual.txt
+55
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@@ -0,0 +1,55 @@
src/ov_SC03_105/ov_SC03_105_jr_80181C84.c:func_801834A4: score 41 (COUNT; mine 107 ins, target 106) — not yet
register pairs (mine -> target, count): a1->s4 x1, a1->s5 x1, a0->v1 x1, s3->s6 x1
replace mine[5:7] target[5:6]
5 sw ra,76(sp) | sw ra,72(sp)
6 sw s8,72(sp) | --
replace mine[14:15] target[13:14]
14 bnez v0,1998 <func_801834A4+0x178> | bnez v0,1998 <func_801834A4+0x178>
replace mine[16:21] target[15:16]
16 move s6,zero | move s3,zero
17 lui s8,0x5555 | --
18 ori s8,s8,0x5556 | --
19 lui s5,0x0 | --
20 addiu s5,s5,0 | --
replace mine[23:25] target[18:23]
23 lw v0,0(s5) | sll v0,s3,0x2
24 nop | lui at,0x0
25 -- | addu at,at,v0
26 -- | lw v0,0(at)
27 -- | move s1,zero
replace mine[27:36] target[25:33]
27 sll a0,v1,0x1 | sll v0,v1,0x9
28 addiu a0,a0,18 | addiu v0,v0,8192
29 sll a1,a0,0x1 | move s6,v0
30 mult a1,s8 | sll v0,v0,0x10
31 move s1,zero | sra s2,v0,0x12
32 sll v1,v1,0x9 | sll v1,v1,0x1
33 addiu s3,v1,8192 | addiu v1,v1,18
34 sll v1,s3,0x10 | sll s4,v1,0x1
35 sra s2,v1,0x12 | --
replace mine[37:39] target[34:36]
37 sra a1,a1,0x1f | sra s5,s4,0x1f
38 sh a0,32(sp) | sh v1,32(sp)
delete mine[41:43] target[38:38]
41 mfhi t0 | --
42 subu s4,t0,a1 | --
replace mine[57:58] target[52:53]
57 addu s0,s3,s0 | addu s0,s6,s0
insert mine[83:83] target[78:82]
83 -- | lui v0,0x5555
84 -- | ori v0,v0,0x5556
85 -- | mult s4,v0
86 -- | addiu s1,s1,1
replace mine[84:86] target[83:86]
84 addiu s1,s1,1 | mfhi t0
85 subu v0,v0,s4 | subu v1,t0,s5
86 -- | subu v0,v0,v1
replace mine[88:89] target[88:89]
88 bnez v0,18cc <func_801834A4+0xac> | bnez v0,18b8 <func_801834A4+0x98>
replace mine[90:96] target[90:95]
90 addiu s6,s6,1 | addiu s3,s3,1
91 slti v0,s6,6 | slti v0,s3,6
92 bnez v0,187c <func_801834A4+0x5c> | bnez v0,186c <func_801834A4+0x4c>
93 addiu s5,s5,4 | sll v0,s3,0x2
94 lw ra,76(sp) | lw ra,72(sp)
95 lw s8,72(sp) | --
.run/P36/agents/ov_SC03_105__func_801834A4/sites.txt
+3
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@@ -0,0 +1,3 @@
NEEDED pin $2 line 3735
NEEDED pin $2 line 3740
NEEDED launder line 3750
.run/P36/agents/ov_SC03_105__func_801834A4/tu.txt
+2
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@@ -0,0 +1,2 @@
src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
func_801834A4
.run/P36/agents/ov_SC03_105__func_80183DA0/body_free.c
+51
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@@ -0,0 +1,51 @@
void func_80183DA0(s32 a0) {
SVec_80183DA0 pos;
SVec_80183DA0 out;
s32 val;
s32 lvl;
s32 sv;
s32 n;
s32 t;
s32 r;
val = 0x7F;
pos.vx = *(s16 *)(a0 + 0x6);
pos.vy = *(s16 *)(a0 + 0xA);
pos.vz = *(s16 *)(a0 + 0xE);
((void (*)(void *, void *))func_8012EFB8)(&pos, &out);
lvl = 7;
if (out.vx >= 0) {
if (out.vx >= 0x140) {
val = 0;
goto tail;
}
} else {
if (-out.vx >= 0x140) {
goto zero;
}
}
sv = (s16)val;
if (out.vx >= 0) {
val = sv - out.vx * 0x7F / 0x140;
} else {
val = sv - -out.vx * 0x7F / 0x140;
}
goto tail;
zero:
val = 0;
tail:
t = out.vx;
n = lvl + t / 0x14;
lvl = n;
if ((s16)n < 0) {
lvl = 0;
} else if ((s16)n >= 0x10) {
lvl = 0xF;
}
r = (lvl << 8) | 0x3000;
func_8002D4C8(0x730, (val | r) & 0xFFFF);
}
.run/P36/agents/ov_SC03_105__func_80183DA0/body_tree.c
+52
View File
@@ -0,0 +1,52 @@
void func_80183DA0(s32 a0) {
SVec_80183DA0 pos;
SVec_80183DA0 out;
s32 val;
register s32 lvl __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus10)
s32 sv;
s32 n;
s32 t;
s32 r;
val = 0x7F;
pos.vx = *(s16 *)(a0 + 0x6);
pos.vy = *(s16 *)(a0 + 0xA);
pos.vz = *(s16 *)(a0 + 0xE);
((void (*)(void *, void *))func_8012EFB8)(&pos, &out);
lvl = 7;
if (out.vx >= 0) {
if (out.vx >= 0x140) {
val = 0;
goto tail;
}
} else {
if (-out.vx >= 0x140) {
goto zero;
}
}
sv = (s16)val;
if (out.vx >= 0) {
val = sv - out.vx * 0x7F / 0x140;
} else {
val = sv - -out.vx * 0x7F / 0x140;
}
goto tail;
zero:
val = 0;
tail:
t = out.vx;
n = lvl + t / 0x14;
lvl = n;
__asm__ __volatile__("" : "=r"(n) : "0"(n)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus10)
if ((s16)n < 0) {
lvl = 0;
} else if ((s16)n >= 0x10) {
lvl = 0xF;
}
r = (lvl << 8) | 0x3000;
func_8002D4C8(0x730, (val | r) & 0xFFFF);
}
.run/P36/agents/ov_SC03_105__func_80183DA0/history.txt
+14
View File
@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 23 best 1 compiles 183 path R18 bystander @4107->4103 + R12 width n s32->u16 @4098
best-scoring single candidates of the last trace (move -> score [residual class]):
R12 width n s32->u16 @4098 -> 1 [OTHER] (from 4)
R12 width n s32->u16 @4098 -> 1 [OTHER] (from 4)
R12 width n s32->u16 @4098 -> 1 [OTHER] (from 4)
R18 bystander @4107->4103 -> 4 [COUNT] (from 23)
R18 bystander @4107->4104 -> 4 [COUNT] (from 23)
R9 swap-stmts @4106 -> 4 [COUNT] (from 23)
R8 hoist tmp0 @4124 -> 4 [COUNT] (from 4)
R7 block @4129 -> 4 [COUNT] (from 4)
R5 swap + @4133 -> 4 [COUNT] (from 4)
R10 param-copy a0 @4101 -> 4 [COUNT] (from 4)
R4 decl-move lvl 3->0 -> 4 [COUNT] (from 4)
R8 hoist tmp0 @4122 -> 4 [COUNT] (from 4)
.run/P36/agents/ov_SC03_105__func_80183DA0/neighbours.txt
+27
View File
@@ -0,0 +1,27 @@
--- func_8018423C (line 4327) ---
/* Four LOAD-BEARING details, each worth 1-2 instructions (Opus, S70y):
*
* 1. `tmp` is DECLARED AND UNUSED ON PURPOSE. The locals region is 0x20..0x3F
* (frame 0x58 = 0x20 outgoing args + 0x20 locals + 5 saved regs), i.e. FOUR
* 8-byte slots, and `out` sits at 0x38 -- so a fourth aggregate must be
* declared third to consume 0x30..0x37. expand_decl assigns slots upward
* from STARTING_FRAME_OFFSET in declaration order regardless of use.
* Deleting `tmp` moves `out` to 0x30 and shrinks the frame to 0x50.
*
* 2. `vec.f2 = 0;` BEFORE `vec.f0 = 0;`, and both AFTER `pos.f2`. The two
* `sh $zero` are the sched1 filler for the 0xE load-use gap; source order
* is what puts 0x2C ahead of 0x28 (§3-T2). The reversed order was the
* final 2-instruction residual.
*
* 3. `s32 r` with an EXPLICIT (s16) cast on the value, not `s16 r`. A `s16 r`
* defers the sll/sra 16 pair to the USE, which lands it after the second
* rand() where it coalesces straight into $a1 (-1 instruction). Casting at
* the definition puts sll/sra before/in the jal delay slot, keeps the value
* in the call-saved $s0 and re-materialises `addu $a1, $s0, $zero`.
*
* 4. `k++, step += 0x10` as the for-increment (k FIRST), and `j = i;` as the
* last statement of a do/while, not `if (i >= 3) break; j = i;`. The latter
* orders the test ahead of the copy, so reorg fills the back-branch delay
* slot with `addu $v1,$s0,$zero` instead of duplicating `addiu $s0,$v1,1`
* from the loop head (-1 instruction).
*/
.run/P36/agents/ov_SC03_105__func_80183DA0/related.txt
+43
View File
@@ -0,0 +1,43 @@
=== lever-free bodies in ov_SC03_105 sharing a callee or global with func_80183DA0 (48 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80183EE8 (src/ov_SC03_105/ov_SC03_105_jr_80181C84.c:4147) shares 1: func_8002D4C8 ---
void func_80183EE8(void) {
func_8002D4C8(0x4, 0x730);
}
--- func_80141C0C (src/ov_SC03_105/ov_SC03_105_jr_80140608.c:1508) shares 1: func_8002D4C8 ---
void func_80141C0C(s32 param_1)
{
func_8002D4C8(*(u16 *)(&D_8018B69C + (((param_1 << 16) >> 15) + (u32)D_80115110) * 2), 0);
}
--- func_80145BF8 (src/shared/ov/func_80145BF8.h:7) shares 1: func_8002D4C8 ---
void func_80145BF8(void) {
func_8002D4C8(0x21, func_80028FBC() & 0xFFFF);
func_8002D4C8(0x22, func_80029000() & 0xFFFF);
func_8002D4C8(func_80028D9C() == 0 ? 0xC : 0xB, 0);
}
--- func_80149584 (src/shared/ov/func_80149584.h:5) shares 1: func_8012EFB8 ---
void func_80149584(s32 arg0, s32 arg1, s32 arg2) {
s8 buf[8];
((void(*)(s32,s32,s32))func_8012F14C)(*(s32 *)(arg0 + 0x20) + 0x34, arg1, (s32)buf);
((void(*)(s32,s32))func_8012EFB8)((s32)buf, arg2);
}
--- func_801710DC (src/shared/ov/func_801710DC.h:7) shares 1: func_8002D4C8 ---
void func_801710DC(u8 * arg0)
{
((M2C_UNK (*)(u16, u16))func_8002D4C8)(D_8011F738, D_8011F73A);
((M2C_UNK (*)(s32))func_80171928)(arg0);
}
--- func_80131AC8 (src/shared/ov/func_80131AC8.h:5) shares 1: func_8002D4C8 ---
s32 func_80131AC8(void *a0) {
s32 s0 = func_80131CF4(*(s32 *)((u8 *)a0 + 0xBC)) & 0xFFFF;
if (s0 != 0) {
func_8002D4C8(s0, 0);
return s0;
}
return 0;
}
.run/P36/agents/ov_SC03_105__func_80183DA0/residual.txt
+40
View File
@@ -0,0 +1,40 @@
src/ov_SC03_105/ov_SC03_105_jr_80181C84.c:func_80183DA0: score 23 (COUNT; mine 79 ins, target 82) — not yet
register pairs (mine -> target, count): a1->s1 x4, a3->a2 x4, a2->a1 x2
replace mine[0:1] target[0:1]
0 addiu sp,sp,-40 | addiu sp,sp,-48
replace mine[2:3] target[2:4]
2 sw ra,36(sp) | sw ra,40(sp)
3 -- | sw s1,36(sp)
replace mine[17:18] target[18:19]
17 li a1,7 | li s1,7
replace mine[21:22] target[22:23]
21 j 21dc <func_80183DA0+0xc0> | j 21e0 <func_80183DA0+0xc4>
replace mine[30:31] target[31:32]
30 sra a2,v0,0x10 | sra a1,v0,0x10
replace mine[34:35] target[35:36]
34 j 21bc <func_80183DA0+0xa0> | j 21c0 <func_80183DA0+0xa4>
replace mine[42:44] target[43:45]
42 mfhi a3 | mfhi a2
43 sra v1,a3,0x7 | sra v1,a2,0x7
replace mine[45:47] target[46:48]
45 j 21dc <func_80183DA0+0xc0> | j 21e0 <func_80183DA0+0xc4>
46 subu s0,a2,v1 | subu s0,a1,v1
replace mine[55:57] target[56:58]
55 mfhi a3 | mfhi a2
56 sra v0,a3,0x3 | sra v0,a2,0x3
replace mine[58:60] target[59:62]
58 addu a1,a1,v0 | addu v0,s1,v0
59 sll v0,a1,0x10 | move s1,v0
60 -- | sll v0,v0,0x10
replace mine[63:65] target[65:67]
63 j 222c <func_80183DA0+0x110> | j 2234 <func_80183DA0+0x118>
64 move a1,zero | move s1,zero
replace mine[67:68] target[69:70]
67 li a1,15 | li s1,15
replace mine[69:70] target[71:72]
69 sll a1,a1,0x8 | sll a1,s1,0x8
replace mine[74:75] target[76:78]
74 lw ra,36(sp) | lw ra,40(sp)
75 -- | lw s1,36(sp)
replace mine[76:77] target[79:80]
76 addiu sp,sp,40 | addiu sp,sp,48
.run/P36/agents/ov_SC03_105__func_80183DA0/sites.txt
+3
View File
@@ -0,0 +1,3 @@
NEEDED pin $17 line 4096
REMOVED pin $2 line 4098
NEEDED launder line 4135
.run/P36/agents/ov_SC03_105__func_80183DA0/tu.txt
+2
View File
@@ -0,0 +1,2 @@
src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
func_80183DA0
.run/P36/agents/ov_SC04_015__func_8017E2CC/body_free.c
+57
View File
@@ -0,0 +1,57 @@
void func_8017E2CC(s32 param_1) {
s32 *s2 = &D_80126B58;
s32 *s1 = &D_800AE6A8;
s32 v1;
s32 v0;
if (D_801C8B74 != 0) {
v1 = D_801C8B78;
if (v1 == 0x7FFF) {
func_8002D4C8(4, 0x76C);
} else {
if (v1 >= 0x300) {
func_8002D4C8(4, 0x76C);
} else if (v1 < 0x101) {
func_8002D4C8(0x76C, 0x107F);
} else {
v0 = 0x300 - v1;
v1 = (v0 << 7) - v0;
func_8002D4C8(0x76C, (v1 / 512 & 0x7F) | 0x1000);
}
D_801C8B78 = 0x7FFF;
}
switch (D_801C8B60) {
case 0:
if (func_800CF8B4() != 0) {
if ((s1[2] & 0x80FFFFFF) == 0 && (s2[0x11] & 0x8000000) != 0) {
func_8014CBE8();
func_80178B18(param_1, &D_80188590);
D_801C8B60 = 1;
}
}
break;
case 1:
func_801789AC(param_1);
break;
}
} else {
D_801C8B60 = 0;
func_8017EA2C();
func_8017ED28();
v1 = D_801C8B78;
if (v1 == 0x7FFF) {
func_8002D4C8(4, 0x76C);
} else {
if (v1 >= 0x300) {
func_8002D4C8(4, 0x76C);
} else if (v1 < 0x101) {
func_8002D4C8(0x76C, 0x107F);
} else {
v0 = 0x300 - v1;
v1 = (v0 << 7) - v0;
func_8002D4C8(0x76C, (v1 / 512 & 0x7F) | 0x1000);
}
D_801C8B78 = 0x7FFF;
}
}
}
.run/P36/agents/ov_SC04_015__func_8017E2CC/body_tree.c
+57
View File
@@ -0,0 +1,57 @@
void func_8017E2CC(s32 param_1) {
s32 *s2 = &D_80126B58;
s32 *s1 = &D_800AE6A8;
register s32 v1 asm("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
register s32 v0 asm("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
if (D_801C8B74 != 0) {
v1 = D_801C8B78;
if (v1 == 0x7FFF) {
func_8002D4C8(4, 0x76C);
} else {
if (v1 >= 0x300) {
func_8002D4C8(4, 0x76C);
} else if (v1 < 0x101) {
func_8002D4C8(0x76C, 0x107F);
} else {
v0 = 0x300 - v1;
v1 = (v0 << 7) - v0;
func_8002D4C8(0x76C, (v1 / 512 & 0x7F) | 0x1000);
}
D_801C8B78 = 0x7FFF;
}
switch (D_801C8B60) {
case 0:
if (func_800CF8B4() != 0) {
if ((s1[2] & 0x80FFFFFF) == 0 && (s2[0x11] & 0x8000000) != 0) {
func_8014CBE8();
func_80178B18(param_1, &D_80188590);
D_801C8B60 = 1;
}
}
break;
case 1:
func_801789AC(param_1);
break;
}
} else {
D_801C8B60 = 0;
func_8017EA2C();
func_8017ED28();
v1 = D_801C8B78;
if (v1 == 0x7FFF) {
func_8002D4C8(4, 0x76C);
} else {
if (v1 >= 0x300) {
func_8002D4C8(4, 0x76C);
} else if (v1 < 0x101) {
func_8002D4C8(0x76C, 0x107F);
} else {
v0 = 0x300 - v1;
v1 = (v0 << 7) - v0;
func_8002D4C8(0x76C, (v1 / 512 & 0x7F) | 0x1000);
}
D_801C8B78 = 0x7FFF;
}
}
}
.run/P36/agents/ov_SC04_015__func_8017E2CC/history.txt
+15
View File
@@ -0,0 +1,15 @@
s5: verdict NO-MATCH start 14 best 13 compiles 182 path R6 inline v0 @4737
s7: verdict NO-MATCH start 14 best 13 compiles 547 path R6 inline v0 @4737
best-scoring single candidates of the last trace (move -> score [residual class]):
R6 inline v0 @4737 -> 13 [MIXED] (from 14)
R2 decl-order 1,0 -> 13 [MIXED] (from 13)
R4 decl-move v1 2->0 -> 13 [MIXED] (from 13)
R7 block @4769 -> 13 [MIXED] (from 13)
R8 hoist tmp0 @4770 -> 13 [MIXED] (from 13)
R4 decl-move v1 2->1 -> 13 [MIXED] (from 13)
R6 inline v1 @4770 -> 13 [MIXED] (from 13)
R7 do-while @4769 -> 13 [MIXED] (from 13)
R8 hoist tmp0 @4737 -> 13 [MIXED] (from 13)
R4 decl-move v0 3->0 -> 13 [MIXED] (from 13)
R6 inline v1 @4737 -> 13 [REG] (from 13)
R7 block @4767 -> 13 [MIXED] (from 13)
.run/P36/agents/ov_SC04_015__func_8017E2CC/neighbours.txt
+33
View File
@@ -0,0 +1,33 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: plumbing
// @stuck: none — MATCH
// @class: regalloc-order — simplified sibling of matched func_8017B614.
// @stuck: none. Block-moves are align-1 struct-assigns (u8[8]) -> emit_block_move
// @class: struct
// @stuck: none — MATCH (74 ins)
// @class: regalloc-order + T1 memcpy-builtin→call re-crack
// @stuck: 0 (iso). Register lever = $16 pin + in-place re-tie on the memcpy-branch src (keeps
// @class: plumbing
// @stuck: none — MATCH
// @class: schedule
// @stuck: none — MATCH
// @class: struct
// @stuck: none — MATCH
// @class: struct
// @stuck: none — MATCH (63 ins)
// @class: struct
// @stuck: none — MATCH (62 ins)
// @class: struct
// @stuck: none — MATCH (65 ins)
// @class: regalloc-order
// @stuck: pending self-check — register order param=$s2 counter=$s1 ptr=$s0
// @class: plumbing
// @stuck: none — MATCH (expected); short-typed global increment + signed compare, store-2 on overflow
// @class: plumbing
// @stuck: none — MATCH expected (simple short-increment + guarded call)
// @class: regalloc-order
// @stuck: none — MATCH (branch-polarity invert: fn-ptr non-zero call is the fall-through arm)
// @class: plumbing
// @stuck: none — MATCH (41 ins, relocation-masked); frame needed a 0x30 address-taken local
// @class: regalloc-order
// @stuck: none — MATCH
.run/P36/agents/ov_SC04_015__func_8017E2CC/related.txt
+880
View File
@@ -0,0 +1,880 @@
=== lever-free bodies in ov_SC04_015 sharing a callee or global with func_8017E2CC (84 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80144B9C (src/shared/ov/func_80144B9C.h:159) shares 3: D_800AE6A8 D_80126B58 func_8002D4C8 ---
void func_80144B9C(void) {
P10 *p10 = (P10 *)D_80126B58;
P14 *p14 = (P14 *)D_80078E78;
register u8 *p = D_800AF630;
P18 *p18 = (P18 *)D_800AE6A8;
P1C *p1C = (P1C *)D_80126948;
HDR *hdr;
ENT *ent;
s32 tbl;
s16 i;
void (*calltmp)(void);
s32 flag;
func_80019018();
func_80018E78();
if (p18->f8 == 0) {
hdr = (HDR *)func_801457A4(*(s16 *)(p + 0xA3D8));
p18->f16 = 0;
flag = 1;
D_8011DB14 = p14->f3A;
D_8011DB1C = p14->f3E;
D_80128150 = 100;
func_8002AB64();
} else {
hdr = (HDR *)func_801457A4(*(s16 *)(p + 0xA3D8));
flag = 0;
}
p18->f1C = hdr->fC8;
tbl = hdr->fC8;
if (p18->f16 == 0xFF) {
ent = &D_80078E50;
} else {
ent = (ENT *)*(s32 *)(p18->f16 * 4 + tbl);
}
p18->fC = ent->f8;
p18->f14 = 0;
p10->f4D = 0;
if (ent->fC != (s32)D_8010F5C8) {
p10->f198 = ent->fC;
}
if (*(s16 *)(p + 0xA3DA) == 0x1000 && *(s16 *)(p + 0xA3DC) == 0x1000) {
p10->f6 = p10->f88 = p10->f90 = p18->f20;
p10->fA = p10->f8A = p10->f92 = p18->f22;
p10->fE = p10->f8C = p10->f94 = p18->f24;
p10->f20->f12 = p18->f26;
p18->f18 = 0;
} else {
p10->f6 = p10->f88 = p10->f90 = ent->f10;
p10->fA = p10->f8A = p10->f92 = ent->f12;
p10->fE = p10->f8C = p10->f94 = ent->f14;
p10->f20->f12 = ent->f16;
}
p10->f154 = p10->f15C = p10->f6;
p10->f156 = p10->f15E = p10->fA;
p10->f158 = p10->f160 = p10->fE;
func_80015978((void *)((s32)p10 + 4), D_80126DB0);
D_80126DB6 = p10->f20->f12;
if (*(s16 *)(p + 0xA3DA) == 0x1000 &&
(*(s16 *)(p + 0xA3DC) == 0x1000 || *(s16 *)(p + 0xA3DC) == 0x2000) && flag == 0) {
ent->f18();
func_8012A1BC();
} else {
if (*(s16 *)(p + 0xA3DA) == 0x1000 && *(s16 *)(p + 0xA3DC) == 0x3000) {
p1C->fA0 = ent->f3;
} else {
p1C->fA0 = 0;
}
ent->f18();
}
if (*(s16 *)(p + 0xA3D8) == 0x3069) {
p1C->fA0 = ent->f3;
}
D_801151D4 = (s32)p1C;
func_8002850C(hdr->f0, hdr->f2, hdr->f4);
D_800A5E88 = hdr->f6;
D_800A5E8C = hdr->f8;
D_800A5E90 = hdr->fA;
D_800A5E94 = hdr->fC;
D_800A5E95 = hdr->fD;
D_800A5E96 = hdr->fE;
func_80028620(0, &D_800A5E88);
D_800A5E98 = hdr->f10;
D_800A5E9C = hdr->f12;
D_800A5EA0 = hdr->f14;
D_800A5EA4 = hdr->f16;
D_800A5EA5 = hdr->f17;
D_800A5EA6 = hdr->f18;
func_80028620(1, &D_800A5E98);
D_800A5EA8 = hdr->f1A;
D_800A5EAC = hdr->f1C;
D_800A5EB0 = hdr->f1E;
D_800A5EB4 = hdr->f20;
D_800A5EB5 = hdr->f21;
D_800A5EB6 = hdr->f22;
func_80028620(2, &D_800A5EA8);
func_80129398();
D_800B9AAC = hdr->f24;
D_800B9B00 = hdr->f26;
D_800B9AC4 = hdr->f28;
D_800B9B18 = hdr->f2C;
D_800B9AC8 = hdr->f30;
D_800B9B1C = hdr->f34;
D_800B9AB2 = hdr->f38;
D_800B9B06 = hdr->f3A;
D_800B9AB6 = hdr->f3C;
D_800B9B0A = hdr->f3E;
D_800B9ABC = hdr->f40[0];
D_800B9ABD = hdr->f40[1];
D_800B9ABE = hdr->f40[2];
D_800B9B10 = hdr->f40[3];
D_800B9B11 = hdr->f40[4];
D_800B9B12 = hdr->f40[5];
D_800B9ABF = hdr->f40[6];
D_800B9AC0 = hdr->f40[7];
D_800B9AC1 = hdr->f40[8];
D_800B9B13 = hdr->f40[9];
D_800B9B14 = hdr->f40[10];
D_800B9B15 = hdr->f40[11];
func_8012944C();
p10->fB0 = hdr->f4C;
p10->fCC = hdr->f50;
p10->f1E8 = hdr->f54;
p10->f1F0 = hdr->f58;
D_80126728 = hdr->f5C;
D_8011DB08 = hdr->f60;
D_80126AEC = hdr->f64;
p10->f19C = (s32)hdr + 0x68;
func_801336E8(hdr->f88, hdr->f8C, hdr->f90);
func_8013B83C(hdr->f94, hdr->f98, hdr->f9C);
func_8013B568(hdr->fA8);
func_800D02C0(hdr->fD4);
func_80011E84(hdr->fD8);
for (i = 0; i < 8; i++) {
D_801151F0[i] = *(u8 *)((s32)hdr + i + 0xAC);
}
D_801274C8 = hdr->fB4;
D_801274CC = hdr->fB8;
D_801274D0 = hdr->fBC;
D_801274D4 = hdr->fC0;
D_801270B8 = hdr->fC4;
D_80127520 = hdr->fC4;
D_801151D8 = 0;
D_8011DB28 = 0;
calltmp = ent->f20;
calltmp();
func_8013D3D4(hdr->fA0, hdr->fA4);
func_8002D4C8(0x1E, 0);
if (p18->f8 == 0) {
D_80078E50 = *ent;
}
p18->f4 = (s32)&D_80078E50;
p18->f8 = p18->f8 & 0x7F000000;
if (func_800CF854() != 0) {
func_8001C14C();
func_8012A110();
}
}
--- func_80147364 (src/shared/ov/func_80147364.h:9) shares 2: D_80126B58 func_8002D4C8 ---
void aF80147364(u16 param_1, u16 param_2) {
s32 sp10[2];
s32 *p = &D_80126B58;
if (currentLocationId == 0x308d) {
((void (*)(void *, void *))func_80015978)(p + 1, sp10);
((void (*)(void *, s32, s32))aF8012E5CC)(sp10, param_1, param_2);
} else {
func_8002D4C8(param_1, param_2);
}
}
--- func_801837C4 (src/ov_SC04_015/ov_SC04_015_jr_801820DC.c:4038) shares 2: D_80126B58 func_8002D4C8 ---
void func_801837C4(void)
{
extern u16 D_800B99DA;
extern s32 D_80126B58;
extern u8 D_800AF648;
extern s32 D_801C44EC;
extern s32 func_80013450(s32);
s32 *p = &D_80126B58;
s32 sxy, pv, flag;
s16 x;
s32 pan;
s32 dist;
s32 vol;
if (!(D_800B99DA & 1)) {
func_8004914C(&D_800AF648);
func_800491AC(&D_800AF648);
if (RotTransPers((s32)&D_801C44EC, (s32)&sxy, &pv, &flag) <= 0 || flag < 0) {
func_8002D4C8(4, 0x7E6);
} else {
x = *(u16 *)&sxy + 0xA0;
*(s16 *)&sxy = x;
if (x < 0) {
x = 0;
*(s16 *)&sxy = x;
} else if (x >= 0x141) {
x = 0x140;
*(s16 *)&sxy = x;
}
x = *(s16 *)&sxy;
pan = (x * 15) / 320;
dist = ((s32 (*)(s32, s32))func_80013450)((s32)(p + 1), (s32)&D_801C44EC);
if (dist >= 0x240) {
dist = 0x23F;
}
{
s32 panpart;
vol = ((0x23F - dist) * 127) / 576;
panpart = ((pan << 8) & 0xF00) | 0x3000;
func_8002D4C8(0x7E6, panpart | (vol & 0x7F));
}
}
}
}
--- func_80178D40 (src/ov_SC04_015/ov_SC04_015_jr_80178D40.c:2638) shares 2: D_80126B58 func_8002D4C8 ---
s32 func_80178D40(s32 arg0, s32 arg1)
{
extern void func_80179B28(s32);
extern s32 func_80137614(s32, s32, s32);
extern void func_8012F214(void *, void *, void *);
extern void func_8012F40C(void *, void *);
extern void func_80179D30(void *);
extern void func_80179D78(void *);
extern void func_80179EA0(void *);
extern void func_80179DCC(s32);
extern void func_80179DF8(void);
extern void func_80179E1C(s32);
extern void func_80179E48(s32);
extern void func_80179E74(s32);
extern void func_80179EE8(s32);
extern void func_80179F14(s32, s32);
extern void func_80179F44(void);
extern void func_80179F6C(s32);
extern void func_80179F98(s32);
extern void func_80179FEC(s32);
extern void func_8017A040(s32);
extern void func_8017A094(s32);
extern void func_8017A0C4(s32);
extern void func_8017A0F4(void);
extern void func_8017A11C(void);
extern void func_8017A144(s32);
extern void func_8017A180(void);
extern void func_8017A1A8(void);
extern void func_8017A1D0(void);
extern void func_8017A1F8(void);
extern void func_8017A220(void);
extern void func_8017A248(void);
extern void func_8017A270(void);
extern void func_8017A298(void);
extern void func_8017A2C0(void);
extern void func_8017A2E8(void);
extern void func_8017A310(void);
extern void func_8017A338(void);
extern void func_8017A360(void);
extern void func_8017A388(void);
extern void func_8017A3B0(void);
extern void func_8017A3D8(void);
extern void func_8017AD0C(s32);
extern void func_8017B238(void *, s32);
extern void func_8017B614(void *, s32);
extern void func_8017B7A8(void *);
extern void func_8017B824(void);
extern void func_8017B880(void);
extern void func_8017B940(void *);
extern void func_8017BA3C(void *, s32);
extern void func_8017BB34(void *, s32);
extern void func_8012A828(void *, s32);
extern s32 func_8012B8A4(void *);
extern void func_8012E88C(void *);
extern void func_8012E8A8(void *);
extern void func_8001AAD0(s32, s32);
extern s32 D_801C84A4;
extern s32 D_801C88B8;
extern s16 D_801C88BC;
extern s16 D_801C88C0;
extern s16 D_801C88C4;
extern s16 D_801C88C8;
extern s32 D_801C88D0;
extern s32 D_801C88D4;
extern s32 D_801C88E4;
extern s16 D_801C88E8;
extern s16 D_801C88EC;
extern s32 D_801C88F0;
extern s32 D_801C88F8;
extern s32 D_801C88FC[10];
extern s32 D_801C9250;
extern s16 D_801C9320;
extern s32 D_801C9364;
SV3_80178D40 v10, v18, v20, v28, v30, v38, v40, v48;
s32 out50[2];
SV3_80178D40 v58, v60;
Actor_80178D40 *pv = &(*(Actor_80178D40*)&D_80126B58);
s32 i5b, i5c, fp5b, fp5c;
s32 *q5b, *q5c, *p5c, *r5c;
s16 *g = &D_801C9320;
switch (((Cmd_80178D40 *)arg1)->op) {
case 1:
func_80179B28(D_801C88B8);
D_801C88B8 = func_80137614(((Cmd_80178D40 *)arg1)->a.w, D_801C88C4, D_801C88C8 ? 0x48 : 0x40);
(*(s16*)&D_801C93DC) = 2;
break;
case 0:
func_80179B28(D_801C88B8);
D_801C88B8 = func_80137614(((Cmd_80178D40 *)arg1)->a.w, D_801C88BC, D_801C88C0 ? 0x48 : 0x40);
(*(s16*)&D_801C93DC) = 1;
break;
case 0x45:
((void (*)(s32))((Cmd_80178D40 *)arg1)->a.w)(((Actor_80178D40 *)arg0));
if (D_801C9250 != 0) {
func_80179B28(D_801C88B8);
D_801C88B8 = func_80137614(((Actor_80178D40 *)arg0)->unkDC[1], D_801C88BC, D_801C88C0 ? 0x48 : 0x40);
(*(s16*)&D_801C93DC) = 1;
} else {
(*(s16*)&D_801C93DC) = 3;
}
break;
case 0x32:
func_80179B28(D_801C88B8);
D_801C88B8 = func_80137614(((Actor_80178D40 *)arg0)->unkDC[((Cmd_80178D40 *)arg1)->a.w], D_801C88BC,
D_801C88C0 ? 0x48 : 0x40);
(*(s16*)&D_801C93DC) = 1;
break;
case 2:
func_80179B28(D_801C88B8);
if (D_801C88D0 != 0) {
D_801C84A0 = D_801C88D0;
D_801C88D0 = 0;
(*(s16*)&D_801C93DC) = 3;
return;
}
(*(s16*)&D_801C93DC) = 6;
break;
case 6:
func_80179DF8();
(*(s16*)&D_801C93DC) = 3;
break;
case 3:
v10.vx = ((Cmd_80178D40 *)arg1)->a.uh[0];
v10.vy = 0;
v10.vz = ((Cmd_80178D40 *)arg1)->a.uh[1];
func_80179D30(&v10);
(*(s16*)&D_801C93DC) = 3;
break;
case 4:
v10.vx = ((Cmd_80178D40 *)arg1)->a.uh[0];
v10.vy = 0;
v10.vz = ((Cmd_80178D40 *)arg1)->a.uh[1];
func_8012F214(((Actor_80178D40 *)arg0), &v10, &v18);
func_80179D30(&v18);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x4C:
func_80179D78((void *)((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x4D:
v10.vx = ((Blk_80178D40 *)((Cmd_80178D40 *)arg1)->a.p)->f0;
v10.vy = 0;
v10.vz = ((Blk_80178D40 *)((Cmd_80178D40 *)arg1)->a.p)->f4;
func_8012F214(((Actor_80178D40 *)arg0), &v10, &v18);
v18.pad = ((Blk_80178D40 *)((Cmd_80178D40 *)arg1)->a.p)->f6;
func_80179D78(&v18);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x15:
v10.vx = ((Cmd_80178D40 *)arg1)->a.uh[0];
v10.vy = 0;
v10.vz = ((Cmd_80178D40 *)arg1)->a.uh[1];
func_8012F214(((Actor_80178D40 *)arg0)->unkD4, &v10, &v18);
func_80179D30(&v18);
(*(s16*)&D_801C93DC) = 3;
break;
case 5:
func_80179DCC(((Cmd_80178D40 *)arg1)->a.h[0]);
(*(s16*)&D_801C93DC) = 3;
break;
case 7:
func_80179E1C(((Cmd_80178D40 *)arg1)->a.h[0]);
(*(s16*)&D_801C93DC) = 3;
break;
case 8:
func_80179E74(((Cmd_80178D40 *)arg1)->a.h[0]);
(*(s16*)&D_801C93DC) = 3;
break;
case 9:
v10.vx = ((Cmd_80178D40 *)arg1)->a.uh[0];
v10.vy = 0;
v10.vz = ((Cmd_80178D40 *)arg1)->a.uh[1];
func_80179EA0(&v10);
(*(s16*)&D_801C93DC) = 3;
break;
case 0xA:
v10.vx = ((Actor_80178D40 *)arg0)->unk6;
v10.vy = ((Actor_80178D40 *)arg0)->unkA;
v10.vz = ((Actor_80178D40 *)arg0)->unkE;
func_80179EA0(&v10);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x16: {
Actor_80178D40 *p = ((Actor_80178D40 *)arg0)->unkD4;
v10.vx = p->unk6;
v10.vy = p->unkA;
v10.vz = p->unkE;
func_80179EA0(&v10);
(*(s16*)&D_801C93DC) = 3;
break;
}
case 0xB:
func_8017A0F4();
(*(s16*)&D_801C93DC) = 3;
break;
case 0xC:
func_8017A11C();
(*(s16*)&D_801C93DC) = 3;
break;
case 0xD:
func_8017A180();
(*(s16*)&D_801C93DC) = 3;
break;
case 0xE:
func_8017A1A8();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x10:
func_8017A1D0();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x46:
func_8017A1F8();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x59:
func_8017A220();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x5A:
func_8017A248();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x49:
func_8017A144(((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x47:
func_8017A270();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x17:
func_80179EE8(((Cmd_80178D40 *)arg1)->a.h[0]);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x18:
func_80179F14(((Cmd_80178D40 *)arg1)->a.h[0], ((Cmd_80178D40 *)arg1)->a.h[1]);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x19:
func_80179F6C(((Cmd_80178D40 *)arg1)->a.h[0]);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x1A:
func_80179F98(((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x51:
func_8017A040(((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x1B:
D_801C88F0 = ((Cmd_80178D40 *)arg1)->a.w;
func_80179F44();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x1C:
func_8017A338();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x52:
func_8017A360();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x1D:
func_8017A388();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x3B:
func_8017A094(((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x3C:
func_8017A0C4(((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801C93DC) = 3;
break;
case 0xF:
case 0x3F:
(*(s16*)&D_801C93DC) = 4;
D_801C84A4 = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x3E:
(*(s16*)&D_801C93DC) = 5;
D_801C88E4 = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x40:
D_801C88E4 = (s32)func_8017A3B0;
(*(s16*)&D_801C93DC) = 5;
break;
case 0x23:
func_8012A828(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x31:
func_8012A828(((Actor_80178D40 *)arg0), ((Actor_80178D40 *)arg0)->unkDC[((Cmd_80178D40 *)arg1)->a.w]);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x24:
(*(s16*)&D_801C93DC) = 3;
((Actor_80178D40 *)arg0)->unk20->unk12 = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x25:
g[0] = 1;
g[2] = ((Actor_80178D40 *)arg0)->unk20->unk12 + ((Cmd_80178D40 *)arg1)->a.uh[0];
g[1] = 0x1E;
(*(s16*)&D_801C93DC) = 3;
g[3] = ((Cmd_80178D40 *)arg1)->a.uh[1];
break;
case 0x48:
g[0] = 1;
g[2] = ((Cmd_80178D40 *)arg1)->a.uh[0];
g[1] = 0x1E;
(*(s16*)&D_801C93DC) = 3;
g[3] = ((Cmd_80178D40 *)arg1)->a.uh[1];
break;
case 0x26:
g[0] = 1;
g[2] = func_8012B8A4(((Actor_80178D40 *)arg0));
g[1] = 0x1E;
(*(s16*)&D_801C93DC) = 3;
g[3] = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x3D:
((void(*)(void *, s32))func_8012E8E0)(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x27:
g[0] = 2;
g[4] = ((Cmd_80178D40 *)arg1)->a.uh[0];
(*(s16*)&D_801C93DC) = 3;
g[1] = ((Cmd_80178D40 *)arg1)->a.uh[1];
break;
case 0x4F:
g[5] = 1;
g[0] = 3;
g[6] = ((Cmd_80178D40 *)arg1)->a.uh[0];
(*(s16*)&D_801C93DC) = 3;
g[7] = ((Actor_80178D40 *)arg0)->unkA;
g[8] = ((Cmd_80178D40 *)arg1)->a.uh[1];
g[1] = 0x10;
g[3] = 4;
/* fallthrough */
case 0x28:
g[5] = 0;
g[0] = 3;
g[6] = ((Cmd_80178D40 *)arg1)->a.uh[0];
(*(s16*)&D_801C93DC) = 3;
g[7] = ((Actor_80178D40 *)arg0)->unkA;
g[8] = ((Cmd_80178D40 *)arg1)->a.uh[1];
g[1] = 0x10;
g[3] = 4;
break;
case 0x29:
v20.vx = ((Cmd_80178D40 *)arg1)->a.uh[0];
v20.vy = ((Actor_80178D40 *)arg0)->unkA;
v20.vz = ((Cmd_80178D40 *)arg1)->a.uh[1];
func_8012F214(((Actor_80178D40 *)arg0), &v20, &v28);
g[5] = 0;
g[0] = 3;
*(SV3_80178D40 *)(g + 6) = v28;
g[1] = 0x10;
g[3] = 4;
(*(s16*)&D_801C93DC) = 3;
break;
case 0x50:
v30.vx = ((Cmd_80178D40 *)arg1)->a.uh[0];
v30.vy = ((Actor_80178D40 *)arg0)->unkA;
v30.vz = ((Cmd_80178D40 *)arg1)->a.uh[1];
func_8012F214(((Actor_80178D40 *)arg0), &v30, &v38);
g[5] = 1;
g[0] = 3;
*(SV3_80178D40 *)(g + 6) = v38;
g[1] = 0x10;
g[3] = 4;
(*(s16*)&D_801C93DC) = 3;
break;
case 0x2A:
g[0] = 4;
(*(s16*)&D_801C93DC) = 3;
g[1] = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x1E:
func_8017B238(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x21:
func_8017BA3C(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
func_8017B238(((Actor_80178D40 *)arg0), (s32)&D_801C88D4);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x54:
func_8017BB34(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
func_8017B238(((Actor_80178D40 *)arg0), (s32)&D_801C88D4);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x1F:
func_8017B614(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x22:
func_8017BA3C(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
func_8017B614(((Actor_80178D40 *)arg0), (s32)&D_801C88D4);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x55:
func_8017BB34(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
func_8017B614(((Actor_80178D40 *)arg0), (s32)&D_801C88D4);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x20:
func_8017B7A8(((Actor_80178D40 *)arg0));
(*(s16*)&D_801C93DC) = 3;
break;
case 0x4E:
D_801C88F8 = ((Cmd_80178D40 *)arg1)->a.w;
func_8017B940(((Actor_80178D40 *)arg0));
(*(s16*)&D_801C93DC) = 3;
break;
case 0x57:
func_8017B824();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x58:
func_8017B880();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x2B:
(*(s16*)&D_801C93DC) = 3;
((Actor_80178D40 *)arg0)->unk2 = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x2C:
(*(s16*)&D_801C93DC) = 3;
((Actor_80178D40 *)arg0)->unk34 = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x2D:
(*(s16*)&D_801C93DC) = 3;
((Actor_80178D40 *)arg0)->unkD8 = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x2F:
(*(s16*)&D_801C93DC) = 3;
((Actor_80178D40 *)arg0)->unk10A = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x2E:
(*(s16*)&D_801C93DC) = 3;
((Actor_80178D40 *)arg0)->unkF8 = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x11:
func_8017A298();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x12:
func_8017A2C0();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x13:
func_8017A2E8();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x14:
func_8017A310();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x33: {
void (*f)(Actor_80178D40 *) = (void (*)(Actor_80178D40 *))((Cmd_80178D40 *)arg1)->a.w;
D_801C9364 = (s32)&((Cmd_80178D40 *)arg1)[1];
f(((Actor_80178D40 *)arg0));
(*(s16*)&D_801C93DC) = 3;
break;
}
case 0x30:
if (((Cmd_80178D40 *)arg1)->a.w == 0) {
func_8012E8A8(((Actor_80178D40 *)arg0));
(*(s16*)&D_801C93DC) = 3;
} else {
func_8012E88C(((Actor_80178D40 *)arg0));
(*(s16*)&D_801C93DC) = 3;
}
break;
case 0x4A:
((void(*)())func_80175414)();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x4B:
func_80175454();
(*(s16*)&D_801C93DC) = 3;
break;
case 0x34:
(*(s16*)&D_801C93DC) = 3;
D_801C84A0 = ((Cmd_80178D40 *)arg1)->a.w;
return;
case 0x35:
D_801C88D0 = (s32)&((Cmd_80178D40 *)arg1)[1];
(*(s16*)&D_801C93DC) = 3;
D_801C84A0 = ((Cmd_80178D40 *)arg1)->a.w;
return;
case 0x36:
(*(s16*)&D_801C93DC) = 3;
D_801C84A0 += 8;
if (((s32 (*)(s32))((Cmd_80178D40 *)arg1)->a.w)(((Actor_80178D40 *)arg0)) == 0) {
break;
}
D_801C84A0 = *(s32 *)(D_801C84A0 + 4);
return;
case 0x37:
(*(s16*)&D_801C93DC) = 3;
D_801C88BC = ((Cmd_80178D40 *)arg1)->a.uh[0];
D_801C88C0 = ((Cmd_80178D40 *)arg1)->a.uh[1];
break;
case 0x38:
(*(s16*)&D_801C93DC) = 3;
D_801C88C4 = ((Cmd_80178D40 *)arg1)->a.uh[0];
D_801C88C8 = ((Cmd_80178D40 *)arg1)->a.uh[1];
break;
case 0x39: {
s32 w1, w2;
v40.vx = ((Actor_80178D40 *)arg0)->unk6;
v40.vy = ((Actor_80178D40 *)arg0)->unkA;
v40.vz = ((Actor_80178D40 *)arg0)->unkE;
v48.vx = pv->unk6;
v48.vy = pv->unkA;
v48.vz = pv->unkE;
func_8012F40C(out50, &v40);
w1 = out50[0];
func_8012F40C(out50, &v48);
w2 = out50[0];
(*(s16*)&D_801C93DC) = 3;
D_801C88BC = w1;
D_801C88C0 = (s16)w1 >= (s16)w2;
break;
}
case 0x3A: {
s32 w1, w2;
v58.vx = ((Actor_80178D40 *)arg0)->unk6;
v58.vy = ((Actor_80178D40 *)arg0)->unkA;
v58.vz = ((Actor_80178D40 *)arg0)->unkE;
v60.vx = pv->unk6;
v60.vy = pv->unkA;
v60.vz = pv->unkE;
func_8012F40C(out50, &v58);
w1 = out50[0];
func_8012F40C(out50, &v60);
w2 = out50[0];
(*(s16*)&D_801C93DC) = 3;
D_801C88C4 = w2;
D_801C88C8 = (s16)w1 < (s16)w2;
break;
}
case 0x41:
((void(*)(s32, s32))func_8002D4C8)(((Cmd_80178D40 *)arg1)->a.uh[0], ((Cmd_80178D40 *)arg1)->a.uh[1]);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x42:
func_8017AD0C(((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x43:
D_801C88E4 = (s32)func_8017A3D8;
D_801C88EC = 0;
(*(s16*)&D_801C93DC) = 5;
D_801C88E8 = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x44:
func_8001AAD0(((Cmd_80178D40 *)arg1)->a.h[0], ((Cmd_80178D40 *)arg1)->a.h[1]);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x53:
func_80179E48(((Cmd_80178D40 *)arg1)->a.h[0]);
(*(s16*)&D_801C93DC) = 3;
break;
case 0x56:
func_80179FEC(((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801C93DC) = 3;
break;
L5B_found:
fp5b = ((Cmd_80178D40 *)arg1)->a.w;
*q5b = fp5b;
((void (*)(Actor_80178D40 *))fp5b)(((Actor_80178D40 *)arg0));
(*(s16*)&D_801C93DC) = 3;
break;
case 0x5B:
i5b = 0;
q5b = D_801C88FC;
do {
i5b++;
if (*q5b == 0) {
goto L5B_found;
}
q5b++;
} while (i5b < 10);
(*(s16*)&D_801C93DC) = 3;
break;
L5C_found1:
*q5c = 0;
goto L5C_join;
case 0x5C:
i5c = 0;
if (((Cmd_80178D40 *)arg1)->a.w != 0) {
fp5c = ((Cmd_80178D40 *)arg1)->a.w;
q5c = D_801C88FC;
do {
if (*q5c == fp5c) {
goto L5C_found1;
}
i5c++;
q5c++;
} while (i5c < 10);
L5C_join:
if (i5c != 10) {
(*(s16*)&D_801C93DC) = 3;
break;
}
i5c = 0;
do {
p5c = &D_801C88FC[i5c];
if (*p5c != 0) {
goto L5C_found2;
}
i5c++;
} while (i5c < 10);
(*(s16*)&D_801C93DC) = 3;
break;
L5C_found2:
*p5c = 0;
goto L5D;
}
r5c = D_801C88FC;
do {
i5c++;
if (*r5c != 0) {
*r5c = 0;
goto L5D;
}
r5c++;
} while (i5c < 10);
/* fallthrough */
case 0x5D:
L5D:
(*(s16*)&D_801C93DC) = 3;
break;
default:
break;
}
Lend:
D_801C84A0 += 8;
}
--- func_8014AD7C (src/shared/ov/func_8014AD7C.h:5) shares 1: D_80126B58 ---
void func_8014AD7C(s32 a0) {
func_8014ADA8((s32)&D_80126B58, a0);
}
--- func_8014B12C (src/shared/ov/func_8014B12C.h:5) shares 1: D_80126B58 ---
void func_8014B12C(void) {
func_8014B154(&D_80126B58);
}
.run/P36/agents/ov_SC04_015__func_8017E2CC/residual.txt
+20
View File
@@ -0,0 +1,20 @@
src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017E2CC: score 14 (MIXED; mine 134 ins, target 134) — not yet
register pairs (mine -> target, count): v0->v1 x10, a1->v0 x6, a1->v1 x2
replace mine[33:39] target[33:39]
33 subu a1,v0,v1 | subu v0,v0,v1
34 sll v0,a1,0x7 | sll v1,v0,0x7
35 subu v1,v0,a1 | subu v1,v1,v0
36 bgez v1,353c <func_8017E2CC+0x9c> | bgez v1,3544 <func_8017E2CC+0xa4>
37 move a1,v1 | sra a1,v1,0x9
38 addiu a1,v1,511 | addiu v1,v1,511
replace mine[40:41] target[40:41]
40 sra a1,a1,0x9 | sra a1,v1,0x9
replace mine[112:118] target[112:118]
112 subu a1,v0,v1 | subu v0,v0,v1
113 sll v0,a1,0x7 | sll v1,v0,0x7
114 subu v0,v0,a1 | subu v1,v1,v0
115 bgez v0,3680 <func_8017E2CC+0x1e0> | bgez v1,3680 <func_8017E2CC+0x1e0>
116 sra a1,v0,0x9 | sra a1,v1,0x9
117 addiu v0,v0,511 | addiu v1,v1,511
replace mine[119:120] target[119:120]
119 sra a1,v0,0x9 | sra a1,v1,0x9
.run/P36/agents/ov_SC04_015__func_8017E2CC/sites.txt
+2
View File
@@ -0,0 +1,2 @@
NEEDED pin $3 line 4824
NEEDED pin $2 line 4825
.run/P36/agents/ov_SC04_015__func_8017E2CC/tu.txt
+2
View File
@@ -0,0 +1,2 @@
src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
func_8017E2CC
.run/P36/agents/ov_SC04_015__func_8017E830/body_free.c
+61
View File
@@ -0,0 +1,61 @@
void func_8017E830(s32 a0)
{
/* frame: vars = 0x50 - ROUND8(args 0x10) - ROUND8(4*6 regs) = 0x28 (cookbook 164-53/162i1) */
s32 pad[10];
s32 fval;
s32 n1;
s32 s4;
s32 s1, s2;
u8 *p;
s32 u_lo, u_hi;
s32 X, Y;
s32 x_lo, y_lo, x_hi, y_hi;
if (*(s16 *)(a0 + 0) == 2) {
fval = *(s16 *)(a0 + 0x18);
D_801C8C60 = 1;
n1 = fval + 1;
s4 = ((n1 & 7) << 2) + 0x140;
s1 = (n1 / 8) * 24;
p = (u8 *)func_80010A08(0x28);
s2 = s1 + 0x160;
*(u16 *)(p + 0xE) = GetClut(0x160, 0x1BA);
*(u16 *)(p + 0x16) = GetTPage(0, 0, s4 & 0x3C0, s2 & -0x100);
p[3] = 9;
*(u32 *)(p + 4) = 0x808080;
p[7] = 0x2C;
u_hi = (s4 & 0x3F) << 2;
u_lo = u_hi;
u_hi += 0x10;
s1 = s1 + 0x178;
p[0xC] = u_lo;
p[0xD] = s2;
p[0x14] = u_hi;
p[0x15] = s2;
p[0x1C] = u_lo;
p[0x1D] = s1;
p[0x24] = u_hi;
p[0x25] = s1;
X = *(s16 *)(a0 + 0x10);
Y = *(s16 *)(a0 + 0x14);
x_lo = X - 8;
y_lo = Y - 9;
x_hi = X + 8;
y_hi = Y + 0xF;
*(s16 *)(p + 0x8) = x_lo;
*(s16 *)(p + 0xA) = y_lo;
*(s16 *)(p + 0x10) = x_hi;
*(s16 *)(p + 0x12) = y_lo;
*(s16 *)(p + 0x18) = x_lo;
*(s16 *)(p + 0x1A) = y_hi;
*(s16 *)(p + 0x20) = x_hi;
*(s16 *)(p + 0x22) = y_hi;
AddPrim(*(s32 *)((u8 *)&D_800A651C + ((u16)D_800B9A02 * 0x14)) + 4, p);
}
}
.run/P36/agents/ov_SC04_015__func_8017E830/body_tree.c
+62
View File
@@ -0,0 +1,62 @@
void func_8017E830(s32 a0)
{
/* frame: vars = 0x50 - ROUND8(args 0x10) - ROUND8(4*6 regs) = 0x28 (cookbook 164-53/162i1) */
s32 pad[10];
s32 fval;
s32 n1;
s32 s4;
s32 s1, s2;
u8 *p;
s32 u_lo, u_hi;
s32 X, Y;
s32 x_lo, y_lo, x_hi, y_hi;
if (*(s16 *)(a0 + 0) == 2) {
fval = *(s16 *)(a0 + 0x18);
D_801C8C60 = 1;
n1 = fval + 1;
s4 = ((n1 & 7) << 2) + 0x140;
s1 = (n1 / 8) * 24;
p = (u8 *)func_80010A08(0x28);
s2 = s1 + 0x160;
*(u16 *)(p + 0xE) = GetClut(0x160, 0x1BA);
*(u16 *)(p + 0x16) = GetTPage(0, 0, s4 & 0x3C0, s2 & -0x100);
p[3] = 9;
*(u32 *)(p + 4) = 0x808080;
p[7] = 0x2C;
__asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
u_hi = (s4 & 0x3F) << 2;
u_lo = u_hi;
u_hi += 0x10;
s1 = s1 + 0x178;
p[0xC] = u_lo;
p[0xD] = s2;
p[0x14] = u_hi;
p[0x15] = s2;
p[0x1C] = u_lo;
p[0x1D] = s1;
p[0x24] = u_hi;
p[0x25] = s1;
X = *(s16 *)(a0 + 0x10);
Y = *(s16 *)(a0 + 0x14);
x_lo = X - 8;
y_lo = Y - 9;
x_hi = X + 8;
y_hi = Y + 0xF;
*(s16 *)(p + 0x8) = x_lo;
*(s16 *)(p + 0xA) = y_lo;
*(s16 *)(p + 0x10) = x_hi;
*(s16 *)(p + 0x12) = y_lo;
*(s16 *)(p + 0x18) = x_lo;
*(s16 *)(p + 0x1A) = y_hi;
*(s16 *)(p + 0x20) = x_hi;
*(s16 *)(p + 0x22) = y_hi;
AddPrim(*(s32 *)((u8 *)&D_800A651C + ((u16)D_800B9A02 * 0x14)) + 4, p);
}
}
.run/P36/agents/ov_SC04_015__func_8017E830/history.txt
+16
View File
@@ -0,0 +1,16 @@
s5: verdict NO-MATCH start 18 best 6 compiles 189 path R7 do-while @4931
s7: verdict NO-MATCH start 18 best 5 compiles 558 path R9 swap-stmts @4934 + R9 swap-stmts @4933
s9: verdict NO-MATCH start 18 best 5 compiles 251 path R9 swap-stmts @4936 + R9 swap-stmts @4935
best-scoring single candidates of the last trace (move -> score [residual class]):
R9 swap-stmts @4935 -> 5 [COUNT] (from 16)
R7 do-while @4933 -> 6 [ORDER] (from 18)
R18 bystander @4920->4922 -> 6 [ORDER] (from 6)
R7 block @4922 -> 6 [ORDER] (from 6)
R8 temp tmp0 @4919 -> 6 [ORDER] (from 6)
R12 width x_lo s32->u16 @4916 -> 6 [ORDER] (from 6)
R10 param-copy a0 @4917 -> 6 [ORDER] (from 6)
R18 bystander @4920->4923 -> 6 [ORDER] (from 6)
R8 base tmp0 @4919 -> 6 [ORDER] (from 6)
R12 width x_lo s32->s16 @4916 -> 6 [ORDER] (from 6)
R18 bystander @4920->4924 -> 6 [ORDER] (from 6)
R8 hoist tmp0 @4923 -> 6 [ORDER] (from 6)
.run/P36/agents/ov_SC04_015__func_8017E830/neighbours.txt
+33
View File
@@ -0,0 +1,33 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: plumbing
// @stuck: none — MATCH
// @class: regalloc-order — simplified sibling of matched func_8017B614.
// @stuck: none. Block-moves are align-1 struct-assigns (u8[8]) -> emit_block_move
// @class: struct
// @stuck: none — MATCH (74 ins)
// @class: regalloc-order + T1 memcpy-builtin→call re-crack
// @stuck: 0 (iso). Register lever = $16 pin + in-place re-tie on the memcpy-branch src (keeps
// @class: plumbing
// @stuck: none — MATCH
// @class: schedule
// @stuck: none — MATCH
// @class: struct
// @stuck: none — MATCH
// @class: struct
// @stuck: none — MATCH (63 ins)
// @class: struct
// @stuck: none — MATCH (62 ins)
// @class: struct
// @stuck: none — MATCH (65 ins)
// @class: regalloc-order
// @stuck: pending self-check — register order param=$s2 counter=$s1 ptr=$s0
// @class: plumbing
// @stuck: none — MATCH (expected); short-typed global increment + signed compare, store-2 on overflow
// @class: plumbing
// @stuck: none — MATCH expected (simple short-increment + guarded call)
// @class: regalloc-order
// @stuck: none — MATCH (branch-polarity invert: fn-ptr non-zero call is the fall-through arm)
// @class: plumbing
// @stuck: none — MATCH (41 ins, relocation-masked); frame needed a 0x30 address-taken local
// @class: regalloc-order
// @stuck: none — MATCH
.run/P36/agents/ov_SC04_015__func_8017E830/related.txt
+163
View File
@@ -0,0 +1,163 @@
=== lever-free bodies in ov_SC04_015 sharing a callee or global with func_8017E830 (32 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_8012E28C (src/shared/ov/func_8012E28C.h:9) shares 3: D_800A651C D_800B9A02 func_80010A08 ---
void func_8012E28C(s32 arg0, s32 arg1) {
void *temp_v0;
s32 temp_v1;
s32 base;
if (arg0 > 0) {
base = *(s32 *)((s8 *)&D_800A651C + ((u16)D_800B9A02 * 0x14)) + (arg0 * 4);
temp_v0 = func_80010A08(0xC);
temp_v1 = GetTPage(0, arg1, 0, 0);
func_8005A600((s32)temp_v0, 0, 0, (u16)temp_v1, 0);
AddPrim(base, temp_v0);
}
}
--- func_8012D3B4 (src/shared/ov/func_8012D3B4.h:12) shares 3: D_800A651C D_800B9A02 func_80010A08 ---
void func_8012D3B4(s32 arg0, s32 arg1, s32 arg2) {
s32 sp10;
s32 sp14;
s32 temp_v0_2;
void *temp_v0;
temp_v0 = func_80010A08(0x10);
(*(s32 *)((s8*)(temp_v0)+(4))) = arg2;
SetLineF2(temp_v0);
func_8004914C(&D_800AF648);
func_800491AC(&D_800AF648);
temp_v0_2 = RotTransPers(arg0, temp_v0 + 8, &sp10, &sp14);
if ((temp_v0_2 > 0) && (sp14 >= 0) && (RotTransPers(arg1, temp_v0 + 0xC, &sp10, &sp14) > 0) && (sp14 >= 0)) {
AddPrim(*(s32 *)((s8 *)&D_800A651C + ((u16)D_800B9A02 * 0x14)) + (temp_v0_2 * 4), temp_v0);
}
}
--- func_8012D4B4 (src/shared/ov/func_8012D4B4.h:13) shares 3: D_800A651C D_800B9A02 func_80010A08 ---
void func_8012D4B4(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 sp10[2];
s32 sp18[2];
s32 sp20;
s32 sp24;
s32 temp_v0_2;
void *temp_v0;
func_8012F214(arg0, arg1, (s32)sp10);
func_8012F214(arg0, arg2, (s32)sp18);
temp_v0 = func_80010A08(0x10);
(*(s32 *)((s8 *)(temp_v0) + (4))) = arg3;
SetLineF2(temp_v0);
func_8004914C(&D_800AF648);
func_800491AC(&D_800AF648);
temp_v0_2 = RotTransPers((s32)sp10, temp_v0 + 8, &sp20, &sp24);
if ((temp_v0_2 > 0) && (sp24 >= 0) &&
(RotTransPers((s32)sp18, temp_v0 + 0xC, &sp20, &sp24) > 0) && (sp24 >= 0)) {
AddPrim(*(s32 *)((s8 *)&D_800A651C + ((u16)D_800B9A02 * 0x14)) + (temp_v0_2 * 4), temp_v0);
}
}
--- func_80136D08 (src/shared/ov/func_80136D08.h:12) shares 3: D_800A651C D_800B9A02 func_80010A08 ---
void func_80136D08(s32 arg0, s32 arg1) {
s32 sp10;
s32 sp14;
s32 temp_v0;
s32 temp_v0_2;
void *buf;
func_8004914C(&D_800AF648);
func_800491AC(&D_800AF648);
buf = func_80010A08(0x14);
SetLineG2(buf);
*((u8 *)buf + 0xE) = 0xFF;
*((u8 *)buf + 0x4) = 0xFF;
*((u8 *)buf + 0xD) = 0x80;
*((u8 *)buf + 0x5) = 0x80;
*((u8 *)buf + 0xC) = 0x80;
*((u8 *)buf + 0x6) = 0x80;
temp_v0 = RotTransPers(arg0, (s32)buf + 8, &sp10, &sp14);
temp_v0_2 = RotTransPers(arg1, (s32)buf + 0x10, &sp10, &sp14);
temp_v0 = ((temp_v0 + temp_v0_2) >> 3) * 4;
AddPrim(*(s32 *)((s8 *)&D_800A651C + ((u16)D_800B9A02 * 0x14)) + temp_v0, buf);
}
--- func_8012CFA8 (src/shared/ov/func_8012CFA8.h:3) shares 3: D_800A651C D_800B9A02 func_80010A08 ---
void func_8012CFA8(s32 arg0)
{
extern s32 AddPrim(s32, void *);
extern s32 RotTransPers(s32, s32 *, s32 *, s32 *);
extern void SetPolyF3(void *);
extern void *func_80010A08(s32);
extern void func_8004914C(void *a0);
extern void func_800491AC(void *a0);
extern s32 D_800A651C;
extern u8 D_800AF648;
extern short D_800B9A02;
s32 sp10;
s32 sp14;
s32 sp18;
s32 temp_a2;
void *temp_v0;
temp_v0 = func_80010A08(0x14);
(*(s32 *)((s8 *)(temp_v0) + (4))) = 0xFF;
SetPolyF3(temp_v0);
func_8004914C(&D_800AF648);
func_800491AC(&D_800AF648);
temp_a2 = (RotTransPers(arg0, &sp10, &sp14, &sp18) >> 2) - 0x20;
if (temp_a2 > 0) {
*(s32 *)((s8 *)temp_v0 + 8) = sp10;
*(s16 *)((s8 *)temp_v0 + 0xC) = *(u16 *)((s8 *)temp_v0 + 8) + 8;
*(s16 *)((s8 *)temp_v0 + 0xE) = *(u16 *)((s8 *)temp_v0 + 0xA);
*(s16 *)((s8 *)temp_v0 + 0x10) = *(u16 *)((s8 *)temp_v0 + 8);
*(s16 *)((s8 *)temp_v0 + 0x12) = *(u16 *)((s8 *)temp_v0 + 0xA) + 8;
AddPrim(*(s32 *)((s8 *)&D_800A651C + ((u16)D_800B9A02 * 0x14)) + (temp_a2 * 4), temp_v0);
}
}
--- func_8017EB78 (src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:5048) shares 3: D_800A651C D_800B9A02 func_80010A08 ---
void func_8017EB78(void *arg0)
{
/* frame: vars = 0x50 - ROUND8(args 0x10) - ROUND8(4*5 regs) = 0x28 (cookbook 164-53/162i1) */
s32 pad[10];
u8 *s;
u8 *p;
s32 X, Y;
s32 u;
s32 tA, tB, u2;
u8 u_lo, y_lo;
s = (u8 *)arg0;
do { X = *(s16 *)(s + 0x10); } while (0);
Y = *(s16 *)(s + 0x12);
p = (u8 *)func_80010A08(0x28);
*(u16 *)(p + 0xE) = GetClut(*(s16 *)(s + 0x18), *(s16 *)(s + 0x1A));
*(u16 *)(p + 0x16) = GetTPage(0, 0, X & -0x40, Y & -0x100);
p[3] = 9;
*(u32 *)(p + 4) = 0x808080;
p[7] = 0x2C;
u = (X & 0x3F) << 2;
u_lo = u;
y_lo = Y;
p[0xC] = u_lo;
p[0xD] = y_lo;
tA = u + s[0x14];
p[0x14] = tA;
p[0x15] = y_lo;
p[0x1C] = u_lo;
tB = Y + s[0x16];
p[0x1D] = tB;
u2 = u;
u2 += s[0x14];
p[0x24] = u2;
Y += s[0x16];
p[0x25] = Y;
*(s16 *)(p + 0x8) = *(u16 *)(s + 0x0);
*(s16 *)(p + 0xA) = *(u16 *)(s + 0x2);
*(s16 *)(p + 0x10) = *(u16 *)(s + 0x4);
*(s16 *)(p + 0x12) = *(u16 *)(s + 0x6);
*(s16 *)(p + 0x18) = *(u16 *)(s + 0x8);
*(s16 *)(p + 0x1A) = *(u16 *)(s + 0xA);
*(s16 *)(p + 0x20) = *(u16 *)(s + 0xC);
*(s16 *)(p + 0x22) = *(u16 *)(s + 0xE);
AddPrim(*(s32 *)((u8 *)&D_800A651C + ((u16)D_800B9A02 * 0x14)) + 4, p);
}
.run/P36/agents/ov_SC04_015__func_8017E830/residual.txt
+26
View File
@@ -0,0 +1,26 @@
src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017E830: score 18 (COUNT; mine 96 ins, target 96) — not yet
register pairs (mine -> target, count): v1->v0 x2, a0->v1 x1
replace mine[40:46] target[40:42]
40 lui a1,0x80 | lui v1,0x80
41 ori a1,a1,0x8080 | ori v1,v1,0x8080
42 andi v1,s4,0x3f | --
43 sll v1,v1,0x2 | --
44 move a0,v1 | --
45 addiu v1,v1,16 | --
insert mine[50:50] target[46:52]
50 -- | sw v1,4(s0)
51 -- | sb v0,7(s0)
52 -- | andi v0,s4,0x3f
53 -- | sll v0,v0,0x2
54 -- | move v1,v0
55 -- | addiu v0,v0,16
replace mine[51:54] target[53:54]
51 sw a1,4(s0) | sb v1,12(s0)
52 sb v0,7(s0) | --
53 sb a0,12(s0) | --
replace mine[55:56] target[55:56]
55 sb v1,20(s0) | sb v0,20(s0)
replace mine[57:58] target[57:58]
57 sb a0,28(s0) | sb v1,28(s0)
replace mine[59:60] target[59:60]
59 sb v1,36(s0) | sb v0,36(s0)
.run/P36/agents/ov_SC04_015__func_8017E830/sites.txt
+1
View File
@@ -0,0 +1 @@
NEEDED barrier line 5032
.run/P36/agents/ov_SC04_015__func_8017E830/tu.txt
+2
View File
@@ -0,0 +1,2 @@
src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
func_8017E830
.run/P36/agents/ov_SC04_015__func_8017EE80/body_free.c
+76
View File
@@ -0,0 +1,76 @@
void func_8017EE80(s32 a0)
{
s32 s4;
s32 s3;
s32 s2;
s32 s1;
s32 s0;
s32 v0;
s32 v1;
u16 buf[10];
s4 = a0;
s3 = (s32)D_80188838[*(s16 *)(s4 + 0x70)];
if (s3 == 0) {
return;
}
s2 = s3 + 6;
for (;;) {
s1 = ((s32 (*)(void))func_8012C194)();
if (s1 != 0) {
v1 = 0;
s0 = (s32)&D_801C8C64;
while (v1 < 0x20) {
if (*(s16 *)s0 == 0) {
break;
}
v1 += 1;
s0 += 0x1C;
}
v0 = 0x20;
if (v1 == v0) {
goto next;
}
*(s32 *)(s0 + 0xC) = s1;
func_8001CC3C(s1, 0, 0, 0);
*(s32 *)(s1 + 0x20) = (s32)D_801886BC;
*(u8 *)(s1 + 0x27) = 0x4C;
*(u16 *)(s1 + 0x2C) = 0xC020;
*(u16 *)(s1 + 0x1A) = 0x2000;
*(u16 *)(s1 + 0x18) = 0x2000;
*(u32 *)(s1 + 4) |= 0x50000000;
func_80128EA8(s1, s0 + 0x14, (s32)D_801886C8);
v0 = 1;
*(u16 *)(s0 + 0x0) = v0;
v0 = *(u16 *)s3;
*(u16 *)(s0 + 0x4) = v0;
v0 = *(u16 *)(s2 - 4);
*(u16 *)(s0 + 0x6) = v0;
v0 = *(u16 *)(s2 - 2);
*(s32 *)(s0 + 0x10) = s4;
*(u16 *)(s0 + 0x8) = v0;
v0 = *(u16 *)s3;
buf[0] = v0;
v0 = *(u16 *)(s2 - 4);
buf[1] = v0;
v1 = *(u16 *)(s2 - 2);
buf[2] = v1;
v0 = 0x3DB;
buf[3] = v0;
buf[5] = 0;
buf[4] = 0;
*(u32 *)&buf[8] = 0;
buf[7] = 0;
v0 = 0x7FFF;
buf[6] = v0;
func_8012C51C(buf, s4);
}
next:
v1 = *(s16 *)s2;
if (v1 == -1) {
break;
}
s2 += 8;
s3 += 8;
}
}
.run/P36/agents/ov_SC04_015__func_8017EE80/body_tree.c
+76
View File
@@ -0,0 +1,76 @@
void func_8017EE80(s32 a0)
{
s32 s4;
s32 s3;
register s32 s2 __asm__("$18"); // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus7)
s32 s1;
s32 s0;
s32 v0;
s32 v1;
u16 buf[10];
s4 = a0;
s3 = (s32)D_80188838[*(s16 *)(s4 + 0x70)];
if (s3 == 0) {
return;
}
s2 = s3 + 6;
for (;;) {
s1 = ((s32 (*)(void))func_8012C194)();
if (s1 != 0) {
v1 = 0;
s0 = (s32)&D_801C8C64;
while (v1 < 0x20) {
if (*(s16 *)s0 == 0) {
break;
}
v1 += 1;
s0 += 0x1C;
}
v0 = 0x20;
if (v1 == v0) {
goto next;
}
*(s32 *)(s0 + 0xC) = s1;
func_8001CC3C(s1, 0, 0, 0);
*(s32 *)(s1 + 0x20) = (s32)D_801886BC;
*(u8 *)(s1 + 0x27) = 0x4C;
*(u16 *)(s1 + 0x2C) = 0xC020;
*(u16 *)(s1 + 0x1A) = 0x2000;
*(u16 *)(s1 + 0x18) = 0x2000;
*(u32 *)(s1 + 4) |= 0x50000000;
func_80128EA8(s1, s0 + 0x14, (s32)D_801886C8);
v0 = 1;
*(u16 *)(s0 + 0x0) = v0;
v0 = *(u16 *)s3;
*(u16 *)(s0 + 0x4) = v0;
v0 = *(u16 *)(s2 - 4);
*(u16 *)(s0 + 0x6) = v0;
v0 = *(u16 *)(s2 - 2);
*(s32 *)(s0 + 0x10) = s4;
*(u16 *)(s0 + 0x8) = v0;
v0 = *(u16 *)s3;
buf[0] = v0;
v0 = *(u16 *)(s2 - 4);
buf[1] = v0;
v1 = *(u16 *)(s2 - 2);
buf[2] = v1;
v0 = 0x3DB;
buf[3] = v0;
buf[5] = 0;
buf[4] = 0;
*(u32 *)&buf[8] = 0;
buf[7] = 0;
v0 = 0x7FFF;
buf[6] = v0;
func_8012C51C(buf, s4);
}
next:
v1 = *(s16 *)s2;
if (v1 == -1) {
break;
}
s2 += 8;
s3 += 8;
}
}
.run/P36/agents/ov_SC04_015__func_8017EE80/history.txt
+16
View File
@@ -0,0 +1,16 @@
s5: verdict NO-MATCH start 23 best 23 compiles 192 path
s7: verdict NO-MATCH start 23 best 23 compiles 560 path
s9: verdict NO-MATCH start 23 best 23 compiles 253 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R6 inline v0 @5272 -> 23 [COUNT] (from 23)
R8 temp tmp0 @5221 -> 23 [COUNT] (from 23)
R7 block @5221 -> 23 [COUNT] (from 23)
R17 const-split @5272->5269 (0x7FFF into the 0 run) -> 23 [COUNT] (from 23)
R10 param-alias s4->a0 @5220 -> 23 [COUNT] (from 23)
R4 decl-move s2 2->0 -> 23 [COUNT] (from 23)
R6 inline v0 @5262 -> 23 [COUNT] (from 23)
R8 base tmp0 @5221 -> 23 [COUNT] (from 23)
R7 do-while @5221 -> 23 [COUNT] (from 23)
R17 const-split @5272->5270 (0x7FFF into the 0 run) -> 23 [COUNT] (from 23)
R10 param-copy a0 @5219 -> 23 [COUNT] (from 23)
R4 decl-move s2 2->1 -> 23 [COUNT] (from 23)
.run/P36/agents/ov_SC04_015__func_8017EE80/neighbours.txt
+33
View File
@@ -0,0 +1,33 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: plumbing
// @stuck: none — MATCH
// @class: regalloc-order — simplified sibling of matched func_8017B614.
// @stuck: none. Block-moves are align-1 struct-assigns (u8[8]) -> emit_block_move
// @class: struct
// @stuck: none — MATCH (74 ins)
// @class: regalloc-order + T1 memcpy-builtin→call re-crack
// @stuck: 0 (iso). Register lever = $16 pin + in-place re-tie on the memcpy-branch src (keeps
// @class: plumbing
// @stuck: none — MATCH
// @class: schedule
// @stuck: none — MATCH
// @class: struct
// @stuck: none — MATCH
// @class: struct
// @stuck: none — MATCH (63 ins)
// @class: struct
// @stuck: none — MATCH (62 ins)
// @class: struct
// @stuck: none — MATCH (65 ins)
// @class: regalloc-order
// @stuck: pending self-check — register order param=$s2 counter=$s1 ptr=$s0
// @class: plumbing
// @stuck: none — MATCH (expected); short-typed global increment + signed compare, store-2 on overflow
// @class: plumbing
// @stuck: none — MATCH expected (simple short-increment + guarded call)
// @class: regalloc-order
// @stuck: none — MATCH (branch-polarity invert: fn-ptr non-zero call is the fall-through arm)
// @class: plumbing
// @stuck: none — MATCH (41 ins, relocation-masked); frame needed a 0x30 address-taken local
// @class: regalloc-order
// @stuck: none — MATCH
.run/P36/agents/ov_SC04_015__func_8017EE80/related.txt
+163
View File
@@ -0,0 +1,163 @@
=== lever-free bodies in ov_SC04_015 sharing a callee or global with func_8017EE80 (21 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80144558 (src/shared/ov/func_80144558.h:10) shares 3: func_8001CC3C func_80128EA8 func_8012C194 ---
void func_80144558(u8 *param_1) {
s32 s0;
s0 = ((s32 (*)(void))func_8012C194)();
if (s0 == 0) {
func_8012CAE4(param_1);
} else {
*(s32 *)(param_1 + 0xCC) = s0;
func_8001CC3C(s0, 0, 0, 0);
*(s32 *)(s0 + 0x20) = (s32)D_800D387C;
*(u8 *)(s0 + 0x27) = 0x9C;
*(u16 *)(s0 + 0x1A) = 0x3000;
*(u16 *)(s0 + 0x18) = 0x3000;
*(u32 *)(s0 + 4) = *(u32 *)(s0 + 4) | 0x50000000;
func_80128EA8(s0, (s32)(param_1 + 0xD0), (s32)D_800D3888);
*(u16 *)(s0 + 8) = *(u16 *)(param_1 + 6);
*(u16 *)(s0 + 0xA) = *(u16 *)(param_1 + 0xA);
*(u16 *)(s0 + 0xC) = *(u16 *)(param_1 + 0xE);
*(u16 *)(param_1 + 2) = 1;
func_8012B200(param_1);
}
}
--- func_801446A4 (src/shared/ov/func_801446A4.h:9) shares 3: func_8001CC3C func_80128EA8 func_8012C194 ---
void func_801446A4(int param_1)
{
int s1;
int iVar1;
int param_12;
param_12 = param_1;
s1 = param_12;
iVar1 = ((int (*)(void))func_8012C194)();
if (iVar1 == 0) {
((void (*)(int))func_8012CAE4)(s1);
} else {
*(int *)(s1 + 0xcc) = iVar1;
((void (*)(int, int, int, int))func_8001CC3C)(iVar1, 0, 0, 0);
*(int *)(iVar1 + 0x20) = (int)&D_800D387C;
*(unsigned char *)(iVar1 + 0x27) = 0x9c;
*(short *)(iVar1 + 0x1a) = 0x3000;
*(short *)(iVar1 + 0x18) = 0x3000;
*(unsigned int *)(iVar1 + 4) = *(unsigned int *)(iVar1 + 4) | 0x50000000;
func_80128EA8(iVar1, s1 + 0xd0, (int)&D_800D3888);
*(short *)(iVar1 + 8) = *(unsigned short *)(s1 + 6);
*(short *)(iVar1 + 0xa) = *(unsigned short *)(s1 + 0xa);
*(short *)(iVar1 + 0xc) = *(unsigned short *)(s1 + 0xe);
*(short *)(s1 + 2) = *(short *)(s1 + 2) + 1;
}
}
--- func_8017F7E4 (src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:5571) shares 3: func_8001CC3C func_80128EA8 func_8012C194 ---
void func_8017F7E4(s32 a0) {
s32 s1;
s32 v0;
s1 = ((s32 (*)(void))func_8012C194)();
if (s1 != 0) {
v0 = ((s32 (*)(void))func_8012C1B8)();
*(s32 *)(a0 + 0x20) = v0;
}
if (s1 == 0 || v0 == 0) {
func_8012CAE4((void *)a0);
return;
}
func_8001C214(v0, 0);
func_8012E8E0(a0, (s32)(D_80188748 + *(s16 *)(a0 + 0x70) * 8));
*(u32 *)(a0 + 0x58) = (u32)&D_80188858 | 0x40000000;
*(u16 *)(a0 + 0x5C) = 0x8000;
*(s32 *)(a0 + 0xCC) = s1;
func_8001CC3C(s1, 0, 0, 0);
*(s32 *)(s1 + 0x20) = (s32)D_80188868;
*(u8 *)(s1 + 0x27) = 0x4C;
*(u16 *)(s1 + 0x2C) = 0xC020;
*(u16 *)(s1 + 0x1A) = 0x3000;
*(u16 *)(s1 + 0x18) = 0x3000;
*(u32 *)(s1 + 4) |= 0x50000000;
func_80128EA8(s1, a0 + 0xD0, (s32)D_80188874);
func_8017EE80(a0);
*(u16 *)(a0 + 0x76) = 100;
*(s32 *)(a0 + 0x1C) = 0;
*(u16 *)(a0 + 0x34) = 0;
*(u16 *)(a0 + 0x2) = *(u16 *)(a0 + 0x2) + 1;
}
--- func_80183DE8 (src/ov_SC04_015/ov_SC04_015_jr_801820DC.c:4342) shares 3: func_8001CC3C func_80128EA8 func_8012C194 ---
void func_80183DE8(u8 *arg0)
{
extern u8 D_800D387C[];
extern u8 D_800D3888[];
u8 *param_1;
s32 raw;
u32 buf[6];
do { param_1 = arg0; } while (0);
{
s32 s0; /* $s1 -- scoped: dead after func_80128EA8 */
s0 = ((s32 (*)(void))func_8012C194)();
if (s0 == 0) {
func_8012CAE4(param_1);
return;
}
*(s32 *)(param_1 + 0xCC) = s0;
func_8001CC3C(s0, 0, 0, 0);
*(s32 *)(s0 + 0x20) = (s32)D_800D387C;
*(u8 *)(s0 + 0x27) = 0x9C;
*(u16 *)(s0 + 0x1A) = 0x3000;
*(u16 *)(s0 + 0x18) = 0x3000;
*(u32 *)(s0 + 4) = *(u32 *)(s0 + 4) | 0x50000000;
func_80128EA8(s0, (s32)(param_1 + 0xD0), (s32)D_800D3888);
}
{
s32 obj = *(s32 *)(param_1 + 0xCC);
*(u16 *)(obj + 8) = *(u16 *)(param_1 + 6);
*(u16 *)(obj + 0xA) = *(u16 *)(param_1 + 0xA);
*(u16 *)(obj + 0xC) = *(u16 *)(param_1 + 0xE);
}
raw = *(s16 *)(param_1 + 0x70);
*(s32 *)(param_1 + 0x1C) = 0x5A;
*(u16 *)(param_1 + 2) = 1;
*(s32 *)(param_1 + 0x10) = 0;
*(s32 *)(param_1 + 0x14) = 0xFFF80000;
*(s32 *)(param_1 + 0x18) = 0;
func_8012B0B4((unsigned int *)buf, (raw & 0xFF00) >> 4, (raw & 0xFF) << 6);
{
s32 full;
s32 low;
full = *(s32 *)buf;
low = *(s16 *)buf;
*(s32 *)(param_1 + 0x48) = 0;
*(s32 *)(param_1 + 0x44) = low;
*(s32 *)(param_1 + 0x4C) = full >> 16;
}
}
--- func_8016DA7C (src/ov_SC04_015/ov_SC04_015_jr_8016AB6C.c:3243) shares 2: func_8001CC3C func_80128EA8 ---
void func_8016DA7C(s32 param_1)
{
s32 iVar1;
iVar1 = ((s32 (*)(void))func_801465C0)();
if (iVar1 == 0) {
((void (*)(s32))func_80146C3C)(param_1);
} else {
*(s32 *)(param_1 + 0x20) = iVar1;
((void (*)(s32, s32, s32, s32))func_8001CC3C)(iVar1, (s32)&D_801877D8, 0x250, 0x100);
*(u8 *)(iVar1 + 0x27) = 0x90;
*(u16 *)(iVar1 + 0x18) = 0x3000;
*(u16 *)(iVar1 + 0x1a) = 0x4000;
*(u32 *)(iVar1 + 4) = *(u32 *)(iVar1 + 4) | 0x50000000;
func_80128EA8(iVar1, param_1 + 0x24, (s32)&D_801877E4);
*(s32 *)(param_1 + 0x10) = 0;
*(s32 *)(param_1 + 0x14) = 0xfff40000;
*(s16 *)(param_1 + 2) = *(s16 *)(param_1 + 2) + 1;
}
}
--- func_8017ED00 (src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:5104) shares 1: D_801C8C64 ---
void func_8017ED00(void) {
func_80016714(&D_801C8C64, 0x380);
}
.run/P36/agents/ov_SC04_015__func_8017EE80/residual.txt
+38
View File
@@ -0,0 +1,38 @@
src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017EE80: score 23 (COUNT; mine 106 ins, target 102) — not yet
register pairs (mine -> target, count): s5->s4 x3, s4->s2 x1
replace mine[0:4] target[0:1]
0 addiu sp,sp,-72 | addiu sp,sp,-64
1 sw s5,60(sp) | --
2 move s5,a0 | --
3 sw ra,64(sp) | --
insert mine[5:5] target[2:4]
5 -- | move s4,a0
6 -- | sw ra,60(sp)
replace mine[9:10] target[8:9]
9 lh v0,112(s5) | lh v0,112(s4)
replace mine[16:19] target[15:17]
16 beqz s3,41d4 <func_8017EE80+0x180> | beqz s3,41c8 <func_8017EE80+0x174>
17 addiu s4,s3,6 | addiu s2,s3,6
18 addiu s2,s3,4 | --
replace mine[66:67] target[64:65]
66 lhu v0,-2(s2) | lhu v0,-4(s2)
replace mine[69:71] target[67:69]
69 lhu v0,0(s2) | lhu v0,-2(s2)
70 sw s5,16(s0) | sw s4,16(s0)
replace mine[75:77] target[73:75]
75 lhu v0,-2(s2) | lhu v0,-4(s2)
76 move a1,s5 | move a1,s4
replace mine[78:79] target[76:77]
78 lhu v1,0(s2) | lhu v1,-2(s2)
replace mine[89:90] target[87:88]
89 lh v1,0(s4) | lh v1,0(s2)
replace mine[91:92] target[89:90]
91 beq v1,v0,41d4 <func_8017EE80+0x180> | beq v1,v0,41c8 <func_8017EE80+0x174>
replace mine[93:95] target[91:92]
93 addiu s4,s4,8 | j 4098 <func_8017EE80+0x44>
94 j 40a0 <func_8017EE80+0x4c> | --
replace mine[96:98] target[93:94]
96 lw ra,64(sp) | lw ra,60(sp)
97 lw s5,60(sp) | --
replace mine[103:104] target[99:100]
103 addiu sp,sp,72 | addiu sp,sp,64
.run/P36/agents/ov_SC04_015__func_8017EE80/sites.txt
+5
View File
@@ -0,0 +1,5 @@
REMOVED pin $20 line 5310
REMOVED pin $19 line 5311
NEEDED pin $18 line 5312
REMOVED pin $17 line 5313
REMOVED pin $16 line 5314
.run/P36/agents/ov_SC04_015__func_8017EE80/tu.txt
+2
View File
@@ -0,0 +1,2 @@
src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
func_8017EE80
.run/P36/agents/ov_SC04_015__func_8017F0EC/body_free.c
+105
View File
@@ -0,0 +1,105 @@
void func_8017F0EC(s32 a0) {
extern void func_8002D4C8(s32 a0, s32 a1);
extern s32 func_80013328(s32 a0, s32 a1);
extern s32 func_80128ED8(s32 param_1, s32 *param_2);
extern s32 VectorNormalSS(void *a0, void *a1);
extern s32 func_800132BC(void *a0, void *a1);
extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5);
extern s32 func_80132EF4(s32 arg0, s32 arg1);
extern u8 D_80126B5C;
extern u16 D_80126B5E;
extern u16 D_80126B62;
extern u16 D_80126B66;
extern u16 D_801C8B64;
extern u16 D_801C8B66;
extern u16 D_801C8B68;
extern s16 D_801C8B70;
extern s32 D_801C8B78;
u16 sp18[3];
u16 sp20[3];
u16 *q;
s32 v0;
s32 p;
s32 t;
s32 d;
switch (*(u16 *)(a0 + 0x34)) {
case 0:
v0 = func_80013328(a0 + 4, (s32)&D_80126B5C);
if (v0 < D_801C8B78) {
D_801C8B78 = v0;
}
q = sp18;
q[0] = *(u16 *)(a0 + 0x6);
q[1] = *(u16 *)(a0 + 0xA);
q[2] = *(u16 *)(a0 + 0xE);
sp20[0] = D_80126B5E;
sp20[1] = D_80126B62;
sp20[2] = D_80126B66;
if (func_800132BC(sp20, q) < 0x401) {
{
s32 _m = (s32)&D_801C8B64;
D_801C8B64 = sp20[0] - q[0];
D_801C8B66 = sp20[1] - q[1];
D_801C8B68 = sp20[2] - q[2];
VectorNormalSS((void *)_m, (void *)_m);
}
func_8012F568(1, 0x4201, 0, 4, (s32)q, (s32)&D_801C8B64);
}
v0 = *(u16 *)(a0 + 0x76) + 1;
*(u16 *)(a0 + 0x76) = v0;
if ((s16)v0 > 0x64) {
*(u16 *)(a0 + 0x76) = 0x64;
}
if (*(u16 *)(a0 + 0x5C) & 1) {
if (*(u16 *)(a0 + 0x5E) == 0x23) {
v0 = *(u16 *)(a0 + 0x76) - 8;
*(u16 *)(a0 + 0x76) = v0;
if ((s16)v0 > 0) {
*(u16 *)(a0 + 0x34) = 1;
*(s32 *)(a0 + 0x1C) = 3;
func_8002D4C8(0x76D, 0);
} else {
t = (u16)D_801C8B70;
*(u16 *)(a0 + 0x34) = 2;
*(u16 *)(a0 + 0x5C) = 0;
*(u16 *)(a0 + 0x76) = 0;
D_801C8B70 = t - 1;
func_8002D4C8(0x76B, 0);
func_80132EF4(a0, 0x4E);
func_8002D4C8(4, 0x76C);
}
}
}
break;
case 1:
v0 = func_80013328(a0 + 4, (s32)&D_80126B5C);
if (v0 < D_801C8B78) {
D_801C8B78 = v0;
}
v0 = *(u16 *)(a0 + 0x76) + 1;
*(u16 *)(a0 + 0x76) = v0;
if ((s16)v0 > 0x64) {
*(u16 *)(a0 + 0x76) = 0x64;
}
v0 = *(s32 *)(a0 + 0x1C) - 1;
*(s32 *)(a0 + 0x1C) = v0;
if (v0 == 0) {
*(u16 *)(a0 + 0x34) = 0;
}
*(u16 *)(a0 + 0x5C) = 0x8000;
break;
case 2:
*(u16 *)(a0 + 0x5C) = 0;
break;
}
d = (*(s16 *)(a0 + 0x76) * 12288) / 100;
p = *(s32 *)(a0 + 0xCC);
*(u16 *)(p + 0x1A) = d;
*(u16 *)(p + 0x18) = d;
p = *(s32 *)(a0 + 0xCC);
*(u16 *)(p + 0x8) = *(u16 *)(a0 + 0x6);
*(u16 *)(p + 0xA) = *(u16 *)(a0 + 0xA);
*(u16 *)(p + 0xC) = *(u16 *)(a0 + 0xE);
func_80128ED8(p, (s32 *)(a0 + 0xD0));
}
.run/P36/agents/ov_SC04_015__func_8017F0EC/body_tree.c
+106
View File
@@ -0,0 +1,106 @@
void func_8017F0EC(s32 a0) {
extern void func_8002D4C8(s32 a0, s32 a1);
extern s32 func_80013328(s32 a0, s32 a1);
extern s32 func_80128ED8(s32 param_1, s32 *param_2);
extern s32 VectorNormalSS(void *a0, void *a1);
extern s32 func_800132BC(void *a0, void *a1);
extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5);
extern s32 func_80132EF4(s32 arg0, s32 arg1);
extern u8 D_80126B5C;
extern u16 D_80126B5E;
extern u16 D_80126B62;
extern u16 D_80126B66;
extern u16 D_801C8B64;
extern u16 D_801C8B66;
extern u16 D_801C8B68;
extern s16 D_801C8B70;
extern s32 D_801C8B78;
u16 sp18[3];
u16 sp20[3];
u16 *q;
s32 v0;
s32 p;
s32 t;
s32 d;
switch (*(u16 *)(a0 + 0x34)) {
case 0:
v0 = func_80013328(a0 + 4, (s32)&D_80126B5C);
if (v0 < D_801C8B78) {
D_801C8B78 = v0;
}
q = sp18;
q[0] = *(u16 *)(a0 + 0x6);
q[1] = *(u16 *)(a0 + 0xA);
q[2] = *(u16 *)(a0 + 0xE);
sp20[0] = D_80126B5E;
sp20[1] = D_80126B62;
sp20[2] = D_80126B66;
if (func_800132BC(sp20, q) < 0x401) {
{
s32 _m = (s32)&D_801C8B64;
__asm__ __volatile__("" : "=r"(_m) : "0"(_m)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
D_801C8B64 = sp20[0] - q[0];
D_801C8B66 = sp20[1] - q[1];
D_801C8B68 = sp20[2] - q[2];
VectorNormalSS((void *)_m, (void *)_m);
}
func_8012F568(1, 0x4201, 0, 4, (s32)q, (s32)&D_801C8B64);
}
v0 = *(u16 *)(a0 + 0x76) + 1;
*(u16 *)(a0 + 0x76) = v0;
if ((s16)v0 > 0x64) {
*(u16 *)(a0 + 0x76) = 0x64;
}
if (*(u16 *)(a0 + 0x5C) & 1) {
if (*(u16 *)(a0 + 0x5E) == 0x23) {
v0 = *(u16 *)(a0 + 0x76) - 8;
*(u16 *)(a0 + 0x76) = v0;
if ((s16)v0 > 0) {
*(u16 *)(a0 + 0x34) = 1;
*(s32 *)(a0 + 0x1C) = 3;
func_8002D4C8(0x76D, 0);
} else {
t = (u16)D_801C8B70;
*(u16 *)(a0 + 0x34) = 2;
*(u16 *)(a0 + 0x5C) = 0;
*(u16 *)(a0 + 0x76) = 0;
D_801C8B70 = t - 1;
func_8002D4C8(0x76B, 0);
func_80132EF4(a0, 0x4E);
func_8002D4C8(4, 0x76C);
}
}
}
break;
case 1:
v0 = func_80013328(a0 + 4, (s32)&D_80126B5C);
if (v0 < D_801C8B78) {
D_801C8B78 = v0;
}
v0 = *(u16 *)(a0 + 0x76) + 1;
*(u16 *)(a0 + 0x76) = v0;
if ((s16)v0 > 0x64) {
*(u16 *)(a0 + 0x76) = 0x64;
}
v0 = *(s32 *)(a0 + 0x1C) - 1;
*(s32 *)(a0 + 0x1C) = v0;
if (v0 == 0) {
*(u16 *)(a0 + 0x34) = 0;
}
*(u16 *)(a0 + 0x5C) = 0x8000;
break;
case 2:
*(u16 *)(a0 + 0x5C) = 0;
break;
}
d = (*(s16 *)(a0 + 0x76) * 12288) / 100;
p = *(s32 *)(a0 + 0xCC);
*(u16 *)(p + 0x1A) = d;
*(u16 *)(p + 0x18) = d;
p = *(s32 *)(a0 + 0xCC);
*(u16 *)(p + 0x8) = *(u16 *)(a0 + 0x6);
*(u16 *)(p + 0xA) = *(u16 *)(a0 + 0xA);
*(u16 *)(p + 0xC) = *(u16 *)(a0 + 0xE);
func_80128ED8(p, (s32 *)(a0 + 0xD0));
}
.run/P36/agents/ov_SC04_015__func_8017F0EC/history.txt
+16
View File
@@ -0,0 +1,16 @@
s5: verdict NO-MATCH start 56 best 56 compiles 184 path
s7: verdict NO-MATCH start 56 best 56 compiles 550 path
s9: verdict NO-MATCH start 56 best 56 compiles 248 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R12 width p s32->u16 @5336 -> 56 [COUNT] (from 56)
R8 hoist tmp0 @5356 -> 56 [COUNT] (from 56)
R7 block @5356 -> 56 [COUNT] (from 56)
R10 param-copy a0 @5339 -> 56 [COUNT] (from 56)
R12 width p s32->s16 @5336 -> 56 [COUNT] (from 56)
R12 width p s32->u8 @5336 -> 56 [COUNT] (from 56)
R8 hoist tmp0 @5357 -> 56 [COUNT] (from 56)
R7 block @5344 -> 56 [COUNT] (from 56)
R12 width t s32->u16 @5337 -> 56 [COUNT] (from 56)
R7 do-while @5344 -> 56 [COUNT] (from 56)
R12 width t s32->s16 @5337 -> 56 [COUNT] (from 56)
R8 hoist tmp0 @5358 -> 56 [COUNT] (from 56)
.run/P36/agents/ov_SC04_015__func_8017F0EC/neighbours.txt
+33
View File
@@ -0,0 +1,33 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: plumbing
// @stuck: none — MATCH
// @class: regalloc-order — simplified sibling of matched func_8017B614.
// @stuck: none. Block-moves are align-1 struct-assigns (u8[8]) -> emit_block_move
// @class: struct
// @stuck: none — MATCH (74 ins)
// @class: regalloc-order + T1 memcpy-builtin→call re-crack
// @stuck: 0 (iso). Register lever = $16 pin + in-place re-tie on the memcpy-branch src (keeps
// @class: plumbing
// @stuck: none — MATCH
// @class: schedule
// @stuck: none — MATCH
// @class: struct
// @stuck: none — MATCH
// @class: struct
// @stuck: none — MATCH (63 ins)
// @class: struct
// @stuck: none — MATCH (62 ins)
// @class: struct
// @stuck: none — MATCH (65 ins)
// @class: regalloc-order
// @stuck: pending self-check — register order param=$s2 counter=$s1 ptr=$s0
// @class: plumbing
// @stuck: none — MATCH (expected); short-typed global increment + signed compare, store-2 on overflow
// @class: plumbing
// @stuck: none — MATCH expected (simple short-increment + guarded call)
// @class: regalloc-order
// @stuck: none — MATCH (branch-polarity invert: fn-ptr non-zero call is the fall-through arm)
// @class: plumbing
// @stuck: none — MATCH (41 ins, relocation-masked); frame needed a 0x30 address-taken local
// @class: regalloc-order
// @stuck: none — MATCH
.run/P36/agents/ov_SC04_015__func_8017F0EC/related.txt
+94
View File
@@ -0,0 +1,94 @@
=== lever-free bodies in ov_SC04_015 sharing a callee or global with func_8017F0EC (70 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_8017F018 (src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:5272) shares 8: D_80126B5E D_80126B62 D_80126B66 D_801C8B64 D_801C8B66 D_801C8B68 func_800132BC func_8012F568 ---
void func_8017F018(s32 a0) {
extern u16 D_80126B5E;
extern u16 D_80126B62;
extern u16 D_80126B66;
extern u16 D_801C8B64;
extern u16 D_801C8B66;
extern u16 D_801C8B68;
extern s32 func_800132BC(void *a0, void *a1);
extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5);
u16 sp18[3];
u16 *ptr;
sp18[0] = D_80126B5E;
sp18[1] = D_80126B62;
sp18[2] = D_80126B66;
if (func_800132BC(sp18, (void *)a0) < 0x401) {
ptr = &D_801C8B64;
ptr[0] = sp18[0] - *(u16 *)((s32)a0 + 0);
D_801C8B66 = sp18[1] - *(u16 *)((s32)a0 + 2);
D_801C8B68 = sp18[2] - *(u16 *)((s32)a0 + 4);
VectorNormalSS(ptr, ptr);
func_8012F568(1, 0x4201, 0, 4, a0, (s32)ptr);
}
}
--- func_8012D664 (src/ov_SC04_015/ov_SC04_015_jr_8012ACE0.c:555) shares 5: D_80126B5E D_80126B62 D_80126B66 func_800132BC func_8012F568 ---
int func_8012D664(int arg0, int arg1, int arg2) {
extern int func_8012F568();
extern int D_80184874;
struct S8012D664_8012D664 s;
int ret;
int t;
s.a = (*(unsigned short*)&D_80126B5E);
s.b = (*(unsigned short*)&D_80126B62) - 0x40;
s.c = (*(unsigned short*)&D_80126B66);
ret = ((int(*)())func_800132BC)(arg0, &s);
t = arg1 + 0x20;
if (ret < t * t) {
func_8012F568(1, 1, 0, arg2, arg0, &D_80184874);
return 1;
}
return 0;
}
--- func_8012BE54 (src/shared/ov/func_8012BE54.h:7) shares 3: D_80126B5E D_80126B62 D_80126B66 ---
void func_8012BE54(s32 a0) {
u16 sp[3];
sp[0] = D_80126B5E;
sp[1] = D_80126B62;
sp[2] = D_80126B66;
func_8012BE98(a0, sp);
}
--- func_80136DFC (src/shared/ov/func_80136DFC.h:9) shares 3: D_80126B5E D_80126B62 D_80126B66 ---
void func_80136DFC(void) {
((void (*)(s32, s32, s32, s32, s32, s32))func_800153CC)(0xA, (*(s16 *)&D_80126B5E), 0x110, 0x3C, 4, 0);
((void (*)(s32, s32, s32, s32, s32, s32))func_800153CC)(0xB, (*(s16 *)&D_80126B62), 0x110, 0x44, 4, 0);
((void (*)(s32, s32, s32, s32, s32, s32))func_800153CC)(0xC, (*(s16 *)&D_80126B66), 0x110, 0x4C, 4, 0);
((void (*)(s32, s32, s32, s32, s32, s32))func_800153CC)(0xD, *(s16 *)((s32)D_80126B78 + 0x12), 0x110, 0x54, 4, 0);
((void (*)(s32, s32, s32, s32, s32, s32))func_800153CC)(0xE, D_80126CC4, 0x110, 0x5C, 4, 0);
}
--- func_8012A048 (src/shared/ov/func_8012A048.h:9) shares 3: D_80126B5E D_80126B62 D_80126B66 ---
void func_8012A048(void *a0, s32 a1, u8 a2) {
*(s32 *)((s32)a0 + 0x0) = a1;
*(u8 *)((s32)a0 + 0x4) = a2;
*(s32 *)((s32)a0 + 0x9C) = 0;
*(s16 *)((s32)a0 + 0xA0) = 0;
*(s16 *)((s32)a0 + 0xA2) = 0;
D_80126940 = D_80126B5E;
D_80126942 = D_80126B62;
D_80126944 = D_80126B66;
}
--- func_8018207C (src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:7693) shares 3: D_80126B5E D_80126B62 D_80126B66 ---
s32 func_8018207C(void *a0) {
extern u16 D_80126B5E;
extern u16 D_80126B62;
extern u16 D_80126B66;
s16 out[3];
s16 in[3];
in[0] = D_80126B5E;
in[1] = D_80126B62;
in[2] = D_80126B66;
func_8012F2E8((s32)a0, (s32)in, (s32)out);
return func_8012CB64((s32)out, -0x80, 0x80, -0x60, 0);
}
.run/P36/agents/ov_SC04_015__func_8017F0EC/residual.txt
+94
View File
@@ -0,0 +1,94 @@
src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017F0EC: score 56 (COUNT; mine 200 ins, target 199) — not yet
register pairs (mine -> target, count): s1->s0 x33, s2->s1 x3, s0->a0 x1, s0->v0 x1
insert mine[1:1] target[1:4]
1 -- | sw s0,40(sp)
2 -- | move s0,a0
3 -- | sw ra,48(sp)
replace mine[2:7] target[5:6]
2 move s1,a0 | lhu v1,52(s0)
3 sw ra,52(sp) | --
4 sw s2,48(sp) | --
5 sw s0,40(sp) | --
6 lhu v1,52(s1) | --
replace mine[8:9] target[7:8]
8 beq v1,v0,44e0 <func_8017F0EC+0x220> | beq v1,v0,44e0 <func_8017F0EC+0x220>
replace mine[17:18] target[16:17]
17 beq v1,v0,455c <func_8017F0EC+0x29c> | beq v1,v0,455c <func_8017F0EC+0x29c>
replace mine[24:25] target[23:24]
24 addiu a0,s1,4 | addiu a0,s0,4
replace mine[33:34] target[32:33]
33 lhu v0,6(s1) | lhu v0,6(s0)
replace mine[40:42] target[39:41]
40 lhu v0,10(s1) | lhu v0,10(s0)
41 addiu s2,sp,24 | addiu s1,sp,24
replace mine[43:44] target[42:43]
43 lhu a3,14(s1) | lhu a3,14(s0)
replace mine[46:47] target[45:46]
46 move a1,s2 | move a1,s1
replace mine[53:54] target[52:53]
53 beqz v0,4408 <func_8017F0EC+0x148> | beqz v0,4408 <func_8017F0EC+0x148>
replace mine[55:58] target[54:56]
55 lui s0,0x0 | lui a0,0x0
56 addiu s0,s0,0 | addiu a0,a0,0
57 move a0,s0 | --
replace mine[74:75] target[72:73]
74 move a1,s0 | move a1,a0
insert mine[77:77] target[75:77]
77 -- | lui v0,0x0
78 -- | addiu v0,v0,0
replace mine[79:80] target[79:80]
79 sw s2,16(sp) | sw s1,16(sp)
replace mine[81:83] target[81:83]
81 sw s0,20(sp) | sw v0,20(sp)
82 lhu v0,118(s1) | lhu v0,118(s0)
replace mine[85:86] target[85:86]
85 sh v0,118(s1) | sh v0,118(s0)
replace mine[91:93] target[91:93]
91 sh v0,118(s1) | sh v0,118(s0)
92 lhu v0,92(s1) | lhu v0,92(s0)
replace mine[97:98] target[97:98]
97 lhu v1,94(s1) | lhu v1,94(s0)
replace mine[101:102] target[101:102]
101 lhu v0,118(s1) | lhu v0,118(s0)
replace mine[104:105] target[104:105]
104 sh v0,118(s1) | sh v0,118(s0)
replace mine[110:111] target[110:111]
110 sh v0,52(s1) | sh v0,52(s0)
replace mine[113:114] target[113:114]
113 sw v0,28(s1) | sw v0,28(s0)
replace mine[120:123] target[120:123]
120 sh v0,52(s1) | sh v0,52(s0)
121 sh zero,92(s1) | sh zero,92(s0)
122 sh zero,118(s1) | sh zero,118(s0)
replace mine[128:129] target[128:129]
128 move a0,s1 | move a0,s0
replace mine[139:140] target[139:140]
139 addiu a0,s1,4 | addiu a0,s0,4
replace mine[148:149] target[148:149]
148 lhu v0,118(s1) | lhu v0,118(s0)
replace mine[151:152] target[151:152]
151 sh v0,118(s1) | sh v0,118(s0)
replace mine[157:159] target[157:159]
157 sh v0,118(s1) | sh v0,118(s0)
158 lw v0,28(s1) | lw v0,28(s0)
replace mine[162:164] target[162:164]
162 sw v0,28(s1) | sw v0,28(s0)
163 sh zero,52(s1) | sh zero,52(s0)
replace mine[166:168] target[166:168]
166 sh v0,92(s1) | sh v0,92(s0)
167 sh zero,92(s1) | sh zero,92(s0)
replace mine[169:170] target[169:170]
169 lh v1,118(s1) | lh v1,118(s0)
replace mine[176:177] target[176:177]
176 lw a0,204(s1) | lw a0,204(s0)
replace mine[182:184] target[182:184]
182 lw a0,204(s1) | lw a0,204(s0)
183 lhu v0,6(s1) | lhu v0,6(s0)
replace mine[186:187] target[186:187]
186 lhu v0,10(s1) | lhu v0,10(s0)
replace mine[189:191] target[189:191]
189 lhu v0,14(s1) | lhu v0,14(s0)
190 addiu a1,s1,208 | addiu a1,s0,208
replace mine[193:195] target[193:194]
193 lw ra,52(sp) | lw ra,48(sp)
194 lw s2,48(sp) | --
.run/P36/agents/ov_SC04_015__func_8017F0EC/sites.txt
+1
View File
@@ -0,0 +1 @@
NEEDED launder line 5455
.run/P36/agents/ov_SC04_015__func_8017F0EC/tu.txt
+2
View File
@@ -0,0 +1,2 @@
src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
func_8017F0EC
.run/P36/agents/resident__func_800D128C/body_free.c
+202
View File
@@ -0,0 +1,202 @@
s32 func_800D128C(s32 arg0, s32 arg1) {
s32 ret = 3;
s32 flag = 1;
s32 id = 0;
s32 obj = (s32)&D_80126B58;
s32 val;
s32 sel;
switch ((u8)arg0) {
case 9:
func_8014BD24(obj, 5);
val = 0;
ret = 1;
break;
case 106:
func_8014BB24(obj, 0x12C, 1);
val = 0x12C;
break;
case 1:
func_8014BB24(obj, 0x96, 1);
val = 0x96;
break;
case 2:
func_8014BCC0(obj, 5);
ret = 4;
/* fallthrough */
case 13:
lab1334:
val = 0x19;
break;
case 3:
func_8014BCC0(obj, 0x19);
ret = 5;
goto lab1334; /* §162: the backward j is a source goto */
case 17:
func_8014BCC0(obj, 5);
ret = 4;
val = 0xA;
break;
case 18:
func_8014BCC0(obj, 0xA);
ret = 5;
val = 0xA;
break;
case 12:
func_8014BCC0(obj, 5);
ret = 5;
val = 2;
break;
case 11:
func_8014BB24(obj, 0x1E, 1);
val = 0xA;
break;
case 8:
func_8014B944(obj, 0x500000, 1);
val = 5;
ret = 2;
break;
case 109:
func_8014B944(obj, 0x900000, 1);
val = 5;
ret = 2;
break;
case 4:
ret = 7;
/* fallthrough */
case 15:
val = 0x50;
break;
case 5:
ret = 7;
/* fallthrough */
case 16:
val = 0x96;
break;
case 107:
if ((s16)arg1 >= 0x13) {
val = 0x14;
} else {
val = (s16)arg1 + 2;
}
val = val * 25;
func_8014BD24(obj, val);
ret = 7;
break;
case 6:
func_8014BD24(obj, 5);
ret = 7;
val = 0xFA;
break;
case 7:
func_8014BD24(obj, 5);
ret = 7;
val = 0x3E7;
break;
case 83:
func_8014BB24(obj, 0xA, 1);
val = 0xA;
break;
case 84:
func_8014BCC0(obj, 5);
ret = 5;
val = 5;
break;
case 85:
func_8014BB24(obj, 0x32, 1);
val = 0x32;
break;
case 112:
func_8014BC0C(obj, 0x19);
ret = 7;
val = 0x3E7;
break;
case 76:
case 113:
ret = 7;
val = 5;
break;
case 114:
func_8014BB24(obj, 0x64, 1);
/* fallthrough */
case 14:
val = 0x32;
break;
case 115:
func_8014BB24(obj, 0x96, 1);
/* fallthrough */
case 105:
val = 0x64;
break;
case 116:
func_8014BB24(obj, 0x96, 1);
val = 0xC8;
break;
case 117:
func_8014BB24(obj, 0xC8, 1);
val = 0x96;
break;
case 118:
func_8014BB24(obj, 0xFA, 1);
/* fallthrough */
case 104:
val = 0x12C;
break;
case 119:
func_8014BB24(obj, 0x1F4, 1);
val = 0x1F4;
break;
case 87:
val = 0xA;
ret = 1;
break;
default:
ret = 0;
break;
}
sel = ret;
switch (sel) {
case 0:
id = 0x45F;
flag = 0;
break;
case 1:
id = 0x464;
func_8014B2A8();
func_8014BB24(obj, val, 1);
break;
case 2:
func_8014BD24(obj, val);
id = 0x464;
break;
case 3:
func_8014BD24(obj, val);
id = 0x45C;
break;
case 4:
func_8014BD24(obj, val);
id = 0x463;
break;
case 5:
func_8014BD24(obj, val);
id = 0x465;
break;
case 7:
func_8014BB24(obj, val, 1);
id = 0x45C;
break;
case 8:
func_8014BCC0(obj, val);
id = 0x45C;
break;
default:
flag = 0;
break;
}
if ((u16)id != 0) {
func_8002D4C8((u16)id, 0);
}
return flag;
}
.run/P36/agents/resident__func_800D128C/body_tree.c
+205
View File
@@ -0,0 +1,205 @@
s32 func_800D128C(s32 arg0, s32 arg1) {
s32 ret = 3;
s32 flag = 1;
s32 id = 0;
s32 obj = (s32)&D_80126B58;
s32 val;
s32 sel;
switch ((u8)arg0) {
case 9:
func_8014BD24(obj, 5);
val = 0;
ret = 1;
break;
case 106:
func_8014BB24(obj, 0x12C, 1);
val = 0x12C;
break;
case 1:
func_8014BB24(obj, 0x96, 1);
__asm__ __volatile__(""); /* §5a cross-jump barrier — load-bearing */ // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus10)
val = 0x96;
break;
case 2:
func_8014BCC0(obj, 5);
ret = 4;
/* fallthrough */
case 13:
lab1334:
val = 0x19;
break;
case 3:
func_8014BCC0(obj, 0x19);
ret = 5;
goto lab1334; /* §162: the backward j is a source goto */
case 17:
func_8014BCC0(obj, 5);
ret = 4;
val = 0xA;
break;
case 18:
func_8014BCC0(obj, 0xA);
ret = 5;
val = 0xA;
break;
case 12:
func_8014BCC0(obj, 5);
ret = 5;
val = 2;
break;
case 11:
func_8014BB24(obj, 0x1E, 1);
val = 0xA;
break;
case 8:
func_8014B944(obj, 0x500000, 1);
val = 5;
ret = 2;
break;
case 109:
func_8014B944(obj, 0x900000, 1);
val = 5;
ret = 2;
break;
case 4:
ret = 7;
/* fallthrough */
case 15:
val = 0x50;
break;
case 5:
ret = 7;
/* fallthrough */
case 16:
__asm__ __volatile__("" ::: "memory"); /* §5a barrier — MUST differ from case 1's */ // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus10)
val = 0x96;
break;
case 107:
if ((s16)arg1 >= 0x13) {
val = 0x14;
} else {
val = (s16)arg1 + 2;
}
val = val * 25;
func_8014BD24(obj, val);
ret = 7;
break;
case 6:
func_8014BD24(obj, 5);
ret = 7;
val = 0xFA;
break;
case 7:
func_8014BD24(obj, 5);
ret = 7;
val = 0x3E7;
break;
case 83:
func_8014BB24(obj, 0xA, 1);
val = 0xA;
break;
case 84:
func_8014BCC0(obj, 5);
ret = 5;
val = 5;
break;
case 85:
func_8014BB24(obj, 0x32, 1);
val = 0x32;
break;
case 112:
func_8014BC0C(obj, 0x19);
ret = 7;
val = 0x3E7;
break;
case 76:
case 113:
ret = 7;
val = 5;
break;
case 114:
func_8014BB24(obj, 0x64, 1);
/* fallthrough */
case 14:
val = 0x32;
break;
case 115:
func_8014BB24(obj, 0x96, 1);
/* fallthrough */
case 105:
val = 0x64;
break;
case 116:
func_8014BB24(obj, 0x96, 1);
val = 0xC8;
break;
case 117:
func_8014BB24(obj, 0xC8, 1);
val = 0x96;
break;
case 118:
func_8014BB24(obj, 0xFA, 1);
/* fallthrough */
case 104:
val = 0x12C;
break;
case 119:
func_8014BB24(obj, 0x1F4, 1);
val = 0x1F4;
break;
case 87:
val = 0xA;
ret = 1;
break;
default:
ret = 0;
break;
}
sel = ret;
__asm__ __volatile__("" : "=r"(sel) : "0"(sel)); /* keeps `addu $v1,$s1,$zero` alive */ // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus10)
switch (sel) {
case 0:
id = 0x45F;
flag = 0;
break;
case 1:
id = 0x464;
func_8014B2A8();
func_8014BB24(obj, val, 1);
break;
case 2:
func_8014BD24(obj, val);
id = 0x464;
break;
case 3:
func_8014BD24(obj, val);
id = 0x45C;
break;
case 4:
func_8014BD24(obj, val);
id = 0x463;
break;
case 5:
func_8014BD24(obj, val);
id = 0x465;
break;
case 7:
func_8014BB24(obj, val, 1);
id = 0x45C;
break;
case 8:
func_8014BCC0(obj, val);
id = 0x45C;
break;
default:
flag = 0;
break;
}
if ((u16)id != 0) {
func_8002D4C8((u16)id, 0);
}
return flag;
}
.run/P36/agents/resident__func_800D128C/history.txt
+14
View File
@@ -0,0 +1,14 @@
s6: verdict NO-MATCH start 46 best 15 compiles 191 path R9 swap-stmts @297 + R12 width sel s32->u16 @248
best-scoring single candidates of the last trace (move -> score [residual class]):
R12 width sel s32->u16 @248 -> 15 [COUNT] (from 26)
R12 width sel s32->s16 @248 -> 15 [COUNT] (from 26)
R12 width sel s32->u8 @248 -> 15 [COUNT] (from 26)
R12 width sel s32->u16 @248 -> 15 [COUNT] (from 26)
R12 width sel s32->s16 @248 -> 15 [COUNT] (from 26)
R12 width sel s32->u8 @248 -> 15 [COUNT] (from 26)
R12 width sel s32->u16 @248 -> 19 [COUNT] (from 30)
R12 width sel s32->s16 @248 -> 19 [COUNT] (from 30)
R12 width sel s32->u8 @248 -> 19 [COUNT] (from 30)
R9 swap-stmts @402 -> 21 [COUNT] (from 26)
R9 swap-stmts @402 -> 21 [COUNT] (from 26)
R9 swap-stmts @419 -> 22 [COUNT] (from 26)
.run/P36/agents/resident__func_800D128C/neighbours.txt
+1
View File
@@ -0,0 +1 @@
.run/P36/agents/resident__func_800D128C/related.txt
+50
View File
@@ -0,0 +1,50 @@
=== lever-free bodies in resident sharing a callee or global with func_800D128C (11 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_800D0C48 (src/resident/resident_jr_800D00E4.c:737) shares 1: func_8002D4C8 ---
void func_800D0C48(u16 arg0) {
func_8002D4C8(1, arg0);
resLoad_lastId = 0;
}
--- func_800D0C74 (src/resident/resident_jr_800D00E4.c:753) shares 1: func_8002D4C8 ---
void func_800D0C74(u16 arg0) {
func_8002D4C8(1, arg0);
func_8001B34C();
}
--- func_800D2624 (src/resident/resident_jr_800D128C.c:1486) shares 1: func_8002D4C8 ---
void func_800D2624(void) {
D_800B9A13 = 0;
func_8002D4C8(0x15, 0);
}
--- func_800D0CA0 (src/resident/resident_jr_800D00E4.c:771) shares 1: func_8002D4C8 ---
void func_800D0CA0(u16 arg0) {
func_8002D4C8(1, arg0);
resLoad_lastId = 0;
D_801151F8 = 3;
D_80127500 = 3;
}
--- func_800CF864 (src/resident/resident.c:573) shares 1: D_80126B58 ---
s32 func_800CF864(void) {
if (currentLocationId == 0x3069) {
return 1;
}
if (D_80126B58 == 0x1A) {
return 1;
}
return func_800CF8B4();
}
--- func_800D1B10 (src/resident/resident_jr_800D128C.c:796) shares 1: func_8002D4C8 ---
s32 func_800D1B10(u8 *arg0) {
func_80029124(0x119, 0);
func_8002D4C8(4, 0x448);
func_8002D4C8(4, 0x449);
func_8002D4C8(4, 0x8ED);
D_800B9A10 = 0;
arg0[0x15] = 0;
arg0[0x14] = arg0[0x14] + 1;
return 0;
}
.run/P36/agents/resident__func_800D128C/residual.txt
+89
View File
@@ -0,0 +1,89 @@
src/resident/resident_jr_800D128C.c:func_800D128C: score 46 (COUNT; mine 238 ins, target 243) — not yet
register pairs (mine -> target, count): s1->v1 x1
replace mine[14:15] target[14:15]
14 beqz v0,2ac <func_800D128C+0x2ac> | beqz v0,2bc <func_800D128C+0x2bc>
replace mine[27:28] target[27:28]
27 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[30:31] target[30:31]
30 j 278 <func_800D128C+0x278> | j 288 <func_800D128C+0x288>
delete mine[33:34] target[33:33]
33 j 260 <func_800D128C+0x260> | --
insert mine[35:35] target[34:38]
35 -- | jal 0 <func_800D128C>
36 -- | li a2,1
37 -- | j 2c0 <func_800D128C+0x2c0>
38 -- | li s0,150
replace mine[39:40] target[42:43]
39 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[44:45] target[47:48]
44 j 9c <func_800D128C+0x9c> | j a8 <func_800D128C+0xa8>
replace mine[50:51] target[53:54]
50 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[56:57] target[59:60]
56 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[62:63] target[65:66]
62 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[65:66] target[68:69]
65 j 1b8 <func_800D128C+0x1b8> | j 1c8 <func_800D128C+0x1c8>
replace mine[68:69] target[71:72]
68 j 120 <func_800D128C+0x120> | j 12c <func_800D128C+0x12c>
replace mine[75:76] target[78:79]
75 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[78:79] target[81:82]
78 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
delete mine[80:81] target[83:83]
80 j 268 <func_800D128C+0x268> | --
insert mine[82:82] target[84:86]
82 -- | j 2c0 <func_800D128C+0x2c0>
83 -- | li s0,150
replace mine[95:96] target[99:100]
95 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[101:102] target[105:106]
101 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[106:107] target[110:111]
106 j 1fc <func_800D128C+0x1fc> | j 20c <func_800D128C+0x20c>
replace mine[112:113] target[116:117]
112 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[118:119] target[122:123]
118 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[121:122] target[125:126]
121 j 218 <func_800D128C+0x218> | j 228 <func_800D128C+0x228>
replace mine[127:128] target[131:132]
127 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[130:131] target[134:135]
130 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[136:137] target[140:141]
136 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[142:143] target[146:147]
142 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[148:149] target[152:153]
148 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[154:155] target[158:159]
154 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[160:161] target[164:165]
160 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[166:167] target[170:171]
166 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[169:170] target[173:174]
169 j 2b0 <func_800D128C+0x2b0> | j 2c0 <func_800D128C+0x2c0>
replace mine[172:173] target[176:178]
172 sltiu v0,s1,9 | move v1,s1
173 -- | sltiu v0,v1,9
replace mine[174:175] target[179:180]
174 sll v0,s1,0x2 | sll v0,v1,0x2
replace mine[181:182] target[186:187]
181 j 378 <func_800D128C+0x378> | j 38c <func_800D128C+0x38c>
replace mine[189:190] target[194:195]
189 j 380 <func_800D128C+0x380> | j 394 <func_800D128C+0x394>
replace mine[194:195] target[199:200]
194 j 37c <func_800D128C+0x37c> | j 390 <func_800D128C+0x390>
replace mine[199:200] target[204:205]
199 j 37c <func_800D128C+0x37c> | j 390 <func_800D128C+0x390>
replace mine[204:205] target[209:210]
204 j 37c <func_800D128C+0x37c> | j 390 <func_800D128C+0x390>
replace mine[209:210] target[214:215]
209 j 37c <func_800D128C+0x37c> | j 390 <func_800D128C+0x390>
replace mine[215:216] target[220:221]
215 j 37c <func_800D128C+0x37c> | j 390 <func_800D128C+0x390>
replace mine[220:221] target[225:226]
220 j 37c <func_800D128C+0x37c> | j 390 <func_800D128C+0x390>
.run/P36/agents/resident__func_800D128C/sites.txt
+3
View File
@@ -0,0 +1,3 @@
NEEDED barrier line 262
NEEDED barrier memory line 316
NEEDED launder line 402
.run/P36/agents/resident__func_800D128C/tu.txt
+2
View File
@@ -0,0 +1,2 @@
src/resident/resident_jr_800D128C.c
func_800D128C
.run/P36/agents/resident__func_800D1658/body_free.c
+39
View File
@@ -0,0 +1,39 @@
s16 func_800D1658(s32 arg0) {
extern int func_800291B4(int);
extern void func_800291A0(int, int);
extern void func_8002D4C8(int, int);
extern s16 D_8010EDEC;
int v;
int t;
int id;
short ret;
int slot;
slot = (arg0 & 0xFF) + 0x2F;
id = func_800291B4(slot) & 0xFF;
if (id == 0) {
return 0;
}
v = *(s16 *)((u8 *)&D_8010EDEC + id * 0xC);
if (v > 0) {
goto ok;
}
ret = v;
t = ret & 0xFFFF;
if (t != 0x8000) {
goto bad;
}
if (id == 0x27) {
goto bad;
}
ok:
func_800291A0(slot, 0);
func_8002D4C8(0x462, 0);
ret = 1;
goto out;
bad:
ret = 0;
func_8002D4C8(0x45F, 0);
out:
return ret;
}
.run/P36/agents/resident__func_800D1658/body_tree.c
+39
View File
@@ -0,0 +1,39 @@
s16 func_800D1658(s32 arg0) {
extern int func_800291B4(int);
extern void func_800291A0(int, int);
extern void func_8002D4C8(int, int);
extern s16 D_8010EDEC;
register int v __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus10)
register int t __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus10)
int id;
register short ret __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus10)
int slot;
slot = (arg0 & 0xFF) + 0x2F;
id = func_800291B4(slot) & 0xFF;
if (id == 0) {
return 0;
}
v = *(s16 *)((u8 *)&D_8010EDEC + id * 0xC);
if (v > 0) {
goto ok;
}
ret = v;
t = ret & 0xFFFF;
if (t != 0x8000) {
goto bad;
}
if (id == 0x27) {
goto bad;
}
ok:
func_800291A0(slot, 0);
func_8002D4C8(0x462, 0);
ret = 1;
goto out;
bad:
ret = 0;
func_8002D4C8(0x45F, 0);
out:
return ret;
}
.run/P36/agents/resident__func_800D1658/history.txt
+14
View File
@@ -0,0 +1,14 @@
s6: verdict NO-MATCH start 24 best 4 compiles 186 path R9 swap-stmts @469
best-scoring single candidates of the last trace (move -> score [residual class]):
R9 swap-stmts @469 -> 4 [COUNT] (from 24)
R12 width slot int->u16 @458 -> 4 [COUNT] (from 4)
R14 param-width arg0 s32->s16 @449 -> 4 [COUNT] (from 4)
R8 temp tmp0 @465 -> 4 [COUNT] (from 4)
R7 block @465 -> 4 [COUNT] (from 4)
R10 param-copy arg0 @459 -> 4 [COUNT] (from 4)
R2 decl-order 0,2,1 -> 4 [COUNT] (from 4)
R4 decl-move v 1->0 -> 4 [COUNT] (from 4)
R12 width slot int->s16 @458 -> 4 [COUNT] (from 4)
R14 param-width arg0 s32->u16 @449 -> 4 [COUNT] (from 4)
R8 base tmp0 @465 -> 4 [COUNT] (from 4)
R7 do-while @465 -> 4 [COUNT] (from 4)

Some files were not shown because too many files have changed in this diff Show More