phase-36: S104 — R22 218/218 after d21–d27; census 4,661 / 0 unmarked (exit 0); d29 parked for the structs phase (a void→s32 signature); METHOD step 15 | 🛑 T7 RUNNING

This commit is contained in:
Drew T
2026-09-10 23:25:28 -06:00
parent 1d42fff3c2
commit 39d814fed2
36 changed files with 2617 additions and 79 deletions
+15
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@@ -164,3 +164,18 @@
(`record_giv` `loop.c:4341`, `combine_givs` `:5494`). A `$0` pin on `y = x + zr` → declare `y` at the proven width.
- Enumerating cheap spellings (d14: 365 bodies in ~3 min through `--try`) beats reasoning when the residual is a
register permutation; `alloc_table.py` explains afterwards.
15. **S104's fourth wave (d21–d29), all at 0 with ZERO levers:**
- (d27) a pinned RESULT local `r = 0; if (A) r = (B); return r;` → **return constants** `if (A && B) return 1; return 0;`:
jump1's store-flag works on the hard `$v0` (`jump.c:1140-1210`), which pins the order after the call-result copy.
- (d26) `v = *p; v -= 1; *p = v; if (v == 0)` → `if (--*p == 0)` (fewer refs for `qty_compare`, `local-alloc.c:1579`) and an
independent sibling store moved BEFORE it (`sched.c:2425-2428` tie-break).
- (d21) per-case call-result temps of one type → ONE function-scope variable (many refs over a short live length outrank
the self pointer, `global.c:594-607`); a block with exactly 3 quantities is allocated in BIRTH order — add or remove a
quantity (`local-alloc.c:1486-1500`).
- (d22) a variable set in two switch cases → one variable per case (flow marks the shared one global, `flow.c:2058-2061`).
- (d23) arms ending in the same store: the store BEFORE the counter (cross-jump keeps them apart); a list walk that reuses a
long-lived variable as its `next` → a loop-local `next`.
- (d24) `T x = argN;` at the top → delete, use `argN`. (d25) a FRAME-only residual (frame 8 bytes larger) → a local set twice
(`p = &D; p += x;`) written as one expression (`combine.c:2305-2337`, `reload1.c:2327-2352`).
- (d29) a `void` function whose last statement is a keepalive of `v0` RETURNS it — `s32` + `return X;` + the TU's `extern`
prototype changed: a SIGNATURE change, parked for the STRUCTS phase (Drew S104 (d)); report it, do not expect it banked.
+4 -1
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@@ -1,2 +1,5 @@
rank fn alias copies best needed kinds regs tu
1 func_80188DF4 ov_SC03_091 3 6 1 keepalive src/ov_SC03_091/ov_SC03_091_jr_8018326C.c
116 func_80181744 ov_SC04_004 3 8 3 launder,pin $2,$3 src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c
124 func_80182FB4 ov_SC05_001 3 13 3 launder,pin $3 src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c
32 func_8017DD70 ov_SC01_008 3 14 3 launder,pin $19 src/ov_SC01_008/ov_SC01_008_jr_8017BE9C.c
4 func_80183884 ov_SC06_010 4 45 1 pin $16 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c
1 rank fn alias copies best needed kinds regs tu
2 1 116 func_80188DF4 func_80181744 ov_SC03_091 ov_SC04_004 3 6 8 1 3 keepalive launder,pin $2,$3 src/ov_SC03_091/ov_SC03_091_jr_8018326C.c src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c
3 124 func_80182FB4 ov_SC05_001 3 13 3 launder,pin $3 src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c
4 32 func_8017DD70 ov_SC01_008 3 14 3 launder,pin $19 src/ov_SC01_008/ov_SC01_008_jr_8017BE9C.c
5 4 func_80183884 ov_SC06_010 4 45 1 pin $16 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c
@@ -0,0 +1,135 @@
s32 func_8017DD70(void) {
extern u32 D_801A3458;
extern u16 D_8011511A;
extern u16 D_80115120;
extern u16 D_80115122;
extern u8 D_80115138[];
extern u8 D_80115140[];
extern u8 D_80115142;
s32 flags;
s32 val;
u16 *p11a;
s32 c;
s16 ret;
s32 changed;
u8 *pb;
u8 *pe;
s32 d;
s32 nz;
s32 c3;
s32 off;
changed = 0;
flags = func_80014ED4(0);
if ((flags & 0xFFFF) != 0) {
D_801A3458 = 0;
}
val = func_80015018(0);
p11a = &D_8011511A;
ret = func_8014168C(*(s16 *)p11a);
c = D_80115138[*p11a];
if ((flags & 0x40) != 0) {
ret = func_8017EC68(c, ret);
nz = ret != 0;
return ret & -nz;
}
if ((flags & 0x10) != 0) {
c3 = c;
if (c3 < 6) {
if (c3 != 1) {
return -1;
}
} else {
func_8002D4C8(0x473, 0);
*p11a = *p11a - 1;
}
return 0;
}
off = (s32)(*p11a) * 2;
{
u8 *base1 = (u8 *)p11a + 0x2E;
pb = base1 + off;
}
{
u8 *base2 = (u8 *)p11a + 0x3E;
pe = base2 + off;
}
if ((val & 0xFFFF) != 0) {
if ((val & 0xFFFF) == D_80115120) {
D_80115122 = D_80115122 - 1;
if (D_80115122 == 0) {
flags = val & 0xF000;
D_80115122 = 3;
}
} else {
D_80115120 = val;
D_80115122 = 8;
}
} else {
D_80115120 = 0;
D_80115122 = 0xC;
}
if ((flags & 0x1000) != 0) {
u8 b2 = *pb;
*pb = b2 - 1;
changed = 1;
if ((u8)(b2 - 1) > 0x7F) {
if (c < 6) {
*pb = *pe - 1;
} else {
*pb = 0;
changed = 0;
}
}
}
if ((flags & 0x4000) != 0) {
u8 b2 = *pb;
u8 b4 = b2 + 1;
*pb = b4;
changed = 1;
if (*pe <= b4) {
if (c < 6) {
*pb = 0;
} else {
*pb = b2;
changed = 0;
}
}
}
{
u8 b2 = *pb;
s32 result;
d = (s16)((s8)b2 - (s8)D_80115140[D_8011511A]);
if (d >= 6) {
D_80115140[D_8011511A] = b2 - 5;
result = changed;
} else {
if (d < 0) {
D_80115140[D_8011511A] = b2;
}
result = changed;
}
if (result) {
func_8002D4C8(0x45A, 0);
if (D_8011511A != 1) {
return 0;
}
c3 = c;
if (c3 == 9) {
D_80115142 = 0;
}
func_8017D890();
}
}
return 0;
}
@@ -0,0 +1,135 @@
s32 func_8017DD70(void) {
extern u32 D_801A3458;
extern u16 D_8011511A;
extern u16 D_80115120;
extern u16 D_80115122;
extern u8 D_80115138[];
extern u8 D_80115140[];
extern u8 D_80115142;
s32 flags;
s32 val;
u16 *p11a;
s32 c;
s16 ret;
s32 changed;
u8 *pb;
u8 *pe;
s32 d;
s32 nz;
s32 c3;
s32 off;
changed = 0;
flags = func_80014ED4(0);
if ((flags & 0xFFFF) != 0) {
D_801A3458 = 0;
}
val = func_80015018(0);
p11a = &D_8011511A;
ret = func_8014168C(*(s16 *)p11a);
c = D_80115138[*p11a];
if ((flags & 0x40) != 0) {
ret = func_8017EC68(c, ret);
nz = ret != 0;
return ret & -nz;
}
if ((flags & 0x10) != 0) {
c3 = c;
if (c3 < 6) {
if (c3 != 1) {
return -1;
}
} else {
func_8002D4C8(0x473, 0);
*p11a = *p11a - 1;
}
return 0;
}
off = (s32)(*p11a) * 2;
{
u8 *base1 = (u8 *)p11a + 0x2E;
pb = base1 + off;
}
{
u8 *base2 = (u8 *)p11a + 0x3E;
pe = base2 + off;
}
if ((val & 0xFFFF) != 0) {
if ((val & 0xFFFF) == D_80115120) {
D_80115122 = D_80115122 - 1;
if (D_80115122 == 0) {
flags = val & 0xF000;
D_80115122 = 3;
}
} else {
D_80115120 = val;
D_80115122 = 8;
}
} else {
D_80115120 = 0;
D_80115122 = 0xC;
}
if ((flags & 0x1000) != 0) {
u8 b2 = *pb;
*pb = b2 - 1;
changed = 1;
if ((u8)(b2 - 1) > 0x7F) {
if (c < 6) {
*pb = *pe - 1;
} else {
*pb = 0;
changed = 0;
}
}
}
if ((flags & 0x4000) != 0) {
u8 b2 = *pb;
u8 b4 = b2 + 1;
*pb = b4;
changed = 1;
if (*pe <= b4) {
if (c < 6) {
*pb = 0;
} else {
*pb = b2;
changed = 0;
}
}
}
{
u8 b2 = *pb;
s32 result;
d = (s16)((s8)b2 - (s8)D_80115140[D_8011511A]);
if (d >= 6) {
D_80115140[D_8011511A] = b2 - 5;
result = changed;
} else {
if (d < 0) {
D_80115140[D_8011511A] = b2;
}
result = changed;
}
if (result) {
func_8002D4C8(0x45A, 0);
if (D_8011511A != 1) {
return 0;
}
c3 = c;
if (c3 == 9) {
D_80115142 = 0;
}
func_8017D890();
}
}
return 0;
}
@@ -0,0 +1,135 @@
s32 func_8017DD70(void) {
extern u32 D_801A3458;
extern u16 D_8011511A;
extern u16 D_80115120;
extern u16 D_80115122;
extern u8 D_80115138[];
extern u8 D_80115140[];
extern u8 D_80115142;
s32 flags;
s32 val;
u16 *p11a;
register s32 c __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B tus8)
s16 ret;
s32 changed;
u8 *pb;
u8 *pe;
s32 d;
s32 nz;
s32 c3;
s32 off;
changed = 0;
flags = func_80014ED4(0);
if ((flags & 0xFFFF) != 0) {
D_801A3458 = 0;
}
val = func_80015018(0);
p11a = &D_8011511A;
ret = func_8014168C(*(s16 *)p11a);
c = D_80115138[*p11a];
if ((flags & 0x40) != 0) {
ret = func_8017EC68(c, ret);
nz = ret != 0;
return ret & -nz;
}
if ((flags & 0x10) != 0) {
__asm__ ("" : "=r"(c3) : "0"(c)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus8)
if (c3 < 6) {
if (c3 != 1) {
return -1;
}
} else {
func_8002D4C8(0x473, 0);
*p11a = *p11a - 1;
}
return 0;
}
off = (s32)(*p11a) * 2;
{
u8 *base1 = (u8 *)p11a + 0x2E;
pb = base1 + off;
}
{
u8 *base2 = (u8 *)p11a + 0x3E;
pe = base2 + off;
}
if ((val & 0xFFFF) != 0) {
if ((val & 0xFFFF) == D_80115120) {
D_80115122 = D_80115122 - 1;
if (D_80115122 == 0) {
flags = val & 0xF000;
D_80115122 = 3;
}
} else {
D_80115120 = val;
D_80115122 = 8;
}
} else {
D_80115120 = 0;
D_80115122 = 0xC;
}
if ((flags & 0x1000) != 0) {
u8 b2 = *pb;
*pb = b2 - 1;
changed = 1;
if ((u8)(b2 - 1) > 0x7F) {
if (c < 6) {
*pb = *pe - 1;
} else {
*pb = 0;
changed = 0;
}
}
}
if ((flags & 0x4000) != 0) {
u8 b2 = *pb;
u8 b4 = b2 + 1;
*pb = b4;
changed = 1;
if (*pe <= b4) {
if (c < 6) {
*pb = 0;
} else {
*pb = b2;
changed = 0;
}
}
}
{
u8 b2 = *pb;
s32 result;
d = (s16)((s8)b2 - (s8)D_80115140[D_8011511A]);
if (d >= 6) {
D_80115140[D_8011511A] = b2 - 5;
result = changed;
} else {
if (d < 0) {
D_80115140[D_8011511A] = b2;
}
result = changed;
}
if (result) {
func_8002D4C8(0x45A, 0);
if (D_8011511A != 1) {
return 0;
}
__asm__ ("" : "=r"(c3) : "0"(c)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus8)
if (c3 == 9) {
D_80115142 = 0;
}
func_8017D890();
}
}
return 0;
}
@@ -0,0 +1,14 @@
g6b: verdict NO-MATCH start 31 best 14 compiles 323 path R7 do-while @3884 + R12 width off s32->u16 @3871
best-scoring single candidates of the last trace (move -> score [residual class]):
R12 width off s32->u16 @3871 -> 14 [COUNT] (from 18)
R12 width off s32->u8 @3871 -> 14 [COUNT] (from 18)
R8 temp tmp0 @3880 -> 14 [COUNT] (from 14)
R7 block @3881 -> 14 [COUNT] (from 14)
R4 decl-move c 10->0 -> 14 [COUNT] (from 14)
R8 hoist tmp0 @3897 -> 14 [COUNT] (from 14)
R5 swap + @3905 -> 14 [COUNT] (from 14)
R9 swap-stmts @3878 -> 14 [COUNT] (from 14)
R4 decl-move c 10->1 -> 14 [COUNT] (from 14)
R8 hoist tmp0 @3902 -> 14 [COUNT] (from 14)
R7 block @3966 -> 14 [COUNT] (from 14)
R5 swap + @3909 -> 14 [COUNT] (from 14)
@@ -0,0 +1 @@
@@ -0,0 +1,247 @@
=== lever-free bodies in ov_SC01_008 sharing a callee or global with func_8017DD70 (35 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_8017DBEC (src/ov_SC01_008/ov_SC01_008_jr_8017BE9C.c:3772) shares 7: D_8011511A D_80115138 D_801A3458 func_80014ED4 func_8002D4C8 func_8014168C func_8017EC68 ---
void func_8017DBEC(void) {
extern s16 D_800B9A02;
extern s16 D_801A3320;
extern u8 D_800B9A15;
extern u8 D_801151C8[];
extern s32 D_801151D0;
extern u32 D_801A3458;
extern s32 D_801A345C;
extern u16 D_8011511A;
extern u8 D_80115138[];
extern u16 D_80115112;
extern s32 func_80014ED4(s32 a0);
extern void func_80139954(void);
extern s16 func_8014168C(s16 a0);
extern s32 func_8017EC68();
extern void func_8017E050(void);
extern void func_80137B80(void);
u16 idx;
s32 pad[2];
D_801151D0 = *(s32 *)&D_801151C8[(*(u16 *)&D_800B9A02) * 4];
if (D_801A3458 != 0) {
if (func_801399F0(D_801A345C) != 0) {
D_801A3458 = 0;
}
} else {
if ((func_80014ED4(0) & 0x50) != 0) {
idx = *(u16 *)&D_8011511A;
if (D_80115138[idx] == 8) {
func_8017EC68(0xF, func_8014168C(idx));
}
if (D_801A3320 != 0) {
func_80139954();
D_800B9A15 = 0;
func_8002D4C8(0x474, 0);
D_80115112 = D_80115112 + 1;
} else {
D_80115112 = D_80115112 - 1;
}
}
}
func_8017E050();
func_80137B80();
}
--- func_8013EB7C (src/ov_SC01_008/ov_SC01_008_jr_8013C98C.c:1968) shares 3: D_8011511A func_8002D4C8 func_8014168C ---
void func_8013EB7C(void) {
s32 sp10[2];
short sVar1;
s32 iVar4;
if ((s16)func_80141C50() == 0) {
D_801151D0 = *(s32 *)&D_801151C8[(u16)D_800B9A02 * 4];
sVar1 = ((short (*)(void))func_8013F350)();
if (D_8011511A >= 4) {
func_8013FAF8((s16)D_8011511A, (s16)(D_8011511A + 1));
}
func_8013FAF8(0, 5);
if (D_8011511A == 5) {
iVar4 = func_8014032C((2), (((short (*)(s32))func_8014168C)(2)));
} else {
iVar4 = func_8014032C(((s16)D_8011511A), (((short (*)(s32))func_8014168C)((s16)D_8011511A)));
}
if (iVar4 != 0) {
s32 *p130 = &D_80115130;
if (iVar4 != *p130) {
*p130 = iVar4;
func_80139954();
func_801376E8(iVar4, (s32)&(*(u8 *)&D_80180B0C));
}
}
func_80137B80();
if ((D_8011511E & 0x10) != 0 && D_8011511A < 5 && sVar1 == 0) {
(*(s16 *)&D_80115128) = 0;
func_8002D4C8(0x466, 0);
if (D_8011511A != 4) {
func_801376E8((s32)((s32 (*)(void))func_80141CA4)(), (s32)&(*(u8 *)&D_80180B0C));
}
(*(unsigned short *)&D_80115112) -= 1;
} else {
if ((D_8011511E & 0x800) != 0 || D_8011512A != 0) {
func_8013E958();
}
}
}
(void)sp10;
}
--- func_8017D5DC (src/ov_SC01_008/ov_SC01_008_jr_8017BE9C.c:3448) shares 3: D_80115138 D_80115140 func_8017D890 ---
void func_8017D5DC(void) {
extern s16 D_80115118;
extern s16 D_80115126;
extern s32 D_80115134;
extern u8 D_80115138[];
extern u8 D_80115140[];
extern s16 D_80115148[][1];
extern u8 D_80115158[];
extern u16 D_8011514A;
extern u16 D_8011514C;
extern u16 D_8011515A;
extern s32 D_8019EE8C[];
extern u8 D_8019EED8[];
extern u8 *D_8019EEE0[];
extern s16 D_801A3320;
extern s16 D_801A3324;
extern s16 D_801A3328;
extern u16 D_801A332C;
extern u16 D_801A3330;
extern u8 D_801A3464[];
extern s32 func_80029504(void);
extern s32 func_800291B4(s32 arg);
extern void func_8017D890(void);
/* COMPONENT_REF -> unconditional MEM_IN_STRUCT_P on the base store, so the
fixed-address D_80115126 load may hoist above it (sched.c true_dependence
escape: /s + varying vs non-/s + fixed). */
u8 *base;
u16 *q;
s16 i;
i = 0;
base = (u8 *)&D_80115118;
((struct Hd4a4_8017D5DC *)base)->h = 0;
D_80115134 = D_8019EE8C[D_80115126];
D_801A3320 = 0;
q = (u16 *)(base + 0x40);
for (; i < 3; i++) {
D_80115138[i] = *(u16 *)(D_80115134 + i * 0x20);
/* q[i]: INDIRECT_REF of a top-level PLUS_EXPR through a TYPED pointer
-> /s, so the D_801A3328 load hoists above this store. */
q[i] = *(u16 *)(D_80115134 + i * 0x20 + 2);
if (D_801A3328 == 0) {
D_80115148[i][0] = 0;
if (*(s16 *)((u8 *)q - 0x32) == 0) {
D_80115140[i] = 0;
}
}
}
if (D_80115126 == 0) {
if ((u32)func_80029504() > 0x3B5) {
*(s16 *)D_80115158 = 0x106;
}
}
if (D_80115126 == 3) {
s16 found;
s16 got;
s16 j;
u8 *p;
found = 0;
for (i = 0; i < 7; i++) {
D_801A3464[i] = 0;
}
for (i = 0; i < 7; i++) {
got = 0;
p = D_8019EEE0[i];
for (j = 0; j < D_8019EED8[i]; j++) {
if ((func_800291B4(*p++ + 0x62) & 0x40) != 0) {
got = 1;
break;
}
}
if (got != 0) {
D_801A3464[found++] = i;
}
}
D_8011515A = found | 0x100;
if (D_801A3328 != 0) {
D_80115148[0][0] = 1;
D_8011514A = D_801A332C;
D_8011514C = D_801A3330;
}
D_801A3324 = 0;
}
func_8017D890();
}
--- func_80141874 (src/ov_SC01_008/ov_SC01_008_jr_80140608.c:1351) shares 2: func_80014ED4 func_80015018 ---
void func_80141874(void) {
extern u16 D_8011511C[];
extern u16 D_80115116;
extern void (*D_80180B90[])(void);
func_801754A8();
D_8011511E = func_80014ED4(0);
D_8011511C[0] = func_80015018(0);
D_80180B90[D_80115112]();
func_80141C04();
D_80115116 += 1;
}
--- func_8013E5E8 (src/ov_SC01_008/ov_SC01_008_jr_8013C98C.c:1754) shares 2: func_80014ED4 func_80015018 ---
void func_8013E5E8(void)
{
extern u16 D_8011511E;
extern u16 D_8011511C;
extern unsigned short D_80115112;
extern u16 D_80115116;
extern void (*D_80180B44[])(void);
void (**new_var)(void);
void (*fp)(void);
func_80029444();
func_801754A8();
D_8011511E = func_80014ED4(0);
D_8011511C = func_80015018(0);
new_var = &D_80180B44[D_80115112];
fp = *new_var;
fp();
func_800190AC();
func_80141C04();
D_80115116 += 1;
}
--- func_8017D554 (src/ov_SC01_008/ov_SC01_008_jr_8017BE9C.c:3413) shares 2: D_8011511A D_801A3458 ---
void func_8017D554(void) {
extern void func_800D24A0(s32 a0);
extern void func_8017D5DC(void);
extern s16 D_801A3328;
extern u16 D_8011511A;
extern u16 D_80115112;
extern u32 D_801A3458;
extern void *D_801A3460;
extern s32 D_80115130;
func_800D24A0(4);
func_8017D5DC();
if (D_801A3328 == 0) {
D_8011511A = 0;
} else {
D_8011511A = D_801A3328;
}
D_801A3460 = 0;
D_801A3458 = 0;
D_80115130 = 0;
D_801A3328 = 0;
D_80115112++;
}
@@ -0,0 +1,57 @@
src/ov_SC01_008/ov_SC01_008_jr_8017BE9C.c:func_8017DD70: score 31 (COUNT; mine 182 ins, target 184) — not yet
register pairs (mine -> target, count): s3->s4 x7, s4->s3 x4, a0->v1 x1, s4->v1 x1
replace mine[1:3] target[1:3]
1 sw s3,28(sp) | sw s4,32(sp)
2 move s3,zero | move s4,zero
replace mine[5:6] target[5:6]
5 sw s4,32(sp) | sw s3,28(sp)
replace mine[28:29] target[28:29]
28 lbu s4,0(at) | lbu s3,0(at)
replace mine[30:31] target[30:31]
30 move a0,s4 | move a0,s3
replace mine[38:39] target[38:39]
38 j 2188 <func_8017DD70+0x2b4> | j 2190 <func_8017DD70+0x2bc>
replace mine[41:43] target[41:45]
41 beqz v0,1fb8 <func_8017DD70+0xe4> | beqz v0,1fc0 <func_8017DD70+0xec>
42 slti v0,a0,6 | sll v0,v1,0x1
43 -- | move v1,s3
44 -- | slti v0,v1,6
replace mine[45:46] target[47:48]
45 beq a0,v0,2184 <func_8017DD70+0x2b0> | beq v1,v0,218c <func_8017DD70+0x2b8>
replace mine[47:48] target[49:50]
47 j 2188 <func_8017DD70+0x2b4> | j 2190 <func_8017DD70+0x2bc>
replace mine[55:56] target[57:58]
55 j 2184 <func_8017DD70+0x2b0> | j 218c <func_8017DD70+0x2b8>
delete mine[57:58] target[59:59]
57 sll v0,v1,0x1 | --
replace mine[80:81] target[81:82]
80 j 2034 <func_8017DD70+0x160> | j 2038 <func_8017DD70+0x164>
replace mine[84:85] target[85:86]
84 j 2034 <func_8017DD70+0x160> | j 2038 <func_8017DD70+0x164>
replace mine[100:102] target[101:103]
100 li s3,1 | li s4,1
101 slti v0,s4,6 | slti v0,s3,6
replace mine[107:108] target[108:109]
107 j 2090 <func_8017DD70+0x1bc> | j 2094 <func_8017DD70+0x1c0>
replace mine[110:111] target[111:112]
110 move s3,zero | move s4,zero
replace mine[122:124] target[123:125]
122 li s3,1 | li s4,1
123 slti v0,s4,6 | slti v0,s3,6
replace mine[126:127] target[127:128]
126 j 20dc <func_8017DD70+0x208> | j 20e0 <func_8017DD70+0x20c>
replace mine[129:130] target[130:131]
129 move s3,zero | move s4,zero
replace mine[149:151] target[150:152]
149 j 2144 <func_8017DD70+0x270> | j 2148 <func_8017DD70+0x274>
150 move v0,s3 | move v0,s4
replace mine[152:153] target[153:154]
152 move v0,s3 | move v0,s4
replace mine[156:157] target[157:158]
156 beqz v0,2184 <func_8017DD70+0x2b0> | beqz v0,218c <func_8017DD70+0x2b8>
replace mine[163:164] target[164:165]
163 bne v1,v0,2188 <func_8017DD70+0x2b4> | bne v1,v0,2190 <func_8017DD70+0x2bc>
insert mine[165:165] target[166:167]
165 -- | move v1,s3
replace mine[166:167] target[168:169]
166 bne s4,v0,217c <func_8017DD70+0x2a8> | bne v1,v0,2184 <func_8017DD70+0x2b0>
@@ -0,0 +1,4 @@
NEEDED pin $19 line 3964
REMOVED pin $2 line 3972
NEEDED launder line 3991
NEEDED launder line 4077
@@ -0,0 +1,2 @@
src/ov_SC01_008/ov_SC01_008_jr_8017BE9C.c
func_8017DD70
@@ -0,0 +1,46 @@
void func_80181744(s32 a0) {
s32 local[4];
s32 v0;
s32 sum;
v0 = func_80180AF0(a0, 0xFFFB0000, local);
if (v0 == 1) {
func_8012ADE4((u8 *)a0);
*(s32 *)(a0 + 0x1C) = 8;
func_8012A8B0((u8 *)a0, (s32)&D_80199644);
func_8012B23C(a0);
func_8012AD44((s32 *)a0, 1);
} else {
v0 = *(s16 *)(a0 + 0x102);
if (v0 != 0) {
s32 tmp;
tmp = v0;
v0 = tmp - 1;
} else {
s16 cnt;
if (*(s16 *)(a0 + 0xAA) == 0) {
func_80180FF8((void *)a0);
}
cnt = *(u16 *)(a0 + 0x104) - 1;
*(s16 *)(a0 + 0x104) = cnt;
if (cnt != 0) {
v0 = 4;
} else {
*(s16 *)(a0 + 0x104) = 3;
v0 = 0x20;
}
}
*(s16 *)(a0 + 0x102) = v0;
v0 = *(s32 *)(a0 + 0x20);
sum = *(u16 *)(v0 + 0x12) + *(u16 *)(a0 + 0x106);
*(u16 *)(v0 + 0x12) = sum;
if (func_8012BEE8(a0) != 0) {
*(s32 *)(a0 + 0x1C) = 0x80;
v0 = rand();
*(s16 *)(a0 + 0x106) = (v0 & 0x20) - 0x10;
}
}
}
@@ -0,0 +1,46 @@
void func_80181744(s32 a0) {
s32 local[4];
s32 v0;
s32 sum;
v0 = func_80180AF0(a0, 0xFFFB0000, local);
if (v0 == 1) {
func_8012ADE4((u8 *)a0);
*(s32 *)(a0 + 0x1C) = 8;
func_8012A8B0((u8 *)a0, (s32)&D_80199644);
func_8012B23C(a0);
func_8012AD44((s32 *)a0, 1);
} else {
v0 = *(s16 *)(a0 + 0x102);
if (v0 != 0) {
s32 tmp;
tmp = v0;
v0 = tmp - 1;
} else {
s16 cnt;
if (*(s16 *)(a0 + 0xAA) == 0) {
func_80180FF8((void *)a0);
}
cnt = *(u16 *)(a0 + 0x104) - 1;
*(s16 *)(a0 + 0x104) = cnt;
if (cnt != 0) {
v0 = 4;
} else {
*(s16 *)(a0 + 0x104) = 3;
v0 = 0x20;
}
}
*(s16 *)(a0 + 0x102) = v0;
v0 = *(s32 *)(a0 + 0x20);
sum = *(u16 *)(v0 + 0x12) + *(u16 *)(a0 + 0x106);
*(u16 *)(v0 + 0x12) = sum;
if (func_8012BEE8(a0) != 0) {
*(s32 *)(a0 + 0x1C) = 0x80;
v0 = rand();
*(s16 *)(a0 + 0x106) = (v0 & 0x20) - 0x10;
}
}
}
@@ -0,0 +1,47 @@
void func_80181744(s32 a0) {
s32 local[4];
register s32 v0 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 sum;
v0 = func_80180AF0(a0, 0xFFFB0000, local);
if (v0 == 1) {
func_8012ADE4((u8 *)a0);
*(s32 *)(a0 + 0x1C) = 8;
func_8012A8B0((u8 *)a0, (s32)&D_80199644);
func_8012B23C(a0);
func_8012AD44((s32 *)a0, 1);
} else {
v0 = *(s16 *)(a0 + 0x102);
if (v0 != 0) {
register s32 tmp __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
tmp = v0;
__asm__ __volatile__("" : "=r"(tmp) : "0"(tmp) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
v0 = tmp - 1;
} else {
s16 cnt;
if (*(s16 *)(a0 + 0xAA) == 0) {
func_80180FF8((void *)a0);
}
cnt = *(u16 *)(a0 + 0x104) - 1;
*(s16 *)(a0 + 0x104) = cnt;
if (cnt != 0) {
v0 = 4;
} else {
*(s16 *)(a0 + 0x104) = 3;
v0 = 0x20;
}
}
*(s16 *)(a0 + 0x102) = v0;
v0 = *(s32 *)(a0 + 0x20);
sum = *(u16 *)(v0 + 0x12) + *(u16 *)(a0 + 0x106);
*(u16 *)(v0 + 0x12) = sum;
if (func_8012BEE8(a0) != 0) {
*(s32 *)(a0 + 0x1C) = 0x80;
v0 = rand();
*(s16 *)(a0 + 0x106) = (v0 & 0x20) - 0x10;
}
}
}
@@ -0,0 +1,14 @@
g6b: verdict NO-MATCH start 14 best 8 compiles 317 path R12 width v0 s32->s16 @6701 + R5 swap + @6736 + R6 inline v0 @6704
best-scoring single candidates of the last trace (move -> score [residual class]):
R6 inline v0 @6704 -> 8 [COUNT] (from 9)
R5 swap + @6736 -> 9 [COUNT] (from 11)
R12 width sum s32->u16 @6702 -> 9 [COUNT] (from 9)
R8 temp tmp0 @6735 -> 9 [COUNT] (from 9)
R7 block @6704 -> 9 [COUNT] (from 9)
R10 param-copy a0 @6703 -> 9 [COUNT] (from 9)
R4 decl-move v0 1->0 -> 9 [COUNT] (from 9)
R12 width sum s32->s16 @6702 -> 9 [COUNT] (from 9)
R8 base tmp0 @6735 -> 9 [COUNT] (from 9)
R4 decl-move v0 1->2 -> 9 [COUNT] (from 9)
R7 block @6733 -> 9 [COUNT] (from 9)
R8 temp tmp0 @6736 -> 9 [COUNT] (from 9)
@@ -0,0 +1,47 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: plumbing
// @stuck: none — MATCH
// @class: regalloc-order — simplified sibling of matched func_8017B614.
// @stuck: none. Block-moves are align-1 struct-assigns (u8[8]) -> emit_block_move
// @class: struct
// @stuck: none — MATCH (74 ins)
// @class: regalloc-order + T1 memcpy-builtin→call re-crack
// @stuck: 0 (iso). Register lever = $16 pin + in-place re-tie on the memcpy-branch src (keeps
// @class: plumbing
// @stuck: none — MATCH
// @class: schedule
// @stuck: none — MATCH
// @class: struct
// @stuck: none — MATCH
// @class: struct
// @stuck: none — MATCH (63 ins)
// @class: struct
// @stuck: none — MATCH (62 ins)
// @class: struct
// @stuck: none — MATCH (65 ins)
// @class: regalloc-order
// @stuck: pending self-check — register order param=$s2 counter=$s1 ptr=$s0
// @class: plumbing
// @stuck: none — MATCH (expected); short-typed global increment + signed compare, store-2 on overflow
// @class: plumbing
// @stuck: none — MATCH expected (simple short-increment + guarded call)
// @class: regalloc-order
// @stuck: none — MATCH (branch-polarity invert: fn-ptr non-zero call is the fall-through arm)
// @class: plumbing
// @stuck: none — signed s32 counter at 0x1C, delay-slot store is the unconditional bump
// @class: schedule
// @stuck: none — MATCH (102 ins). MATRIX(0x20:m@0,t@0x14)+SVECTOR in/out stack layout; the only
// @class: struct
// @stuck: none — MATCH (94 ins). Keys: (1) cache out[0] in a local `o` before the switch so gcc
// @class: schedule
// @stuck: none — MATCH (71 ins). Tail schedule: read out.c into an explicit temp BEFORE the 0x5a/1 const stores so gcc hoists its lhu early (load-delay filled by li 0x5a) and stores out.c last from a held reg; without the temp gcc instead deferred out.b's store. in/out are two separate SV3{s16 a,b,c} stack slots (sp+0x10, sp+0x18) for ((void (*)(int, void *, void *))func_8012F214)(a0,&in,&out). 0x34 compare reads u16 (lhu, not lh).
// @class: other
// @stuck: none — MATCH (expected); 16-bit sh stores via short* casts, s0=param_1 call-crossing
// @class: plumbing
// @stuck: none — MATCH (18 ins): if((b&1) && p!=&sym) call(param,&sym); $a0 live, $a1=&sym fall out
// @class: schedule
// @stuck: none — MATCH (44 ins). Two §3-T4 branch-polarity inversions: outer if(param_2>=iVar2) makes the func_8018352C else-block fall-through; inner if(param_3>=iVar2) return 0 makes the func_8012A828 body fall-through. No pins needed — natural $s1/$s0/$s2 alloc matched.
// @class: plumbing
// @stuck: none — MATCH (straightforward; callee sigs canonical from overlay)
// @class: plumbing
// @stuck: none — MATCH expected (single call-crossing local pins to $s0 naturally; lhu via unsigned short)
@@ -0,0 +1,155 @@
=== lever-free bodies in ov_SC04_004 sharing a callee or global with func_80181744 (55 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80181678 (src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:6651) shares 7: D_80199644 func_8012A8B0 func_8012AD44 func_8012ADE4 func_8012B23C func_8012BEE8 func_80180AF0 ---
void func_80181678(s32 a0) {
s32 local;
s32 v0;
v0 = func_80180AF0(a0, 0xFFFB0000, &local);
if (v0 == 1) {
func_8012ADE4((u8 *)a0);
*(s32 *)(a0 + 0x1C) = 8;
func_8012A8B0((u8 *)a0, (s32)&D_80199644);
func_8012B23C(a0);
func_8012AD44((s32 *)a0, 1);
} else if (func_8012BEE8(a0) != 0) {
*(s32 *)(a0 + 0x1C) = 8;
func_8012A8B0((u8 *)a0, (s32)&D_80199644);
func_8012B23C(a0);
func_8012AD44((s32 *)a0, 1);
} else if ((*(u16 *)(a0 + 0x86) & 1) == 0) {
s16 r = (s16)func_80180D94(a0);
if (r != 0) {
((void (*)(s32, s16))func_80180274)(a0, r);
}
}
func_80181130(a0, 1);
}
--- func_80180AF0 (src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:6110) shares 5: D_80199644 func_8012A8B0 func_8012AD44 func_8012ADE4 func_8012B23C ---
s32 func_80180AF0(s32 a0, s32 a1, s32 *a2) {
s32 cba4;
func_8012B2CC(a0);
func_8012B178(a0, a1);
cba4 = ((s32 (*)(s32))func_8012CBA4)(a0);
if ((*a2 = func_80180C74(a0)) != 0) goto fail;
if (cba4 == 0x2000) goto zeroret;
fail:
func_8012ADE4((u8 *)a0);
*(s32 *)(a0 + 0x1C) = 8;
func_8012A8B0((u8 *)a0, (s32)&D_80199644);
func_8012B23C(a0);
func_8012AD44((s32 *)a0, 1);
return 1;
zeroret:
return 0;
}
--- func_801802D0 (src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:5773) shares 5: func_8012A8B0 func_8012ADE4 func_8012B23C func_8012BEE8 func_80180AF0 ---
void func_801802D0(s32 param_1) {
SV3_801802D0 pos;
s32 out;
s32 flag = 0;
switch (*(u16 *)(param_1 + 0x34)) {
case 0:
if (func_8012BEE8(param_1) != 0) {
*(u16 *)(param_1 + 0x34) += 1;
func_8012A8B0((u8 *)param_1, (s32)&D_8019A00C);
func_8012B2CC(param_1);
func_8012B178(param_1, 0xFFF80000);
*(s32 *)(param_1 + 0x14) = 0xFFF40000;
}
func_80181130(param_1, 0);
break;
case 1:
flag = ((s32 (*)(s32))func_8012CBF4)(param_1);
if (*(s16 *)(param_1 + 0xA) > 0) {
func_8012C218((void *)param_1);
return;
}
if (func_80180C74(param_1) != 0) {
*(s32 *)(param_1 + 0x10) = 0;
*(s32 *)(param_1 + 0x18) = 0;
*(s32 *)(param_1 + 0x4) = *(s32 *)(param_1 + 0x38);
*(s32 *)(param_1 + 0xC) = *(s32 *)(param_1 + 0x40);
}
if (flag & 0x2000) {
func_8012B23C(param_1);
func_8012B2CC(param_1);
func_8012B178(param_1, 0xFFF20000);
func_8012A8B0((u8 *)param_1, (s32)&D_80199AF4);
*(s32 *)(param_1 + 0x1C) = 0x30;
*(u16 *)(param_1 + 0x34) += 1;
pos.a = *(s16 *)(param_1 + 0x6);
pos.b = *(s16 *)(param_1 + 0xA);
pos.c = *(s16 *)(param_1 + 0xE);
func_8002D59C(0x7E5, 0, *(u16 *)(param_1 + 0x36));
}
func_80181130(param_1, 0);
break;
case 2:
if (func_80180AF0(param_1, 0xFFF20000, &out) == 1) {
func_8012ADE4((u8 *)param_1);
flag = 1;
} else if (func_8012BEE8(param_1) != 0) {
flag = 1;
}
func_80181130(param_1, 2);
if (flag != 0) {
func_80180530((void *)param_1);
func_8002D59C(4, 0x7E5, *(u16 *)(param_1 + 0x36));
}
break;
}
}
--- func_80181850 (src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:6740) shares 4: D_80199644 func_8012A8B0 func_8012AD44 func_8012B23C ---
void func_80181850(s32 arg0) {
if (*(s16 *)(arg0 + 0x98) == 0) {
*(s32 *)(arg0 + 0x1C) = 8;
func_8012A8B0((u8 *)arg0, (s32)&D_80199644);
func_8012B23C(arg0);
func_8012AD44((s32 *)arg0, 1);
}
}
--- func_80180EEC (src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:6288) shares 4: D_80199644 func_8012A8B0 func_8012AD44 func_8012B23C ---
void func_80180EEC(void *arg0) {
*(u16 *)((u8 *)arg0 + 0x5C) = 0x8A10;
*(u16 *)((u8 *)arg0 + 0x52) = 0;
if ((*(s32 *)((u8 *)arg0 + 0xC4) & 4) != 0) {
func_8012A8B0((u8 *)arg0, (s32)&D_80199F24);
func_8012AD44((s32 *)arg0, 6);
} else {
*(s32 *)((u8 *)arg0 + 0x1C) = 8;
func_8012A8B0((u8 *)arg0, (s32)&D_80199644);
func_8012B23C((s32)arg0);
func_8012AD44((s32 *)arg0, 1);
}
}
--- func_801818A8 (src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:6758) shares 4: D_80199644 func_8012A8B0 func_8012AD44 func_8012B23C ---
void func_801818A8(void *arg0) {
void *s0 = arg0;
s32 buf[2];
if (*(s16 *)((u8 *)s0 + 0x98) != 0) {
return;
}
if ((*(u16 *)((u8 *)s0 + 0x86) & 1) == 0 && func_80180BA4(s0, buf) != 0) {
func_8012A8B0((u8 *)s0, (s32)&D_8019972C);
*(s32 *)((u8 *)s0 + 0x94) = 0xF;
*(s32 *)(*(u8 **)((u8 *)s0 + 0x20) + 0x20) = D_801997A4;
func_8012B23C((s32)s0);
func_8012AD44((s32 *)s0, 2);
} else {
*(s32 *)((u8 *)s0 + 0x1C) = 8;
func_8012A8B0((u8 *)s0, (s32)&D_80199644);
func_8012B23C((s32)s0);
func_8012AD44((s32 *)s0, 1);
}
}
@@ -0,0 +1,23 @@
src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80181744: score 14 (COUNT; mine 65 ins, target 67) — not yet
register pairs (mine -> target, count): a1->v0 x7, v0->v1 x4, v1->a1 x2
replace mine[23:24] target[23:24]
23 j 6a08 <func_80181744+0xf0> | j 6a10 <func_80181744+0xf8>
replace mine[25:26] target[25:26]
25 lh a1,258(s0) | lh v0,258(s0)
replace mine[27:29] target[27:31]
27 bnez a1,69cc <func_80181744+0xb4> | beqz v0,6994 <func_80181744+0x7c>
28 addiu a1,a1,-1 | move v1,v0
29 -- | j 69d4 <func_80181744+0xbc>
30 -- | addiu v0,v1,-1
replace mine[41:42] target[43:44]
41 li a1,4 | li v0,4
replace mine[44:49] target[46:51]
44 li a1,32 | li v0,32
45 sh a1,258(s0) | sh v0,258(s0)
46 lw a1,32(s0) | lw v0,32(s0)
47 lhu v1,262(s0) | lhu a1,262(s0)
48 lhu v0,18(a1) | lhu v1,18(v0)
replace mine[50:51] target[52:53]
50 addu v0,v0,v1 | addu v1,v1,a1
replace mine[52:53] target[54:55]
52 sh v0,18(a1) | sh v1,18(v0)
@@ -0,0 +1,3 @@
NEEDED pin $2 line 6801
NEEDED pin $3 line 6815
NEEDED launder line 6817
@@ -0,0 +1,2 @@
src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c
func_80181744
@@ -0,0 +1,169 @@
void func_80182FB4(s32 param_1)
{
extern void func_80184580(s32);
extern void func_8012B178(s32 a0, s32 a1);
extern s32 func_8012CBA4(s32 a0);
extern s32 func_8012B608(s32 a0, s32 a1, s32 a2);
extern s32 func_8012BEE8(s32 a0);
extern void func_8012ADE4(u8 *a0);
extern s32 func_8012BD3C(s32 a0, s32 a1, s32 a2);
extern void func_8012B23C(s32 a0);
extern s32 func_80143B6C(s32 a0, s32 a1);
extern void func_80131E00(s32 a0, s32 a1);
s32 sVar1;
s32 iVar1;
u16 state;
s32 uVar2;
s32 pad[4];
if (*(s16 *)(param_1 + 0xa) >= 0x10) {
((void (*)(void *))func_80184580)((void *)param_1);
return;
}
sVar1 = func_8004787C((*(s32 *)(param_1 + 0xe4) << 6) & 0x7c0);
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x1a) = (sVar1 >> 1) + 0x800;
state = *(u16 *)(param_1 + 0x34);
switch (state) {
case 0: {
s32 iVar3 = 0x1000 - sVar1;
s32 a1;
if (iVar3 >= 0) {
a1 = -0x8000 - (iVar3 << 4);
} else {
a1 = -0x8000 - ((sVar1 - 0x1000) << 4);
}
func_8012B178(param_1, a1);
iVar1 = func_8012CBA4(param_1);
if ((iVar1 & 0xff) == 0x1a) {
goto EXIT_808B4;
}
if ((iVar1 & 0x6000) == 0) {
goto MERGE_4C0;
}
if (--*(s32 *)(param_1 + 0xe8) != 0) {
goto TAIL_5D8;
}
{
s32 iVar2;
s32 nVar;
s32 sVar2;
*(u16 *)(param_1 + 0x34) = 1;
*(s32 *)(param_1 + 0x1c) = 0x20;
iVar2 = rand();
nVar = iVar2 % 1024;
sVar2 = *(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12);
if (rand() & 1) {
uVar2 = sVar2 + nVar;
} else {
uVar2 = sVar2 - nVar;
}
}
goto MERGE_4E0;
}
case 1: {
s32 ptr0 = *(s32 *)(param_1 + 0x20);
s32 arg0 = *(s16 *)(ptr0 + 0x12);
s32 ret = func_8012B608(arg0, *(s32 *)(param_1 + 0xe0), 0x14);
s32 ptr1 = *(s32 *)(param_1 + 0x20);
s32 sum;
sum = *(u16 *)(ptr1 + 0x12) + ret;
ret = 0x1000 - sVar1;
*(s16 *)(ptr1 + 0x12) = sum;
if (ret < 0) {
ret = sVar1 - 0x1000;
}
ret = ret << 4;
ret = -ret;
{
s32 arg1 = ret - 0x4000;
func_8012B178(param_1, arg1);
}
iVar1 = func_8012CBA4(param_1);
if ((iVar1 & 0xff) == 0x1a) {
goto EXIT_808B4;
}
if ((iVar1 & 0x6000) != 0) {
goto MERGE_4E8;
}
}
MERGE_4C0:
func_8012ADE4((u8 *)param_1);
{
/* §17 pin: the merge-block pointer must land in $v1 so reload's
* scratch for the constant store takes $v0 (see .L8017F4C0). */
s32 ptr2;
ptr2 = *(s32 *)(param_1 + 0x20);
*(u16 *)(param_1 + 0x34) = 2;
uVar2 = *(s16 *)(ptr2 + 0x12) + 0x800;
}
MERGE_4E0:
*(s32 *)(param_1 + 0xe0) = uVar2;
goto TAIL_5D8;
MERGE_4E8:
if (func_8012BEE8(param_1) != 0) {
*(u16 *)(param_1 + 0x34) = 0;
*(s32 *)(param_1 + 0xe8) = 0x40;
}
goto TAIL_5D8;
case 2: {
s32 ptrA = *(s32 *)(param_1 + 0x20);
s32 arg1 = *(s32 *)(param_1 + 0xe0);
s32 arg0 = *(s16 *)(ptrA + 0x12);
s32 ret = func_8012B608(arg0, arg1, 0xa);
if (ret == 0) {
*(u16 *)(param_1 + 0x34) = 0;
}
{
s32 ptrB = *(s32 *)(param_1 + 0x20);
*(s16 *)(ptrB + 0x12) = *(u16 *)(ptrB + 0x12) + ret;
}
goto TAIL_5D8;
}
case 3:
iVar1 = func_8012CBA4(param_1);
if ((iVar1 & 0xff) != 0x1a) {
goto NOT_1A;
}
EXIT_808B4:
((void (*)(void *))func_80184580)((void *)param_1);
return;
NOT_1A:
if ((iVar1 & 0x2000) == 0) {
goto L8017F598;
}
func_8012B23C(param_1);
func_8012B178(param_1, 0xFFFD8000);
*(u16 *)(param_1 + 0x34) = 0;
goto TAIL_5D8;
L8017F598:
if ((*(s32 *)(param_1 + 0x1c) & 3) != 0) {
goto L8017F5B4;
}
func_80143B6C(param_1, 1);
L8017F5B4:
*(s32 *)(param_1 + 0x1c) += 1;
if (*(s32 *)(param_1 + 0x1c) < 0x3c) {
goto TAIL_5DC;
}
func_80131E00(param_1, 0xd);
}
TAIL_5D8:
TAIL_5DC:
if (func_8012BD3C(param_1, 0x400, 0x24000) == 1) {
*(s16 *)(param_1 + 2) = 3;
}
if (0x100000 < *(s32 *)(param_1 + 0x14)) {
*(s32 *)(param_1 + 0x14) = 0x100000;
}
*(s32 *)(param_1 + 0xe4) += 1;
}
@@ -0,0 +1,169 @@
void func_80182FB4(s32 param_1)
{
extern void func_80184580(s32);
extern void func_8012B178(s32 a0, s32 a1);
extern s32 func_8012CBA4(s32 a0);
extern s32 func_8012B608(s32 a0, s32 a1, s32 a2);
extern s32 func_8012BEE8(s32 a0);
extern void func_8012ADE4(u8 *a0);
extern s32 func_8012BD3C(s32 a0, s32 a1, s32 a2);
extern void func_8012B23C(s32 a0);
extern s32 func_80143B6C(s32 a0, s32 a1);
extern void func_80131E00(s32 a0, s32 a1);
s32 sVar1;
s32 iVar1;
u16 state;
s32 uVar2;
s32 pad[4];
if (*(s16 *)(param_1 + 0xa) >= 0x10) {
((void (*)(void *))func_80184580)((void *)param_1);
return;
}
sVar1 = func_8004787C((*(s32 *)(param_1 + 0xe4) << 6) & 0x7c0);
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x1a) = (sVar1 >> 1) + 0x800;
state = *(u16 *)(param_1 + 0x34);
switch (state) {
case 0: {
s32 iVar3 = 0x1000 - sVar1;
s32 a1;
if (iVar3 >= 0) {
a1 = -0x8000 - (iVar3 << 4);
} else {
a1 = -0x8000 - ((sVar1 - 0x1000) << 4);
}
func_8012B178(param_1, a1);
iVar1 = func_8012CBA4(param_1);
if ((iVar1 & 0xff) == 0x1a) {
goto EXIT_808B4;
}
if ((iVar1 & 0x6000) == 0) {
goto MERGE_4C0;
}
if (--*(s32 *)(param_1 + 0xe8) != 0) {
goto TAIL_5D8;
}
{
s32 iVar2;
s32 nVar;
s32 sVar2;
*(u16 *)(param_1 + 0x34) = 1;
*(s32 *)(param_1 + 0x1c) = 0x20;
iVar2 = rand();
nVar = iVar2 % 1024;
sVar2 = *(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12);
if (rand() & 1) {
uVar2 = sVar2 + nVar;
} else {
uVar2 = sVar2 - nVar;
}
}
goto MERGE_4E0;
}
case 1: {
s32 ptr0 = *(s32 *)(param_1 + 0x20);
s32 arg0 = *(s16 *)(ptr0 + 0x12);
s32 ret = func_8012B608(arg0, *(s32 *)(param_1 + 0xe0), 0x14);
s32 ptr1 = *(s32 *)(param_1 + 0x20);
s32 sum;
sum = *(u16 *)(ptr1 + 0x12) + ret;
ret = 0x1000 - sVar1;
*(s16 *)(ptr1 + 0x12) = sum;
if (ret < 0) {
ret = sVar1 - 0x1000;
}
ret = ret << 4;
ret = -ret;
{
s32 arg1 = ret - 0x4000;
func_8012B178(param_1, arg1);
}
iVar1 = func_8012CBA4(param_1);
if ((iVar1 & 0xff) == 0x1a) {
goto EXIT_808B4;
}
if ((iVar1 & 0x6000) != 0) {
goto MERGE_4E8;
}
}
MERGE_4C0:
func_8012ADE4((u8 *)param_1);
{
/* §17 pin: the merge-block pointer must land in $v1 so reload's
* scratch for the constant store takes $v0 (see .L8017F4C0). */
s32 ptr2;
ptr2 = *(s32 *)(param_1 + 0x20);
*(u16 *)(param_1 + 0x34) = 2;
uVar2 = *(s16 *)(ptr2 + 0x12) + 0x800;
}
MERGE_4E0:
*(s32 *)(param_1 + 0xe0) = uVar2;
goto TAIL_5D8;
MERGE_4E8:
if (func_8012BEE8(param_1) != 0) {
*(u16 *)(param_1 + 0x34) = 0;
*(s32 *)(param_1 + 0xe8) = 0x40;
}
goto TAIL_5D8;
case 2: {
s32 ptrA = *(s32 *)(param_1 + 0x20);
s32 arg1 = *(s32 *)(param_1 + 0xe0);
s32 arg0 = *(s16 *)(ptrA + 0x12);
s32 ret = func_8012B608(arg0, arg1, 0xa);
if (ret == 0) {
*(u16 *)(param_1 + 0x34) = 0;
}
{
s32 ptrB = *(s32 *)(param_1 + 0x20);
*(s16 *)(ptrB + 0x12) = *(u16 *)(ptrB + 0x12) + ret;
}
goto TAIL_5D8;
}
case 3:
iVar1 = func_8012CBA4(param_1);
if ((iVar1 & 0xff) != 0x1a) {
goto NOT_1A;
}
EXIT_808B4:
((void (*)(void *))func_80184580)((void *)param_1);
return;
NOT_1A:
if ((iVar1 & 0x2000) == 0) {
goto L8017F598;
}
func_8012B23C(param_1);
func_8012B178(param_1, 0xFFFD8000);
*(u16 *)(param_1 + 0x34) = 0;
goto TAIL_5D8;
L8017F598:
if ((*(s32 *)(param_1 + 0x1c) & 3) != 0) {
goto L8017F5B4;
}
func_80143B6C(param_1, 1);
L8017F5B4:
*(s32 *)(param_1 + 0x1c) += 1;
if (*(s32 *)(param_1 + 0x1c) < 0x3c) {
goto TAIL_5DC;
}
func_80131E00(param_1, 0xd);
}
TAIL_5D8:
TAIL_5DC:
if (func_8012BD3C(param_1, 0x400, 0x24000) == 1) {
*(s16 *)(param_1 + 2) = 3;
}
if (0x100000 < *(s32 *)(param_1 + 0x14)) {
*(s32 *)(param_1 + 0x14) = 0x100000;
}
*(s32 *)(param_1 + 0xe4) += 1;
}
@@ -0,0 +1,171 @@
void func_80182FB4(s32 param_1)
{
extern void func_80184580(s32);
extern void func_8012B178(s32 a0, s32 a1);
extern s32 func_8012CBA4(s32 a0);
extern s32 func_8012B608(s32 a0, s32 a1, s32 a2);
extern s32 func_8012BEE8(s32 a0);
extern void func_8012ADE4(u8 *a0);
extern s32 func_8012BD3C(s32 a0, s32 a1, s32 a2);
extern void func_8012B23C(s32 a0);
extern s32 func_80143B6C(s32 a0, s32 a1);
extern void func_80131E00(s32 a0, s32 a1);
s32 sVar1;
s32 iVar1;
u16 state;
s32 uVar2;
s32 pad[4];
if (*(s16 *)(param_1 + 0xa) >= 0x10) {
((void (*)(void *))func_80184580)((void *)param_1);
return;
}
sVar1 = func_8004787C((*(s32 *)(param_1 + 0xe4) << 6) & 0x7c0);
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x1a) = (sVar1 >> 1) + 0x800;
state = *(u16 *)(param_1 + 0x34);
switch (state) {
case 0: {
s32 iVar3 = 0x1000 - sVar1;
s32 a1;
if (iVar3 >= 0) {
a1 = -0x8000 - (iVar3 << 4);
} else {
a1 = -0x8000 - ((sVar1 - 0x1000) << 4);
}
func_8012B178(param_1, a1);
iVar1 = func_8012CBA4(param_1);
if ((iVar1 & 0xff) == 0x1a) {
goto EXIT_808B4;
}
if ((iVar1 & 0x6000) == 0) {
goto MERGE_4C0;
}
if (--*(s32 *)(param_1 + 0xe8) != 0) {
goto TAIL_5D8;
}
{
s32 iVar2;
s32 nVar;
s32 sVar2;
*(u16 *)(param_1 + 0x34) = 1;
*(s32 *)(param_1 + 0x1c) = 0x20;
iVar2 = rand();
nVar = iVar2 % 1024;
sVar2 = *(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12);
if (rand() & 1) {
uVar2 = sVar2 + nVar;
} else {
uVar2 = sVar2 - nVar;
}
}
goto MERGE_4E0;
}
case 1: {
s32 ptr0 = *(s32 *)(param_1 + 0x20);
s32 arg0 = *(s16 *)(ptr0 + 0x12);
s32 ret = func_8012B608(arg0, *(s32 *)(param_1 + 0xe0), 0x14);
s32 ptr1 = *(s32 *)(param_1 + 0x20);
s32 sum;
sum = *(u16 *)(ptr1 + 0x12) + ret;
__asm__ __volatile__("" : "=r"(sum) : "0"(sum)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus8)
ret = 0x1000 - sVar1;
*(s16 *)(ptr1 + 0x12) = sum;
if (ret < 0) {
ret = sVar1 - 0x1000;
}
ret = ret << 4;
ret = -ret;
{
s32 arg1 = ret - 0x4000;
__asm__ __volatile__("" : "=r"(arg1) : "0"(arg1)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus8)
func_8012B178(param_1, arg1);
}
iVar1 = func_8012CBA4(param_1);
if ((iVar1 & 0xff) == 0x1a) {
goto EXIT_808B4;
}
if ((iVar1 & 0x6000) != 0) {
goto MERGE_4E8;
}
}
MERGE_4C0:
func_8012ADE4((u8 *)param_1);
{
/* §17 pin: the merge-block pointer must land in $v1 so reload's
* scratch for the constant store takes $v0 (see .L8017F4C0). */
register s32 ptr2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus8)
ptr2 = *(s32 *)(param_1 + 0x20);
*(u16 *)(param_1 + 0x34) = 2;
uVar2 = *(s16 *)(ptr2 + 0x12) + 0x800;
}
MERGE_4E0:
*(s32 *)(param_1 + 0xe0) = uVar2;
goto TAIL_5D8;
MERGE_4E8:
if (func_8012BEE8(param_1) != 0) {
*(u16 *)(param_1 + 0x34) = 0;
*(s32 *)(param_1 + 0xe8) = 0x40;
}
goto TAIL_5D8;
case 2: {
s32 ptrA = *(s32 *)(param_1 + 0x20);
s32 arg1 = *(s32 *)(param_1 + 0xe0);
s32 arg0 = *(s16 *)(ptrA + 0x12);
s32 ret = func_8012B608(arg0, arg1, 0xa);
if (ret == 0) {
*(u16 *)(param_1 + 0x34) = 0;
}
{
s32 ptrB = *(s32 *)(param_1 + 0x20);
*(s16 *)(ptrB + 0x12) = *(u16 *)(ptrB + 0x12) + ret;
}
goto TAIL_5D8;
}
case 3:
iVar1 = func_8012CBA4(param_1);
if ((iVar1 & 0xff) != 0x1a) {
goto NOT_1A;
}
EXIT_808B4:
((void (*)(void *))func_80184580)((void *)param_1);
return;
NOT_1A:
if ((iVar1 & 0x2000) == 0) {
goto L8017F598;
}
func_8012B23C(param_1);
func_8012B178(param_1, 0xFFFD8000);
*(u16 *)(param_1 + 0x34) = 0;
goto TAIL_5D8;
L8017F598:
if ((*(s32 *)(param_1 + 0x1c) & 3) != 0) {
goto L8017F5B4;
}
func_80143B6C(param_1, 1);
L8017F5B4:
*(s32 *)(param_1 + 0x1c) += 1;
if (*(s32 *)(param_1 + 0x1c) < 0x3c) {
goto TAIL_5DC;
}
func_80131E00(param_1, 0xd);
}
TAIL_5D8:
TAIL_5DC:
if (func_8012BD3C(param_1, 0x400, 0x24000) == 1) {
*(s16 *)(param_1 + 2) = 3;
}
if (0x100000 < *(s32 *)(param_1 + 0x14)) {
*(s32 *)(param_1 + 0x14) = 0x100000;
}
*(s32 *)(param_1 + 0xe4) += 1;
}
@@ -0,0 +1,14 @@
g6b: verdict NO-MATCH start 34 best 13 compiles 335 path R7 do-while @7473 + R6 inline ret @7472
best-scoring single candidates of the last trace (move -> score [residual class]):
R6 inline ret @7472 -> 13 [COUNT] (from 31)
R6 inline arg1 @7479 -> 13 [COUNT] (from 13)
R8 temp tmp0 @7471 -> 13 [COUNT] (from 13)
R7 block @7491 -> 13 [COUNT] (from 13)
R5 swap + @7471 -> 13 [COUNT] (from 13)
R9 swap-stmts @7476 -> 13 [COUNT] (from 13)
R10 param-copy param_1 @7415 -> 13 [COUNT] (from 13)
R8 base tmp0 @7471 -> 13 [COUNT] (from 13)
R7 do-while @7491 -> 13 [COUNT] (from 13)
R9 swap-stmts @7496 -> 13 [COUNT] (from 13)
R12 width uVar2 s32->u8 @7413 -> 13 [COUNT] (from 13)
R6 inline ptr2 @7496 -> 13 [COUNT] (from 13)
@@ -0,0 +1,9 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: plumbing
// @stuck: none — signed s32 counter at 0x1C, delay-slot store is the unconditional bump
// @class: straight-derive
// @stuck: none — MATCH (52 ins) on iteration 1, confirmed by rtu_match.
// @class: structural (STRENGTH/mflo!=lw -> MATCH)
// @stuck: none - MATCH (41 ins), match_one + rtu_match.
// @class: regalloc (WIDTH/li!=addu -> MATCH)
// @stuck: none — MATCH (58 ins), match_one + rtu_match. PIN-FREE (no register __asm__).
@@ -0,0 +1,692 @@
=== lever-free bodies in ov_SC05_001 sharing a callee or global with func_80182FB4 (67 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80183508 (src/ov_SC05_001/ov_SC05_001_jr_80183508.c:2839) shares 6: func_8012B178 func_8012B23C func_8012CBA4 func_80131E00 func_80143B6C func_80184580 ---
void func_80183508(s32 param_1)
{
extern void func_80184580(void *a0);
extern s32 func_8012CBF4(s32 a0);
extern s32 func_8012CBA4(s32 a0);
extern s32 func_8012CBCC(s32 a0);
extern s32 func_8012D624(s32 a0, s32 a1, s32 a2);
extern void func_8012B2CC(s32 a0);
extern void func_8012B178(s32 a0, s32 a1);
extern void func_8012B23C(s32 a0);
extern s32 func_80143B6C(s32 a0, s32 a1);
extern void func_80131E00(s32 a0, s32 a1);
extern u16 D_80126B96;
extern s16 D_80126B9A;
s32 iVar1;
s16 cond;
if (*(s16 *)(param_1 + 0xa) >= 0x10) {
func_80184580((void *)param_1);
return;
}
switch (*(u16 *)(param_1 + 0x34)) {
case 0:
iVar1 = func_8012CBF4(param_1);
if ((iVar1 & 0xff) == 0x1a) {
goto EXIT_808B4;
}
if ((iVar1 & 0x4000) != 0) {
goto STATE4;
}
if (func_8012D624(param_1, 0x20, 5) == 1) {
D_80126B96 = 0x11;
D_80126B9A = *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12);
*(s32 *)(param_1 + 0x48) = 0x18000;
*(u16 *)(param_1 + 0x34) += 1;
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x10) =
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x10) + 0x800;
func_8012B2CC(param_1);
func_8012B178(param_1, 0xFFF00000);
goto TAIL;
}
if (*(s32 *)(param_1 + 0x14) < 0) {
/* the barrier keeps [0xa] live across the [0xfe] load so local-alloc
* hands it $v0 (see the header note); without it the two lh regs swap. */
s32 ta = *(s16 *)(param_1 + 0xa);
cond = ta < *(s16 *)(param_1 + 0xfe);
} else {
cond = *(s16 *)(param_1 + 0xa) > *(s16 *)(param_1 + 0xfe);
}
if (cond) {
*(s32 *)(param_1 + 0x48) = 0x18000;
*(u16 *)(param_1 + 0x34) += 1;
}
*(s32 *)(param_1 + 0x1c) += 1;
goto TAIL;
case 1:
iVar1 = func_8012CBF4(param_1);
if ((iVar1 & 0xff) == 0x1a) {
goto EXIT_808B4;
}
if ((iVar1 & 0x2000) != 0) {
*(u16 *)(param_1 + 0x34) += 1;
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x10) = 0;
*(s32 *)(param_1 + 0x1c) = 0;
goto TAIL;
}
if ((iVar1 & 0x4000) == 0) {
goto L_B88;
}
goto STATE4;
case 2:
*(s32 *)(param_1 + 0x10) = *(s32 *)(param_1 + 0x10) * 15 / 16;
*(s32 *)(param_1 + 0x18) = *(s32 *)(param_1 + 0x18) * 15 / 16;
iVar1 = func_8012CBA4(param_1);
if ((iVar1 & 0xff) == 0x1a) {
goto EXIT_808B4;
}
if ((iVar1 & 0x6000) == 0) {
*(s32 *)(param_1 + 0x1c) = 0;
*(u16 *)(param_1 + 0x34) += 1;
goto TAIL;
}
if (*(s32 *)(param_1 + 0x1c) % 3 == 0) {
func_80143B6C(param_1, 1);
}
*(s32 *)(param_1 + 0x1c) += 1;
if (*(s32 *)(param_1 + 0x1c) < 0x10) {
goto TAIL;
}
goto SET_HIT;
case 3:
iVar1 = func_8012CBCC(param_1);
if ((iVar1 & 0xff) == 0x1a) {
goto EXIT_808B4;
}
if ((iVar1 & 0x4000) == 0) {
goto L_AF8;
}
STATE4:
func_8012B23C(param_1);
*(u16 *)(param_1 + 0x34) = 4;
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x10) = 0;
goto TAIL;
L_AF8:
if ((iVar1 & 0x2000) == 0) {
goto L_B88;
}
*(s16 *)(param_1 + 2) = 1;
func_80143B6C(param_1, 1);
goto TAIL;
case 4:
if (*(s32 *)(param_1 + 0x1c) % 3 == 0) {
func_80143B6C(param_1, 1);
}
iVar1 = func_8012CBA4(param_1);
if ((iVar1 & 0xff) != 0x1a) {
goto L_B78;
}
EXIT_808B4:
func_80184580((void *)param_1);
return;
L_B78:
if ((iVar1 & 0x2000) == 0) {
goto L_B88;
}
SET_HIT:
*(s16 *)(param_1 + 2) = 1;
goto TAIL;
L_B88:
*(s32 *)(param_1 + 0x1c) += 1;
if (*(s32 *)(param_1 + 0x1c) >= 0x3c) {
func_80131E00(param_1, 0xd);
}
}
TAIL:
if (0x100000 < *(s32 *)(param_1 + 0x14)) {
*(s32 *)(param_1 + 0x14) = 0x100000;
}
}
--- func_8018330C (src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c:7576) shares 5: func_8004787C func_8012ADE4 func_8012B178 func_8012CBA4 func_80184580 ---
void func_8018330C(s32 param_1)
{
extern void func_80184580(s32 a0);
extern s32 func_8012BDBC(s32 a0, s32 a1);
extern void func_8012B178(s32 a0, s32 a1);
extern s32 func_8012CBA4(s32 a0);
extern void func_8012ADE4(u8 *a0);
s32 dist;
s32 angle;
s32 iVar1;
s32 a1;
if (*(s16 *)(param_1 + 0xa) >= 0x10) {
func_80184580(param_1);
goto end;
}
dist = func_8012BCCC(param_1);
if (func_8012BDBC(param_1, 0x400) == 0) {
*(s16 *)(param_1 + 2) = 1;
goto end;
}
if (dist > 0x24000) {
*(s16 *)(param_1 + 2) = 1;
goto end;
}
if (dist < 0x4001) {
*(s16 *)(param_1 + 2) = 4;
goto end;
}
angle = func_8004787C((*(s32 *)(param_1 + 0xe4) << 7) & 0x780);
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x1a) = (angle >> 1) + 0x800;
iVar1 = func_8012B8E4(param_1, 0xa);
{
s32 ptr = *(s32 *)(param_1 + 0x20);
s32 v = *(u16 *)(ptr + 0x12) + iVar1;
*(u16 *)(ptr + 0x12) = v;
if (0x1000 - angle >= 0) {
a1 = 0xFFFF0000 - ((0x1000 - angle) << 7);
} else {
a1 = 0xFFFF0000 - ((angle - 0x1000) << 7);
}
}
func_8012B178(param_1, a1);
iVar1 = func_8012CBA4(param_1);
if ((iVar1 & 0x6000) == 0) {
func_8012ADE4((u8 *)param_1);
}
*(s32 *)(param_1 + 0xe4) += 1;
end:
return;
}
--- func_801840AC (src/ov_SC05_001/ov_SC05_001_jr_80183508.c:3420) shares 5: func_8012B23C func_8012CBA4 func_80131E00 func_80143B6C func_80184580 ---
void func_801840AC(s32 param_1) {
extern void func_80184580(s32);
extern s32 func_8018466C();
extern void func_8012DBD0(s32 a0, s32 a1, s32 a2, s32 a3);
extern s32 func_8012CC64(s32 a0, void *a1);
extern s32 func_8012CC1C(s32 a0, void *a1);
extern s32 func_8012CBA4(s32 a0);
extern void func_8012B23C(s32 a0);
extern void func_80131C78(s32 a0);
extern s32 func_80143B6C(s32 a0, s32 a1);
extern void func_80131E00(s32 a0, s32 a1);
extern s32 D_801AE3A8;
u8 bVar1;
s32 uVar3;
s32 pad[2];
if (0xf < *(s16 *)(param_1 + 0xa)) {
((void (*)(void *))func_80184580)((void *)param_1);
return;
}
if ((*(s32 *)(param_1 + 0x10) != 0) || (*(s32 *)(param_1 + 0x18) != 0)) {
func_8012DBD0(param_1, 0x50,
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12) + 0x800, 0x1D);
}
bVar1 = *(u8 *)(param_1 + 0xc2);
switch (bVar1) {
case 0:
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x10) -= 0x100;
*(s32 *)(param_1 + 0x1c) += 1;
if (0x28 < *(s32 *)(param_1 + 0x1c)) {
goto LAB_80180730;
}
uVar3 = func_8012CC64(param_1, &D_801AE3A8);
if ((uVar3 & 0x4000) != 0) {
goto LAB_80180644;
}
if ((uVar3 & 0x2000) != 0) {
if ((uVar3 & 0xff) == 0x1a) {
goto LAB_8018066C;
}
*(u8 *)(param_1 + 0xc2) = 2;
func_80143B6C(param_1, 1);
*(s32 *)(param_1 + 0x14) = 0xFFF30000;
*(s32 *)(param_1 + 0x1c) = 0;
}
goto LAB_80180740;
case 2: {
s32 saved14;
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x10) -= 0x100;
*(s32 *)(param_1 + 0x1c) += 1;
if (0x28 < *(s32 *)(param_1 + 0x1c)) {
goto LAB_80180730;
}
saved14 = *(s32 *)(param_1 + 0x14);
uVar3 = func_8012CC64(param_1, &D_801AE3A8);
if ((uVar3 & 0x4000) != 0) {
goto LAB_80180644;
}
if ((uVar3 & 0x2000) != 0) {
if ((uVar3 & 0xff) == 0x1a) {
goto LAB_8018066C;
}
func_80143B6C(param_1, 1);
*(s32 *)(param_1 + 0x14) = saved14;
*(u8 *)(param_1 + 0xc2) = 3;
*(s32 *)(param_1 + 0x1c) = 0;
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x10) = 0;
}
goto LAB_80180740;
}
case 3:
*(s32 *)(param_1 + 0x10) = *(s32 *)(param_1 + 0x10) * 15 / 16;
*(s32 *)(param_1 + 0x18) = *(s32 *)(param_1 + 0x18) * 15 / 16;
if ((*(u8 *)(param_1 + 0xc3) & 1) == 0) {
goto CASE3_CC64;
}
uVar3 = func_8012CC1C(param_1, &D_801AE3A8);
if ((uVar3 & 0x6000) != 0) {
goto CASE3_TAIL;
}
goto LAB_80180730;
CASE3_CC64:
uVar3 = func_8012CC64(param_1, &D_801AE3A8);
if ((uVar3 & 0x4000) == 0) {
goto CASE3_NO4000;
}
LAB_80180644:
func_8012B23C(param_1);
*(u8 *)(param_1 + 0xc2) = 4;
goto LAB_80180740;
CASE3_NO4000:
if ((uVar3 & 0x2000) == 0) {
goto CASE3_TAIL;
}
if ((uVar3 & 0xff) != 0x1a) {
goto CASE3_SETFLAG;
}
LAB_8018066C:
((void (*)(void *))func_80184580)((void *)param_1);
return;
CASE3_SETFLAG:
*(u8 *)(param_1 + 0xc3) = *(u8 *)(param_1 + 0xc3) | 1;
CASE3_TAIL:
if ((*(u32 *)(param_1 + 0x1c) & 3) == 3) {
func_80143B6C(param_1, 1);
}
*(s32 *)(param_1 + 0x1c) += 1;
if (*(s32 *)(param_1 + 0x1c) < 0x11) {
goto LAB_80180740;
}
if ((uVar3 & 0x6000) == 0) {
goto LAB_80180730;
}
goto CASE34_TAIL;
case 4:
uVar3 = func_8012CBA4(param_1);
if ((uVar3 & 0x2000) == 0) {
goto CASE4_COUNTER;
}
CASE34_TAIL:
func_80131C78(param_1);
goto LAB_80180740;
CASE4_COUNTER:
if ((*(u32 *)(param_1 + 0x1c) & 3) == 3) {
func_80143B6C(param_1, 1);
}
*(s32 *)(param_1 + 0x1c) += 1;
if (*(s32 *)(param_1 + 0x1c) < 0x3d) {
goto LAB_80180740;
}
goto LAB_80180730;
default:
goto LAB_80180740;
}
LAB_80180730:
func_80131E00(param_1, 0xd);
return;
LAB_80180740:
func_8018466C(param_1);
return;
}
--- func_80181AE0 (src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c:6398) shares 4: func_8012B178 func_8012B608 func_8012BD3C func_8012BEE8 ---
void func_80181AE0(s32 a0) {
s32 r;
if (func_8012BD3C(a0, 0x400, 0x20000) == 1) {
if (func_8012BCCC(a0) < 0x3001) {
*(s16 *)(a0 + 2) = 8;
} else {
r = func_8012B8E4(a0, 8);
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += r;
func_8012B178(a0, *(s32 *)(a0 + 0xE8));
((s32 (*)(s32, s32))func_80182BAC)(a0, 0);
if (func_801829B0(a0) != 0 && func_8012BEE8(a0) != 0) {
((s32 (*)(s32))func_80182908)(a0);
}
}
} else {
r = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), *(s32 *)(a0 + 0xE0), 0xA);
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += r;
func_8012B178(a0, *(s32 *)(a0 + 0xE8));
((s32 (*)(s32, s32))func_80182BAC)(a0, 0);
if (func_801829B0(a0) != 0 && func_8012BEE8(a0) != 0) {
((s32 (*)(s32))func_80182908)(a0);
}
}
}
--- func_80131340 (src/ov_SC05_001/ov_SC05_001_jr_8012ACE0.c:1432) shares 4: func_8012B23C func_8012CBA4 func_80131E00 func_80143B6C ---
void func_80131340(s32 a0)
{
/* 8-byte, align-2 vector: align < 4 is what makes the assignments unaligned
* (lwl/lwr + swl/swr) block moves. Block-scope so the body stays self-contained
* for the dedup_propagate lift (§28-#1) and cannot collide with the TU's `M8`. */
struct V8 {
u16 vx, vy, vz, pad;
};
extern struct V8 D_80185F20;
/* BLOCK-scope, mirroring the already-matched func_801312D0's decl at TU L1619: the
* later DEFINE_func_80131AC8() (TU L1964, AFTER this slot) redeclares func_80131CF4
* with the stale 1-arg engine_core canonical. A file-scope `extern int
* func_80131CF4(int,int);` here is a HARD `conflicting types` against it (cc1 rc=33,
* measured); block-scope goes out of scope before that macro and compiles clean. */
extern int func_80131CF4(int, int);
struct V8 sp10;
struct V8 sp18;
struct V8 sp20;
struct V8 sp28;
s32 temp;
s32 var_a1;
if (*(s16 *)(a0 + 0xA) >= 0x10) {
func_801319E0(a0);
return;
}
temp = func_80131CF4(*(s32 *)(a0 + 0xBC), 0x2E);
if (temp != 0) {
sp10.vz = 0;
sp10.vx = 0;
sp10.vy = temp;
} else {
sp10 = D_80185F20;
}
if (*(s32 *)(a0 + 0x10) != 0 || *(s32 *)(a0 + 0x18) != 0) {
var_a1 = func_80131CF4(*(s32 *)(a0 + 0xBC), 0x19);
if (var_a1 == 0) {
var_a1 = 0x50;
}
func_8012DBD0(a0, var_a1,
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12) + 0x800, 0x1D);
}
switch (*(u8 *)(a0 + 0xC2)) {
case 0:
case 1:
if (*(s32 *)(a0 + 0xC4) & 4) {
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) -= 0x100;
}
*(s32 *)(a0 + 0x1C) += 1;
if (*(s32 *)(a0 + 0x1C) >= 0x3D) {
func_80131E00(a0, 0xD);
return;
}
if (*(u8 *)(a0 + 0xC2) == 0) {
*(u8 *)(a0 + 0xC2) = 1;
sp18.vx = *(u16 *)(a0 + 0x3A);
sp18.vy = *(u16 *)(a0 + 0x3E);
sp18.vz = *(u16 *)(a0 + 0x42);
sp20 = sp18;
sp20.vx += sp10.vx;
sp20.vy += sp10.vy;
sp20.vz += sp10.vz;
sp28 = sp20; /* load-bearing dead aggregate copy — gcc-2.7.2 has no aggregate DSE */
func_8012CEB0((s32)&sp18, (s32)&sp20, 1);
sp20.vx -= sp10.vx;
sp20.vy -= sp10.vy;
sp20.vz -= sp10.vz;
*(u16 *)(a0 + 0x3A) = sp20.vx;
*(u16 *)(a0 + 0x3E) = sp20.vy;
*(u16 *)(a0 + 0x42) = sp20.vz;
*(u16 *)(a0 + 0x6) = sp20.vx;
*(u16 *)(a0 + 0xA) = sp20.vy;
*(u16 *)(a0 + 0xE) = sp20.vz;
}
D_801B4890 = ((s32 (*)(s32, s32))func_8012CC64)(a0, (s32)&sp10);
if (D_801B4890 & 0x8000) {
*(s32 *)(a0 + 0x18) = 0;
*(s32 *)(a0 + 0x10) = 0;
}
if (D_801B4890 & 0x4000) {
func_8012B23C(a0);
*(u8 *)(a0 + 0xC2) = 4;
} else if (D_801B4890 & 0x2000) {
if (func_80131D68(a0, D_801B4890) == 1) {
return;
}
*(u8 *)(a0 + 0xC2) = 2;
func_80143B6C(a0, 1);
*(s32 *)(a0 + 0x14) = 0xFFF30000;
*(s32 *)(a0 + 0x1C) = 0;
} else if (D_801B4890 & 0x8000) {
*(u8 *)(a0 + 0xC2) = 2;
*(s32 *)(a0 + 0x1C) = 0;
*(s32 *)(a0 + 0x18) = 0;
*(s32 *)(a0 + 0x10) = 0;
}
break;
case 2:
if (*(s32 *)(a0 + 0xC4) & 4) {
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) -= 0x100;
}
*(s32 *)(a0 + 0x1C) += 1;
if (*(s32 *)(a0 + 0x1C) >= 0x3D) {
func_80131E00(a0, 0xD);
return;
}
D_801B4894 = *(s32 *)(a0 + 0x14);
D_801B4890 = ((s32 (*)(s32, s32))func_8012CC64)(a0, (s32)&sp10);
if (D_801B4890 & 0x8000) {
*(s32 *)(a0 + 0x18) = 0;
*(s32 *)(a0 + 0x10) = 0;
}
if (D_801B4890 & 0x4000) {
func_8012B23C(a0);
*(u8 *)(a0 + 0xC2) = 4;
} else if (D_801B4890 & 0x2000) {
if (func_80131D68(a0, D_801B4890) == 1) {
return;
}
func_80143B6C(a0, 1);
/* MUST precede the 0x1C/0xC2 stores — see the header note on the /3 block. */
*(s32 *)(a0 + 0x14) = (-D_801B4894) / 3;
*(s32 *)(a0 + 0x1C) = 0;
*(u8 *)(a0 + 0xC2) = 3;
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) = 0;
} else if (D_801B4890 & 0x8000) {
*(u8 *)(a0 + 0xC2) = 3;
*(s32 *)(a0 + 0x1C) = 0;
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) = 0;
*(s32 *)(a0 + 0x18) = 0;
*(s32 *)(a0 + 0x10) = 0;
}
break;
case 3:
*(s32 *)(a0 + 0x10) = *(s32 *)(a0 + 0x10) * 15 / 16;
*(s32 *)(a0 + 0x18) = *(s32 *)(a0 + 0x18) * 15 / 16;
if (*(u8 *)(a0 + 0xC3) & 1) {
D_801B4890 = ((s32 (*)(s32))func_8012CBA4)(a0);
if (D_801B4890 & 0x8000) {
*(s32 *)(a0 + 0x18) = 0;
*(s32 *)(a0 + 0x10) = 0;
}
if (func_80131D68(a0, D_801B4890) == 1) {
return;
}
if (!(D_801B4890 & 0x6000)) {
func_80131E00(a0, 0xD);
return;
}
} else {
D_801B4890 = ((s32 (*)(s32))func_8012CBF4)(a0);
if (D_801B4890 & 0x8000) {
*(s32 *)(a0 + 0x18) = 0;
*(s32 *)(a0 + 0x10) = 0;
}
if (D_801B4890 & 0x4000) {
func_8012B23C(a0);
*(u8 *)(a0 + 0xC2) = 4;
break;
} else if (D_801B4890 & 0x2000) {
if (func_80131D68(a0, D_801B4890) == 1) {
return;
}
*(u8 *)(a0 + 0xC3) |= 1;
} else if (D_801B4890 & 0x8000) {
*(s32 *)(a0 + 0x18) = 0;
*(s32 *)(a0 + 0x10) = 0;
}
}
if ((*(s32 *)(a0 + 0x1C) & 3) == 3) {
func_80143B6C(a0, 1);
}
*(s32 *)(a0 + 0x1C) += 1;
if (*(s32 *)(a0 + 0x1C) < 0x11) {
break;
}
if (!(D_801B4890 & 0x6000)) {
func_80131E00(a0, 0xD);
return;
}
/* polarity MUST match case 4's — see the cross-jump note in the header. */
if (*(s16 *)(a0 + 0x76) <= 0) {
func_80131E00(a0, 6);
} else {
func_80131C78(a0);
}
break;
case 4:
D_801B4890 = ((s32 (*)(s32))func_8012CBA4)(a0);
if (D_801B4890 & 0x8000) {
*(s32 *)(a0 + 0x18) = 0;
*(s32 *)(a0 + 0x10) = 0;
}
if (D_801B4890 & 0x2000) {
if (func_80131D68(a0, D_801B4890) == 1) {
return;
}
if (*(s16 *)(a0 + 0x76) <= 0) {
func_80131E00(a0, 6);
} else {
func_80131C78(a0);
}
} else {
if ((*(s32 *)(a0 + 0x1C) & 3) == 3) {
func_80143B6C(a0, 1);
}
*(s32 *)(a0 + 0x1C) += 1;
if (*(s32 *)(a0 + 0x1C) >= 0x3D) {
func_80131E00(a0, 0xD);
return;
}
}
break;
}
func_80131CA8(a0, 0x2F);
}
--- func_801829B0 (src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c:7129) shares 3: func_8012ADE4 func_8012CBA4 func_80131E00 ---
s32 func_801829B0(s32 arg0) {
/* [T51] scoped in from file scope: a file-scope decl of these symbols constrains
every LATER function in this TU, which blocks a byte-true decl of a different
type. Declaration-only move (cookbook §103). */
extern u8 D_801202A0[];
extern s32 func_8012CBA4(s32 a0); /* TU spelling, :5685 */
extern void func_80131E00(s32 a0, s32 a1); /* TU spelling, :5692 */
extern void func_8012ADE4(u8 *a0); /* TU spelling, :5688 */
extern void func_80182CE8(); /* TU spelling, :5107 */
extern s32 func_8012BC60(struct Vec *a0, struct Vec *a1); /* sibling-TU house form */
extern s32 func_8012B6D4(s16 *a0, s16 *a1);
extern void func_8012B0B4(u32 *a0, s32 a1, s32 a2);
extern s32 func_8012CEB0(s32 a0, s32 a1, s32 a2);
SVEC_29B0 in;
SVEC_29B0 out;
SVEC_29B0 buf;
s32 v;
s32 d;
s32 i;
u8 *p;
u16 px, pz;
u32 *bp;
v = func_8012CBA4(arg0);
if ((v & 0xFF) == 2) {
func_80131E00(arg0, 0x12);
return 0;
}
if ((v & 0xFF) == 0x1A) {
func_80182CE8(arg0);
return 0;
lose:
func_8012ADE4((u8 *)arg0);
return 1;
}
if ((v & 0x2000) == 0) {
func_8012ADE4((u8 *)arg0);
}
*(s32 *)(arg0 + 0xDC) &= ~0x40;
if (*(s32 *)(arg0 + 0x14) > 0xFFFFF) {
*(s32 *)(arg0 + 0x14) = 0x100000;
}
p = D_801202A0;
for (i = 0; i < 0x60; i++, p += 0x10C) {
if (*(u16 *)p != 0 && *(s32 *)(p + 0x58) != 0 && arg0 != (s32)p) {
if (((s32 (*)(s32, s32))func_8012BC60)(arg0 + 4, (s32)(p + 4)) < 0x2400) {
bp = (u32 *)&buf;
func_8012B0B4(bp,
func_8012B6D4((s16 *)(arg0 + 4), (s16 *)(p + 4)), 0x61);
d = *(s32 *)&buf;
px = *(u16 *)(p + 6);
out.vx = px;
out.vy = *(u16 *)(p + 0xA);
pz = *(u16 *)(p + 0xE);
out.vz = pz;
out.vx = px + d;
out.vz = pz + (d >> 16);
in.vx = *(u16 *)(arg0 + 0x3A);
in.vy = *(u16 *)(arg0 + 0x3E);
in.vz = *(u16 *)(arg0 + 0x42);
if ((func_8012CEB0((s32)&in, (s32)&out, 0) & 0x2000) == 0) {
goto lose;
}
*(s16 *)(arg0 + 6) = out.vx;
*(s16 *)(arg0 + 0xA) = out.vy;
*(s16 *)(arg0 + 0xE) = out.vz;
break;
}
}
}
return 1;
}
@@ -0,0 +1,55 @@
src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c:func_80182FB4: score 34 (COUNT; mine 212 ins, target 214) — not yet
register pairs (mine -> target, count): a1->a0 x2, v0->v1 x2, v1->v0 x2
replace mine[13:14] target[13:14]
13 j 742c <func_80182FB4+0x334> | j 7434 <func_80182FB4+0x33c>
replace mine[33:34] target[33:34]
33 j 73e4 <func_80182FB4+0x2ec> | j 73ec <func_80182FB4+0x2f4>
replace mine[36:37] target[36:37]
36 beq v1,v0,730c <func_80182FB4+0x214> | beq v1,v0,7314 <func_80182FB4+0x21c>
replace mine[38:39] target[38:39]
38 beq v1,v0,734c <func_80182FB4+0x254> | beq v1,v0,7354 <func_80182FB4+0x25c>
replace mine[40:41] target[40:41]
40 j 73e4 <func_80182FB4+0x2ec> | j 73ec <func_80182FB4+0x2f4>
replace mine[59:60] target[59:60]
59 beq v1,v0,7368 <func_80182FB4+0x270> | beq v1,v0,7370 <func_80182FB4+0x278>
replace mine[61:62] target[61:62]
61 beqz v0,72c8 <func_80182FB4+0x1d0> | beqz v0,72d0 <func_80182FB4+0x1d8>
replace mine[66:67] target[66:67]
66 bnez v0,73e0 <func_80182FB4+0x2e8> | bnez v0,73e8 <func_80182FB4+0x2f0>
replace mine[85:86] target[85:86]
85 bnez v0,72e8 <func_80182FB4+0x1f0> | bnez v0,72f0 <func_80182FB4+0x1f8>
replace mine[87:88] target[87:88]
87 j 72e8 <func_80182FB4+0x1f0> | j 72f0 <func_80182FB4+0x1f8>
replace mine[94:98] target[94:98]
94 lw a1,32(s0) | lw a0,32(s0)
95 li a0,4096 | nop
96 lhu v1,18(a1) | lhu v1,18(a0)
97 subu a2,a0,s1 | nop
replace mine[99:104] target[99:108]
99 bgez a2,7290 <func_80182FB4+0x198> | li v0,4096
100 sh v1,18(a1) | subu v0,v0,s1
101 addiu a2,s1,-4096 | bgez v0,7298 <func_80182FB4+0x1a0>
102 sll a2,a2,0x4 | sh v1,18(a0)
103 negu a2,a2 | addiu v0,s1,-4096
104 -- | sll v0,v0,0x4
105 -- | negu v0,v0
106 -- | addiu a1,v0,-16384
107 -- | jal 0 <func_8017BEBC>
delete mine[105:107] target[109:109]
105 jal 0 <func_8017BEBC> | --
106 addiu a1,a2,-16384 | --
replace mine[118:122] target[120:124]
118 lw v0,32(s0) | lw v1,32(s0)
119 li v1,2 | li v0,2
120 sh v1,52(s0) | sh v0,52(s0)
121 lh v0,18(v0) | lh v0,18(v1)
replace mine[124:125] target[126:127]
124 j 73e0 <func_80182FB4+0x2e8> | j 73e8 <func_80182FB4+0x2f0>
replace mine[131:132] target[133:134]
131 j 73e0 <func_80182FB4+0x2e8> | j 73e8 <func_80182FB4+0x2f0>
replace mine[147:148] target[149:150]
147 j 73e0 <func_80182FB4+0x2e8> | j 73e8 <func_80182FB4+0x2f0>
replace mine[158:159] target[160:161]
158 j 742c <func_80182FB4+0x334> | j 7434 <func_80182FB4+0x33c>
replace mine[168:169] target[170:171]
168 j 73e0 <func_80182FB4+0x2e8> | j 73e8 <func_80182FB4+0x2f0>
@@ -0,0 +1,3 @@
NEEDED launder line 7573
NEEDED launder line 7583
NEEDED pin $3 line 7599
@@ -0,0 +1,2 @@
src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c
func_80182FB4
@@ -0,0 +1,101 @@
void func_80183884(s32 a0) {
extern u8 D_801A71A4[];
/* §137/K3+K5: unpinned, the a0-copy allocno (R=37/L=137, pri 13503) is
* ranked first and first-fits $s0, pushing `tbl` to $s1 — a clean 2-reg
* perm no source reordering can flip (pri(tbl) = 394). Pinning `tbl` to
* $16 makes $s0 "already dirty" in find_reg pass 0: the a0 copy conflicts
* with it and opens $s1, and case 3's `d` (which does NOT conflict with
* `tbl`) grabs $s0 in pass 0 — exactly the target's assignment. */
s32 tbl;
s32 ns;
tbl = (s32)D_801A71A4;
func_8012B1B4(a0, tbl);
func_8012CBCC(a0);
switch (*(u16 *)(a0 + 0x34)) {
case 0:
if (func_80182F4C(a0, 0x48) != 0 ||
((s32(*)(s32, u16 *))func_8012BE98)(a0, (u16 *)(a0 + 0x88)) >
0x3FFFF) {
s32 r = func_8012B608(
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12),
func_8012B744((void *)(a0 + 4), (void *)(a0 + 0x88)), 8);
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + r;
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) & 0xFFF;
func_8012B1B4(a0, tbl);
} else {
goto set1;
}
break;
case 1:
if (func_80182F4C(a0, 0x48) == 0 &&
((s32(*)(s32, u16 *))func_8012BE98)(a0, (u16 *)(a0 + 0x88)) <=
0x3FFFF) {
break;
}
goto st2;
case 2: {
s32 r = func_8012B608(
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12),
func_8012B744((void *)(a0 + 4), (void *)(a0 + 0x88)), 0x10);
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + r;
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) & 0xFFF;
}
func_80182F4C(a0, 0x48);
{
s16 c = *(s16 *)(a0 + 0x102);
if (c == 0) {
ns = 3;
goto setstate;
}
*(s16 *)(a0 + 0x102) = c - 1;
}
break;
case 3: {
void *p88 = (void *)(a0 + 0x88);
s32 d = ((s32(*)(s32, u16 *))func_8012BE98)(a0, (u16 *)p88);
if (func_80182F4C(a0, 0x48) == 0) {
if (d > 0x40000) {
s32 r = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12),
func_8012B744((void *)(a0 + 4), p88), 1);
if (r >= -0xFF && r <= 0xFF) {
break;
}
} else {
goto set1;
}
}
}
/* fall through into st2 */
st2:
*(u16 *)(a0 + 0x34) = 2;
*(u16 *)(a0 + 0x102) = (rand() & 7) + 8;
break;
set1:
ns = 1;
setstate:
*(u16 *)(a0 + 0x34) = ns;
break;
}
{
s16 t = *(s16 *)(a0 + 0x100);
if (t != 0) {
*(s16 *)(a0 + 0x100) = t - 1;
} else if (((s32(*)(s32))func_8012BE54)(a0) <= 0x24000) {
*(s16 *)(a0 + 0x2) = 5;
*(s16 *)(a0 + 0x100) = 0x3C;
}
}
}
@@ -0,0 +1 @@
UNSTRIPPABLE [('pin', 8375, 'token mismatch at src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:8375: expected `register`')]
+64 -64
View File
@@ -53,7 +53,7 @@
},
"kinds": {
"asm-body/direct": 13,
"barrier/direct": 359,
"barrier/direct": 345,
"barrier/via-macro": 2,
"gte-lever/direct": 362,
"gte-lever/via-macro": 94,
@@ -63,7 +63,7 @@
"instruction/direct": 210,
"instruction/via-macro": 22,
"keepalive/direct": 349,
"launder/direct": 714,
"launder/direct": 707,
"launder/via-macro": 42,
"verbatim-body/direct": 2682
}
@@ -72,15 +72,15 @@
"cfake_markers": {
"count": 13,
"sample": [
"src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c:10089",
"src/ov_SC04_005/ov_SC04_005_jr_8017BEBC.c:9325",
"src/ov_SC04_005/ov_SC04_005_jr_8017BEBC.c:9323",
"src/ov_SC04_007/ov_SC04_007_jr_8017BEBC.c:6630",
"src/md_SC07_003/md_SC07_003.c:3577",
"src/md_SC07_004/md_SC07_004.c:280",
"src/ov_SC01_009/ov_SC01_009_jr_8017E590.c:4271",
"src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:5178",
"src/ov_SC02_028/ov_SC02_028_jr_8017D898.c:5475",
"src/ov_SC02_041/ov_SC02_041_jr_8017BEBC.c:7554",
"src/ov_SC04_007/ov_SC04_007_jr_8017BEBC.c:6638",
"src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c:10089",
"src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c:5814",
"src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c:4815",
"src/ov_SC05_005/ov_SC05_005_jr_8017D898.c:4026",
@@ -89,36 +89,36 @@
},
"classes": {
"A": {
"bodies": 1622,
"distinct_bodies": 745,
"bodies": 1592,
"distinct_bodies": 733,
"file_scope": 0,
"in_bodies": 2565,
"in_bodies": 2515,
"kinds": {
"pin": 2565
"pin": 2515
},
"marked": 2565,
"sites": 2565,
"tus": 1106,
"marked": 2515,
"sites": 2515,
"tus": 1102,
"unmarked": 0
},
"B": {
"bodies": 4769,
"distinct_bodies": 813,
"bodies": 4762,
"distinct_bodies": 810,
"file_scope": 13,
"in_bodies": 11435,
"in_bodies": 11414,
"kinds": {
"asm-body": 13,
"barrier": 361,
"barrier": 347,
"gte": 6328,
"gte-lever": 456,
"gte-unsigned": 271,
"instruction": 232,
"keepalive": 349,
"launder": 756,
"launder": 749,
"verbatim-body": 2682
},
"marked": 2657,
"sites": 11448,
"marked": 2636,
"sites": 11427,
"tus": 1432,
"unmarked": 8791
},
@@ -224,9 +224,9 @@
"coverage": {
"asm": {
"comment_dead": 6782,
"live": 15667,
"live": 15596,
"macro_block": 194,
"raw": 22643
"raw": 22572
},
"attribute": {
"comment_dead": 0,
@@ -242,9 +242,9 @@
},
"register": {
"comment_dead": 8570,
"live": 2615,
"live": 2565,
"macro_block": 18,
"raw": 11203
"raw": 11153
},
"volatile": {
"comment_dead": 2607,
@@ -254,7 +254,7 @@
}
},
"coverage_ok": true,
"elapsed_s": 32.0,
"elapsed_s": 31.8,
"generated": "2026-09-10",
"gte_levers": {
"direct": 362,
@@ -265,15 +265,15 @@
"via_macro": 94,
"what": "GTE ops whose clobbers exceed the canonical macro's (a scheduling steer): class-B levers INSIDE the headline number since T5 (2026-09-09), marked, 0 at the close"
},
"head": "13069c142",
"head": "1d42fff3c",
"headers": 3181,
"levers_AB": {
"asm": 2167,
"bodies": 2373,
"distinct_bodies": 1011,
"marked": 4732,
"pins": 2565,
"sites": 4732,
"asm": 2146,
"bodies": 2336,
"distinct_bodies": 996,
"marked": 4661,
"pins": 2515,
"sites": 4661,
"unmarked": 0,
"what": "register pins + asm statements excluding GTE ops: the classes the phase drives to 0"
},
@@ -322,6 +322,16 @@
3,
1
],
[
"gte_SetTransMatrix_m",
2,
1
],
[
"gte_rtv0tr_m",
2,
1
],
[
"XFER",
2,
@@ -333,13 +343,13 @@
1
],
[
"gte_rtv0tr_m",
2,
"COPY_TO_FAAC",
1,
1
],
[
"gte_SetTransMatrix_m",
2,
"F14C",
1,
1
],
[
@@ -357,11 +367,6 @@
1,
1
],
[
"COPY_TO_FAAC",
1,
1
],
[
"LAUNDER_8018A180",
1,
@@ -377,11 +382,6 @@
1,
1
],
[
"F14C",
1,
1
],
[
"ENGINE_SHB",
1,
@@ -407,30 +407,30 @@
},
"pins": {
"bare_name": 15,
"init": 245,
"init": 241,
"registers": {
"$0": 76,
"$0": 72,
"$10": 10,
"$11": 5,
"$12": 9,
"$13": 6,
"$14": 5,
"$15": 1,
"$16": 123,
"$17": 53,
"$16": 116,
"$17": 49,
"$18": 35,
"$19": 30,
"$2": 878,
"$2": 863,
"$20": 8,
"$21": 6,
"$22": 7,
"$23": 10,
"$25": 1,
"$29": 13,
"$3": 215,
"$4": 527,
"$5": 391,
"$6": 67,
"$3": 214,
"$4": 516,
"$5": 387,
"$6": 63,
"$7": 27,
"$8": 25,
"$9": 22,
@@ -440,30 +440,30 @@
"v0": 2,
"v1": 3
},
"sites": 2565,
"sites": 2515,
"sp": 13,
"spelling": {
"__asm__": 2535,
"__asm__": 2485,
"asm": 30
},
"volatile_qualified": 0,
"zero": 76
"zero": 72
},
"src_stamp": "3c3eb3589516cc0d",
"src_stamp": "5fa7b60e9462bea9",
"tus": 4121,
"unclassified": 0,
"union_AD": {
"bodies": 6111,
"bodies": 6074,
"by_kind": {
"main": 163,
"md": 120,
"ov": 5649,
"ov": 5613,
"resident": 10,
"shared": 169
"shared": 168
},
"copies_in_multi": 4936,
"distinct_bodies": 1317,
"multi_copy_classes": 142
"copies_in_multi": 4904,
"distinct_bodies": 1302,
"multi_copy_classes": 132
},
"verbatim_excluded": {
"functions": 13,
+13 -13
View File
@@ -1,32 +1,32 @@
lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13)
coverage asm raw 22643 = live 15667 + macro-block 194 + comment/dead 6782
coverage register raw 11203 = live 2615 + macro-block 18 + comment/dead 8570
coverage asm raw 22572 = live 15596 + macro-block 194 + comment/dead 6782
coverage register raw 11153 = live 2565 + macro-block 18 + comment/dead 8570
coverage volatile raw 4389 = live 1700 + macro-block 82 + comment/dead 2607
coverage builtin raw 599 = live 445 + macro-block 0 + comment/dead 154
coverage attribute raw 76 = live 76 + macro-block 0 + comment/dead 0
class sites in-bodies file-scope bodies distinct TUs marked unmarked kinds
A pins 2565 2565 0 1622 745 1106 2565 0 {'pin': 2565}
B asm 11448 11435 13 4769 813 1432 2657 8791 {'barrier': 361, 'keepalive': 349, 'gte': 6328, 'launder': 756, 'asm-body': 13, 'gte-lever': 456, 'gte-unsigned': 271, 'instruction': 232, 'verbatim-body': 2682}
C volatile 1590 1438 152 496 95 610 14 1576 {'decl-file': 152, 'cast': 1378, 'decl-body': 58, 'param': 2}
A pins 2515 2515 0 1592 733 1102 2515 0 {'pin': 2515}
B asm 11427 11414 13 4762 810 1432 2636 8791 {'barrier': 347, 'launder': 749, 'gte-lever': 456, 'gte': 6328, 'keepalive': 349, 'gte-unsigned': 271, 'instruction': 232, 'asm-body': 13, 'verbatim-body': 2682}
C volatile 1590 1438 152 496 95 610 14 1576 {'cast': 1378, 'decl-body': 58, 'decl-file': 152, 'param': 2}
D register 50 50 0 47 47 6 0 50 {'register': 50}
E asm-label 7780 1357 6423 1089 153 2090 0 7780 {'asm-label': 7780}
F builtin 445 445 0 428 27 302 0 445 {'builtin': 445}
G attribute 76 1 75 1 1 40 0 76 {'attribute': 76}
UNION A–D: 6,111 bodies · 1,317 distinct (addresses normalized) · 142 multi-copy classes holding 4,936 bodies · by kind {'ov': 5649, 'main': 163, 'shared': 169, 'md': 120, 'resident': 10}
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 4,732 sites in 2,373 bodies (1,011 distinct) · marked !FAKE 4,732 · UNMARKED 0
UNION A–D: 6,074 bodies · 1,302 distinct (addresses normalized) · 132 multi-copy classes holding 4,904 bodies · by kind {'ov': 5613, 'main': 163, 'shared': 168, 'md': 120, 'resident': 10}
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 4,661 sites in 2,336 bodies (996 distinct) · marked !FAKE 4,661 · UNMARKED 0
orphan !FAKE markers (no pin/asm site on the line nor below): 0
marked ordinary-C fakes kept by Drew's S104 ruling (a) (`do { } while (0)`, dead initialisers; NOT levers): 13
GTE levers (clobbers beyond the canonical macro's): 456 sites (94 via a variant macro, 362 direct) · marked 456 · UNMARKED 0 · unsigned GTE statements 271
per-TU asm macro definitions outside the GTE header: 314 {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1} (GTE variants 64)
pins: 2,565 · $0 76 · $sp 13 · with initializer 245 · volatile-qualified 0 · bare-name 15 · spellings {'__asm__': 2535, 'asm': 30}
per-TU asm macro definitions outside the GTE header: 314 {'gte': 150, 'instruction': 9, 'barrier': 1, 'launder': 154} (GTE variants 64)
pins: 2,515 · $0 72 · $sp 13 · with initializer 241 · volatile-qualified 0 · bare-name 15 · spellings {'__asm__': 2485, 'asm': 30}
whole-body asm routines in C shells, manifest PERMANENT (hand asm, NOT levers): 22 routines · 2,682 sites (2,660 private copies + 22 shared headers); asm-bodies NOT permanent (levers): 13 site(s) ['func_8001E378:DECOMPILE-NOW', 'func_80020F34:DECOMPILE-NOW', 'func_800249F0:DECOMPILE-NOW', 'func_80025CBC:DECOMPILE-NOW', 'func_80026514:UNCERTAIN', 'func_800268D0:UNCERTAIN', 'func_80027058:DECOMPILE-NOW', 'func_80027200:DECOMPILE-NOW', 'func_800CBA44:DECOMPILE-NOW', 'func_8017D810:DECOMPILE-NOW', 'func_8017E26C:UNCERTAIN', 'func_80184440:DECOMPILE-NOW', 'func_801A3BCC:DECOMPILE-NOW']
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 359, 'barrier/via-macro': 2, 'gte/direct': 200, 'gte/via-macro': 6128, 'gte-lever/direct': 362, 'gte-lever/via-macro': 94, 'gte-unsigned/direct': 271, 'instruction/direct': 210, 'instruction/via-macro': 22, 'keepalive/direct': 349, 'launder/direct': 714, 'launder/via-macro': 42, 'verbatim-body/direct': 2682}
instruction mnemonics: {'la': 142, 'addu': 23, 'addiu': 22, 'RTP_SND': 22, '.section': 7, 'lui': 4, 'lh': 3, 'and': 2, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 345, 'barrier/via-macro': 2, 'gte/direct': 200, 'gte/via-macro': 6128, 'gte-lever/direct': 362, 'gte-lever/via-macro': 94, 'gte-unsigned/direct': 271, 'instruction/direct': 210, 'instruction/via-macro': 22, 'keepalive/direct': 349, 'launder/direct': 707, 'launder/via-macro': 42, 'verbatim-body/direct': 2682}
instruction mnemonics: {'la': 142, 'addu': 23, 'RTP_SND': 22, 'addiu': 22, '.section': 7, 'lui': 4, 'lh': 3, 'and': 2, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
gte mnemonics: {'gte_ldv0': 757, 'gte_stlvnl': 593, 'gte_stsxy': 447, 'gte_rtps': 437, 'gte_stflg': 415, 'gte_rtpt': 352, 'gte_SetRotMatrix': 249, 'gte_stsxy3': 236, 'gte_SetTransMatrix': 229, 'gte_rtv0tr': 228, 'gte_ldv3c': 184, 'gte_ldv3': 177, 'gte_stsv': 161, 'lwc2': 159, 'gte_stsz4': 149, 'gte_stsz3': 147, 'gte_stszotz': 134, 'gte_dpcl': 134, 'gte_stsxy3_f3': 111, 'gte_nclip': 108, 'gte_stopz': 108, 'gte_stsxy3c': 108, 'gte_stclmv': 108, 'gte_stsxy3_ft3': 79, 'gte_rtir': 75, 'gte_ldclmv': 72, 'gte_avsz4': 56, 'gte_stotz': 52, 'gte_ldrgb': 30, 'gte_avsz3': 25}
asm-bearing macro definitions: 314 (20 names, 3 with >1 text) kinds {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1}
asm-bearing macro definitions: 314 (20 names, 3 with >1 text) kinds {'gte': 150, 'instruction': 9, 'barrier': 1, 'launder': 154}
controls (R39):
src/800.c func_800226C0 pins got 14 expected 45 N-A
src/shared/ov/func_80178004.h pins got 8 expected 26 N-A
ov_SC03_006 func_80184034 bare-name pins got 0 expected 3 N-A
engine_prelude.h asm sites (a macro definition only) got 0 expected 0 OK
elapsed 32.0 s
elapsed 31.8 s
+1
View File
@@ -57,3 +57,4 @@ date milestone head sites_AB pins asm bodies_AB distinct_AB marked unmarked gte_
2026-09-10 S104 T7: free sweep (5 classes) + agents d1–d9 (all 0; 8 with zero levers, d4 one marked do-while) 910875139 4963 2730 2233 2498 1077 4963 0 456 314 1590 50 7782 445 76
2026-09-10 S104 T7: sweeps (all-families, R27) + agents d11–d19 all at 0 with zero levers 91ae94a64 4753 2578 2175 2383 1019 4753 0 456 314 1590 50 7780 445 76
2026-09-10 S104 T7: d17 + R28–R33 pass (4) + R27 remainder 13069c142 4732 2565 2167 2373 1011 4732 0 456 314 1590 50 7780 445 76
2026-09-10 S104 T7: agents d21–d27 (d29 parked) + the shared header 1d42fff3c 4661 2515 2146 2336 996 4661 0 456 314 1590 50 7780 445 76
1 date milestone head sites_AB pins asm bodies_AB distinct_AB marked unmarked gte_levers per_tu_asm_macros class_C class_D class_E class_F class_G
57 2026-09-10 S104 T7: free sweep (5 classes) + agents d1–d9 (all 0; 8 with zero levers, d4 one marked do-while) 910875139 4963 2730 2233 2498 1077 4963 0 456 314 1590 50 7782 445 76
58 2026-09-10 S104 T7: sweeps (all-families, R27) + agents d11–d19 all at 0 with zero levers 91ae94a64 4753 2578 2175 2383 1019 4753 0 456 314 1590 50 7780 445 76
59 2026-09-10 S104 T7: d17 + R28–R33 pass (4) + R27 remainder 13069c142 4732 2565 2167 2373 1011 4732 0 456 314 1590 50 7780 445 76
60 2026-09-10 S104 T7: agents d21–d27 (d29 parked) + the shared header 1d42fff3c 4661 2515 2146 2336 996 4661 0 456 314 1590 50 7780 445 76
+9 -1
View File
@@ -103,6 +103,7 @@ counted, not marked). E, F and G belong to the canonical type layer and are the
| 2026-09-10 | S104 T7: free sweep (5 classes) + agents d1–d9 (all 0; 8 with zero levers, d4 one marked do-while) | 2730 | 2233 | **4963** | 2498 | 1077 | 456 | 314 | 1590 | 50 | 7782 | 445 | 76 | `910875139` |
| 2026-09-10 | S104 T7: sweeps (all-families, R27) + agents d11–d19 all at 0 with zero levers | 2578 | 2175 | **4753** | 2383 | 1019 | 456 | 314 | 1590 | 50 | 7780 | 445 | 76 | `91ae94a64` |
| 2026-09-10 | S104 T7: d17 + R28–R33 pass (4) + R27 remainder | 2565 | 2167 | **4732** | 2373 | 1011 | 456 | 314 | 1590 | 50 | 7780 | 445 | 76 | `13069c142` |
| 2026-09-10 | S104 T7: agents d21–d27 (d29 parked) + the shared header | 2515 | 2146 | **4661** | 2336 | 996 | 456 | 314 | 1590 | 50 | 7780 | 445 | 76 | `1d42fff3c` |
### The campaign — every batch, from the ledger (derived on every render)
@@ -335,7 +336,14 @@ counted, not marked). E, F and G belong to the canonical type layer and are the
| `s104_d17` | 2026-09-10 | E | 0 | 0 | 0 | 8 | 4 |
| `s104_new5` | 2026-09-10 | E | 0 | 0 | 0 | 5 | 4 |
| `s104_r27` | 2026-09-10 | E | 0 | 0 | 0 | 10 | 3 |
| **total** | | | **17,122** | **20,778** | **283** | **29,700** | **10,375** |
| `s104_d22` | 2026-09-10 | E | 0 | 0 | 0 | 4 | 4 |
| `s104_d24` | 2026-09-10 | E | 0 | 0 | 0 | 16 | 4 |
| `s104_d23` | 2026-09-10 | E | 0 | 0 | 0 | 21 | 7 |
| `s104_d25` | 2026-09-10 | E | 0 | 0 | 0 | 3 | 3 |
| `s104_d26` | 2026-09-10 | E | 0 | 0 | 0 | 7 | 7 |
| `s104_d21` | 2026-09-10 | E | 0 | 0 | 0 | 14 | 7 |
| `s104_d27` | 2026-09-10 | E | 0 | 0 | 0 | 6 | 5 |
| **total** | | | **17,122** | **20,778** | **283** | **29,771** | **10,412** |
*Generated by `tools/lever_progress.py --render` from `.run/P36/census/lever_census.json` and `.run/P36/delever/ledger.jsonl`; the series lives in `docs/lever-progress.tsv` (R75: published numbers are generated, never typed).*
+12
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@@ -1879,6 +1879,18 @@ accumulate here as the phase produces them.**
DIFFERS refused, 3 re-score misses). R22 after every batch: `check-all: 218 passed, 0 failed of 218` (r22_a/b/c logs). Census
4,928 → **4,732** (`0 UNMARKED — OK`, exit 0). Agents d20–d24 launched on the triple-judged residue (see the checkpoint).
- **S104 — the fourth wave: d21–d28 at 0 with ZERO levers; d29 PARKED (a signature change).** d21 `func_8018179C` (one
function-scope result variable + a three-quantity block, 7 bodies incl. d28's `func_8017F0F4` — d28 was relayed d21's port and
confirmed it), d22 `func_801861FC` (one variable per switch case; 4), d23 `func_80181864` (a loop-local `next` + stores before
counters; 7), d24 `func_8018003C` (a parameter copy deleted; 4), d25 `func_8017E060` (a twice-set pointer as one expression —
a frame-only residual; 3), d26 `func_8017FB10` (store first + a pre-decrement test; 7), d27 `func_80184B94` (return constants,
not a pinned result; 3 + a two-pin sibling + **the shared header `func_8013E448.h`, IDENTICAL on 141 objects**). **d29
`func_80188DF4` ×6 closes only as `void` → `s32` with the TU's prototype changed** (the keepalive faked `return v0;`) — parked
for the STRUCTS phase per Drew's (d), patches in its pack. Generators: **R23 accepts a `case`/`default` label** (known-true 0),
**R35 `drop_param_copies`**, **R36 `merge_set_chains`** (known-true 0 after allowing two unrelated lines between). R22 `check-all:
218 passed, 0 failed of 218` (r22_d); census **4,661** (exit 0). The R23/R34/R35/R36 pass `s104_new4` is running (16 MATCH at
650/915); agents d20, d30–d33 in flight.
## 🛑 SESSION CHECKPOINT — S104 (2026-09-10): T0–T6 ☑, **T7 RUNNING**. 5,097 → **4,732 sites** this session; 24 agent draws, **19 landed, ALL at 0** (18 with zero levers, d4 one marked do-while); generators **R27–R34**; the census counts kept ordinary-C fakes apart; R22 `check-all: 218 passed, 0 failed of 218` after every batch | `lever_census --check` exit 0 (4,732 marked, 0 UNMARKED, 0 orphans, 4 marked ordinary-C fakes)
### 0. How to use this block