feat(decomp): ov_SC06_022 — 9 resolver-held drafts banked after the T2c surgery; re-verified byte-identical from a clean rebuild; T2c log (P31 S62)

This commit is contained in:
Drew T
2026-08-26 14:21:24 -06:00
parent bf10227dec
commit 48a42b9ed3
5 changed files with 219 additions and 9 deletions
+13
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@@ -2323,3 +2323,16 @@ byte-identical (`c2cd16c4`), then its 4 held resolver drafts gated 4/4, re-verif
`.run/t1/interleave_check.py` (order ⇔ yaml) is ALIGNED for SC06_022/SC04_018 and shows a DRIFT on
ov_SC02_005 (`jr_8018EA04.o` + `tail21` in the order, absent from the yaml) — T2e input.
**NEXT: T2c** — ov_SC06_022 ('consumed 1 but 2'; Max, solo).
**T2c DONE (ov_SC06_022 GREEN, red 3 → 2, +9 banks).** 'consumed 1 but 2' on TWO objects
(jr_80184A28, jr_80180CD0): each carve holds ONE table while the pads spec described two — for
jr_80184A28 a rival lane flip-flopped the yaml five times on 08-25 between one and two carved
tables (func_80185B80, whose table is the second, is still a stub) and the 17:43 mk restore kept
the two-table `0,4`. Built `.run/t1/pads_audit.py <binary>` (offline-tooling-first): compiles each
TU with a pads line to count its tables, walks the retail bytes inside the yaml carve with those
sizes (pad 4 ⇔ one zero word before a table), and DERIVES the spec — it reproduced all 15 correct
specs (negative control) and flagged exactly the two drifts. Specs set (`commit:3088`), R22 clean
rebuild byte-identical (`2a7d7d4e`), 11 held drafts gated 9/11 (2 already banked by propagation),
re-verified clean. The same audit pre-diagnoses T2d: ov_SC04_018/jr_8017AE2C spec has 4 entries, the
TU compiles 3, the carve holds a 4th 5-entry table (func_80181804, reverted to a stub).
**NEXT: T2d** — ov_SC04_018 (Max, solo).
+34 -1
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@@ -4944,7 +4944,40 @@ void func_80180310(void *a0) {
}
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8017BEBC", func_8018034C);
extern u8 D_801AD39C[];
extern void func_8002D4C8(s32 a0, s32 a1);
extern void func_8016AA50(s32 param_1, s32 param_2);
void func_8018034C(self)
s32 self;
{
s32 a0;
s32 s1;
s32 v;
*(u16 *)(self + 0x5C) &= 0xFFFE;
*(s8 *)(self + 0xC1) = 1;
*(s32 *)(*(s32 *)(self + 0x20) + 0x80) = (s32)D_801AD39C;
a0 = *(s32 *)(self + 0x78);
*(s16 *)(self + 0x100) = 8;
if (a0 != 0) {
s1 = (*(s16 *)(self + 0x60) * *(s16 *)(a0 + 0x30)) >> 12;
if (s1 <= 0)
s1 = 1;
}
if (*(s16 *)(self + 0x76) != 0) {
func_8016AA50(self, s1);
v = *(u16 *)(self + 0x76) - s1;
*(u16 *)(self + 0x76) = v;
if ((s16)v < 0)
*(s16 *)(self + 0x76) = 0;
func_8002D4C8(0x9D4, 0);
if (*(s16 *)(self + 0x76) != 0)
return;
}
*(s16 *)(self + 0x5C) = 0;
}
extern void func_8001C924(s32 a0, void *a1);
extern void func_8012AD44(s32 *a0, s16 a1);
+25 -2
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@@ -3222,7 +3222,20 @@ void func_8018165C(void) {
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80180CD0", func_80181664);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80180CD0", func_80181744);
extern void func_801809D4();
void func_80181744(a0)
s32 a0;
{
s16 v = *(s16 *)(a0 + 0x54);
if (v != 0) {
*(s16 *)(a0 + 0x54) = v - 0x10;
} else {
func_801809D4(a0);
}
}
void func_80181780(s32 param_1)
{
@@ -3899,7 +3912,17 @@ LAB_80184738:
}
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80180CD0", func_80182890);
extern void func_8012A828(s32 a0, void *a1);
extern s32 func_8012B864(s32 a0);
extern u8 D_801D40D8[];
void func_80182890(s32 a0) {
func_8012A828(a0, D_801D40D8);
*(u16 *)(a0 + 0x2) = 0x10;
*(u16 *)(a0 + 0x34) = 0;
*(s32 *)(a0 + 0xE8) = func_8012B864(a0);
}
extern s32 func_8012B608(s32 a0, s32 a1, s32 a2);
+17 -1
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@@ -3118,7 +3118,23 @@ void func_801833B4(s32 p) {
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80182D08", func_80183494);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80182D08", func_801834D4);
void func_801834D4(s32 p) {
extern u8 D_801BD0BC[];
extern void func_8012F214(s32, s32, s32);
extern s32 func_8012BCCC(s32 a0);
extern s32 func_80187318(void *a0, s32 a1, s32 a2);
extern s32 func_8012BEE8();
s32 buf10[2];
((void (*)(s32, void *, void *))func_8012F214)(p, D_801BD0BC, buf10);
if (func_80187318(buf10, *(s16 *)(*(s32 *)(p + 0x20) + 0x12), 0x380) != 0 &&
func_8012BCCC(p) < 0x64000) {
*(u16 *)(p + 2) = 0x1C;
} else if (func_8012BEE8(p) != 0) {
*(u16 *)(p + 2) = 0x18;
}
}
extern void func_8012A828(s32, void*);
+130 -5
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@@ -4399,7 +4399,44 @@ void func_80187094(s32 a0, s32 a1) {
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80184A28", func_80187318);
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80184A28", func_801873B0);
extern s32 func_8012C51C(void *a0, s32 a1);
typedef struct {
u16 f10; /* 0x10 */
u16 f12; /* 0x12 */
u16 f14; /* 0x14 */
s16 f16; /* 0x16 */
s16 f18; /* 0x18 */
s16 f1a; /* 0x1A */
s16 f1c; /* 0x1C */
u16 f1e; /* 0x1E */
s32 f20; /* 0x20 */
} buf_801873B0;
void func_801873B0(a0, a1, a2, a3, a4, a5)
s32 a0;
void *a1;
s32 a2;
s32 a3;
u16 a4;
s32 a5;
{
buf_801873B0 sp;
u16 t;
sp.f10 = *(u16 *)a1;
sp.f12 = *(u16 *)(2 + (char *)a1);
t = *(u16 *)(4 + (char *)a1);
sp.f16 = a2;
sp.f18 = a3;
sp.f1a = 0;
sp.f1e = a4;
sp.f20 = a5;
sp.f1c = 0x7FFF;
sp.f14 = t;
func_8012C51C(&sp, a0);
}
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80184A28", func_80187414);
@@ -6671,7 +6708,28 @@ void func_8018AFFC(s32 a0) {
}
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80184A28", func_8018B0FC);
extern void func_8012A828(s32 a0, void *a1);
void func_8018B0FC(s32 a0) {
extern u8 D_801DCF74[];
extern u8 D_801DD074[];
extern u8 D_801DD174[];
if (*(s16 *)(a0 + 0x100) == 0) {
*(u16 *)(a0 + 2) = 1;
*(s16 *)(a0 + 0x100) = 0x3C;
func_8012A828(a0, D_801DCF74);
if (*(s32 *)(a0 + 0xCC) != 0) {
func_8012A828(*(s32 *)(a0 + 0xCC), D_801DD074);
}
if (*(s32 *)(a0 + 0xD0) != 0) {
func_8012A828(*(s32 *)(a0 + 0xD0), D_801DD174);
}
} else {
*(s16 *)(a0 + 0x100) = *(s16 *)(a0 + 0x100) - 1;
}
}
extern void func_8012B370(int a0);
@@ -7847,7 +7905,31 @@ void func_8018C8EC(void *a0) {
}
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80184A28", func_8018C928);
extern void func_80016714(void *a0, s32 a1);
extern void func_8002A04C(s32 a0);
extern void func_8012C218(void *a0);
void func_8018C928(a0)
s32 a0;
{
if (*(s16 *)(a0 + 0x70) != 0) {
*(u16 *)(a0 + 0x2) = 4;
*(u16 *)(a0 + 0x5C) = 0;
*(u16 *)(a0 + 0x5E) = 0;
*(u8 *)(a0 + 0xC1) = 0;
return;
}
if (*(s32 *)(a0 + 0xCC) != 0)
func_80016714(*(void **)(a0 + 0xCC), 0x84);
if (*(s32 *)(a0 + 0xD0) != 0)
func_80016714(*(void **)(a0 + 0xD0), 0x84);
func_8002A04C(a0);
func_8012C218((void *)a0);
}
extern void func_8002D4C8(s32 arg0, s32 arg1);
@@ -7876,7 +7958,22 @@ extern void func_8018BBBC(void);
}
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80184A28", func_8018CA44);
extern void func_80131E00();
extern void func_8018BBBC(void);
void func_8018CA44(a0)
s32 a0;
{
if (*(s16 *)(a0 + 0x76) < 0) {
func_80131E00(a0, 6);
} else {
*(s16 *)(a0 + 2) = 1;
*(s16 *)(a0 + 0x100) = 0x3C;
*(u16 *)(a0 + 0x34) = 0;
func_8018BBBC();
}
}
extern int func_80143C74(short*, int);
@@ -8077,7 +8174,35 @@ void func_8018CEC4(s32 a0) {
}
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80184A28", func_8018CF24);
void func_8018CF24(s32 a0)
{
extern void func_8012C1B8(void);
extern void func_8012CAE4(void *a0);
extern void func_8001C214(s32 a0, s32 a1);
extern void func_8012A828(s32 a0, void *a1);
extern u8 D_801DF374[];
extern u8 D_8018D644[];
s32 v0;
v0 = ((s32 (*)(void))func_8012C1B8)();
*(s32 *)(a0 + 0x20) = v0;
if (v0 == 0) {
func_8012CAE4((void *)a0);
} else {
func_8001C214(v0, (s32)D_801DF374);
func_8012A828(a0, (void *)D_8018D644);
*(u16 *)(a0 + 0x2) = 1;
*(s32 *)(a0 + 0x1C) = 0x40;
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x10);
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12);
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x14) =
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x14);
}
}
extern u8 D_801DD6A0[];
extern u8 D_801DD6AC[];