phase-36: S104 s104_d24 — func_8018003C banked at 0 through the whole-object gate + propagated — 4 pins + a $0 copy → 0: the parameter copy deleted (cse.c:846-862 → the two tails merge, jump.c:2371), the call at its real arity, += per field

This commit is contained in:
Drew T
2026-09-10 22:57:37 -06:00
parent 66eafc8a54
commit 48bb124be5
15 changed files with 695 additions and 342 deletions
@@ -2,6 +2,7 @@ void func_8018003C(s32 arg0)
{
s32 obj;
s32 v;
s32 timer;
obj = *(s32 *)(arg0 + 0x20);
*(s32 *)(arg0 + 0x10) += *(s32 *)(arg0 + 0x2C);
@@ -14,11 +15,11 @@ void func_8018003C(s32 arg0)
if (func_80128ED8(obj, (s32 *)(arg0 + 0x24)) != 0) {
func_801292C8((u8 *)arg0);
} else {
v = *(s32 *)(arg0 + 0x1C);
if (v != 0) {
v--;
*(s32 *)(arg0 + 0x1C) = v;
if (v == 0) {
timer = *(s32 *)(arg0 + 0x1C);
if (timer != 0) {
timer--;
*(s32 *)(arg0 + 0x1C) = timer;
if (timer == 0) {
func_801292C8((u8 *)arg0);
}
}
@@ -0,0 +1,76 @@
# func_8018003C (ov_SC02_016_jr_8017DC70.c): P36 S104 agent d24. Score 36 to 0, zero levers, 4 copies
**Result: score 0 in plain C.** No pin, no asm, no volatile, no do-while, no dead initialiser. The first `--try` of a
natural rewrite scored 0 (`scratch/n1.c`). `PACK/body.c` is the same text with the timer given its own name. I checked
the bytes separately: `objdump -drz` of the `--keep` object equals the baseline snapshot, relocations included. Levers
before and after: 4 pins ($17, $5, $6, $0) and the `a0 = s0 + zr` launder go to 0.
## (a) The residual in one sentence
The lever-free text had 44 instructions against the target's 42. The two `func_801292C8(p)` call sites loaded `$a0`
from different callee-saved registers (`move a0,s1` against `move a0,s0` after a `move s0,s1`), so the post-reload
cross-jump could not merge them into the target's single `jal func_801292C8; move a0,s1` tail. On top of that,
`a1/a2/v0/v1` were permuted in the vector-add block.
## (b) The passes and decisions (proved on bytes by ablation: every row below is one move reverted from body.c)
| move reverted (file in scratch/) | score | pass / decision |
|------------------------------------------------------|-------|-----------------|
| `s32 s1 = arg0;` parameter copy (H.c) | 19 COUNT | **cse1 `make_regs_eqv` (`cse.c:846-862`)**. The param pseudo (73) stays canonical over the copy (72) through block 0 and the then-arm. The else-arm, which cse processes as a new path at label 80, reads 72. `.i.cse` lines: insns 13-43, 62, 74 use 73, and insns 84, 94, 101 use 72. `.lreg`: 72 "crosses 2 calls", 73 "crosses 1 call". Two call-crossing pseudos take two `$sN`, the two `func_801292C8` tails differ, and **`find_cross_jump` (`jump.c:2371`)** cannot merge them, which gives 2 extra instructions. This is the same mechanism as S104 d17's note. |
| call through `((void (*)(void))func_8012931C)()` (A.c) | 4 REG | Passing `arg0` costs 0 bytes. The copy `(set a0 s1)` survives greg (`.i.greg` insn 41) and **jump2 deletes it as already-equivalent (`jump.c:437-462`, `find_equiv_reg`)**. But `$a0` stays live from entry to the call, so local-alloc can't give it to the `+0x30` temp, and the temps land in `a1/a2` as in the target. Without the argument, `$a0` is free and the temps take `a0/a1`. This matches S103 c35 / generator R19. |
| body_free's hoisted temps `v0,v1,a1,a2` with `v0` reused (C.c) | 12 REG | This is local-alloc quantity order. `v0` holds two values ("dies in N places", refused by `local-alloc.c:472`). With `x += y` written directly, every load and sum is a single-use pseudo, and the birth order gives `v0/v1` then `a1/a2`. **Not proven in the dumps**: only the byte result was checked. |
| `a0 = s0 + 0;` second name for `obj` (B.c) | 0 | Harmless. cse folds it, so it was never the defect. The tree's `$0` pin was faking nothing that plain C needs. |
| body_free with only the call fixed (D.c) / only the copy removed (F.c) / both (E.c) | 36 / 36 / 36 | This shows the **parameter copy is the dominant defect**. Every body that keeps `s1 = arg0` stays at the COUNT gap, whatever else changes. |
## (c) The source moves that closed it (joint: all three are needed, and each alone is worse)
1. Delete the parameter copy `s32 s1 = arg0;` and use `arg0` directly (jumps 36 to 0 when combined with 2 and 3).
2. Call `func_8012931C((struct vec *)arg0)` at its real arity, not through a zero-argument cast.
3. Write the vector add as three `*(s32 *)(arg0 + K) += *(s32 *)(arg0 + K + 0x1C);` statements instead of hoisted,
reused temps.
Also: the `a0 = s0 + zr` launder is gone (`obj` is one variable), and the goto-free if/else is kept. The `||` form
(`scratch/G.c`: `if (func_80128ED8(...) != 0 || (*(s32 *)(arg0 + 0x1C) != 0 && --*(s32 *)(arg0 + 0x1C) == 0))`) also
scores 0, so pick either for readability.
## (d) Generator proposal
When a COUNT residual shows two call sites of the same callee whose `$a0` loads come from different `$sN` (a missed
cross-jump) and the body opens with `T x = argN;`, delete the copy and rename `x` to `argN` throughout. Apply it jointly
with R19 (call at real arity) and an "inline single-use temps into `+=`" rewrite. Each of the three alone scores worse
than the three together, so a single-move beam never finds it. The sweep's best was 9 because no family deletes a
parameter copy.
## (e) What did not work / what the sweep missed
- The regen best (9) kept `s1 = arg0` in every candidate, so the COUNT gap could never close (ablation H: the copy alone
= 19).
- Porting the two same-name `func_8018003C` definitions in other binaries was not attempted. The brief says they scored
~50, and the copies grep shows this class's real siblings are `func_80187CE8`, `func_80182EB0` and `func_80181D9C`.
Those are all the same tree text, and all close with this body.
## (f) Where the method fell short
It didn't fall short. Reading the pack plus S104 d17's "delete the hoisted parameter copy" note predicted the close,
and the first natural rewrite matched. The one gap: `history.txt` and the regen families never try deleting a
`T x = argN;` prologue copy. That copy is a decompiler artefact (m2c names the saved register `s1`) and appears in many
tree bodies, so it's worth a generator (d).
## (g) Structs answer
Structs are **not needed** for this class. The levers were decompiler artefacts: the param copy, the zero-arg cast and
the hoisted temps. They weren't struct-shaped pass decisions. Structs are **compatible**, though, and I tested this on
bytes:
- `scratch/struct2.c`: `struct m8018003C { u8 pad0[0x10]; s32 vx, vy, vz /*0x10*/; s32 timer /*0x1C*/; s32 obj /*0x20*/; s32 hit[2] /*0x24*/; s32 ax, ay, az /*0x2C*/; }`
as the **parameter type**, with `obj` as `struct { u8 pad0[0x18]; u16 unk18, unk1A; } *`, scores **0**. The
aggregate (MEM_IN_STRUCT_P) accesses did not change sched1's order here, because there is no scalar store for a load
to pass.
- `scratch/struct.c`: the same struct reached through a body-local `p = (struct m8018003C *)arg0;` scores **19**,
exactly the param-copy defect of ablation H. So a struct retype must change the **parameter's** type, not add a typed
local copy. Banking the struct form would also mean updating `extern void func_8018003C(s32 arg0);` in
`src/ov_SC02_016/ov_SC02_016_jr_801810C8.c:2750`, so the plain `s32 arg0` body is the one to bank now.
- The layout agrees with `func_8012931C(struct vec *)`, which does `unk4 += unk10`, `unk8 += unk14` and
`unkC += unk18`. This function first does `unk10 += (0x2C)`, `unk14 += (0x30)` and `unk18 += (0x34)`, which reads as
velocity += acceleration and then position += velocity. So `struct vec` extended with a timer at 0x1C, a sub-object
at 0x20, a hit box at 0x24 and acceleration at 0x2C is a candidate for the structs phase.
## Copies (same text, name swapped, each `--try` = 0): see `scratch/copies.md`
| function | TU | file |
|---|---|---|
| func_8018003C | src/ov_SC02_016/ov_SC02_016_jr_8017DC70.c | PACK/body.c |
| func_80187CE8 | src/ov_SC02_011/ov_SC02_011_jr_80183178.c | PACK/scratch/copy_func_80187CE8.c |
| func_80182EB0 | src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c | PACK/scratch/copy_func_80182EB0.c |
| func_80181D9C | src/ov_SC03_029/ov_SC03_029_jr_8017FF7C.c | PACK/scratch/copy_func_80181D9C.c |
@@ -0,0 +1,51 @@
void func_8017FB10(s32 a0)
{
SV4 in;
SV4 out;
s16 v1;
u16 uStack_c;
if (*(u16 *)(a0 + 0x34) == 0) {
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12);
func_8012B2CC(a0);
func_8012B23C(a0);
func_8012B14C(a0, *(s16 *)(a0 + 0x70) * 12 + (s32)&D_8019C970);
in.a = 0;
in.b = 0;
in.c = 0x10;
func_8012F214(a0, (s32)&in, (s32)&out);
*(u16 *)(a0 + 6) = out.a;
*(u16 *)(a0 + 0xa) = out.b;
uStack_c = out.c;
*(s32 *)(a0 + 0x1c) = 0x5a;
*(u16 *)(a0 + 0x34) = 1;
*(u16 *)(a0 + 0xe) = uStack_c;
}
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) += -0x80;
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += 4;
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x14) += *(u16 *)(a0 + 0xfc);
*(s32 *)(a0 + 0xdc) = *(s32 *)(a0 + 0x14);
if ((((s32 (*)(s32))func_8012CBCC)(a0)) & 0x6000) {
s32 negdc;
negdc = -*(s32 *)(a0 + 0xdc);
v1 = *(u16 *)(a0 + 0xac);
v1 -= 1;
*(s16 *)(a0 + 0xac) = v1;
*(s32 *)(a0 + 0x14) = negdc;
if (v1 == 0) {
func_8012C218((void *)a0);
}
}
{
s32 iVar3 = *(s32 *)(a0 + 0x1c) - 1;
*(s32 *)(a0 + 0x1c) = iVar3;
if (iVar3 == 0) {
func_8012C218((void *)a0);
}
}
}
@@ -0,0 +1,51 @@
void func_8017FB10(s32 a0)
{
SV4 in;
SV4 out;
s16 v1;
u16 uStack_c;
if (*(u16 *)(a0 + 0x34) == 0) {
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12);
func_8012B2CC(a0);
func_8012B23C(a0);
func_8012B14C(a0, *(s16 *)(a0 + 0x70) * 12 + (s32)&D_8019C970);
in.a = 0;
in.b = 0;
in.c = 0x10;
func_8012F214(a0, (s32)&in, (s32)&out);
*(u16 *)(a0 + 6) = out.a;
*(u16 *)(a0 + 0xa) = out.b;
uStack_c = out.c;
*(s32 *)(a0 + 0x1c) = 0x5a;
*(u16 *)(a0 + 0x34) = 1;
*(u16 *)(a0 + 0xe) = uStack_c;
}
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) += -0x80;
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += 4;
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x14) += *(u16 *)(a0 + 0xfc);
*(s32 *)(a0 + 0xdc) = *(s32 *)(a0 + 0x14);
if ((((s32 (*)(s32))func_8012CBCC)(a0)) & 0x6000) {
register s32 negdc __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus9)
negdc = -*(s32 *)(a0 + 0xdc);
v1 = *(u16 *)(a0 + 0xac);
v1 -= 1;
*(s16 *)(a0 + 0xac) = v1;
*(s32 *)(a0 + 0x14) = negdc;
if (v1 == 0) {
func_8012C218((void *)a0);
}
}
{
s32 iVar3 = *(s32 *)(a0 + 0x1c) - 1;
*(s32 *)(a0 + 0x1c) = iVar3;
if (iVar3 == 0) {
func_8012C218((void *)a0);
}
}
}
@@ -0,0 +1,14 @@
g6b: verdict NO-MATCH start 8 best 2 compiles 323 path R9 swap-stmts @4550
best-scoring single candidates of the last trace (move -> score [residual class]):
R9 swap-stmts @4550 -> 2 [ORDER] (from 8)
R9 swap-stmts @4551 -> 2 [ORDER] (from 2)
R7 block @4554 -> 2 [ORDER] (from 2)
R6 inline negdc @4548 -> 2 [ORDER] (from 2)
R8 temp tmp0 @4549 -> 2 [ORDER] (from 2)
R10 param-copy a0 @4521 -> 2 [ORDER] (from 2)
R7 do-while @4554 -> 2 [ORDER] (from 2)
R8 base tmp0 @4549 -> 2 [ORDER] (from 2)
R12 width uStack_c u16->s16 @4520 -> 2 [ORDER] (from 2)
R7 block @4552 -> 2 [ORDER] (from 2)
R8 base-shared tmp0 @4549 -> 2 [ORDER] (from 2)
R9 swap-stmts @4548 -> 2 [ORDER] (from 2)
@@ -0,0 +1,25 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: schedule
// @stuck: none — MATCH (102 ins). MATRIX(0x20:m@0,t@0x14)+SVECTOR in/out stack layout; the only
// @class: regalloc-order
// @stuck: none — MATCH (223 ins). Giant GTE coord transform. Two levers: (1) vy = {int t=vy-0x10; t+(r&0x1f);}
// @class: regalloc-order
// @stuck: none — MATCH (145/145 ins, match_one confirmed)
// @class: regalloc-order
// @stuck: none — MATCH (168 ins). Keys: (1) pin param->$s1 via `register int self __asm__("$17")=param_1`
// @class: schedule
// @stuck: none — MATCH (132 ins, match_one). Levers: (1) block2 statement order — compute sv1.vz (with the *(p+0xe) load) right after the 2nd call so gcc hoists that load into $v1, forcing the sv2.vx=sv1.vx copy through $a3, which globally pushes every `func*param>>12` product from $a3 to $t0; (2) sv2 store order vx-before-vy; (3) SHARED return-0 join via gotos placed BEFORE the copy block (ret0: before docopy:) — this blocks gcc's conditional-jump-over-jump inversion + return-threading, so the copy block falls through to the epilogue with v0=1 preset in the beqz delay slot (drops the extra `li v0,1`).
// @class: plumbing
// @stuck: none — MATCH (126 ins). Keys: (1) cVar1 as `int` (not unsigned char) so the
// @class: schedule
// @stuck: none — MATCH; success-block placed last via `goto big` (bnez forward into epilogue), single cae4 merge kept
// @class: plumbing
// @stuck: none — MATCH (126 ins). Keys: (1) cVar1 as `int` (not unsigned char) so the
// @class: struct
// @stuck: none — MATCH
// @class: schedule
// @stuck: none — MATCH. Two levers: (1) split rand()-result into its own var (shared iVar1 forced an extra move a0,v0); (2) reorder decrement before sp[0] to group the two lhu loads as target's scheduler does; (3) materialize &D_80126B96 via a local u16* to CSE the address (lui+addiu once) instead of %hi/%lo split-per-access.
// @class: regalloc-order
// @stuck: none — MATCH (83 ins). $s3 is a dual-copy of iVar3 used only in the ==0 tail block; natural C coalesces to one $s0, so pin iVar3=$s0 and iVar3b=$s3 (different hard regs prevent gcc coalescing the copy). Also: outer+inner branch polarity inverted (if!=0 / if!=0 puts both short blocks at the tail as beqz targets); base = (int)D_801AA194 + idx*0x40 (materialize form, arg to callees).
// @class: regalloc-order
// @stuck: none — MATCH (223 ins). Giant GTE coord transform. Two levers: (1) vy = {int t=vy-0x10; t+(r&0x1f);}
@@ -0,0 +1,211 @@
=== lever-free bodies in ov_SC06_008 sharing a callee or global with func_8017FB10 (49 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80183BF4 (src/ov_SC06_008/ov_SC06_008_jr_8017C294.c:7150) shares 3: func_8012B23C func_8012C218 func_8012CBCC ---
void func_80183BF4(s32 a0)
{
s32 s0 = a0;
s32 ret;
u16 val;
if (*(u16 *)(s0 + 2) == 0) {
*(u8 *)(s0 + 0xC0) = 1;
*(u16 *)(s0 + 2) = *(u16 *)(s0 + 2) + 1;
func_8012B23C(s0);
*(s32 *)(s0 + 0x1C) = 1;
return;
}
*(s32 *)(s0 + 0xDC) = *(s32 *)(s0 + 0x14);
ret = ((s32 (*)(s32))func_8012CBCC)(s0);
if (ret != 0 && (ret & 0x6000) != 0) {
s32 cnt = *(s32 *)(s0 + 0x1C) - 1;
*(s32 *)(s0 + 0x1C) = cnt;
if (cnt == 0) {
goto L80183CF4;
}
*(s32 *)(s0 + 0x14) = -*(s32 *)(s0 + 0xDC) >> 2;
}
val = *(u16 *)(s0 + 0xFC) + 1;
*(u16 *)(s0 + 0xFC) = val;
if ((val & 1) != 0) {
s32 np = (s32)func_8012913C(0x23);
if (np != 0) {
*(u16 *)(np + 6) = *(u16 *)(s0 + 6);
*(u16 *)(np + 0xA) = *(u16 *)(s0 + 0xA);
{
u16 t = *(u16 *)(s0 + 0xE);
*(u32 *)(np + 0x18) = 0;
*(u32 *)(np + 0x14) = 0;
*(u32 *)(np + 0x10) = 0;
*(u16 *)(np + 0x34) = 0x3000;
*(u16 *)(np + 0xE) = t;
}
}
}
if (*(s16 *)(s0 + 0xA) < 0x20) {
return;
}
L80183CF4:
func_8012C218((void *)s0);
}
--- func_8018037C (src/ov_SC06_008/ov_SC06_008_jr_8017C294.c:4875) shares 2: func_8012B14C func_8012C218 ---
void func_8018037C(s32 a0)
{
s32 v0;
if (*(s16 *)(a0 + 6) == *(s16 *)(a0 + 0xDE) &&
*(s16 *)(a0 + 0xE) == *(s16 *)(a0 + 0xE2)) {
func_8012C218((void *)a0);
} else {
*(s32 *)(a0 + 0xDC) = *(s32 *)(a0 + 4);
*(s32 *)(a0 + 0xE0) = *(s32 *)(a0 + 0xC);
func_8012B14C(a0, (s32)&D_8019C954);
func_8012AD80(a0);
if (func_8012D5E4(a0, (s32)&D_8019C960, (s32)&D_800D3918, 0x30) != 0) {
func_8012C218((void *)a0);
} else {
v0 = *(s32 *)(a0 + 0x1c) - 1;
*(s32 *)(a0 + 0x1c) = v0;
if (v0 == 0) {
func_8012C218((void *)a0);
} else {
func_8012B370(a0);
}
}
}
}
--- func_80181220 (src/ov_SC06_008/ov_SC06_008_jr_8017C294.c:5474) shares 2: func_8012B23C func_8012C218 ---
void func_80181220(int param_1) {
extern u8 D_8019EE50[];
extern u8 D_8019ED94[];
extern u8 D_8019ED54[];
extern u8 D_8019ED9C[];
extern u8 D_8019ED74[];
extern u8 D_801A30BC[];
extern u8 D_801A636C[];
extern u8 D_8019EE90[];
extern u8 D_801A61D4[];
extern u8 D_801A625C[];
extern u8 D_801A62E4[];
int iVar1;
iVar1 = func_8012C354(param_1, D_8019EE50);
if (iVar1 != 0) {
if (*(short *)(param_1 + 0x70) != 0) {
func_800599B8(D_8019ED94, D_8019ED54);
func_800599B8(D_8019ED9C, D_8019ED74);
func_8001C214(*(int *)(param_1 + 0x20), D_801A30BC);
}
*(u8 *)(param_1 + 0xc0) = 1;
*(int *)(param_1 + 0xb4) = 0xffffdfde;
func_80143970(param_1);
func_8012B030(param_1);
*(short *)(param_1 + 0xae) = 0x2100;
func_8012A828(param_1, D_801A636C);
*(u16 *)(param_1 + 2) = *(u16 *)(param_1 + 2) + 1;
func_8012B23C(param_1);
*(u32 *)(param_1 + 0xc4) = *(u32 *)(param_1 + 0xc4) | 2;
iVar1 = func_8012C658(0x26f, (int)*(short *)(param_1 + 0x70), param_1);
if (iVar1 != 0) {
*(int *)(param_1 + 0xcc) = iVar1;
iVar1 = func_8012C658(0x270, (int)*(short *)(param_1 + 0x70), param_1);
if (iVar1 != 0) goto big;
func_8012C218(*(int *)(param_1 + 0xcc));
}
func_8012CAE4(param_1);
}
return;
big:
*(int *)(param_1 + 0xd0) = iVar1;
*(u32 *)(param_1 + 0xbc) = (u32)D_8019EE90;
*(u16 *)(*(int *)(param_1 + 0x20) + 0x2c) =
*(u16 *)(*(int *)(param_1 + 0x20) + 0x2c) | 0x10;
*(short *)(*(int *)(param_1 + 0x20) + 0x18) = 0x2400;
*(short *)(*(int *)(param_1 + 0x20) + 0x1a) = 0x2400;
*(short *)(*(int *)(param_1 + 0x20) + 0x1c) = 0x2400;
*(u16 *)(param_1 + 2) = 8;
func_8012A828(param_1, D_801A61D4);
func_8012A828(*(int *)(param_1 + 0xcc), D_801A625C);
func_8012A828(*(int *)(param_1 + 0xd0), D_801A62E4);
return;
}
--- func_80131B14 (src/ov_SC06_008/ov_SC06_008_jr_8012ACE0.c:1692) shares 2: func_8012B23C func_8012B2CC ---
void func_80131B14() {
extern void func_8002A520(void *);
extern void func_8002A790(void *);
extern u8 D_80185CD4;
u8 *a0v;
u8 *p = a0v;
s32 e = *(u8 *)(p + 0x5E);
if (*(s16 *)(p + 0x60) != 0) {
if (e == 0x1D) {
*(s16 *)(p + 0x82) = 0;
*(s16 *)(p + 0x7C) = *(u16 *)(p + 0x06);
*(s16 *)(p + 0x7E) = *(u16 *)(p + 0x0A);
*(s16 *)(p + 0x80) = *(u16 *)(p + 0x0E);
}
{
s32 dec;
s32 q = *(s32 *)(p + 0x78);
if (q != 0) {
dec = ((s32)*(s16 *)(p + 0x60) * (s32)*(s16 *)(q + 0x30)) >> 12;
if (dec <= 0) dec = 1;
}
*(u16 *)(p + 0x76) = *(u16 *)(p + 0x76) - dec;
}
((void (*)(void *))func_8016AA50)(p);
if (*(u16 *)(p + 0x82) & 1) {
((void (*)(void *))func_8016B428)(p);
((void(*)(void *))func_80019064)(&D_80185CD4);
}
}
*(u16 *)(p + 0x5C) = *(u16 *)(p + 0x5C) & 0xFFFE;
if (e != 0x1D) {
if (*(u8 *)(p + 0xC8)) func_8002A520(p);
if (*(u8 *)(p + 0xC9)) func_8002A790(p);
}
if (*(s16 *)(p + 0x76) <= 0) *(s16 *)(p + 0x5C) = 0;
{
s32 r = *(s32 *)(p + 0x20);
*(s16 *)(r + 0x12) = (*(u16 *)(p + 0x62) + 0x800) & 0xFFF;
{
s32 r2 = *(s32 *)(p + 0x20);
*(s16 *)(r2 + 0x14) = 0;
*(s16 *)(r2 + 0x10) = 0;
}
}
((void (*)(void *))func_8012B2CC)(p);
((void (*)(void *))func_8012B23C)(p);
}
--- func_80185394 (src/ov_SC06_008/ov_SC06_008_jr_8017C294.c:8339) shares 1: func_8012C218 ---
s32 func_80185394(void * arg0)
{
*(short *)((char *)arg0 + 0x2) = 2;
((void (*)(s32 *))func_8012C218)(*(s32 **)((char *)arg0 + 0xcc));
}
--- func_801439C0 (src/shared/ov/func_801439C0.h:5) shares 1: func_8012C218 ---
void func_801439C0(u8 *a0) {
if (a0 != 0) {
func_80016714(*(void **)(a0 + 0xCC), 0x38);
func_8012C218(a0);
}
}
@@ -0,0 +1,11 @@
src/ov_SC06_008/ov_SC06_008_jr_8017C294.c:func_8017FB10: score 8 (MIXED; mine 93 ins, target 93) — not yet
register pairs (mine -> target, count): v0->v1 x4, v1->v0 x1
replace mine[71:79] target[71:79]
71 lhu v0,172(s0) | lw v0,220(s0)
72 lw v1,220(s0) | lhu v1,172(s0)
73 addiu v0,v0,-1 | negu v0,v0
74 negu v1,v1 | addiu v1,v1,-1
75 sh v0,172(s0) | sh v1,172(s0)
76 sll v0,v0,0x10 | sll v1,v1,0x10
77 bnez v0,39c0 <func_8017FB10+0x144> | bnez v1,39c0 <func_8017FB10+0x144>
78 sw v1,20(s0) | sw v0,20(s0)
@@ -0,0 +1 @@
NEEDED pin $2 line 4653
@@ -0,0 +1,2 @@
src/ov_SC06_008/ov_SC06_008_jr_8017C294.c
func_8017FB10
+187 -187
View File
@@ -1,7 +1,7 @@
{
"head": "eadfa5977",
"head": "66eafc8a5",
"stamp": "15956e4a96c4",
"generated": "2026-09-10 22:54",
"generated": "2026-09-10 22:56",
"aliases": [
"main",
"ov_SC03_014",
@@ -21,207 +21,207 @@
"main": {
"objects": 85,
"identical": 85,
"seconds": 10.013999999999996,
"mean_s": 0.118
"seconds": 8.705,
"mean_s": 0.102
},
"ov_SC03_014": {
"objects": 32,
"identical": 32,
"seconds": 6.761,
"mean_s": 0.211
"seconds": 6.552999999999999,
"mean_s": 0.205
},
"ov_SC03_015": {
"objects": 32,
"identical": 32,
"seconds": 6.607,
"mean_s": 0.206
"seconds": 6.329000000000001,
"mean_s": 0.198
},
"ov_SC04_011": {
"objects": 28,
"identical": 28,
"seconds": 6.0649999999999995,
"mean_s": 0.217
"seconds": 6.174999999999999,
"mean_s": 0.221
}
},
"per_object_seconds": {
"build/src/800.o": 0.971,
"build/src/800_b.o": 0.107,
"build/src/800_b_2.o": 0.498,
"build/src/800_b_o0a.o": 0.139,
"build/src/800_c.o": 0.306,
"build/src/800b2.o": 0.085,
"build/src/apicard1.o": 0.076,
"build/src/apicard2.o": 0.099,
"build/src/apicard3.o": 0.085,
"build/src/apicard4.o": 0.102,
"build/src/apicard5.o": 0.136,
"build/src/apicard6.o": 0.084,
"build/src/apicard7.o": 0.097,
"build/src/boot.o": 0.2,
"build/src/gap.o": 0.082,
"build/src/libapi1.o": 0.127,
"build/src/libapi2.o": 0.086,
"build/src/libc2_1.o": 0.099,
"build/src/libc2_2.o": 0.125,
"build/src/libcd1.o": 0.1,
"build/src/libcd2.o": 0.08,
"build/src/libetc.o": 0.089,
"build/src/libgpu.o": 0.087,
"build/src/libgpu2.o": 0.171,
"build/src/libgs1.o": 0.091,
"build/src/libgs2.o": 0.078,
"build/src/libgs3.o": 0.078,
"build/src/libgs4.o": 0.098,
"build/src/libgs5.o": 0.063,
"build/src/libgs6.o": 0.136,
"build/src/libgs7.o": 0.079,
"build/src/libgs8.o": 0.088,
"build/src/libgte1.o": 0.115,
"build/src/libgte10.o": 0.091,
"build/src/libgte11.o": 0.101,
"build/src/libgte12.o": 0.079,
"build/src/libgte13.o": 0.084,
"build/src/libgte14.o": 0.111,
"build/src/libgte15.o": 0.068,
"build/src/libgte16.o": 0.112,
"build/src/libgte17.o": 0.115,
"build/src/libgte18.o": 0.085,
"build/src/libgte19.o": 0.079,
"build/src/libgte2.o": 0.111,
"build/src/libgte20.o": 0.068,
"build/src/libgte21.o": 0.128,
"build/src/libgte22.o": 0.069,
"build/src/libgte23.o": 0.112,
"build/src/libgte24.o": 0.079,
"build/src/libgte25.o": 0.075,
"build/src/libgte26.o": 0.095,
"build/src/libgte27.o": 0.095,
"build/src/libgte28.o": 0.092,
"build/src/libgte29.o": 0.093,
"build/src/libgte3.o": 0.108,
"build/src/libgte30.o": 0.094,
"build/src/libgte4.o": 0.09,
"build/src/libgte5.o": 0.085,
"build/src/libgte6.o": 0.074,
"build/src/libgte7.o": 0.099,
"build/src/libgte8.o": 0.072,
"build/src/libgte9.o": 0.125,
"build/src/libmcrd1.o": 0.151,
"build/src/libmcrd2.o": 0.12,
"build/src/libpad1.o": 0.127,
"build/src/libpad2.o": 0.092,
"build/src/sgap.o": 0.127,
"build/src/sgap_2.o": 0.099,
"build/src/sgap_3.o": 0.072,
"build/src/sgap_4.o": 0.106,
"build/src/sgap_5.o": 0.144,
"build/src/sgap_6.o": 0.142,
"build/src/sgap_8.o": 0.129,
"build/src/snd1.o": 0.09,
"build/src/snd10.o": 0.075,
"build/src/snd11.o": 0.081,
"build/src/snd12.o": 0.077,
"build/src/snd2.o": 0.138,
"build/src/snd3.o": 0.113,
"build/src/snd4.o": 0.117,
"build/src/snd5.o": 0.076,
"build/src/snd6.o": 0.083,
"build/src/snd7.o": 0.084,
"build/src/snd8.o": 0.1,
"build/src/snd9.o": 0.125,
"build/src/ov_SC03_014/ov_SC03_014.o": 0.211,
"build/src/ov_SC03_014/ov_SC03_014_after.o": 0.684,
"build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.543,
"build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.099,
"build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.074,
"build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.196,
"build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.205,
"build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.19,
"build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.108,
"build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.11,
"build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.236,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.11,
"build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.282,
"build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.114,
"build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.124,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.099,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.128,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.615,
"build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.421,
"build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.172,
"build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.26,
"build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.119,
"build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.174,
"build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.089,
"build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.22,
"build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.294,
"build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.083,
"build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.349,
"build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.083,
"build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.136,
"build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.106,
"build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.127,
"build/src/ov_SC03_015/ov_SC03_015.o": 0.268,
"build/src/ov_SC03_015/ov_SC03_015_after.o": 0.61,
"build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.458,
"build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.089,
"build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.116,
"build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.172,
"build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.189,
"build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.164,
"build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.1,
"build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.119,
"build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.268,
"build/src/800.o": 0.606,
"build/src/800_b.o": 0.102,
"build/src/800_b_2.o": 0.308,
"build/src/800_b_o0a.o": 0.084,
"build/src/800_c.o": 0.262,
"build/src/800b2.o": 0.162,
"build/src/apicard1.o": 0.113,
"build/src/apicard2.o": 0.089,
"build/src/apicard3.o": 0.113,
"build/src/apicard4.o": 0.117,
"build/src/apicard5.o": 0.117,
"build/src/apicard6.o": 0.131,
"build/src/apicard7.o": 0.129,
"build/src/boot.o": 0.132,
"build/src/gap.o": 0.111,
"build/src/libapi1.o": 0.124,
"build/src/libapi2.o": 0.078,
"build/src/libc2_1.o": 0.106,
"build/src/libc2_2.o": 0.086,
"build/src/libcd1.o": 0.121,
"build/src/libcd2.o": 0.085,
"build/src/libetc.o": 0.074,
"build/src/libgpu.o": 0.08,
"build/src/libgpu2.o": 0.11,
"build/src/libgs1.o": 0.108,
"build/src/libgs2.o": 0.092,
"build/src/libgs3.o": 0.077,
"build/src/libgs4.o": 0.08,
"build/src/libgs5.o": 0.093,
"build/src/libgs6.o": 0.091,
"build/src/libgs7.o": 0.054,
"build/src/libgs8.o": 0.06,
"build/src/libgte1.o": 0.054,
"build/src/libgte10.o": 0.053,
"build/src/libgte11.o": 0.065,
"build/src/libgte12.o": 0.046,
"build/src/libgte13.o": 0.049,
"build/src/libgte14.o": 0.046,
"build/src/libgte15.o": 0.048,
"build/src/libgte16.o": 0.063,
"build/src/libgte17.o": 0.054,
"build/src/libgte18.o": 0.059,
"build/src/libgte19.o": 0.062,
"build/src/libgte2.o": 0.071,
"build/src/libgte20.o": 0.145,
"build/src/libgte21.o": 0.122,
"build/src/libgte22.o": 0.096,
"build/src/libgte23.o": 0.138,
"build/src/libgte24.o": 0.103,
"build/src/libgte25.o": 0.124,
"build/src/libgte26.o": 0.152,
"build/src/libgte27.o": 0.068,
"build/src/libgte28.o": 0.06,
"build/src/libgte29.o": 0.06,
"build/src/libgte3.o": 0.064,
"build/src/libgte30.o": 0.098,
"build/src/libgte4.o": 0.13,
"build/src/libgte5.o": 0.096,
"build/src/libgte6.o": 0.094,
"build/src/libgte7.o": 0.138,
"build/src/libgte8.o": 0.124,
"build/src/libgte9.o": 0.079,
"build/src/libmcrd1.o": 0.091,
"build/src/libmcrd2.o": 0.078,
"build/src/libpad1.o": 0.116,
"build/src/libpad2.o": 0.088,
"build/src/sgap.o": 0.12,
"build/src/sgap_2.o": 0.097,
"build/src/sgap_3.o": 0.083,
"build/src/sgap_4.o": 0.093,
"build/src/sgap_5.o": 0.082,
"build/src/sgap_6.o": 0.117,
"build/src/sgap_8.o": 0.086,
"build/src/snd1.o": 0.078,
"build/src/snd10.o": 0.087,
"build/src/snd11.o": 0.075,
"build/src/snd12.o": 0.082,
"build/src/snd2.o": 0.082,
"build/src/snd3.o": 0.088,
"build/src/snd4.o": 0.09,
"build/src/snd5.o": 0.084,
"build/src/snd6.o": 0.074,
"build/src/snd7.o": 0.064,
"build/src/snd8.o": 0.108,
"build/src/snd9.o": 0.086,
"build/src/ov_SC03_014/ov_SC03_014.o": 0.176,
"build/src/ov_SC03_014/ov_SC03_014_after.o": 0.65,
"build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.636,
"build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.063,
"build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.063,
"build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.142,
"build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.216,
"build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.183,
"build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.126,
"build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.109,
"build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.227,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.112,
"build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.246,
"build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.143,
"build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.113,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.118,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.111,
"build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.639,
"build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.355,
"build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.167,
"build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.269,
"build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.088,
"build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.133,
"build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.091,
"build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.212,
"build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.243,
"build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.071,
"build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.436,
"build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.12,
"build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.088,
"build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.078,
"build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.129,
"build/src/ov_SC03_015/ov_SC03_015.o": 0.166,
"build/src/ov_SC03_015/ov_SC03_015_after.o": 0.664,
"build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.492,
"build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.067,
"build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.103,
"build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.144,
"build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.183,
"build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.136,
"build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.097,
"build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.083,
"build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.249,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.121,
"build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.212,
"build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.138,
"build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.11,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.111,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.136,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.708,
"build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.392,
"build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.166,
"build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.302,
"build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.08,
"build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.146,
"build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.103,
"build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.225,
"build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.256,
"build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.083,
"build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.347,
"build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.077,
"build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.096,
"build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.122,
"build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.123,
"build/src/ov_SC04_011/ov_SC04_011.o": 0.174,
"build/src/ov_SC04_011/ov_SC04_011_after.o": 0.587,
"build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.511,
"build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.067,
"build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.108,
"build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.165,
"build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.189,
"build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.127,
"build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.091,
"build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.107,
"build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.274,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.119,
"build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.226,
"build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.177,
"build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.125,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.157,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.131,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.561,
"build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.343,
"build/src/ov_SC04_011/ov_SC04_011_jr_80171B4C.o": 0.174,
"build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.262,
"build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.076,
"build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.145,
"build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.094,
"build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.183,
"build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.726,
"build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.076,
"build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.09
"build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.244,
"build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.135,
"build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.095,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.127,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.126,
"build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.588,
"build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.368,
"build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.135,
"build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.282,
"build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.086,
"build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.131,
"build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.116,
"build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.264,
"build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.275,
"build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.084,
"build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.405,
"build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.076,
"build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.079,
"build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.086,
"build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.122,
"build/src/ov_SC04_011/ov_SC04_011.o": 0.192,
"build/src/ov_SC04_011/ov_SC04_011_after.o": 0.618,
"build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.536,
"build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.083,
"build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.115,
"build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.175,
"build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.196,
"build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.183,
"build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.151,
"build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.124,
"build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.217,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.103,
"build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.256,
"build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.111,
"build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.12,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.106,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.117,
"build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.597,
"build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.335,
"build/src/ov_SC04_011/ov_SC04_011_jr_80171B4C.o": 0.145,
"build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.249,
"build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.102,
"build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.143,
"build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.119,
"build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.153,
"build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.739,
"build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.069,
"build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.121
},
"ok": true,
"seconds": 3.7
"seconds": 5.9
}
+3
View File
@@ -29230,3 +29230,6 @@
{"ts": "2026-09-10 22:55:24", "label": "s104_d22", "rung": "E", "calib": {"head": "eadfa5977", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_090/ov_SC03_090_jr_8017CA80.c", "fn": "func_80185354", "addr": 2149077844, "aliases": null, "header": false, "includers": 0, "nhash_before": "bd8eed80e5f9e7b97af46c88db18bb78087841d3", "nhash_after": "1c686ae06032aece6dc3c3ac82135933793e7540", "source": "propagate:src/ov_SC03_091/ov_SC03_091_jr_8018326C.c:func_801861FC", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.339, "objects": ["build/src/ov_SC03_090/ov_SC03_090_jr_8017CA80.o"], "before_text": "void func_80185354(s32 a0) {\n s32 ent = a0;\n s32 state = *(u16 *)(ent + 0x34);\n s32 sub;\n register s32 t __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 cnt;\n\n switch (state) {\n case 0:\n t = func_8004787C(*(s32 *)(ent + 0x1C) << 6);\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x18) = t * 7;\n sub = *(s32 *)(ent + 0x20);\n *(s16 *)(sub + 0x1A) = t << 1;\n cnt = *(s32 *)(ent + 0x1C) + 1;\n *(s32 *)(ent + 0x1C) = cnt;\n if (cnt < 0x10) {\n break;\n }\n sub = *(s32 *)(ent + 0x20);\n *(s16 *)(sub + 0x1A) = 0x7000;\n sub = *(s32 *)(ent + 0x20);\n *(s16 *)(sub + 0x1A) = 0x2000;\n *(s32 *)(ent + 0x1C) = 0x40;\n *(u16 *)(ent + 0x34) = *(u16 *)(ent + 0x34) + 1;\n break;\n case 1:\n if (func_8012BEE8(ent) != 0) {\n *(s32 *)(ent + 0x1C) = 0x10;\n *(u16 *)(ent + 0x34) = *(u16 *)(ent + 0x34) + 1;\n }\n break;\n case 2:\n t = func_8004787C(*(s32 *)(ent + 0x1C) << 6);\n sub = *(s32 *)(ent + 0x20);\n *(s16 *)(sub + 0x1A) = t << 1;\n cnt = *(s32 *)(ent + 0x1C) - 1;\n *(s32 *)(ent + 0x1C) = cnt;\n if (cnt == 0) {\n func_8012C218((void *)ent);\n return;\n }\n break;\n }\n\n func_80185484(ent);\n}\n", "after_text": "void func_80185354(s32 ent) {\n s32 t;\n s32 cnt;\n\n switch (*(u16 *)(ent + 0x34)) {\n case 0:\n t = func_8004787C(*(s32 *)(ent + 0x1C) << 6);\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x18) = t * 7;\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A) = t << 1;\n cnt = *(s32 *)(ent + 0x1C) + 1;\n *(s32 *)(ent + 0x1C) = cnt;\n if (cnt < 0x10) {\n break;\n }\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A) = 0x7000;\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A) = 0x2000;\n *(s32 *)(ent + 0x1C) = 0x40;\n *(u16 *)(ent + 0x34) = *(u16 *)(ent + 0x34) + 1;\n break;\n case 1:\n if (func_8012BEE8(ent) != 0) {\n *(s32 *)(ent + 0x1C) = 0x10;\n *(u16 *)(ent + 0x34) = *(u16 *)(ent + 0x34) + 1;\n }\n break;\n case 2:\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A) = func_8004787C(*(s32 *)(ent + 0x1C) << 6) << 1;\n cnt = *(s32 *)(ent + 0x1C) - 1;\n *(s32 *)(ent + 0x1C) = cnt;\n if (cnt == 0) {\n func_8012C218((void *)ent);\n return;\n }\n break;\n }\n\n func_80185484(ent);\n}\n"}
{"ts": "2026-09-10 22:55:33", "label": "s104_d22", "rung": "E", "calib": {"head": "eadfa5977", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_104/ov_SC03_104_jr_80182038.c", "fn": "func_801831E8", "addr": 2149069288, "aliases": null, "header": false, "includers": 0, "nhash_before": "bd8eed80e5f9e7b97af46c88db18bb78087841d3", "nhash_after": "1c686ae06032aece6dc3c3ac82135933793e7540", "source": "propagate:src/ov_SC03_091/ov_SC03_091_jr_8018326C.c:func_801861FC", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.175, "objects": ["build/src/ov_SC03_104/ov_SC03_104_jr_80182038.o"], "before_text": "void func_801831E8(s32 a0) {\n s32 ent = a0;\n s32 state = *(u16 *)(ent + 0x34);\n s32 sub;\n register s32 t __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 cnt;\n\n switch (state) {\n case 0:\n t = func_8004787C(*(s32 *)(ent + 0x1C) << 6);\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x18) = t * 7;\n sub = *(s32 *)(ent + 0x20);\n *(s16 *)(sub + 0x1A) = t << 1;\n cnt = *(s32 *)(ent + 0x1C) + 1;\n *(s32 *)(ent + 0x1C) = cnt;\n if (cnt < 0x10) {\n break;\n }\n sub = *(s32 *)(ent + 0x20);\n *(s16 *)(sub + 0x1A) = 0x7000;\n sub = *(s32 *)(ent + 0x20);\n *(s16 *)(sub + 0x1A) = 0x2000;\n *(s32 *)(ent + 0x1C) = 0x40;\n *(u16 *)(ent + 0x34) = *(u16 *)(ent + 0x34) + 1;\n break;\n case 1:\n if (func_8012BEE8(ent) != 0) {\n *(s32 *)(ent + 0x1C) = 0x10;\n *(u16 *)(ent + 0x34) = *(u16 *)(ent + 0x34) + 1;\n }\n break;\n case 2:\n t = func_8004787C(*(s32 *)(ent + 0x1C) << 6);\n sub = *(s32 *)(ent + 0x20);\n *(s16 *)(sub + 0x1A) = t << 1;\n cnt = *(s32 *)(ent + 0x1C) - 1;\n *(s32 *)(ent + 0x1C) = cnt;\n if (cnt == 0) {\n func_8012C218((void *)ent);\n return;\n }\n break;\n }\n\n func_80183318(ent);\n}\n", "after_text": "void func_801831E8(s32 ent) {\n s32 t;\n s32 cnt;\n\n switch (*(u16 *)(ent + 0x34)) {\n case 0:\n t = func_8004787C(*(s32 *)(ent + 0x1C) << 6);\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x18) = t * 7;\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A) = t << 1;\n cnt = *(s32 *)(ent + 0x1C) + 1;\n *(s32 *)(ent + 0x1C) = cnt;\n if (cnt < 0x10) {\n break;\n }\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A) = 0x7000;\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A) = 0x2000;\n *(s32 *)(ent + 0x1C) = 0x40;\n *(u16 *)(ent + 0x34) = *(u16 *)(ent + 0x34) + 1;\n break;\n case 1:\n if (func_8012BEE8(ent) != 0) {\n *(s32 *)(ent + 0x1C) = 0x10;\n *(u16 *)(ent + 0x34) = *(u16 *)(ent + 0x34) + 1;\n }\n break;\n case 2:\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A) = func_8004787C(*(s32 *)(ent + 0x1C) << 6) << 1;\n cnt = *(s32 *)(ent + 0x1C) - 1;\n *(s32 *)(ent + 0x1C) = cnt;\n if (cnt == 0) {\n func_8012C218((void *)ent);\n return;\n }\n break;\n }\n\n func_80183318(ent);\n}\n"}
{"ts": "2026-09-10 22:55:38", "label": "s104_d22", "rung": "E", "calib": {"head": "eadfa5977", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_089/ov_SC03_089_jr_8017CA80.c", "fn": "func_80185678", "addr": 2149078648, "aliases": null, "header": false, "includers": 0, "nhash_before": "bd8eed80e5f9e7b97af46c88db18bb78087841d3", "nhash_after": "1c686ae06032aece6dc3c3ac82135933793e7540", "source": "propagate:src/ov_SC03_091/ov_SC03_091_jr_8018326C.c:func_801861FC", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.473, "objects": ["build/src/ov_SC03_089/ov_SC03_089_jr_8017CA80.o"], "before_text": "void func_80185678(s32 a0) {\n s32 ent = a0;\n s32 state = *(u16 *)(ent + 0x34);\n s32 sub;\n register s32 t __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 cnt;\n\n switch (state) {\n case 0:\n t = func_8004787C(*(s32 *)(ent + 0x1C) << 6);\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x18) = t * 7;\n sub = *(s32 *)(ent + 0x20);\n *(s16 *)(sub + 0x1A) = t << 1;\n cnt = *(s32 *)(ent + 0x1C) + 1;\n *(s32 *)(ent + 0x1C) = cnt;\n if (cnt < 0x10) {\n break;\n }\n sub = *(s32 *)(ent + 0x20);\n *(s16 *)(sub + 0x1A) = 0x7000;\n sub = *(s32 *)(ent + 0x20);\n *(s16 *)(sub + 0x1A) = 0x2000;\n *(s32 *)(ent + 0x1C) = 0x40;\n *(u16 *)(ent + 0x34) = *(u16 *)(ent + 0x34) + 1;\n break;\n case 1:\n if (func_8012BEE8(ent) != 0) {\n *(s32 *)(ent + 0x1C) = 0x10;\n *(u16 *)(ent + 0x34) = *(u16 *)(ent + 0x34) + 1;\n }\n break;\n case 2:\n t = func_8004787C(*(s32 *)(ent + 0x1C) << 6);\n sub = *(s32 *)(ent + 0x20);\n *(s16 *)(sub + 0x1A) = t << 1;\n cnt = *(s32 *)(ent + 0x1C) - 1;\n *(s32 *)(ent + 0x1C) = cnt;\n if (cnt == 0) {\n func_8012C218((void *)ent);\n return;\n }\n break;\n }\n\n func_801857A8(ent);\n}\n", "after_text": "void func_80185678(s32 ent) {\n s32 t;\n s32 cnt;\n\n switch (*(u16 *)(ent + 0x34)) {\n case 0:\n t = func_8004787C(*(s32 *)(ent + 0x1C) << 6);\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x18) = t * 7;\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A) = t << 1;\n cnt = *(s32 *)(ent + 0x1C) + 1;\n *(s32 *)(ent + 0x1C) = cnt;\n if (cnt < 0x10) {\n break;\n }\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A) = 0x7000;\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A) = 0x2000;\n *(s32 *)(ent + 0x1C) = 0x40;\n *(u16 *)(ent + 0x34) = *(u16 *)(ent + 0x34) + 1;\n break;\n case 1:\n if (func_8012BEE8(ent) != 0) {\n *(s32 *)(ent + 0x1C) = 0x10;\n *(u16 *)(ent + 0x34) = *(u16 *)(ent + 0x34) + 1;\n }\n break;\n case 2:\n *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A) = func_8004787C(*(s32 *)(ent + 0x1C) << 6) << 1;\n cnt = *(s32 *)(ent + 0x1C) - 1;\n *(s32 *)(ent + 0x1C) = cnt;\n if (cnt == 0) {\n func_8012C218((void *)ent);\n return;\n }\n break;\n }\n\n func_801857A8(ent);\n}\n"}
{"ts": "2026-09-10 22:57:04", "label": "s104_d24", "rung": "E", "calib": {"head": "66eafc8a5", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_016/ov_SC02_016_jr_8017DC70.c", "fn": "func_8018003C", "addr": 2149056572, "aliases": null, "header": false, "includers": 0, "nhash_before": "b4500dd7c2e066075034c4b8b67c07456ed3c475", "nhash_after": "2f162956e3247ba63ce54da7d2645664934d4557", "source": ".run/P36/agents/ov_SC02_016__func_8018003C/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.171, "objects": ["build/src/ov_SC02_016/ov_SC02_016_jr_8017DC70.o"], "before_text": "void func_8018003C(s32 arg0)\n{\n register s32 s1 __asm__(\"$17\") = arg0; // !FAKE: pin $17 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n s32 s0;\n s32 v0;\n s32 v1;\n s32 a0;\n register s32 a1 __asm__(\"$5\"); // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n register s32 a2 __asm__(\"$6\"); // !FAKE: pin $6 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n register s32 zr __asm__(\"$0\"); // !FAKE: pin $0 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n\n \n v0 = *(s32 *)(s1 + 0x10);\n v1 = *(s32 *)(s1 + 0x2C);\n a1 = *(s32 *)(s1 + 0x30);\n a2 = *(s32 *)(s1 + 0x34);\n\n \n s0 = *(s32 *)(s1 + 0x20);\n\n \n v0 = v0 + v1;\n *(s32 *)(s1 + 0x10) = v0;\n\n \n v0 = *(s32 *)(s1 + 0x14);\n v1 = *(s32 *)(s1 + 0x18);\n v0 = v0 + a1;\n v1 = v1 + a2;\n *(s32 *)(s1 + 0x14) = v0;\n *(s32 *)(s1 + 0x18) = v1;\n\n \n ((void (*)(void))func_8012931C)();\n\n \n a0 = s0 + zr;\n\n \n v0 = *(u16 *)(s0 + 0x1A);\n v0 = v0 - 0x100;\n *(u16 *)(a0 + 0x1A) = (u16)v0;\n *(u16 *)(a0 + 0x18) = (u16)v0;\n\n \n if (func_80128ED8(a0, (s32 *)(s1 + 0x24)) != 0) {\n func_801292C8((u8 *)s1);\n } else {\n v0 = *(s32 *)(s1 + 0x1C);\n if (v0 != 0) {\n v0--;\n *(s32 *)(s1 + 0x1C) = v0;\n if (v0 == 0) {\n func_801292C8((u8 *)s1);\n }\n }\n }\n}\n", "after_text": "void func_8018003C(s32 arg0)\n{\n s32 obj;\n s32 v;\n s32 timer;\n\n obj = *(s32 *)(arg0 + 0x20);\n *(s32 *)(arg0 + 0x10) += *(s32 *)(arg0 + 0x2C);\n *(s32 *)(arg0 + 0x14) += *(s32 *)(arg0 + 0x30);\n *(s32 *)(arg0 + 0x18) += *(s32 *)(arg0 + 0x34);\n func_8012931C((struct vec *)arg0);\n v = *(u16 *)(obj + 0x1A) - 0x100;\n *(u16 *)(obj + 0x1A) = v;\n *(u16 *)(obj + 0x18) = v;\n if (func_80128ED8(obj, (s32 *)(arg0 + 0x24)) != 0) {\n func_801292C8((u8 *)arg0);\n } else {\n timer = *(s32 *)(arg0 + 0x1C);\n if (timer != 0) {\n timer--;\n *(s32 *)(arg0 + 0x1C) = timer;\n if (timer == 0) {\n func_801292C8((u8 *)arg0);\n }\n }\n }\n}\n"}
{"ts": "2026-09-10 22:57:33", "label": "s104_d24", "rung": "E", "calib": {"head": "66eafc8a5", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c", "fn": "func_80182EB0", "addr": 2149068464, "aliases": null, "header": false, "includers": 0, "nhash_before": "b4500dd7c2e066075034c4b8b67c07456ed3c475", "nhash_after": "2f162956e3247ba63ce54da7d2645664934d4557", "source": "propagate:src/ov_SC02_016/ov_SC02_016_jr_8017DC70.c:func_8018003C", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.248, "objects": ["build/src/ov_SC02_017/ov_SC02_017_jr_8017DF34.o"], "before_text": "void func_80182EB0(s32 arg0)\n{\n register s32 s1 __asm__(\"$17\") = arg0; // !FAKE: pin $17 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n s32 s0;\n s32 v0;\n s32 v1;\n s32 a0;\n register s32 a1 __asm__(\"$5\"); // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n register s32 a2 __asm__(\"$6\"); // !FAKE: pin $6 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n register s32 zr __asm__(\"$0\"); // !FAKE: pin $0 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n\n \n v0 = *(s32 *)(s1 + 0x10);\n v1 = *(s32 *)(s1 + 0x2C);\n a1 = *(s32 *)(s1 + 0x30);\n a2 = *(s32 *)(s1 + 0x34);\n\n \n s0 = *(s32 *)(s1 + 0x20);\n\n \n v0 = v0 + v1;\n *(s32 *)(s1 + 0x10) = v0;\n\n \n v0 = *(s32 *)(s1 + 0x14);\n v1 = *(s32 *)(s1 + 0x18);\n v0 = v0 + a1;\n v1 = v1 + a2;\n *(s32 *)(s1 + 0x14) = v0;\n *(s32 *)(s1 + 0x18) = v1;\n\n \n ((void (*)(void))func_8012931C)();\n\n \n a0 = s0 + zr;\n\n \n v0 = *(u16 *)(s0 + 0x1A);\n v0 = v0 - 0x100;\n *(u16 *)(a0 + 0x1A) = (u16)v0;\n *(u16 *)(a0 + 0x18) = (u16)v0;\n\n \n if (func_80128ED8(a0, (s32 *)(s1 + 0x24)) != 0) {\n func_801292C8((u8 *)s1);\n } else {\n v0 = *(s32 *)(s1 + 0x1C);\n if (v0 != 0) {\n v0--;\n *(s32 *)(s1 + 0x1C) = v0;\n if (v0 == 0) {\n func_801292C8((u8 *)s1);\n }\n }\n }\n}\n", "after_text": "void func_80182EB0(s32 arg0)\n{\n s32 obj;\n s32 v;\n s32 timer;\n\n obj = *(s32 *)(arg0 + 0x20);\n *(s32 *)(arg0 + 0x10) += *(s32 *)(arg0 + 0x2C);\n *(s32 *)(arg0 + 0x14) += *(s32 *)(arg0 + 0x30);\n *(s32 *)(arg0 + 0x18) += *(s32 *)(arg0 + 0x34);\n func_8012931C((struct vec *)arg0);\n v = *(u16 *)(obj + 0x1A) - 0x100;\n *(u16 *)(obj + 0x1A) = v;\n *(u16 *)(obj + 0x18) = v;\n if (func_80128ED8(obj, (s32 *)(arg0 + 0x24)) != 0) {\n func_801292C8((u8 *)arg0);\n } else {\n timer = *(s32 *)(arg0 + 0x1C);\n if (timer != 0) {\n timer--;\n *(s32 *)(arg0 + 0x1C) = timer;\n if (timer == 0) {\n func_801292C8((u8 *)arg0);\n }\n }\n }\n}\n"}
{"ts": "2026-09-10 22:57:36", "label": "s104_d24", "rung": "E", "calib": {"head": "66eafc8a5", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_029/ov_SC03_029_jr_8017FF7C.c", "fn": "func_80181D9C", "addr": 2149064092, "aliases": null, "header": false, "includers": 0, "nhash_before": "b4500dd7c2e066075034c4b8b67c07456ed3c475", "nhash_after": "2f162956e3247ba63ce54da7d2645664934d4557", "source": "propagate:src/ov_SC02_016/ov_SC02_016_jr_8017DC70.c:func_8018003C", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.294, "objects": ["build/src/ov_SC03_029/ov_SC03_029_jr_8017FF7C.o"], "before_text": "void func_80181D9C(s32 arg0)\n{\n register s32 s1 __asm__(\"$17\") = arg0; // !FAKE: pin $17 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 s0;\n s32 v0;\n s32 v1;\n s32 a0;\n register s32 a1 __asm__(\"$5\"); // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register s32 a2 __asm__(\"$6\"); // !FAKE: pin $6 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register s32 zr __asm__(\"$0\"); // !FAKE: pin $0 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n \n v0 = *(s32 *)(s1 + 0x10);\n v1 = *(s32 *)(s1 + 0x2C);\n a1 = *(s32 *)(s1 + 0x30);\n a2 = *(s32 *)(s1 + 0x34);\n\n \n s0 = *(s32 *)(s1 + 0x20);\n\n \n v0 = v0 + v1;\n *(s32 *)(s1 + 0x10) = v0;\n\n \n v0 = *(s32 *)(s1 + 0x14);\n v1 = *(s32 *)(s1 + 0x18);\n v0 = v0 + a1;\n v1 = v1 + a2;\n *(s32 *)(s1 + 0x14) = v0;\n *(s32 *)(s1 + 0x18) = v1;\n\n \n ((void (*)(void))func_8012931C)();\n\n \n a0 = s0 + zr;\n\n \n v0 = *(u16 *)(s0 + 0x1A);\n v0 = v0 - 0x100;\n *(u16 *)(a0 + 0x1A) = (u16)v0;\n *(u16 *)(a0 + 0x18) = (u16)v0;\n\n \n if (func_80128ED8(a0, (s32 *)(s1 + 0x24)) != 0) {\n func_801292C8((u8 *)s1);\n } else {\n v0 = *(s32 *)(s1 + 0x1C);\n if (v0 != 0) {\n v0--;\n *(s32 *)(s1 + 0x1C) = v0;\n if (v0 == 0) {\n func_801292C8((u8 *)s1);\n }\n }\n }\n}\n", "after_text": "void func_80181D9C(s32 arg0)\n{\n s32 obj;\n s32 v;\n s32 timer;\n\n obj = *(s32 *)(arg0 + 0x20);\n *(s32 *)(arg0 + 0x10) += *(s32 *)(arg0 + 0x2C);\n *(s32 *)(arg0 + 0x14) += *(s32 *)(arg0 + 0x30);\n *(s32 *)(arg0 + 0x18) += *(s32 *)(arg0 + 0x34);\n func_8012931C((struct vec *)arg0);\n v = *(u16 *)(obj + 0x1A) - 0x100;\n *(u16 *)(obj + 0x1A) = v;\n *(u16 *)(obj + 0x18) = v;\n if (func_80128ED8(obj, (s32 *)(arg0 + 0x24)) != 0) {\n func_801292C8((u8 *)arg0);\n } else {\n timer = *(s32 *)(arg0 + 0x1C);\n if (timer != 0) {\n timer--;\n *(s32 *)(arg0 + 0x1C) = timer;\n if (timer == 0) {\n func_801292C8((u8 *)arg0);\n }\n }\n }\n}\n"}
+19 -50
View File
@@ -3941,58 +3941,27 @@ extern void func_8012931C(struct vec*);
void func_8018003C(s32 arg0)
{
register s32 s1 __asm__("$17") = arg0; // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus8)
s32 s0;
s32 v0;
s32 v1;
s32 a0;
register s32 a1 __asm__("$5"); // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus8)
register s32 a2 __asm__("$6"); // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B tus8)
register s32 zr __asm__("$0"); // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus8)
s32 obj;
s32 v;
s32 timer;
v0 = *(s32 *)(s1 + 0x10);
v1 = *(s32 *)(s1 + 0x2C);
a1 = *(s32 *)(s1 + 0x30);
a2 = *(s32 *)(s1 + 0x34);
s0 = *(s32 *)(s1 + 0x20);
v0 = v0 + v1;
*(s32 *)(s1 + 0x10) = v0;
v0 = *(s32 *)(s1 + 0x14);
v1 = *(s32 *)(s1 + 0x18);
v0 = v0 + a1;
v1 = v1 + a2;
*(s32 *)(s1 + 0x14) = v0;
*(s32 *)(s1 + 0x18) = v1;
((void (*)(void))func_8012931C)();
a0 = s0 + zr;
v0 = *(u16 *)(s0 + 0x1A);
v0 = v0 - 0x100;
*(u16 *)(a0 + 0x1A) = (u16)v0;
*(u16 *)(a0 + 0x18) = (u16)v0;
if (func_80128ED8(a0, (s32 *)(s1 + 0x24)) != 0) {
func_801292C8((u8 *)s1);
obj = *(s32 *)(arg0 + 0x20);
*(s32 *)(arg0 + 0x10) += *(s32 *)(arg0 + 0x2C);
*(s32 *)(arg0 + 0x14) += *(s32 *)(arg0 + 0x30);
*(s32 *)(arg0 + 0x18) += *(s32 *)(arg0 + 0x34);
func_8012931C((struct vec *)arg0);
v = *(u16 *)(obj + 0x1A) - 0x100;
*(u16 *)(obj + 0x1A) = v;
*(u16 *)(obj + 0x18) = v;
if (func_80128ED8(obj, (s32 *)(arg0 + 0x24)) != 0) {
func_801292C8((u8 *)arg0);
} else {
v0 = *(s32 *)(s1 + 0x1C);
if (v0 != 0) {
v0--;
*(s32 *)(s1 + 0x1C) = v0;
if (v0 == 0) {
func_801292C8((u8 *)s1);
timer = *(s32 *)(arg0 + 0x1C);
if (timer != 0) {
timer--;
*(s32 *)(arg0 + 0x1C) = timer;
if (timer == 0) {
func_801292C8((u8 *)arg0);
}
}
}
+19 -50
View File
@@ -5857,58 +5857,27 @@ extern void func_8012931C(struct vec*);
void func_80182EB0(s32 arg0)
{
register s32 s1 __asm__("$17") = arg0; // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus8)
s32 s0;
s32 v0;
s32 v1;
s32 a0;
register s32 a1 __asm__("$5"); // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus8)
register s32 a2 __asm__("$6"); // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B tus8)
register s32 zr __asm__("$0"); // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus8)
s32 obj;
s32 v;
s32 timer;
v0 = *(s32 *)(s1 + 0x10);
v1 = *(s32 *)(s1 + 0x2C);
a1 = *(s32 *)(s1 + 0x30);
a2 = *(s32 *)(s1 + 0x34);
s0 = *(s32 *)(s1 + 0x20);
v0 = v0 + v1;
*(s32 *)(s1 + 0x10) = v0;
v0 = *(s32 *)(s1 + 0x14);
v1 = *(s32 *)(s1 + 0x18);
v0 = v0 + a1;
v1 = v1 + a2;
*(s32 *)(s1 + 0x14) = v0;
*(s32 *)(s1 + 0x18) = v1;
((void (*)(void))func_8012931C)();
a0 = s0 + zr;
v0 = *(u16 *)(s0 + 0x1A);
v0 = v0 - 0x100;
*(u16 *)(a0 + 0x1A) = (u16)v0;
*(u16 *)(a0 + 0x18) = (u16)v0;
if (func_80128ED8(a0, (s32 *)(s1 + 0x24)) != 0) {
func_801292C8((u8 *)s1);
obj = *(s32 *)(arg0 + 0x20);
*(s32 *)(arg0 + 0x10) += *(s32 *)(arg0 + 0x2C);
*(s32 *)(arg0 + 0x14) += *(s32 *)(arg0 + 0x30);
*(s32 *)(arg0 + 0x18) += *(s32 *)(arg0 + 0x34);
func_8012931C((struct vec *)arg0);
v = *(u16 *)(obj + 0x1A) - 0x100;
*(u16 *)(obj + 0x1A) = v;
*(u16 *)(obj + 0x18) = v;
if (func_80128ED8(obj, (s32 *)(arg0 + 0x24)) != 0) {
func_801292C8((u8 *)arg0);
} else {
v0 = *(s32 *)(s1 + 0x1C);
if (v0 != 0) {
v0--;
*(s32 *)(s1 + 0x1C) = v0;
if (v0 == 0) {
func_801292C8((u8 *)s1);
timer = *(s32 *)(arg0 + 0x1C);
if (timer != 0) {
timer--;
*(s32 *)(arg0 + 0x1C) = timer;
if (timer == 0) {
func_801292C8((u8 *)arg0);
}
}
}
+19 -50
View File
@@ -4034,58 +4034,27 @@ extern void func_8012931C(struct vec*);
void func_80181D9C(s32 arg0)
{
register s32 s1 __asm__("$17") = arg0; // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus9)
s32 s0;
s32 v0;
s32 v1;
s32 a0;
register s32 a1 __asm__("$5"); // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus9)
register s32 a2 __asm__("$6"); // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B tus9)
register s32 zr __asm__("$0"); // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus9)
s32 obj;
s32 v;
s32 timer;
v0 = *(s32 *)(s1 + 0x10);
v1 = *(s32 *)(s1 + 0x2C);
a1 = *(s32 *)(s1 + 0x30);
a2 = *(s32 *)(s1 + 0x34);
s0 = *(s32 *)(s1 + 0x20);
v0 = v0 + v1;
*(s32 *)(s1 + 0x10) = v0;
v0 = *(s32 *)(s1 + 0x14);
v1 = *(s32 *)(s1 + 0x18);
v0 = v0 + a1;
v1 = v1 + a2;
*(s32 *)(s1 + 0x14) = v0;
*(s32 *)(s1 + 0x18) = v1;
((void (*)(void))func_8012931C)();
a0 = s0 + zr;
v0 = *(u16 *)(s0 + 0x1A);
v0 = v0 - 0x100;
*(u16 *)(a0 + 0x1A) = (u16)v0;
*(u16 *)(a0 + 0x18) = (u16)v0;
if (func_80128ED8(a0, (s32 *)(s1 + 0x24)) != 0) {
func_801292C8((u8 *)s1);
obj = *(s32 *)(arg0 + 0x20);
*(s32 *)(arg0 + 0x10) += *(s32 *)(arg0 + 0x2C);
*(s32 *)(arg0 + 0x14) += *(s32 *)(arg0 + 0x30);
*(s32 *)(arg0 + 0x18) += *(s32 *)(arg0 + 0x34);
func_8012931C((struct vec *)arg0);
v = *(u16 *)(obj + 0x1A) - 0x100;
*(u16 *)(obj + 0x1A) = v;
*(u16 *)(obj + 0x18) = v;
if (func_80128ED8(obj, (s32 *)(arg0 + 0x24)) != 0) {
func_801292C8((u8 *)arg0);
} else {
v0 = *(s32 *)(s1 + 0x1C);
if (v0 != 0) {
v0--;
*(s32 *)(s1 + 0x1C) = v0;
if (v0 == 0) {
func_801292C8((u8 *)s1);
timer = *(s32 *)(arg0 + 0x1C);
if (timer != 0) {
timer--;
*(s32 *)(arg0 + 0x1C) = timer;
if (timer == 0) {
func_801292C8((u8 *)arg0);
}
}
}