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https://github.com/Druthulu/BFM-decomp
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feat(decomp): ov_SC02_016/func_801810C8, ov_SC02_021/func_8017ECFC, ov_SC03_117/func_8017E6EC banked — the Block4-typed drafts once the isolator could see the lifted typedef; isolate + tail carve; byte-identical from clean rebuilds (P31 S62 T3)
This commit is contained in:
Drew T
+4
-3
@@ -971,7 +971,7 @@ ov_SC02_016_ELF := $(ov_SC02_016_OUT).elf
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ov_SC02_016_MAPFILE := $(ov_SC02_016_OUT).map
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ov_SC02_016_LD_SCRIPT := $(ov_SC02_016_OUT).ld
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ov_SC02_016_SPLAT_YAML := config/splat.ov_SC02_016.yaml
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ov_SC02_016_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_016.o,ov_SC02_016_jr_8012ACE0.o,tail2.data.o,ov_SC02_016_jr_80135888.o,tail3.data.o,ov_SC02_016_jr_80135A4C.o,tail4.data.o,ov_SC02_016_jr_80135D20.o,tail5.data.o,ov_SC02_016_jr_801380E0.o,ov_SC02_016_o0c.o,tail6.data.o,ov_SC02_016_jr_8013F350.o,tail7.data.o,ov_SC02_016_jr_8013FFD8.o,tail8.data.o,ov_SC02_016_jr_80140608.o,tail9.data.o,ov_SC02_016_jr_8015444C.o,ov_SC02_016_jr_80154C24.o,ov_SC02_016_jr_801588CC.o,ov_SC02_016_jr_80159C84.o,tail10.data.o,ov_SC02_016_jr_8015A3C8.o,tail11.data.o,ov_SC02_016_jr_8015AE2C.o,tail12.data.o,ov_SC02_016_jr_8015C32C.o,tail13.data.o,ov_SC02_016_jr_8016AB6C.o,tail14.data.o,ov_SC02_016_jr_80171B4C.o,ov_SC02_016_jr_801734BC.o,tail15.data.o,ov_SC02_016_jr_801789AC.o,ov_SC02_016_jr_80178D40.o,tail16.data.o,ov_SC02_016_jr_8017A4AC.o,tail17.data.o,ov_SC02_016_jr_8017AE2C.o,ov_SC02_016_jr_8017DC70.o,tail18.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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ov_SC02_016_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_016.o,ov_SC02_016_jr_8012ACE0.o,tail2.data.o,ov_SC02_016_jr_80135888.o,tail3.data.o,ov_SC02_016_jr_80135A4C.o,tail4.data.o,ov_SC02_016_jr_80135D20.o,tail5.data.o,ov_SC02_016_jr_801380E0.o,ov_SC02_016_o0c.o,tail6.data.o,ov_SC02_016_jr_8013F350.o,tail7.data.o,ov_SC02_016_jr_8013FFD8.o,tail8.data.o,ov_SC02_016_jr_80140608.o,tail9.data.o,ov_SC02_016_jr_8015444C.o,ov_SC02_016_jr_80154C24.o,ov_SC02_016_jr_801588CC.o,ov_SC02_016_jr_80159C84.o,tail10.data.o,ov_SC02_016_jr_8015A3C8.o,tail11.data.o,ov_SC02_016_jr_8015AE2C.o,tail12.data.o,ov_SC02_016_jr_8015C32C.o,tail13.data.o,ov_SC02_016_jr_8016AB6C.o,tail14.data.o,ov_SC02_016_jr_80171B4C.o,ov_SC02_016_jr_801734BC.o,tail15.data.o,ov_SC02_016_jr_801789AC.o,ov_SC02_016_jr_80178D40.o,tail16.data.o,ov_SC02_016_jr_8017A4AC.o,tail17.data.o,ov_SC02_016_jr_8017AE2C.o,ov_SC02_016_jr_8017DC70.o,tail18.data.o,ov_SC02_016_jr_801810C8.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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build/src/ov_SC02_016/ov_SC02_016.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
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build/src/ov_SC02_016/ov_SC02_016_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
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build/src/ov_SC02_016/ov_SC02_016_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
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@@ -984,6 +984,7 @@ build/src/ov_SC02_016/ov_SC02_016_jr_80159C84.o: JTBL_PADS := 0,4 # §8e pads (
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build/src/ov_SC02_016/ov_SC02_016_jr_8015AE2C.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
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build/src/ov_SC02_016/ov_SC02_016_jr_8016AB6C.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
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build/src/ov_SC02_016/ov_SC02_016_jr_80178D40.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x178
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build/src/ov_SC02_016/ov_SC02_016_jr_801810C8.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
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build/src/ov_SC02_016/ov_SC02_016_o0c.o: JTBL_PADS := 0,4,4,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x38,+0xa8,+0x118
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ov_SC02_016_CHECK_SHA := config/check.ov_SC02_016.sha
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ov_SC02_016_SYMBOLS := config/symbols.ov_SC02_016.txt
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@@ -1041,7 +1042,7 @@ ov_SC02_021_ELF := $(ov_SC02_021_OUT).elf
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ov_SC02_021_MAPFILE := $(ov_SC02_021_OUT).map
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ov_SC02_021_LD_SCRIPT := $(ov_SC02_021_OUT).ld
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ov_SC02_021_SPLAT_YAML := config/splat.ov_SC02_021.yaml
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ov_SC02_021_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_021.o,ov_SC02_021_jr_8012ACE0.o,tail2.data.o,ov_SC02_021_jr_80135888.o,tail3.data.o,ov_SC02_021_jr_80135A4C.o,tail4.data.o,ov_SC02_021_jr_80135D20.o,tail5.data.o,ov_SC02_021_jr_801380E0.o,ov_SC02_021_o0c.o,tail6.data.o,ov_SC02_021_jr_8013F350.o,tail7.data.o,ov_SC02_021_jr_8013FFD8.o,tail8.data.o,ov_SC02_021_jr_80140608.o,tail9.data.o,ov_SC02_021_jr_8015444C.o,ov_SC02_021_jr_80154C24.o,ov_SC02_021_jr_801588CC.o,ov_SC02_021_jr_80159C84.o,tail10.data.o,ov_SC02_021_jr_8015A3C8.o,tail11.data.o,ov_SC02_021_jr_8015AE2C.o,tail12.data.o,ov_SC02_021_jr_8015C32C.o,tail13.data.o,ov_SC02_021_jr_8016AB6C.o,tail14.data.o,ov_SC02_021_jr_80171B4C.o,ov_SC02_021_jr_801734BC.o,tail15.data.o,ov_SC02_021_jr_801789AC.o,ov_SC02_021_jr_80178D40.o,tail16.data.o,ov_SC02_021_jr_8017A4AC.o,tail17.data.o,ov_SC02_021_jr_8017AE2C.o,ov_SC02_021_jr_8017C294.o,tail18.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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ov_SC02_021_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_021.o,ov_SC02_021_jr_8012ACE0.o,tail2.data.o,ov_SC02_021_jr_80135888.o,tail3.data.o,ov_SC02_021_jr_80135A4C.o,tail4.data.o,ov_SC02_021_jr_80135D20.o,tail5.data.o,ov_SC02_021_jr_801380E0.o,ov_SC02_021_o0c.o,tail6.data.o,ov_SC02_021_jr_8013F350.o,tail7.data.o,ov_SC02_021_jr_8013FFD8.o,tail8.data.o,ov_SC02_021_jr_80140608.o,tail9.data.o,ov_SC02_021_jr_8015444C.o,ov_SC02_021_jr_80154C24.o,ov_SC02_021_jr_801588CC.o,ov_SC02_021_jr_80159C84.o,tail10.data.o,ov_SC02_021_jr_8015A3C8.o,tail11.data.o,ov_SC02_021_jr_8015AE2C.o,tail12.data.o,ov_SC02_021_jr_8015C32C.o,tail13.data.o,ov_SC02_021_jr_8016AB6C.o,tail14.data.o,ov_SC02_021_jr_80171B4C.o,ov_SC02_021_jr_801734BC.o,tail15.data.o,ov_SC02_021_jr_801789AC.o,ov_SC02_021_jr_80178D40.o,tail16.data.o,ov_SC02_021_jr_8017A4AC.o,tail17.data.o,ov_SC02_021_jr_8017AE2C.o,ov_SC02_021_jr_8017C294.o,tail18.data.o,ov_SC02_021_jr_8017ECFC.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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build/src/ov_SC02_021/ov_SC02_021.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
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build/src/ov_SC02_021/ov_SC02_021_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
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build/src/ov_SC02_021/ov_SC02_021_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
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@@ -2761,7 +2762,7 @@ ov_SC03_117_ELF := $(ov_SC03_117_OUT).elf
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ov_SC03_117_MAPFILE := $(ov_SC03_117_OUT).map
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ov_SC03_117_LD_SCRIPT := $(ov_SC03_117_OUT).ld
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ov_SC03_117_SPLAT_YAML := config/splat.ov_SC03_117.yaml
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ov_SC03_117_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_117.o,ov_SC03_117_jr_8012ACE0.o,tail2.data.o,ov_SC03_117_jr_80135888.o,tail3.data.o,ov_SC03_117_jr_80135A4C.o,tail4.data.o,ov_SC03_117_jr_80135D20.o,tail5.data.o,ov_SC03_117_jr_801380E0.o,ov_SC03_117_o0c.o,tail6.data.o,ov_SC03_117_jr_8013F350.o,tail7.data.o,ov_SC03_117_jr_8013FFD8.o,tail8.data.o,ov_SC03_117_jr_80140608.o,tail9.data.o,ov_SC03_117_jr_8015444C.o,ov_SC03_117_jr_80154C24.o,ov_SC03_117_jr_801588CC.o,ov_SC03_117_jr_80159C84.o,tail10.data.o,ov_SC03_117_jr_8015A3C8.o,tail11.data.o,ov_SC03_117_jr_8015AE2C.o,tail12.data.o,ov_SC03_117_jr_8015C32C.o,tail13.data.o,ov_SC03_117_jr_8016AB6C.o,tail14.data.o,ov_SC03_117_jr_80171B4C.o,ov_SC03_117_jr_801734BC.o,tail15.data.o,ov_SC03_117_jr_801789AC.o,ov_SC03_117_jr_80178D40.o,tail16.data.o,ov_SC03_117_jr_8017A4AC.o,tail17.data.o,ov_SC03_117_jr_8017AE2C.o,ov_SC03_117_jr_8017BEBC.o,tail18.data.o,ov_SC03_117_jr_80181C80.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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ov_SC03_117_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_117.o,ov_SC03_117_jr_8012ACE0.o,tail2.data.o,ov_SC03_117_jr_80135888.o,tail3.data.o,ov_SC03_117_jr_80135A4C.o,tail4.data.o,ov_SC03_117_jr_80135D20.o,tail5.data.o,ov_SC03_117_jr_801380E0.o,ov_SC03_117_o0c.o,tail6.data.o,ov_SC03_117_jr_8013F350.o,tail7.data.o,ov_SC03_117_jr_8013FFD8.o,tail8.data.o,ov_SC03_117_jr_80140608.o,tail9.data.o,ov_SC03_117_jr_8015444C.o,ov_SC03_117_jr_80154C24.o,ov_SC03_117_jr_801588CC.o,ov_SC03_117_jr_80159C84.o,tail10.data.o,ov_SC03_117_jr_8015A3C8.o,tail11.data.o,ov_SC03_117_jr_8015AE2C.o,tail12.data.o,ov_SC03_117_jr_8015C32C.o,tail13.data.o,ov_SC03_117_jr_8016AB6C.o,tail14.data.o,ov_SC03_117_jr_80171B4C.o,ov_SC03_117_jr_801734BC.o,tail15.data.o,ov_SC03_117_jr_801789AC.o,ov_SC03_117_jr_80178D40.o,tail16.data.o,ov_SC03_117_jr_8017A4AC.o,tail17.data.o,ov_SC03_117_jr_8017AE2C.o,ov_SC03_117_jr_8017BEBC.o,tail18.data.o,ov_SC03_117_jr_8017E6EC.o,tail19.data.o,ov_SC03_117_jr_80181C80.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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build/src/ov_SC03_117/ov_SC03_117.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
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build/src/ov_SC03_117/ov_SC03_117_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
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build/src/ov_SC03_117/ov_SC03_117_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
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@@ -121,6 +121,7 @@ segments:
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- [0x52354, c, ov_SC02_016_jr_8017A4AC]
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- [0x52cd4, c, ov_SC02_016_jr_8017AE2C]
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- [0x55b18, c, ov_SC02_016_jr_8017DC70]
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- [0x58f70, c, ov_SC02_016_jr_801810C8]
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- [0x5c2d8, data, tail]
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- [0x89920, .rodata, ov_SC02_016] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x899fc, .rodata, ov_SC02_016_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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@@ -164,6 +165,8 @@ segments:
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- [0x8aa40, .rodata, ov_SC02_016_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x8aa54, .rodata, ov_SC02_016_jr_8017DC70] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x8aa74, data, tail18]
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- [0x8aa7c, .rodata, ov_SC02_016_jr_801810C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x8aaac, data, tail19]
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- [0x8C97C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
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- [0x8C97F] # EOF marker = the 0.4.dec byte length
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# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
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@@ -121,6 +121,7 @@ segments:
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- [0x52354, c, ov_SC02_021_jr_8017A4AC]
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- [0x52cd4, c, ov_SC02_021_jr_8017AE2C]
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- [0x5413c, c, ov_SC02_021_jr_8017C294]
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- [0x56ba4, c, ov_SC02_021_jr_8017ECFC]
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- [0x57924, data, tail]
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- [0x686bc, .rodata, ov_SC02_021] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x68798, .rodata, ov_SC02_021_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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@@ -164,6 +165,8 @@ segments:
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- [0x697dc, .rodata, ov_SC02_021_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x697f0, .rodata, ov_SC02_021_jr_8017C294] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x69810, data, tail18]
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- [0x69830, .rodata, ov_SC02_021_jr_8017ECFC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x69848, data, tail19]
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- [0x6B744, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
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- [0x6B747] # EOF marker = the 0.4.dec byte length
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# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
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@@ -121,6 +121,7 @@ segments:
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- [0x52354, c, ov_SC03_117_jr_8017A4AC]
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- [0x52cd4, c, ov_SC03_117_jr_8017AE2C]
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- [0x53d64, c, ov_SC03_117_jr_8017BEBC]
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- [0x56594, c, ov_SC03_117_jr_8017E6EC]
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- [0x59b28, c, ov_SC03_117_jr_80181C80]
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- [0x5c718, data, tail]
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- [0xa3c1c, .rodata, ov_SC03_117] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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@@ -165,8 +166,10 @@ segments:
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- [0xa4d3c, .rodata, ov_SC03_117_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0xa4d50, .rodata, ov_SC03_117_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0xa4d70, data, tail18]
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- [0xa4d88, .rodata, ov_SC03_117_jr_8017E6EC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0xa4da0, data, tail19]
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- [0xa4db0, .rodata, ov_SC03_117_jr_80181C80] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0xa4e40, data, tail19]
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- [0xa4e40, data, tail20]
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- [0xA67EC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
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- [0xA67EF] # EOF marker = the 0.4.dec byte length
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# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -3762,572 +3762,3 @@ void func_8017E940(s32 a0) {
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INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021_jr_8017C294", func_8017EA5C);
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INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021_jr_8017C294", func_8017EB00);
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INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021_jr_8017C294", func_8017ECFC);
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extern void (*D_8018389C[])(void);
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void func_8017EDE8(void *a0) {
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D_8018389C[*(u16 *)((s32)a0 + 0x2)]();
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}
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extern void func_80178CBC(s32 a0, s32 a1);
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extern short D_80183884;
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void func_8017EE24(void * arg0) {
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*(short *)((char *)arg0 + 0x2) = 2;
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func_80178CBC((int)arg0, (int)&D_80183884);
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}
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s32 func_8017EE50(void) {
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extern s32 D_80193744;
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return !(D_80193744 ^ 1);
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}
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extern void func_800291F0(s32 a0, s32 a1);
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extern void func_80029514(s32 a0);
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extern void func_80162714(void);
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extern u16 D_80078EAC;
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extern u8 D_80078EB1;
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extern u8 D_80078EB0;
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void func_8017EE68(void) {
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||||
func_800291F0(0, D_80078EAC * 1440 + D_80078EB1 * 60 + D_80078EB0);
|
||||
func_80029514(0x104);
|
||||
func_80162714();
|
||||
}
|
||||
|
||||
|
||||
extern void func_80029514(s32 arg);
|
||||
void func_8017EED8(void) {
|
||||
func_80029514(0xFA);
|
||||
}
|
||||
|
||||
|
||||
extern void func_80029124(s32 a0, s32 a1);
|
||||
extern void func_80029514(s32 a0);
|
||||
|
||||
void func_8017EEF8(void) {
|
||||
func_80029514(0x118);
|
||||
func_80029124(0xF9, 1);
|
||||
func_80029124(0xFA, 0);
|
||||
func_80029124(0x109, 1);
|
||||
}
|
||||
|
||||
|
||||
extern void func_80029514(s32 a0);
|
||||
extern void func_80029124(s32 a0, s32 a1);
|
||||
extern s32 func_801788B8(s32 a0, s32 a1);
|
||||
extern s32 func_8017F1B4(s32 a0);
|
||||
|
||||
void func_8017EF3C(s32 arg0) {
|
||||
func_80029514(0x118);
|
||||
func_80029124(0xF9, 0);
|
||||
func_80029124(0xFA, 1);
|
||||
func_801788B8(arg0, (s32)func_8017F1B4);
|
||||
}
|
||||
|
||||
|
||||
extern void func_800D0F4C(s32 arg);
|
||||
void func_8017EF90(void) {
|
||||
func_800D0F4C(0x57);
|
||||
}
|
||||
|
||||
|
||||
extern s32 func_80029204(s32 a0);
|
||||
extern void func_80162760(void);
|
||||
extern u8 D_80193528[];
|
||||
|
||||
s32 func_8017EFB0(void) {
|
||||
s32 s0 = func_80029204(0);
|
||||
s32 v1;
|
||||
if (s0 == 0)
|
||||
return 1;
|
||||
func_80162760();
|
||||
v1 = *(s32 *)D_80193528;
|
||||
if (v1 < s0)
|
||||
v1 += 0x80520;
|
||||
return (v1 - s0) < 0x2D0;
|
||||
}
|
||||
|
||||
|
||||
void func_8017F014(void) {
|
||||
extern u16 D_80078EAC;
|
||||
extern u8 D_80078EB0;
|
||||
extern u8 D_80078EB1;
|
||||
extern u8 D_80193528[];
|
||||
*(s32 *)D_80193528 = D_80078EAC * 1440 + D_80078EB1 * 60 + D_80078EB0;
|
||||
}
|
||||
|
||||
|
||||
extern int func_80178970(void);
|
||||
extern s32 D_801835A4;
|
||||
extern void (*D_8018DC00)(void *);
|
||||
extern void func_8012A828(s32 a0, void *a1);
|
||||
extern void func_8012E8E0(s32 a0, s32 a1);
|
||||
extern void func_80178D18(void);
|
||||
|
||||
void func_8017F064(arg0)
|
||||
void *arg0;
|
||||
{
|
||||
extern int func_80178970(void);
|
||||
extern void func_80178D18(void);
|
||||
extern void func_8012E8E0(s32 a0, s32 a1);
|
||||
extern void func_8012A828(s32 a0, void *a1);
|
||||
extern s32 D_801835A4;
|
||||
extern void (*D_8018DC00)(void *);
|
||||
|
||||
if (func_80178970() != 0) {
|
||||
((void (*)(s32))func_80178D18)((s32)arg0);
|
||||
*(s16 *)((s32)arg0 + 2) = 1;
|
||||
func_8012E8E0((s32)arg0, (s32)&D_801835A4);
|
||||
func_8012A828((s32)arg0, (s32)&D_8018DC00);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
extern void func_8012CAE4(void *a0);
|
||||
extern s32 func_8012C1B8(void);
|
||||
extern void func_8001C214(s32 a0, s32 a1);
|
||||
extern void func_8012A828(s32 a0, void *a1);
|
||||
extern void func_8012E8E0(s32 a0, s32 a1);
|
||||
extern s16 D_801902A0;
|
||||
extern s32 D_801835A4;
|
||||
extern void (*D_8018DC00)(void *);
|
||||
|
||||
void func_8017F0C4(s32 param) {
|
||||
s32 x;
|
||||
s32 v1;
|
||||
|
||||
x = func_80029504();
|
||||
if (x < 0xF0) { v1 = 0; goto chk; }
|
||||
if (x < 0xFA) { v1 = 1; goto chk; }
|
||||
if (x < 0x104) { v1 = 2; goto chk; }
|
||||
if (x < 0x10E) { v1 = 3; goto chk; }
|
||||
if (x < 0x118) { v1 = 4; } else { v1 = 5; }
|
||||
chk:
|
||||
if (v1 == 0 || v1 == 5) {
|
||||
func_8012CAE4((void *)param);
|
||||
return;
|
||||
}
|
||||
*(s32 *)(param + 0x20) = func_8012C1B8();
|
||||
if (*(s32 *)(param + 0x20) == 0) {
|
||||
func_8012CAE4((void *)param);
|
||||
}
|
||||
func_8001C214(*(s32 *)(param + 0x20), (s32)&D_801902A0);
|
||||
*(u16 *)(param + 0x2) = 1;
|
||||
func_8012E8E0(param, (s32)&D_801835A4);
|
||||
func_8012A828(param, (void *)&D_8018DC00);
|
||||
*(u16 *)(*(s32 *)(param + 0x68) + 0xC) = 0x7FFF;
|
||||
}
|
||||
|
||||
|
||||
extern s32 func_8012BD14(s32 a0);
|
||||
extern s32 func_80178BF8();
|
||||
extern void func_80172710(void);
|
||||
|
||||
s32 func_8017F1B4(s32 param_1) {
|
||||
register s32 obj __asm__("$16") = param_1;
|
||||
s32 ptr;
|
||||
s32 ptr2;
|
||||
s32 result;
|
||||
|
||||
ptr = *(s32 *)((char *)obj + 0x64);
|
||||
if (*(u16 *)((char *)ptr + 0x2) != 1) {
|
||||
return 0;
|
||||
}
|
||||
result = func_8012BD14(ptr);
|
||||
if (result < 0x4001) {
|
||||
ptr2 = *(s32 *)((char *)obj + 0x64);
|
||||
*(u16 *)((char *)ptr2 + 0x2) = 3;
|
||||
func_80178BF8();
|
||||
return (s32)func_80172710;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
s32 func_8017F220(void) {
|
||||
return 0x19;
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern void (*D_8018393C[])(void);
|
||||
|
||||
void func_8017F228(void *a0) {
|
||||
D_8018393C[*(u16 *)((s32)a0 + 0x2)]();
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021_jr_8017C294", func_8017F264);
|
||||
|
||||
typedef struct {
|
||||
u8 r; /* 0x00 */
|
||||
u8 g; /* 0x01 */
|
||||
u8 b; /* 0x02 */
|
||||
u8 cd; /* 0x03 */
|
||||
} Col4_8017F2FC;
|
||||
|
||||
typedef struct {
|
||||
s32 unk0; /* 0x00 */
|
||||
s16 unk4; /* 0x04 */
|
||||
s16 unk6; /* 0x06 */
|
||||
} Gte8_8017F2FC;
|
||||
|
||||
extern void func_8012EFB8(s32 a0);
|
||||
extern void func_80015954(s32 a0, s32 a1);
|
||||
|
||||
void func_8017F2FC(s32 a0) {
|
||||
Gte8_8017F2FC sp10;
|
||||
Col4_8017F2FC col;
|
||||
s32 *owner;
|
||||
s32 t;
|
||||
|
||||
extern u16 D_800B99DA;
|
||||
extern Col4_8017F2FC D_801838BC;
|
||||
extern Col4_8017F2FC D_801838D8;
|
||||
extern Col4_8017F2FC D_801838F4;
|
||||
extern Col4_8017F2FC D_80183910;
|
||||
|
||||
owner = *(s32 **)(a0 + 0x20);
|
||||
|
||||
if (((s32 (*)(s32, s32))func_8012EFB8)(a0 + 0xFC, (s32)&sp10) & ~0x1000) {
|
||||
owner[1] |= 0x80000000;
|
||||
} else {
|
||||
owner[1] &= 0x7FFFFFFF;
|
||||
}
|
||||
|
||||
func_80015954((s32)&sp10, a0 + 4);
|
||||
|
||||
t = (D_800B99DA & 1) << 2;
|
||||
col.r = t + 0x40;
|
||||
col.g = t + 0x40;
|
||||
col.b = t + 0x60;
|
||||
|
||||
D_801838BC = col;
|
||||
D_801838D8 = col;
|
||||
D_801838F4 = col;
|
||||
D_80183910 = col;
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern void (*D_80183944[])(void);
|
||||
|
||||
void func_8017F40C(void *a0) {
|
||||
D_80183944[*(u16 *)((s32)a0 + 0x2)]();
|
||||
}
|
||||
|
||||
|
||||
extern s32 func_8012AD50(void *a0);
|
||||
void func_8017F448(void) {
|
||||
((s32 (*)(void))func_8012AD50)();
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021_jr_8017C294", func_8017F468);
|
||||
|
||||
|
||||
extern void (*D_80183950[])(void);
|
||||
|
||||
void func_8017F590(void *a0) {
|
||||
D_80183950[*(u16 *)((s32)a0 + 0x2)]();
|
||||
}
|
||||
|
||||
|
||||
void func_8017F5CC(void *a0) {
|
||||
*(short *)((char *)a0 + 0x2) = *(unsigned short *)((char *)a0 + 0x2) + 1;
|
||||
*(int *)((char *)a0 + 0x14) = 0x20000;
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021_jr_8017C294", func_8017F5E4);
|
||||
|
||||
extern void func_80015978(s32 a0, s32 *a1);
|
||||
extern s32 func_8012EF34(s32 a0, s32 a1);
|
||||
extern void func_80017D98(void *a0);
|
||||
extern void func_8001739C(void *a0);
|
||||
|
||||
extern s16 D_8018395C;
|
||||
extern s16 D_80183964;
|
||||
extern s16 D_8018396C;
|
||||
extern s16 D_80183958;
|
||||
extern s16 D_80183960;
|
||||
extern s16 D_80183968;
|
||||
|
||||
#define gte_ldv3(r0, r1, r2) __asm__ volatile ( \
|
||||
"lwc2 $0, 0( %0 );" \
|
||||
"lwc2 $1, 4( %0 );" \
|
||||
"lwc2 $2, 0( %1 );" \
|
||||
"lwc2 $3, 4( %1 );" \
|
||||
"lwc2 $4, 0( %2 );" \
|
||||
"lwc2 $5, 4( %2 )" \
|
||||
: \
|
||||
: "r"( r0 ), "r"( r1 ), "r"( r2 ) )
|
||||
|
||||
#define gte_rtpt() __asm__ volatile ("nop;nop;rtpt")
|
||||
|
||||
#define gte_stsxy3(r0, r1, r2) __asm__ volatile ( \
|
||||
"swc2 $12, 0( %0 );" \
|
||||
"swc2 $13, 0( %1 );" \
|
||||
"swc2 $14, 0( %2 )" \
|
||||
: \
|
||||
: "r"( r0 ), "r"( r1 ), "r"( r2 ) \
|
||||
: "memory" )
|
||||
|
||||
#define gte_stszotz(r0) __asm__ volatile ( \
|
||||
"mfc2 $12, $19;" \
|
||||
"nop;" \
|
||||
"sra $12, $12, 2;" \
|
||||
"sw $12, 0( %0 )" \
|
||||
: \
|
||||
: "r"( r0 ) \
|
||||
: "$12", "memory" )
|
||||
|
||||
#define gte_stflg(r0) __asm__ volatile ( \
|
||||
"cfc2 $12, $31;" \
|
||||
"nop;" \
|
||||
"sw $12, 0( %0 )" \
|
||||
: \
|
||||
: "r"( r0 ) \
|
||||
: "$12", "memory" )
|
||||
|
||||
#define gte_SetRotMatrix(r0) __asm__ volatile ( \
|
||||
"lw $12, 0( %0 );" \
|
||||
"lw $13, 4( %0 );" \
|
||||
"ctc2 $12, $0;" \
|
||||
"ctc2 $13, $1;" \
|
||||
"lw $12, 8( %0 );" \
|
||||
"lw $13, 12( %0 );" \
|
||||
"lw $14, 16( %0 );" \
|
||||
"ctc2 $12, $2;" \
|
||||
"ctc2 $13, $3;" \
|
||||
"ctc2 $14, $4" \
|
||||
: \
|
||||
: "r"( r0 ) \
|
||||
: "$12", "$13", "$14" )
|
||||
|
||||
#define gte_SetTransMatrix(r0) __asm__ volatile ( \
|
||||
"lw $12, 20( %0 );" \
|
||||
"lw $13, 24( %0 );" \
|
||||
"ctc2 $12, $5;" \
|
||||
"lw $14, 28( %0 );" \
|
||||
"ctc2 $13, $6;" \
|
||||
"ctc2 $14, $7" \
|
||||
: \
|
||||
: "r"( r0 ) \
|
||||
: "$12", "$13", "$14" )
|
||||
|
||||
typedef struct {
|
||||
s16 x; /* +0x0 */
|
||||
s16 y; /* +0x2 */
|
||||
s16 c; /* +0x4 */
|
||||
s16 pad; /* +0x6 */
|
||||
} Vtx_8017F6A8; /* 0x08 */
|
||||
|
||||
typedef struct {
|
||||
Vtx_8017F6A8 v[3]; /* +0x00 +0x08 +0x10 */
|
||||
u8 r0, g0, b0, code; /* +0x18 .. +0x1B */
|
||||
u8 r1, g1, b1, pad1; /* +0x1C .. +0x1F */
|
||||
u8 r2, g2, b2, pad2; /* +0x20 .. +0x23 */
|
||||
u32 color; /* +0x24 */
|
||||
} Prim_8017F6A8; /* 0x28 */
|
||||
|
||||
typedef struct {
|
||||
u16 x; /* +0x0 */
|
||||
u16 y; /* +0x2 */
|
||||
u16 z; /* +0x4 */
|
||||
} Pos_8017F6A8; /* 0x06 -> 8-byte frame stride */
|
||||
|
||||
typedef struct {
|
||||
u16 vx; /* +0x0 */
|
||||
u16 vy; /* +0x2 */
|
||||
u16 vz; /* +0x4 */
|
||||
u16 pad; /* +0x6 */
|
||||
} Sxy_8017F6A8; /* 0x08 */
|
||||
|
||||
typedef struct {
|
||||
s16 m[3][3]; /* +0x00, padded to 0x14 */
|
||||
s32 t[3]; /* +0x14 +0x18 +0x1C */
|
||||
} Mtx_8017F6A8; /* 0x20 */
|
||||
|
||||
void func_8017F6A8(s32 arg0)
|
||||
{
|
||||
Prim_8017F6A8 prim; /* sp+0x10 */
|
||||
Pos_8017F6A8 wpos; /* sp+0x38 */
|
||||
Pos_8017F6A8 spos; /* sp+0x40 */
|
||||
Sxy_8017F6A8 sxy[4]; /* sp+0x48 */
|
||||
Mtx_8017F6A8 mtx; /* sp+0x68 */
|
||||
s32 otz; /* sp+0x88 */
|
||||
s32 flag; /* sp+0x8C */
|
||||
s32 t;
|
||||
|
||||
func_80015978(arg0 + 4, (s32 *)&wpos);
|
||||
if ((func_8012EF34((s32)&wpos, (s32)&spos) & ~0x1000) == 0) {
|
||||
gte_stszotz(&otz);
|
||||
D_8018395C = spos.z;
|
||||
D_80183964 = spos.z;
|
||||
D_8018396C = spos.z;
|
||||
func_80017D98(&mtx);
|
||||
mtx.t[2] = 0;
|
||||
mtx.t[1] = 0;
|
||||
mtx.t[0] = 0;
|
||||
gte_SetRotMatrix(&mtx);
|
||||
gte_SetTransMatrix(&mtx);
|
||||
gte_ldv3(&D_80183958, &D_80183960, &D_80183968);
|
||||
gte_rtpt();
|
||||
gte_stsxy3(&sxy[0], &sxy[1], &sxy[2]);
|
||||
gte_stflg(&flag);
|
||||
if (flag >= 0) {
|
||||
prim.b0 = 0xC0;
|
||||
prim.g0 = 0xC0;
|
||||
prim.r0 = 0xC0;
|
||||
prim.b1 = 0x40;
|
||||
prim.g1 = 0x20;
|
||||
prim.r1 = 0x20;
|
||||
prim.b2 = 0x40;
|
||||
prim.g2 = 0x20;
|
||||
prim.r2 = 0x20;
|
||||
prim.color = 0x50000000;
|
||||
prim.v[0].x = sxy[0].vx + spos.x;
|
||||
prim.v[0].y = sxy[0].vy + spos.y;
|
||||
prim.v[1].x = sxy[1].vx + spos.x;
|
||||
prim.v[1].y = sxy[1].vy + spos.y;
|
||||
prim.v[2].x = sxy[2].vx + spos.x;
|
||||
prim.v[2].y = sxy[2].vy + spos.y;
|
||||
prim.v[0].c = otz;
|
||||
func_8001739C(&prim);
|
||||
t = sxy[1].vy;
|
||||
prim.v[1].y = spos.y - t;
|
||||
func_8001739C(&prim);
|
||||
t = sxy[2].vx;
|
||||
prim.v[2].x = spos.x - t;
|
||||
func_8001739C(&prim);
|
||||
prim.v[1].y = sxy[1].vy + spos.y;
|
||||
func_8001739C(&prim);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern void (*D_80183970[])(void);
|
||||
|
||||
void func_8017F8C8(void *a0) {
|
||||
D_80183970[*(u16 *)((s32)a0 + 0x2)]();
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern void func_8001CD50(s32 a0, s32 a1);
|
||||
extern void func_800233CC(void *, unsigned short);
|
||||
|
||||
void func_8017F904(void *a0)
|
||||
{
|
||||
|
||||
extern u8 D_80193530[];
|
||||
s32 s1;
|
||||
u8 *p;
|
||||
|
||||
s1 = *(s32 *)((s32)a0 + 0x20);
|
||||
p = D_80193530 + *(s32 *)((s32)a0 + 0x2C) * 0x40;
|
||||
func_8001CD50(s1, (s32)p);
|
||||
*(s16 *)(s1 + 0x1E) = 0xCCC;
|
||||
*(s16 *)(s1 + 0x10) = 0x400;
|
||||
*(s16 *)(s1 + 0x1A) = 0;
|
||||
*(s16 *)(s1 + 0x18) = 0;
|
||||
*(s32 *)(s1 + 4) = *(s32 *)(s1 + 4) | 0x50000000;
|
||||
func_800233CC(p, 0x80);
|
||||
p[2] = 0xFF;
|
||||
p[1] = 0xFF;
|
||||
p[0] = 0xFF;
|
||||
p[5] = 0x40;
|
||||
p[4] = 0x40;
|
||||
p[6] = 0x80;
|
||||
*(s32 *)((s32)a0 + 0x1C) = 0x10;
|
||||
*(u16 *)((s32)a0 + 2) = *(u16 *)((s32)a0 + 2) + 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* Declaration reconciliation with src/ov_SC03_118/ov_SC03_118_jr_8017FB84.c:
|
||||
* - D_80193530: the TU already declares it at line 4526 as `extern u8 D_80193530[];`
|
||||
* (used by the banked func_801885D0 just above the splice point). The draft had
|
||||
* `extern s32 D_80193530[]` -> "conflicting types". Lever (A): conform the decl
|
||||
* VERBATIM and keep the disagreement at the use site, which already casts the
|
||||
* decayed pointer to s32. Zero bytes change.
|
||||
* - func_801292C8: not declared anywhere in this TU, but src/shared/engine_core.h
|
||||
* declares it as `extern void func_801292C8(u8 *a0);` inside four DEFINE_ macros
|
||||
* (6304/8491/13623/13794). None of those macros is expanded in this TU today, but
|
||||
* conforming to that shape now makes the splice conflict-proof if one ever is.
|
||||
* $a0 already holds the incoming pointer, so passing it costs no instruction
|
||||
* (jal + nop delay slot, exactly as in the target).
|
||||
*/
|
||||
|
||||
extern void func_801292C8(u8 *a0);
|
||||
|
||||
void func_8017F9C8(void *a0) {
|
||||
|
||||
extern u8 D_80193530[];
|
||||
s32 v0;
|
||||
s32 v1;
|
||||
s32 a1;
|
||||
s32 a2;
|
||||
u8 *v1ptr;
|
||||
|
||||
v0 = *(s32 *)((s32)a0 + 0x1C);
|
||||
v1 = *(s32 *)((s32)a0 + 0x2C);
|
||||
a1 = v0 - 1;
|
||||
/* §21 zero-byte re-tie barrier: without it gcc's scheduler hoists the 0x2C load
|
||||
* (and its sll) ahead of the 0x1C load + addiu pair -- the 4-slot SCHEDULE-REORDER
|
||||
* residual. Folding the shift into the address expression fixes the order but then
|
||||
* swaps $v0/$v1 across the sll/lui pair (REGALLOC-PERM). The re-tie keeps the
|
||||
* in-place `v1 <<= 6` form (so the shift stays in $v1) AND anchors it after the
|
||||
* two loads. Emits no code. */
|
||||
__asm__ __volatile__("" : "=r"(v1) : "0"(v1));
|
||||
v1 = v1 << 6;
|
||||
a2 = (s32)D_80193530 + v1;
|
||||
v1ptr = *(u8 **)((s32)a0 + 0x20);
|
||||
|
||||
*(s32 *)((s32)a0 + 0x1C) = a1;
|
||||
|
||||
if (!(a1 == -1)) {
|
||||
v0 = 0x10 - a1;
|
||||
*(u16 *)((s32)v1ptr + 0x1A) = v0 << 8;
|
||||
*(u16 *)((s32)v1ptr + 0x18) = v0 << 8;
|
||||
|
||||
v1 = *(s32 *)((s32)a0 + 0x1C);
|
||||
v0 = (v1 << 8) - v1;
|
||||
if (v0 < 0) {
|
||||
v0 = v0 + 0xF;
|
||||
}
|
||||
v0 = (u32)v0 >> 4;
|
||||
|
||||
*(u8 *)(a2 + 0x2) = v0;
|
||||
*(u8 *)(a2 + 0x1) = v0;
|
||||
*(u8 *)(a2 + 0x0) = v0;
|
||||
|
||||
v0 = *(s32 *)((s32)a0 + 0x1C) << 2;
|
||||
*(u8 *)(a2 + 0x5) = v0;
|
||||
*(u8 *)(a2 + 0x4) = v0;
|
||||
|
||||
*(u8 *)(a2 + 0x6) = *(s32 *)((s32)a0 + 0x1C) << 3;
|
||||
} else {
|
||||
func_801292C8((u8 *)a0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user