mirror of
https://github.com/Druthulu/BFM-decomp
synced 2026-10-05 08:57:59 -04:00
phase-36: S104 s104_d15 — func_8017FD6C banked at 0 through the whole-object gate + propagated — d15 copy, s16 local form (a file-scope s32 prototype)
This commit is contained in:
Drew T
+186
-186
@@ -1,7 +1,7 @@
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{
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@@ -21,207 +21,207 @@
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|
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},
|
||||
"ok": true,
|
||||
"seconds": 27.6
|
||||
"seconds": 3.9
|
||||
}
|
||||
|
||||
@@ -29191,3 +29191,4 @@
|
||||
{"ts": "2026-09-10 22:18:51", "label": "s104_d15", "rung": "E", "calib": {"head": "e936a63ac", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c", "fn": "func_8018594C", "addr": 2149079372, "aliases": null, "header": false, "includers": 0, "nhash_before": "1634b20506bdf50fb2037aebdfdd0826f30fb8d1", "nhash_after": "043f2406f09b2be2ad069a1fb6757cae793456dd", "source": ".run/P36/agents/ov_SC03_006__func_8018594C/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.712, "objects": ["build/src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.o"], "before_text": "u8 * func_8018594C(s32 a0, s32 a1, s32 a2) {\n s32 s0 = a2;\n register s32 s2 __asm__(\"$18\") = a0; // !FAKE: pin $18 \u2014 NEEDED DIFFERS (P36 rung B tus7)\n u8 *s1;\n u8 *ret;\n register s32 v1 __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus7)\n\n s1 = func_801290DC(0x17, (u8 *)a1);\n\n if (!s1) {\n return NULL;\n }\n\n s0 = *(s32 *)((char *)s1 + 0x20);\n func_8001CD50(s0, (s32)(&((u8 *)D_801C5988)[a2 << 6]));\n\n \n __asm__ volatile(\"move %0, %1\" : \"=r\"(ret) : \"r\"(s1)); // !FAKE: instruction move \u2014 NEEDED DIFFERS (P36 rung B tus7)\n\n v1 = 0xC00;\n *(u16 *)((char *)s0 + 0x1E) = v1;\n v1 = 0x1000;\n *(u16 *)((char *)s0 + 0x1A) = v1;\n *(u16 *)((char *)s0 + 0x18) = v1;\n v1 = *(s32 *)((char *)s0 + 0x4);\n *(u16 *)((char *)s0 + 0x12) = s2;\n v1 |= 0x40000000;\n *(s32 *)((char *)s0 + 0x4) = v1;\n\n return ret;\n}\n", "after_text": "u8 *func_8018594C(s16 a0, u8 *a1, s32 a2) {\n u8 *obj;\n u8 *sub;\n\n obj = func_801290DC(0x17, a1);\n if (obj == NULL) {\n return NULL;\n }\n\n sub = *(u8 **)(obj + 0x20);\n func_8001CD50((s32)sub, (s32)((u8 *)D_801C5988 + (a2 << 6)));\n\n *(u16 *)(sub + 0x1E) = 0xC00;\n *(u16 *)(sub + 0x1A) = 0x1000;\n *(u16 *)(sub + 0x18) = 0x1000;\n *(u16 *)(sub + 0x12) = a0;\n *(s32 *)(sub + 0x4) |= 0x40000000;\n\n return obj;\n}\n"}
|
||||
{"ts": "2026-09-10 22:19:20", "label": "s104_d15", "rung": "E", "calib": {"head": "e936a63ac", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_029/ov_SC03_029_jr_8017FF7C.c", "fn": "func_80183F70", "addr": 2149072752, "aliases": null, "header": false, "includers": 0, "nhash_before": "1634b20506bdf50fb2037aebdfdd0826f30fb8d1", "nhash_after": "043f2406f09b2be2ad069a1fb6757cae793456dd", "source": "propagate:src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8018594C", "verdict": "BODY-COMPILE-ERROR", "sites": [], "compiles": 1, "seconds": 0.216, "objects": ["build/src/ov_SC03_029/ov_SC03_029_jr_8017FF7C.o"], "before_text": "u8 * func_80183F70(s32 a0, s32 a1, s32 a2) {\n s32 s0 = a2;\n register s32 s2 __asm__(\"$18\") = a0; // !FAKE: pin $18 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n u8 *s1;\n u8 *ret;\n register s32 v1 __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n s1 = func_801290DC(0x17, (u8 *)a1);\n\n if (!s1) {\n return NULL;\n }\n\n s0 = *(s32 *)((char *)s1 + 0x20);\n func_8001CD50(s0, (s32)(&((u8 *)D_801C4770)[a2 << 6]));\n\n \n __asm__ volatile(\"move %0, %1\" : \"=r\"(ret) : \"r\"(s1)); // !FAKE: instruction move \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n v1 = 0xC00;\n *(u16 *)((char *)s0 + 0x1E) = v1;\n v1 = 0x1000;\n *(u16 *)((char *)s0 + 0x1A) = v1;\n *(u16 *)((char *)s0 + 0x18) = v1;\n v1 = *(s32 *)((char *)s0 + 0x4);\n *(u16 *)((char *)s0 + 0x12) = s2;\n v1 |= 0x40000000;\n *(s32 *)((char *)s0 + 0x4) = v1;\n\n return ret;\n}\n", "after_text": "u8 *func_80183F70(s16 a0, u8 *a1, s32 a2) {\n u8 *obj;\n u8 *sub;\n\n obj = func_801290DC(0x17, a1);\n if (obj == NULL) {\n return NULL;\n }\n\n sub = *(u8 **)(obj + 0x20);\n func_8001CD50((s32)sub, (s32)((u8 *)D_801C4770 + (a2 << 6)));\n\n *(u16 *)(sub + 0x1E) = 0xC00;\n *(u16 *)(sub + 0x1A) = 0x1000;\n *(u16 *)(sub + 0x18) = 0x1000;\n *(u16 *)(sub + 0x12) = a0;\n *(s32 *)(sub + 0x4) |= 0x40000000;\n\n return obj;\n}\n"}
|
||||
{"ts": "2026-09-10 22:19:25", "label": "s104_d15", "rung": "E", "calib": {"head": "e936a63ac", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_011/ov_SC02_011_jr_80188E3C.c", "fn": "func_8018D820", "addr": 2149111840, "aliases": null, "header": false, "includers": 0, "nhash_before": "1634b20506bdf50fb2037aebdfdd0826f30fb8d1", "nhash_after": "043f2406f09b2be2ad069a1fb6757cae793456dd", "source": "propagate:src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8018594C", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.376, "objects": ["build/src/ov_SC02_011/ov_SC02_011_jr_80188E3C.o"], "before_text": "u8 * func_8018D820(s32 a0, s32 a1, s32 a2) {\n s32 s0 = a2;\n register s32 s2 __asm__(\"$18\") = a0; // !FAKE: pin $18 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n u8 *s1;\n u8 *ret;\n register s32 v1 __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n s1 = func_801290DC(0x17, (u8 *)a1);\n\n if (!s1) {\n return NULL;\n }\n\n s0 = *(s32 *)((char *)s1 + 0x20);\n func_8001CD50(s0, (s32)(&((u8 *)D_801DF5CC)[a2 << 6]));\n\n /* Force early materialization of the return value into a fresh reg\n (matches target: v0=s1 is scheduled right after the call, before\n the field-init stores). A plain `u8 *ret = s1;` gets copy-propagated\n away by cse and the move sinks to the `return` site instead. */\n __asm__ volatile(\"move %0, %1\" : \"=r\"(ret) : \"r\"(s1)); // !FAKE: instruction move \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n v1 = 0xC00;\n *(u16 *)((char *)s0 + 0x1E) = v1;\n v1 = 0x1000;\n *(u16 *)((char *)s0 + 0x1A) = v1;\n *(u16 *)((char *)s0 + 0x18) = v1;\n v1 = *(s32 *)((char *)s0 + 0x4);\n *(u16 *)((char *)s0 + 0x12) = s2;\n v1 |= 0x40000000;\n *(s32 *)((char *)s0 + 0x4) = v1;\n\n return ret;\n}\n", "after_text": "u8 *func_8018D820(s16 a0, u8 *a1, s32 a2) {\n u8 *obj;\n u8 *sub;\n\n obj = func_801290DC(0x17, a1);\n if (obj == NULL) {\n return NULL;\n }\n\n sub = *(u8 **)(obj + 0x20);\n func_8001CD50((s32)sub, (s32)((u8 *)D_801DF5CC + (a2 << 6)));\n\n *(u16 *)(sub + 0x1E) = 0xC00;\n *(u16 *)(sub + 0x1A) = 0x1000;\n *(u16 *)(sub + 0x18) = 0x1000;\n *(u16 *)(sub + 0x12) = a0;\n *(s32 *)(sub + 0x4) |= 0x40000000;\n\n return obj;\n}\n"}
|
||||
{"ts": "2026-09-10 22:20:03", "label": "s104_d15", "rung": "E", "calib": {"head": "a92706a80", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c", "fn": "func_8017FD6C", "addr": 2149055852, "aliases": null, "header": false, "includers": 0, "nhash_before": "5fa4740b261e3c4de8759a63b3647ea462ddb492", "nhash_after": "398825f5db9958d2417342864d0739c64147e1e5", "source": ".run/P36/agents/ov_SC03_006__func_8018594C/scratch/SC03_007_func_8017FD6C_local.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.312, "objects": ["build/src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.o"], "before_text": "u8 * func_8017FD6C(s32 a0, s32 a1, s32 a2) {\n s32 s0 = a2;\n register s32 s2 __asm__(\"$18\") = a0; // !FAKE: pin $18 \u2014 NEEDED DIFFERS (P36 rung B tus7)\n u8 *s1;\n u8 *ret;\n register s32 v1 __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus7)\n\n s1 = func_801290DC(0x1d, (u8 *)a1);\n\n if (!s1) {\n return NULL;\n }\n\n s0 = *(s32 *)((char *)s1 + 0x20);\n func_8001CD50(s0, (s32)(&((u8 *)D_8018BD88)[a2 << 6]));\n\n \n __asm__ volatile(\"move %0, %1\" : \"=r\"(ret) : \"r\"(s1)); // !FAKE: instruction move \u2014 NEEDED DIFFERS (P36 rung B tus7)\n\n v1 = 0xC00;\n *(u16 *)((char *)s0 + 0x1E) = v1;\n v1 = 0x1000;\n *(u16 *)((char *)s0 + 0x1A) = v1;\n *(u16 *)((char *)s0 + 0x18) = v1;\n v1 = *(s32 *)((char *)s0 + 0x4);\n *(u16 *)((char *)s0 + 0x12) = s2;\n v1 |= 0x40000000;\n *(s32 *)((char *)s0 + 0x4) = v1;\n\n return ret;\n}\n", "after_text": "u8 *func_8017FD6C(s32 a0, s32 a1, s32 a2) {\n s16 val = a0;\n u8 *obj;\n u8 *sub;\n\n obj = func_801290DC(0x1d, (u8 *)a1);\n if (obj == NULL) {\n return NULL;\n }\n\n sub = *(u8 **)(obj + 0x20);\n func_8001CD50((s32)sub, (s32)((u8 *)D_8018BD88 + (a2 << 6)));\n\n *(u16 *)(sub + 0x1E) = 0xC00;\n *(u16 *)(sub + 0x1A) = 0x1000;\n *(u16 *)(sub + 0x18) = 0x1000;\n *(u16 *)(sub + 0x12) = val;\n *(s32 *)(sub + 0x4) |= 0x40000000;\n\n return obj;\n}\n"}
|
||||
|
||||
@@ -5657,36 +5657,26 @@ extern u32 D_8018BD88[];
|
||||
extern u8 *func_801290DC(s32 a0, u8 *a1);
|
||||
extern void func_8001CD50(s32 a0, s32 a1);
|
||||
|
||||
u8 * func_8017FD6C(s32 a0, s32 a1, s32 a2) {
|
||||
s32 s0 = a2;
|
||||
register s32 s2 __asm__("$18") = a0; // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus7)
|
||||
u8 *s1;
|
||||
u8 *ret;
|
||||
register s32 v1 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
|
||||
u8 *func_8017FD6C(s32 a0, s32 a1, s32 a2) {
|
||||
s16 val = a0;
|
||||
u8 *obj;
|
||||
u8 *sub;
|
||||
|
||||
s1 = func_801290DC(0x1d, (u8 *)a1);
|
||||
|
||||
if (!s1) {
|
||||
obj = func_801290DC(0x1d, (u8 *)a1);
|
||||
if (obj == NULL) {
|
||||
return NULL;
|
||||
}
|
||||
|
||||
s0 = *(s32 *)((char *)s1 + 0x20);
|
||||
func_8001CD50(s0, (s32)(&((u8 *)D_8018BD88)[a2 << 6]));
|
||||
sub = *(u8 **)(obj + 0x20);
|
||||
func_8001CD50((s32)sub, (s32)((u8 *)D_8018BD88 + (a2 << 6)));
|
||||
|
||||
|
||||
__asm__ volatile("move %0, %1" : "=r"(ret) : "r"(s1)); // !FAKE: instruction move — NEEDED DIFFERS (P36 rung B tus7)
|
||||
*(u16 *)(sub + 0x1E) = 0xC00;
|
||||
*(u16 *)(sub + 0x1A) = 0x1000;
|
||||
*(u16 *)(sub + 0x18) = 0x1000;
|
||||
*(u16 *)(sub + 0x12) = val;
|
||||
*(s32 *)(sub + 0x4) |= 0x40000000;
|
||||
|
||||
v1 = 0xC00;
|
||||
*(u16 *)((char *)s0 + 0x1E) = v1;
|
||||
v1 = 0x1000;
|
||||
*(u16 *)((char *)s0 + 0x1A) = v1;
|
||||
*(u16 *)((char *)s0 + 0x18) = v1;
|
||||
v1 = *(s32 *)((char *)s0 + 0x4);
|
||||
*(u16 *)((char *)s0 + 0x12) = s2;
|
||||
v1 |= 0x40000000;
|
||||
*(s32 *)((char *)s0 + 0x4) = v1;
|
||||
|
||||
return ret;
|
||||
return obj;
|
||||
}
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user