docs(phase-21): session handoff + queued 10h run (fleet 60.93%) — crash-recovery for fresh session

- CURRENT_PHASE ★ CURRENT STATE: overnight loop summary (59.05->60.93%, ~55 fns, 12 waves), the 3 gate-safe tooling upgrades + 6 idioms, the tractable-pool-depleting finding, exact resume cycle - ▶ QUEUED 10-HOUR RUN: fuel verified (80 tractable+28 giants+9 o0 cached, grinder 21 eligible), staged first batch, paste-ready fresh-session start (grinder + worker loop, auto-rotate to giants) - T6 marked done (the loop ran); T7 (close) pending Drew's gate-2. NOT STARTED (STOP present).
2026-09-26 13:33:34 -04:00 · 2026-06-22 07:47:14 -06:00
parent 9e9278d4a8
commit 501d112758
3 changed files with 297 additions and 235 deletions
@@ -2,102 +2,107 @@

 > Generated by `tools/backlog.py render` from `.run/backlog.jsonl`. These are functions the Phase-21 automation got **close** on but did NOT byte-match. The whole-binary byte-gate is the sole arbiter (G3/P9): **byte-matches bank and are NOT listed here** — only genuine near-misses/blockers are. Ranked by hand-session priority: **reach** (×N propagation leverage) → **closeness** (match_one mismatch count, lower = closer) → **size**. Each row's `best_draft` is the closest C the machine reached — resume from there.

-**Open near-misses:** 95  ·  by status {'near': 58, 'failed': 37}  ·  by class {'WAVE': 33, 'plumbing': 8, 'regalloc-order': 21, 'struct': 10, 'schedule': 21, 'other': 2}
+**Open near-misses:** 100  ·  by status {'near': 62, 'failed': 38}  ·  by class {'WAVE': 24, 'struct': 13, 'schedule': 22, 'plumbing': 12, 'regalloc-order': 22, 'remat': 2, 'other': 2, 'iv-combine': 3}

 | # | addr | reach | class | nins | status | closeness | where it stuck | best draft |
 |--:|------|------:|-------|-----:|--------|----------:|----------------|------------|
 | 1 | func_80174684 | 134 | WAVE | 8 | near | 0 | match_one MATCH but gate rejected (declaration/TU plumbing) | `.run/backlog_drafts/func_80174684.c` |
-| 2 | func_801522CC | 134 | plumbing | 41 | near | 0 | TBD — first compile; func_80153C18 canonical is (void) but target sets $a0=$s0 in its delay slot (call-site cast) | `.run/backlog_drafts/func_801522CC.c` |
-| 3 | func_801497A8 | 134 | regalloc-order | 47 | near | 0 | none — MATCH. $s1 pinned to D_80078E78 base; result accumulator + masked | `.run/backlog_drafts/func_801497A8.c` |
-| 4 | func_801483E8 | 134 | struct | 50 | near | 0 | none — MATCH | `.run/backlog_drafts/func_801483E8.c` |
-| 5 | func_8015F380 | 134 | plumbing | 50 | near | 0 | none — expect MATCH (single call-crossing local pinned to $s0) | `.run/backlog_drafts/func_8015F380.c` |
-| 6 | func_8016EFC8 | 134 | schedule | 51 | near | 0 | none — MATCH (51 ins). Temp `u32 v = *a0 / 0x4000000;` hoists the load to ins 0 and | `.run/backlog_drafts/func_8016EFC8.c` |
-| 7 | func_80156ECC | 134 | plumbing | 55 | near | 0 | none — MATCH (clean reconstruction; 3 call-crossing structs in s1/s2/s4, lh/lhu pair) | `.run/backlog_drafts/func_80156ECC.c` |
-| 8 | func_801758FC | 134 | schedule | 55 | near | 0 | none — MATCH (55 ins) | `.run/backlog_drafts/func_801758FC.c` |
-| 9 | func_801759D8 | 134 | schedule | 56 | near | 0 | none — MATCH (56 ins) | `.run/backlog_drafts/func_801759D8.c` |
-| 10 | func_80164418 | 134 | struct | 70 | near | 0 | none — MATCH (s16 stack array forces the spill; 2nd ratan2 reuses /dy/ in $a1) | `.run/backlog_drafts/func_80164418.c` |
-| 11 | func_801463A0 | 134 | struct | 101 | near | 0 | none — MATCH (101 ins, match_one); real symbol names; misaligned 8B copy + s16 stores + masked B9C last | `.run/backlog_drafts/func_801463A0.c` |
-| 12 | func_80167714 | 134 | regalloc-order | 104 | near | 0 | none — MATCH (104 ins) | `.run/backlog_drafts/func_80167714.c` |
-| 13 | func_80169228 | 134 | regalloc-order | 105 | near | 0 | none — MATCH (105 ins, relocation-masked). Key levers: arg0/p pinned $s1/$s0, | `.run/backlog_drafts/func_80169228.c` |
-| 14 | func_80174CB0 | 134 | regalloc-order | 123 | near | 0 | none — MATCH (match_one 123/123). Levers: (1) §21 one combined stack struct {s32 a[5]; ...} | `.run/backlog_drafts/func_80174CB0.c` |
-| 15 | func_8014F3E8 | 134 | WAVE | 32 | near | 1 | WAVE: 1 mismatch | `.run/backlog_drafts/func_8014F3E8.c` |
-| 16 | func_801775E0 | 134 | regalloc-order | 67 | near | 1 | 1 ins — target `sb $v0,0x6($s0)` vs mine `sb $v0,26($s1)` (same store P1+0x1a; gcc address-CSE picks $s1 base not the recomputed $s0); all else byte-identical | `.run/backlog_drafts/func_801775E0.c` |
-| 17 | func_8014FFDC | 134 | struct | 93 | near | 1 | none — MATCH | `.run/backlog_drafts/func_8014FFDC.c` |
-| 18 | func_8014FD54 | 134 | schedule | 40 | near | 2 | 2-off (§10 Residual-B): target fills the inner beqz delay slot with `move $v0,0` and keeps a separate outer zero block (.L8014FDDC); our cc1 cross-jump-MERGES both `return 0` paths into one zero block -> inner beqz gets a nop delay slot. §5a barrier breaks the merge but overshoots to 41 ins. No C-source form reaches the merged-with-delay-slot-fill schedule; prologue+both calls+success path all byte-match. | `.run/backlog_drafts/func_8014FD54.c` |
-| 19 | func_80171FFC | 134 | regalloc-order | 40 | near | 3 | none — MATCH (40 ins). Key: func_8017248C takes (a0,a1); calling it with | `.run/backlog_drafts/func_80171FFC.c` |
-| 20 | func_80166054 | 134 | regalloc-order | 94 | near | 3 | 3-off — local uVar1 (the 0x18/0x1a store value) lands in $a1 (coalesced w/ the func_80128EA8 2nd arg) vs target $v0 (time-shares $v0 w/ the OR-load + cmp-const); pinning uVar1=$v0 reserves $v0 function-wide so the OR-load is forced off $v0 and r cascades off $a0 -> breaks more than it fixes. Pure regalloc-order tie, no clean C lever. | `.run/backlog_drafts/func_80166054.c` |
-| 21 | func_80140D68 | 134 | schedule | 65 | near | 5 | 5-ins near-miss — gcc hoists `lui 0xff00` (the 0xFF000000 mask) one slot too early in the first AddPrim block, so the D_800B9A02 index value lands in $v1 instead of $a1 and *param_1 is read late (idx 35-43). Structure + regs otherwise byte-exact (frame eliminated via struct-array D_800AE7BC, &D_800B9A02 held in $a2 via the pB $6 pin, param_1+8 grouping fixes the rest). Pure sched1 list-order residual -> permuter candidate (try reg-hint + reorder around the lui 0xff00 / lw 0($a0) pair). | `.run/backlog_drafts/func_80140D68.c` |
-| 22 | func_80175820 | 134 | schedule | 55 | near | 6 | body byte-IDENTICAL; only residual is the phantom 0x10 leaf frame — target schedules `addiu $sp,-0x10` into the load-delay slot at insn 26 (after the D_8011F7C0 load) and `addiu $sp,0x10` before `jr ra`. With the frame forced (reserved local + anchor) gcc emits the prologue adjust at insn 0 instead of the delay slot (§5 frame-scheduling class); pins block the permuter, no C lever found to move it. Frameless form left here = body byte-exact, 2 frame insns short. | `.run/backlog_drafts/func_80175820.c` |
-| 23 | func_8016130C | 134 | WAVE | 26 | near | 9 | WAVE: 9 mismatch | `.run/backlog_drafts/func_8016130C.c` |
-| 24 | func_80161374 | 134 | schedule | 41 | near | 10 | none — MATCH (41/41 relocation-masked) | `.run/backlog_drafts/func_80161374.c` |
-| 25 | func_80163764 | 134 | regalloc-order | 42 | near | 10 | none — MATCH (42 ins). pins $s2/$s1/$s0/$s3 + u32 counter (sltiu) + init order s2,s3,i,p | `.run/backlog_drafts/func_80163764.c` |
-| 26 | func_8015B6F4 | 134 | schedule | 48 | near | 11 | 11/48 — count + all structure match (48 ins; bne-delay-slot 0x244 store, non-collapsed if/else, dup call). Residual is sched.c prologue tie-break: pinned $a0 'bc' load hoists to top (target loads it at idx13), forcing 0x23c-temp into $a1 vs target $v1, and shuffling the 0x44 RMW vs lui/addiu order. Pin is REQUIRED (without it gcc jump.c collapses the if/else to bne-skip-one, breaks the delay-slot store). Permuter-shaped scheduling residual. | `.run/backlog_drafts/func_8015B6F4.c` |
-| 27 | func_80149374 | 134 | WAVE | 23 | near | 12 | WAVE: 12 mismatch | `.run/backlog_drafts/func_80149374.c` |
-| 28 | func_801493D0 | 134 | WAVE | 23 | near | 12 | WAVE: 12 mismatch | `.run/backlog_drafts/func_801493D0.c` |
-| 29 | func_80150528 | 134 | schedule | 53 | near | 12 | none — MATCH (53 ins). Modeled on banked sibling DEFINE_func_80163950 (same D_801202A0 stride-0x10C loop + func_80135A4C call); single-pointer for-loop reproduces gcc's two-IV (p, p+0x20) schedule exactly. NB: §20 had flagged this "unsteerable" pre-sibling-exemplar. | `.run/backlog_drafts/func_80150528.c` |
-| 30 | func_80146AFC | 134 | schedule | 40 | near | 13 | none — MATCH | `.run/backlog_drafts/func_80146AFC.c` |
-| 31 | func_8016BF50 | 134 | WAVE | 22 | near | 14 | WAVE: 14 mismatch | `.run/backlog_drafts/func_8016BF50.c` |
-| 32 | func_80146A6C | 134 | WAVE | 18 | near | 17 | WAVE: 17 mismatch | `.run/backlog_drafts/func_80146A6C.c` |
-| 33 | func_8016E778 | 134 | WAVE | 20 | near | 17 | WAVE: 17 mismatch | `.run/backlog_drafts/func_8016E778.c` |
-| 34 | func_8015C030 | 134 | WAVE | 23 | near | 17 | WAVE: 17 mismatch | `.run/backlog_drafts/func_8015C030.c` |
-| 35 | func_8013E448 | 134 | WAVE | 27 | near | 17 | WAVE: 17 mismatch | `.run/backlog_drafts/func_8013E448.c` |
-| 36 | func_801416D4 | 134 | schedule | 45 | near | 18 | constant 2 hoisted to $a2 in prologue (mflo->$a3); mine keeps li v0,2 inline at case-2 cmp; pure regalloc+schedule cascade (18 ins renamed), permuter-class | `.run/backlog_drafts/func_801416D4.c` |
-| 37 | func_8014ADE0 | 134 | schedule | 139 | near | 19 | 16 ins off — all compiler-internal ties: (1) 0xAAA8 const lands $v0 vs target $v1; | `.run/backlog_drafts/func_8014ADE0.c` |
-| 38 | func_8014FE60 | 134 | regalloc-order | 95 | near | 20 | none — MATCH (permuter closed the final bothzero-block regalloc/schedule residual: moving `a = in[2]` before the +0x7E read-modify-write flips the 0x7FFF constant into $v1 and computes return-0 in $v0) | `.run/backlog_drafts/func_8014FE60.c` |
-| 39 | func_801466F0 | 134 | WAVE | 24 | near | 21 | WAVE: 21 mismatch | `.run/backlog_drafts/func_801466F0.c` |
-| 40 | func_8016191C | 134 | WAVE | 24 | near | 21 | WAVE: 21 mismatch | `.run/backlog_drafts/func_8016191C.c` |
-| 41 | func_80172C50 | 134 | WAVE | 20 | near | 23 | WAVE: 23 mismatch | `.run/backlog_drafts/func_80172C50.c` |
-| 42 | func_8017248C | 134 | WAVE | 24 | near | 23 | WAVE: 23 mismatch | `.run/backlog_drafts/func_8017248C.c` |
-| 43 | func_8014E5B4 | 134 | regalloc-order | 59 | near | 23 | none — MATCH | `.run/backlog_drafts/func_8014E5B4.c` |
-| 44 | func_80147364 | 134 | WAVE | 30 | near | 25 | WAVE: 25 mismatch | `.run/backlog_drafts/func_80147364.c` |
-| 45 | func_8016706C | 134 | WAVE | 30 | near | 27 | WAVE: 27 mismatch | `.run/backlog_drafts/func_8016706C.c` |
-| 46 | func_8014D2A0 | 134 | other | 80 | near | 27 | none — MATCH (80 ins, relocation-masked); loop-guard idiom per engine_core DEFINE_func_80164ACC | `.run/backlog_drafts/func_8014D2A0.c` |
-| 47 | func_801777BC | 134 | schedule | 59 | near | 29 | body byte-matches; residual ~3 ins = prologue instruction-scheduling (final `sll t8,16` / `lw param_7` / `addu t0,a0,0xC` ordering around the blez guard) + the loop-counter copy `addu t3,v0` — pure gcc sched/regalloc tie-break, permuter-blocked by the register __asm__ pins | `.run/backlog_drafts/func_801777BC.c` |
-| 48 | func_80177F84 | 134 | WAVE | 32 | near | 30 | WAVE: 30 mismatch | `.run/backlog_drafts/func_80177F84.c` |
-| 49 | func_80147E44 | 134 | regalloc-order | 67 | near | 31 | tail reloads — target reloads D_80127090/94/98 from memory for the param-stores (only 2 of 3 out[] held in regs at once, out[0]'s reg reused → reload); our gcc-2.7.2 -O2 keeps all 3 out[] values live and FORWARDS them (CSE store-to-load), so the 8 reload insns are absent (59 vs 67 ins). Separate-symbol form gives the exact per-symbol %hi/%lo addressing + zero-stores; the missing reloads are a regalloc/load-schedule tie-break no clean C steers (no call-crossing local to pin; CSE removes any temp). Aggregate (struct/array) form reproduces the 94/98 aliasing-reloads (30 mismatch) but caches base-0 (la $reg) → wrong addressing for the +0 accesses, so kept the separate-symbol form (correct addressing, 31). | `.run/backlog_drafts/func_80147E44.c` |
-| 50 | func_8014A51C | 134 | WAVE | 32 | near | 33 | WAVE: 33 mismatch | `.run/backlog_drafts/func_8014A51C.c` |
-| 51 | func_80144B14 | 134 | WAVE | 34 | near | 33 | WAVE: 33 mismatch | `.run/backlog_drafts/func_80144B14.c` |
-| 52 | func_80177EA4 | 134 | regalloc-order | 56 | near | 45 | structure/branch-polarity/block-order/IV all match (56=56 ins); residual is gcc loop-invariant HOISTING — move_movables threshold=62 vs my loop insn_count=46 hoists 5 constants (0x3000000,0x74808080,6,1) to prologue regs while the target re-materializes them INLINE each iteration (only the 0xFFFFFF mask is hoisted in both). To match, the loop-pass insn_count would need >=60 so threshold*1*1 < insn_count after the first hoist; clean C producing the identical final logic yields 46. Pins free regs (more hoisting), barriers/volatile/for-vs-do-while don't raise insn_count. ~45 masked-mismatches all cascade from the 5 hoisted-vs-inline constants + their register reassignment. | `.run/backlog_drafts/func_80177EA4.c` |
-| 53 | func_80176144 | 134 | regalloc-order | 53 | near | 50 | none — MATCH | `.run/backlog_drafts/func_80176144.c` |
-| 54 | func_8016163C | 134 | plumbing | 78 | near | 50 | none — MATCH (78 ins). First arm calls func_801599A4 with NO arg (asm nop delay slot) via fn-ptr cast ((void(*)(void))func_801599A4)(). | `.run/backlog_drafts/func_8016163C.c` |
-| 55 | func_8014F2E0 | 134 | schedule | 66 | near | 51 | §10 IV-init placement (piVar3 setup not sunk past loop guard) + store-vs-load (D_801150D8=0 schedules between the two arg-loads) — both CONFIRMED-unsteerable per cookbook §20; 11-off | `.run/backlog_drafts/func_8014F2E0.c` |
-| 56 | func_80161774 | 134 | plumbing | 69 | near | 53 | none — MATCH (69 ins, match_one verified; clean nested-if; param_1 -> $s0 call-crossing) | `.run/backlog_drafts/func_80161774.c` |
-| 57 | func_80177940 | 134 | regalloc-order | 101 | near | 69 | values+structure correct; gcc allocates puVar5 IV to callee-saved $s3 (the freed param_1 reg) and addresses off it, while target keeps $s3 free during the loop and uses caller-saved $a0/$a1 as the two IVs (then $s3=$a0 at the tail). Param pins (param_3/4/2 -> $s0/$s1/$s2) + restructured loop got prologue+body values exact; residual is IV-register choice + cascading schedule/reg-naming (permuter class). 69/101. | `.run/backlog_drafts/func_80177940.c` |
-| 58 | func_8014DD8C | 134 | WAVE | 108 | near | 83 | WAVE: 83 mismatch | `.run/backlog_drafts/func_8014DD8C.c` |
-| 59 | func_801705C0 | 134 | WAVE | 14 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801705C0.c` |
-| 60 | func_8016B91C | 134 | WAVE | 18 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8016B91C.c` |
-| 61 | func_801718AC | 134 | WAVE | 22 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801718AC.c` |
-| 62 | func_80168B70 | 134 | WAVE | 27 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80168B70.c` |
-| 63 | func_801494CC | 134 | WAVE | 30 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801494CC.c` |
-| 64 | func_801708B0 | 134 | WAVE | 30 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801708B0.c` |
-| 65 | func_80149450 | 134 | WAVE | 31 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80149450.c` |
-| 66 | func_80149F2C | 134 | WAVE | 31 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80149F2C.c` |
-| 67 | func_80152C80 | 134 | plumbing | 41 | failed |  | none — MATCH expected (linear call/store sequence, no regalloc tension) | `.run/backlog_drafts/func_80152C80.c` |
-| 68 | func_8014C1C8 | 134 | regalloc-order | 44 | failed |  | none — MATCH (match_one 44/44 ins, relocation-masked) | `.run/backlog_drafts/func_8014C1C8.c` |
-| 69 | func_80146750 | 134 | regalloc-order | 47 | failed |  | none — MATCH (match_one 47/47; psVar4->$a3 / psVar3->$v1 pins forced the init order) | `.run/backlog_drafts/func_80146750.c` |
-| 70 | func_8014680C | 134 | struct | 47 | failed |  | none — MATCH (47 ins, relocation-masked) | `.run/backlog_drafts/func_8014680C.c` |
-| 71 | func_8014C4AC | 134 | other | 47 | failed |  | none — MATCH (shared-ret0 goto §16 flips final branch polarity + schedules ret=0 into delay slot; memcpy(t0+0x7C,a3,8) inlines the lwl/lwr/swl/swr 8-byte block §21; param_1 = unsigned short* for the lhu reads) | `.run/backlog_drafts/func_8014C4AC.c` |
-| 72 | func_80151B98 | 134 | regalloc-order | 47 | failed |  | none — MATCH | `.run/backlog_drafts/func_80151B98.c` |
-| 73 | func_80147F78 | 134 | schedule | 48 | failed |  | TWO residuals remain. (1) FRAME: target frame is 0x60 = exactly 64 bytes (16 words) of LIVE local vars on top of the 4 saved regs (s0,s1,s2,ra) + 0x10 arg area; my body has no locals so frame is 0x20. Reproducing 64B of live local needs an address-escaped local buffer, but the target has only the 3 visible jals (no 4th call to receive &buf), so I cannot make a 16-word local survive -O2 dead-store-elim without emitting an extra instruction. (2) RELOAD SCHEDULE: target reloads D_80127090/94/98 from memory (folded lui%hi;lw%lo) with the FIRST reload HOISTED up between store90 and store94 (free non-volatile scheduling); a "memory" clobber barrier (below) forces the folded reloads but pins them strictly AFTER all three stores. The natural source is almost certainly a 16-word local buffer that ALIASES the globals (non-volatile reloads, freely scheduled) — same construct that also explains the 0x60 frame. Closest faithful body kept below; folded reload bytes are correct, frame + hoist are the gap. | `.run/backlog_drafts/func_80147F78.c` |
-| 74 | func_80151C54 | 134 | plumbing | 52 | failed |  | none — MATCH (52 ins). Branch-polarity §3-T4: BD60 arm is fall-through (if !=1 && ==0x11), BC44 is else. | `.run/backlog_drafts/func_80151C54.c` |
-| 75 | func_8017129C | 134 | struct | 58 | failed |  | none — MATCH (58 ins); three aligned 16-byte block-copies via struct assignment (cookbook §21) | `.run/backlog_drafts/func_8017129C.c` |
-| 76 | func_80173A60 | 134 | regalloc-order | 59 | failed |  | none — MATCH (59 ins) | `.run/backlog_drafts/func_80173A60.c` |
-| 77 | func_8014A738 | 134 | regalloc-order | 62 | failed |  | none — MATCH | `.run/backlog_drafts/func_8014A738.c` |
-| 78 | func_80175308 | 134 | struct | 67 | failed |  | none — MATCH (67 ins, relocation-masked) | `.run/backlog_drafts/func_80175308.c` |
-| 79 | func_8014D610 | 134 | plumbing | 74 | failed |  | none — MATCH (74 ins). for-loop + continue, single IV pointer p; gcc derives the $s0 = p+0x75 second induction var. Template: DEFINE_func_80163950 (sibling, same D_801202A0 loop + func_80135A4C). | `.run/backlog_drafts/func_8014D610.c` |
-| 80 | func_80163534 | 134 | schedule | 76 | failed |  | mismatch=13, a single 1-position scheduling tie. Instrs 1-30 byte-perfect; all registers correct | `.run/backlog_drafts/func_80163534.c` |
-| 81 | func_8014CF04 | 134 | struct | 82 | failed |  | none — MATCH (82 ins; array-of-struct scan, for-loop over Ent D_801202A0[96], stride 0x10C) | `.run/backlog_drafts/func_8014CF04.c` |
-| 82 | func_80156670 | 134 | schedule | 83 | failed |  | none — MATCH (83 ins). Key: hoist `iVar1 = uVar3*4;` as its OWN statement before the if so gcc schedules `sll v1,s1,2` into the bnez delay slot (computed unconditionally) and reuses v1 index-first (`iVar1 + (s32)&D_801150E0` → `addu v0,v1,v0`). 13-arg call to func_80157158 (a0-a3 + 9 stack args at 0x10..0x30); param_2/param_3 cast (u16) → andi; param_6 incoming as lhu(u16). Address args = integer math `iVar2 + (s32)&D_x` (index-first → lui;addiu;addu, index added first). | `.run/backlog_drafts/func_80156670.c` |
-| 83 | func_8014D4C0 | 134 | schedule | 84 | failed |  | none — MATCH (goto forces if-body out-of-line/last; `>=` fixes slt operand order) | `.run/backlog_drafts/func_8014D4C0.c` |
-| 84 | func_8016A73C | 134 | struct | 85 | failed |  | none — MATCH (85 ins, relocation-masked) | `.run/backlog_drafts/func_8016A73C.c` |
-| 85 | func_80173CB4 | 134 | schedule | 90 | failed |  | none — MATCH (switch form keeps cases unmerged; final block: reuse one temp for the D_8012750C test + the func_8013767C result -> $a0 alloc; invert if to !=0 for branch polarity + store order) | `.run/backlog_drafts/func_80173CB4.c` |
-| 86 | func_8014C6F4 | 134 | regalloc-order | 91 | failed |  | 19-off loop tie-break — target compiles the search as a while/for (pre-guard sltu;beqz present) with the found pointer snapshotted to $v0 split from the IV in $a0 and the +4 sunk into both call-arg delay slots; do-while is instruction-count-exact (91=91) but lacks the pre-guard, while every for/while form costs +4 ins (merge stays in $a0). §10 schedule/regalloc residual. | `.run/backlog_drafts/func_8014C6F4.c` |
-| 87 | func_8014D12C | 134 | schedule | 93 | failed |  | none — MATCH (93 ins). Block-order lever: success-continuation (return 1) | `.run/backlog_drafts/func_8014D12C.c` |
-| 88 | func_801502EC | 134 | schedule | 93 | failed |  | none — MATCH (93 ins). 8-byte block copy via alignment-1 struct (Blk8{u8 b[8]}) assignment reproduces the lwl/lwr/swl/swr; ret=0 hoisted before the block copy to fix the s3-vs-ra prologue save order. | `.run/backlog_drafts/func_801502EC.c` |
-| 89 | func_80150170 | 134 | struct | 95 | failed |  | none — MATCH (95/95). Keys: (1) two parallel 3-halfword groups via chained assign `sp10.x = sp18.x = v` (sp18 inner so 0x18 stores first); (2) align-1 blk8 struct copy for the lwl/lwr/swl/swr 8-byte copy into actor+0x80 (src = sp buf from func_801502EC, or u8[] D_801152A8); (3) f0/f2 = u16 (lhu), f1 = s16 (lh for the slt); (4) `(iVar5/iVar6)!=0` single-OR test + branch-polarity invert (not-both-zero is fall-through); (5) both-zero tail register pins: 0x7fff -> $v1 (`register s32 __asm__("$3")`), sp10.f0/f2 -> reused $a0 (`register u32 __asm__("$4")` written twice) to force gcc's hoist-load + reg reuse schedule. | `.run/backlog_drafts/func_80150170.c` |
-| 90 | func_8014CD80 | 134 | regalloc-order | 97 | failed |  | none — MATCH (97 ins). iVar3 pinned to $v1 (register __asm__("$3")) so | `.run/backlog_drafts/func_8014CD80.c` |
-| 91 | func_8014E284 | 134 | WAVE | 108 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014E284.c` |
-| 92 | func_80167540 | 134 | WAVE | 117 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80167540.c` |
-| 93 | func_8014F4C0 | 134 | WAVE | 141 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014F4C0.c` |
-| 94 | func_8014E048 | 134 | WAVE | 143 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014E048.c` |
-| 95 | func_80155800 | 134 | WAVE | 145 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80155800.c` |
+| 2 | func_801733FC | 134 | struct | 25 | near | 0 | none — modeled on sibling func_80173460 (packed 8-byte struct copy + two s16=1 stores) | `.run/backlog_drafts/func_801733FC.c` |
+| 3 | func_8014A51C | 134 | schedule | 32 | near | 0 | none — MATCH (32 ins, relocation-masked) | `.run/backlog_drafts/func_8014A51C.c` |
+| 4 | func_80151664 | 134 | plumbing | 35 | near | 0 | none — MATCH (35 ins, relocation-masked); canonical externs kept, call-site casts only | `.run/backlog_drafts/func_80151664.c` |
+| 5 | func_801522CC | 134 | plumbing | 41 | near | 0 | TBD — first compile; func_80153C18 canonical is (void) but target sets $a0=$s0 in its delay slot (call-site cast) | `.run/backlog_drafts/func_801522CC.c` |
+| 6 | func_801497A8 | 134 | regalloc-order | 47 | near | 0 | none — MATCH. $s1 pinned to D_80078E78 base; result accumulator + masked | `.run/backlog_drafts/func_801497A8.c` |
+| 7 | func_801483E8 | 134 | struct | 50 | near | 0 | none — MATCH | `.run/backlog_drafts/func_801483E8.c` |
+| 8 | func_8015F380 | 134 | plumbing | 50 | near | 0 | none — expect MATCH (single call-crossing local pinned to $s0) | `.run/backlog_drafts/func_8015F380.c` |
+| 9 | func_8016EFC8 | 134 | schedule | 51 | near | 0 | none — MATCH (51 ins). Temp `u32 v = *a0 / 0x4000000;` hoists the load to ins 0 and | `.run/backlog_drafts/func_8016EFC8.c` |
+| 10 | func_80156ECC | 134 | plumbing | 55 | near | 0 | none — MATCH (clean reconstruction; 3 call-crossing structs in s1/s2/s4, lh/lhu pair) | `.run/backlog_drafts/func_80156ECC.c` |
+| 11 | func_801758FC | 134 | schedule | 55 | near | 0 | none — MATCH (55 ins) | `.run/backlog_drafts/func_801758FC.c` |
+| 12 | func_801759D8 | 134 | schedule | 56 | near | 0 | none — MATCH (56 ins) | `.run/backlog_drafts/func_801759D8.c` |
+| 13 | func_80147E44 | 134 | regalloc-order | 67 | near | 0 | none -- MATCH (67 ins). $s1/$s0/$s3/$s2 pins ($17/$16/$19/$18) + 3-pointer reload | `.run/backlog_drafts/func_80147E44.c` |
+| 14 | func_80164418 | 134 | struct | 70 | near | 0 | none — MATCH (s16 stack array forces the spill; 2nd ratan2 reuses /dy/ in $a1) | `.run/backlog_drafts/func_80164418.c` |
+| 15 | func_80166054 | 134 | regalloc-order | 94 | near | 0 | none — MATCH (94 ins). Pins: param_1->$s2, angle->$s0, shift->$s1, r0->$s3, | `.run/backlog_drafts/func_80166054.c` |
+| 16 | func_801463A0 | 134 | struct | 101 | near | 0 | none — MATCH (101 ins, match_one); real symbol names; misaligned 8B copy + s16 stores + masked B9C last | `.run/backlog_drafts/func_801463A0.c` |
+| 17 | func_80167714 | 134 | regalloc-order | 104 | near | 0 | none — MATCH (104 ins) | `.run/backlog_drafts/func_80167714.c` |
+| 18 | func_80169228 | 134 | regalloc-order | 105 | near | 0 | none — MATCH (105 ins, relocation-masked). Key levers: arg0/p pinned $s1/$s0, | `.run/backlog_drafts/func_80169228.c` |
+| 19 | func_80174CB0 | 134 | regalloc-order | 123 | near | 0 | none — MATCH (match_one 123/123). Levers: (1) §21 one combined stack struct {s32 a[5]; ...} | `.run/backlog_drafts/func_80174CB0.c` |
+| 20 | func_80171C64 | 134 | regalloc-order | 24 | near | 1 | unknown — first draft, param_1 must land in $s1 and (param_2 & 0xFF) in $s0 across the func_80171EC8 call | `.run/backlog_drafts/func_80171C64.c` |
+| 21 | func_8016F0E4 | 134 | plumbing | 26 | near | 1 | none — MATCH (26 ins); natural C form, param_1 auto-allocated to $s0 | `.run/backlog_drafts/func_8016F0E4.c` |
+| 22 | func_8014F3E8 | 134 | WAVE | 32 | near | 1 | WAVE: 1 mismatch | `.run/backlog_drafts/func_8014F3E8.c` |
+| 23 | func_801775E0 | 134 | regalloc-order | 67 | near | 1 | 1 ins — target `sb $v0,0x6($s0)` vs mine `sb $v0,26($s1)` (same store P1+0x1a; gcc address-CSE picks $s1 base not the recomputed $s0); all else byte-identical | `.run/backlog_drafts/func_801775E0.c` |
+| 24 | func_8014FFDC | 134 | struct | 93 | near | 1 | none — MATCH | `.run/backlog_drafts/func_8014FFDC.c` |
+| 25 | func_80171FFC | 134 | regalloc-order | 40 | near | 3 | none — MATCH (40 ins). Key: func_8017248C takes (a0,a1); calling it with | `.run/backlog_drafts/func_80171FFC.c` |
+| 26 | func_801466F0 | 134 | plumbing | 24 | near | 4 | none — MATCH (struct param-spill + branch-polarity) | `.run/backlog_drafts/func_801466F0.c` |
+| 27 | func_80147364 | 134 | remat | 30 | near | 4 | none — MATCH (30 ins). Lever: hoist &D_80126B58 into a local ptr `u8 *p=&D_80126B58;` so gcc | `.run/backlog_drafts/func_80147364.c` |
+| 28 | func_80140D68 | 134 | schedule | 65 | near | 5 | 5-ins near-miss — gcc hoists `lui 0xff00` (the 0xFF000000 mask) one slot too early in the first AddPrim block, so the D_800B9A02 index value lands in $v1 instead of $a1 and *param_1 is read late (idx 35-43). Structure + regs otherwise byte-exact (frame eliminated via struct-array D_800AE7BC, &D_800B9A02 held in $a2 via the pB $6 pin, param_1+8 grouping fixes the rest). Pure sched1 list-order residual -> permuter candidate (try reg-hint + reorder around the lui 0xff00 / lw 0($a0) pair). | `.run/backlog_drafts/func_80140D68.c` |
+| 29 | func_80175820 | 134 | schedule | 55 | near | 6 | body byte-IDENTICAL; only residual is the phantom 0x10 leaf frame — target schedules `addiu $sp,-0x10` into the load-delay slot at insn 26 (after the D_8011F7C0 load) and `addiu $sp,0x10` before `jr ra`. With the frame forced (reserved local + anchor) gcc emits the prologue adjust at insn 0 instead of the delay slot (§5 frame-scheduling class); pins block the permuter, no C lever found to move it. Frameless form left here = body byte-exact, 2 frame insns short. | `.run/backlog_drafts/func_80175820.c` |
+| 30 | func_8016130C | 134 | WAVE | 26 | near | 9 | WAVE: 9 mismatch | `.run/backlog_drafts/func_8016130C.c` |
+| 31 | func_801495C4 | 134 | regalloc-order | 34 | near | 10 | 10-mismatch near-miss, ALL pure stack-slot offset immediates. Instruction sequence, opcodes, | `.run/backlog_drafts/func_801495C4.c` |
+| 32 | func_80161374 | 134 | schedule | 41 | near | 10 | none — MATCH (41/41 relocation-masked) | `.run/backlog_drafts/func_80161374.c` |
+| 33 | func_80163764 | 134 | regalloc-order | 42 | near | 10 | none — MATCH (42 ins). pins $s2/$s1/$s0/$s3 + u32 counter (sltiu) + init order s2,s3,i,p | `.run/backlog_drafts/func_80163764.c` |
+| 34 | func_80149374 | 134 | remat | 23 | near | 11 | gcc -O2 CSEs &sp18 into freed callee-saved $s0 (1 addu + 2 move); target rematerializes addiu $sp,0x18 twice. Single-buffer straight-line address reused across 2 calls -> CSE wins; no clean C (cast/type/union/ptr-var/$8-pin) flips it; two-distinct-locals remats but grows frame +8 (gcc-2.7.2 won't coalesce slots back to 0x18). Frame/regs/params all match; only this 1 insn differs. | `.run/backlog_drafts/func_80149374.c` |
+| 35 | func_80150528 | 134 | schedule | 53 | near | 12 | none — MATCH (53 ins). Modeled on banked sibling DEFINE_func_80163950 (same D_801202A0 stride-0x10C loop + func_80135A4C call); single-pointer for-loop reproduces gcc's two-IV (p, p+0x20) schedule exactly. NB: §20 had flagged this "unsteerable" pre-sibling-exemplar. | `.run/backlog_drafts/func_80150528.c` |
+| 36 | func_80146AFC | 134 | schedule | 40 | near | 13 | none — MATCH | `.run/backlog_drafts/func_80146AFC.c` |
+| 37 | func_8016BF50 | 134 | WAVE | 22 | near | 14 | WAVE: 14 mismatch | `.run/backlog_drafts/func_8016BF50.c` |
+| 38 | func_80146A6C | 134 | WAVE | 18 | near | 17 | WAVE: 17 mismatch | `.run/backlog_drafts/func_80146A6C.c` |
+| 39 | func_8016E778 | 134 | WAVE | 20 | near | 17 | WAVE: 17 mismatch | `.run/backlog_drafts/func_8016E778.c` |
+| 40 | func_8015C030 | 134 | WAVE | 23 | near | 17 | WAVE: 17 mismatch | `.run/backlog_drafts/func_8015C030.c` |
+| 41 | func_8014ADE0 | 134 | schedule | 139 | near | 19 | 16 ins off — all compiler-internal ties: (1) 0xAAA8 const lands $v0 vs target $v1; | `.run/backlog_drafts/func_8014ADE0.c` |
+| 42 | func_8016191C | 134 | plumbing | 24 | near | 20 | none — MATCH (24 ins). early-return-per-arm: each arm sets $v0 directly + j-tail merges | `.run/backlog_drafts/func_8016191C.c` |
+| 43 | func_8014FE60 | 134 | regalloc-order | 95 | near | 20 | none — MATCH (permuter closed the final bothzero-block regalloc/schedule residual: moving `a = in[2]` before the +0x7E read-modify-write flips the 0x7FFF constant into $v1 and computes return-0 in $v0) | `.run/backlog_drafts/func_8014FE60.c` |
+| 44 | func_80172C50 | 134 | WAVE | 20 | near | 23 | WAVE: 23 mismatch | `.run/backlog_drafts/func_80172C50.c` |
+| 45 | func_8017248C | 134 | WAVE | 24 | near | 23 | WAVE: 23 mismatch | `.run/backlog_drafts/func_8017248C.c` |
+| 46 | func_8014E5B4 | 134 | regalloc-order | 59 | near | 23 | none — MATCH | `.run/backlog_drafts/func_8014E5B4.c` |
+| 47 | func_80141B90 | 134 | struct | 29 | near | 24 | none — MATCH (29 ins); array-of-int %lo-fold + call + u16 if-block; volatile-double reserves the target's 8-byte frame slot | `.run/backlog_drafts/func_80141B90.c` |
+| 48 | func_801719A4 | 134 | struct | 24 | near | 25 | none — MATCH (24 ins, relocation-masked) | `.run/backlog_drafts/func_801719A4.c` |
+| 49 | func_8016706C | 134 | WAVE | 30 | near | 27 | WAVE: 27 mismatch | `.run/backlog_drafts/func_8016706C.c` |
+| 50 | func_8014D2A0 | 134 | other | 80 | near | 27 | none — MATCH (80 ins, relocation-masked); loop-guard idiom per engine_core DEFINE_func_80164ACC | `.run/backlog_drafts/func_8014D2A0.c` |
+| 51 | func_80177AD4 | 134 | iv-combine | 34 | near | 28 | cc1 combine_givs will NOT fold the halfword RMW (lhu;sh) into the byte-store biv. Target uses ONE IV at p+0x20 (byte at 0, halfword RMW at -2); our cc1 either (a) merges into ONE IV but bases it at the LOWEST offset = the halfword (+0x1e), so every load/store offset is shifted (0/2 vs -2/0) and byte-differs; or (b, this draft) keeps the byte biv at the correct +0x20 base but SPAWNS a 2nd IV (+0x1e) for the RMW halfword -> +1 addiu + schedule shift (28 mismatched, mostly the 2nd-IV addiu and a 1-row delay-slot schedule shift). Probe-confirmed: even with both fields as forward non-negative struct members, the halfword RMW never folds into the byte biv (a non-RMW byte/halfword pair DOES merge). Genuine gcc-2.7.2 giv-combination divergence, not source-typeable. Matches the Phase-20 §20 verdict (independently re-derived). STUB. | `.run/backlog_drafts/func_80177AD4.c` |
+| 52 | func_801777BC | 134 | schedule | 59 | near | 29 | body byte-matches; residual ~3 ins = prologue instruction-scheduling (final `sll t8,16` / `lw param_7` / `addu t0,a0,0xC` ordering around the blez guard) + the loop-counter copy `addu t3,v0` — pure gcc sched/regalloc tie-break, permuter-blocked by the register __asm__ pins | `.run/backlog_drafts/func_801777BC.c` |
+| 53 | func_80161888 | 134 | schedule | 37 | near | 30 | none — MATCH (proxy verified) | `.run/backlog_drafts/func_80161888.c` |
+| 54 | func_80144B14 | 134 | schedule | 34 | near | 31 | none — MATCH (34 ins). Two stack structs (s16[3] each) passed by addr to | `.run/backlog_drafts/func_80144B14.c` |
+| 55 | func_801778A8 | 134 | iv-combine | 38 | near | 38 | gcc spawns 2 IVs (byte giv @+0xc, halfword RMW giv @+0xa); target combines both into ONE IV at +0xc reaching the halfword at -2($a3). A struct collapses to 1 IV but anchors at the struct base (+0xa) not +0xc; raw byte+halfword RMW never combines. Same combine_givs-refuses-halfword-RMW wall as sibling func_80177AD4 (§20, stubbed). Floor 33-off; not source-steerable (combine runs pre-regalloc, pins/order don't move it). | `.run/backlog_drafts/func_801778A8.c` |
+| 56 | func_80177EA4 | 134 | regalloc-order | 56 | near | 45 | structure/branch-polarity/block-order/IV all match (56=56 ins); residual is gcc loop-invariant HOISTING — move_movables threshold=62 vs my loop insn_count=46 hoists 5 constants (0x3000000,0x74808080,6,1) to prologue regs while the target re-materializes them INLINE each iteration (only the 0xFFFFFF mask is hoisted in both). To match, the loop-pass insn_count would need >=60 so threshold*1*1 < insn_count after the first hoist; clean C producing the identical final logic yields 46. Pins free regs (more hoisting), barriers/volatile/for-vs-do-while don't raise insn_count. ~45 masked-mismatches all cascade from the 5 hoisted-vs-inline constants + their register reassignment. | `.run/backlog_drafts/func_80177EA4.c` |
+| 57 | func_80176144 | 134 | regalloc-order | 53 | near | 50 | none — MATCH | `.run/backlog_drafts/func_80176144.c` |
+| 58 | func_8016163C | 134 | plumbing | 78 | near | 50 | none — MATCH (78 ins). First arm calls func_801599A4 with NO arg (asm nop delay slot) via fn-ptr cast ((void(*)(void))func_801599A4)(). | `.run/backlog_drafts/func_8016163C.c` |
+| 59 | func_8014F2E0 | 134 | schedule | 66 | near | 51 | §10 IV-init placement (piVar3 setup not sunk past loop guard) + store-vs-load (D_801150D8=0 schedules between the two arg-loads) — both CONFIRMED-unsteerable per cookbook §20; 11-off | `.run/backlog_drafts/func_8014F2E0.c` |
+| 60 | func_80161774 | 134 | plumbing | 69 | near | 53 | none — MATCH (69 ins, match_one verified; clean nested-if; param_1 -> $s0 call-crossing) | `.run/backlog_drafts/func_80161774.c` |
+| 61 | func_80177940 | 134 | iv-combine | 101 | near | 65 | prologue+setup (35 ins) byte-match exactly; loop body diverges on gcc loop-invariant hoist ORDERING (scheduler tie-break), the conditional 0x74808080 recompute-vs-hoist, and the tail IV final-value double-move (addu s3,a0,zero; addu v0,s3,zero) + pd+=5 increment placement -- same loop-IV-combine class S20 flags as stub for sibling func_80177AD4. | `.run/backlog_drafts/func_80177940.c` |
+| 62 | func_8014DD8C | 134 | WAVE | 108 | near | 83 | WAVE: 83 mismatch | `.run/backlog_drafts/func_8014DD8C.c` |
+| 63 | func_801705C0 | 134 | WAVE | 14 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801705C0.c` |
+| 64 | func_8016B91C | 134 | WAVE | 18 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8016B91C.c` |
+| 65 | func_801718AC | 134 | WAVE | 22 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801718AC.c` |
+| 66 | func_80168B70 | 134 | WAVE | 27 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80168B70.c` |
+| 67 | func_801494CC | 134 | WAVE | 30 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801494CC.c` |
+| 68 | func_801708B0 | 134 | WAVE | 30 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801708B0.c` |
+| 69 | func_80170CF0 | 134 | schedule | 30 | failed |  | 4-ins PROLOGUE-ORDER residual (body insns 4-29 byte-identical). My cc1 hoists the funcptr lui/lw ABOVE the frame setup (lui,lw,addiu sp,sw s0); target keeps frame setup first (addiu sp,sw s0,lui,lw). Same prologue-order class as func_80177F84 (cookbook L1332) — no C lever found (intermediate var/cast/void*-vs-funcptr/pin/early-ptr all reproduce the hoist; barriers/empty-asm/volatile-local regress). KEY WIN: `case 0: break;` forces emit_case_nodes' slti<2;bnez→default lower-bound prune, exactly matching the target dispatch tree (a bare 2-case switch omits it). | `.run/backlog_drafts/func_80170CF0.c` |
+| 70 | func_80149450 | 134 | WAVE | 31 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80149450.c` |
+| 71 | func_80149F2C | 134 | WAVE | 31 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80149F2C.c` |
+| 72 | func_80152C80 | 134 | plumbing | 41 | failed |  | none — MATCH expected (linear call/store sequence, no regalloc tension) | `.run/backlog_drafts/func_80152C80.c` |
+| 73 | func_8014C1C8 | 134 | regalloc-order | 44 | failed |  | none — MATCH (match_one 44/44 ins, relocation-masked) | `.run/backlog_drafts/func_8014C1C8.c` |
+| 74 | func_80146750 | 134 | regalloc-order | 47 | failed |  | none — MATCH (match_one 47/47; psVar4->$a3 / psVar3->$v1 pins forced the init order) | `.run/backlog_drafts/func_80146750.c` |
+| 75 | func_8014680C | 134 | struct | 47 | failed |  | none — MATCH (47 ins, relocation-masked) | `.run/backlog_drafts/func_8014680C.c` |
+| 76 | func_8014C4AC | 134 | other | 47 | failed |  | none — MATCH (shared-ret0 goto §16 flips final branch polarity + schedules ret=0 into delay slot; memcpy(t0+0x7C,a3,8) inlines the lwl/lwr/swl/swr 8-byte block §21; param_1 = unsigned short* for the lhu reads) | `.run/backlog_drafts/func_8014C4AC.c` |
+| 77 | func_80151B98 | 134 | regalloc-order | 47 | failed |  | none — MATCH | `.run/backlog_drafts/func_80151B98.c` |
+| 78 | func_80147F78 | 134 | schedule | 48 | failed |  | TWO residuals remain. (1) FRAME: target frame is 0x60 = exactly 64 bytes (16 words) of LIVE local vars on top of the 4 saved regs (s0,s1,s2,ra) + 0x10 arg area; my body has no locals so frame is 0x20. Reproducing 64B of live local needs an address-escaped local buffer, but the target has only the 3 visible jals (no 4th call to receive &buf), so I cannot make a 16-word local survive -O2 dead-store-elim without emitting an extra instruction. (2) RELOAD SCHEDULE: target reloads D_80127090/94/98 from memory (folded lui%hi;lw%lo) with the FIRST reload HOISTED up between store90 and store94 (free non-volatile scheduling); a "memory" clobber barrier (below) forces the folded reloads but pins them strictly AFTER all three stores. The natural source is almost certainly a 16-word local buffer that ALIASES the globals (non-volatile reloads, freely scheduled) — same construct that also explains the 0x60 frame. Closest faithful body kept below; folded reload bytes are correct, frame + hoist are the gap. | `.run/backlog_drafts/func_80147F78.c` |
+| 79 | func_80151C54 | 134 | plumbing | 52 | failed |  | none — MATCH (52 ins). Branch-polarity §3-T4: BD60 arm is fall-through (if !=1 && ==0x11), BC44 is else. | `.run/backlog_drafts/func_80151C54.c` |
+| 80 | func_8017129C | 134 | struct | 58 | failed |  | none — MATCH (58 ins); three aligned 16-byte block-copies via struct assignment (cookbook §21) | `.run/backlog_drafts/func_8017129C.c` |
+| 81 | func_80173A60 | 134 | regalloc-order | 59 | failed |  | none — MATCH (59 ins) | `.run/backlog_drafts/func_80173A60.c` |
+| 82 | func_8014A738 | 134 | regalloc-order | 62 | failed |  | none — MATCH | `.run/backlog_drafts/func_8014A738.c` |
+| 83 | func_80175308 | 134 | struct | 67 | failed |  | none — MATCH (67 ins, relocation-masked) | `.run/backlog_drafts/func_80175308.c` |
+| 84 | func_8014D610 | 134 | plumbing | 74 | failed |  | none — MATCH (74 ins). for-loop + continue, single IV pointer p; gcc derives the $s0 = p+0x75 second induction var. Template: DEFINE_func_80163950 (sibling, same D_801202A0 loop + func_80135A4C). | `.run/backlog_drafts/func_8014D610.c` |
+| 85 | func_80163534 | 134 | schedule | 76 | failed |  | mismatch=13, a single 1-position scheduling tie. Instrs 1-30 byte-perfect; all registers correct | `.run/backlog_drafts/func_80163534.c` |
+| 86 | func_8014CF04 | 134 | struct | 82 | failed |  | none — MATCH (82 ins; array-of-struct scan, for-loop over Ent D_801202A0[96], stride 0x10C) | `.run/backlog_drafts/func_8014CF04.c` |
+| 87 | func_80156670 | 134 | schedule | 83 | failed |  | none — MATCH (83 ins). Key: hoist `iVar1 = uVar3*4;` as its OWN statement before the if so gcc schedules `sll v1,s1,2` into the bnez delay slot (computed unconditionally) and reuses v1 index-first (`iVar1 + (s32)&D_801150E0` → `addu v0,v1,v0`). 13-arg call to func_80157158 (a0-a3 + 9 stack args at 0x10..0x30); param_2/param_3 cast (u16) → andi; param_6 incoming as lhu(u16). Address args = integer math `iVar2 + (s32)&D_x` (index-first → lui;addiu;addu, index added first). | `.run/backlog_drafts/func_80156670.c` |
+| 88 | func_8014D4C0 | 134 | schedule | 84 | failed |  | none — MATCH (goto forces if-body out-of-line/last; `>=` fixes slt operand order) | `.run/backlog_drafts/func_8014D4C0.c` |
+| 89 | func_8016A73C | 134 | struct | 85 | failed |  | none — MATCH (85 ins, relocation-masked) | `.run/backlog_drafts/func_8016A73C.c` |
+| 90 | func_80173CB4 | 134 | schedule | 90 | failed |  | none — MATCH (switch form keeps cases unmerged; final block: reuse one temp for the D_8012750C test + the func_8013767C result -> $a0 alloc; invert if to !=0 for branch polarity + store order) | `.run/backlog_drafts/func_80173CB4.c` |
+| 91 | func_8014C6F4 | 134 | regalloc-order | 91 | failed |  | 19-off loop tie-break — target compiles the search as a while/for (pre-guard sltu;beqz present) with the found pointer snapshotted to $v0 split from the IV in $a0 and the +4 sunk into both call-arg delay slots; do-while is instruction-count-exact (91=91) but lacks the pre-guard, while every for/while form costs +4 ins (merge stays in $a0). §10 schedule/regalloc residual. | `.run/backlog_drafts/func_8014C6F4.c` |
+| 92 | func_8014D12C | 134 | schedule | 93 | failed |  | none — MATCH (93 ins). Block-order lever: success-continuation (return 1) | `.run/backlog_drafts/func_8014D12C.c` |
+| 93 | func_801502EC | 134 | schedule | 93 | failed |  | none — MATCH (93 ins). 8-byte block copy via alignment-1 struct (Blk8{u8 b[8]}) assignment reproduces the lwl/lwr/swl/swr; ret=0 hoisted before the block copy to fix the s3-vs-ra prologue save order. | `.run/backlog_drafts/func_801502EC.c` |
+| 94 | func_80150170 | 134 | struct | 95 | failed |  | none — MATCH (95/95). Keys: (1) two parallel 3-halfword groups via chained assign `sp10.x = sp18.x = v` (sp18 inner so 0x18 stores first); (2) align-1 blk8 struct copy for the lwl/lwr/swl/swr 8-byte copy into actor+0x80 (src = sp buf from func_801502EC, or u8[] D_801152A8); (3) f0/f2 = u16 (lhu), f1 = s16 (lh for the slt); (4) `(iVar5/iVar6)!=0` single-OR test + branch-polarity invert (not-both-zero is fall-through); (5) both-zero tail register pins: 0x7fff -> $v1 (`register s32 __asm__("$3")`), sp10.f0/f2 -> reused $a0 (`register u32 __asm__("$4")` written twice) to force gcc's hoist-load + reg reuse schedule. | `.run/backlog_drafts/func_80150170.c` |
+| 95 | func_8014CD80 | 134 | regalloc-order | 97 | failed |  | none — MATCH (97 ins). iVar3 pinned to $v1 (register __asm__("$3")) so | `.run/backlog_drafts/func_8014CD80.c` |
+| 96 | func_8014E284 | 134 | WAVE | 108 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014E284.c` |
+| 97 | func_80167540 | 134 | WAVE | 117 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80167540.c` |
+| 98 | func_8014F4C0 | 134 | WAVE | 141 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014F4C0.c` |
+| 99 | func_8014E048 | 134 | WAVE | 143 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014E048.c` |
+| 100 | func_80155800 | 134 | WAVE | 145 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80155800.c` |
@@ -3,148 +3,148 @@
 # source-derived (committed src/*.c + config/dedup.us.yaml). Live byte gate: `make check-all`;
 # cross-binary collapsible-byte leverage: docs/duplicates.cross.md.

-FLEET REAL substantive   : 207007   (of which dedup-shared 206504 via 1553 groups / 206548 instances)
+FLEET REAL substantive   : 207946   (of which dedup-shared 207442 via 1560 groups / 207486 instances)
 FLEET LINKED PsyQ objs   :    959
-FLEET byte-identical     : 208654 / 344010 = 60.65%   (REAL+LINKED+empties)
+FLEET byte-identical     : 209593 / 344010 = 60.93%   (REAL+LINKED+empties)
 FLEET NON_MATCHING       :      7   (0 in any default build — G4)
-FLEET INCLUDE_ASM stubs  : 135349
+FLEET INCLUDE_ASM stubs  : 134410
 FLEET matchable          : 344010

 | binary | REAL | shared | LINKED | byte-ident | matchable | byte-ident % |
 |---|---:|---:|---:|---:|---:|---:|
 | main | 54 | 2 | 959 | 1055 | 2096 | 50.3% |
 | resident | 123 | 0 | 0 | 125 | 146 | 85.6% |
-| ov_SC01_000 | 1545 | 1545 | 0 | 1545 | 2403 | 64.3% |
-| ov_SC01_001 | 1545 | 1545 | 0 | 1547 | 2467 | 62.7% |
-| ov_SC01_004 | 1537 | 1537 | 0 | 1538 | 2416 | 63.7% |
-| ov_SC01_005 | 1544 | 1544 | 0 | 1551 | 2504 | 61.9% |
-| ov_SC01_006 | 1544 | 1544 | 0 | 1551 | 2504 | 61.9% |
-| ov_SC01_008 | 1537 | 1537 | 0 | 1539 | 2428 | 63.4% |
-| ov_SC01_009 | 1537 | 1537 | 0 | 1538 | 2510 | 61.3% |
-| ov_SC01_074 | 1537 | 1537 | 0 | 1539 | 2427 | 63.4% |
-| ov_SC01_077 | 1833 | 1505 | 0 | 1835 | 2586 | 71.0% |
-| ov_SC01_080 | 1541 | 1541 | 0 | 1541 | 2515 | 61.3% |
-| ov_SC01_084 | 1541 | 1541 | 0 | 1546 | 2581 | 59.9% |
-| ov_SC02_000 | 1545 | 1545 | 0 | 1552 | 2684 | 57.8% |
-| ov_SC02_003 | 1545 | 1545 | 0 | 1552 | 2684 | 57.8% |
-| ov_SC02_004 | 1541 | 1541 | 0 | 1541 | 2403 | 64.1% |
-| ov_SC02_005 | 1537 | 1537 | 0 | 1547 | 2930 | 52.8% |
-| ov_SC02_011 | 1543 | 1543 | 0 | 1555 | 2896 | 53.7% |
-| ov_SC02_015 | 1543 | 1543 | 0 | 1543 | 2416 | 63.9% |
-| ov_SC02_016 | 1543 | 1543 | 0 | 1546 | 2548 | 60.7% |
-| ov_SC02_017 | 1543 | 1543 | 0 | 1551 | 2735 | 56.7% |
-| ov_SC02_021 | 1543 | 1543 | 0 | 1543 | 2439 | 63.3% |
-| ov_SC02_026 | 1541 | 1541 | 0 | 1547 | 2575 | 60.1% |
-| ov_SC02_027 | 1541 | 1541 | 0 | 1550 | 2695 | 57.5% |
-| ov_SC02_028 | 1541 | 1541 | 0 | 1551 | 2704 | 57.4% |
-| ov_SC02_031 | 1541 | 1541 | 0 | 1547 | 2565 | 60.3% |
-| ov_SC02_035 | 1541 | 1541 | 0 | 1544 | 2523 | 61.2% |
-| ov_SC02_039 | 1541 | 1541 | 0 | 1541 | 2418 | 63.7% |
-| ov_SC02_041 | 1541 | 1541 | 0 | 1544 | 2563 | 60.2% |
-| ov_SC03_001 | 1541 | 1541 | 0 | 1559 | 2870 | 54.3% |
-| ov_SC03_002 | 1545 | 1545 | 0 | 1561 | 2632 | 59.3% |
-| ov_SC03_003 | 1541 | 1541 | 0 | 1542 | 2425 | 63.6% |
-| ov_SC03_006 | 1547 | 1547 | 0 | 1556 | 2768 | 56.2% |
-| ov_SC03_007 | 1541 | 1541 | 0 | 1545 | 2626 | 58.8% |
-| ov_SC03_010 | 1541 | 1541 | 0 | 1541 | 2472 | 62.3% |
-| ov_SC03_011 | 1541 | 1541 | 0 | 1547 | 2530 | 61.1% |
-| ov_SC03_012 | 1541 | 1541 | 0 | 1542 | 2408 | 64.0% |
-| ov_SC03_013 | 1541 | 1541 | 0 | 1541 | 2495 | 61.8% |
-| ov_SC03_014 | 1541 | 1541 | 0 | 1551 | 2688 | 57.7% |
-| ov_SC03_015 | 1541 | 1541 | 0 | 1551 | 2688 | 57.7% |
-| ov_SC03_023 | 1541 | 1541 | 0 | 1542 | 2437 | 63.3% |
-| ov_SC03_024 | 1541 | 1541 | 0 | 1553 | 2644 | 58.7% |
-| ov_SC03_028 | 1541 | 1541 | 0 | 1545 | 2667 | 57.9% |
-| ov_SC03_029 | 1543 | 1543 | 0 | 1553 | 2647 | 58.7% |
-| ov_SC03_030 | 1545 | 1545 | 0 | 1547 | 2498 | 61.9% |
-| ov_SC03_031 | 1541 | 1541 | 0 | 1545 | 2517 | 61.4% |
-| ov_SC03_089 | 1541 | 1541 | 0 | 1548 | 2584 | 59.9% |
-| ov_SC03_090 | 1541 | 1541 | 0 | 1549 | 2628 | 58.9% |
-| ov_SC03_091 | 1541 | 1541 | 0 | 1549 | 2643 | 58.6% |
-| ov_SC03_092 | 1541 | 1541 | 0 | 1553 | 2590 | 60.0% |
-| ov_SC03_093 | 1541 | 1541 | 0 | 1545 | 2566 | 60.2% |
-| ov_SC03_094 | 1541 | 1541 | 0 | 1547 | 2579 | 60.0% |
-| ov_SC03_095 | 1541 | 1541 | 0 | 1544 | 2477 | 62.3% |
-| ov_SC03_096 | 1541 | 1541 | 0 | 1544 | 2468 | 62.6% |
-| ov_SC03_097 | 1541 | 1541 | 0 | 1548 | 2606 | 59.4% |
-| ov_SC03_098 | 1541 | 1541 | 0 | 1544 | 2544 | 60.7% |
-| ov_SC03_099 | 1541 | 1541 | 0 | 1544 | 2507 | 61.6% |
-| ov_SC03_100 | 1541 | 1541 | 0 | 1545 | 2542 | 60.8% |
-| ov_SC03_101 | 1541 | 1541 | 0 | 1545 | 2531 | 61.0% |
-| ov_SC03_102 | 1541 | 1541 | 0 | 1544 | 2495 | 61.9% |
-| ov_SC03_103 | 1543 | 1543 | 0 | 1546 | 2513 | 61.5% |
-| ov_SC03_104 | 1541 | 1541 | 0 | 1548 | 2619 | 59.1% |
-| ov_SC03_105 | 1541 | 1541 | 0 | 1548 | 2600 | 59.5% |
-| ov_SC03_108 | 1541 | 1541 | 0 | 1541 | 2446 | 63.0% |
-| ov_SC03_109 | 1541 | 1541 | 0 | 1543 | 2426 | 63.6% |
-| ov_SC03_110 | 1541 | 1541 | 0 | 1541 | 2471 | 62.4% |
-| ov_SC03_111 | 1541 | 1541 | 0 | 1544 | 2513 | 61.4% |
-| ov_SC03_112 | 1543 | 1543 | 0 | 1545 | 2529 | 61.1% |
-| ov_SC03_113 | 1543 | 1543 | 0 | 1546 | 2471 | 62.6% |
-| ov_SC03_114 | 1541 | 1541 | 0 | 1543 | 2417 | 63.8% |
-| ov_SC03_115 | 1541 | 1541 | 0 | 1543 | 2475 | 62.3% |
-| ov_SC03_116 | 1541 | 1541 | 0 | 1544 | 2441 | 63.3% |
-| ov_SC03_117 | 1541 | 1541 | 0 | 1547 | 2560 | 60.4% |
-| ov_SC03_118 | 1541 | 1541 | 0 | 1554 | 2688 | 57.8% |
-| ov_SC03_119 | 1541 | 1541 | 0 | 1554 | 2688 | 57.8% |
-| ov_SC03_121 | 1541 | 1541 | 0 | 1544 | 2462 | 62.7% |
-| ov_SC03_124 | 1537 | 1537 | 0 | 1557 | 2744 | 56.7% |
-| ov_SC03_125 | 1541 | 1541 | 0 | 1553 | 2591 | 59.9% |
-| ov_SC03_126 | 1541 | 1541 | 0 | 1542 | 2425 | 63.6% |
-| ov_SC04_000 | 1545 | 1545 | 0 | 1554 | 2547 | 61.0% |
-| ov_SC04_002 | 1541 | 1541 | 0 | 1545 | 2639 | 58.5% |
-| ov_SC04_003 | 1541 | 1541 | 0 | 1545 | 2505 | 61.7% |
-| ov_SC04_004 | 1541 | 1541 | 0 | 1543 | 2561 | 60.2% |
-| ov_SC04_005 | 1541 | 1541 | 0 | 1547 | 2615 | 59.2% |
-| ov_SC04_006 | 1541 | 1541 | 0 | 1543 | 2456 | 62.8% |
-| ov_SC04_007 | 1541 | 1541 | 0 | 1545 | 2572 | 60.1% |
-| ov_SC04_008 | 1541 | 1541 | 0 | 1541 | 2417 | 63.8% |
-| ov_SC04_009 | 1541 | 1541 | 0 | 1544 | 2443 | 63.2% |
-| ov_SC04_010 | 1541 | 1541 | 0 | 1542 | 2421 | 63.7% |
-| ov_SC04_011 | 1541 | 1541 | 0 | 1547 | 2806 | 55.1% |
-| ov_SC04_012 | 1541 | 1541 | 0 | 1542 | 2422 | 63.7% |
-| ov_SC04_015 | 1541 | 1541 | 0 | 1553 | 2614 | 59.4% |
-| ov_SC04_016 | 1541 | 1541 | 0 | 1543 | 2442 | 63.2% |
-| ov_SC04_018 | 1541 | 1541 | 0 | 1554 | 2858 | 54.4% |
-| ov_SC04_019 | 1541 | 1541 | 0 | 1554 | 2858 | 54.4% |
-| ov_SC04_020 | 1541 | 1541 | 0 | 1553 | 2570 | 60.4% |
-| ov_SC04_021 | 1541 | 1541 | 0 | 1542 | 2425 | 63.6% |
-| ov_SC05_000 | 1545 | 1545 | 0 | 1548 | 2422 | 63.9% |
-| ov_SC05_001 | 1541 | 1541 | 0 | 1546 | 2577 | 60.0% |
-| ov_SC05_002 | 1541 | 1541 | 0 | 1544 | 2445 | 63.1% |
-| ov_SC05_003 | 1541 | 1541 | 0 | 1542 | 2484 | 62.1% |
-| ov_SC05_004 | 1541 | 1541 | 0 | 1543 | 2467 | 62.5% |
-| ov_SC05_005 | 1541 | 1541 | 0 | 1542 | 2494 | 61.8% |
-| ov_SC05_006 | 1541 | 1541 | 0 | 1541 | 2432 | 63.4% |
-| ov_SC05_007 | 1541 | 1541 | 0 | 1546 | 2485 | 62.2% |
-| ov_SC05_008 | 1541 | 1541 | 0 | 1543 | 2546 | 60.6% |
-| ov_SC05_009 | 1541 | 1541 | 0 | 1545 | 2440 | 63.3% |
-| ov_SC05_010 | 1541 | 1541 | 0 | 1545 | 2591 | 59.6% |
-| ov_SC05_011 | 1541 | 1541 | 0 | 1542 | 2411 | 64.0% |
-| ov_SC05_017 | 1537 | 1537 | 0 | 1549 | 2845 | 54.4% |
-| ov_SC05_018 | 1541 | 1541 | 0 | 1554 | 2676 | 58.1% |
-| ov_SC05_019 | 1541 | 1541 | 0 | 1542 | 2425 | 63.6% |
-| ov_SC06_000 | 1545 | 1545 | 0 | 1553 | 2692 | 57.7% |
-| ov_SC06_006 | 1541 | 1541 | 0 | 1542 | 2514 | 61.3% |
-| ov_SC06_008 | 1543 | 1543 | 0 | 1549 | 2544 | 60.9% |
-| ov_SC06_010 | 1541 | 1541 | 0 | 1546 | 2520 | 61.3% |
-| ov_SC06_011 | 1541 | 1541 | 0 | 1545 | 2471 | 62.5% |
-| ov_SC06_013 | 1541 | 1541 | 0 | 1542 | 2427 | 63.5% |
-| ov_SC06_014 | 1541 | 1541 | 0 | 1543 | 2455 | 62.9% |
-| ov_SC06_015 | 1541 | 1541 | 0 | 1541 | 2423 | 63.6% |
-| ov_SC06_016 | 1541 | 1541 | 0 | 1543 | 2552 | 60.5% |
-| ov_SC06_018 | 1541 | 1541 | 0 | 1549 | 2668 | 58.1% |
-| ov_SC06_020 | 1541 | 1541 | 0 | 1542 | 2521 | 61.2% |
-| ov_SC06_022 | 1541 | 1541 | 0 | 1549 | 2645 | 58.6% |
-| ov_SC06_024 | 1541 | 1541 | 0 | 1547 | 2670 | 57.9% |
-| ov_SC06_025 | 1541 | 1541 | 0 | 1546 | 2575 | 60.0% |
-| ov_SC06_027 | 1541 | 1541 | 0 | 1542 | 2410 | 64.0% |
-| ov_SC06_029 | 1541 | 1541 | 0 | 1553 | 2665 | 58.3% |
-| ov_SC06_030 | 1541 | 1541 | 0 | 1541 | 2459 | 62.7% |
-| ov_SC06_032 | 1541 | 1541 | 0 | 1548 | 2661 | 58.2% |
-| ov_SC06_033 | 1541 | 1541 | 0 | 1548 | 2634 | 58.8% |
-| ov_SC07_000 | 1545 | 1545 | 0 | 1547 | 2522 | 61.3% |
-| ov_SC07_001 | 1541 | 1541 | 0 | 1543 | 2457 | 62.8% |
-| ov_SC07_002 | 1541 | 1541 | 0 | 1545 | 2582 | 59.8% |
-| ov_SC07_008 | 1541 | 1541 | 0 | 1541 | 2388 | 64.5% |
-| ov_SC07_009 | 1541 | 1541 | 0 | 1543 | 2432 | 63.4% |
+| ov_SC01_000 | 1552 | 1552 | 0 | 1552 | 2403 | 64.6% |
+| ov_SC01_001 | 1552 | 1552 | 0 | 1554 | 2467 | 63.0% |
+| ov_SC01_004 | 1544 | 1544 | 0 | 1545 | 2416 | 63.9% |
+| ov_SC01_005 | 1551 | 1551 | 0 | 1558 | 2504 | 62.2% |
+| ov_SC01_006 | 1551 | 1551 | 0 | 1558 | 2504 | 62.2% |
+| ov_SC01_008 | 1544 | 1544 | 0 | 1546 | 2428 | 63.7% |
+| ov_SC01_009 | 1544 | 1544 | 0 | 1545 | 2510 | 61.6% |
+| ov_SC01_074 | 1544 | 1544 | 0 | 1546 | 2427 | 63.7% |
+| ov_SC01_077 | 1841 | 1512 | 0 | 1843 | 2586 | 71.3% |
+| ov_SC01_080 | 1548 | 1548 | 0 | 1548 | 2515 | 61.6% |
+| ov_SC01_084 | 1548 | 1548 | 0 | 1553 | 2581 | 60.2% |
+| ov_SC02_000 | 1552 | 1552 | 0 | 1559 | 2684 | 58.1% |
+| ov_SC02_003 | 1552 | 1552 | 0 | 1559 | 2684 | 58.1% |
+| ov_SC02_004 | 1548 | 1548 | 0 | 1548 | 2403 | 64.4% |
+| ov_SC02_005 | 1544 | 1544 | 0 | 1554 | 2930 | 53.0% |
+| ov_SC02_011 | 1550 | 1550 | 0 | 1562 | 2896 | 53.9% |
+| ov_SC02_015 | 1550 | 1550 | 0 | 1550 | 2416 | 64.2% |
+| ov_SC02_016 | 1550 | 1550 | 0 | 1553 | 2548 | 60.9% |
+| ov_SC02_017 | 1550 | 1550 | 0 | 1558 | 2735 | 57.0% |
+| ov_SC02_021 | 1550 | 1550 | 0 | 1550 | 2439 | 63.6% |
+| ov_SC02_026 | 1548 | 1548 | 0 | 1554 | 2575 | 60.3% |
+| ov_SC02_027 | 1548 | 1548 | 0 | 1557 | 2695 | 57.8% |
+| ov_SC02_028 | 1548 | 1548 | 0 | 1558 | 2704 | 57.6% |
+| ov_SC02_031 | 1548 | 1548 | 0 | 1554 | 2565 | 60.6% |
+| ov_SC02_035 | 1548 | 1548 | 0 | 1551 | 2523 | 61.5% |
+| ov_SC02_039 | 1548 | 1548 | 0 | 1548 | 2418 | 64.0% |
+| ov_SC02_041 | 1548 | 1548 | 0 | 1551 | 2563 | 60.5% |
+| ov_SC03_001 | 1548 | 1548 | 0 | 1566 | 2870 | 54.6% |
+| ov_SC03_002 | 1552 | 1552 | 0 | 1568 | 2632 | 59.6% |
+| ov_SC03_003 | 1548 | 1548 | 0 | 1549 | 2425 | 63.9% |
+| ov_SC03_006 | 1554 | 1554 | 0 | 1563 | 2768 | 56.5% |
+| ov_SC03_007 | 1548 | 1548 | 0 | 1552 | 2626 | 59.1% |
+| ov_SC03_010 | 1548 | 1548 | 0 | 1548 | 2472 | 62.6% |
+| ov_SC03_011 | 1548 | 1548 | 0 | 1554 | 2530 | 61.4% |
+| ov_SC03_012 | 1548 | 1548 | 0 | 1549 | 2408 | 64.3% |
+| ov_SC03_013 | 1548 | 1548 | 0 | 1548 | 2495 | 62.0% |
+| ov_SC03_014 | 1548 | 1548 | 0 | 1558 | 2688 | 58.0% |
+| ov_SC03_015 | 1548 | 1548 | 0 | 1558 | 2688 | 58.0% |
+| ov_SC03_023 | 1548 | 1548 | 0 | 1549 | 2437 | 63.6% |
+| ov_SC03_024 | 1548 | 1548 | 0 | 1560 | 2644 | 59.0% |
+| ov_SC03_028 | 1548 | 1548 | 0 | 1552 | 2667 | 58.2% |
+| ov_SC03_029 | 1550 | 1550 | 0 | 1560 | 2647 | 58.9% |
+| ov_SC03_030 | 1552 | 1552 | 0 | 1554 | 2498 | 62.2% |
+| ov_SC03_031 | 1548 | 1548 | 0 | 1552 | 2517 | 61.7% |
+| ov_SC03_089 | 1548 | 1548 | 0 | 1555 | 2584 | 60.2% |
+| ov_SC03_090 | 1548 | 1548 | 0 | 1556 | 2628 | 59.2% |
+| ov_SC03_091 | 1548 | 1548 | 0 | 1556 | 2643 | 58.9% |
+| ov_SC03_092 | 1548 | 1548 | 0 | 1560 | 2590 | 60.2% |
+| ov_SC03_093 | 1548 | 1548 | 0 | 1552 | 2566 | 60.5% |
+| ov_SC03_094 | 1548 | 1548 | 0 | 1554 | 2579 | 60.3% |
+| ov_SC03_095 | 1548 | 1548 | 0 | 1551 | 2477 | 62.6% |
+| ov_SC03_096 | 1548 | 1548 | 0 | 1551 | 2468 | 62.8% |
+| ov_SC03_097 | 1548 | 1548 | 0 | 1555 | 2606 | 59.7% |
+| ov_SC03_098 | 1548 | 1548 | 0 | 1551 | 2544 | 61.0% |
+| ov_SC03_099 | 1548 | 1548 | 0 | 1551 | 2507 | 61.9% |
+| ov_SC03_100 | 1548 | 1548 | 0 | 1552 | 2542 | 61.1% |
+| ov_SC03_101 | 1548 | 1548 | 0 | 1552 | 2531 | 61.3% |
+| ov_SC03_102 | 1548 | 1548 | 0 | 1551 | 2495 | 62.2% |
+| ov_SC03_103 | 1550 | 1550 | 0 | 1553 | 2513 | 61.8% |
+| ov_SC03_104 | 1548 | 1548 | 0 | 1555 | 2619 | 59.4% |
+| ov_SC03_105 | 1548 | 1548 | 0 | 1555 | 2600 | 59.8% |
+| ov_SC03_108 | 1548 | 1548 | 0 | 1548 | 2446 | 63.3% |
+| ov_SC03_109 | 1548 | 1548 | 0 | 1550 | 2426 | 63.9% |
+| ov_SC03_110 | 1548 | 1548 | 0 | 1548 | 2471 | 62.6% |
+| ov_SC03_111 | 1548 | 1548 | 0 | 1551 | 2513 | 61.7% |
+| ov_SC03_112 | 1550 | 1550 | 0 | 1552 | 2529 | 61.4% |
+| ov_SC03_113 | 1550 | 1550 | 0 | 1553 | 2471 | 62.8% |
+| ov_SC03_114 | 1548 | 1548 | 0 | 1550 | 2417 | 64.1% |
+| ov_SC03_115 | 1548 | 1548 | 0 | 1550 | 2475 | 62.6% |
+| ov_SC03_116 | 1548 | 1548 | 0 | 1551 | 2441 | 63.5% |
+| ov_SC03_117 | 1548 | 1548 | 0 | 1554 | 2560 | 60.7% |
+| ov_SC03_118 | 1548 | 1548 | 0 | 1561 | 2688 | 58.1% |
+| ov_SC03_119 | 1548 | 1548 | 0 | 1561 | 2688 | 58.1% |
+| ov_SC03_121 | 1548 | 1548 | 0 | 1551 | 2462 | 63.0% |
+| ov_SC03_124 | 1544 | 1544 | 0 | 1564 | 2744 | 57.0% |
+| ov_SC03_125 | 1548 | 1548 | 0 | 1560 | 2591 | 60.2% |
+| ov_SC03_126 | 1548 | 1548 | 0 | 1549 | 2425 | 63.9% |
+| ov_SC04_000 | 1552 | 1552 | 0 | 1561 | 2547 | 61.3% |
+| ov_SC04_002 | 1548 | 1548 | 0 | 1552 | 2639 | 58.8% |
+| ov_SC04_003 | 1548 | 1548 | 0 | 1552 | 2505 | 62.0% |
+| ov_SC04_004 | 1548 | 1548 | 0 | 1550 | 2561 | 60.5% |
+| ov_SC04_005 | 1548 | 1548 | 0 | 1554 | 2615 | 59.4% |
+| ov_SC04_006 | 1548 | 1548 | 0 | 1550 | 2456 | 63.1% |
+| ov_SC04_007 | 1548 | 1548 | 0 | 1552 | 2572 | 60.3% |
+| ov_SC04_008 | 1548 | 1548 | 0 | 1548 | 2417 | 64.0% |
+| ov_SC04_009 | 1548 | 1548 | 0 | 1551 | 2443 | 63.5% |
+| ov_SC04_010 | 1548 | 1548 | 0 | 1549 | 2421 | 64.0% |
+| ov_SC04_011 | 1548 | 1548 | 0 | 1554 | 2806 | 55.4% |
+| ov_SC04_012 | 1548 | 1548 | 0 | 1549 | 2422 | 64.0% |
+| ov_SC04_015 | 1548 | 1548 | 0 | 1560 | 2614 | 59.7% |
+| ov_SC04_016 | 1548 | 1548 | 0 | 1550 | 2442 | 63.5% |
+| ov_SC04_018 | 1548 | 1548 | 0 | 1561 | 2858 | 54.6% |
+| ov_SC04_019 | 1548 | 1548 | 0 | 1561 | 2858 | 54.6% |
+| ov_SC04_020 | 1548 | 1548 | 0 | 1560 | 2570 | 60.7% |
+| ov_SC04_021 | 1548 | 1548 | 0 | 1549 | 2425 | 63.9% |
+| ov_SC05_000 | 1552 | 1552 | 0 | 1555 | 2422 | 64.2% |
+| ov_SC05_001 | 1548 | 1548 | 0 | 1553 | 2577 | 60.3% |
+| ov_SC05_002 | 1548 | 1548 | 0 | 1551 | 2445 | 63.4% |
+| ov_SC05_003 | 1548 | 1548 | 0 | 1549 | 2484 | 62.4% |
+| ov_SC05_004 | 1548 | 1548 | 0 | 1550 | 2467 | 62.8% |
+| ov_SC05_005 | 1548 | 1548 | 0 | 1549 | 2494 | 62.1% |
+| ov_SC05_006 | 1548 | 1548 | 0 | 1548 | 2432 | 63.7% |
+| ov_SC05_007 | 1548 | 1548 | 0 | 1553 | 2485 | 62.5% |
+| ov_SC05_008 | 1548 | 1548 | 0 | 1550 | 2546 | 60.9% |
+| ov_SC05_009 | 1548 | 1548 | 0 | 1552 | 2440 | 63.6% |
+| ov_SC05_010 | 1548 | 1548 | 0 | 1552 | 2591 | 59.9% |
+| ov_SC05_011 | 1548 | 1548 | 0 | 1549 | 2411 | 64.2% |
+| ov_SC05_017 | 1544 | 1544 | 0 | 1556 | 2845 | 54.7% |
+| ov_SC05_018 | 1548 | 1548 | 0 | 1561 | 2676 | 58.3% |
+| ov_SC05_019 | 1548 | 1548 | 0 | 1549 | 2425 | 63.9% |
+| ov_SC06_000 | 1552 | 1552 | 0 | 1560 | 2692 | 57.9% |
+| ov_SC06_006 | 1548 | 1548 | 0 | 1549 | 2514 | 61.6% |
+| ov_SC06_008 | 1550 | 1550 | 0 | 1556 | 2544 | 61.2% |
+| ov_SC06_010 | 1548 | 1548 | 0 | 1553 | 2520 | 61.6% |
+| ov_SC06_011 | 1548 | 1548 | 0 | 1552 | 2471 | 62.8% |
+| ov_SC06_013 | 1548 | 1548 | 0 | 1549 | 2427 | 63.8% |
+| ov_SC06_014 | 1548 | 1548 | 0 | 1550 | 2455 | 63.1% |
+| ov_SC06_015 | 1548 | 1548 | 0 | 1548 | 2423 | 63.9% |
+| ov_SC06_016 | 1548 | 1548 | 0 | 1550 | 2552 | 60.7% |
+| ov_SC06_018 | 1548 | 1548 | 0 | 1556 | 2668 | 58.3% |
+| ov_SC06_020 | 1548 | 1548 | 0 | 1549 | 2521 | 61.4% |
+| ov_SC06_022 | 1548 | 1548 | 0 | 1556 | 2645 | 58.8% |
+| ov_SC06_024 | 1548 | 1548 | 0 | 1554 | 2670 | 58.2% |
+| ov_SC06_025 | 1548 | 1548 | 0 | 1553 | 2575 | 60.3% |
+| ov_SC06_027 | 1548 | 1548 | 0 | 1549 | 2410 | 64.3% |
+| ov_SC06_029 | 1548 | 1548 | 0 | 1560 | 2665 | 58.5% |
+| ov_SC06_030 | 1548 | 1548 | 0 | 1548 | 2459 | 63.0% |
+| ov_SC06_032 | 1548 | 1548 | 0 | 1555 | 2661 | 58.4% |
+| ov_SC06_033 | 1548 | 1548 | 0 | 1555 | 2634 | 59.0% |
+| ov_SC07_000 | 1552 | 1552 | 0 | 1554 | 2522 | 61.6% |
+| ov_SC07_001 | 1548 | 1548 | 0 | 1550 | 2457 | 63.1% |
+| ov_SC07_002 | 1548 | 1548 | 0 | 1552 | 2582 | 60.1% |
+| ov_SC07_008 | 1548 | 1548 | 0 | 1548 | 2388 | 64.8% |
+| ov_SC07_009 | 1548 | 1548 | 0 | 1550 | 2432 | 63.7% |
@@ -7,6 +7,63 @@
 > Phase Start gate PASSED (Drew approved the plan). This file is the per-task crash-recovery log (P3/CURRENT_PHASE).
 > Open-ended phase; milestone = **build → validate → stage, then close** (Drew's choice — the multi-day run is a later go).

+---
+
+## ★ CURRENT STATE & FRESH-SESSION RESUME — READ THIS FIRST (2026-06-22 07:40)
+
+> The dated sections lower down (TRIP HAND-OFF, POST-REBOOT RESUME, FRESH-SESSION RUN LIVE, SUSTAINED LOOP,
+> OPTION C) are HISTORICAL session-layers, kept for the trail. **This section is the authoritative current state.**
+
+**Fleet: 209,593 / 344,010 = 60.93% byte-identical** · 136/136 binaries byte-identical · 0 NON_MATCHING.
+**Nothing running** — grinder STOPPED (`.run/auto/STOP` present; `rm` it to allow relaunch), no worker wave in flight.
+The loop is **paused at a clean, fully-committed checkpoint** (HEAD = `commit:0214`). All work committed locally; **not pushed** (R6 — Drew pushes).
+
+**What this (overnight `/loop`) session did** (Drew: "keep waves going, don't stop till I check in ~8h" → ran 12 worker waves + the grinder):
+- Fleet **59.05% → 60.93%** (+1.88%); ~55 functions banked (worker gates + 1 recovery gate + 1 grinder bank), each propagated ×134 where shared. dedup groups → 1560.
+- **3 gate-safe tooling upgrades** (Option C + follow-ons), all committed:
+  - `tools/sig_unify.py` — **DEF-side arity-extend recovery**: adopt the canonical engine_core.h param list on arity mismatch (unused params free at -O2). Banks the DEF-side loose-typing wall. (`commit:0200`)
+  - `tools/grinder.py` — **blacklist** of permuter-won-but-gate-rejected (plumbing) fns → `.run/auto/grinder_blacklist.json` (13 fns); stops the futile churn. (`commit:0200`)
+  - `tools/wave_targets.py` — **pool excludes self-MATCH-but-gate-rejected** near-misses (closeness==0 OR drafter "none — MATCH" verdict) so waves draft FRESH targets. (`commit:0205`, `commit:0208`)
+- **6 new cookbook idioms** (4 distilled + 2 drafter-authored): cookbook §21 + §22. (`commit:0194 commit:0196 commit:0198 commit:0203 commit:0211`)
+- **Grinder's work:** banked 1 (`func_801493D0`, permuter), blacklisted 13 plumbing-bound near-misses, token-free. It went 0→1 banks *after* the Option-C fixes.
+
+**Key finding (where the wall is now):** the **tractable reach-134 ≤150-ins pool is depleting** — easy fresh wins are banked; close-rate fell from ~0.25 to **0.037 on wave 12**. What remains in this size-band is the genuine hard tail: DEF-side plumbing (`sig_unify` handles the simple arity case; the rest is multi-way loose typing) + the §20 **IV-combine** (`combine_givs` won't fold byte+halfword-RMW) and **LICM-hoist** (`move_movables` threshold) walls — drafters correctly stub these "unsteerable from C." They are **backlog / hand-finish fuel**, not re-draftable.
+
+**HOW TO RESUME the loop** (the proven cycle; grinder is optional — `rm .run/auto/STOP` then relaunch per `docs/automation-runbook.md`):
+1. `rm .run/auto/STOP` (only if relaunching the grinder).
+2. `.venv/bin/python tools/orchestrator.py prep --mode pool --n 24` → writes `.run/auto/wave_batch.json`. **Use `--mode pool`** (auto-mode keeps firing class-focused REGALLOC waves on a saturated class; pool harvests fresh). The orchestrator auto-rotates `s["pool"]` tractable→giants→o0 when close-rate <0.15 for 2 waves — **so when tractable yield stays low (it's there now), the next prep will serve `giants`; let it.**
+3. Read `.run/auto/wave_batch.json`; launch the `tools/workflows/worker_wave.js` Workflow with `args={draftDir:".run/drafts-wave", targets:<the batch array PASTED VERBATIM>}` (Workflow scripts have no fs access; transcribe carefully).
+4. On completion: `.venv/bin/python tools/orchestrator.py finish --drafts .run/drafts-wave --commit` — **run BACKGROUNDED + `dangerouslyDisableSandbox`** (foreground `make build`/`git` get sandbox-killed exit 144; detached daemons escape it). Prints `{banked, propagated, verified, fleet_pct, ...}`.
+5. If a *banked* fn flags a genuinely new idiom, launch `tools/workflows/distill.js` with `args={draftsDir:".run/drafts-wave", verified:<array>}` (else skip — distill is conservative; the drafter's "new idiom" claim is often already covered).
+6. Loop. The byte-gate (G3/P9) is the sole arbiter; a wrong draft reverts, never banks. Each bank auto-commits.
+
+### ▶ QUEUED 10-HOUR RUN — Drew starts this in the FRESH SESSION (do NOT start now; 2026-06-22 07:45)
+
+Drew's call: **continue** (not close yet) — queue ~10h more of waves + grinder, drawing down the remaining
+fuel, then close after. **Everything below is STAGED, NOTHING STARTED** (`.run/auto/STOP` is present; no wave running).
+
+**Fuel verified (all cached — NO MCP/prefetch needed for the run):** tractable **80** + giants **28** + o0 **9**
+cached-unbanked non-wall (167 reach-134 total); 563 Ghidra-C cached; 96 walls/plumbing excluded. Grinder has
+**21 eligible near-misses** to start on (then self-feeds on each wave's new near-misses). Enough for ~15–20 waves.
+**First wave batch staged:** `.run/auto/queued_wave1.json` (23 tractable, = wave 13) — informational; the cycle's
+`prep` regenerates it.
+
+**FRESH-SESSION START SEQUENCE (paste in order):**
+1. **Grinder** (token-free, detached — run with `dangerouslyDisableSandbox`):
+   `rm -f .run/auto/STOP && DRIVER=tools/grinder.py setsid nohup bash tools/auto_supervisor.sh --permute-secs 120 -j 14 >/dev/null 2>&1 & disown`
+   (it stops the MCP first — fine, the run is cache-based; monitor `bash tools/auto_status.sh`).
+2. **Worker loop** — run the cycle in “HOW TO RESUME” above (prep --mode pool → launch `worker_wave.js` →
+   `finish --commit` backgrounded+`dangerouslyDisableSandbox` → distill-if-flagged → repeat) for ~15–20 waves.
+   The pool **auto-rotates tractable→giants→o0** as close-rate drops (`low_streak`=1 now; giants is the high-byte-weight
+   payoff). Run it as a `/loop` (self-paced) or hand-cycle. **STOP:** `bash tools/auto_stop.sh` + interrupt the loop.
+
+**Expected:** ~+1–2% fleet over the run (diminishing — the hard tail dominates as fuel draws down). Then **T7 (close
+Phase 21 → PhaseEnd)** is the natural next step. The byte-gate guarantees correctness unattended; worst case = "it paused."
+
+**Pointers:** runbook `docs/automation-runbook.md` · backlog ledger `docs/backlog.md` (+ `.run/backlog.jsonl`, near-miss drafts `.run/backlog_drafts/`) · diagnostics `.run/{diag_plumbing,repro_gate,test_defsig}.py` (gitignored scratch) · monitor `bash tools/auto_status.sh`.
+
+---
+
 ## Locked decisions (AskUserQuestion, 2026-06-21)
 1. **Milestone = build→validate→stage, then close.** Sample-validate a few hours hands-on, bank that increment, populate the backlog, close ready-to-launch.
 2. **Keep-alive = hybrid.** `/loop` self-pace primary + external `claude --continue` watcher fallback; `auto_stop.sh` = kill switch.
@@ -25,10 +82,10 @@
 - [x] **T3 — Backlog ledger + shared deterministic bank/log stage** (Max) → `tools/gate_stage.py` + `tools/backlog.py` + `docs/backlog.md`; validated on a real 30-draft sample (banked+propagated+logged). **DONE.**
 - [x] **T4 — Worker Workflow** (Max; agents xHigh) → `tools/workflows/worker_wave.js` + `tools/wave_targets.py`. **VALIDATED.**
 - [x] **T5 — Grinder daemon** (xHigh) → `tools/grinder.py` (permutes backlog near-misses → gate_stage) + `auto_supervisor.sh` (DRIVER-param). **VALIDATED.**
- [~] **T6 — ROI orchestrator + hybrid keep-alive + launch** (Max) → `tools/orchestrator.py` built; launch in progress (Drew's trip imminent).
- [ ] **T7 — Stage ready-to-launch + Phase close (PhaseEnd)** (Max, Tier-1).
+- [x] **T6 — ROI orchestrator + hybrid keep-alive + launch** (Max) → `tools/orchestrator.py` built; **the worker `/loop` RAN — 12 waves across 2026-06-21→22, fleet 59.05%→60.93%** (see ★ CURRENT STATE). Worker driven by Workflow-completion (not the hybrid keep-alive); grinder ran detached. **DONE.**
+- [ ] **T7 — Stage ready-to-launch + Phase close (PhaseEnd)** (Max, Tier-1) — pending Drew's gate-2 milestone confirmation. The "build→validate→stage" milestone is met; closing is defensible (see ★ CURRENT STATE open decision).

-**Current task:** T1.
+**Current task:** paused at a clean checkpoint after 12 worker waves (fleet 60.93%). NEXT = Drew's call (rotate worker to `giants` pool / other band / **close Phase 21 → T7 PhaseEnd**). See ★ CURRENT STATE & FRESH-SESSION RESUME at the top.

 ## Verification invariant (every banked step + at close)
 `make clean && (extract all 136) && make check-all` → 136/136 byte-identical (R22); `make report` → 0 NON_MATCHING (G4), `dedup-check 0 failed`.