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feat(phase-29 crack-wave3): func_8014032C jtbl exemplar banked ×1 (§59(3) two-table merged-span wall blocks member propagation)

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This commit is contained in:
Drew T
2026-07-20 09:37:42 -06:00
parent 364b1a07e0
commit 5a3f6900bd
3 changed files with 106 additions and 3 deletions
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config/overlays.mk
+1 -1
View File
@@ -22,7 +22,7 @@ ov_SC01_077_MAPFILE := $(ov_SC01_077_OUT).map
ov_SC01_077_LD_SCRIPT := $(ov_SC01_077_OUT).ld
ov_SC01_077_SPLAT_YAML := config/splat.ov_SC01_077.yaml
ov_SC01_077_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_077_jr_8012ACE0.o,tail2.data.o,ov_SC01_077_jr_801380E0.o,tail3.data.o,ov_SC01_077_o0.o,tail4.data.o,ov_SC01_077.o,tail5.data.o,ov_SC01_077_jr_8015444C.o,tail6.data.o,ov_SC01_077_jr_80159C84.o,tail7.data.o,ov_SC01_077_jr_8015A3C8.o,tail8.data.o,ov_SC01_077_jr_8015AE2C.o,tail9.data.o,ov_SC01_077_jr_8015C32C.o,tail10.data.o,ov_SC01_077_jr_8016AB6C.o,tail11.data.o,ov_SC01_077_jr_801734BC.o,tail12.data.o,ov_SC01_077_jr_80178D40.o,tail13.data.o,ov_SC01_077_jr_8017A4AC.o,tail14.data.o,ov_SC01_077_jr_80182268.o,tail15.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
build/src/ov_SC01_077/ov_SC01_077.o: JTBL_PADS := 0,0,4,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20,+0x38,+0x58
build/src/ov_SC01_077/ov_SC01_077.o: JTBL_PADS := 0,0,4,0,4,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20,+0x38,+0x58,+0x70,+0x90
build/src/ov_SC01_077/ov_SC01_077_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc
build/src/ov_SC01_077/ov_SC01_077_jr_80159C84.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
ov_SC01_077_CHECK_SHA := config/check.ov_SC01_077.sha
config/splat.ov_SC01_077.yaml
+1 -1
View File
@@ -96,7 +96,7 @@ segments:
- [0xb01a4, .rodata, ov_SC01_077_o0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xb0280, data, tail4]
- [0xb0708, .rodata, ov_SC01_077] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xb0774, data, tail5]
- [0xb07ac, data, tail5]
- [0xb07dc, .rodata, ov_SC01_077_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xb0848, data, tail6]
- [0xb09a4, .rodata, ov_SC01_077_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
src/ov_SC01_077/ov_SC01_077.c
+104 -1
View File
@@ -2054,7 +2054,110 @@ s32 func_8013FFD8(s16 arg0, s32 arg1, s32 *arg2) {
}
INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077", func_8014032C);
/* indexed data arrays (overlay) */
/* address-return symbols (main RAM) */
s32 func_8014032C(s32 param_1, s32 param_2) {
extern int (*D_80187F00[])(void);
extern int (*D_80187EF0[])(void);
extern void * D_80187C0C[];
extern void * D_80187C3C[];
extern void * D_80187C4C[];
extern void * D_80187C24[];
extern u8 D_80187BDC[];
extern void * D_80187C64[];
extern void * D_80187C7C[];
extern void * D_80187C90[];
extern u8 D_80187BE3[];
extern u8 * D_801D95CC;
extern u8 D_801117EC[];
extern u8 D_801117B4[];
extern u8 D_80112BC8[];
extern u8 D_80112B58[];
extern u8 D_80112BA8[];
extern u8 D_80112B90[];
int cVar1;
unsigned int uVar3;
void *result;
result = D_801117EC;
switch (((short)param_1)) {
case 0:
if (((s32(*)(s32))func_80029178)(D_80187BB8[((short)param_2)]) & 0xFF) {
result = D_80187C0C[((short)param_2)];
}
break;
case 1:
result = D_80187C3C[((short)param_2)];
break;
case 2:
switch ((*(s16*)&D_80115128)) {
case 0:
if (D_80187F00[((short)param_2)]() == 0) {
((short)param_2) = 5;
} else if (D_80187EF0[((short)param_2)]() != 0) {
((short)param_2) = 4;
}
result = D_80187C4C[((short)param_2)];
break;
case 1:
goto case5;
case 2:
if (((s32(*)(s32))func_80029178)(D_801D95CC[((short)param_2)]) & 0xFF) {
if (((short)param_2) == 5 && (((s32(*)(s32))func_80029178)(0x1C) & 0xFF)) {
result = D_801117B4;
} else {
result = D_80187C24[((short)param_2)];
}
}
break;
case 3:
if (((s32(*)(s32))func_80029178)(D_80187BDC[((short)param_2)]) & 0xFF) {
result = D_80187C64[((short)param_2)];
}
break;
case 4:
result = D_80187C7C[((short)param_2)];
break;
}
break;
case 5:
case5:
uVar3 = ((s32(*)(s32))func_800291B4)(D_80187BD0[((short)param_2)]) & 0xFF;
if (uVar3 != 0) {
result = D_80187C90[uVar3];
}
break;
case 3:
if (((short)param_2) != 0) {
cVar1 = ((s32(*)(s32))func_800291B4)(D_80187BE3[((short)param_2)]) & 0xFF;
if (cVar1 == 0) {
result = D_80112B58;
} else {
result = D_80112BA8;
if (cVar1 == 1) {
result = D_80112B90;
}
}
} else {
result = D_80112BC8;
}
break;
case 6:
case 7:
default:
result = 0;
break;
}
return result;
}
INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077", func_80140608);