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https://github.com/Druthulu/BFM-decomp
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phase-36: S104 e33 banked 4 (func_8017F0EC as a class-E declaration alias, R26's form); e35 packs (md_SC07_004 batch 4)
This commit is contained in:
Drew T
@@ -1,17 +1,5 @@
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rank fn alias copies best needed kinds regs tu
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1 func_800D1984 resident 1 1 1 pin $0 src/resident/resident_jr_800D128C.c
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17 func_800D1B80 resident 1 1 1 pin $0 src/resident/resident_jr_800D128C.c
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25 func_80183DA0 ov_SC03_105 1 1 2 launder,pin $17 src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
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4 func_800D1658 resident 1 4 3 pin $16,$2,$3 src/resident/resident_jr_800D128C.c
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72 func_8017E830 ov_SC04_015 1 5 1 barrier src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
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109 func_800335B8 main 1 7 2 launder src/800_b_2.c
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102 func_80032A74 main 1 11 3 barrier,pin $2 src/800_b_2.c
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3 func_80181C84 ov_SC03_105 1 13 2 pin $18,$3 src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
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69 func_8017E2CC ov_SC04_015 1 13 2 pin $2,$3 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
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3 func_800D128C resident 1 15 3 barrier,launder src/resident/resident_jr_800D128C.c
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13 func_801834A4 ov_SC03_105 1 21 3 launder,pin $2 src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
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105 func_8003324C main 1 22 2 keepalive,pin $16 src/800_b_2.c
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79 func_8017EE80 ov_SC04_015 1 23 1 pin $18 src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
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75 func_8002FF0C main 1 23 3 barrier src/800_b_2.c
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81 func_8017F0EC ov_SC04_015 1 56 1 launder src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
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16 func_8018574C ov_SC03_105 1 None 1 pin $16 src/ov_SC03_105/ov_SC03_105_jr_80181C84.c
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44 func_801A3594 md_SC07_004 1 7 2 pin $2,$3 src/md_SC07_004/md_SC07_004.c
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51 func_801A395C md_SC07_004 1 7 2 barrier,keepalive src/md_SC07_004/md_SC07_004.c
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240 func_801ABEE0 md_SC07_004 1 9 2 pin $17 src/md_SC07_004/md_SC07_004.c
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79 func_801A4ACC md_SC07_004 1 24 2 pin $16,$17 src/md_SC07_004/md_SC07_004.c
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@@ -0,0 +1,40 @@
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s32 func_801A3594(void *a0) {
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s16 buf[12];
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u16 b;
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u16 a;
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s16 diff;
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s16 v1;
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s32 tw;
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s16 t16;
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s16 xr;
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v1 = *(s16 *)((s32)a0 + 0x106);
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switch (v1) {
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case 0:
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a = *(u16 *)((s32)a0 + 0xE8);
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b = *(u16 *)((s32)a0 + 0x6);
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diff = a - b;
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buf[0] = diff;
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tw = *(s16 *)((s32)a0 + 0xEC);
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break;
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case 1:
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a = *(u16 *)((s32)a0 + 0xEA);
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b = *(u16 *)((s32)a0 + 0xE);
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diff = a - b;
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buf[1] = diff;
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tw = *(s16 *)((s32)a0 + 0xEE);
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break;
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default:
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goto default_case;
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}
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if (tw == 0) goto ret1;
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t16 = tw;
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if (diff == 0) goto ret1;
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xr = diff ^ t16;
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if (xr >= 0) goto default_case;
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ret1:
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return 1;
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default_case:
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return 0;
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}
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@@ -0,0 +1,40 @@
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s32 func_801A3594(void *a0) {
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s16 buf[12];
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register u16 b __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus9)
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u16 a;
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s16 diff;
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s16 v1;
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register s32 tw __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus9)
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s16 t16;
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s16 xr;
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v1 = *(s16 *)((s32)a0 + 0x106);
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switch (v1) {
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case 0:
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a = *(u16 *)((s32)a0 + 0xE8);
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b = *(u16 *)((s32)a0 + 0x6);
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diff = a - b;
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buf[0] = diff;
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tw = *(s16 *)((s32)a0 + 0xEC);
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break;
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case 1:
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a = *(u16 *)((s32)a0 + 0xEA);
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b = *(u16 *)((s32)a0 + 0xE);
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diff = a - b;
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buf[1] = diff;
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tw = *(s16 *)((s32)a0 + 0xEE);
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break;
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default:
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goto default_case;
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}
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if (tw == 0) goto ret1;
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t16 = tw;
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if (diff == 0) goto ret1;
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xr = diff ^ t16;
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if (xr >= 0) goto default_case;
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ret1:
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return 1;
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default_case:
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return 0;
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}
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@@ -0,0 +1,14 @@
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s5: verdict NO-MATCH start 11 best 7 compiles 188 path R6 inline a @2179 + R7 do-while @2186
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best-scoring single candidates of the last trace (move -> score [residual class]):
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R7 do-while @2186 -> 7 [COUNT] (from 9)
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R2 decl-order 1,0 -> 7 [COUNT] (from 11)
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R4 decl-move b 1->2 -> 7 [COUNT] (from 11)
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R4 decl-move b 1->3 -> 7 [COUNT] (from 11)
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R4 decl-move b 1->4 -> 7 [COUNT] (from 11)
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R4 decl-move b 1->5 -> 7 [COUNT] (from 11)
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R4 decl-move b 1->6 -> 7 [COUNT] (from 11)
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R6 inline a @2186 -> 9 [COUNT] (from 11)
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R6 inline a @2179 -> 9 [COUNT] (from 11)
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R12 width xr s16->s32 @2174 -> 9 [COUNT] (from 9)
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R8 temp tmp0 @2176 -> 9 [COUNT] (from 9)
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R7 block @2181 -> 9 [COUNT] (from 9)
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@@ -0,0 +1,3 @@
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--- every @class/@stuck/@crack note in this translation unit ---
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// @class: loose-typing
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// @stuck: none — MATCH (99 ins). short* for param_2/param_3: gcc emits lh where sign is live (<<1 for signed div), lhu where truncated to short (arith result / direct copy)
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@@ -0,0 +1,21 @@
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src/md_SC07_004/md_SC07_004.c:func_801A3594: score 11 (COUNT; mine 35 ins, target 36) — not yet
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register pairs (mine -> target, count): v1->v0 x4, v0->v1 x4, a0->v0 x2
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replace mine[7:8] target[7:8]
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7 j 33e4 <func_801A3594+0x80> | j 33e8 <func_801A3594+0x84>
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replace mine[9:11] target[9:11]
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9 lhu v1,232(a0) | lhu v0,232(a0)
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10 lhu v0,6(a0) | lhu v1,6(a0)
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replace mine[12:13] target[12:13]
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12 subu v1,v1,v0 | subu v1,v0,v1
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replace mine[14:15] target[14:15]
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14 lh a0,236(a0) | lh v0,236(a0)
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replace mine[17:19] target[17:19]
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17 lhu v1,234(a0) | lhu v0,234(a0)
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18 lhu v0,14(a0) | lhu v1,14(a0)
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replace mine[20:21] target[20:21]
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20 subu v1,v1,v0 | subu v1,v0,v1
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replace mine[22:23] target[22:23]
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22 lh a0,238(a0) | lh v0,238(a0)
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replace mine[24:25] target[24:26]
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24 beqz a0,33e0 <func_801A3594+0x7c> | beqz v0,33e4 <func_801A3594+0x80>
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25 -- | move a0,v0
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@@ -0,0 +1,4 @@
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NEEDED pin $3 line 2168
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NEEDED pin $2 line 2172
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REMOVED pin $4 line 2173
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REMOVED pin $2 line 2174
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@@ -0,0 +1,2 @@
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src/md_SC07_004/md_SC07_004.c
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func_801A3594
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@@ -0,0 +1,28 @@
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void func_801A395C(s32 a0, s32 a1) {
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s32 ret;
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s16 cur;
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s16 t;
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s32 overshot;
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t = (s16)a1;
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cur = *(s16 *)(a0 + 0xA);
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if (cur == t) {
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ret = 1;
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} else {
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if (t < cur) {
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cur -= 2;
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*(s16 *)(a0 + 0xA) = cur;
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overshot = (t < cur);
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} else {
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cur += 2;
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*(s16 *)(a0 + 0xA) = cur;
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overshot = (cur < t);
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}
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if (overshot) {
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ret = 0;
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} else {
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*(s16 *)(a0 + 0xA) = t;
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ret = 1;
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}
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}
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}
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@@ -0,0 +1,30 @@
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void func_801A395C(s32 a0, s32 a1) {
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s32 ret;
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s16 cur;
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s16 t;
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s32 overshot;
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t = (s16)a1;
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cur = *(s16 *)(a0 + 0xA);
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if (cur == t) {
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__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9)
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ret = 1;
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} else {
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if (t < cur) {
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cur -= 2;
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*(s16 *)(a0 + 0xA) = cur;
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overshot = (t < cur);
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} else {
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cur += 2;
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*(s16 *)(a0 + 0xA) = cur;
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overshot = (cur < t);
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}
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if (overshot) {
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ret = 0;
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} else {
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*(s16 *)(a0 + 0xA) = t;
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ret = 1;
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}
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}
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__asm__ __volatile__("" :: "r"(ret)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus9)
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}
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@@ -0,0 +1,14 @@
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s5: verdict NO-MATCH start 7 best 7 compiles 190 path
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best-scoring single candidates of the last trace (move -> score [residual class]):
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R8 temp tmp0 @2398 -> 7 [COUNT] (from 7)
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R7 block @2415 -> 7 [COUNT] (from 7)
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R10 param-copy a0 @2396 -> 7 [COUNT] (from 7)
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R12 width overshot s32->s16 @2395 -> 7 [COUNT] (from 7)
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R8 base tmp0 @2398 -> 7 [COUNT] (from 7)
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R7 do-while @2415 -> 7 [COUNT] (from 7)
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R9 swap-stmts @2397 -> 7 [COUNT] (from 7)
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R10 param-copy a1 @2396 -> 7 [COUNT] (from 7)
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R7 block @2412 -> 7 [COUNT] (from 7)
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R9 swap-stmts @2414 -> 7 [COUNT] (from 7)
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R7 do-while @2412 -> 7 [COUNT] (from 7)
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R7 block @2398 -> 7 [COUNT] (from 7)
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@@ -0,0 +1,22 @@
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--- func_801A3798 (line 2330) ---
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/* Three zero-byte levers carry this body; all three are load-bearing (single-axis A/B'd):
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*
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* 1. `y = arg1 + zr` with `zr` pinned to $0 (§36 "$0-add opaque copy"). The target keeps
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* TWO callee-saved registers holding arg1 ($s2 = the parameter home, $s1 = a copy born
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* after the jal). A plain `y = arg1;` is head-promoted by cse.c make_regs_eqv and the
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* copy vanishes (LENGTH-DRIFT -1, and $s0/$s1 instead of $s0/$s1/$s2).
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* 2. The non-volatile re-tie `__asm__("" : "=r"(y) : "0"(y))` gives `y` a second RTL SET,
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* which kills the sched1 birthing boost on the copy and emits it BEFORE the call's
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* return-value copy — so dbr steals `addu $a0,$v0,$zero` for the bltz delay slot
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* instead of the arg1 copy (§47-addendum / §34 reg_n_sets==2).
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* 3. `goto ret0` instead of `return 0` after the func_80132288 tail. With an in-block
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* `return 0` the tail block's rare_destination flips and reorg refuses to steal
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* `addiu $v0,$zero,3` into the `bnez $v0` delay slot (an unfillable +1 nop). Routing
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* the exit through one shared `ret0:` tail restores the fill (§16 / §3-B shared-ret0).
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*
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* `t <<= 16; v1 = t >> 16;` (rather than `v1 = (s16)t;`) makes the sll reuse $v0 in place,
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* which is what stops dbr from sinking `sh $v0,0xE6($s0)` into the bltz delay slot.
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*/
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--- every @class/@stuck/@crack note in this translation unit ---
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// @class: loose-typing
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// @stuck: none — MATCH (99 ins). short* for param_2/param_3: gcc emits lh where sign is live (<<1 for signed div), lhu where truncated to short (arith result / direct copy)
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@@ -0,0 +1,13 @@
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src/md_SC07_004/md_SC07_004.c:func_801A395C: score 7 (COUNT; mine 26 ins, target 29) — not yet
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replace mine[5:6] target[5:6]
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5 beq v0,a1,3788 <func_801A395C+0x5c> | bne v0,a1,3750 <func_801A395C+0x24>
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insert mine[7:7] target[7:9]
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7 -- | j 3794 <func_801A395C+0x68>
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8 -- | li v0,1
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replace mine[13:14] target[15:16]
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13 j 377c <func_801A395C+0x50> | j 3784 <func_801A395C+0x58>
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replace mine[20:22] target[22:24]
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20 bnez v0,3788 <func_801A395C+0x5c> | bnez v0,3794 <func_801A395C+0x68>
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21 nop | move v0,zero
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insert mine[23:23] target[25:26]
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23 -- | li v0,1
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@@ -0,0 +1,3 @@
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REMOVED pin $2 line 2392
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NEEDED barrier line 2400
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NEEDED keepalive line 2419
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@@ -0,0 +1,2 @@
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src/md_SC07_004/md_SC07_004.c
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func_801A395C
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@@ -0,0 +1,173 @@
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void func_801A4ACC(void *a0)
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{
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s32 *s0;
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s32 s1;
|
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s32 *s2;
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s32 v0;
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s32 v1;
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s32 a0_;
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s32 a1;
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s32 a2;
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s0 = (s32 *)a0;
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v1 = *(u16 *)((s32)s0 + 0x34);
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s1 = *(s32 *)((s32)s0 + 0xCC);
|
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if ((u32)v1 >= 5) {
|
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goto end;
|
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}
|
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switch (v1) {
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case 0:
|
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v0 = *(s16 *)((s32)s0 + 0x70);
|
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if (v0 != 0) {
|
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a0_ = (s32)s0;
|
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goto e58;
|
||||
}
|
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s2 = &D_801F8888;
|
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func_8013240C((s32)s2);
|
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if (s1 != 0) {
|
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func_8013240C((s32)&D_801F8898);
|
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}
|
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v0 = *(u16 *)&D_801F888C;
|
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v1 = *(u16 *)&D_801F888E;
|
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v0 |= v1;
|
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if (v0 != 0) {
|
||||
a0_ = (s32)s0;
|
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goto e58;
|
||||
}
|
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func_80132288(s2, &D_801B00EC, D_801B75EC);
|
||||
if (s1 == 0) {
|
||||
a0_ = 4;
|
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} else {
|
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func_80132288(&D_801F8898, &D_801B00FC, *(s32 *)D_801B80FC);
|
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a0_ = 4;
|
||||
}
|
||||
func_8002D4C8(a0_, 0xABE);
|
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goto inc;
|
||||
case 1:
|
||||
s2 = &D_801F8888;
|
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func_8013240C((s32)s2);
|
||||
if (s1 != 0) {
|
||||
func_8013240C((s32)&D_801F8898);
|
||||
}
|
||||
v0 = D_801F8894;
|
||||
v0 &= 0x4000;
|
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if (v0 == 0) {
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
}
|
||||
func_80132288(s2, &D_801B010C, D_801B75EC);
|
||||
if (s1 == 0) {
|
||||
goto inc;
|
||||
}
|
||||
a0_ = (s32)&D_801F8898;
|
||||
a2 = *(s32 *)D_801B80FC;
|
||||
a1 = (s32)&D_801B011C;
|
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goto cb4;
|
||||
case 2:
|
||||
s2 = &D_801F8888;
|
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func_8013240C((s32)s2);
|
||||
if (s1 != 0) {
|
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func_8013240C((s32)&D_801F8898);
|
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}
|
||||
v0 = D_801F8894;
|
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v0 &= 0x4000;
|
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if (v0 == 0) {
|
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a0_ = (s32)s0;
|
||||
goto e58;
|
||||
}
|
||||
func_80132288(s2, &D_801B012C, D_801B75EC);
|
||||
if (s1 == 0) {
|
||||
goto inc;
|
||||
}
|
||||
a0_ = (s32)&D_801F8898;
|
||||
a2 = *(s32 *)D_801B80FC;
|
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a1 = (s32)&D_801B013C;
|
||||
cb4:
|
||||
func_80132288((s32 *)a0_, (s32 *)a1, a2);
|
||||
inc:
|
||||
v0 = *(u16 *)((s32)s0 + 0x34);
|
||||
v0 += 1;
|
||||
*(u16 *)((s32)s0 + 0x34) = v0;
|
||||
goto end;
|
||||
case 3:
|
||||
func_8013240C((s32)&D_801F8888);
|
||||
if (s1 != 0) {
|
||||
func_8013240C((s32)&D_801F8898);
|
||||
}
|
||||
v0 = D_801F8894;
|
||||
v0 &= 0x4000;
|
||||
if (v0 == 0) {
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
}
|
||||
v0 = *(u16 *)((s32)s0 + 0x34);
|
||||
v1 = *(s32 *)((s32)s0 + 0x6C);
|
||||
*(u16 *)((s32)s0 + 0x34) = v0 + 1;
|
||||
if (v1 == 0) {
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
}
|
||||
*(u16 *)(v1 + 0x34) = 4;
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
case 4:
|
||||
v1 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(u16 *)(v1 + 0x1A);
|
||||
v0 -= 0x80;
|
||||
*(u16 *)(v1 + 0x1A) = v0;
|
||||
v1 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(u16 *)(v1 + 0x1A);
|
||||
*(u16 *)(v1 + 0x1C) = v0;
|
||||
v0 = *(s16 *)((s32)s0 + 0x70);
|
||||
if (v0 != 0) {
|
||||
goto dec;
|
||||
}
|
||||
v1 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(u16 *)(v1 + 0x14);
|
||||
v0 -= 0x10;
|
||||
*(u16 *)(v1 + 0x14) = v0;
|
||||
v1 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(u16 *)(v1 + 0x1A);
|
||||
*(u16 *)(v1 + 0x18) = v0;
|
||||
v0 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(s16 *)(v0 + 0x1A);
|
||||
if (v0 > 0) {
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
}
|
||||
v0 = *(s32 *)((s32)s0 + 0x64);
|
||||
*(s32 *)(v0 + 0xCC) = 0;
|
||||
if (s1 != 0) {
|
||||
func_8012C218((void *)s1);
|
||||
}
|
||||
func_8012C218((void *)s0);
|
||||
D_8019FF8A &= 0xFFFD;
|
||||
return;
|
||||
dec:
|
||||
v1 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(u16 *)(v1 + 0x14);
|
||||
v0 += 0x10;
|
||||
*(u16 *)(v1 + 0x14) = v0;
|
||||
v1 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(u16 *)(v1 + 0x1A);
|
||||
v0 = -v0;
|
||||
*(u16 *)(v1 + 0x18) = v0;
|
||||
v0 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(s16 *)(v0 + 0x1A);
|
||||
if (v0 > 0) {
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
}
|
||||
if (s1 != 0) {
|
||||
func_8012C218((void *)s1);
|
||||
}
|
||||
func_8012C218((void *)s0);
|
||||
return;
|
||||
}
|
||||
|
||||
end:
|
||||
a0_ = (s32)s0;
|
||||
e58:
|
||||
func_80132784(a0_, *(s32 *)(a0_ + 0x64), 0);
|
||||
}
|
||||
@@ -0,0 +1,173 @@
|
||||
void func_801A4ACC(void *a0)
|
||||
{
|
||||
register s32 *s0 __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
register s32 s1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
s32 *s2;
|
||||
s32 v0;
|
||||
s32 v1;
|
||||
s32 a0_;
|
||||
s32 a1;
|
||||
s32 a2;
|
||||
|
||||
s0 = (s32 *)a0;
|
||||
v1 = *(u16 *)((s32)s0 + 0x34);
|
||||
s1 = *(s32 *)((s32)s0 + 0xCC);
|
||||
if ((u32)v1 >= 5) {
|
||||
goto end;
|
||||
}
|
||||
|
||||
switch (v1) {
|
||||
case 0:
|
||||
v0 = *(s16 *)((s32)s0 + 0x70);
|
||||
if (v0 != 0) {
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
}
|
||||
s2 = &D_801F8888;
|
||||
func_8013240C((s32)s2);
|
||||
if (s1 != 0) {
|
||||
func_8013240C((s32)&D_801F8898);
|
||||
}
|
||||
v0 = *(u16 *)&D_801F888C;
|
||||
v1 = *(u16 *)&D_801F888E;
|
||||
v0 |= v1;
|
||||
if (v0 != 0) {
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
}
|
||||
func_80132288(s2, &D_801B00EC, D_801B75EC);
|
||||
if (s1 == 0) {
|
||||
a0_ = 4;
|
||||
} else {
|
||||
func_80132288(&D_801F8898, &D_801B00FC, *(s32 *)D_801B80FC);
|
||||
a0_ = 4;
|
||||
}
|
||||
func_8002D4C8(a0_, 0xABE);
|
||||
goto inc;
|
||||
case 1:
|
||||
s2 = &D_801F8888;
|
||||
func_8013240C((s32)s2);
|
||||
if (s1 != 0) {
|
||||
func_8013240C((s32)&D_801F8898);
|
||||
}
|
||||
v0 = D_801F8894;
|
||||
v0 &= 0x4000;
|
||||
if (v0 == 0) {
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
}
|
||||
func_80132288(s2, &D_801B010C, D_801B75EC);
|
||||
if (s1 == 0) {
|
||||
goto inc;
|
||||
}
|
||||
a0_ = (s32)&D_801F8898;
|
||||
a2 = *(s32 *)D_801B80FC;
|
||||
a1 = (s32)&D_801B011C;
|
||||
goto cb4;
|
||||
case 2:
|
||||
s2 = &D_801F8888;
|
||||
func_8013240C((s32)s2);
|
||||
if (s1 != 0) {
|
||||
func_8013240C((s32)&D_801F8898);
|
||||
}
|
||||
v0 = D_801F8894;
|
||||
v0 &= 0x4000;
|
||||
if (v0 == 0) {
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
}
|
||||
func_80132288(s2, &D_801B012C, D_801B75EC);
|
||||
if (s1 == 0) {
|
||||
goto inc;
|
||||
}
|
||||
a0_ = (s32)&D_801F8898;
|
||||
a2 = *(s32 *)D_801B80FC;
|
||||
a1 = (s32)&D_801B013C;
|
||||
cb4:
|
||||
func_80132288((s32 *)a0_, (s32 *)a1, a2);
|
||||
inc:
|
||||
v0 = *(u16 *)((s32)s0 + 0x34);
|
||||
v0 += 1;
|
||||
*(u16 *)((s32)s0 + 0x34) = v0;
|
||||
goto end;
|
||||
case 3:
|
||||
func_8013240C((s32)&D_801F8888);
|
||||
if (s1 != 0) {
|
||||
func_8013240C((s32)&D_801F8898);
|
||||
}
|
||||
v0 = D_801F8894;
|
||||
v0 &= 0x4000;
|
||||
if (v0 == 0) {
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
}
|
||||
v0 = *(u16 *)((s32)s0 + 0x34);
|
||||
v1 = *(s32 *)((s32)s0 + 0x6C);
|
||||
*(u16 *)((s32)s0 + 0x34) = v0 + 1;
|
||||
if (v1 == 0) {
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
}
|
||||
*(u16 *)(v1 + 0x34) = 4;
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
case 4:
|
||||
v1 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(u16 *)(v1 + 0x1A);
|
||||
v0 -= 0x80;
|
||||
*(u16 *)(v1 + 0x1A) = v0;
|
||||
v1 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(u16 *)(v1 + 0x1A);
|
||||
*(u16 *)(v1 + 0x1C) = v0;
|
||||
v0 = *(s16 *)((s32)s0 + 0x70);
|
||||
if (v0 != 0) {
|
||||
goto dec;
|
||||
}
|
||||
v1 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(u16 *)(v1 + 0x14);
|
||||
v0 -= 0x10;
|
||||
*(u16 *)(v1 + 0x14) = v0;
|
||||
v1 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(u16 *)(v1 + 0x1A);
|
||||
*(u16 *)(v1 + 0x18) = v0;
|
||||
v0 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(s16 *)(v0 + 0x1A);
|
||||
if (v0 > 0) {
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
}
|
||||
v0 = *(s32 *)((s32)s0 + 0x64);
|
||||
*(s32 *)(v0 + 0xCC) = 0;
|
||||
if (s1 != 0) {
|
||||
func_8012C218((void *)s1);
|
||||
}
|
||||
func_8012C218((void *)s0);
|
||||
D_8019FF8A &= 0xFFFD;
|
||||
return;
|
||||
dec:
|
||||
v1 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(u16 *)(v1 + 0x14);
|
||||
v0 += 0x10;
|
||||
*(u16 *)(v1 + 0x14) = v0;
|
||||
v1 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(u16 *)(v1 + 0x1A);
|
||||
v0 = -v0;
|
||||
*(u16 *)(v1 + 0x18) = v0;
|
||||
v0 = *(s32 *)((s32)s0 + 0x20);
|
||||
v0 = *(s16 *)(v0 + 0x1A);
|
||||
if (v0 > 0) {
|
||||
a0_ = (s32)s0;
|
||||
goto e58;
|
||||
}
|
||||
if (s1 != 0) {
|
||||
func_8012C218((void *)s1);
|
||||
}
|
||||
func_8012C218((void *)s0);
|
||||
return;
|
||||
}
|
||||
|
||||
end:
|
||||
a0_ = (s32)s0;
|
||||
e58:
|
||||
func_80132784(a0_, *(s32 *)(a0_ + 0x64), 0);
|
||||
}
|
||||
@@ -0,0 +1,14 @@
|
||||
s5: verdict NO-MATCH start 54 best 24 compiles 190 path R6 inline a0_ @3257
|
||||
best-scoring single candidates of the last trace (move -> score [residual class]):
|
||||
R6 inline a0_ @3257 -> 24 [REG] (from 54)
|
||||
R2 decl-order 1,0 -> 24 [REG] (from 24)
|
||||
R4 decl-move s0 0->2 -> 24 [REG] (from 24)
|
||||
R8 temp tmp0 @3297 -> 24 [REG] (from 24)
|
||||
R7 block @3311 -> 24 [REG] (from 24)
|
||||
R10 param-alias s0->a0 @3226 -> 24 [REG] (from 24)
|
||||
R4 decl-move s0 0->3 -> 24 [REG] (from 24)
|
||||
R7 do-while @3311 -> 24 [REG] (from 24)
|
||||
R10 param-copy a0 @3225 -> 24 [REG] (from 24)
|
||||
R4 decl-move s0 0->4 -> 24 [REG] (from 24)
|
||||
R8 temp tmp0 @3352 -> 24 [REG] (from 24)
|
||||
R7 block @3282 -> 24 [REG] (from 24)
|
||||
@@ -0,0 +1,3 @@
|
||||
--- every @class/@stuck/@crack note in this translation unit ---
|
||||
// @class: loose-typing
|
||||
// @stuck: none — MATCH (99 ins). short* for param_2/param_3: gcc emits lh where sign is live (<<1 for signed div), lhu where truncated to short (arith result / direct copy)
|
||||
@@ -0,0 +1,231 @@
|
||||
=== lever-free bodies in md_SC07_004 sharing a callee or global with func_801A4ACC (57 found; top 6 by shared symbols) — read them for the SHAPE ===
|
||||
--- func_801A4724 (src/md_SC07_004/md_SC07_004.c:3061) shares 8: D_801B75EC D_801B80FC D_801F8888 D_801F8894 D_801F8898 func_80132288 func_8013240C func_80132784 ---
|
||||
void func_801A4724(void *arg0)
|
||||
{
|
||||
s32 mirror;
|
||||
u16 state;
|
||||
s32 newState;
|
||||
|
||||
state = *(u16 *)((u8 *)arg0 + 0x34);
|
||||
mirror = *(s32 *)((u8 *)arg0 + 0xCC);
|
||||
|
||||
switch (state) {
|
||||
case 0:
|
||||
if (*(s16 *)((u8 *)arg0 + 0x70) != 0) {
|
||||
break;
|
||||
}
|
||||
if (*(s32 *)((u8 *)arg0 + 0x1C) != 0x16) {
|
||||
break;
|
||||
}
|
||||
func_80132288(&D_801F8888, &D_801B001C, D_801B75EC);
|
||||
if (mirror != 0) {
|
||||
func_80132288(&D_801F8898, &D_801B002C, *(s32 *)D_801B80FC);
|
||||
}
|
||||
goto inc;
|
||||
case 1:
|
||||
case 3:
|
||||
func_8013240C((s32)&D_801F8888);
|
||||
if (mirror != 0) {
|
||||
func_8013240C((s32)&D_801F8898);
|
||||
}
|
||||
if (!(D_801F8894 & 0x4000)) {
|
||||
break;
|
||||
}
|
||||
goto inc;
|
||||
case 2:
|
||||
if (*(s32 *)((u8 *)arg0 + 0x1C) != 0x2F) {
|
||||
break;
|
||||
}
|
||||
func_80132288(&D_801F8888, &D_801B003C, D_801B75EC);
|
||||
if (mirror != 0) {
|
||||
func_80132288(&D_801F8898, &D_801B004C, *(s32 *)D_801B80FC);
|
||||
}
|
||||
goto inc;
|
||||
case 4:
|
||||
if (*(s32 *)((u8 *)arg0 + 0x1C) != 0x3C) {
|
||||
break;
|
||||
}
|
||||
func_80132288(&D_801F8888, &D_801B005C, D_801B75EC);
|
||||
if (mirror != 0) {
|
||||
func_80132288(&D_801F8898, &D_801B006C, *(s32 *)D_801B80FC);
|
||||
}
|
||||
goto inc;
|
||||
|
||||
inc:
|
||||
*(u16 *)((u8 *)arg0 + 0x34) = *(u16 *)((u8 *)arg0 + 0x34) + 1;
|
||||
break;
|
||||
|
||||
case 5:
|
||||
func_8013240C((s32)&D_801F8888);
|
||||
if (mirror != 0) {
|
||||
func_8013240C((s32)&D_801F8898);
|
||||
}
|
||||
if (!(D_801F8894 & 0x4000)) {
|
||||
break;
|
||||
}
|
||||
func_801A4A18((s32)arg0);
|
||||
func_801A4A18(*(s32 *)((u8 *)arg0 + 0x6C));
|
||||
break;
|
||||
}
|
||||
|
||||
newState = *(s32 *)((u8 *)arg0 + 0x1C) + 1;
|
||||
*(s32 *)((u8 *)arg0 + 0x1C) = newState;
|
||||
if (newState < 0x33) {
|
||||
*(s16 *)(*(s32 *)((u8 *)arg0 + 0x20) + 0x1A) = (newState << 12) / 50;
|
||||
*(s16 *)(*(s32 *)((u8 *)arg0 + 0x20) + 0x1C) = *(s16 *)(*(s32 *)((u8 *)arg0 + 0x20) + 0x1A);
|
||||
*(s16 *)(*(s32 *)((u8 *)arg0 + 0x20) + 0x14) = (0x32 - *(s32 *)((u8 *)arg0 + 0x1C)) << 4;
|
||||
if (*(s16 *)((u8 *)arg0 + 0x70) == 0) {
|
||||
*(s16 *)(*(s32 *)((u8 *)arg0 + 0x20) + 0x18) = *(u16 *)(*(s32 *)((u8 *)arg0 + 0x20) + 0x1A);
|
||||
*(s16 *)(*(s32 *)((u8 *)arg0 + 0x20) + 0x14) = -(s32)*(u16 *)(*(s32 *)((u8 *)arg0 + 0x20) + 0x14);
|
||||
} else {
|
||||
*(s16 *)(*(s32 *)((u8 *)arg0 + 0x20) + 0x18) = -(s32)*(u16 *)(*(s32 *)((u8 *)arg0 + 0x20) + 0x1A);
|
||||
}
|
||||
}
|
||||
|
||||
func_80132784((s32)arg0, *(s32 *)((u8 *)arg0 + 0x64), 0);
|
||||
}
|
||||
|
||||
--- func_801A6CA8 (src/md_SC07_004/md_SC07_004.c:4602) shares 7: D_8019FF8A D_801F8888 D_801F888C D_801F8898 func_8002D4C8 func_8013240C func_80132784 ---
|
||||
void func_801A6CA8(void *arg0) {
|
||||
void *s0;
|
||||
s32 s1;
|
||||
|
||||
s0 = arg0;
|
||||
s1 = *(s32 *)((u8 *)s0 + 0xCC);
|
||||
|
||||
if (*(s16 *)((u8 *)s0 + 0x70) == 0) {
|
||||
func_8013240C((s32)&D_801F8888);
|
||||
if (s1 != 0) {
|
||||
func_8013240C((s32)&D_801F8898);
|
||||
}
|
||||
func_801A4EBC(s0);
|
||||
if (D_801F888C == 1) {
|
||||
func_8002D4C8(0xAB9, 0);
|
||||
if (*(s16 *)((u8 *)s0 + 0x84) == 0) {
|
||||
func_8002D4C8(0xABE, 0);
|
||||
*(u16 *)((u8 *)s0 + 0x84) += 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
func_80132784((s32)s0, *(s32 *)((u8 *)s0 + 0x64), 0);
|
||||
if (D_8019FF8A & 0x100) {
|
||||
func_801A4AAC(s0);
|
||||
}
|
||||
}
|
||||
|
||||
--- func_801A4A18 (src/md_SC07_004/md_SC07_004.c:3159) shares 5: D_801B75EC D_801B80FC D_801F8888 D_801F8898 func_80132288 ---
|
||||
void func_801A4A18(s32 a0)
|
||||
{
|
||||
s16 cond;
|
||||
s32 mirror;
|
||||
|
||||
cond = *(s16 *)(a0 + 0x70);
|
||||
mirror = *(s32 *)(a0 + 0xCC);
|
||||
|
||||
if (cond == 0) {
|
||||
func_80132288(&D_801F8888, &D_801B007C, D_801B75EC);
|
||||
if (mirror != 0) {
|
||||
func_80132288(&D_801F8898, &D_801B00B4, (*(s32 *)D_801B80FC));
|
||||
}
|
||||
}
|
||||
|
||||
*(s16 *)(a0 + 0x84) = 0;
|
||||
func_8012AD44((s32 *)a0, 2);
|
||||
}
|
||||
|
||||
--- func_801A6D90 (src/md_SC07_004/md_SC07_004.c:4638) shares 3: D_801F8888 func_8013240C func_80132784 ---
|
||||
void func_801A6D90(void *arg0) {
|
||||
if (*(u16 *)((u8 *)arg0 + 0x34) == 0) {
|
||||
func_8013240C((s32)&D_801F8888);
|
||||
*(u16 *)((u8 *)arg0 + 0x34) += 1;
|
||||
}
|
||||
|
||||
func_80132784((s32)arg0, *(s32 *)((u8 *)arg0 + 0x64), 0);
|
||||
}
|
||||
|
||||
--- func_801A66DC (src/md_SC07_004/md_SC07_004.c:4342) shares 3: D_8019FF8A func_80132288 func_8013240C ---
|
||||
void func_801A66DC(s32 a0) {
|
||||
s32 *sp;
|
||||
u8 pad[8];
|
||||
|
||||
switch (*(u16 *)(a0 + 0x34)) {
|
||||
case 0:
|
||||
sp = &D_801BF01C;
|
||||
func_8001C924(*(s32 *)(a0 + 0x20), sp);
|
||||
func_8012B2CC(a0);
|
||||
func_801A39D0(a0);
|
||||
func_80132288(&D_801F8724, D_801AFB78, *sp);
|
||||
D_8019FF8A |= 1;
|
||||
*(s32 *)(a0 + 0xD4) = func_801A8528(a0);
|
||||
func_801A85A8(a0, 0x28080A0, 0, 0x200);
|
||||
func_801A8A64(a0);
|
||||
func_8017FA74();
|
||||
*(u16 *)(a0 + 0x34) += 1;
|
||||
break;
|
||||
case 1:
|
||||
func_8013240C((s32)&D_801F8724);
|
||||
if (D_801F8730 & 0x4000) {
|
||||
func_801A18F4(a0);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
--- func_801A3798 (src/md_SC07_004/md_SC07_004.c:2330) shares 3: D_8019FF8A func_80132288 func_8013240C ---
|
||||
s32 func_801A3798(s32 s0, s32 arg1) {
|
||||
s32 v0;
|
||||
s32 v1;
|
||||
u16 y;
|
||||
s32 t;
|
||||
s32 p;
|
||||
u16 f9;
|
||||
|
||||
y = arg1 + 0;
|
||||
v0 = ((s32 (*)(s32, s32))func_801A395C)(s0, (s16)(*(u16 *)(s0 + 0x100) - 0x240));
|
||||
v1 = *(s16 *)(s0 + 0xE6);
|
||||
if (v1 >= 0) {
|
||||
func_8013240C((s32)&D_801F8724);
|
||||
if (D_801F8730 & 0x4000) {
|
||||
t = *(u16 *)(s0 + 0xE6) - 1;
|
||||
*(u16 *)(s0 + 0xE6) = t;
|
||||
t <<= 16;
|
||||
v1 = t >> 16;
|
||||
if (v1 >= 0) {
|
||||
if (v1 >= 3) {
|
||||
if (v1 != 3) {
|
||||
goto other;
|
||||
}
|
||||
func_8001C924(*(s32 *)(s0 + 0x20), &D_801BC9EC);
|
||||
if (*(s32 *)(s0 + 0xD4) != 0) {
|
||||
func_801A7D18(*(s32 *)(s0 + 0xD4));
|
||||
*(s32 *)(s0 + 0xD4) = 0;
|
||||
}
|
||||
func_801A3A6C((u8 *)s0);
|
||||
*(u16 *)(s0 + 0x100) = 0;
|
||||
func_8012B2CC(s0);
|
||||
if ((arg1 << 16) != 0) {
|
||||
*(s32 *)(s0 + 0xD4) = func_801A8564(s0);
|
||||
}
|
||||
}
|
||||
func_80132288(&D_801F8724, D_801AFB7C[*(s16 *)(s0 + 0xE6)], D_801BC9EC);
|
||||
goto ret0;
|
||||
}
|
||||
other:
|
||||
func_8001C924(*(s32 *)(s0 + 0x20), D_801B6E94);
|
||||
func_8012A860((void *)s0, (int)&D_801EF9A8);
|
||||
if ((y << 16) != 0) {
|
||||
f9 = D_8019FF8A & 0xFFF7;
|
||||
p = *(s32 *)(s0 + 0xD4);
|
||||
D_8019FF8A = f9;
|
||||
if (p != 0) {
|
||||
func_801292C8((u8 *)p);
|
||||
}
|
||||
}
|
||||
}
|
||||
ret0:
|
||||
return 0;
|
||||
}
|
||||
return (*(s16 *)(s0 + 0x98) == 0) && (v0 != 0);
|
||||
}
|
||||
|
||||
@@ -0,0 +1,92 @@
|
||||
src/md_SC07_004/md_SC07_004.c:func_801A4ACC: score 54 (MIXED; mine 237 ins, target 237) — not yet
|
||||
register pairs (mine -> target, count): s1->s0 x29, s0->s2 x15, s2->s1 x12
|
||||
replace mine[1:3] target[1:3]
|
||||
1 sw s1,20(sp) | sw s0,16(sp)
|
||||
2 move s1,a0 | move s0,a0
|
||||
replace mine[5:8] target[5:8]
|
||||
5 sw s0,16(sp) | sw s1,20(sp)
|
||||
6 lhu v1,52(s1) | lhu v1,52(s0)
|
||||
7 lw s2,204(s1) | lw s1,204(s0)
|
||||
replace mine[17:18] target[17:18]
|
||||
17 lh v0,112(s1) | lh v0,112(s0)
|
||||
replace mine[20:23] target[20:23]
|
||||
20 move a0,s1 | move a0,s0
|
||||
21 lui s0,0x0 | lui s2,0x0
|
||||
22 addiu s0,s0,0 | addiu s2,s2,0
|
||||
replace mine[24:26] target[24:26]
|
||||
24 move a0,s0 | move a0,s2
|
||||
25 beqz s2,4918 <func_801A4ACC+0x7c> | beqz s1,4918 <func_801A4ACC+0x7c>
|
||||
replace mine[38:39] target[38:39]
|
||||
38 move a0,s1 | move a0,s0
|
||||
replace mine[44:46] target[44:46]
|
||||
44 move a0,s0 | move a0,s2
|
||||
45 beqz s2,497c <func_801A4ACC+0xe0> | beqz s1,497c <func_801A4ACC+0xe0>
|
||||
replace mine[60:62] target[60:62]
|
||||
60 lui s0,0x0 | lui s2,0x0
|
||||
61 addiu s0,s0,0 | addiu s2,s2,0
|
||||
replace mine[63:65] target[63:65]
|
||||
63 move a0,s0 | move a0,s2
|
||||
64 beqz s2,49b4 <func_801A4ACC+0x118> | beqz s1,49b4 <func_801A4ACC+0x118>
|
||||
replace mine[75:76] target[75:76]
|
||||
75 move a0,s1 | move a0,s0
|
||||
replace mine[81:83] target[81:83]
|
||||
81 move a0,s0 | move a0,s2
|
||||
82 beqz s2,4a8c <func_801A4ACC+0x1f0> | beqz s1,4a8c <func_801A4ACC+0x1f0>
|
||||
replace mine[92:94] target[92:94]
|
||||
92 lui s0,0x0 | lui s2,0x0
|
||||
93 addiu s0,s0,0 | addiu s2,s2,0
|
||||
replace mine[95:97] target[95:97]
|
||||
95 move a0,s0 | move a0,s2
|
||||
96 beqz s2,4a34 <func_801A4ACC+0x198> | beqz s1,4a34 <func_801A4ACC+0x198>
|
||||
replace mine[107:108] target[107:108]
|
||||
107 move a0,s1 | move a0,s0
|
||||
replace mine[113:115] target[113:115]
|
||||
113 move a0,s0 | move a0,s2
|
||||
114 beqz s2,4a8c <func_801A4ACC+0x1f0> | beqz s1,4a8c <func_801A4ACC+0x1f0>
|
||||
replace mine[124:125] target[124:125]
|
||||
124 lhu v0,52(s1) | lhu v0,52(s0)
|
||||
replace mine[128:129] target[128:129]
|
||||
128 sh v0,52(s1) | sh v0,52(s0)
|
||||
replace mine[133:134] target[133:134]
|
||||
133 beqz s2,4ac8 <func_801A4ACC+0x22c> | beqz s1,4ac8 <func_801A4ACC+0x22c>
|
||||
replace mine[144:147] target[144:147]
|
||||
144 move a0,s1 | move a0,s0
|
||||
145 lhu v0,52(s1) | lhu v0,52(s0)
|
||||
146 lw v1,108(s1) | lw v1,108(s0)
|
||||
replace mine[149:150] target[149:150]
|
||||
149 sh v0,52(s1) | sh v0,52(s0)
|
||||
replace mine[153:154] target[153:154]
|
||||
153 lw v1,32(s1) | lw v1,32(s0)
|
||||
replace mine[159:160] target[159:160]
|
||||
159 lw v1,32(s1) | lw v1,32(s0)
|
||||
replace mine[164:165] target[164:165]
|
||||
164 lh v0,112(s1) | lh v0,112(s0)
|
||||
replace mine[168:169] target[168:169]
|
||||
168 lw v1,32(s1) | lw v1,32(s0)
|
||||
replace mine[174:175] target[174:175]
|
||||
174 lw v1,32(s1) | lw v1,32(s0)
|
||||
replace mine[179:180] target[179:180]
|
||||
179 lw v0,32(s1) | lw v0,32(s0)
|
||||
replace mine[184:187] target[184:187]
|
||||
184 move a0,s1 | move a0,s0
|
||||
185 lw v0,100(s1) | lw v0,100(s0)
|
||||
186 beqz s2,4b94 <func_801A4ACC+0x2f8> | beqz s1,4b94 <func_801A4ACC+0x2f8>
|
||||
replace mine[189:190] target[189:190]
|
||||
189 move a0,s2 | move a0,s1
|
||||
replace mine[191:192] target[191:192]
|
||||
191 move a0,s1 | move a0,s0
|
||||
replace mine[200:201] target[200:201]
|
||||
200 lw v1,32(s1) | lw v1,32(s0)
|
||||
replace mine[206:207] target[206:207]
|
||||
206 lw v1,32(s1) | lw v1,32(s0)
|
||||
replace mine[212:213] target[212:213]
|
||||
212 lw v0,32(s1) | lw v0,32(s0)
|
||||
replace mine[217:219] target[217:219]
|
||||
217 move a0,s1 | move a0,s0
|
||||
218 beqz s2,4c14 <func_801A4ACC+0x378> | beqz s1,4c14 <func_801A4ACC+0x378>
|
||||
replace mine[221:222] target[221:222]
|
||||
221 move a0,s2 | move a0,s1
|
||||
replace mine[223:224] target[223:224]
|
||||
223 move a0,s1 | move a0,s0
|
||||
replace mine[226:227] target[226:227]
|
||||
226 move a0,s1 | move a0,s0
|
||||
@@ -0,0 +1,2 @@
|
||||
NEEDED pin $16 line 3217
|
||||
NEEDED pin $17 line 3218
|
||||
@@ -0,0 +1,2 @@
|
||||
src/md_SC07_004/md_SC07_004.c
|
||||
func_801A4ACC
|
||||
@@ -0,0 +1,44 @@
|
||||
void func_801ABEE0(void *a0) {
|
||||
s32 r0 = (s32)a0;
|
||||
s32 ptr1;
|
||||
s32 s2;
|
||||
s16 v1;
|
||||
s32 val;
|
||||
s16 orig;
|
||||
s16 dec;
|
||||
|
||||
ptr1 = *(s32 *)(r0 + 0xCC);
|
||||
s2 = *(s32 *)(r0 + 0xD0);
|
||||
func_8012AD80(r0);
|
||||
*(s16 *)(ptr1 + 0x8) = *(u16 *)(r0 + 0x6);
|
||||
*(s16 *)(ptr1 + 0xA) = *(u16 *)(r0 + 0xA);
|
||||
*(s16 *)(ptr1 + 0xC) = *(u16 *)(r0 + 0xE);
|
||||
v1 = *(s16 *)(r0 + 0xA);
|
||||
if (v1 >= -0x200) {
|
||||
*(s16 *)(r0 + 0xA) = -0x200;
|
||||
func_801A9270((void *)r0);
|
||||
} else {
|
||||
if (s2 != 0) {
|
||||
s32 inner = *(s32 *)(s2 + 0xCC);
|
||||
if (inner != 0) {
|
||||
val = (v1 + 0x500) << 4;
|
||||
*(s16 *)(inner + 0x1A) = val;
|
||||
*(s16 *)(inner + 0x18) = val;
|
||||
}
|
||||
}
|
||||
*(s32 *)(r0 + 0x1C) += 1;
|
||||
if ((*(s32 *)(r0 + 0x1C) & 1) == 0) {
|
||||
func_801A93F4((void *)r0);
|
||||
}
|
||||
}
|
||||
func_80128ED8(*(s32 *)(r0 + 0xCC), (s32 *)(r0 + 0xF0));
|
||||
func_801A9378((void *)r0);
|
||||
orig = *(s16 *)(r0 + 0x84);
|
||||
if (orig != 0) {
|
||||
dec = orig - 1;
|
||||
*(s16 *)(r0 + 0x84) = dec;
|
||||
if (dec == 0) {
|
||||
func_801AA60C((void *)r0, 0xAB8);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,44 @@
|
||||
void func_801ABEE0(void *a0) {
|
||||
s32 r0 = (s32)a0;
|
||||
register s32 ptr1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
s32 s2;
|
||||
s16 v1;
|
||||
s32 val;
|
||||
s16 orig;
|
||||
s16 dec;
|
||||
|
||||
ptr1 = *(s32 *)(r0 + 0xCC);
|
||||
s2 = *(s32 *)(r0 + 0xD0);
|
||||
func_8012AD80(r0);
|
||||
*(s16 *)(ptr1 + 0x8) = *(u16 *)(r0 + 0x6);
|
||||
*(s16 *)(ptr1 + 0xA) = *(u16 *)(r0 + 0xA);
|
||||
*(s16 *)(ptr1 + 0xC) = *(u16 *)(r0 + 0xE);
|
||||
v1 = *(s16 *)(r0 + 0xA);
|
||||
if (v1 >= -0x200) {
|
||||
*(s16 *)(r0 + 0xA) = -0x200;
|
||||
func_801A9270((void *)r0);
|
||||
} else {
|
||||
if (s2 != 0) {
|
||||
register s32 inner __asm__("$17") = *(s32 *)(s2 + 0xCC); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
if (inner != 0) {
|
||||
val = (v1 + 0x500) << 4;
|
||||
*(s16 *)(inner + 0x1A) = val;
|
||||
*(s16 *)(inner + 0x18) = val;
|
||||
}
|
||||
}
|
||||
*(s32 *)(r0 + 0x1C) += 1;
|
||||
if ((*(s32 *)(r0 + 0x1C) & 1) == 0) {
|
||||
func_801A93F4((void *)r0);
|
||||
}
|
||||
}
|
||||
func_80128ED8(*(s32 *)(r0 + 0xCC), (s32 *)(r0 + 0xF0));
|
||||
func_801A9378((void *)r0);
|
||||
orig = *(s16 *)(r0 + 0x84);
|
||||
if (orig != 0) {
|
||||
dec = orig - 1;
|
||||
*(s16 *)(r0 + 0x84) = dec;
|
||||
if (dec == 0) {
|
||||
func_801AA60C((void *)r0, 0xAB8);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,14 @@
|
||||
s5: verdict NO-MATCH start 29 best 9 compiles 188 path R18 bystander @8279->8283
|
||||
best-scoring single candidates of the last trace (move -> score [residual class]):
|
||||
R18 bystander @8279->8283 -> 9 [COUNT] (from 29)
|
||||
R18 bystander @8279->8284 -> 9 [COUNT] (from 29)
|
||||
R18 bystander @8279->8285 -> 9 [COUNT] (from 29)
|
||||
R12 width v1 s16->s32 @8274 -> 9 [COUNT] (from 9)
|
||||
R8 temp tmp0 @8283 -> 9 [COUNT] (from 9)
|
||||
R7 block @8283 -> 9 [COUNT] (from 9)
|
||||
R4 decl-move ptr1 1->0 -> 9 [COUNT] (from 9)
|
||||
R8 base tmp0 @8283 -> 9 [COUNT] (from 9)
|
||||
R7 do-while @8283 -> 9 [COUNT] (from 9)
|
||||
R4 decl-move ptr1 1->2 -> 9 [COUNT] (from 9)
|
||||
R8 base-shared tmp0 @8283 -> 9 [COUNT] (from 9)
|
||||
R7 block @8293 -> 9 [COUNT] (from 9)
|
||||
@@ -0,0 +1,3 @@
|
||||
--- every @class/@stuck/@crack note in this translation unit ---
|
||||
// @class: loose-typing
|
||||
// @stuck: none — MATCH (99 ins). short* for param_2/param_3: gcc emits lh where sign is live (<<1 for signed div), lhu where truncated to short (arith result / direct copy)
|
||||
@@ -0,0 +1,127 @@
|
||||
=== lever-free bodies in md_SC07_004 sharing a callee or global with func_801ABEE0 (18 found; top 6 by shared symbols) — read them for the SHAPE ===
|
||||
--- func_801ABFF8 (src/md_SC07_004/md_SC07_004.c:8296) shares 2: func_80128ED8 func_801A9378 ---
|
||||
void func_801ABFF8(void *arg0) {
|
||||
s32 s1;
|
||||
s16 val;
|
||||
|
||||
s1 = *(s32 *)((char *)arg0 + 0xCC);
|
||||
func_80128ED8(s1, (s32 *)((char *)arg0 + 0xF0));
|
||||
|
||||
val = *(s16 *)((char *)s1 + 0x1A);
|
||||
if (val >= 0x1801) {
|
||||
*(s16 *)((char *)s1 + 0x1A) = val - 0x400;
|
||||
}
|
||||
|
||||
if (func_8012BEE8((s32)arg0) != 0) {
|
||||
((void (*)(s32, s32))func_801A9454)((s32)arg0, 0x10);
|
||||
func_80016714(*(void **)((char *)arg0 + 0xCC), 0x38);
|
||||
func_8012C218(arg0);
|
||||
if (--D_801F8E98 == 0) {
|
||||
func_8002D4C8(4, 0xABD);
|
||||
}
|
||||
} else {
|
||||
if ((*(s32 *)((char *)arg0 + 0x1C) & 7) == 0) {
|
||||
((void (*)(s32, s32))func_801A9454)((s32)arg0, 0);
|
||||
}
|
||||
func_801A9378(arg0);
|
||||
}
|
||||
}
|
||||
|
||||
--- func_801A9674 (src/md_SC07_004/md_SC07_004.c:6427) shares 2: func_80128ED8 func_8012AD80 ---
|
||||
void func_801A9674(void *a0) {
|
||||
void *s0 = a0;
|
||||
void *s1;
|
||||
void *s2;
|
||||
s32 s3;
|
||||
s32 sq0;
|
||||
s32 sq1;
|
||||
|
||||
s1 = *(void **)((s32)s0 + 0xCC);
|
||||
s2 = *(void **)((s32)s0 + 0xD0);
|
||||
|
||||
func_80128ED8((s32)s1, (s32 *)((s32)s0 + 0xF0));
|
||||
|
||||
*(u8 *)((s32)s1 + 0x27) = (u8)D_801B070C[*(s16 *)((s32)s0 + 0xF4)];
|
||||
|
||||
func_8012AD80((s32)s0);
|
||||
|
||||
*(s16 *)((s32)s1 + 0x8) = *(u16 *)((s32)s0 + 0x6);
|
||||
*(s16 *)((s32)s1 + 0xA) = *(u16 *)((s32)s0 + 0xA);
|
||||
*(s16 *)((s32)s1 + 0xC) = *(u16 *)((s32)s0 + 0xE);
|
||||
|
||||
if (*(s16 *)((s32)s0 + 0xFE) != 0) {
|
||||
s3 = 0x30;
|
||||
*(s16 *)((s32)s1 + 0x18) = (*(s16 *)((s32)s0 + 0xA) + 0x1400) * 2;
|
||||
*(s16 *)((s32)s1 + 0x1A) = (0x1000 - *(s16 *)((s32)s0 + 0xA)) * 6;
|
||||
} else {
|
||||
s3 = 0x18;
|
||||
}
|
||||
|
||||
if (*(s16 *)((s32)s0 + 0xA) >= -0x200) {
|
||||
sq0 = *(s16 *)((s32)s0 + 0x6) * *(s16 *)((s32)s0 + 0x6);
|
||||
sq1 = *(s16 *)((s32)s0 + 0xE) * *(s16 *)((s32)s0 + 0xE);
|
||||
*(s16 *)((s32)s0 + 0xA) = -0x200;
|
||||
if (sq0 + sq1 > 0xFFFFF) {
|
||||
func_801A9954(s0);
|
||||
return;
|
||||
}
|
||||
func_801A9810(s0);
|
||||
} else {
|
||||
if (*(s16 *)((s32)s0 + 0xFE) != 0 && s2 != NULL) {
|
||||
s1 = *(void **)((s32)s2 + 0xCC);
|
||||
if (s1 != NULL) {
|
||||
s32 v = (*(s16 *)((s32)s0 + 0xA) + 0x500) * 40;
|
||||
*(s16 *)((s32)s1 + 0x1A) = v;
|
||||
*(s16 *)((s32)s1 + 0x18) = v;
|
||||
}
|
||||
}
|
||||
}
|
||||
func_801A9908(s0, s3);
|
||||
}
|
||||
|
||||
--- func_801A9F5C (src/md_SC07_004/md_SC07_004.c:6790) shares 1: func_8012AD80 ---
|
||||
void func_801A9F5C(void *arg0) {
|
||||
*(s32 *)((s32)arg0 + 0x1C) = 0x40;
|
||||
func_801AA0B4(arg0);
|
||||
func_8012AD80((s32)arg0);
|
||||
func_8012AD80((s32)arg0);
|
||||
func_8012AD44((s32 *)arg0, 2);
|
||||
}
|
||||
|
||||
--- func_801ABBA4 (src/md_SC07_004/md_SC07_004.c:8086) shares 1: func_8012AD80 ---
|
||||
void func_801ABBA4(void *arg0) {
|
||||
if (func_8012BEE8((s32)arg0) != 0) {
|
||||
if (*(void **)((u8 *)arg0 + 0xCC) != NULL) {
|
||||
func_8017E5D4(*(void **)((u8 *)arg0 + 0xCC));
|
||||
}
|
||||
func_8012C218(arg0);
|
||||
} else {
|
||||
func_8012AD80(arg0);
|
||||
}
|
||||
}
|
||||
|
||||
--- func_801AE6D4 (src/md_SC07_004/md_SC07_004.c:10103) shares 1: func_8012AD80 ---
|
||||
void func_801AE6D4(void *arg0) {
|
||||
if (func_8012BEE8((s32)arg0) != 0) {
|
||||
func_8012C218(arg0);
|
||||
} else {
|
||||
func_8012AD80((s32)arg0);
|
||||
if (*(s16 *)((u8 *)arg0 + 0x70) == 0) {
|
||||
func_8012B414((s32)arg0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
--- func_801AC234 (src/md_SC07_004/md_SC07_004.c:8380) shares 1: func_80128ED8 ---
|
||||
void func_801AC234(void *a0)
|
||||
{
|
||||
extern void func_801292C8(u8 *a0);
|
||||
extern void func_8012931C(struct vec *a0);
|
||||
|
||||
func_8012931C((struct vec *)a0);
|
||||
if (func_80128ED8(*(s32 *)((char *)a0 + 0x20), (s32 *)((char *)a0 + 0x24)) != 0 ||
|
||||
(*(s16 *)((char *)a0 + 0x2C) != 2 && *(s16 *)((char *)a0 + 0xA) >= -0x200)) {
|
||||
func_801292C8((u8 *)a0);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,49 @@
|
||||
src/md_SC07_004/md_SC07_004.c:func_801ABEE0: score 29 (MIXED; mine 70 ins, target 70) — not yet
|
||||
register pairs (mine -> target, count): s1->s0 x18, s0->s1 x4, v1->s1 x4, a0->v1 x3
|
||||
replace mine[1:3] target[1:3]
|
||||
1 sw s1,28(sp) | sw s0,24(sp)
|
||||
2 move s1,a0 | move s0,a0
|
||||
replace mine[5:8] target[5:8]
|
||||
5 sw s0,24(sp) | sw s1,28(sp)
|
||||
6 lw s0,204(s1) | lw s1,204(s0)
|
||||
7 lw s2,208(s1) | lw s2,208(s0)
|
||||
replace mine[10:11] target[10:11]
|
||||
10 lhu v0,6(s1) | lhu v0,6(s0)
|
||||
replace mine[12:14] target[12:14]
|
||||
12 sh v0,8(s0) | sh v0,8(s1)
|
||||
13 lhu v0,10(s1) | lhu v0,10(s0)
|
||||
replace mine[15:17] target[15:17]
|
||||
15 sh v0,10(s0) | sh v0,10(s1)
|
||||
16 lhu v0,14(s1) | lhu v0,14(s0)
|
||||
replace mine[18:20] target[18:20]
|
||||
18 sh v0,12(s0) | sh v0,12(s1)
|
||||
19 lh a0,10(s1) | lh v1,10(s0)
|
||||
replace mine[21:22] target[21:22]
|
||||
21 slti v0,a0,-512 | slti v0,v1,-512
|
||||
replace mine[24:25] target[24:25]
|
||||
24 sh v0,10(s1) | sh v0,10(s0)
|
||||
replace mine[26:27] target[26:27]
|
||||
26 move a0,s1 | move a0,s0
|
||||
replace mine[31:32] target[31:32]
|
||||
31 lw v1,204(s2) | lw s1,204(s2)
|
||||
replace mine[33:35] target[33:35]
|
||||
33 beqz v1,bd48 <func_801ABEE0+0x98> | beqz s1,bd48 <func_801ABEE0+0x98>
|
||||
34 addiu v0,a0,1280 | addiu v0,v1,1280
|
||||
replace mine[36:39] target[36:39]
|
||||
36 sh v0,26(v1) | sh v0,26(s1)
|
||||
37 sh v0,24(v1) | sh v0,24(s1)
|
||||
38 lw v0,28(s1) | lw v0,28(s0)
|
||||
replace mine[41:42] target[41:42]
|
||||
41 sw v0,28(s1) | sw v0,28(s0)
|
||||
replace mine[46:48] target[46:48]
|
||||
46 move a0,s1 | move a0,s0
|
||||
47 lw a0,204(s1) | lw a0,204(s0)
|
||||
replace mine[49:50] target[49:50]
|
||||
49 addiu a1,s1,240 | addiu a1,s0,240
|
||||
replace mine[51:53] target[51:53]
|
||||
51 move a0,s1 | move a0,s0
|
||||
52 lh v0,132(s1) | lh v0,132(s0)
|
||||
replace mine[57:58] target[57:58]
|
||||
57 sh v0,132(s1) | sh v0,132(s0)
|
||||
replace mine[60:61] target[60:61]
|
||||
60 move a0,s1 | move a0,s0
|
||||
@@ -0,0 +1,4 @@
|
||||
REMOVED pin $16 line 8292
|
||||
NEEDED pin $17 line 8293
|
||||
REMOVED pin $18 line 8294
|
||||
NEEDED pin $17 line 8312
|
||||
@@ -0,0 +1,2 @@
|
||||
src/md_SC07_004/md_SC07_004.c
|
||||
func_801ABEE0
|
||||
@@ -53,7 +53,7 @@
|
||||
},
|
||||
"kinds": {
|
||||
"asm-body/direct": 13,
|
||||
"barrier/direct": 283,
|
||||
"barrier/direct": 282,
|
||||
"gte-lever/direct": 357,
|
||||
"gte-lever/via-macro": 94,
|
||||
"gte-unsigned/direct": 270,
|
||||
@@ -62,7 +62,7 @@
|
||||
"instruction/direct": 206,
|
||||
"instruction/via-macro": 22,
|
||||
"keepalive/direct": 340,
|
||||
"launder/direct": 636,
|
||||
"launder/direct": 635,
|
||||
"launder/via-macro": 42,
|
||||
"verbatim-body/direct": 2682
|
||||
}
|
||||
@@ -72,18 +72,9 @@
|
||||
"count": 47,
|
||||
"sample": [
|
||||
"src/800.c:12578",
|
||||
"src/md_SC07_004/md_SC07_004.c:280",
|
||||
"src/ov_SC03_014/ov_SC03_014_jr_801848E4.c:5025",
|
||||
"src/ov_SC03_014/ov_SC03_014_jr_801848E4.c:5073",
|
||||
"src/ov_SC03_024/ov_SC03_024_jr_8017DF84.c:5475",
|
||||
"src/ov_SC03_024/ov_SC03_024_jr_8017DF84.c:5527",
|
||||
"src/ov_SC03_024/ov_SC03_024_jr_8017DF84.c:5866",
|
||||
"src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:8444",
|
||||
"src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:8484",
|
||||
"src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:8811",
|
||||
"src/shared/ov/func_80169584.h:42",
|
||||
"src/800_b_2.c:3084",
|
||||
"src/md_SC07_003/md_SC07_003.c:3577",
|
||||
"src/md_SC07_004/md_SC07_004.c:280",
|
||||
"src/ov_SC01_000/ov_SC01_000_jr_8017BEBC.c:3570",
|
||||
"src/ov_SC01_009/ov_SC01_009_jr_8017E590.c:4271",
|
||||
"src/ov_SC01_077/ov_SC01_077_jr_80183CF4.c:3979",
|
||||
@@ -92,6 +83,11 @@
|
||||
"src/ov_SC02_027/ov_SC02_027_jr_8017D898.c:4534",
|
||||
"src/ov_SC02_028/ov_SC02_028_jr_8017D898.c:5461",
|
||||
"src/ov_SC02_041/ov_SC02_041_jr_8017BEBC.c:7554",
|
||||
"src/ov_SC03_014/ov_SC03_014_jr_801848E4.c:5025",
|
||||
"src/ov_SC03_014/ov_SC03_014_jr_801848E4.c:5073",
|
||||
"src/ov_SC03_024/ov_SC03_024_jr_8017DF84.c:5475",
|
||||
"src/ov_SC03_024/ov_SC03_024_jr_8017DF84.c:5527",
|
||||
"src/ov_SC03_024/ov_SC03_024_jr_8017DF84.c:5866",
|
||||
"src/ov_SC03_024/ov_SC03_024_jr_80183BF8.c:3108",
|
||||
"src/ov_SC03_118/ov_SC03_118_jr_8017FB84.c:3796",
|
||||
"src/ov_SC03_118/ov_SC03_118_jr_8017FB84.c:4112",
|
||||
@@ -108,43 +104,47 @@
|
||||
"src/ov_SC05_005/ov_SC05_005_jr_8017D898.c:4026",
|
||||
"src/ov_SC05_007/ov_SC05_007_jr_8017BEBC.c:3335",
|
||||
"src/ov_SC05_018/ov_SC05_018_jr_8017D604.c:4942",
|
||||
"src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:8444",
|
||||
"src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:8484",
|
||||
"src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:8811",
|
||||
"src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c:3125",
|
||||
"src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c:5384",
|
||||
"src/ov_SC06_020/ov_SC06_020_jr_80180B04.c:3714"
|
||||
"src/ov_SC06_020/ov_SC06_020_jr_80180B04.c:3714",
|
||||
"src/ov_SC06_022/ov_SC06_022_jr_80184A28.c:3757"
|
||||
]
|
||||
},
|
||||
"classes": {
|
||||
"A": {
|
||||
"bodies": 1413,
|
||||
"distinct_bodies": 580,
|
||||
"bodies": 1411,
|
||||
"distinct_bodies": 578,
|
||||
"file_scope": 0,
|
||||
"in_bodies": 2279,
|
||||
"in_bodies": 2276,
|
||||
"kinds": {
|
||||
"pin": 2279
|
||||
"pin": 2276
|
||||
},
|
||||
"marked": 2279,
|
||||
"sites": 2279,
|
||||
"marked": 2276,
|
||||
"sites": 2276,
|
||||
"tus": 1079,
|
||||
"unmarked": 0
|
||||
},
|
||||
"B": {
|
||||
"bodies": 4665,
|
||||
"distinct_bodies": 728,
|
||||
"bodies": 4663,
|
||||
"distinct_bodies": 726,
|
||||
"file_scope": 13,
|
||||
"in_bodies": 11287,
|
||||
"in_bodies": 11285,
|
||||
"kinds": {
|
||||
"asm-body": 13,
|
||||
"barrier": 283,
|
||||
"barrier": 282,
|
||||
"gte": 6355,
|
||||
"gte-lever": 451,
|
||||
"gte-unsigned": 270,
|
||||
"instruction": 228,
|
||||
"keepalive": 340,
|
||||
"launder": 678,
|
||||
"launder": 677,
|
||||
"verbatim-body": 2682
|
||||
},
|
||||
"marked": 2477,
|
||||
"sites": 11300,
|
||||
"marked": 2475,
|
||||
"sites": 11298,
|
||||
"tus": 1427,
|
||||
"unmarked": 8823
|
||||
},
|
||||
@@ -178,17 +178,17 @@
|
||||
"unmarked": 50
|
||||
},
|
||||
"E": {
|
||||
"bodies": 1097,
|
||||
"distinct_bodies": 158,
|
||||
"bodies": 1098,
|
||||
"distinct_bodies": 159,
|
||||
"file_scope": 6424,
|
||||
"in_bodies": 1366,
|
||||
"in_bodies": 1367,
|
||||
"kinds": {
|
||||
"asm-label": 7790
|
||||
"asm-label": 7791
|
||||
},
|
||||
"marked": 0,
|
||||
"sites": 7790,
|
||||
"sites": 7791,
|
||||
"tus": 2090,
|
||||
"unmarked": 7790
|
||||
"unmarked": 7791
|
||||
},
|
||||
"F": {
|
||||
"bodies": 428,
|
||||
@@ -250,9 +250,9 @@
|
||||
"coverage": {
|
||||
"asm": {
|
||||
"comment_dead": 6781,
|
||||
"live": 15215,
|
||||
"live": 15211,
|
||||
"macro_block": 194,
|
||||
"raw": 22190
|
||||
"raw": 22186
|
||||
},
|
||||
"attribute": {
|
||||
"comment_dead": 0,
|
||||
@@ -268,9 +268,9 @@
|
||||
},
|
||||
"register": {
|
||||
"comment_dead": 8574,
|
||||
"live": 2329,
|
||||
"live": 2326,
|
||||
"macro_block": 18,
|
||||
"raw": 10921
|
||||
"raw": 10918
|
||||
},
|
||||
"volatile": {
|
||||
"comment_dead": 2607,
|
||||
@@ -280,7 +280,7 @@
|
||||
}
|
||||
},
|
||||
"coverage_ok": true,
|
||||
"elapsed_s": 25.9,
|
||||
"elapsed_s": 22.3,
|
||||
"generated": "2026-09-11",
|
||||
"gte_levers": {
|
||||
"direct": 357,
|
||||
@@ -291,15 +291,15 @@
|
||||
"via_macro": 94,
|
||||
"what": "GTE ops whose clobbers exceed the canonical macro's (a scheduling steer): class-B levers INSIDE the headline number since T5 (2026-09-09), marked, 0 at the close"
|
||||
},
|
||||
"head": "edd427861",
|
||||
"head": "737bbe494",
|
||||
"headers": 3181,
|
||||
"levers_AB": {
|
||||
"asm": 1993,
|
||||
"bodies": 2090,
|
||||
"distinct_bodies": 780,
|
||||
"marked": 4272,
|
||||
"pins": 2279,
|
||||
"sites": 4272,
|
||||
"asm": 1991,
|
||||
"bodies": 2086,
|
||||
"distinct_bodies": 776,
|
||||
"marked": 4267,
|
||||
"pins": 2276,
|
||||
"sites": 4267,
|
||||
"unmarked": 0,
|
||||
"what": "register pins + asm statements excluding GTE ops: the classes the phase drives to 0"
|
||||
},
|
||||
@@ -368,11 +368,6 @@
|
||||
2,
|
||||
1
|
||||
],
|
||||
[
|
||||
"COPY_TO_FAAC",
|
||||
1,
|
||||
1
|
||||
],
|
||||
[
|
||||
"gte_rt",
|
||||
1,
|
||||
@@ -388,6 +383,11 @@
|
||||
1,
|
||||
1
|
||||
],
|
||||
[
|
||||
"COPY_TO_FAAC",
|
||||
1,
|
||||
1
|
||||
],
|
||||
[
|
||||
"LAUNDER_8018A180",
|
||||
1,
|
||||
@@ -444,16 +444,16 @@
|
||||
"$15": 1,
|
||||
"$16": 87,
|
||||
"$17": 34,
|
||||
"$18": 29,
|
||||
"$18": 28,
|
||||
"$19": 19,
|
||||
"$2": 782,
|
||||
"$2": 781,
|
||||
"$20": 7,
|
||||
"$21": 5,
|
||||
"$22": 3,
|
||||
"$23": 6,
|
||||
"$25": 1,
|
||||
"$29": 13,
|
||||
"$3": 173,
|
||||
"$3": 172,
|
||||
"$4": 503,
|
||||
"$5": 380,
|
||||
"$6": 62,
|
||||
@@ -465,29 +465,29 @@
|
||||
"a1": 2,
|
||||
"v0": 2
|
||||
},
|
||||
"sites": 2279,
|
||||
"sites": 2276,
|
||||
"sp": 13,
|
||||
"spelling": {
|
||||
"__asm__": 2252,
|
||||
"asm": 27
|
||||
"__asm__": 2251,
|
||||
"asm": 25
|
||||
},
|
||||
"volatile_qualified": 0,
|
||||
"zero": 60
|
||||
},
|
||||
"src_stamp": "f8c7af645433999b",
|
||||
"src_stamp": "825d2e6548b9833f",
|
||||
"tus": 4121,
|
||||
"unclassified": 0,
|
||||
"union_AD": {
|
||||
"bodies": 5854,
|
||||
"bodies": 5850,
|
||||
"by_kind": {
|
||||
"main": 133,
|
||||
"md": 114,
|
||||
"ov": 5436,
|
||||
"ov": 5432,
|
||||
"resident": 10,
|
||||
"shared": 161
|
||||
},
|
||||
"copies_in_multi": 4857,
|
||||
"distinct_bodies": 1111,
|
||||
"distinct_bodies": 1107,
|
||||
"multi_copy_classes": 114
|
||||
},
|
||||
"verbatim_excluded": {
|
||||
|
||||
@@ -1,32 +1,32 @@
|
||||
lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13)
|
||||
coverage asm raw 22190 = live 15215 + macro-block 194 + comment/dead 6781
|
||||
coverage register raw 10921 = live 2329 + macro-block 18 + comment/dead 8574
|
||||
coverage asm raw 22186 = live 15211 + macro-block 194 + comment/dead 6781
|
||||
coverage register raw 10918 = live 2326 + macro-block 18 + comment/dead 8574
|
||||
coverage volatile raw 4373 = live 1684 + macro-block 82 + comment/dead 2607
|
||||
coverage builtin raw 599 = live 445 + macro-block 0 + comment/dead 154
|
||||
coverage attribute raw 76 = live 76 + macro-block 0 + comment/dead 0
|
||||
class sites in-bodies file-scope bodies distinct TUs marked unmarked kinds
|
||||
A pins 2279 2279 0 1413 580 1079 2279 0 {'pin': 2279}
|
||||
B asm 11300 11287 13 4665 728 1427 2477 8823 {'gte': 6355, 'gte-lever': 451, 'gte-unsigned': 270, 'barrier': 283, 'launder': 678, 'instruction': 228, 'asm-body': 13, 'keepalive': 340, 'verbatim-body': 2682}
|
||||
C volatile 1589 1437 152 495 94 609 14 1575 {'cast': 1377, 'decl-body': 58, 'decl-file': 152, 'param': 2}
|
||||
A pins 2276 2276 0 1411 578 1079 2276 0 {'pin': 2276}
|
||||
B asm 11298 11285 13 4663 726 1427 2475 8823 {'gte': 6355, 'gte-lever': 451, 'gte-unsigned': 270, 'barrier': 282, 'launder': 677, 'instruction': 228, 'asm-body': 13, 'keepalive': 340, 'verbatim-body': 2682}
|
||||
C volatile 1589 1437 152 495 94 609 14 1575 {'decl-body': 58, 'decl-file': 152, 'cast': 1377, 'param': 2}
|
||||
D register 50 50 0 47 47 6 0 50 {'register': 50}
|
||||
E asm-label 7790 1366 6424 1097 158 2090 0 7790 {'asm-label': 7790}
|
||||
E asm-label 7791 1367 6424 1098 159 2090 0 7791 {'asm-label': 7791}
|
||||
F builtin 445 445 0 428 27 302 0 445 {'builtin': 445}
|
||||
G attribute 76 1 75 1 1 40 0 76 {'attribute': 76}
|
||||
UNION A–D: 5,854 bodies · 1,111 distinct (addresses normalized) · 114 multi-copy classes holding 4,857 bodies · by kind {'md': 114, 'ov': 5436, 'main': 133, 'resident': 10, 'shared': 161}
|
||||
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 4,272 sites in 2,090 bodies (780 distinct) · marked !FAKE 4,272 · UNMARKED 0
|
||||
UNION A–D: 5,850 bodies · 1,107 distinct (addresses normalized) · 114 multi-copy classes holding 4,857 bodies · by kind {'ov': 5432, 'shared': 161, 'main': 133, 'md': 114, 'resident': 10}
|
||||
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 4,267 sites in 2,086 bodies (776 distinct) · marked !FAKE 4,267 · UNMARKED 0
|
||||
orphan !FAKE markers (no pin/asm site on the line nor below): 0
|
||||
marked ordinary-C fakes kept by Drew's S104 ruling (a) (`do { } while (0)`, dead initialisers; NOT levers): 47
|
||||
GTE levers (clobbers beyond the canonical macro's): 451 sites (94 via a variant macro, 357 direct) · marked 451 · UNMARKED 0 · unsigned GTE statements 270
|
||||
per-TU asm macro definitions outside the GTE header: 314 {'barrier': 1, 'instruction': 9, 'gte': 150, 'launder': 154} (GTE variants 64)
|
||||
pins: 2,279 · $0 60 · $sp 13 · with initializer 209 · volatile-qualified 0 · bare-name 9 · spellings {'__asm__': 2252, 'asm': 27}
|
||||
per-TU asm macro definitions outside the GTE header: 314 {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1} (GTE variants 64)
|
||||
pins: 2,276 · $0 60 · $sp 13 · with initializer 209 · volatile-qualified 0 · bare-name 9 · spellings {'__asm__': 2251, 'asm': 25}
|
||||
whole-body asm routines in C shells, manifest PERMANENT (hand asm, NOT levers): 22 routines · 2,682 sites (2,660 private copies + 22 shared headers); asm-bodies NOT permanent (levers): 13 site(s) ['func_8001E378:DECOMPILE-NOW', 'func_80020F34:DECOMPILE-NOW', 'func_800249F0:DECOMPILE-NOW', 'func_80025CBC:DECOMPILE-NOW', 'func_80026514:UNCERTAIN', 'func_800268D0:UNCERTAIN', 'func_80027058:DECOMPILE-NOW', 'func_80027200:DECOMPILE-NOW', 'func_800CBA44:DECOMPILE-NOW', 'func_8017D810:DECOMPILE-NOW', 'func_8017E26C:UNCERTAIN', 'func_80184440:DECOMPILE-NOW', 'func_801A3BCC:DECOMPILE-NOW']
|
||||
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 283, 'gte/direct': 197, 'gte/via-macro': 6158, 'gte-lever/direct': 357, 'gte-lever/via-macro': 94, 'gte-unsigned/direct': 270, 'instruction/direct': 206, 'instruction/via-macro': 22, 'keepalive/direct': 340, 'launder/direct': 636, 'launder/via-macro': 42, 'verbatim-body/direct': 2682}
|
||||
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 282, 'gte/direct': 197, 'gte/via-macro': 6158, 'gte-lever/direct': 357, 'gte-lever/via-macro': 94, 'gte-unsigned/direct': 270, 'instruction/direct': 206, 'instruction/via-macro': 22, 'keepalive/direct': 340, 'launder/direct': 635, 'launder/via-macro': 42, 'verbatim-body/direct': 2682}
|
||||
instruction mnemonics: {'la': 139, 'addu': 23, 'addiu': 22, 'RTP_SND': 22, '.section': 7, 'lui': 3, 'lh': 3, 'and': 2, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
|
||||
gte mnemonics: {'gte_ldv0': 758, 'gte_stlvnl': 593, 'gte_stsxy': 448, 'gte_rtps': 439, 'gte_stflg': 415, 'gte_rtpt': 352, 'gte_SetRotMatrix': 253, 'gte_stsxy3': 236, 'gte_SetTransMatrix': 231, 'gte_rtv0tr': 228, 'gte_ldv3c': 184, 'gte_ldv3': 177, 'gte_stsv': 161, 'lwc2': 158, 'gte_stsz4': 149, 'gte_stsz3': 147, 'gte_stszotz': 134, 'gte_dpcl': 134, 'gte_stclmv': 114, 'gte_stsxy3_f3': 111, 'gte_nclip': 108, 'gte_stopz': 108, 'gte_stsxy3c': 108, 'gte_rtir': 81, 'gte_stsxy3_ft3': 79, 'gte_ldclmv': 78, 'gte_avsz4': 56, 'gte_stotz': 52, 'gte_ldrgb': 30, 'gte_nccs': 25}
|
||||
asm-bearing macro definitions: 314 (20 names, 3 with >1 text) kinds {'barrier': 1, 'instruction': 9, 'gte': 150, 'launder': 154}
|
||||
asm-bearing macro definitions: 314 (20 names, 3 with >1 text) kinds {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1}
|
||||
controls (R39):
|
||||
src/800.c func_800226C0 pins got 14 expected 45 N-A
|
||||
src/shared/ov/func_80178004.h pins got 8 expected 26 N-A
|
||||
ov_SC03_006 func_80184034 bare-name pins got 0 expected 3 N-A
|
||||
engine_prelude.h asm sites (a macro definition only) got 0 expected 0 OK
|
||||
elapsed 25.9 s
|
||||
elapsed 22.3 s
|
||||
|
||||
Reference in New Issue
Block a user