phase-36: S104 e34 banked 4 (resident; func_800D128C with a class-E call alias); e36 packs (ov_SC03_091)

This commit is contained in:
Drew T
2026-09-11 04:45:33 -06:00
parent 8b0e8645e4
commit 5fa21c77ef
36 changed files with 1091 additions and 59 deletions
+4 -4
View File
@@ -1,5 +1,5 @@
rank fn alias copies best needed kinds regs tu
44 func_801A3594 md_SC07_004 1 7 2 pin $2,$3 src/md_SC07_004/md_SC07_004.c
51 func_801A395C md_SC07_004 1 7 2 barrier,keepalive src/md_SC07_004/md_SC07_004.c
240 func_801ABEE0 md_SC07_004 1 9 2 pin $17 src/md_SC07_004/md_SC07_004.c
79 func_801A4ACC md_SC07_004 1 24 2 pin $16,$17 src/md_SC07_004/md_SC07_004.c
47 func_80185730 ov_SC03_091 1 1 2 keepalive,pin $2 src/ov_SC03_091/ov_SC03_091_jr_8018326C.c
105 func_80188B64 ov_SC03_091 2 4 1 launder src/ov_SC03_091/ov_SC03_091_jr_8018326C.c
3 func_8018632C ov_SC03_091 1 7 2 launder src/ov_SC03_091/ov_SC03_091_jr_8018326C.c
87 func_801880E8 ov_SC03_091 1 29 3 keepalive,launder,pin $2 src/ov_SC03_091/ov_SC03_091_jr_8018326C.c
1 rank fn alias copies best needed kinds regs tu
2 44 47 func_801A3594 func_80185730 md_SC07_004 ov_SC03_091 1 7 1 2 pin keepalive,pin $2,$3 $2 src/md_SC07_004/md_SC07_004.c src/ov_SC03_091/ov_SC03_091_jr_8018326C.c
3 51 105 func_801A395C func_80188B64 md_SC07_004 ov_SC03_091 1 2 7 4 2 1 barrier,keepalive launder src/md_SC07_004/md_SC07_004.c src/ov_SC03_091/ov_SC03_091_jr_8018326C.c
4 240 3 func_801ABEE0 func_8018632C md_SC07_004 ov_SC03_091 1 9 7 2 pin launder $17 src/md_SC07_004/md_SC07_004.c src/ov_SC03_091/ov_SC03_091_jr_8018326C.c
5 79 87 func_801A4ACC func_801880E8 md_SC07_004 ov_SC03_091 1 24 29 2 3 pin keepalive,launder,pin $16,$17 $2 src/md_SC07_004/md_SC07_004.c src/ov_SC03_091/ov_SC03_091_jr_8018326C.c
@@ -0,0 +1,40 @@
s32 func_801A3594(void *a0) {
s16 buf[12];
u16 b;
u16 a;
s16 diff;
s16 v1;
s32 tw;
s16 t16;
s16 xr;
v1 = *(s16 *)((s32)a0 + 0x106);
switch (v1) {
case 0:
a = *(u16 *)((s32)a0 + 0xE8);
b = *(u16 *)((s32)a0 + 0x6);
diff = a - b;
buf[0] = diff;
tw = *(s16 *)((s32)a0 + 0xEC);
break;
case 1:
a = *(u16 *)((s32)a0 + 0xEA);
b = *(u16 *)((s32)a0 + 0xE);
diff = a - b;
buf[1] = diff;
tw = *(s16 *)((s32)a0 + 0xEE);
break;
default:
goto default_case;
}
if (tw == 0) goto ret1;
t16 = tw;
if (diff == 0) goto ret1;
xr = diff ^ t16;
if (xr >= 0) goto default_case;
ret1:
return 1;
default_case:
return 0;
}
@@ -0,0 +1,30 @@
void func_80185730(s32 *a0, s32 a1, s32 a2) {
s32 sp10[4];
s32 sp20;
s16 *q;
u16 *p;
s16 t;
s32 dst;
q = &D_80126CBA;
if (*q == 0) {
if (func_801858AC(a1)) {
p = (u16 *)(a1 + 0x88);
*(s32 *)(a1 + 0xDC) = 1;
} else {
p = (u16 *)(q - 3);
*(s32 *)(a1 + 0xDC) = 0;
}
} else {
p = (u16 *)(a1 + 0x88);
*(s32 *)(a1 + 0xDC) = 1;
}
*(s16 *)((s32)sp10 + 0x2) = p[0] + *(u16 *)a2;
t = p[1] + *(u16 *)(a2 + 2);
*(s16 *)((s32)sp10 + 0x6) = t;
*(s16 *)(a1 + 0x100) = t;
*(s16 *)((s32)sp10 + 0xA) = p[2] + *(u16 *)(a2 + 4);
func_8012B77C((s32)&sp20, a1 + 4, (s32)sp10);
dst = (s32)a0;
*(s32 *)dst = sp20;
}
@@ -0,0 +1,31 @@
void func_80185730(s32 *a0, s32 a1, s32 a2) {
s32 sp10[4];
s32 sp20;
s16 *q;
u16 *p;
s16 t;
register s32 dst __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus9)
q = &D_80126CBA;
if (*q == 0) {
if (func_801858AC(a1)) {
p = (u16 *)(a1 + 0x88);
*(s32 *)(a1 + 0xDC) = 1;
} else {
p = (u16 *)(q - 3);
*(s32 *)(a1 + 0xDC) = 0;
}
} else {
p = (u16 *)(a1 + 0x88);
*(s32 *)(a1 + 0xDC) = 1;
}
*(s16 *)((s32)sp10 + 0x2) = p[0] + *(u16 *)a2;
t = p[1] + *(u16 *)(a2 + 2);
*(s16 *)((s32)sp10 + 0x6) = t;
*(s16 *)(a1 + 0x100) = t;
*(s16 *)((s32)sp10 + 0xA) = p[2] + *(u16 *)(a2 + 4);
func_8012B77C((s32)&sp20, a1 + 4, (s32)sp10);
dst = (s32)a0;
*(s32 *)dst = sp20;
__asm__ __volatile__("" : : "r" (dst)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus9)
}
@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 3 best 1 compiles 181 path R12 width dst s32->u16 @4221
best-scoring single candidates of the last trace (move -> score [residual class]):
R12 width dst s32->u16 @4221 -> 1 [OTHER] (from 3)
R12 width dst s32->u8 @4221 -> 1 [OTHER] (from 3)
R4 decl-move dst 5->0 -> 1 [OTHER] (from 1)
R7 block @4238 -> 1 [OTHER] (from 1)
R4 decl-move dst 5->1 -> 1 [OTHER] (from 1)
R8 base tmp0 @4237 -> 1 [OTHER] (from 1)
R4 decl-move dst 5->2 -> 1 [OTHER] (from 1)
R7 block @4239 -> 1 [OTHER] (from 1)
R8 hoist tmp0 @4237 -> 1 [OTHER] (from 1)
R10 param-copy a2 @4222 -> 1 [OTHER] (from 1)
R4 decl-move dst 5->3 -> 1 [OTHER] (from 1)
R12 width t s16->s32 @4220 -> 1 [OTHER] (from 1)
@@ -0,0 +1,9 @@
--- func_80185840 (line 4227) ---
/* The `register ... __asm__("$4")` pin on the FIRST call argument is load-bearing.
* The target sets $a0 = 0x6FE in the ENTRY block (dbr steals it into the `bnez`
* delay slot -- sched.md D1 backward fill), but a plain `s32 id = 0x6FE;` local is
* rematerialised at the use site (single-set constant pseudo -> REG_EQUIV), so the
* `li` sinks past the label into the join block and dbr fills the slot with the
* if-body's `lui` instead (SHIFT-DRIFT/+1). Pinning the local to $a0 makes the `li`
* a hard-reg set that stays where it is written, and the call's arg move degenerates
* to a deleted `(set (reg 4) (reg 4))`. */
@@ -0,0 +1,141 @@
=== lever-free bodies in ov_SC03_091 sharing a callee or global with func_80185730 (10 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80184F08 (src/ov_SC03_091/ov_SC03_091_jr_8018326C.c:3755) shares 2: D_80126CBA func_801858AC ---
void func_80184F08(param_1)
s32 param_1;
{
if (((s32 (*)(s32))func_8012BE54)(param_1) <= 0x40000 && D_80126CBA == 0 && func_801858AC(param_1) == 0) {
*(s16 *)(param_1 + 2) = 5;
}
}
--- func_8012BCCC (src/shared/ov/func_8012BCCC.h:6) shares 1: D_80126CBA ---
s32 func_8012BCCC(s32 a0) {
s32 *p = &D_80126B58;
if (D_80126CBA != 0) {
return 0x7FFFFFFF;
}
return func_80013478(a0 + 4, (s32)p + 0x15C);
}
--- func_8012BD3C (src/shared/ov/func_8012BD3C.h:7) shares 1: D_80126CBA ---
s32 func_8012BD3C(s32 a0, s32 a1, s32 a2) {
s32 v;
s32 hp;
hp = a1;
if (D_80126CBA != 0) {
v = 0x7FFFFFFF;
} else {
v = func_80013478(a0 + 4, (s32)&D_80126CB4);
}
if (a2 < v) {
return 0;
}
return func_8012BDBC(a0, (s16)hp);
}
--- func_801889EC (src/ov_SC03_091/ov_SC03_091_jr_8018326C.c:6524) shares 1: func_8012B77C ---
void func_801889EC(s32 a0, s32 a1)
{
s16 sp10[8]; /* the func_8012B77C "to" record — fields at +0x2/+0x6/+0xA */
s32 sp20[2]; /* reused as both func_8012B0B4's dest and func_8012B77C's "out" */
s32 t;
s16 r;
r = rand();
func_8012B0B4((unsigned int *)sp20, r % 0x1000, (r % 0x100) + 0x200);
t = sp20[0];
if (a1 != 0) {
sp10[1] = D_80126B5E + t;
sp10[3] = *(u16 *)(a0 + 0xA);
sp10[5] = D_80126B66 + (t >> 16);
} else {
sp10[1] = *(u16 *)(a0 + 0x88) + t;
sp10[3] = *(u16 *)(a0 + 0xA);
sp10[5] = *(u16 *)(a0 + 0x8C) + (t >> 16);
}
func_8012B77C((s32)sp20, a0 + 4, (s32)sp10);
t = sp20[0];
*(s16 *)(a0 + 0x100) = *(s16 *)(a0 + 0xE4) = t;
*(s16 *)(a0 + 0x102) = *(s16 *)(a0 + 0xE6) = t >> 16;
}
--- func_80184D6C (src/ov_SC03_091/ov_SC03_091_jr_8018326C.c:3697) shares 1: func_801858AC ---
void func_80184D6C(s32 a0)
{
extern void func_80185730();
extern s32 func_8012B608(s32 a0, s32 a1, s32 a2);
extern void func_8012B178(s32 a0, s32 a1);
extern void func_8012CBF4(s32 a0);
extern s32 func_8012BEE8(s32 a0);
extern s32 func_801858AC();
extern s32 func_80185800(s32 a0);
extern void func_8012BE54(s32 a0);
s32 sp10[2];
s32 t;
s32 r;
func_80185730(sp10, a0, a0 + 0x102);
t = sp10[0];
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = t;
r = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), t >> 16,
*(s16 *)(a0 + 0xFE));
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + r;
func_8012B178(a0, *(s32 *)(a0 + 0xE0));
func_8012CBF4(a0);
if (func_8012BEE8(a0)) {
if (func_801858AC(a0) != 1) {
if (func_80185800(a0) == 1) {
if (((s32 (*)(s32))func_8012BE54)(a0) <= 0x8000) {
*(s16 *)(a0 + 0x2) = 8;
} else {
*(s32 *)(a0 + 0x1C) = rand() % 60 + 0x78;
*(s16 *)(a0 + 0xFE) = rand() % 32 + 0xA;
}
}
}
}
}
--- func_80185430 (src/ov_SC03_091/ov_SC03_091_jr_8018326C.c:4044) shares 1: func_8012B77C ---
void func_80185430(s32 a0)
{
s32 sp10[6]; /* the func_8012B77C "to" record — fields at +0x2/+0x6/+0xA;
* sized 6 words (24B, not case2's 4) — the target's buf sits
* at sp+0x28, a full 24B above sp10's base at sp+0x10. */
s32 sp28[2]; /* reused as both func_8012B0B4's dest and func_8012B77C's "out" */
s32 t;
s16 r;
if (*(u16 *)(a0 + 0x34) == 0) {
if (func_8012BEE8(a0) != 0) {
r = rand();
func_8012B0B4((unsigned int *)sp28, r % 0x1000, (r % 0x80) + 0xC0);
t = sp28[0];
*(s16 *)((s32)sp10 + 0x2) = t;
*(s16 *)((s32)sp10 + 0x6) = *(s16 *)(a0 + 0xA) - 0x180;
*(s16 *)((s32)sp10 + 0xA) = t >> 16;
func_8012B77C((s32)sp28, a0 + 4, (s32)sp10);
t = sp28[0];
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = t;
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12) = t >> 16;
func_8012B200((u8 *)a0);
func_8012B2CC(a0);
func_8012B178(a0, *(s32 *)(a0 + 0xE0) - 0x20000);
*(s16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;
}
} else {
func_8012CBF4(a0);
if (func_8012E778(a0, 0xA000C8) == 0) {
*(s16 *)(a0 + 0x2) = 0xA;
*(s32 *)(a0 + 0x1C) = 0x80;
func_8012E8A8((u8 *)a0);
}
}
}
@@ -0,0 +1,6 @@
src/ov_SC03_091/ov_SC03_091_jr_8018326C.c:func_80185730: score 3 (MIXED; mine 52 ins, target 52) — not yet
register pairs (mine -> target, count): v0->v1 x2, s3->v0 x1
replace mine[41:44] target[41:44]
41 lw v0,32(sp) | lw v1,32(sp)
42 nop | move v0,s3
43 sw v0,0(s3) | sw v1,0(v0)
@@ -0,0 +1,2 @@
NEEDED pin $2 line 4269
NEEDED keepalive line 4292
@@ -0,0 +1,2 @@
src/ov_SC03_091/ov_SC03_091_jr_8018326C.c
func_80185730
@@ -0,0 +1,40 @@
s32 aF8018632C(s32 a0) {
extern void func_8012BE54(s32 a0);
extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5);
extern u16 D_80126B62;
extern u8 D_801A61DC[];
s32 ent;
s32 p;
s32 h;
s32 h2;
s32 ret;
s32 s0;
s32 r;
s32 v;
s32 g;
s32 d;
u16 arr[3];
ent = a0;
p = *(s32 *)(ent + 0x20);
h = *(s16 *)(p + 0x18);
ret = ((s32 (*)(s32))func_8012BE54)(ent);
s0 = h >> 8;
if (ret > s0 * s0) {
return 0;
}
v = *(s16 *)(ent + 0xA);
h2 = *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A);
g = *(s16 *)&D_80126B62;
r = h2 >> 6;
d = v - g;
if (d >= 0 ? r < d : r < g - v) {
return 0;
}
a0 = 1;
arr[0] = *(u16 *)(ent + 0x6);
arr[1] = *(u16 *)(ent + 0xA);
arr[2] = *(u16 *)(ent + 0xE);
func_8012F568(1, 0x4201, 0, 0x1C, (s32)arr, (s32)D_801A61DC);
}
@@ -0,0 +1,42 @@
s32 aF8018632C(s32 a0) {
extern void func_8012BE54(s32 a0);
extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5);
extern u16 D_80126B62;
extern u8 D_801A61DC[];
s32 ent;
s32 p;
s32 h;
s32 h2;
s32 ret;
s32 s0;
s32 r;
s32 v;
s32 g;
s32 d;
u16 arr[3];
ent = a0;
p = *(s32 *)(ent + 0x20);
h = *(s16 *)(p + 0x18);
__asm__("" : "=r"(h) : "0"(h)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9)
ret = ((s32 (*)(s32))func_8012BE54)(ent);
s0 = h >> 8;
if (ret > s0 * s0) {
return 0;
}
v = *(s16 *)(ent + 0xA);
h2 = *(s16 *)(*(s32 *)(ent + 0x20) + 0x1A);
__asm__ __volatile__("" : "=r"(h2) : "0"(h2)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9)
g = *(s16 *)&D_80126B62;
r = h2 >> 6;
d = v - g;
if (d >= 0 ? r < d : r < g - v) {
return 0;
}
a0 = 1;
arr[0] = *(u16 *)(ent + 0x6);
arr[1] = *(u16 *)(ent + 0xA);
arr[2] = *(u16 *)(ent + 0xE);
func_8012F568(1, 0x4201, 0, 0x1C, (s32)arr, (s32)D_801A61DC);
}
@@ -0,0 +1,15 @@
s5: verdict NO-MATCH start 8 best 8 compiles 190 path
s7: verdict NO-MATCH start 8 best 7 compiles 562 path R6 inline p @4790 + R8 temp tmp0 @4789 + R12 width h s32->u16 @4778
best-scoring single candidates of the last trace (move -> score [residual class]):
R12 width h s32->u16 @4778 -> 7 [COUNT] (from 8)
R12 width h s32->u16 @4778 -> 7 [COUNT] (from 8)
R12 width h s32->u16 @4778 -> 7 [COUNT] (from 8)
R6 inline p @4790 -> 8 [COUNT] (from 8)
R8 temp tmp0 @4790 -> 8 [COUNT] (from 8)
R18 bystander @4805->4808 -> 8 [COUNT] (from 8)
R7 block @4790 -> 8 [COUNT] (from 8)
R8 base tmp0 @4790 -> 8 [COUNT] (from 8)
R7 do-while @4790 -> 8 [COUNT] (from 8)
R8 temp tmp0 @4791 -> 8 [COUNT] (from 8)
R7 block @4791 -> 8 [COUNT] (from 8)
R8 base tmp0 @4791 -> 8 [COUNT] (from 8)
@@ -0,0 +1 @@
@@ -0,0 +1,68 @@
=== lever-free bodies in ov_SC03_091 sharing a callee or global with func_8018632C (22 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_8012D664 (src/ov_SC03_091/ov_SC03_091_jr_8012ACE0.c:555) shares 2: D_80126B62 func_8012F568 ---
int func_8012D664(int arg0, int arg1, int arg2) {
extern int func_8012F568();
extern int D_8018CC6C;
struct S8012D664_8012D664 s;
int ret;
int t;
s.a = (*(unsigned short*)&D_80126B5E);
s.b = (*(unsigned short*)&D_80126B62) - 0x40;
s.c = (*(unsigned short*)&D_80126B66);
ret = ((int(*)())func_800132BC)(arg0, &s);
t = arg1 + 0x20;
if (ret < t * t) {
func_8012F568(1, 1, 0, arg2, arg0, &D_8018CC6C);
return 1;
}
return 0;
}
--- func_8012DB84 (src/ov_SC03_091/ov_SC03_091_jr_8012ACE0.c:586) shares 1: func_8012F568 ---
s32 func_8012DB84(void)
{
func_8014C978();
func_8012F568(1, 0xC001, 0, 0x3E8, &D_8018CC74, &D_8018CC7C);
}
--- func_8012BE54 (src/shared/ov/func_8012BE54.h:7) shares 1: D_80126B62 ---
void func_8012BE54(s32 a0) {
u16 sp[3];
sp[0] = D_80126B5E;
sp[1] = D_80126B62;
sp[2] = D_80126B66;
func_8012BE98(a0, sp);
}
--- func_80136DFC (src/shared/ov/func_80136DFC.h:9) shares 1: D_80126B62 ---
void func_80136DFC(void) {
((void (*)(s32, s32, s32, s32, s32, s32))func_800153CC)(0xA, (*(s16 *)&D_80126B5E), 0x110, 0x3C, 4, 0);
((void (*)(s32, s32, s32, s32, s32, s32))func_800153CC)(0xB, (*(s16 *)&D_80126B62), 0x110, 0x44, 4, 0);
((void (*)(s32, s32, s32, s32, s32, s32))func_800153CC)(0xC, (*(s16 *)&D_80126B66), 0x110, 0x4C, 4, 0);
((void (*)(s32, s32, s32, s32, s32, s32))func_800153CC)(0xD, *(s16 *)((s32)D_80126B78 + 0x12), 0x110, 0x54, 4, 0);
((void (*)(s32, s32, s32, s32, s32, s32))func_800153CC)(0xE, D_80126CC4, 0x110, 0x5C, 4, 0);
}
--- func_80184F08 (src/ov_SC03_091/ov_SC03_091_jr_8018326C.c:3755) shares 1: func_8012BE54 ---
void func_80184F08(param_1)
s32 param_1;
{
if (((s32 (*)(s32))func_8012BE54)(param_1) <= 0x40000 && D_80126CBA == 0 && func_801858AC(param_1) == 0) {
*(s16 *)(param_1 + 2) = 5;
}
}
--- func_8012A048 (src/shared/ov/func_8012A048.h:9) shares 1: D_80126B62 ---
void func_8012A048(void *a0, s32 a1, u8 a2) {
*(s32 *)((s32)a0 + 0x0) = a1;
*(u8 *)((s32)a0 + 0x4) = a2;
*(s32 *)((s32)a0 + 0x9C) = 0;
*(s16 *)((s32)a0 + 0xA0) = 0;
*(s16 *)((s32)a0 + 0xA2) = 0;
D_80126940 = D_80126B5E;
D_80126942 = D_80126B62;
D_80126944 = D_80126B66;
}
@@ -0,0 +1,15 @@
src/ov_SC03_091/ov_SC03_091_jr_8018326C.c:func_8018632C: score 8 (COUNT; mine 56 ins, target 54) — not yet
replace mine[7:8] target[7:8]
7 lhu s0,24(v0) | lh s0,24(v0)
replace mine[9:11] target[9:10]
9 sll s0,s0,0x10 | sra s0,s0,0x8
10 sra s0,s0,0x18 | --
replace mine[14:15] target[13:14]
14 bnez v0,3188 <func_8018632C+0xc8> | bnez v0,3180 <func_8018632C+0xc0>
replace mine[18:19] target[17:18]
18 lhu v0,26(v0) | lh v0,26(v0)
replace mine[21:23] target[20:21]
21 sll v0,v0,0x10 | sra a0,v0,0x6
22 sra a0,v0,0x16 | --
replace mine[28:29] target[26:27]
28 j 314c <func_8018632C+0x8c> | j 3144 <func_8018632C+0x84>
@@ -0,0 +1,3 @@
REMOVED pin $17 line 4885
NEEDED launder line 4900
NEEDED launder line 4908
@@ -0,0 +1,2 @@
src/ov_SC03_091/ov_SC03_091_jr_8018326C.c
func_8018632C
@@ -0,0 +1,27 @@
s32 func_801880E8(s32 param_1, s32 arg1)
{
s32 hole[4];
Blk20 m;
s32 vec[3];
s16 *spt;
spt = *(s16 **)(param_1 + 0x2C);
if (*(u16 *)spt == 0)
return 0;
{
Blk20 *s = &D_800AE620;
s32 t0, t1, t2;
t0 = s->w[0]; t1 = s->w[1]; t2 = s->w[2];
m.w[0] = t0; m.w[1] = t1; m.w[2] = t2;
t0 = s->w[3]; t1 = s->w[4]; t2 = s->w[5];
m.w[3] = t0; m.w[4] = t1; m.w[5] = t2;
t0 = s->w[6]; t1 = s->w[7];
m.w[6] = t0; m.w[7] = t1;
}
RotMatrixY(func_8012B6D4((s16 *)(param_1 + 4), spt + 2), &m);
vec[1] = 0;
vec[0] = 0;
vec[2] = arg1;
func_800484EC((s32)&m, (s32)vec, param_1 + 0x10);
return 1;
}
@@ -0,0 +1,29 @@
s32 func_801880E8(s32 param_1, s32 arg1)
{
s32 hole[4];
Blk20 m;
s32 vec[3];
s16 *spt;
spt = *(s16 **)(param_1 + 0x2C);
if (*(u16 *)spt == 0)
return 0;
{
Blk20 *s = &D_800AE620;
register s32 t0 __asm__("$2"), t1 __asm__("$3"), t2 __asm__("$4"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus9)
__asm__("" : "=r"(s) : "0"(s)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9)
t0 = s->w[0]; t1 = s->w[1]; t2 = s->w[2];
m.w[0] = t0; m.w[1] = t1; m.w[2] = t2;
t0 = s->w[3]; t1 = s->w[4]; t2 = s->w[5];
m.w[3] = t0; m.w[4] = t1; m.w[5] = t2;
t0 = s->w[6]; t1 = s->w[7];
m.w[6] = t0; m.w[7] = t1;
__asm__ __volatile__("" : : "r"(t0), "r"(t1)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus9)
}
RotMatrixY(func_8012B6D4((s16 *)(param_1 + 4), spt + 2), &m);
vec[1] = 0;
vec[0] = 0;
vec[2] = arg1;
func_800484EC((s32)&m, (s32)vec, param_1 + 0x10);
return 1;
}
@@ -0,0 +1,14 @@
s6: verdict NO-MATCH start 51 best 29 compiles 181 path R9 swap-stmts @6124 + R18 bystander @6121->6125
best-scoring single candidates of the last trace (move -> score [residual class]):
R18 bystander @6121->6125 -> 29 [COUNT] (from 36)
R18 bystander @6121->6124 -> 30 [COUNT] (from 36)
R18 bystander @6121->6125 -> 30 [COUNT] (from 37)
R9 swap-stmts @6121 -> 33 [COUNT] (from 36)
R18 bystander @6122->6120 -> 33 [COUNT] (from 36)
R18 bystander @6122->6125 -> 33 [COUNT] (from 36)
R18 bystander @6121->6124 -> 33 [COUNT] (from 37)
R9 swap-stmts @6124 -> 36 [COUNT] (from 51)
R7 block @6120 -> 36 [COUNT] (from 36)
R10 param-copy param_1 @6113 -> 36 [COUNT] (from 36)
R7 do-while @6120 -> 36 [COUNT] (from 36)
R10 param-copy arg1 @6113 -> 36 [COUNT] (from 36)
@@ -0,0 +1,5 @@
--- func_80187F94 (line 5966) ---
/* a0 = actor/entity base (struct vec-compatible; s16 fields at +6/+A/+E, s32 flag/vel at +0x14),
* a1 = s16[3] offset vector, a2 = mode passed through to func_8012CEB0.
* Same family as func_8012CC88 (src/ov_SC02_027/ov_SC02_027_jr_8012ACE0.c etc) but the
* position-integration step is a real call to func_8012931C instead of being inlined. */
@@ -0,0 +1,58 @@
=== lever-free bodies in ov_SC03_091 sharing a callee or global with func_801880E8 (23 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_8012B14C (src/shared/ov/func_8012B14C.h:4) shares 1: func_800484EC ---
void func_8012B14C(s32 a0, s32 a1) {
func_800484EC(*(s32 *)((s32)a0 + 0x20) + 0x34, a1, (s32)a0 + 0x10);
}
--- func_8012B1B4 (src/shared/ov/func_8012B1B4.h:4) shares 1: func_800484EC ---
void func_8012B1B4(s32 a0, s32 a1) {
s32 sp10[4];
func_800484EC(*(s32 *)(a0 + 0x20) + 0x34, a1, (s32)sp10);
*(s32 *)(a0 + 0x10) = sp10[0];
*(s32 *)(a0 + 0x18) = sp10[2];
}
--- func_8012F1A4 (src/shared/ov/func_8012F1A4.h:4) shares 1: func_800484EC ---
void func_8012F1A4(s32 *a0, s32 a1, s32 *a2) {
func_800484EC((s32)a0, a1, (s32)a2);
a2[0] += a0[0x14 / 4] << 16;
a2[1] += a0[0x18 / 4] << 16;
a2[2] += a0[0x1C / 4] << 16;
}
--- func_8012B178 (src/shared/ov/func_8012B178.h:4) shares 1: func_800484EC ---
void func_8012B178(s32 a0, s32 a1) {
s32 sp10[3];
sp10[2] = a1;
sp10[1] = 0;
sp10[0] = 0;
func_800484EC(*(s32 *)(a0 + 0x20) + 0x34, (s32)sp10, a0 + 0x10);
}
--- func_80147DC0 (src/shared/ov/func_80147DC0.h:8) shares 1: func_800484EC ---
void func_80147DC0(s32 a0, s32 a1) {
s32 pad[4];
s32 buf[8];
s32 q = *(s32 *)(a0 + 0x20);
func_80013F3C((s32)buf);
func_800126C4((s32)buf, *(s16 *)(q + 0x10));
func_80012558((s32)buf, *(s16 *)(q + 0x12));
func_800123F0((s32)buf, *(s16 *)(q + 0x14));
func_800484EC((s32)buf, a0 + 0x24, a1);
}
--- func_80163194 (src/shared/ov/func_80163194.h:11) shares 1: func_800484EC ---
void func_80163194(s32 a0, s32 a1, s32 a2, s32 a3, s32 arg4) {
s32 pad[4];
s32 out[3];
(void)pad;
func_80162F60(a0, a1);
func_80162F80(a0, a2);
func_80162FA0(a0, a3);
func_800484EC(arg4, a0 + 0x24, (s32)out);
aD_80127090 = out[0];
aD_80127094 = out[1];
aD_80127098 = out[2];
func_80146D30(a0);
}
@@ -0,0 +1,58 @@
src/ov_SC03_091/ov_SC03_091_jr_8018326C.c:func_801880E8: score 51 (COUNT; mine 60 ins, target 54) — not yet
insert mine[3:3] target[3:4]
3 -- | sw ra,92(sp)
insert mine[4:4] target[5:11]
4 -- | sw s0,80(sp)
5 -- | lw a2,44(s1)
6 -- | nop
7 -- | lhu v0,0(a2)
8 -- | nop
9 -- | beqz v0,4f34 <func_801880E8+0xb8>
replace mine[5:12] target[12:30]
5 sw ra,92(sp) | lui a1,0x0
6 sw s0,80(sp) | addiu a1,a1,0
7 lw a1,44(s1) | lw v0,0(a1)
8 nop | lw v1,4(a1)
9 lhu v0,0(a1) | lw a0,8(a1)
10 nop | sw v0,32(sp)
11 beqz v0,4f4c <func_801880E8+0xd0> | sw v1,36(sp)
12 -- | sw a0,40(sp)
13 -- | lw v0,12(a1)
14 -- | lw v1,16(a1)
15 -- | lw a0,20(a1)
16 -- | sw v0,44(sp)
17 -- | sw v1,48(sp)
18 -- | sw a0,52(sp)
19 -- | lw v0,24(a1)
20 -- | lw v1,28(a1)
21 -- | sw v0,56(sp)
22 -- | sw v1,60(sp)
delete mine[13:37] target[31:31]
13 lui v0,0x0 | --
14 lw v0,0(v0) | --
15 lui v1,0x0 | --
16 lw v1,4(v1) | --
17 lui a2,0x0 | --
18 lw a2,8(a2) | --
19 sw v0,32(sp) | --
20 lui v0,0x0 | --
21 lw v0,12(v0) | --
22 sw v1,36(sp) | --
23 lui v1,0x0 | --
24 lw v1,16(v1) | --
25 sw a2,40(sp) | --
26 lui a2,0x0 | --
27 lw a2,20(a2) | --
28 sw v0,44(sp) | --
29 lui v0,0x0 | --
30 lw v0,24(v0) | --
31 sw v1,48(sp) | --
32 lui v1,0x0 | --
33 lw v1,28(v1) | --
34 addiu a1,a1,4 | --
35 sw a2,52(sp) | --
36 sw v0,56(sp) | --
replace mine[38:39] target[32:33]
38 sw v1,60(sp) | addiu a1,a2,4
replace mine[50:51] target[44:45]
50 j 4f50 <func_801880E8+0xd4> | j 4f38 <func_801880E8+0xbc>
@@ -0,0 +1,5 @@
REMOVED decl-body line 6221
REMOVED pin $5 line 6230
NEEDED pin $2 line 6231
NEEDED launder line 6232
NEEDED keepalive line 6239
@@ -0,0 +1,2 @@
src/ov_SC03_091/ov_SC03_091_jr_8018326C.c
func_801880E8
@@ -0,0 +1,14 @@
void func_80188B64(s32 arg0) {
s32 rv;
s32 buf1[2];
s32 buf2[2];
((void (*)(s32, s32, s32))func_8012F14C)((s32)D_80126B78 + 0x34, (s32)D_801AC098, (s32)buf1);
((void (*)(s32, s32, s32))func_8012F14C)((s32)D_80126B78 + 0x34, (s32)(D_801AC098 + 8), (s32)buf2);
if (func_80135888(*(s32 *)(arg0 + 0x20), *(s32 *)(arg0 + 0x58), (s32)buf1, (s32)buf2) == 0) {
rv = 0;
} else {
func_8012F568(1, 0x201, *(s16 *)(*(s32 *)(arg0 + 0x20) + 0x12), 0x23, (s32)buf2, (s32)D_801152A8);
rv = 1;
}
}
@@ -0,0 +1,15 @@
void func_80188B64(s32 arg0) {
s32 rv;
s32 buf1[2];
s32 buf2[2];
((void (*)(s32, s32, s32))func_8012F14C)((s32)D_80126B78 + 0x34, (s32)D_801AC098, (s32)buf1);
((void (*)(s32, s32, s32))func_8012F14C)((s32)D_80126B78 + 0x34, (s32)(D_801AC098 + 8), (s32)buf2);
if (func_80135888(*(s32 *)(arg0 + 0x20), *(s32 *)(arg0 + 0x58), (s32)buf1, (s32)buf2) == 0) {
rv = 0;
} else {
func_8012F568(1, 0x201, *(s16 *)(*(s32 *)(arg0 + 0x20) + 0x12), 0x23, (s32)buf2, (s32)D_801152A8);
rv = 1;
}
__asm__ __volatile__("" : "=r"(rv) : "0"(rv)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9)
}
@@ -0,0 +1,15 @@
g6: verdict NO-MATCH start 4 best 4 compiles 142 path
s7: verdict NO-MATCH start 4 best 4 compiles 160 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R12 width rv s32->u16 @6675 -> 4 [COUNT] (from 4)
R8 temp tmp0 @6684 -> 4 [COUNT] (from 4)
R7 block @6685 -> 4 [COUNT] (from 4)
R9 swap-stmts @6684 -> 4 [COUNT] (from 4)
R10 param-copy arg0 @6678 -> 4 [COUNT] (from 4)
R12 width rv s32->s16 @6675 -> 4 [COUNT] (from 4)
R8 base tmp0 @6684 -> 4 [COUNT] (from 4)
R7 do-while @6685 -> 4 [COUNT] (from 4)
R12 width rv s32->u8 @6675 -> 4 [COUNT] (from 4)
R7 block @6682 -> 4 [COUNT] (from 4)
R7 do-while @6682 -> 4 [COUNT] (from 4)
R7 block @6684 -> 4 [COUNT] (from 4)
@@ -0,0 +1 @@
@@ -0,0 +1,316 @@
=== lever-free bodies in ov_SC03_091 sharing a callee or global with func_80188B64 (48 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_8018771C (src/ov_SC03_091/ov_SC03_091_jr_8018326C.c:5598) shares 5: D_801152A8 D_80126B78 func_8012F14C func_8012F568 func_80135888 ---
s32 aF8018771C(s32 arg0, s32 arg1) {
s32 buf1[2];
s32 buf2[2];
s32 a1v;
func_8012F14C((s32)D_80126B78 + 0x34, (s32)D_801A8C14, (s32)buf1);
func_8012F14C((s32)D_80126B78 + 0x34, (s32)(D_801A8C14 + 4), (s32)buf2);
if (func_80135888(*(s32 *)(arg0 + 0x20), *(s32 *)(arg0 + 0x58), (s32)buf1, (s32)buf2) != 0) {
if (*(u16 *)(arg0 + 0x70) & 0xF) {
a1v = 0x2001;
} else {
a1v = 1;
}
func_8012F568(1, a1v, *(s16 *)(*(s32 *)(arg0 + 0x20) + 0x12), arg1, (s32)buf2, (s32)D_801152A8);
return 1;
}
return 0;
}
--- func_8012DF34 (src/shared/ov/func_8012DF34.h:7) shares 3: D_801152A8 func_8012F568 func_80135888 ---
s32 func_8012DF34(s32 a0, s32 a1, s32 a2) {
s32 s0 = a2;
s32 *p = &D_80126B58;
if (a0 != 0) {
if (*(s16 *)(a0 + 0xAA) != 0) {
return 0;
}
}
if (func_80135888(*(s32 *)((s32)p + 0x20), *(s32 *)((s32)p + 0x38), a1, s0) != 0) {
func_8012F568(1, 1, 0, 0xA, s0, (s32)D_801152A8);
return 1;
}
return 0;
}
--- func_8012AE00 (src/shared/ov/func_8012AE00.h:8) shares 2: D_80126B78 func_80135888 ---
s32 func_8012AE00(s32 a0) {
s16 sp10[3];
s16 sp18[4];
struct V8 sp20;
s32 r1, r2;
s32 base;
s32 p18 = (s32)sp18;
sp10[0] = *(u16 *)(a0 + 0x3A);
sp10[1] = *(u16 *)(a0 + 0x3E);
sp10[2] = *(u16 *)(a0 + 0x42);
sp18[0] = *(u16 *)(a0 + 0x6);
sp18[1] = *(u16 *)(a0 + 0xA);
sp18[2] = *(u16 *)(a0 + 0xE);
base = (s32)&D_80126B58;
sp20 = *(struct V8 *)sp18;
if (func_80135888((s32)D_80126B78, (s32)D_80126B90, (s32)sp10, (s32)&sp20) == 0) {
return 0;
}
base += 4;
r1 = func_80013478(base, (s32)sp10);
r2 = func_80013478(base, p18);
if (r1 < r2) {
return 0;
}
*(s32 *)(a0 + 0x4) = *(s32 *)(a0 + 0x38);
*(s32 *)(a0 + 0x8) = *(s32 *)(a0 + 0x3C);
*(s32 *)(a0 + 0xC) = *(s32 *)(a0 + 0x40);
return 1;
}
--- func_8012E138 (src/shared/ov/func_8012E138.h:10) shares 2: func_8012F14C func_80135888 ---
void func_8012E138(int model) {
struct Cam8012E138 cam;
int bufB[2];
int bufA[2];
int m;
short s;
cam.a = D_80126B5E;
cam.b = D_80126B62;
cam.c = D_80126B66;
func_8012F038(*(int *)(model + 0x20) + 0x34, &cam, bufA);
m = *(int *)(model + 0x20);
if (m != 0) {
int mm;
func_80049CAC(m + 0x10, m + 0x34);
mm = *(int *)(model + 0x20);
s = *(u16 *)(model + 6) + *(u16 *)(model + 0x50);
*(u16 *)(mm + 8) = s;
*(int *)(mm + 0x48) = s;
s = *(u16 *)(model + 0xA) + *(u16 *)(model + 0x52);
*(u16 *)(mm + 0xA) = s;
*(int *)(mm + 0x4C) = s;
s = *(u16 *)(model + 0xE) + *(u16 *)(model + 0x54);
*(u16 *)(mm + 0xC) = s;
*(u16 *)(mm + 0x2C) = *(u16 *)(mm + 0x2C) | 1;
*(int *)(mm + 0x50) = s;
}
func_8012F14C(*(int *)(model + 0x20) + 0x34, bufA, bufB);
if (func_80135888(*(int *)(model + 0x20), *(int *)(model + 0x58), bufB, &cam)) {
D_80126B5E = cam.a;
D_80126B62 = cam.b;
D_80126B66 = cam.c;
}
}
--- func_8014D820 (src/ov_SC03_091/ov_SC03_091_after.c:1549) shares 2: D_801152A8 func_80135888 ---
s32 func_8014D820(s32 a0, u16 *a1, u16 *a2)
{
extern u8 D_801202A0[];
extern u8 D_8018E580[];
extern u8 D_801152A8[];
extern s16 D_801152AC;
/* BLOCK-SCOPE types — see the header note. `Ent` at file scope collides with
src/shared/engine_types.h:434 and kills the TU's cc1 stage (exit 33). */
typedef struct
{
u16 x;
u16 y;
u16 z;
u16 w;
} V4;
typedef struct EntD820
{
u16 f0;
u16 f2;
u16 f4;
u16 x;
u16 f8;
u16 y;
u16 fC;
u16 z;
u8 p10[0x10];
s32 f20;
u8 p24[0x34];
s32 f58;
u16 f5C;
u16 f5E;
u8 p60[0x10C - 0x60];
} Ent;
int new_var2;
s16 new_var3;
V4 out[3];
V4 pos;
Desc desc;
Ent *ent;
Ent *p;
s32 dx;
s32 dz;
s32 ex;
s32 ez;
s32 r1;
s32 r2;
s32 r3;
s32 ang;
s32 x0;
s32 y0;
s32 z0;
s32 tx;
s32 tz;
s32 ty;
s32 r;
s32 t;
s32 u;
s32 a0v;
t = a2[0];
u = a1[0];
dx = t - u;
a0v = a0;
new_var3 = (s16) dx;
t = a2[2];
u = a1[2];
dz = t - u;
if (((s16) (dx | dz)) == 0)
{
goto fail;
}
desc.x = dx;
desc.y = a2[1] - a1[1];
desc.z = a2[2] - a1[2];
ent = *((Ent **) (a0v + 0x170));
if (ent->f0 == 0)
{
goto fail;
}
if ((ent->f5C & 0x1000) == 0)
{
goto fail;
}
if (ent->f58 == 0)
{
goto fail;
}
if (func_80135A4C(ent->f20, ent->f58, (s32 *) a1, (s32) a2) == 0)
{
goto fail;
}
ex = ent->x - (*((u16 *) (a0v + 6)));
ez = ent->z - (*((u16 *) (a0v + 0xE)));
r1 = (s16) ratan2((s16) dz, new_var3);
r2 = (s16) ratan2((s16) ez, (s16) ex);
r3 = (s16) func_80012A60(r1, r2);
if (0x400 <= r3)
{
goto fail;
}
desc.f20 = 0;
desc.f1C = 0;
desc.f18 = 0;
x0 = ent->x;
pos.x = x0;
y0 = ent->y;
pos.y = y0;
z0 = ent->z;
tx = x0 + desc.x;
pos.z = z0;
tz = z0 + desc.z;
desc.x = tx;
desc.z = tz;
ty = (y0 + desc.y) + 8;
desc.y = ty;
if (currentLocationId != 0x3008)
{
for (p = (Ent *) D_801202A0; p < (Ent *) (D_801202A0 + 0x6480); p++)
{
if (p == ent)
{
continue;
}
if (p->f0 == 0)
{
continue;
}
if (p->f5C == 0)
{
continue;
}
if (p->f58 == 0)
{
continue;
}
func_80135888(p->f20, p->f58, (s32) (&pos), (s32) (&desc));
}
}
else
{
ang = ratan2(((s16) x0) - ((s16) tx), ((s16) z0) - ((s16) tz)) & 0xFFF;
func_800139C8(ang, D_8018E580, &out[0]);
func_800139C8((s16) (ang - 0x155), D_8018E580, &out[1]);
func_800139C8((s16) (ang + 0x155), D_8018E580, &out[2]);
out[0].x += pos.x;
out[0].y = pos.y;
out[0].z += pos.z;
out[1].x += pos.x;
out[1].y = pos.y;
out[1].z += pos.z;
out[2].x += pos.x;
out[2].y = pos.y;
out[2].z += pos.z;
for (p = (Ent *) D_801202A0; p < (Ent *) (D_801202A0 + 0x6480); p++)
{
if (p == ent)
{
continue;
}
if (p->f0 == 0)
{
continue;
}
if (p->f5C == 0)
{
continue;
}
if (p->f58 == 0)
{
continue;
}
if (func_8014DCE0((s32) p, (s32) (&pos), (s32) (&out[0])) != 0)
{
__builtin_memcpy((void *) ((s32) (&desc)), (void *) ((s32) (&pos)), 8);
}
}
}
r = func_80133784(0, &pos, (s32) (&desc));
if ((r == 0) || ((r == 0x2000) && (((*(u16 *) D_801152A8) | ((u16) D_801152AC)) == 0)))
{
ent->x = desc.x - desc.f18;
ent->y = desc.y;
ent->z = desc.z - desc.f20;
desc.x -= pos.x;
desc.y -= pos.y;
desc.z -= pos.z;
*((u16 *) (a0v + 6)) = a1[0] + desc.x;
new_var2 = desc.y;
new_var2 = new_var2 + 0x10;
*((u16 *) (a0v + 0xA)) = a1[1] + new_var2;
*((u16 *) (a0v + 0xE)) = a1[2] + desc.z;
}
else
{
*((u16 *) (a0v + 6)) = a1[0];
*((u16 *) (a0v + 0xA)) = a1[1] + 0x10;
*((u16 *) (a0v + 0xE)) = a1[2];
}
return 1;
fail:
*((s32 *) (a0v + 0x170)) = 0;
return 0;
}
--- func_801484B0 (src/shared/ov/func_801484B0.h:5) shares 1: D_80126B78 ---
void func_801484B0(s32 a0, s32 a1) {
func_801485B8(*(s32 *)((s32)D_80126B78 + 0x20) - 0x10, a0, a1);
}
@@ -0,0 +1,8 @@
src/ov_SC03_091/ov_SC03_091_jr_8018326C.c:func_80188B64: score 4 (COUNT; mine 42 ins, target 45) — not yet
replace mine[25:26] target[25:26]
25 beqz v0,5988 <func_80188B64+0x90> | bnez v0,596c <func_80188B64+0x74>
insert mine[27:27] target[27:29]
27 -- | j 5994 <func_80188B64+0x9c>
28 -- | move v0,zero
insert mine[36:36] target[38:39]
36 -- | li v0,1
@@ -0,0 +1,2 @@
REMOVED pin $2 line 6787
NEEDED launder line 6799
@@ -0,0 +1,2 @@
src/ov_SC03_091/ov_SC03_091_jr_8018326C.c
func_80188B64
+45 -45
View File
@@ -53,7 +53,7 @@
},
"kinds": {
"asm-body/direct": 13,
"barrier/direct": 282,
"barrier/direct": 280,
"gte-lever/direct": 357,
"gte-lever/via-macro": 94,
"gte-unsigned/direct": 270,
@@ -62,7 +62,7 @@
"instruction/direct": 206,
"instruction/via-macro": 22,
"keepalive/direct": 340,
"launder/direct": 635,
"launder/direct": 634,
"launder/via-macro": 42,
"verbatim-body/direct": 2682
}
@@ -115,37 +115,37 @@
},
"classes": {
"A": {
"bodies": 1411,
"distinct_bodies": 578,
"bodies": 1408,
"distinct_bodies": 575,
"file_scope": 0,
"in_bodies": 2276,
"in_bodies": 2271,
"kinds": {
"pin": 2276
"pin": 2271
},
"marked": 2276,
"sites": 2276,
"marked": 2271,
"sites": 2271,
"tus": 1079,
"unmarked": 0
},
"B": {
"bodies": 4663,
"distinct_bodies": 726,
"bodies": 4662,
"distinct_bodies": 725,
"file_scope": 13,
"in_bodies": 11285,
"in_bodies": 11282,
"kinds": {
"asm-body": 13,
"barrier": 282,
"barrier": 280,
"gte": 6355,
"gte-lever": 451,
"gte-unsigned": 270,
"instruction": 228,
"keepalive": 340,
"launder": 677,
"launder": 676,
"verbatim-body": 2682
},
"marked": 2475,
"sites": 11298,
"tus": 1427,
"marked": 2472,
"sites": 11295,
"tus": 1426,
"unmarked": 8823
},
"C": {
@@ -178,17 +178,17 @@
"unmarked": 50
},
"E": {
"bodies": 1098,
"distinct_bodies": 159,
"bodies": 1099,
"distinct_bodies": 160,
"file_scope": 6424,
"in_bodies": 1367,
"in_bodies": 1368,
"kinds": {
"asm-label": 7791
"asm-label": 7792
},
"marked": 0,
"sites": 7791,
"sites": 7792,
"tus": 2090,
"unmarked": 7791
"unmarked": 7792
},
"F": {
"bodies": 428,
@@ -250,9 +250,9 @@
"coverage": {
"asm": {
"comment_dead": 6781,
"live": 15211,
"live": 15204,
"macro_block": 194,
"raw": 22186
"raw": 22179
},
"attribute": {
"comment_dead": 0,
@@ -268,9 +268,9 @@
},
"register": {
"comment_dead": 8574,
"live": 2326,
"live": 2321,
"macro_block": 18,
"raw": 10918
"raw": 10913
},
"volatile": {
"comment_dead": 2607,
@@ -280,7 +280,7 @@
}
},
"coverage_ok": true,
"elapsed_s": 22.3,
"elapsed_s": 22.1,
"generated": "2026-09-11",
"gte_levers": {
"direct": 357,
@@ -291,15 +291,15 @@
"via_macro": 94,
"what": "GTE ops whose clobbers exceed the canonical macro's (a scheduling steer): class-B levers INSIDE the headline number since T5 (2026-09-09), marked, 0 at the close"
},
"head": "737bbe494",
"head": "8b0e8645e",
"headers": 3181,
"levers_AB": {
"asm": 1991,
"bodies": 2086,
"distinct_bodies": 776,
"marked": 4267,
"pins": 2276,
"sites": 4267,
"asm": 1988,
"bodies": 2082,
"distinct_bodies": 772,
"marked": 4259,
"pins": 2271,
"sites": 4259,
"unmarked": 0,
"what": "register pins + asm statements excluding GTE ops: the classes the phase drives to 0"
},
@@ -435,25 +435,25 @@
"bare_name": 9,
"init": 209,
"registers": {
"$0": 60,
"$0": 58,
"$10": 10,
"$11": 5,
"$12": 9,
"$13": 6,
"$14": 5,
"$15": 1,
"$16": 87,
"$16": 86,
"$17": 34,
"$18": 28,
"$19": 19,
"$2": 781,
"$2": 780,
"$20": 7,
"$21": 5,
"$22": 3,
"$23": 6,
"$25": 1,
"$29": 13,
"$3": 172,
"$3": 171,
"$4": 503,
"$5": 380,
"$6": 62,
@@ -465,29 +465,29 @@
"a1": 2,
"v0": 2
},
"sites": 2276,
"sites": 2271,
"sp": 13,
"spelling": {
"__asm__": 2251,
"__asm__": 2246,
"asm": 25
},
"volatile_qualified": 0,
"zero": 60
"zero": 58
},
"src_stamp": "825d2e6548b9833f",
"src_stamp": "8a29b650d0a7b817",
"tus": 4121,
"unclassified": 0,
"union_AD": {
"bodies": 5850,
"bodies": 5846,
"by_kind": {
"main": 133,
"md": 114,
"ov": 5432,
"resident": 10,
"resident": 6,
"shared": 161
},
"copies_in_multi": 4857,
"distinct_bodies": 1107,
"distinct_bodies": 1103,
"multi_copy_classes": 114
},
"verbatim_excluded": {
+10 -10
View File
@@ -1,26 +1,26 @@
lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13)
coverage asm raw 22186 = live 15211 + macro-block 194 + comment/dead 6781
coverage register raw 10918 = live 2326 + macro-block 18 + comment/dead 8574
coverage asm raw 22179 = live 15204 + macro-block 194 + comment/dead 6781
coverage register raw 10913 = live 2321 + macro-block 18 + comment/dead 8574
coverage volatile raw 4373 = live 1684 + macro-block 82 + comment/dead 2607
coverage builtin raw 599 = live 445 + macro-block 0 + comment/dead 154
coverage attribute raw 76 = live 76 + macro-block 0 + comment/dead 0
class sites in-bodies file-scope bodies distinct TUs marked unmarked kinds
A pins 2276 2276 0 1411 578 1079 2276 0 {'pin': 2276}
B asm 11298 11285 13 4663 726 1427 2475 8823 {'gte': 6355, 'gte-lever': 451, 'gte-unsigned': 270, 'barrier': 282, 'launder': 677, 'instruction': 228, 'asm-body': 13, 'keepalive': 340, 'verbatim-body': 2682}
A pins 2271 2271 0 1408 575 1079 2271 0 {'pin': 2271}
B asm 11295 11282 13 4662 725 1426 2472 8823 {'gte': 6355, 'gte-lever': 451, 'gte-unsigned': 270, 'barrier': 280, 'launder': 676, 'instruction': 228, 'asm-body': 13, 'keepalive': 340, 'verbatim-body': 2682}
C volatile 1589 1437 152 495 94 609 14 1575 {'decl-body': 58, 'decl-file': 152, 'cast': 1377, 'param': 2}
D register 50 50 0 47 47 6 0 50 {'register': 50}
E asm-label 7791 1367 6424 1098 159 2090 0 7791 {'asm-label': 7791}
E asm-label 7792 1368 6424 1099 160 2090 0 7792 {'asm-label': 7792}
F builtin 445 445 0 428 27 302 0 445 {'builtin': 445}
G attribute 76 1 75 1 1 40 0 76 {'attribute': 76}
UNION A–D: 5,850 bodies · 1,107 distinct (addresses normalized) · 114 multi-copy classes holding 4,857 bodies · by kind {'ov': 5432, 'shared': 161, 'main': 133, 'md': 114, 'resident': 10}
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 4,267 sites in 2,086 bodies (776 distinct) · marked !FAKE 4,267 · UNMARKED 0
UNION A–D: 5,846 bodies · 1,103 distinct (addresses normalized) · 114 multi-copy classes holding 4,857 bodies · by kind {'ov': 5432, 'main': 133, 'md': 114, 'shared': 161, 'resident': 6}
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 4,259 sites in 2,082 bodies (772 distinct) · marked !FAKE 4,259 · UNMARKED 0
orphan !FAKE markers (no pin/asm site on the line nor below): 0
marked ordinary-C fakes kept by Drew's S104 ruling (a) (`do { } while (0)`, dead initialisers; NOT levers): 47
GTE levers (clobbers beyond the canonical macro's): 451 sites (94 via a variant macro, 357 direct) · marked 451 · UNMARKED 0 · unsigned GTE statements 270
per-TU asm macro definitions outside the GTE header: 314 {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1} (GTE variants 64)
pins: 2,276 · $0 60 · $sp 13 · with initializer 209 · volatile-qualified 0 · bare-name 9 · spellings {'__asm__': 2251, 'asm': 25}
pins: 2,271 · $0 58 · $sp 13 · with initializer 209 · volatile-qualified 0 · bare-name 9 · spellings {'__asm__': 2246, 'asm': 25}
whole-body asm routines in C shells, manifest PERMANENT (hand asm, NOT levers): 22 routines · 2,682 sites (2,660 private copies + 22 shared headers); asm-bodies NOT permanent (levers): 13 site(s) ['func_8001E378:DECOMPILE-NOW', 'func_80020F34:DECOMPILE-NOW', 'func_800249F0:DECOMPILE-NOW', 'func_80025CBC:DECOMPILE-NOW', 'func_80026514:UNCERTAIN', 'func_800268D0:UNCERTAIN', 'func_80027058:DECOMPILE-NOW', 'func_80027200:DECOMPILE-NOW', 'func_800CBA44:DECOMPILE-NOW', 'func_8017D810:DECOMPILE-NOW', 'func_8017E26C:UNCERTAIN', 'func_80184440:DECOMPILE-NOW', 'func_801A3BCC:DECOMPILE-NOW']
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 282, 'gte/direct': 197, 'gte/via-macro': 6158, 'gte-lever/direct': 357, 'gte-lever/via-macro': 94, 'gte-unsigned/direct': 270, 'instruction/direct': 206, 'instruction/via-macro': 22, 'keepalive/direct': 340, 'launder/direct': 635, 'launder/via-macro': 42, 'verbatim-body/direct': 2682}
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 280, 'gte/direct': 197, 'gte/via-macro': 6158, 'gte-lever/direct': 357, 'gte-lever/via-macro': 94, 'gte-unsigned/direct': 270, 'instruction/direct': 206, 'instruction/via-macro': 22, 'keepalive/direct': 340, 'launder/direct': 634, 'launder/via-macro': 42, 'verbatim-body/direct': 2682}
instruction mnemonics: {'la': 139, 'addu': 23, 'addiu': 22, 'RTP_SND': 22, '.section': 7, 'lui': 3, 'lh': 3, 'and': 2, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
gte mnemonics: {'gte_ldv0': 758, 'gte_stlvnl': 593, 'gte_stsxy': 448, 'gte_rtps': 439, 'gte_stflg': 415, 'gte_rtpt': 352, 'gte_SetRotMatrix': 253, 'gte_stsxy3': 236, 'gte_SetTransMatrix': 231, 'gte_rtv0tr': 228, 'gte_ldv3c': 184, 'gte_ldv3': 177, 'gte_stsv': 161, 'lwc2': 158, 'gte_stsz4': 149, 'gte_stsz3': 147, 'gte_stszotz': 134, 'gte_dpcl': 134, 'gte_stclmv': 114, 'gte_stsxy3_f3': 111, 'gte_nclip': 108, 'gte_stopz': 108, 'gte_stsxy3c': 108, 'gte_rtir': 81, 'gte_stsxy3_ft3': 79, 'gte_ldclmv': 78, 'gte_avsz4': 56, 'gte_stotz': 52, 'gte_ldrgb': 30, 'gte_nccs': 25}
asm-bearing macro definitions: 314 (20 names, 3 with >1 text) kinds {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1}
@@ -29,4 +29,4 @@ lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclas
src/shared/ov/func_80178004.h pins got 8 expected 26 N-A
ov_SC03_006 func_80184034 bare-name pins got 0 expected 3 N-A
engine_prelude.h asm sites (a macro definition only) got 0 expected 0 OK
elapsed 22.3 s
elapsed 22.1 s