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https://github.com/Druthulu/BFM-decomp
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feat(phase-32): T3 (3) — resident: func_800D06E8 (344 ins) BANKED byte-identical 8e17e02f — THE RESIDENT IS 100% C (145/145)
- the Opus drafter recovered the closeness-0 body the journals (attempts 1-3) pointed at (.run/S71b_1/fable/) — the pack's inline 292-draft was the wrong one — and found the real blocker: the TU defines Struct80078E78 AFTER the slot with a layout lacking bytes 0x36/0x37; only a BLOCK-scoped typedef under a distinct tag (Blk80078E78) + a block-scoped extern compiles (decl-hoisting resolver variants recreate the S7x 'conflicting types'). Idioms: §162k1 QImode (u8)(c-3)<2; explicit flag temp t=(u32)(r-0x64)<0x1E, s1=t^1; switch decision trees for both currentLocationId dispatches. reloc_identity AGREE 50/50; rtu_match MATCH 344/344 (verified by the coordinator) - jtbl_carve --func: jtbl_80113FA4 (5 words, the old tail2) joins the resident_jr_800D00E4 .rodata piece (0x450e0..0x451c0, JTBL_PADS 0,0,0,0, tables +0x0/+0x3c/+0xb4/+0xcc); carve set 5 -> 4 pieces, --pre kept - make extract + make build BINARY=resident -j8 rc 0; sha 8e17e02ff8954d07c979449198f7e1645046b353 == check; pads_audit ok/ok; interleave_check ALIGNED n=4
This commit is contained in:
Drew T
+2
-2
@@ -5126,6 +5126,6 @@ ov_SC03_107_UNDEF_FUNCS := build/ov_SC03_107/undefined_funcs_auto.txt
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# --- resident (engine blob) — §8e jtbl pad spec for the 0x450e0..0x451ac .rodata carve ---
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# --- resident (engine blob) — §8f leading-rodata sandwich: rodata(hdr) -> text -> data -> rodata(carve) -> data ---
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resident_JTBL_INTERLEAVE := --pre hdr.rodata.o --order tail.data.o,resident_jr_800D00E4.o,tail2.data.o,resident_jr_800D128C.o,tail3.data.o # Phase-26 §8 jtbl-rodata carve
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build/src/resident/resident_jr_800D00E4.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x3c,+0xb4
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resident_JTBL_INTERLEAVE := --pre hdr.rodata.o --order tail.data.o,resident_jr_800D00E4.o,resident_jr_800D128C.o,tail2.data.o # Phase-26 §8 jtbl-rodata carve
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build/src/resident/resident_jr_800D00E4.o: JTBL_PADS := 0,0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x3c,+0xb4,+0xcc
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build/src/resident/resident_jr_800D128C.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x1e0
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@@ -88,7 +88,6 @@ segments:
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- [0x2494, c, resident_jr_800D128C]
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- [0x4610, data, tail]
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- [0x450e0, .rodata, resident_jr_800D00E4] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x451ac, data, tail2]
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- [0x451c0, .rodata, resident_jr_800D128C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x453c4, data, tail3]
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- [0x453c4, data, tail2]
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- [0x5935C] # EOF (365,404 B) -> end vram 0x80128154
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@@ -503,7 +503,234 @@ void func_800D06CC(void) {
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D_80127500 = 3;
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}
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INCLUDE_ASM("asm/resident/nonmatchings/resident_jr_800D00E4", func_800D06E8);
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/* func_800D06E8 -- two independent state machines driven by currentLocationId (344 ins).
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*
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* SHAPE: both currentLocationId dispatches are gcc-2.7.2 expand_case DECISION TREES
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* (switch; adjacent case values merge into range nodes, balance_case_nodes roots both
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* on [0x1077,0x1078] -> `slti 0x1079` first). The D_80127500 dispatch is a 3-value
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* tree; the D_801151F8 dispatch has 5 consecutive cases -> `sltiu 5` + jtbl_80113FA4.
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* The s0 and D_800A2B70 arms are switches (if-chains cost ~10 ins); if/else arms (not
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* assign-then-test) keep `s1=` out of the two jal delay slots.
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*
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* §162k1 (QImode): mips.h has WORD_REGISTER_OPERATIONS + LOAD_EXTEND_OP=ZERO_EXTEND but
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* NO PROMOTE_MODE, so `u8 c` is a genuine QImode pseudo. `c == 1` is a QImode compare ->
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* no cmpqi -> convert_to_mode(SImode) = the `andi $v1,$a0,0xFF`, and combine cannot fold
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* it into the lbu (the pseudo has a second use). The second use must NOT re-widen:
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* `(u32)(c-3)` is SImode arithmetic (a second andi, cse-tied to the first); `(u8)(c - 3)`
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* is QImode -> expand_binop has no subqi3 -> widen_operand(no_extend=1) hands it a
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* PARADOXICAL SUBREG (optabs.c:299) = `addiu $v0,$a0,-3` on the RAW register, and
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* combine.c:9246's "A - C1 vs C2" rule drops the QI truncation before the sltiu.
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*
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* Expand-time subtarget reuse: in `s1 = (cmp) ^ 1` the XOR passes s1's pseudo down as the
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* subtarget and do_store_flag expands `r - 0x64` straight INTO it (addiu $s1 / sltiu $v0,$s1).
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* An explicit flag temp makes the subtraction and the flag share the temp's pseudo ->
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* the target's `addiu $v0,$v1,-0x64 ; sltiu $v0,$v0,0x1E ; xori $s1,$v0,1`.
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*
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* D_80078E78: this TU file-scope-defines `Struct80078E78` as {u8 pad[0x34]; s16} for
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* func_800D10EC, but AFTER this function's address slot -- so that name is neither visible
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* here nor redefinable (gcc-2.7.2 rejects even a byte-identical typedef redefinition).
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* A BLOCK-SCOPED typedef under a different tag + a block-scoped `extern` for the object is
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* only a pedwarn ("type mismatch with previous external decl") and compiles the real TU clean.
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* The local pointer `p = &D_80078E78` is what pins the address in the callee-saved $s2.
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*/
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extern s16 currentLocationId;
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extern s32 func_80029504(void);
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extern void func_8002D4C8(s32 arg0, s32 arg1);
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extern s32 func_8001AAA0(s32 arg0);
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extern s32 D_800A2B70;
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extern s32 D_800BA0FC;
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extern s32 D_8011529C;
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extern s32 D_80114EA0;
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extern s32 D_801151F8;
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extern s32 D_801201F0;
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extern s32 D_80126AE8;
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extern s32 D_80127050;
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extern s32 D_80127500;
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extern s32 resLoad_lastId;
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void func_800D06E8(void) {
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typedef struct {
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u8 pad00[0x36];
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u8 field_0x36;
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u8 field_0x37;
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} Blk80078E78;
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extern Blk80078E78 D_80078E78;
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Blk80078E78 *p = &D_80078E78;
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s32 s0;
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s32 s1;
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s32 r;
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s32 t;
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u8 c;
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switch (D_80127500) {
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case 0:
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switch (currentLocationId) {
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case 0x1010:
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case 0x1011:
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case 0x1077:
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case 0x1078:
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case 0x1094:
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case 0x1095:
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r = func_80029504();
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if ((u32)(r - 0x460) < 0x32) {
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s1 = 0;
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} else {
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t = (u32)(r - 0x64) < 0x1E;
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s1 = t ^ 1;
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}
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if (s1 == 0) {
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D_800A2B70 = 0;
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}
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c = p->field_0x37;
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s0 = 0;
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if (c == 1) {
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s0 = 1;
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} else if ((u8)(c - 3) < 2) {
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s0 = 2;
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}
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if (D_800A2B70 != 0) {
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D_80127500 += 1;
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break;
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}
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if (s1 == 0) {
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break;
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}
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if (s0 == D_8011529C) {
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break;
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}
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D_8011529C = s0;
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if (D_80127050 != 0) {
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D_80127050 = 0;
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break;
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}
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switch (s0) {
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case 1:
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func_8002D4C8(0x518, 0);
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break;
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case 2:
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func_8002D4C8(0x517, 0);
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break;
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default:
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goto sw1_end;
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}
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D_800A2B70 = s0;
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D_800BA0FC = 0;
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D_80127500 += 1;
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break;
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case 0x3014:
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case 0x301C:
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if (p->field_0x37 != D_8011529C) {
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D_8011529C = p->field_0x37;
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if (p->field_0x37 == 4) {
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func_8002D4C8(0x683, 0);
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} else if (p->field_0x37 == 0) {
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func_8002D4C8(0xD, 0x683);
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}
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}
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break;
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}
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break;
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case 1:
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D_800BA0FC += 1;
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if ((u32)D_800BA0FC >= 0x97) {
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switch (D_800A2B70) {
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case 1:
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func_8002D4C8(0xD, 0x518);
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break;
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case 2:
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func_8002D4C8(0xD, 0x517);
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break;
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}
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D_800A2B70 = 0;
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D_80127500 = 0;
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}
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break;
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case 2:
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D_801201F0 -= 1;
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if (D_801201F0 == 0) {
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func_8002D4C8(0xD, 0x683);
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D_80127500 = 0;
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}
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break;
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}
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sw1_end:
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switch (D_801151F8) {
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case 0:
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switch (currentLocationId) {
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case 0x1010:
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case 0x1011:
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case 0x1077:
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case 0x1078:
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case 0x1094:
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case 0x1095:
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r = func_80029504();
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if ((u32)(r - 0x460) < 0x32) {
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s1 = 0x89;
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} else if ((u32)(r - 0x384) < 0x6E) {
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s1 = 0x65;
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} else if ((u32)(r - 0x64) < 0x1E) {
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s1 = 0x28;
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} else {
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s1 = 0x10;
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if (p->field_0x36 == 1) {
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s1 = 0xF;
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}
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}
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break;
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case 0x1052:
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case 0x1053:
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s1 = 0x27;
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break;
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case 0x3014:
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case 0x301C:
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case 0x301E:
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case 0x3023:
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s1 = 0xA;
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if (p->field_0x37 == 4) {
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s1 = 0x3C;
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}
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break;
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}
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if (s1 != resLoad_lastId) {
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D_80114EA0 = s1;
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D_80126AE8 = 0x3C;
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resLoad_lastId = 0;
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D_801151F8 += 1;
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func_8002D4C8(1, 2);
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}
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break;
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case 1:
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D_80126AE8 -= 1;
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if (D_80126AE8 == 0) {
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D_801151F8 += 1;
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}
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break;
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case 2:
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switch (D_80114EA0) {
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case 0xA:
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func_8002D4C8(0x10C, 0);
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break;
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case 0xF:
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func_8001AAA0(0xF);
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break;
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case 0x10:
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func_8001AAA0(0x10);
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break;
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case 0x3C:
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func_8002D4C8(0x13B, 0);
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break;
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}
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D_801151F8 = 0;
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resLoad_lastId = D_80114EA0;
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break;
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case 3:
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case 4:
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break;
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}
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}
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extern s32 resLoad_lastId;
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extern void func_8002D4C8(s32 arg0, s32 arg1);
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