phase-36: S104 part-3 bank resumed — 6 of 38 MATCH rows banked (the rest banked before the timeout); e1–e5 TU-batch packs; R22 follows

This commit is contained in:
Drew T
2026-09-11 00:32:13 -06:00
parent c5786dac6f
commit 65b0855c1c
132 changed files with 3875 additions and 207 deletions
+15 -5
View File
@@ -1,6 +1,16 @@
rank fn alias copies best needed kinds regs tu
101 func_801818A4 ov_SC02_031 2 1 1 pin $16 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c
30 func_8018486C ov_SC03_091 3 21 3 pin $19,$22,$23 src/ov_SC03_091/ov_SC03_091_jr_8018326C.c
3 func_80181408 ov_SC06_010 4 26 2 barrier,pin $4 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c
4 func_80183CC4 ov_SC03_094 3 27 4 keepalive,pin $16,$2,$3 src/ov_SC03_094/ov_SC03_094_jr_8017BEBC.c
25 func_8017DAB8 ov_SC02_026 3 30 2 pin $16,$2 src/ov_SC02_026/ov_SC02_026_jr_8017C180.c
60 func_8018B9D4 ov_SC06_018 2 1 1 pin $0 src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c
23 func_801A1E94 md_SC07_004 1 1 1 pin $4 src/md_SC07_004/md_SC07_004.c
101 func_801A5C44 md_SC07_004 1 1 1 pin $4 src/md_SC07_004/md_SC07_004.c
232 func_801AB818 md_SC07_004 1 1 1 barrier src/md_SC07_004/md_SC07_004.c
20 func_80037144 main 1 2 1 barrier src/800_c.c
41 func_800384A8 main 1 2 1 pin $4 src/800_c.c
4 func_80187DD0 ov_SC06_018 1 2 1 pin $2 src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c
47 func_8018AD74 ov_SC06_018 1 2 1 launder src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c
127 func_80035210 main 1 4 1 pin $3 src/800_b_2.c
18 func_80036FB0 main 1 4 1 keepalive src/800_c.c
141 func_80183B9C ov_SC02_017 1 4 1 barrier src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
200 func_80186770 ov_SC02_017 1 4 1 pin $6 src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
85 func_80030F80 main 1 5 1 barrier src/800_b_2.c
163 func_80184754 ov_SC02_017 1 8 1 launder src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
118 func_800348A8 main 1 9 1 keepalive src/800_b_2.c
1 rank fn alias copies best needed kinds regs tu
2 101 60 func_801818A4 func_8018B9D4 ov_SC02_031 ov_SC06_018 2 1 1 pin $16 $0 src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c
3 30 23 func_8018486C func_801A1E94 ov_SC03_091 md_SC07_004 3 1 21 1 3 1 pin $19,$22,$23 $4 src/ov_SC03_091/ov_SC03_091_jr_8018326C.c src/md_SC07_004/md_SC07_004.c
4 3 101 func_80181408 func_801A5C44 ov_SC06_010 md_SC07_004 4 1 26 1 2 1 barrier,pin pin $4 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c src/md_SC07_004/md_SC07_004.c
5 4 232 func_80183CC4 func_801AB818 ov_SC03_094 md_SC07_004 3 1 27 1 4 1 keepalive,pin barrier $16,$2,$3 src/ov_SC03_094/ov_SC03_094_jr_8017BEBC.c src/md_SC07_004/md_SC07_004.c
6 25 20 func_8017DAB8 func_80037144 ov_SC02_026 main 3 1 30 2 2 1 pin barrier $16,$2 src/ov_SC02_026/ov_SC02_026_jr_8017C180.c src/800_c.c
7 41 func_800384A8 main 1 2 1 pin $4 src/800_c.c
8 4 func_80187DD0 ov_SC06_018 1 2 1 pin $2 src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c
9 47 func_8018AD74 ov_SC06_018 1 2 1 launder src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c
10 127 func_80035210 main 1 4 1 pin $3 src/800_b_2.c
11 18 func_80036FB0 main 1 4 1 keepalive src/800_c.c
12 141 func_80183B9C ov_SC02_017 1 4 1 barrier src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
13 200 func_80186770 ov_SC02_017 1 4 1 pin $6 src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
14 85 func_80030F80 main 1 5 1 barrier src/800_b_2.c
15 163 func_80184754 ov_SC02_017 1 8 1 launder src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
16 118 func_800348A8 main 1 9 1 keepalive src/800_b_2.c
@@ -0,0 +1,178 @@
void func_80030F80(void)
{
u8 *p;
u8 *sv;
u8 *w;
const u16 *q;
const u16 *r;
s32 *tbl;
s32 vb;
s32 mask;
VoiceF80 *e;
u32 m;
u32 v;
s16 n;
s16 t;
u8 flag;
u8 st;
s32 dsp;
u16 idx;
u16 h;
s32 i;
sv = D_800A4988 + 0x576;
p = D_800A4988;
i = 0;
tbl = D_80073140;
w = D_800A4988 + 0x572;
r = D_8007319E;
q = D_800731A0;
for (; i < 8; i++, p += 0x54) {
flag = 0;
p[0x4E] &= 0x7F;
if (p[0x4E] != 0) {
*(s32 *)(p + 0x4) += 1;
if (*(s32 *)p != 0) {
*(s32 *)p -= 1;
if (*(s32 *)p == 0) {
func_8002EFF8(1, tbl[*(u16 *)(p + 0xA)]);
func_800316F8((s32)p);
}
} else {
if (p[0x4E] >= 2) {
p[0x4E] -= 1;
} else {
idx = *(u16 *)(p + 0xA);
dsp = sv[idx];
switch (dsp) {
case 3:
mask = tbl[*(u16 *)(p + 0xA)];
p[0x50] = 0;
func_8002EFF8(0, mask);
/* fallthrough */
case 0:
p[0x4E] = 0;
if (*(s32 *)(p + 0x40) != 0) {
(*(void (**)(s32, s32))(p + 0x40))(p[0x51], *(s32 *)(p + 0x44));
}
*(s32 *)(p + 0x40) = 0;
break;
case 2:
if (p[0x50] != 0) {
func_8003D3B4(idx, 1);
p[0x50] = 0;
}
break;
}
}
if (p[0x4C] != 0) {
h = *(u16 *)(p + 0x4A) - 0x220;
*(u16 *)(p + 0x4A) = h;
flag = 1;
if ((s16)h <= 0) {
*(u16 *)(p + 0x4A) = 0;
p[0x4C] = 0;
p[0x50] = 1;
D_800A4C6D[i * 0x48] = 1;
func_8002EFF8(0, tbl[*(u16 *)(p + 0xA)]);
}
}
if (p[0x4F] != 0) {
flag = 1;
p[0x4F] = 0;
}
if (p[0x37] & 2) {
if (*(s32 *)(p + 0x1C) >= 0) {
*(s32 *)(p + 0x18) += *(u16 *)(p + 0x32);
if (*(s32 *)(p + 0x18) >= *(s32 *)(p + 0x1C)) {
*(s32 *)(p + 0x18) = *(s32 *)(p + 0x1C);
p[0x37] &= 0xFD;
}
} else {
*(s32 *)(p + 0x18) -= *(u16 *)(p + 0x32);
if (*(s32 *)(p + 0x18) <= *(s32 *)(p + 0x1C)) {
*(s32 *)(p + 0x18) = *(s32 *)(p + 0x1C);
p[0x37] &= 0xFD;
}
}
flag = 1;
}
if ((D_800A4F19 != 0 && p[0x53] != 0) || flag) {
n = p[0x35];
if (n != 0) {
t = n + (*(s32 *)(p + 0x18) >> 8);
n = t;
if (p[0x53] != 0) {
t = p[0x53] + t;
if (t < 0x42) {
n = 1;
} else {
t -= 0x40;
n = t;
if (t >= 0x80) {
n = 0x7F;
}
}
}
}
if (flag || n != p[0x52]) {
m = D_8006AA30[p[0x34]];
m = (m * *(s16 *)w) >> 7;
m = (m * *(s16 *)(p + 0x48)) >> 7;
if (flag) {
m = (m * ((s16)*(u16 *)(p + 0x4A) >> 7)) >> 8;
}
vb = (s32)w - 0x2D2;
e = (VoiceF80 *)(i * 0x48 + vb);
e->unk00 = tbl[*(u16 *)(p + 0xA)];
if (n != 0) {
if (w[0x1F] != 0) {
v = (m * q[0x7F - n]) >> 14;
e->unk08 = v;
v = (m * r[n]) >> 14;
e->unk0A = v;
} else {
v = (m * D_8007321E) >> 14;
e->unk0A = v;
e->unk08 = v;
}
} else {
v = m;
e->unk0A = v;
e->unk08 = v;
}
e->unk40 = *(u16 *)(p + 0xA);
if (e->unk44 != 0) {
e->unk04 |= 3;
} else {
e->unk44 = 1;
e->unk04 = 3;
}
p[0x52] = n;
}
}
func_800314DC((struct Obj *)p);
h = *(u16 *)(p + 0x12);
if (h != 0) {
h -= 1;
*(u16 *)(p + 0x12) = h;
if (h == 0) {
func_80031988((struct Ent30D80 *)p);
mask = tbl[*(u16 *)(p + 0xA)];
p[0x50] = 0;
func_8002EFF8(0, mask);
if (*(s32 *)(p + 0x40) != 0) {
(*(void (**)(s32, s32))(p + 0x40))(p[0x51], *(s32 *)(p + 0x44));
}
*(s32 *)(p + 0x40) = 0;
}
}
}
} else {
st = sv[*(u16 *)(p + 0xA)];
if (st == 0 || st == 3) {
D_800C7D2C &= ~tbl[*(u16 *)(p + 0xA)];
}
}
}
}
@@ -0,0 +1,179 @@
void func_80030F80(void)
{
u8 *p;
u8 *sv;
u8 *w;
const u16 *q;
const u16 *r;
s32 *tbl;
s32 vb;
s32 mask;
VoiceF80 *e;
u32 m;
u32 v;
s16 n;
s16 t;
u8 flag;
u8 st;
s32 dsp;
u16 idx;
u16 h;
s32 i;
sv = D_800A4988 + 0x576;
p = D_800A4988;
i = 0;
tbl = D_80073140;
w = D_800A4988 + 0x572;
r = D_8007319E;
q = D_800731A0;
for (; i < 8; i++, p += 0x54) {
flag = 0;
p[0x4E] &= 0x7F;
if (p[0x4E] != 0) {
*(s32 *)(p + 0x4) += 1;
if (*(s32 *)p != 0) {
*(s32 *)p -= 1;
if (*(s32 *)p == 0) {
func_8002EFF8(1, tbl[*(u16 *)(p + 0xA)]);
func_800316F8((s32)p);
}
} else {
if (p[0x4E] >= 2) {
p[0x4E] -= 1;
} else {
idx = *(u16 *)(p + 0xA);
dsp = sv[idx];
__asm__("" : : : "memory"); // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus9)
switch (dsp) {
case 3:
mask = tbl[*(u16 *)(p + 0xA)];
p[0x50] = 0;
func_8002EFF8(0, mask);
/* fallthrough */
case 0:
p[0x4E] = 0;
if (*(s32 *)(p + 0x40) != 0) {
(*(void (**)(s32, s32))(p + 0x40))(p[0x51], *(s32 *)(p + 0x44));
}
*(s32 *)(p + 0x40) = 0;
break;
case 2:
if (p[0x50] != 0) {
func_8003D3B4(idx, 1);
p[0x50] = 0;
}
break;
}
}
if (p[0x4C] != 0) {
h = *(u16 *)(p + 0x4A) - 0x220;
*(u16 *)(p + 0x4A) = h;
flag = 1;
if ((s16)h <= 0) {
*(u16 *)(p + 0x4A) = 0;
p[0x4C] = 0;
p[0x50] = 1;
D_800A4C6D[i * 0x48] = 1;
func_8002EFF8(0, tbl[*(u16 *)(p + 0xA)]);
}
}
if (p[0x4F] != 0) {
flag = 1;
p[0x4F] = 0;
}
if (p[0x37] & 2) {
if (*(s32 *)(p + 0x1C) >= 0) {
*(s32 *)(p + 0x18) += *(u16 *)(p + 0x32);
if (*(s32 *)(p + 0x18) >= *(s32 *)(p + 0x1C)) {
*(s32 *)(p + 0x18) = *(s32 *)(p + 0x1C);
p[0x37] &= 0xFD;
}
} else {
*(s32 *)(p + 0x18) -= *(u16 *)(p + 0x32);
if (*(s32 *)(p + 0x18) <= *(s32 *)(p + 0x1C)) {
*(s32 *)(p + 0x18) = *(s32 *)(p + 0x1C);
p[0x37] &= 0xFD;
}
}
flag = 1;
}
if ((D_800A4F19 != 0 && p[0x53] != 0) || flag) {
n = p[0x35];
if (n != 0) {
t = n + (*(s32 *)(p + 0x18) >> 8);
n = t;
if (p[0x53] != 0) {
t = p[0x53] + t;
if (t < 0x42) {
n = 1;
} else {
t -= 0x40;
n = t;
if (t >= 0x80) {
n = 0x7F;
}
}
}
}
if (flag || n != p[0x52]) {
m = D_8006AA30[p[0x34]];
m = (m * *(s16 *)w) >> 7;
m = (m * *(s16 *)(p + 0x48)) >> 7;
if (flag) {
m = (m * ((s16)*(u16 *)(p + 0x4A) >> 7)) >> 8;
}
vb = (s32)w - 0x2D2;
e = (VoiceF80 *)(i * 0x48 + vb);
e->unk00 = tbl[*(u16 *)(p + 0xA)];
if (n != 0) {
if (w[0x1F] != 0) {
v = (m * q[0x7F - n]) >> 14;
e->unk08 = v;
v = (m * r[n]) >> 14;
e->unk0A = v;
} else {
v = (m * D_8007321E) >> 14;
e->unk0A = v;
e->unk08 = v;
}
} else {
v = m;
e->unk0A = v;
e->unk08 = v;
}
e->unk40 = *(u16 *)(p + 0xA);
if (e->unk44 != 0) {
e->unk04 |= 3;
} else {
e->unk44 = 1;
e->unk04 = 3;
}
p[0x52] = n;
}
}
func_800314DC((struct Obj *)p);
h = *(u16 *)(p + 0x12);
if (h != 0) {
h -= 1;
*(u16 *)(p + 0x12) = h;
if (h == 0) {
func_80031988((struct Ent30D80 *)p);
mask = tbl[*(u16 *)(p + 0xA)];
p[0x50] = 0;
func_8002EFF8(0, mask);
if (*(s32 *)(p + 0x40) != 0) {
(*(void (**)(s32, s32))(p + 0x40))(p[0x51], *(s32 *)(p + 0x44));
}
*(s32 *)(p + 0x40) = 0;
}
}
}
} else {
st = sv[*(u16 *)(p + 0xA)];
if (st == 0 || st == 3) {
D_800C7D2C &= ~tbl[*(u16 *)(p + 0xA)];
}
}
}
}
@@ -0,0 +1,14 @@
g6b: verdict NO-MATCH start 19 best 5 compiles 329 path R6 inline mask @3755
best-scoring single candidates of the last trace (move -> score [residual class]):
R6 inline mask @3755 -> 5 [ORDER] (from 19)
R7 block @3744 -> 5 [ORDER] (from 5)
R6 inline dsp @3752 -> 5 [ORDER] (from 5)
R8 temp tmp0 @3744 -> 5 [ORDER] (from 5)
R5 swap + @3808 -> 5 [ORDER] (from 5)
R7 do-while @3744 -> 5 [ORDER] (from 5)
R8 base tmp0 @3744 -> 5 [ORDER] (from 5)
R5 swap + @3811 -> 5 [ORDER] (from 5)
R9 swap-stmts @3737 -> 5 [ORDER] (from 5)
R7 block @3742 -> 5 [ORDER] (from 5)
R7 do-while @3742 -> 5 [ORDER] (from 5)
R9 swap-stmts @3734 -> 5 [ORDER] (from 5)
@@ -0,0 +1 @@
@@ -0,0 +1 @@
=== lever-free bodies in main sharing a callee or global with func_80030F80 (0 found; top 6 by shared symbols) — read them for the SHAPE ===
@@ -0,0 +1,35 @@
src/800_b_2.c:func_80030F80: score 19 (COUNT; mine 341 ins, target 343) — not yet
replace mine[25:26] target[25:26]
25 beqz v0,4b84 <func_80030F80+0x4c0> | beqz v0,4b8c <func_80030F80+0x4c8>
replace mine[35:36] target[35:36]
35 bnez v0,4bcc <func_80030F80+0x508> | bnez v0,4bd4 <func_80030F80+0x510>
replace mine[46:47] target[46:47]
46 j 4bd0 <func_80030F80+0x50c> | j 4bd8 <func_80030F80+0x514>
replace mine[53:54] target[53:54]
53 j 4838 <func_80030F80+0x174> | j 4840 <func_80030F80+0x17c>
replace mine[60:61] target[60:61]
60 beq v1,v0,481c <func_80030F80+0x158> | beq v1,v0,4824 <func_80030F80+0x160>
replace mine[64:65] target[64:65]
64 beqz v1,47f4 <func_80030F80+0x130> | beqz v1,47fc <func_80030F80+0x138>
replace mine[66:67] target[66:67]
66 j 4838 <func_80030F80+0x174> | j 4840 <func_80030F80+0x17c>
replace mine[69:71] target[69:74]
69 bne v1,v0,4838 <func_80030F80+0x174> | bne v1,v0,4840 <func_80030F80+0x17c>
70 sll v0,a0,0x2 | move a0,zero
71 -- | lhu v0,0(s0)
72 -- | nop
73 -- | sll v0,v0,0x2
delete mine[73:74] target[76:76]
73 move a0,zero | --
replace mine[84:85] target[86:87]
84 j 4838 <func_80030F80+0x174> | j 4840 <func_80030F80+0x17c>
replace mine[137:138] target[139:140]
137 j 4908 <func_80030F80+0x244> | j 4910 <func_80030F80+0x24c>
replace mine[251:252] target[253:254]
251 j 4ad8 <func_80030F80+0x414> | j 4ae0 <func_80030F80+0x41c>
replace mine[267:268] target[269:270]
267 j 4b04 <func_80030F80+0x440> | j 4b0c <func_80030F80+0x448>
replace mine[302:303] target[304:305]
302 j 4bcc <func_80030F80+0x508> | j 4bd4 <func_80030F80+0x510>
replace mine[326:327] target[328:329]
326 bnez v0,471c <func_80030F80+0x58> | bnez v0,471c <func_80030F80+0x58>
@@ -0,0 +1 @@
NEEDED barrier memory line 3755
@@ -0,0 +1,2 @@
src/800_b_2.c
func_80030F80
@@ -0,0 +1,26 @@
s32 func_800348A8(u32 arg0) {
u16 *p;
u16 *q;
s32 i;
u32 lo;
u32 hi;
s32 five;
p = D_800A46E8;
i = 0;
five = 5;
lo = arg0 & 0xFFFF;
hi = arg0 >> 16;
q = p + 3;
do {
if (p[0] == five && q[-1] == lo) {
if (hi == 0 || q[0] == hi) {
return i + 1;
}
}
i++;
q += 0x2A;
p += 0x2A;
} while (i < 8);
return 0;
}
@@ -0,0 +1,26 @@
s32 func_800348A8(u32 arg0) {
u16 *p;
u16 *q;
s32 i;
u32 lo;
u32 hi;
s32 five;
p = D_800A46E8;
i = 0;
five = 5;
lo = arg0 & 0xFFFF;
hi = arg0 >> 16;
q = p + 3;
do {
if (p[0] == five && q[-1] == lo) {
if (hi == 0 || q[0] == hi) {
return i + 1;
}
}
i++;
q += 0x2A;
p += 0x2A;
} while (i < 8);
return 0;
}
@@ -0,0 +1,27 @@
s32 func_800348A8(u32 arg0) {
u16 *p;
u16 *q;
s32 i;
u32 lo;
u32 hi;
s32 five;
p = D_800A46E8;
i = 0;
five = 5;
lo = arg0 & 0xFFFF;
hi = arg0 >> 16;
q = p + 3;
do {
__asm__ ("" :: "r"(i), "r"(i)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus9)
if (p[0] == five && q[-1] == lo) {
if (hi == 0 || q[0] == hi) {
return i + 1;
}
}
i++;
q += 0x2A;
p += 0x2A;
} while (i < 8);
return 0;
}
@@ -0,0 +1,14 @@
g6b: verdict NO-MATCH start 9 best 9 compiles 302 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R10 param-copy arg0 @7069 -> 9 [REG] (from 9)
R7 block @7082 -> 9 [REG] (from 9)
R9 swap-stmts @7082 -> 9 [MIXED] (from 9)
R7 do-while @7082 -> 9 [REG] (from 9)
R7 block @7071 -> 9 [REG] (from 9)
R7 do-while @7071 -> 9 [REG] (from 9)
R7 block @7072 -> 9 [REG] (from 9)
R7 block @7075 -> 9 [REG] (from 9)
R7 block @7083 -> 9 [REG] (from 9)
R7 do-while @7083 -> 9 [REG] (from 9)
R7 block @7070 -> 9 [REG] (from 9)
R7 block @7073 -> 9 [REG] (from 9)
@@ -0,0 +1 @@
@@ -0,0 +1 @@
=== lever-free bodies in main sharing a callee or global with func_800348A8 (0 found; top 6 by shared symbols) — read them for the SHAPE ===
@@ -0,0 +1,16 @@
src/800_b_2.c:func_800348A8: score 9 (REG-caller; mine 29 ins, target 29) — not yet
register pairs (mine -> target, count): a1->v1 x6, v1->a1 x5
replace mine[2:3] target[2:3]
2 move a1,zero | move v1,zero
replace mine[6:7] target[6:7]
6 addiu v1,a2,6 | addiu a1,a2,6
replace mine[11:12] target[11:12]
11 lhu v0,-2(v1) | lhu v0,-2(a1)
replace mine[16:18] target[16:18]
16 addiu v0,a1,1 | addiu v0,v1,1
17 lhu v0,0(v1) | lhu v0,0(a1)
replace mine[20:24] target[20:24]
20 addiu v0,a1,1 | addiu v0,v1,1
21 addiu a1,a1,1 | addiu v1,v1,1
22 addiu v1,v1,84 | addiu a1,a1,84
23 slti v0,a1,8 | slti v0,v1,8
@@ -0,0 +1 @@
NEEDED keepalive line 7082
@@ -0,0 +1,2 @@
src/800_b_2.c
func_800348A8
@@ -0,0 +1,10 @@
void func_80035210(s32 a0, s32 a1)
{
s32 v1;
v1 = D_80076218;
func_8003C498(v1);
SpuWrite(a0, a1);
v1 = D_80076218;
D_80076218 = v1 + a1;
}
@@ -0,0 +1,10 @@
void func_80035210(s32 a0, s32 a1)
{
register s32 v1 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus9)
v1 = D_80076218;
func_8003C498(v1);
SpuWrite(a0, a1);
v1 = D_80076218;
D_80076218 = v1 + a1;
}
@@ -0,0 +1,14 @@
g6b: verdict NO-MATCH start 4 best 4 compiles 170 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R6 inline v1 @7522 -> 4 [REG] (from 4)
R10 param-copy a0 @7521 -> 4 [REG] (from 4)
R7 block @7523 -> 4 [REG] (from 4)
R6 inline v1 @7525 -> 4 [REG] (from 4)
R10 param-copy a1 @7521 -> 4 [REG] (from 4)
R7 block @7524 -> 4 [REG] (from 4)
R7 block @7522 -> 4 [REG] (from 4)
R7 block @7525 -> 4 [REG] (from 4)
R7 do-while @7525 -> 4 [REG] (from 4)
R7 block @7526 -> 4 [REG] (from 4)
R6 inline v1 @7524 -> 4 [REG] (from 4)
R10 param-copy a0 @7521 -> 4 [REG] (from 4)
@@ -0,0 +1 @@
@@ -0,0 +1 @@
=== lever-free bodies in main sharing a callee or global with func_80035210 (0 found; top 6 by shared symbols) — read them for the SHAPE ===
@@ -0,0 +1,9 @@
src/800_b_2.c:func_80035210: score 4 (REG-caller; mine 24 ins, target 24) — not yet
register pairs (mine -> target, count): v0->v1 x6
replace mine[12:14] target[12:14]
12 lui v0,0x0 | lui v1,0x0
13 lw v0,0(v0) | lw v1,0(v1)
replace mine[15:16] target[15:16]
15 addu v0,v0,s1 | addu v1,v1,s1
replace mine[17:18] target[17:18]
17 sw v0,0(at) | sw v1,0(at)
@@ -0,0 +1 @@
NEEDED pin $3 line 7525
@@ -0,0 +1,2 @@
src/800_b_2.c
func_80035210
@@ -0,0 +1,21 @@
void func_80036FB0(s32 arg0, s32 arg1) {
extern s32 D_8006AEE8;
extern s32 D_80078F10;
f64 hole;
s32 count;
s32 i;
s32 *p;
if (D_8006AEE8 > 0) {
i = 0;
count = D_8006AEE8;
p = &D_80078F10;
do {
if (*p == arg0) {
*p = arg1;
}
p++;
i++;
} while (i < count);
}
}
@@ -0,0 +1,23 @@
void func_80036FB0(s32 arg0, s32 arg1) {
extern s32 D_8006AEE8;
extern s32 D_80078F10;
f64 hole;
s32 count;
s32 i;
s32 *p;
__asm__ volatile("" :: // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus9)
"m"(hole));
if (D_8006AEE8 > 0) {
i = 0;
count = D_8006AEE8;
p = &D_80078F10;
do {
if (*p == arg0) {
*p = arg1;
}
p++;
i++;
} while (i < count);
}
}
@@ -0,0 +1,14 @@
g6b: verdict NO-MATCH start 4 best 4 compiles 213 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R7 block @1627 -> 4 [COUNT] (from 4)
R9 swap-stmts @1626 -> 4 [COUNT] (from 4)
R10 param-copy arg0 @1617 -> 4 [COUNT] (from 4)
R7 do-while @1627 -> 4 [COUNT] (from 4)
R10 param-copy arg1 @1617 -> 4 [COUNT] (from 4)
R7 block @1626 -> 4 [COUNT] (from 4)
R7 do-while @1626 -> 4 [COUNT] (from 4)
R7 block @1624 -> 4 [COUNT] (from 4)
R7 do-while @1624 -> 4 [COUNT] (from 4)
R7 block @1619 -> 4 [COUNT] (from 4)
R7 do-while @1619 -> 4 [COUNT] (from 4)
R7 block @1620 -> 4 [COUNT] (from 4)
@@ -0,0 +1 @@
@@ -0,0 +1 @@
=== lever-free bodies in main sharing a callee or global with func_80036FB0 (0 found; top 6 by shared symbols) — read them for the SHAPE ===
@@ -0,0 +1,8 @@
src/800_c.c:func_80036FB0: score 4 (COUNT; mine 20 ins, target 21) — not yet
insert mine[0:0] target[0:1]
0 -- | addiu sp,sp,-8
replace mine[3:5] target[4:5]
3 blez v0,1d88 <func_80036FB0+0x48> | blez v0,1d88 <func_80036FB0+0x48>
4 nop | --
insert mine[18:18] target[18:19]
18 -- | addiu sp,sp,8
@@ -0,0 +1 @@
NEEDED keepalive line 1618
@@ -0,0 +1,2 @@
src/800_c.c
func_80036FB0
@@ -0,0 +1,57 @@
void func_80037144(s32 idx) {
s32 i;
s32 k;
s32 t;
s32 v;
s32 one;
s32 ent;
for (i = 0; i < 5; i++) {
if (D_80076244[i].unk0D == 0) {
break;
}
}
if (i < 5) {
one = 1;
D_80076244[i].unk00 = (s32)D_800BA320;
/* scheduling barrier: the slot stores and the D_80065438 load DO disambiguate here
* (both /s and both varying -> memrefs_conflict_p:614 falls through to
* find_symbolic_term and the two symbols differ), so without this gcc hoists the
* D_80065438 load above all the slot stores and permutes the head block.
* Emits zero instructions. */
D_80076244[i].unk0C = 0;
D_80076244[i].unk0D = one;
D_80076244[i].unk04 = idx | 0x2000;
D_80076244[i].unk0E = 4;
v = D_800652F0[D_80065438[idx].f0];
D_800A469C = v;
D_80076244[i].unk08 = v;
k = 4;
if (D_800A46B0 == 0) {
if (D_800A46A0 == (D_80065438[idx].f0 | 0x4000)) {
D_80076244[i].unk04 |= 0x1000;
goto after;
}
t = D_800A46A2;
D_800A46B0 = one;
} else {
t = D_800A46A2;
}
if (t >= 0) {
func_800415A8(t);
D_800A46A2 = -1;
}
after:
if (i == 0) {
D_8007622C[0] = (s32)D_800BA320;
ent = D_800A463C[k].unk00;
D_80076228.v = (s32)D_800BA320;
D_80076240[0].unk00 = 0;
D_80076243.v = 1;
D_80076242.v = 0;
D_80076294.v = 0;
D_80076238.v = ent;
}
}
D_8007629C = 0;
}
@@ -0,0 +1,58 @@
void func_80037144(s32 idx) {
s32 i;
s32 k;
s32 t;
s32 v;
s32 one;
s32 ent;
for (i = 0; i < 5; i++) {
if (D_80076244[i].unk0D == 0) {
break;
}
}
if (i < 5) {
one = 1;
D_80076244[i].unk00 = (s32)D_800BA320;
/* scheduling barrier: the slot stores and the D_80065438 load DO disambiguate here
* (both /s and both varying -> memrefs_conflict_p:614 falls through to
* find_symbolic_term and the two symbols differ), so without this gcc hoists the
* D_80065438 load above all the slot stores and permutes the head block.
* Emits zero instructions. */
__asm__ __volatile__("" ::: "memory"); // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus9)
D_80076244[i].unk0C = 0;
D_80076244[i].unk0D = one;
D_80076244[i].unk04 = idx | 0x2000;
D_80076244[i].unk0E = 4;
v = D_800652F0[D_80065438[idx].f0];
D_800A469C = v;
D_80076244[i].unk08 = v;
k = 4;
if (D_800A46B0 == 0) {
if (D_800A46A0 == (D_80065438[idx].f0 | 0x4000)) {
D_80076244[i].unk04 |= 0x1000;
goto after;
}
t = D_800A46A2;
D_800A46B0 = one;
} else {
t = D_800A46A2;
}
if (t >= 0) {
func_800415A8(t);
D_800A46A2 = -1;
}
after:
if (i == 0) {
D_8007622C[0] = (s32)D_800BA320;
ent = D_800A463C[k].unk00;
D_80076228.v = (s32)D_800BA320;
D_80076240[0].unk00 = 0;
D_80076243.v = 1;
D_80076242.v = 0;
D_80076294.v = 0;
D_80076238.v = ent;
}
}
D_8007629C = 0;
}
@@ -0,0 +1,14 @@
g6b: verdict NO-MATCH start 16 best 2 compiles 326 path R7 do-while @1799
best-scoring single candidates of the last trace (move -> score [residual class]):
R7 do-while @1799 -> 2 [ORDER] (from 16)
R9 swap-stmts @1788 -> 2 [ORDER] (from 2)
R7 block @1788 -> 2 [ORDER] (from 2)
R10 param-copy idx @1781 -> 2 [ORDER] (from 2)
R7 block @1789 -> 2 [ORDER] (from 2)
R12 width one s32->u16 @1779 -> 2 [ORDER] (from 2)
R7 block @1795 -> 2 [ORDER] (from 2)
R12 width one s32->s16 @1779 -> 2 [ORDER] (from 2)
R9 swap-stmts @1801 -> 2 [ORDER] (from 2)
R12 width one s32->u8 @1779 -> 2 [ORDER] (from 2)
R9 swap-stmts @1808 -> 2 [ORDER] (from 2)
R7 block @1796 -> 2 [ORDER] (from 2)
@@ -0,0 +1 @@
@@ -0,0 +1 @@
=== lever-free bodies in main sharing a callee or global with func_80037144 (0 found; top 6 by shared symbols) — read them for the SHAPE ===
@@ -0,0 +1,25 @@
src/800_c.c:func_80037144: score 16 (COUNT; mine 123 ins, target 124) — not yet
register pairs (mine -> target, count): v1->v0 x1
replace mine[17:18] target[17:18]
17 beqz v0,20a0 <func_80037144+0x1cc> | beqz v0,20a4 <func_80037144+0x1d0>
insert mine[19:19] target[19:21]
19 -- | lui v0,0x0
20 -- | addiu v0,v0,0
insert mine[20:20] target[22:25]
20 -- | lui at,0x0
21 -- | addu at,at,a1
22 -- | sw v0,0(at)
replace mine[42:45] target[47:50]
42 lw v1,0(at) | lw v0,0(at)
43 lui v0,0x0 | lui at,0x0
44 addiu v0,v0,0 | sw v0,0(at)
replace mine[50:55] target[55:56]
50 lui at,0x0 | nop
51 sw v1,0(at) | --
52 lui at,0x0 | --
53 addu at,at,a1 | --
54 sw v1,8(at) | --
replace mine[73:74] target[74:75]
73 j 2040 <func_80037144+0x16c> | j 2044 <func_80037144+0x170>
replace mine[79:80] target[80:81]
79 j 2020 <func_80037144+0x14c> | j 2024 <func_80037144+0x150>
@@ -0,0 +1 @@
NEEDED barrier memory line 1795
@@ -0,0 +1,2 @@
src/800_c.c
func_80037144
@@ -0,0 +1,38 @@
void func_800384A8(s32 arg0) {
u8 *entry;
u8 *p;
u8 *q;
s32 j;
u8 *b;
s32 *m;
s32 *mb;
s32 i;
s32 one;
entry = &D_800B9CD8[arg0 * 0x1FC];
p = entry + 0x1A;
i = 0;
one = 1;
mb = (s32 *)D_80073140;
D_800A4F1D = 1;
entry[0x1FA] = 0;
for (; i < 0x10; i++) {
q = p + 9;
j = 0;
b = D_800C6E2D;
m = mb;
for (; j < 0x10; j++) {
if (*q++ != 0) {
b[1] = one;
b[0] = 0;
func_8003916C(j);
func_8002EFF8(0, *m);
}
m++;
b += 0x60;
}
p += 0x1A;
}
D_800A4F1D = 0;
*(s32 *)entry = *(s32 *)(entry + 4);
}
@@ -0,0 +1,39 @@
void func_800384A8(s16 arg0) {
s32 raw;
u8 *entry;
u8 *p;
u8 *q;
s32 j;
u8 *b;
s32 *m;
s32 *mb;
s32 i;
s32 one;
entry = &D_800B9CD8[raw * 0x1FC];
p = entry + 0x1A;
i = 0;
one = 1;
mb = (s32 *)D_80073140;
D_800A4F1D = 1;
entry[0x1FA] = 0;
for (; i < 0x10; i++) {
q = p + 9;
j = 0;
b = D_800C6E2D;
m = mb;
for (; j < 0x10; j++) {
if (*q++ != 0) {
b[1] = one;
b[0] = 0;
func_8003916C(j);
func_8002EFF8(0, *m);
}
m++;
b += 0x60;
}
p += 0x1A;
}
D_800A4F1D = 0;
*(s32 *)entry = *(s32 *)(entry + 4);
}
@@ -0,0 +1,39 @@
void func_800384A8(s16 arg0) {
register s32 raw __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus9)
u8 *entry;
u8 *p;
u8 *q;
s32 j;
u8 *b;
s32 *m;
s32 *mb;
s32 i;
s32 one;
entry = &D_800B9CD8[raw * 0x1FC];
p = entry + 0x1A;
i = 0;
one = 1;
mb = (s32 *)D_80073140;
D_800A4F1D = 1;
entry[0x1FA] = 0;
for (; i < 0x10; i++) {
q = p + 9;
j = 0;
b = D_800C6E2D;
m = mb;
for (; j < 0x10; j++) {
if (*q++ != 0) {
b[1] = one;
b[0] = 0;
func_8003916C(j);
func_8002EFF8(0, *m);
}
m++;
b += 0x60;
}
p += 0x1A;
}
D_800A4F1D = 0;
*(s32 *)entry = *(s32 *)(entry + 4);
}
@@ -0,0 +1,14 @@
g6b: verdict NO-MATCH start 2 best 2 compiles 325 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R8 temp tmp0 @2669 -> 2 [REG] (from 2)
R14 param-width arg0 s16->s32 @2632 -> 2 [REG] (from 2)
R7 block @2644 -> 2 [REG] (from 2)
R4 decl-move raw 0->1 -> 2 [REG] (from 2)
R8 base tmp0 @2669 -> 2 [REG] (from 2)
R14 param-width arg0 s16->u16 @2632 -> 2 [REG] (from 2)
R4 decl-move raw 0->2 -> 2 [REG] (from 2)
R7 block @2645 -> 2 [REG] (from 2)
R4 decl-move raw 0->3 -> 2 [REG] (from 2)
R4 decl-move raw 0->4 -> 2 [REG] (from 2)
R7 block @2646 -> 2 [REG] (from 2)
R9 swap-stmts @2648 -> 2 [REG] (from 2)
@@ -0,0 +1 @@
@@ -0,0 +1 @@
=== lever-free bodies in main sharing a callee or global with func_800384A8 (0 found; top 6 by shared symbols) — read them for the SHAPE ===
@@ -0,0 +1,5 @@
src/800_c.c:func_800384A8: score 2 (REG-caller; mine 70 ins, target 70) — not yet
register pairs (mine -> target, count): v1->a0 x2
replace mine[1:3] target[1:3]
1 sll v0,v1,0x7 | sll v0,a0,0x7
2 subu v0,v0,v1 | subu v0,v0,a0
@@ -0,0 +1 @@
NEEDED pin $4 line 2633
@@ -0,0 +1,2 @@
src/800_c.c
func_800384A8
@@ -0,0 +1,21 @@
void func_801A1E94(void)
{
s32 param_1;
s32 p;
s32 *s0;
s32 *s1;
p = param_1;
s0 = (s32 *)p;
s1 = &D_801BF01C;
func_8001C924(*(s32 *)(p + 0x20), s1);
func_80132288(&D_801F8724, &D_801AFB58, *s1);
*(s16 *)(p + 0xA) = -0x240;
*(s16 *)(p + 0xE) = 0x30;
*(s32 *)(p + 0xD4) = func_801A8528(p);
func_80178B18(p, (s32)&D_801AFCF8);
*(s32 *)(p + 0x1C) = 0x60;
*(s16 *)(p + 0x100) = 0xFF;
*(s16 *)(p + 0x84) = 0;
func_8012AD44((s32 *)p, 0xE);
}
@@ -0,0 +1,21 @@
void func_801A1E94(void)
{
register s32 param_1 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus9)
s32 p;
s32 *s0;
s32 *s1;
p = param_1;
s0 = (s32 *)p;
s1 = &D_801BF01C;
func_8001C924(*(s32 *)(p + 0x20), s1);
func_80132288(&D_801F8724, &D_801AFB58, *s1);
*(s16 *)(p + 0xA) = -0x240;
*(s16 *)(p + 0xE) = 0x30;
*(s32 *)(p + 0xD4) = func_801A8528(p);
func_80178B18(p, (s32)&D_801AFCF8);
*(s32 *)(p + 0x1C) = 0x60;
*(s16 *)(p + 0x100) = 0xFF;
*(s16 *)(p + 0x84) = 0;
func_8012AD44((s32 *)p, 0xE);
}
@@ -0,0 +1,15 @@
g6b: verdict NO-MATCH start 14 best 1 compiles 312 path R12 width p s32->u16 @1187
s8: verdict NO-MATCH start 14 best 1 compiles 246 path R12 width p s32->u16 @1187
best-scoring single candidates of the last trace (move -> score [residual class]):
R12 width p s32->u16 @1187 -> 1 [OTHER] (from 14)
R12 width p s32->u8 @1187 -> 1 [OTHER] (from 14)
R12 width param_1 s32->u16 @1186 -> 1 [OTHER] (from 14)
R12 width param_1 s32->u8 @1186 -> 1 [OTHER] (from 14)
R4 decl-move param_1 0->1 -> 1 [OTHER] (from 1)
R7 block @1191 -> 1 [OTHER] (from 1)
R8 temp tmp0 @1194 -> 1 [OTHER] (from 1)
R9 swap-stmts @1191 -> 1 [OTHER] (from 1)
R12 width param_1 s32->u16 @1186 -> 1 [OTHER] (from 1)
R18 bystander @1193->1191 -> 1 [OTHER] (from 1)
R4 decl-move param_1 0->2 -> 1 [OTHER] (from 1)
R8 base tmp0 @1194 -> 1 [OTHER] (from 1)
@@ -0,0 +1,3 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: loose-typing
// @stuck: none — MATCH (99 ins). short* for param_2/param_3: gcc emits lh where sign is live (<<1 for signed div), lhu where truncated to short (arith result / direct copy)
@@ -0,0 +1,179 @@
=== lever-free bodies in md_SC07_004 sharing a callee or global with func_801A1E94 (45 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_801A66DC (src/md_SC07_004/md_SC07_004.c:4346) shares 5: D_801BF01C D_801F8724 func_8001C924 func_80132288 func_801A8528 ---
void func_801A66DC(s32 a0) {
s32 *sp;
u8 pad[8];
switch (*(u16 *)(a0 + 0x34)) {
case 0:
sp = &D_801BF01C;
func_8001C924(*(s32 *)(a0 + 0x20), sp);
func_8012B2CC(a0);
func_801A39D0(a0);
func_80132288(&D_801F8724, D_801AFB78, *sp);
D_8019FF8A |= 1;
*(s32 *)(a0 + 0xD4) = func_801A8528(a0);
func_801A85A8(a0, 0x28080A0, 0, 0x200);
func_801A8A64(a0);
func_8017FA74();
*(u16 *)(a0 + 0x34) += 1;
break;
case 1:
func_8013240C((s32)&D_801F8724);
if (D_801F8730 & 0x4000) {
func_801A18F4(a0);
}
break;
}
}
--- func_801A3744 (src/md_SC07_004/md_SC07_004.c:2284) shares 3: D_801BF01C D_801F8724 func_80132288 ---
void func_801A3744(s32 a0) {
*(s16 *)(a0 + 0xE6) = 4;
func_80132288(&D_801F8724, D_801AFB8C, D_801BF01C);
*(s16 *)(a0 + 0x100) = -0x40;
}
--- func_801A2F34 (src/md_SC07_004/md_SC07_004.c:1919) shares 3: D_801F8724 func_8001C924 func_80132288 ---
void func_801A2F34(s32 a0) {
s16 *p;
s32 *s2;
s32 *s0;
s16 v1;
s32 v0;
v1 = *(s16 *)(a0 + 0xE6);
s2 = D_80126B58;
if (v1 == 0) {
p = &D_801F872A;
*p = (s16)D_80126CE0 >> 1;
func_8013240C((s32)p - 6);
if ((D_801F8730 & 0x4000) != 0) {
*(u16 *)(a0 + 0xE6) = *(u16 *)(a0 + 0xE6) + 1;
}
} else if (v1 != 1) {
if (*(s16 *)(a0 + 0x98) == 0 && *(s16 *)&D_80126CE0 >= D_801AFB90) {
s0 = &D_801BC9EC;
func_8001C924(*(s32 *)(a0 + 0x20), s0);
*(s32 *)(*(s32 *)(a0 + 0x20) + 0x20) = (s32)D_80063548;
*(s16 *)(a0 + 0xE6) = 0;
func_80132288(&D_801F8724, &D_801AFAB8, *s0);
}
}
if ((D_800B99DA & 1) != 0) {
if (*(s16 *)((s32)s2 + 0x188) > 0) {
*(s16 *)((s32)s2 + 0x188) = *(s16 *)((s32)s2 + 0x188) - 1;
}
}
if (*(s16 *)((s32)s2 + 0x188) == 0) {
v0 = *(u16 *)(a0 + 0xF8) + 1;
*(u16 *)(a0 + 0xF8) = v0;
if ((s16)v0 >= 0x19) {
func_8014CBD8();
func_801A3114((s32 *)a0);
}
} else {
*(u16 *)(a0 + 0xF8) = 0;
}
}
--- func_801A3798 (src/md_SC07_004/md_SC07_004.c:2330) shares 3: D_801F8724 func_8001C924 func_80132288 ---
s32 func_801A3798(s32 s0, s32 arg1) {
s32 v0;
s32 v1;
u16 y;
s32 t;
s32 p;
u16 f9;
y = arg1 + 0;
v0 = ((s32 (*)(s32, s32))func_801A395C)(s0, (s16)(*(u16 *)(s0 + 0x100) - 0x240));
v1 = *(s16 *)(s0 + 0xE6);
if (v1 >= 0) {
func_8013240C((s32)&D_801F8724);
if (D_801F8730 & 0x4000) {
t = *(u16 *)(s0 + 0xE6) - 1;
*(u16 *)(s0 + 0xE6) = t;
t <<= 16;
v1 = t >> 16;
if (v1 >= 0) {
if (v1 >= 3) {
if (v1 != 3) {
goto other;
}
func_8001C924(*(s32 *)(s0 + 0x20), &D_801BC9EC);
if (*(s32 *)(s0 + 0xD4) != 0) {
func_801A7D18(*(s32 *)(s0 + 0xD4));
*(s32 *)(s0 + 0xD4) = 0;
}
func_801A3A6C((u8 *)s0);
*(u16 *)(s0 + 0x100) = 0;
func_8012B2CC(s0);
if ((arg1 << 16) != 0) {
*(s32 *)(s0 + 0xD4) = func_801A8564(s0);
}
}
func_80132288(&D_801F8724, D_801AFB7C[*(s16 *)(s0 + 0xE6)], D_801BC9EC);
goto ret0;
}
other:
func_8001C924(*(s32 *)(s0 + 0x20), D_801B6E94);
func_8012A860((void *)s0, (int)&D_801EF9A8);
if ((y << 16) != 0) {
f9 = D_8019FF8A & 0xFFF7;
p = *(s32 *)(s0 + 0xD4);
D_8019FF8A = f9;
if (p != 0) {
func_801292C8((u8 *)p);
}
}
}
ret0:
return 0;
}
return (*(s16 *)(s0 + 0x98) == 0) && (v0 != 0);
}
--- func_801A4A18 (src/md_SC07_004/md_SC07_004.c:3163) shares 2: func_8012AD44 func_80132288 ---
void func_801A4A18(s32 a0)
{
s16 cond;
s32 mirror;
cond = *(s16 *)(a0 + 0x70);
mirror = *(s32 *)(a0 + 0xCC);
if (cond == 0) {
func_80132288(&D_801F8888, &D_801B007C, D_801B75EC);
if (mirror != 0) {
func_80132288(&D_801F8898, &D_801B00B4, (*(s32 *)D_801B80FC));
}
}
*(s16 *)(a0 + 0x84) = 0;
func_8012AD44((s32 *)a0, 2);
}
--- func_801A2364 (src/md_SC07_004/md_SC07_004.c:1416) shares 2: func_8012AD44 func_80178B18 ---
void func_801A2364(s32 a0)
{
s32 flag;
func_80178B18(a0, (s32)&D_801AFD8C);
flag = *(s32 *)(a0 + 0xD4);
*(s32 *)(a0 + 0x1C) = 0x20;
(*(u16 *)&D_801F8868) = 0;
if (flag != 0) {
((void (*)(s32 arg0))func_801A7D18)(flag);
*(s32 *)(a0 + 0xD4) = 0;
func_801A36F0((void *)a0);
}
func_8012AD44((s32 *)a0, 0xF);
func_800D0C48(1);
D_801F8720 = 0;
func_8002A088(0x320);
func_8002A2D4(0x64);
func_8002A544(0x190);
func_8002A7B4(0x12C);
}
@@ -0,0 +1,24 @@
src/md_SC07_004/md_SC07_004.c:func_801A1E94: score 14 (COUNT; mine 41 ins, target 42) — not yet
register pairs (mine -> target, count): s1->s0 x6, s0->s1 x2
replace mine[2:4] target[2:6]
2 lui s0,0x0 | move s0,a0
3 addiu s0,s0,0 | sw s1,20(sp)
4 -- | lui s1,0x0
5 -- | addiu s1,s1,0
replace mine[5:7] target[7:8]
5 sw s1,20(sp) | lw a0,32(s0)
6 lw a0,32(s1) | --
replace mine[8:9] target[9:10]
8 move a1,s0 | move a1,s1
replace mine[11:12] target[12:13]
11 lw a2,0(s0) | lw a2,0(s1)
replace mine[16:17] target[17:18]
16 move a0,s1 | move a0,s0
replace mine[18:19] target[19:20]
18 sh v0,10(s1) | sh v0,10(s0)
replace mine[21:23] target[22:24]
21 sh v0,14(s1) | sh v0,14(s0)
22 move a0,s1 | move a0,s0
replace mine[26:28] target[27:29]
26 sw v0,212(s1) | sw v0,212(s0)
27 move a0,s1 | move a0,s0
@@ -0,0 +1 @@
NEEDED pin $4 line 1187
@@ -0,0 +1,2 @@
src/md_SC07_004/md_SC07_004.c
func_801A1E94
@@ -0,0 +1,16 @@
void func_801A5C44(void) {
s32 a0;
s32 s0 = a0;
s32 s2;
s32 s1;
s32 temp;
temp = *(s16 *)(s0 + 0x100);
s2 = *(s32 *)(s0 + 0xCC);
s1 = *(s32 *)(s0 + 0xD4);
temp = func_8004787C(temp) >> 4;
*(s16 *)(s2 + 0x18) = *(u16 *)(s1 + (*(s16 *)(s0 + 0x70) * 4)) + temp;
temp = func_8004787C(*(s16 *)(s0 + 0x100) + 0x800) >> 4;
*(s16 *)(s2 + 0x1A) = *(u16 *)(s1 + (*(s16 *)(s0 + 0x70) * 4) + 2) + temp;
*(u16 *)(s0 + 0x100) += 0x40;
}
@@ -0,0 +1,16 @@
void func_801A5C44(void) {
register s32 a0 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus9)
s32 s0 = a0;
s32 s2;
s32 s1;
s32 temp;
temp = *(s16 *)(s0 + 0x100);
s2 = *(s32 *)(s0 + 0xCC);
s1 = *(s32 *)(s0 + 0xD4);
temp = func_8004787C(temp) >> 4;
*(s16 *)(s2 + 0x18) = *(u16 *)(s1 + (*(s16 *)(s0 + 0x70) * 4)) + temp;
temp = func_8004787C(*(s16 *)(s0 + 0x100) + 0x800) >> 4;
*(s16 *)(s2 + 0x1A) = *(u16 *)(s1 + (*(s16 *)(s0 + 0x70) * 4) + 2) + temp;
*(u16 *)(s0 + 0x100) += 0x40;
}
@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 15 best 1 compiles 184 path R12 width s0 s32->u16 @3902
best-scoring single candidates of the last trace (move -> score [residual class]):
R12 width s0 s32->u16 @3902 -> 1 [OTHER] (from 15)
R5 swap + @3911 -> 1 [OTHER] (from 1)
R7 block @3907 -> 1 [OTHER] (from 1)
R8 temp tmp0 @3907 -> 1 [OTHER] (from 1)
R9 swap-stmts @3907 -> 1 [OTHER] (from 1)
R12 width a0 s32->u16 @3901 -> 1 [OTHER] (from 1)
R5 swap + @3913 -> 1 [OTHER] (from 1)
R6 inline temp @3910 -> 1 [OTHER] (from 1)
R8 base tmp0 @3907 -> 1 [OTHER] (from 1)
R12 width a0 s32->s16 @3901 -> 1 [OTHER] (from 1)
R18 bystander @3907->3910 -> 1 [OTHER] (from 1)
R6 inline temp @3912 -> 1 [OTHER] (from 1)
@@ -0,0 +1,3 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: loose-typing
// @stuck: none — MATCH (99 ins). short* for param_2/param_3: gcc emits lh where sign is live (<<1 for signed div), lhu where truncated to short (arith result / direct copy)
@@ -0,0 +1,171 @@
=== lever-free bodies in md_SC07_004 sharing a callee or global with func_801A5C44 (7 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_801A4060 (src/md_SC07_004/md_SC07_004.c:2703) shares 1: func_8004787C ---
void func_801A4060(s32 a0) {
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x18) = (func_8004787C(*(s16 *)(a0 + 0xFE)) >> 3) + 0x1000;
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = (func_8004787C(*(s16 *)(a0 + 0xFE) + 0x800) >> 3) + 0x1000;
*(u16 *)(a0 + 0xFE) += 0x80;
}
--- func_801A36A8 (src/md_SC07_004/md_SC07_004.c:2241) shares 1: func_8004787C ---
void func_801A36A8(s32 a0) {
s16 v;
v = *(u16 *)((s32)a0 + 0x108) + 0x30;
*(u16 *)((s32)a0 + 0x108) = v;
*(s16 *)((s32)a0 + 0x52) = func_8004787C(v) >> 8;
}
--- func_801AE060 (src/md_SC07_004/md_SC07_004.c:9832) shares 1: func_8004787C ---
void func_801AE060(s32 a0) {
s32 s0 = a0;
s32 t;
s32 *p = &D_800B9AA8;
*p = *p - 0x300;
t = *(u16 *)(s0 + 0xFE);
t += 0x18;
*(u16 *)(s0 + 0xFE) = t;
D_800B9AA4 = func_8004787C((s16)t) + 0x2700;
D_800B9AA6 = func_8004787C(*(s16 *)(s0 + 0xFE) + 0x400) + 0x2700;
D_800B9AB8 -= 1;
D_800B9ABA += 1;
switch (*(u16 *)(s0 + 0x34)) {
case 0:
*(u16 *)(s0 + 0x34) = *(u16 *)(s0 + 0x34) + 1;
break;
case 1:
func_801ACD4C();
break;
}
}
--- func_801A7B08 (src/md_SC07_004/md_SC07_004.c:5187) shares 1: func_8004787C ---
void func_801A7B08(s32 arg0) {
s32 s0;
u8 *p;
s0 = arg0;
func_801A8440(s0);
switch (*(s16 *)((s32)s0 + 0x2C)) {
case 0: {
s16 t = *(s16 *)(*(s32 *)((s32)s0 + 0x20) + 0x18);
if (t >= 0x401) {
*(s16 *)(*(s32 *)((s32)s0 + 0x20) + 0x18) = t - 0xA0;
*(u16 *)(*(s32 *)((s32)s0 + 0x20) + 0x1A) = *(u16 *)(*(s32 *)((s32)s0 + 0x20) + 0x18);
}
p = &D_801F88BA;
if (*p < 0xF0) {
*p += 0xC;
}
if ((*(s16 *)(*(s32 *)((s32)s0 + 0x20) + 0x18) < 0x401) &&
(*p >= 0xF0)) {
*(u16 *)((s32)s0 + 0x2A) = 0;
*(u16 *)((s32)s0 + 0x2C) += 1;
}
break;
}
case 1:
*(u16 *)((s32)s0 + 0x2A) += 0x40;
*(s16 *)(*(s32 *)((s32)s0 + 0x20) + 0x18) =
(func_8004787C(*(s16 *)((s32)s0 + 0x2A)) >> 5) + 0x400;
*(s16 *)(*(s32 *)((s32)s0 + 0x20) + 0x1A) =
(func_8004787C(*(s16 *)((s32)s0 + 0x2A) + 0x800) >> 5) + 0x400;
break;
}
}
--- func_801A8990 (src/md_SC07_004/md_SC07_004.c:5858) shares 1: func_8004787C ---
void func_801A8990(void *a0)
{
extern void func_80049CAC(s32 a0, s32 a1);
extern void func_8004914C(void *a0);
extern void func_800491AC(void *a0);
extern s32 func_8004787C(s32 a0);
extern void RotTransSV(s32 a0, s32 a1, void *a2);
SV_801A8990 vec; /* sp+0x10 */
MTX_801A8990 mtx; /* sp+0x18 */
MTX_801A8990 *mp;
s32 flag[3]; /* sp+0x38 */
s32 v1;
s32 prod;
mp = &mtx;
func_80049CAC(*(s32 *)((s32)a0 + 0x20) + 0x10, (s32)mp);
mtx.t[0] = *(s16 *)((s32)a0 + 0x104);
mtx.t[1] = *(s16 *)((s32)a0 + 0x106);
mtx.t[2] = *(s16 *)((s32)a0 + 0x108);
func_8004914C(mp);
func_800491AC(mp);
vec.vy = 0;
vec.vx = 0;
prod = func_8004787C(*(s16 *)((s32)a0 + 0x100));
v1 = *(s16 *)((s32)a0 + 0xFE);
vec.vz = v1 + ((v1 * prod) >> 15);
RotTransSV((s32)&vec, (s32)&vec, &flag[0]);
*(s16 *)((s32)a0 + 0x6) = vec.vx;
*(s16 *)((s32)a0 + 0xA) = vec.vy;
*(s16 *)((s32)a0 + 0xE) = vec.vz;
}
--- func_801AAF8C (src/md_SC07_004/md_SC07_004.c:7564) shares 1: func_8004787C ---
s32 func_801AAF8C(SV_801AAF8C *src, SV_801AAF8C *ofs, s32 arg2)
{
MTX_801AAF8C mtx; /* sp+0x18 */
SV_801AAF8C rot; /* sp+0x38 */
SV_801AAF8C pos; /* sp+0x40 */
SV_801AAF8C sv; /* sp+0x48 */
s32 flag; /* sp+0x50 */
s32 dx, dy, dz;
s32 ang;
s32 s;
s32 t;
pos = *src;
if (ofs != 0) {
pos.vx += ofs->vx;
pos.vy += ofs->vy;
pos.vz += ofs->vz;
}
dz = D_80126B66 - pos.vz;
dx = D_80126B5E - pos.vx;
t = pos.vy + 0x20;
dy = D_80126B62 - t;
ang = (ratan2(-dz, dx) - 0x400) & 0xFFF;
rot.vy = ang;
s = func_80047948(ang);
dz = (dz * s + dx * func_8004787C(rot.vy)) >> 12;
rot.vx = ratan2(dy, -dz);
rot.vz = 0;
func_80049CAC((s32)&rot, (s32)&mtx);
func_8004914C(&mtx);
mtx.t[0] = pos.vx;
mtx.t[1] = pos.vy;
mtx.t[2] = pos.vz;
func_800491AC(&mtx);
sv.vy = 0;
sv.vx = 0;
sv.vz = -arg2;
RotTransSV((s32)&sv, (s32)&sv, &flag);
if (func_80135888((s32)D_80126B78, (s32)D_80126B90, (s32)&pos, (s32)&sv) != 0) {
func_8012F568(1, 1, 0, 0xA, (s32)&sv, (s32)D_801152A8);
return 1;
}
return 0;
}
@@ -0,0 +1,26 @@
src/md_SC07_004/md_SC07_004.c:func_801A5C44: score 15 (COUNT; mine 40 ins, target 41) — not yet
register pairs (mine -> target, count): s2->s0 x5, s0->s1 x2, s1->s2 x2
insert mine[1:1] target[1:3]
1 -- | sw s0,16(sp)
2 -- | move s0,a0
replace mine[4:8] target[6:9]
4 sw s0,16(sp) | lh a0,256(s0)
5 lh a0,256(s2) | lw s2,204(s0)
6 lw s1,204(s2) | lw s1,212(s0)
7 lw s0,212(s2) | --
replace mine[10:11] target[11:12]
10 lh v1,112(s2) | lh v1,112(s0)
replace mine[13:14] target[14:15]
13 addu v1,v1,s0 | addu v1,v1,s1
replace mine[17:19] target[18:20]
17 sh v1,24(s1) | sh v1,24(s2)
18 lh a0,256(s2) | lh a0,256(s0)
replace mine[21:22] target[22:23]
21 lh v1,112(s2) | lh v1,112(s0)
replace mine[24:25] target[25:26]
24 addu v1,v1,s0 | addu v1,v1,s1
replace mine[28:30] target[29:31]
28 sh v1,26(s1) | sh v1,26(s2)
29 lhu v0,256(s2) | lhu v0,256(s0)
replace mine[32:33] target[33:34]
32 sh v0,256(s2) | sh v0,256(s0)
@@ -0,0 +1 @@
NEEDED pin $4 line 3901
@@ -0,0 +1,2 @@
src/md_SC07_004/md_SC07_004.c
func_801A5C44
@@ -0,0 +1,27 @@
void func_801AB818(void *a0) {
u8 *s1 = *(u8 **)((s32)a0 + 0x24);
if (*(s32 *)((s32)a0 + 0x1C) != 0) {
U16x2N tmp;
s32 cur;
s32 addend;
*(s32 *)((s32)a0 + 0x1C) -= 1;
func_801A8440((s32)a0);
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18) -= 0x370;
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x1A) = *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18);
cur = *(s32 *)(s1 + 0);
addend = *(s32 *)((s32)a0 + 0x30);
*(s32 *)&tmp = cur;
/* §22-ADDENDUM: a plain memory clobber, not `volatile`. It defeats
* flow.c's last_mem_set dead-store rule so the FIRST store to the
* temp survives, without pinning either store's schedule. Without
* it the target's `sw $v0,0x10($sp)` at idx 24 is deleted. */
*(s32 *)&tmp = cur + addend;
*(U16x2N *)(s1 + 0) = tmp;
} else {
func_801292C8((u8 *)a0);
}
}
@@ -0,0 +1,28 @@
void func_801AB818(void *a0) {
u8 *s1 = *(u8 **)((s32)a0 + 0x24);
if (*(s32 *)((s32)a0 + 0x1C) != 0) {
U16x2N tmp;
s32 cur;
s32 addend;
*(s32 *)((s32)a0 + 0x1C) -= 1;
func_801A8440((s32)a0);
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18) -= 0x370;
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x1A) = *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18);
cur = *(s32 *)(s1 + 0);
addend = *(s32 *)((s32)a0 + 0x30);
*(s32 *)&tmp = cur;
/* §22-ADDENDUM: a plain memory clobber, not `volatile`. It defeats
* flow.c's last_mem_set dead-store rule so the FIRST store to the
* temp survives, without pinning either store's schedule. Without
* it the target's `sw $v0,0x10($sp)` at idx 24 is deleted. */
__asm__("" ::: "memory"); // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus9)
*(s32 *)&tmp = cur + addend;
*(U16x2N *)(s1 + 0) = tmp;
} else {
func_801292C8((u8 *)a0);
}
}
@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 1 best 1 compiles 191 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R7 block @7975 -> 1 [OTHER] (from 1)
R8 temp tmp0 @7975 -> 1 [OTHER] (from 1)
R10 param-copy a0 @7962 -> 1 [OTHER] (from 1)
R8 base tmp0 @7975 -> 1 [OTHER] (from 1)
R7 block @7974 -> 1 [OTHER] (from 1)
R8 temp tmp0 @7974 -> 1 [OTHER] (from 1)
R7 do-while @7974 -> 1 [OTHER] (from 1)
R8 base tmp0 @7974 -> 1 [OTHER] (from 1)
R18 bystander @7969->7971 -> 1 [OTHER] (from 1)
R7 block @7976 -> 1 [OTHER] (from 1)
R8 base-shared tmp0 @7974 -> 1 [OTHER] (from 1)
R7 do-while @7976 -> 1 [OTHER] (from 1)
@@ -0,0 +1,3 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: loose-typing
// @stuck: none — MATCH (99 ins). short* for param_2/param_3: gcc emits lh where sign is live (<<1 for signed div), lhu where truncated to short (arith result / direct copy)
@@ -0,0 +1,148 @@
=== lever-free bodies in md_SC07_004 sharing a callee or global with func_801AB818 (14 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_801AC234 (src/md_SC07_004/md_SC07_004.c:8407) shares 1: func_801292C8 ---
void func_801AC234(void *a0)
{
extern void func_801292C8(u8 *a0);
extern void func_8012931C(struct vec *a0);
func_8012931C((struct vec *)a0);
if (func_80128ED8(*(s32 *)((char *)a0 + 0x20), (s32 *)((char *)a0 + 0x24)) != 0 ||
(*(s16 *)((char *)a0 + 0x2C) != 2 && *(s16 *)((char *)a0 + 0xA) >= -0x200)) {
func_801292C8((u8 *)a0);
}
}
--- func_801A72DC (src/md_SC07_004/md_SC07_004.c:4857) shares 1: func_801292C8 ---
void func_801A72DC(void *a0)
{
extern void func_801292C8(u8 *a0);
extern void func_8012931C(struct vec *a0);
s32 v0;
v0 = *(u16 *)((s32)a0 + 0x2C) + 1;
*(u16 *)((s32)a0 + 0x2C) = v0;
if ((s16)v0 >= 4) {
func_801292C8((u8 *)a0);
return;
}
func_8012931C((struct vec *)a0);
*(s32 *)(*(s32 *)((s32)a0 + 0x20) + 0x20) =
(s32)D_801F8744 + (*(s16 *)((s32)a0 + 0x2C) << 6);
}
--- func_801AC940 (src/md_SC07_004/md_SC07_004.c:8702) shares 1: func_801292C8 ---
void func_801AC940(s32 arg0)
{
extern void func_801292C8(u8 *a0);
extern void func_8012931C(struct vec *a0);
s32 a1 = arg0;
s32 v0;
s16 v1;
v0 = *(s32 *)(a1 + 0x1C);
if (v0 == 0) {
func_801292C8((u8 *)a1);
return;
}
v0 = v0 - 1;
*(s32 *)(a1 + 0x1C) = v0;
if ((v0 & 3) == 0 && *(s16 *)(a1 + 0x2C) < 3) {
v1 = *(s16 *)(a1 + 0x2C);
v1 = v1 + 1;
*(s16 *)(a1 + 0x2C) = v1;
*(s32 *)(*(s32 *)(a1 + 0x20) + 0x20) = (s32)&D_801F88B8 + (v1 << 6);
}
func_8012931C((struct vec *)a1);
}
--- func_801AE520 (src/md_SC07_004/md_SC07_004.c:10070) shares 1: func_801292C8 ---
void func_801AE520(void *a0) {
u8 *s1 = D_801F8D98 + ((*(u16 *)((s32)a0 + 0x2E) & 3) << 6);
if (*(s32 *)((s32)a0 + 0x1C) != 0) {
U16x2L tmp;
*(s32 *)((s32)a0 + 0x1C) -= 1;
func_801AD55C(a0);
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18) += 0x700;
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x1A) = *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18);
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x14) += 0x60;
*(s32 *)&tmp = *(s32 *)(s1 + 0);
*(s32 *)&tmp -= D_801B07FC[0];
*(U16x2L *)(s1 + 0) = tmp;
*(s32 *)&tmp = *(s32 *)(s1 + 4);
*(s32 *)&tmp -= D_801B0800[0];
*(U16x2L *)(s1 + 4) = tmp;
} else {
func_801292C8((u8 *)a0);
}
}
--- func_801ACA88 (src/md_SC07_004/md_SC07_004.c:8764) shares 1: func_801292C8 ---
void func_801ACA88(void *a0)
{
extern void func_801292C8(u8 *a0);
extern void func_8012931C(struct vec *a0);
extern void func_8017E5D4(void *a0);
extern void func_8017E1E8(void *a0, void *a1, void *a2);
s16 buf[4];
s32 v0;
v0 = *(s32 *)((s32)a0 + 0x1C);
if (v0 == 0) {
if (*(void **)((s32)a0 + 0x2C) != NULL) {
func_8017E5D4(*(void **)((s32)a0 + 0x2C));
}
func_801292C8((u8 *)a0);
} else {
*(s32 *)((s32)a0 + 0x1C) = v0 - 1;
func_8012931C((struct vec *)a0);
buf[0] = *(u16 *)((s32)a0 + 0x6);
buf[1] = *(u16 *)((s32)a0 + 0xA);
buf[2] = *(u16 *)((s32)a0 + 0xE);
if (*(void **)((s32)a0 + 0x2C) != NULL) {
func_8017E1E8(*(void **)((s32)a0 + 0x2C), &buf[0], NULL);
}
}
}
--- func_801AF1EC (src/md_SC07_004/md_SC07_004.c:10596) shares 1: func_801292C8 ---
void func_801AF1EC(void *a0) {
if (*(u16 *)((s32)a0 + 0x2) == 0) {
func_801AF2EC(a0);
return;
}
if (*(s32 *)((s32)a0 + 0x1C) != 0) {
*(s32 *)((s32)a0 + 0x1C) -= 1;
func_8012931C((struct vec *)a0);
if (*(s16 *)((s32)a0 + 0x32) == 0) {
u16 t = *(u16 *)((s32)a0 + 0xA) + 0x1000;
if (t >= 0x1001) {
func_801292C8((u8 *)a0);
return;
}
}
} else {
func_801292C8((u8 *)a0);
return;
}
*(s32 *)((s32)a0 + 0x14) += *(s32 *)((s32)a0 + 0x34);
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x14) += *(u16 *)((s32)a0 + 0x30);
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x8) = *(u16 *)((s32)a0 + 0x6);
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0xA) = *(u16 *)((s32)a0 + 0xA);
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0xC) = *(u16 *)((s32)a0 + 0xE);
func_801AF368((void *)*(s32 *)((s32)a0 + 0x20));
}
@@ -0,0 +1,3 @@
src/md_SC07_004/md_SC07_004.c:func_801AB818: score 1 (OTHER; mine 42 ins, target 42) — not yet
replace mine[24:25] target[24:25]
24 nop | sw v0,16(sp)
@@ -0,0 +1 @@
NEEDED barrier memory line 8002
@@ -0,0 +1,2 @@
src/md_SC07_004/md_SC07_004.c
func_801AB818
@@ -0,0 +1,23 @@
void func_80183B9C(u8 *arg0) {
extern int func_80178970(void);
extern void func_80178D18(void);
extern void func_8017F644(void);
extern s32 D_801270C8;
extern s32 D_801EF9F8;
extern void func_8002D4C8(s32 a0, s32 a1);
extern void func_801836A8(void*);
D_801270C8 = 1;
if (*(u16 *)(arg0 + 0x34) == 0) {
if (((s32 (*)(u8 *))func_80178970)(arg0) != 0) {
((void (*)(s32))func_80178D18)((s32)arg0);
if (D_801EF9F8 != 0) {
func_8017F644();
}
*(u16 *)(arg0 + 0x34) = 1;
}
} else {
func_8002D4C8(0x13, 0);
((s32 (*)(u8 *))func_801836A8)(arg0);
}
}
@@ -0,0 +1,23 @@
void func_80183B9C(u8 *arg0) {
extern int func_80178970(void);
extern void func_80178D18(void);
extern void func_8017F644(void);
extern s32 D_801270C8;
extern s32 D_801EF9F8;
extern void func_8002D4C8(s32 a0, s32 a1);
extern void func_801836A8(void*);
D_801270C8 = 1;
if (*(u16 *)(arg0 + 0x34) == 0) {
if (func_80178970() != 0) {
((void (*)(s32))func_80178D18)((s32)arg0);
if (D_801EF9F8 != 0) {
func_8017F644();
}
*(u16 *)(arg0 + 0x34) = 1;
}
} else {
func_8002D4C8(0x13, 0);
((s32 (*)(u8 *))func_801836A8)(arg0);
}
}
@@ -0,0 +1,24 @@
void func_80183B9C(u8 *arg0) {
extern int func_80178970(void);
extern void func_80178D18(void);
extern void func_8017F644(void);
extern s32 D_801270C8;
extern s32 D_801EF9F8;
extern void func_8002D4C8(s32 a0, s32 a1);
extern void func_801836A8(void*);
D_801270C8 = 1;
if (*(u16 *)(arg0 + 0x34) == 0) {
if (func_80178970() != 0) {
((void (*)(s32))func_80178D18)((s32)arg0);
if (D_801EF9F8 != 0) {
func_8017F644();
}
*(u16 *)(arg0 + 0x34) = 1;
}
} else {
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus8)
func_8002D4C8(0x13, 0);
((s32 (*)(u8 *))func_801836A8)(arg0);
}
}
@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 4 best 4 compiles 50 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R7 block @6515 -> 4 [COUNT] (from 4)
R9 swap-stmts @6518 -> 4 [ORDER] (from 4)
R7 do-while @6515 -> 4 [COUNT] (from 4)
R7 block @6508 -> 4 [COUNT] (from 4)
R7 block @6513 -> 4 [COUNT] (from 4)
R7 do-while @6513 -> 4 [COUNT] (from 4)
R7 block @6518 -> 4 [COUNT] (from 4)
R7 do-while @6518 -> 4 [COUNT] (from 4)
R7 block @6511 -> 4 [COUNT] (from 4)
R7 do-while @6511 -> 4 [COUNT] (from 4)
R7 block @6519 -> 4 [COUNT] (from 4)
R7 do-while @6519 -> 4 [COUNT] (from 4)
@@ -0,0 +1,15 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: straight-derive
// @stuck: none — MATCH (52 ins) on iteration 1, confirmed by rtu_match.
// @class: structural (STRENGTH/mflo!=lw -> MATCH)
// @stuck: none - MATCH (41 ins), match_one + rtu_match.
// @class: regalloc (WIDTH/li!=addu -> MATCH)
// @stuck: none — MATCH (58 ins), match_one + rtu_match. PIN-FREE (no register __asm__).
// @class: plumbing
// @stuck: none — MATCH (52 ins), iteration 1. Keys: (1) §3-T4 — Ghidra inverted the arms; the
@@ -0,0 +1,76 @@
=== lever-free bodies in ov_SC02_017 sharing a callee or global with func_80183B9C (53 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80181250 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:4694) shares 2: func_80178970 func_80178D18 ---
void func_80181250(void *arg0) {
if (func_80178970() == 1) {
((void (*)(void *))func_80178D18)(arg0);
*(s16 *)((s32)arg0 + 2) = 3;
}
}
--- func_8017D058 (src/shared/ov/func_8017D058__2a8e3f10.h:3) shares 2: func_80178970 func_80178D18 ---
void func_8017D058(s32 a0) {
extern int func_80178970(void);
extern void func_80178D18(void);
s32 rand_val = rand();
func_8017C294(a0, rand_val & 0xF);
if (((s32 (*)(s32))func_80178970)(a0) == 0) {
return;
}
((void (*)(s32))func_80178D18)(a0);
*(s16 *)(a0 + 0x2) = 1;
}
--- func_80183940 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:6369) shares 2: D_801EF9F8 func_8002D4C8 ---
void func_80183940(s32 a0) {
extern s32 D_8018EE50;
extern s32 D_801EF9F8;
extern void func_80178CBC(s32 a0, s32 a1);
extern void func_8002D4C8(s32 a0, s32 a1);
*(s16 *)(a0 + 0x2) = 3;
*(s16 *)(a0 + 0x34) = 0;
func_80178CBC(a0, (s32)&D_8018EE50);
D_801EF9F8 = 0;
func_8002D4C8(0x12, 0);
}
--- func_801833FC (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:6126) shares 2: func_80178970 func_80178D18 ---
void func_801833FC(s32 arg0) {
s32 var_s1;
var_s1 = func_80029504();
((s32 (*)(s32 *, s32, s32))func_8018347C)((s32 *)arg0, 0x190, 0);
if (((s32 (*)(s32))func_80178970)(arg0) == 0) {
return;
}
((void (*)(s32))func_80178D18)(arg0);
if (var_s1 < 0x10E) {
func_80029514(0x10E);
}
*(u16 *)((s32)arg0 + 0x2) -= 1;
}
--- func_8017CFAC (src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:4026) shares 2: func_80178970 func_80178D18 ---
void func_8017CFAC(s32 a0) {
extern void func_8002955C(void);
extern s32 func_8002953C(void);
extern void func_8002AC00(s32 arg0);
u8 *p = *(u8 **)(a0 + 0xDC);
if (func_80178970() != 0) {
((void (*)(s32))func_80178D18)(a0);
func_800291A0(*p + 0x3A, 1);
func_8002955C();
if ((u32)func_8002953C() >= 0x23U) {
func_8002AC00(0x25);
}
*(u16 *)(a0 + 2) += 1;
}
}
--- func_80186100 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:8269) shares 1: func_8002D4C8 ---
void func_80186100(void) {
func_8002D4C8(0x6AA, 0);
}
@@ -0,0 +1,9 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:func_80183B9C: score 4 (COUNT; mine 36 ins, target 37) — not yet
replace mine[10:11] target[10:11]
10 li a0,19 | nop
replace mine[13:14] target[13:14]
13 beqz v0,5ce4 <func_80183B9C+0x7c> | beqz v0,5ce8 <func_80183B9C+0x80>
replace mine[25:26] target[25:26]
25 j 5ce4 <func_80183B9C+0x7c> | j 5ce8 <func_80183B9C+0x80>
insert mine[27:27] target[27:28]
27 -- | li a0,19
@@ -0,0 +1 @@
NEEDED barrier line 6715
@@ -0,0 +1,2 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
func_80183B9C
@@ -0,0 +1,26 @@
void func_80184754(void *a0)
{
s32 s0 = (s32)a0;
s32 s1;
s1 = *(s32 *)(s0 + 0x64);
if (*(s16 *)(s0 + 0xFC) != *(s16 *)(s1 + 0x36)) {
((void (*)(void))func_8012C218)();
return;
}
if (*(s32 *)(s1 + 0x1C) == 0) {
func_80132288(&D_801EFA68, &D_801CC38C, D_801CCE84);
} else {
*(s32 *)(s0 + 0x4) = *(s32 *)(s1 + 0x4);
*(s32 *)(s0 + 0x8) = *(s32 *)(s1 + 0x8);
*(s32 *)(s0 + 0xC) = *(s32 *)(s1 + 0xC);
*(SV4x_80184754 *)(*(s32 *)(s0 + 0x20) + 0x10) = *(SV4x_80184754 *)(*(s32 *)(s1 + 0x20) + 0x10);
*(SV4x_80184754 *)(*(s32 *)(s0 + 0x20) + 0x18) = *(SV4x_80184754 *)(*(s32 *)(s1 + 0x20) + 0x18);
*(u16 *)(*(s32 *)(s0 + 0x20) + 0x2C) = *(u16 *)(*(s32 *)(s1 + 0x20) + 0x2C);
*(s32 *)(*(s32 *)(s0 + 0x20) + 0x4) = *(s32 *)(*(s32 *)(s1 + 0x20) + 0x4);
func_8013240C((s32)&D_801EFA68);
}
}
@@ -0,0 +1,27 @@
void func_80184754(void *a0)
{
s32 s0 = (s32)a0;
s32 s1;
__asm__ __volatile__("" : "=r"(s0) : "0"(s0)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus8)
s1 = *(s32 *)(s0 + 0x64);
if (*(s16 *)(s0 + 0xFC) != *(s16 *)(s1 + 0x36)) {
((void (*)(void))func_8012C218)();
return;
}
if (*(s32 *)(s1 + 0x1C) == 0) {
func_80132288(&D_801EFA68, &D_801CC38C, D_801CCE84);
} else {
*(s32 *)(s0 + 0x4) = *(s32 *)(s1 + 0x4);
*(s32 *)(s0 + 0x8) = *(s32 *)(s1 + 0x8);
*(s32 *)(s0 + 0xC) = *(s32 *)(s1 + 0xC);
*(SV4x_80184754 *)(*(s32 *)(s0 + 0x20) + 0x10) = *(SV4x_80184754 *)(*(s32 *)(s1 + 0x20) + 0x10);
*(SV4x_80184754 *)(*(s32 *)(s0 + 0x20) + 0x18) = *(SV4x_80184754 *)(*(s32 *)(s1 + 0x20) + 0x18);
*(u16 *)(*(s32 *)(s0 + 0x20) + 0x2C) = *(u16 *)(*(s32 *)(s1 + 0x20) + 0x2C);
*(s32 *)(*(s32 *)(s0 + 0x20) + 0x4) = *(s32 *)(*(s32 *)(s1 + 0x20) + 0x4);
func_8013240C((s32)&D_801EFA68);
}
}
@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 22 best 8 compiles 184 path R7 do-while @7124
best-scoring single candidates of the last trace (move -> score [residual class]):
R7 do-while @7124 -> 8 [COUNT] (from 22)
R7 block @7122 -> 8 [COUNT] (from 8)
R8 base-shared tmp0 @7122 -> 8 [COUNT] (from 8)
R7 block @7123 -> 8 [COUNT] (from 8)
R7 do-while @7123 -> 8 [COUNT] (from 8)
R7 block @7125 -> 8 [COUNT] (from 8)
R7 do-while @7125 -> 8 [COUNT] (from 8)
R7 block @7112 -> 8 [COUNT] (from 8)
R8 temp tmp0 @7121 -> 8 [COUNT] (from 8)
R7 do-while @7112 -> 8 [COUNT] (from 8)
R8 base tmp0 @7121 -> 8 [COUNT] (from 8)
R7 block @7121 -> 8 [COUNT] (from 8)
@@ -0,0 +1,15 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: straight-derive
// @stuck: none — MATCH (52 ins) on iteration 1, confirmed by rtu_match.
// @class: structural (STRENGTH/mflo!=lw -> MATCH)
// @stuck: none - MATCH (41 ins), match_one + rtu_match.
// @class: regalloc (WIDTH/li!=addu -> MATCH)
// @stuck: none — MATCH (58 ins), match_one + rtu_match. PIN-FREE (no register __asm__).
// @class: plumbing
// @stuck: none — MATCH (52 ins), iteration 1. Keys: (1) §3-T4 — Ghidra inverted the arms; the
@@ -0,0 +1,61 @@
=== lever-free bodies in ov_SC02_017 sharing a callee or global with func_80184754 (34 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_801846B8 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:7037) shares 4: D_801CC38C D_801CCE84 D_801EFA68 func_80132288 ---
void func_801846B8(void *arg0)
{
s32 s1 = (s32)arg0;
s32 *p;
s32 v0;
do { v0 = ((s32 (*)(void))func_8012C1B8)(); } while (0);
*(s32 *)(s1 + 0x20) = v0;
if (v0 == 0) {
((void (*)(s32))func_8012CAE4)(s1);
} else {
p = &D_801CCE84;
((void (*)(s32, s32))func_8001C214)(v0, (s32)p);
*(u16 *)(s1 + 0xFC) = *(u16 *)(*(s32 *)(s1 + 0x64) + 0x36);
*(u16 *)(s1 + 0x2) = 1;
((void (*)(s32, void *))func_8012A828)(s1, aD8018A800);
((void (*)(s32 *, s32 *, s32))func_80132288)(&D_801EFA68, &D_801CC38C, *p);
}
}
--- func_8017D038 (src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:4045) shares 1: func_8012C218 ---
void func_8017D038(void) {
((void (*)(void))func_8012C218)();
}
--- func_80188F20 (src/ov_SC02_017/ov_SC02_017_jr_80186C64.c:4908) shares 1: func_8012C218 ---
s32 func_80188F20(void * arg0)
{
*(short *)((char *)arg0 + 0x2) = 2;
((void (*)(s32 *))func_8012C218)(*(s32 **)((char *)arg0 + 0xcc));
}
--- func_801439C0 (src/shared/ov/func_801439C0.h:5) shares 1: func_8012C218 ---
void func_801439C0(u8 *a0) {
if (a0 != 0) {
func_80016714(*(void **)(a0 + 0xCC), 0x38);
func_8012C218(a0);
}
}
--- func_80180590 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:4128) shares 1: func_8012C218 ---
void func_80180590(void *arg0) {
if (*(s32 *)((s32)arg0 + 0xCC) != 0) {
func_8012C218(*(void **)((s32)arg0 + 0xCC));
}
func_8012C218(arg0);
}
--- func_80142778 (src/shared/ov/func_80142778.h:4) shares 1: func_8012C218 ---
void func_80142778(u8 *a1) {
u8 *a0 = *(u8 **)(a1 + 0x20);
*(u16 *)(a0 + 0x18) = *(u16 *)(a0 + 0x18) - 0x800;
*(u16 *)(a0 + 0x1A) = *(u16 *)(a0 + 0x1A) - 0x800;
*(u16 *)(a1 + 0xA) = *(u16 *)(a1 + 0xA) + 0x10;
if (*(s16 *)(a0 + 0x18) <= 0) {
func_8012C218(a1);
}
}
@@ -0,0 +1,36 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:func_80184754: score 22 (COUNT; mine 72 ins, target 73) — not yet
register pairs (mine -> target, count): t0->t1 x10, t1->t0 x7, a0->t0 x2
insert mine[1:1] target[1:2]
1 -- | move t0,a0
replace mine[2:5] target[3:6]
2 lw t0,100(a0) | lw t1,100(t0)
3 lh v1,252(a0) | lh v1,252(t0)
4 lh v0,54(t0) | lh v0,54(t1)
replace mine[7:8] target[8:9]
7 move t1,a0 | nop
replace mine[10:11] target[11:12]
10 j 6930 <func_80184754+0x110> | j 6934 <func_80184754+0x114>
replace mine[12:13] target[13:14]
12 lw v0,28(t0) | lw v0,28(t1)
replace mine[24:25] target[25:26]
24 j 6930 <func_80184754+0x110> | j 6934 <func_80184754+0x114>
replace mine[26:30] target[27:31]
26 lw v0,4(t0) | lw v0,4(t1)
27 lw v1,32(t1) | lw v1,32(t0)
28 sw v0,4(t1) | sw v0,4(t0)
29 lw v0,8(t0) | lw v0,8(t1)
replace mine[31:33] target[32:34]
31 sw v0,8(t1) | sw v0,8(t0)
32 lw v0,12(t0) | lw v0,12(t1)
replace mine[34:36] target[35:37]
34 sw v0,12(t1) | sw v0,12(t0)
35 lw v0,32(t0) | lw v0,32(t1)
replace mine[45:47] target[46:48]
45 lw v1,32(t1) | lw v1,32(t0)
46 lw v0,32(t0) | lw v0,32(t1)
replace mine[56:58] target[57:59]
56 lw v0,32(t0) | lw v0,32(t1)
57 lw v1,32(t1) | lw v1,32(t0)
replace mine[61:63] target[62:64]
61 lw v0,32(t0) | lw v0,32(t1)
62 lw v1,32(t1) | lw v1,32(t0)
@@ -0,0 +1 @@
NEEDED launder line 7305
@@ -0,0 +1,2 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
func_80184754
@@ -0,0 +1,109 @@
void func_80186770(s32 param_1)
{
struct { s32 vx, vy, vz, pad; } vec;
s32 v;
s32 d;
s32 b178arg;
void *target;
switch (*(u16 *)(param_1 + 0x34)) {
case 0:
v = func_8012B8E4(param_1, 4);
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) += v;
if (*(s32 *)(param_1 + 0x1C) == 0xF) {
func_80142414(param_1, -0x78);
func_8002D4C8(0x6A9, 0);
}
if (func_8012BEE8(param_1) != 0) {
*(s16 *)(param_1 + 0x2) = 3;
if ((*(u16 *)(param_1 + 0x86) & 2) != 0) {
*(s16 *)(param_1 + 0x34) = 1;
*(s32 *)(param_1 + 0x1C) = 0x28;
if ((*(u16 *)(param_1 + 0x70) & 0x200) != 0) {
func_8012A828(param_1, &D_801E1AFC);
} else {
func_8012A828(param_1, &D_801E11DC);
}
*(u16 *)(param_1 + 0xFE) = 0;
} else {
*(s16 *)(param_1 + 0x34) = 0;
func_8012A828(param_1, &D_801E1264);
*(s32 *)(param_1 + 0x1C) = 0x19;
*(u16 *)(param_1 + 0x86) |= 2;
}
}
break;
case 1:
v = func_8012B8E4(param_1, 6);
b178arg = D_801D619C;
{
u16 *pp;
s32 nv;
pp = (u16 *)(*(s32 *)(param_1 + 0x20) + 0x12);
nv = *pp + v;
*pp = nv;
}
func_8012B178(param_1, b178arg);
d = ((s32 (*)(s32))func_8012CBA4)(param_1);
if ((d & 0x1000) != 0) {
func_80131E00(param_1, 0x12);
} else if (d != 0x2000) {
func_8012ADE4((u8 *)param_1);
}
func_80185F88(param_1);
v = *(u16 *)(param_1 + 0xFE) - 1;
*(u16 *)(param_1 + 0xFE) = v;
if ((v << 16) <= 0) {
func_80143B6C(param_1, 0);
*(u16 *)(param_1 + 0xFE) = 8;
}
if ((*(u16 *)(param_1 + 0x70) & 0x200) != 0) {
func_80186C38(param_1, 0x11);
}
target = (void *)(param_1 + 0x88);
vec.vx = *(s16 *)(param_1 + 6) - *(s16 *)(param_1 + 0x88);
vec.vy = 0;
vec.vz = *(s16 *)(param_1 + 0xE) - *(s16 *)(param_1 + 0x8C);
Square0(&vec.vx, &vec.vx);
if (vec.vx + vec.vz > 0x8FFFF || (d = func_8012BCCC(param_1), d > 0x24000)) {
*(s16 *)(param_1 + 0x2) = 1;
*(s16 *)(param_1 + 0x34) = 0;
*(u16 *)(param_1 + 0x5C) = 0xAA10;
*(s32 *)(param_1 + 0x1C) = (rand() & 0x1F) + 0x28;
vec.vx = *(s16 *)(param_1 + 6) - *(s16 *)(param_1 + 0x88);
vec.vy = 0;
vec.vz = *(s16 *)(param_1 + 0xE) - *(s16 *)(param_1 + 0x8C);
Square0(&vec.vx, &vec.vx);
if (vec.vx + vec.vz > 0x8FFFF) {
*(u16 *)(param_1 + 0xFC) = func_8012B744((void *)(param_1 + 4), target);
} else {
s32 t = rand() & 0x3FF;
s32 off = t - 0x200;
if (off < 0) {
off = t - 0x500;
} else {
off = t + 0x100;
}
*(u16 *)(param_1 + 0xFC) =
(*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) + off) & 0xFFF;
}
func_8012A828(param_1, &D_801E1134);
}
if ((*(u16 *)(param_1 + 0x70) & 0x100) == 0) {
if (func_8012BD3C(param_1, 0x400, 0x1000) != 0) {
if ((*(u16 *)(param_1 + 0x70) & 0xF00) == 0) {
((void (*)(s32))func_80186B08)(param_1);
} else {
func_80186B34(param_1);
}
}
} else {
if (func_8012BD3C(param_1, 0x400, 0x40000) != 0) {
func_80186B7C(param_1);
}
}
break;
}
}
@@ -0,0 +1,109 @@
void func_80186770(s32 param_1)
{
struct { s32 vx, vy, vz, pad; } vec;
s32 v;
s32 d;
s32 b178arg;
void *target;
switch (*(u16 *)(param_1 + 0x34)) {
case 0:
v = func_8012B8E4(param_1, 4);
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) += v;
if (*(s32 *)(param_1 + 0x1C) == 0xF) {
func_80142414(param_1, -0x78);
func_8002D4C8(0x6A9, 0);
}
if (func_8012BEE8(param_1) != 0) {
*(s16 *)(param_1 + 0x2) = 3;
if ((*(u16 *)(param_1 + 0x86) & 2) != 0) {
*(s16 *)(param_1 + 0x34) = 1;
*(s32 *)(param_1 + 0x1C) = 0x28;
if ((*(u16 *)(param_1 + 0x70) & 0x200) != 0) {
func_8012A828(param_1, &D_801E1AFC);
} else {
func_8012A828(param_1, &D_801E11DC);
}
*(u16 *)(param_1 + 0xFE) = 0;
} else {
*(s16 *)(param_1 + 0x34) = 0;
func_8012A828(param_1, &D_801E1264);
*(s32 *)(param_1 + 0x1C) = 0x19;
*(u16 *)(param_1 + 0x86) |= 2;
}
}
break;
case 1:
v = func_8012B8E4(param_1, 6);
b178arg = D_801D619C;
{
u16 *pp;
register s32 nv __asm__("$6"); // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B tus8)
pp = (u16 *)(*(s32 *)(param_1 + 0x20) + 0x12);
nv = *pp + v;
*pp = nv;
}
func_8012B178(param_1, b178arg);
d = ((s32 (*)(s32))func_8012CBA4)(param_1);
if ((d & 0x1000) != 0) {
func_80131E00(param_1, 0x12);
} else if (d != 0x2000) {
func_8012ADE4((u8 *)param_1);
}
func_80185F88(param_1);
v = *(u16 *)(param_1 + 0xFE) - 1;
*(u16 *)(param_1 + 0xFE) = v;
if ((v << 16) <= 0) {
func_80143B6C(param_1, 0);
*(u16 *)(param_1 + 0xFE) = 8;
}
if ((*(u16 *)(param_1 + 0x70) & 0x200) != 0) {
func_80186C38(param_1, 0x11);
}
target = (void *)(param_1 + 0x88);
vec.vx = *(s16 *)(param_1 + 6) - *(s16 *)(param_1 + 0x88);
vec.vy = 0;
vec.vz = *(s16 *)(param_1 + 0xE) - *(s16 *)(param_1 + 0x8C);
Square0(&vec.vx, &vec.vx);
if (vec.vx + vec.vz > 0x8FFFF || (d = func_8012BCCC(param_1), d > 0x24000)) {
*(s16 *)(param_1 + 0x2) = 1;
*(s16 *)(param_1 + 0x34) = 0;
*(u16 *)(param_1 + 0x5C) = 0xAA10;
*(s32 *)(param_1 + 0x1C) = (rand() & 0x1F) + 0x28;
vec.vx = *(s16 *)(param_1 + 6) - *(s16 *)(param_1 + 0x88);
vec.vy = 0;
vec.vz = *(s16 *)(param_1 + 0xE) - *(s16 *)(param_1 + 0x8C);
Square0(&vec.vx, &vec.vx);
if (vec.vx + vec.vz > 0x8FFFF) {
*(u16 *)(param_1 + 0xFC) = func_8012B744((void *)(param_1 + 4), target);
} else {
s32 t = rand() & 0x3FF;
s32 off = t - 0x200;
if (off < 0) {
off = t - 0x500;
} else {
off = t + 0x100;
}
*(u16 *)(param_1 + 0xFC) =
(*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) + off) & 0xFFF;
}
func_8012A828(param_1, &D_801E1134);
}
if ((*(u16 *)(param_1 + 0x70) & 0x100) == 0) {
if (func_8012BD3C(param_1, 0x400, 0x1000) != 0) {
if ((*(u16 *)(param_1 + 0x70) & 0xF00) == 0) {
((void (*)(s32))func_80186B08)(param_1);
} else {
func_80186B34(param_1);
}
}
} else {
if (func_8012BD3C(param_1, 0x400, 0x40000) != 0) {
func_80186B7C(param_1);
}
}
break;
}
}
@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 4 best 4 compiles 188 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R5 swap + @8656 -> 4 [REG] (from 4)
R10 param-copy param_1 @8620 -> 4 [REG] (from 4)
R7 block @8650 -> 4 [REG] (from 4)
R8 base tmp0 @8644 -> 4 [REG] (from 4)
R9 swap-stmts @8643 -> 4 [REG] (from 4)
R6 inline nv @8656 -> 4 [REG] (from 4)
R8 temp tmp0 @8655 -> 4 [REG] (from 4)
R7 block @8649 -> 4 [REG] (from 4)
R6 inline v @8623 -> 4 [REG] (from 4)
R8 base tmp0 @8655 -> 4 [REG] (from 4)
R8 hoist tmp0 @8656 -> 4 [REG] (from 4)
R7 block @8644 -> 4 [REG] (from 4)
@@ -0,0 +1,15 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: straight-derive
// @stuck: none — MATCH (52 ins) on iteration 1, confirmed by rtu_match.
// @class: structural (STRENGTH/mflo!=lw -> MATCH)
// @stuck: none - MATCH (41 ins), match_one + rtu_match.
// @class: regalloc (WIDTH/li!=addu -> MATCH)
// @stuck: none — MATCH (58 ins), match_one + rtu_match. PIN-FREE (no register __asm__).
// @class: plumbing
// @stuck: none — MATCH (52 ins), iteration 1. Keys: (1) §3-T4 — Ghidra inverted the arms; the
@@ -0,0 +1,291 @@
=== lever-free bodies in ov_SC02_017 sharing a callee or global with func_80186770 (159 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80186C64 (src/ov_SC02_017/ov_SC02_017_jr_80186C64.c:3238) shares 10: func_8012A828 func_8012ADE4 func_8012B178 func_8012B8E4 func_8012BD3C func_8012BEE8 func_8012CBA4 func_80131E00 func_80143B6C func_80185F88 ---
void func_80186C64(s32 a0) {
switch (*(u16 *)(a0 + 0x34)) {
case 0:
if (*(s32 *)(a0 + 0x1C) == 7) {
func_8012D5E4(a0, (s32)&D_801D61B0, (s32)(&D_801D61B0 + 8), 0xB);
}
break;
case 1:
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += func_8012B8E4(a0, 6);
break;
case 2:
if (*(s32 *)(a0 + 0x1C) == 0xA) {
func_8012D5E4(a0, (s32)&D_801D61B0, (s32)(&D_801D61B0 + 8), 0xB);
}
break;
case 3: {
s32 flag;
s32 v;
s16 t;
if (*(s32 *)(a0 + 0x1C) == *(s32 *)(a0 + 0x1C) / 10 * 10) {
D_801EFA78 += 0x10000;
}
func_8012B178(a0, D_801EFA78);
v = ((s32 (*)(s32))func_8012CBA4)(a0);
if (v & 0x1000) {
((void (*)(s32, s32))func_80131E00)(a0, 0x12);
flag = 0;
} else if (v == 0x2000) {
flag = 1;
} else {
((void (*)(s32))func_8012ADE4)(a0);
flag = 1;
}
((void (*)(s32))func_80185F88)(a0);
func_8012D5E4(a0, (s32)&D_801D61B0, (s32)(&D_801D61B0 + 8), 0x11);
t = *(u16 *)(a0 + 0xFE) - 1;
*(u16 *)(a0 + 0xFE) = t;
if (t <= 0) {
func_80143B6C(a0, 0);
*(s16 *)(a0 + 0xFE) = -(D_801EFA78 / 0x10000);
}
if (flag == 1) {
*(s16 *)(a0 + 2) = 2;
*(u16 *)(a0 + 0x34) = 0;
func_8012A828(a0, (void *)&D_801E0FEC);
}
break;
}
case 5:
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += func_8012B8E4(a0, 6);
if (*(s32 *)(a0 + 0x1C) == 0xC) {
func_80187178(a0);
}
break;
}
if (func_8012BEE8(a0)) {
switch (*(u16 *)(a0 + 0x34)) {
case 0:
if (func_8012BD3C(a0, 0x400, 0x4000)) {
*(u16 *)(a0 + 0x34) += 1;
func_8012A828(a0, (void *)&D_801E0F44);
*(s32 *)(a0 + 0x1C) = 0xA;
} else {
*(s16 *)(a0 + 2) = 2;
*(u16 *)(a0 + 0x34) = 0;
func_8012A828(a0, (void *)&D_801E0FEC);
}
break;
case 1:
*(u16 *)(a0 + 0x34) = 2;
*(s32 *)(a0 + 0x1C) = 0x18;
func_8012A828(a0, (void *)&D_801E13FC);
break;
case 2:
case 4:
*(s16 *)(a0 + 2) = 2;
*(u16 *)(a0 + 0x34) = 0;
func_8012A828(a0, (void *)&D_801E0FEC);
break;
case 3:
*(s32 *)(a0 + 0x1C) = 0xA;
*(u16 *)(a0 + 0x34) += 1;
break;
case 5: {
s16 t;
t = *(u16 *)(a0 + 0x100) - 1;
*(u16 *)(a0 + 0x100) = t;
if (t == 0) {
*(s16 *)(a0 + 2) = 8;
func_8012A828(a0, (void *)&D_801E1A04);
} else {
*(s32 *)(a0 + 0x1C) = 0x1E;
}
break;
}
}
}
}
--- func_801863B8 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:8411) shares 7: func_8012ADE4 func_8012B178 func_8012BD3C func_8012BEE8 func_8012CBA4 func_80131E00 func_80185F88 ---
void func_801863B8(s32 a0) {
struct { s32 vx, vy, vz, pad; } vec;
s32 v0;
if (*(s32 *)(a0 + 0x1C) > 7) {
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) +=
func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12),
*(s16 *)(a0 + 0xFC), 8);
}
vec.vx = *(s16 *)(a0 + 0x6) - *(s16 *)(a0 + 0x88);
vec.vy = 0;
vec.vz = *(s16 *)(a0 + 0xE) - *(s16 *)(a0 + 0x8C);
Square0(&vec.vx, &vec.vx);
if (vec.vx + vec.vz <= 0x8FFFF && func_8012BD3C(a0, 0x300, 0x24000) != 0) {
func_801866C8(a0);
} else {
func_8012B178(a0, D_801D6198);
v0 = ((s32 (*)(s32))func_8012CBA4)(a0);
if ((v0 & 0x1000) != 0) {
func_80131E00(a0, 0x12);
} else if (v0 != 0x2000) {
func_8012ADE4((u8 *)a0);
}
func_80185F88(a0);
if (func_8012BEE8(a0) != 0) {
((void (*)(s32))func_80186500)(a0);
}
}
}
--- func_80187044 (src/ov_SC02_017/ov_SC02_017_jr_80186C64.c:3386) shares 6: D_801E11DC D_801E1264 D_801E1AFC func_8012A828 func_8012BEE8 func_80143B6C ---
void func_80187044(s32 a0) {
s32 v0;
func_8012AD80(a0);
if (*(u16 *)(a0 + 0x70) & 0x2000) {
v0 = *(u16 *)(a0 + 0xFE) - 1;
*(u16 *)(a0 + 0xFE) = v0;
if ((s16)v0 <= 0) {
func_80143B6C(a0, 0);
*(u16 *)(a0 + 0xFE) = 8;
}
if (*(u16 *)(a0 + 0x70) & 0x200) {
func_8012D5E4(a0, (s32)&D_801D61B0, (s32)&D_801D61B0 + 8, 0x11);
}
}
if (func_8012BEE8(a0)) {
*(u16 *)(a0 + 0x86) |= 2;
*(s16 *)(a0 + 0x2) = 3;
if (*(u16 *)(a0 + 0x86) & 2) {
*(s16 *)(a0 + 0x34) = 1;
*(s32 *)(a0 + 0x1C) = 0x28;
if (*(u16 *)(a0 + 0x70) & 0x200) {
func_8012A828(a0, &D_801E1AFC);
} else {
func_8012A828(a0, &D_801E11DC);
}
*(u16 *)(a0 + 0xFE) = 0;
} else {
*(s16 *)(a0 + 0x34) = 0;
func_8012A828(a0, &D_801E1264);
*(s32 *)(a0 + 0x1C) = 0x19;
*(u16 *)(a0 + 0x86) |= 2;
}
}
}
--- func_80187298 (src/ov_SC02_017/ov_SC02_017_jr_80186C64.c:3489) shares 6: D_801E11DC D_801E1264 D_801E1AFC func_8012A828 func_8012BEE8 func_80143B6C ---
void func_80187298(s32 a0) {
D_87298 d;
s32 t;
s32 v1;
s32 p;
u16 sc;
switch (*(u16 *)(a0 + 0x34)) {
case 0:
d.x = (u16)D_80126B5E;
d.z = (u16)D_80126B66;
d.vx = *(s16 *)(a0 + 6) - (s32)(s16)D_80126B5E;
d.vy = 0;
d.vz = *(s16 *)(a0 + 0xE) - (s32)(s16)D_80126B66;
Square0(&d.vx, &d.vx);
if (0x10000 < d.vx + d.vz) return;
if (func_8012E778(a0, 0xA000C8) != 0) return;
*(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;
func_8012B23C(a0);
*(s32 *)(*(s32 *)(a0 + 0x20) + 4) = *(s32 *)(*(s32 *)(a0 + 0x20) + 4) & 0x7FFFFFFF;
func_80143970(a0);
return;
case 1:
if ((((s32 (*)(s32))func_8012CBCC)(a0) & 0x2000) == 0) return;
func_80143B6C(a0, 1);
*(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x2C) = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x2C) | 0x10;
*(s32 *)(a0 + 0x1C) = 0x10;
/* fall through */
case 2:
t = func_8004787C((*(u32 *)(a0 + 0x1C) << 7) & 0x780);
sc = ((t << 9) >> 12) + 0x1000;
p = *(s32 *)(a0 + 0x20);
*(s16 *)(p + 0x1C) = sc;
*(s16 *)(p + 0x18) = sc;
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = 0x1000 - ((t << 10) >> 12);
if (func_8012BEE8(a0) != 0) {
*(u16 *)(a0 + 2) = 3;
if (*(u16 *)(a0 + 0x86) & 2) {
*(u16 *)(a0 + 0x34) = 1;
*(s32 *)(a0 + 0x1C) = 0x28;
if (*(u16 *)(a0 + 0x70) & 0x200) {
func_8012A828(a0, &D_801E1AFC);
} else {
func_8012A828(a0, &D_801E11DC);
}
*(u16 *)(a0 + 0xFE) = 0;
} else {
*(u16 *)(a0 + 0x34) = 0;
func_8012A828(a0, &D_801E1264);
*(s32 *)(a0 + 0x1C) = 0x19;
*(u16 *)(a0 + 0x86) |= 2;
}
v1 = *(s32 *)(a0 + 0x20);
*(u16 *)(v1 + 0x2C) &= 0xFFEF;
}
break;
default:
return;
}
}
--- func_80184E38 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:7386) shares 5: func_8012B178 func_8012B8E4 func_8012BCCC func_8012BD3C func_8012BEE8 ---
void func_80184E38(s32 a0) {
s32 s0 = a0;
if (func_8012BD3C(s0, 0x400, 0x10000) == 1) {
if (func_8012BCCC(s0) < 0x3001) {
*(s16 *)(s0 + 2) = 8;
return;
}
*(u16 *)(*(s32 *)(s0 + 0x20) + 0x12) =
func_8012B8E4(s0, (s16)(rand() % 11 + 10)) + *(u16 *)(*(s32 *)(s0 + 0x20) + 0x12);
func_8012B178(s0, 0xFFFE0000);
if (func_80185D10(s0) == 0) {
return;
}
} else {
if (func_80185D10(s0) == 0) {
*(s16 *)(s0 + 2) = 0xA;
*(s32 *)(s0 + 0xDC) |= 0x40;
return;
}
}
if (func_8012BEE8(s0) != 0) {
func_80185C68(s0);
}
}
--- func_80184C58 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:7320) shares 4: func_8012A828 func_8012B8E4 func_8012BCCC func_8012BEE8 ---
void func_80184C58(s32 a0) {
s32 v;
if (*(u16 *)(a0 + 0x34) == 0) {
if (func_8012BCCC(a0) <= 0x10000) {
func_8001C924(*(s32 *)(a0 + 0x20), (void *)&D_801D29A8);
func_8012A828(a0, (void *)&(*(u8 *)D_801D5AD4));
*(s32 *)(a0 + 0x1C) = 0x1E;
*(u16 *)(a0 + 0x34) += 1;
}
} else {
v = func_8012B8E4(a0, 0xA);
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += v;
if (func_8012BEE8(a0) != 0 || v == 0) {
*(s16 *)(a0 + 0x2) = 5;
}
}
}
@@ -0,0 +1,10 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:func_80186770: score 4 (REG-caller; mine 230 ins, target 230) — not yet
register pairs (mine -> target, count): v1->a2 x4, a2->v1 x3
replace mine[72:73] target[72:73]
72 lw a2,32(s0) | lw v1,32(s0)
replace mine[74:75] target[74:75]
74 lhu v1,18(a2) | lhu a2,18(v1)
replace mine[77:78] target[77:78]
77 addu v1,v1,v0 | addu a2,a2,v0
replace mine[79:80] target[79:80]
79 sh v1,18(a2) | sh a2,18(v1)
@@ -0,0 +1,3 @@
REMOVED pin $3 line 8849
NEEDED pin $6 line 8850
REMOVED pin $2 line 8890
@@ -0,0 +1,2 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
func_80186770

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