mirror of
https://github.com/Druthulu/BFM-decomp
synced 2026-09-27 05:56:00 -04:00
feat(decomp): main lane m08 — 19 banked
One clean whole-EXE rebuild verified the batch (gate_main), and main re-checked BYTE-IDENTICAL against config/check.us.sha before anything was credited. AverageZ4 SYS_OBJ_1D84 SetSZfifo4 SetVertexTri VM_NOWON_OBJ_3D4 func_80011DCC func_8001282C func_80018450 func_80018E9C func_8001BDA0 func_8002109C func_800234E4 func_800249F0 func_80026128 func_8002D29C func_80047E58 func_800594CC func_800596F4 func_8005ACF0
This commit is contained in:
Drew T
@@ -178,7 +178,27 @@ INCLUDE_ASM("asm/nonmatchings/800", func_80012558);
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INCLUDE_ASM("asm/nonmatchings/800", func_800126C4);
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INCLUDE_ASM("asm/nonmatchings/800", func_8001282C);
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extern void func_800128B4(void* a0);
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extern void func_80013FE0(void* a0, void* a1);
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extern void func_80013FBC(void* a0, void* a1);
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extern void func_80013F98(void* a0, void* a1);
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extern void func_80013ED0(void* a0, void* a1, void* a2, void* a3);
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void func_8001282C(void *a0)
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{
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s16 b10[4];
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s16 b18[4];
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s16 b20[4];
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func_80013FE0(a0, b20);
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func_800128B4(b20);
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func_80013FBC(a0, b18);
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func_800128B4(b18);
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func_80013F98(a0, b10);
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func_800128B4(b10);
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func_80013ED0(a0, b10, b18, b20);
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}
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extern void func_80014070(void* a0, void* a1);
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@@ -3819,7 +3839,45 @@ INCLUDE_ASM("asm/nonmatchings/800", func_80018384);
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INCLUDE_ASM("asm/nonmatchings/800", func_800183E0);
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INCLUDE_ASM("asm/nonmatchings/800", func_80018450);
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s32 func_80018450(void *a0, s32 a1)
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{
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typedef struct {
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s16 flag;
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s16 pad02;
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s32 id;
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u16 x;
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u16 y;
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u8 c;
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u8 d;
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u16 pad0E;
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} Rec;
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typedef struct {
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u8 pad[0xA1A8];
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Rec rec[0x20];
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} Base;
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extern u8 D_800AF630[];
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Base *b = (Base *)D_800AF630;
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s32 i;
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s32 ret;
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ret = 0;
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i = 0;
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do {
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if (b->rec[i].flag != 0) {
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i++;
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} else {
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b->rec[i].flag = 1;
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b->rec[i].id = a1;
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b->rec[i].d = 0;
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b->rec[i].x = *(u16 *)((u8 *)a0 + 0x28);
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b->rec[i].y = *(u16 *)((u8 *)a0 + 0x2A);
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b->rec[i].c = *(u8 *)((u8 *)a0 + 0x27);
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ret = 1;
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break;
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}
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} while (i < 0x20);
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return ret;
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}
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typedef struct {
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@@ -4287,7 +4345,29 @@ void func_80018CE8(u8 *p) {
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INCLUDE_ASM("asm/nonmatchings/800", func_80018E78);
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INCLUDE_ASM("asm/nonmatchings/800", func_80018E9C);
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extern u8 D_80078D98;
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extern u8 D_80078DCA;
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extern s32 func_800291B4(s32);
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extern void func_800291A0(s32, s32);
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extern void func_80028D78(s32);
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void func_80018E9C(s32 a0)
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{
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s32 s0;
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if (a0 == (s32)&D_80078D98) {
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if (*(u16 *)&D_80078DCA & 0x100) {
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s0 = func_800291B4(0xE2) + 1;
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if ((u32)(s0 & 0xFF) >= 0x5A) {
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s0 = 0;
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func_80028D78(1);
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}
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func_800291A0(0xE2, s0 & 0xFF);
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} else {
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func_800291A0(0xE2, 0);
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}
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}
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}
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void func_80018F20(s32 param_1) {
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u32 uVar3;
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@@ -6137,7 +6217,33 @@ INCLUDE_ASM("asm/nonmatchings/800", func_8001BC6C);
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INCLUDE_ASM("asm/nonmatchings/800", SsGetMute);
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INCLUDE_ASM("asm/nonmatchings/800", func_8001BDA0);
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extern void func_8002CCD8(void);
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extern void func_800596F4(s32);
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extern void DrawSyncCallback(s32);
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extern void func_80059234(s32);
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extern void func_80059658(s32);
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extern int VSync(int mode);
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extern void func_8005D118(void);
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extern void StopRCnt(void);
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extern void func_80043300(void);
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extern void ResetCallback(void);
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extern void StopCallback(void);
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void func_8001BDA0(void) {
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func_8002CCD8();
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func_800596F4(0);
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DrawSyncCallback(0);
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func_80059234(0);
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func_80059658(0);
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VSync(0);
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func_800596F4(0);
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func_80059234(3);
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func_8005D118();
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StopRCnt();
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func_80043300();
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ResetCallback();
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StopCallback();
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}
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extern s32 D_800747EC;
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void func_8001BE20(void) {
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@@ -7777,7 +7883,21 @@ void func_80021050(void) {
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func_80028620(2, s0 + 0x20);
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}
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INCLUDE_ASM("asm/nonmatchings/800", func_8002109C);
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extern void func_800491FC(s32 a0, s32 a1, s32 a2);
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void func_8002109C(s32 a0, s16 **a1)
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{
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s16 *v1 = *a1;
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if (v1[3] == -2) {
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func_800491FC(v1[0], v1[1], v1[2]);
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return;
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}
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if (a0 == v1[3]) {
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func_800491FC(v1[0], v1[1], v1[2]);
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*a1 += 4;
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}
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}
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extern s16 D_800AE7E0;
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@@ -7946,7 +8066,25 @@ void func_800233CC(Poly12Obj *a0, u16 a1) {
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}
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}
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INCLUDE_ASM("asm/nonmatchings/800", func_800234E4);
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extern s32 func_8004787C(s32 a0);
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extern s32 func_80047948(s32 a0);
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void func_800234E4(void *a0, u16 a1, u16 a2) {
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s32 k = 0;
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s32 rad = a1;
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/* Struct-free spelling of the func_800233CC sibling: the only dependencies
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* are common.h types and the two callee externs, so the body survives any
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* splice model (whole-snippet or function-only extraction). Addresses are
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* written as a0 + k*4 + 0x10/0x12 so LSR keeps the incoming pointer as the
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* IV base (addu s1,a0,zero) and folds the member offset into the sh
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* displacements, exactly as the struct form did. */
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while (k < 12) {
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*(u16 *)((u8 *)a0 + k * 4 + 0x10) = (func_8004787C(a2 + k * 0x155) * rad) >> 12;
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*(u16 *)((u8 *)a0 + k * 4 + 0x12) = (func_80047948(a2 + k * 0x155) * rad) >> 12;
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k++;
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}
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}
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typedef struct { u32 addr : 24; u32 len : 8; } PTag_80023570;
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@@ -8063,7 +8201,145 @@ INCLUDE_ASM("asm/nonmatchings/800", func_800243EC);
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INCLUDE_ASM("asm/nonmatchings/800", func_80024448);
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INCLUDE_ASM("asm/nonmatchings/800", func_800249F0);
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extern s32 D_800A2B78;
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/* func_800249F0 — HANDWRITTEN assembly (splat marks it "Handwritten function").
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* Loop-carried state lives in $t1/$t2/$t5/$t6/$t8/$t9 with hand-placed latency
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* nops -- not reachable from gcc-2.7.2 codegen -- so the body is reproduced
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* verbatim as one .set noreorder asm block (same idiom as func_80027200 above);
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* gcc supplies only jr $ra + delay nop.
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*
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* Semantics: TMD F3 mesh emitter. Per face: RTPT 3 verts -> GTE flag cull ->
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* NCLIP cull -> store SXY0..2 -> AVSZ3 depth -> NCCS colour from normal p[0]
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* -> OT insert (tag code 0x04) -> if D_800A2B78 != 0 and the rgb word just
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* written has bit 1 set, append a 2-word semi-transparency primitive
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* (0xE100000A | ((D_800A2B78 & 3) << 5)) into the OT (tag code 0x01).
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* Returns the advanced packet pointer. */
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long *func_800249F0(char *f, s32 verts, s32 norms, long *prim, s32 count,
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s32 shift, s32 ot)
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{
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__asm__ __volatile__(
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".set\tnoreorder\n"
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"addiu $sp, $sp, -8\n"
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"lw $t5, 24($sp)\n"
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"lw $t9, 28($sp)\n"
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"lw $t8, 32($sp)\n"
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"beq $t5, $zero, 3f\n"
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"addu $t6, $a0, $zero\n"
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"addiu $t7, $sp, 4\n"
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"lui $t3, 0xFF\n"
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"ori $t3, $t3, 0xFFFF\n"
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"addiu $t2, $a0, 8\n"
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"addiu $t1, $a3, 4\n"
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"1:\n"
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"lhu $a0, 2($t2)\n"
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"lhu $v1, 4($t2)\n"
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"lhu $v0, 6($t2)\n"
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"sll $a0, $a0, 3\n"
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"addu $a0, $a1, $a0\n"
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"sll $v1, $v1, 3\n"
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"addu $v1, $a1, $v1\n"
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"sll $v0, $v0, 3\n"
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"addu $v0, $a1, $v0\n"
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"lwc2 $0, 0($a0)\n"
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"lwc2 $1, 4($a0)\n"
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"lwc2 $2, 0($v1)\n"
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"lwc2 $3, 4($v1)\n"
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"lwc2 $4, 0($v0)\n"
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"lwc2 $5, 4($v0)\n"
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"nop\n"
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"nop\n"
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"rtpt\n"
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"cfc2 $t4, $31\n"
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"nop\n"
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"sw $t4, 0($sp)\n"
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"lw $v0, 0($sp)\n"
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"addiu $v1, $zero, -0x1001\n"
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"and $v0, $v0, $v1\n"
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"bne $v0, $zero, 2f\n"
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"nop\n"
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"nop\n"
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"nop\n"
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"nclip\n"
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"swc2 $24, 0($t7)\n"
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"lw $v0, 4($sp)\n"
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"nop\n"
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"blez $v0, 2f\n"
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"nop\n"
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"swc2 $12, 8($a3)\n"
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"swc2 $13, 12($a3)\n"
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"swc2 $14, 16($a3)\n"
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"nop\n"
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"nop\n"
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"avsz3\n"
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"swc2 $7, 0($t7)\n"
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"addiu $v0, $t6, 4\n"
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"lwc2 $6, 0($v0)\n"
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"lhu $v0, 0($t2)\n"
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"nop\n"
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"sll $v0, $v0, 3\n"
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"addu $v0, $a2, $v0\n"
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"lwc2 $0, 0($v0)\n"
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"lwc2 $1, 4($v0)\n"
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"nop\n"
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"nop\n"
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"nccs\n"
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"swc2 $22, 0($t1)\n"
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"lw $v0, 4($sp)\n"
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"addiu $t1, $t1, 20\n"
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"srav $v0, $v0, $t9\n"
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"sll $v0, $v0, 2\n"
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"addu $t0, $t8, $v0\n"
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"lw $v1, 0($t0)\n"
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"lui $v0, 0x400\n"
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"and $v1, $v1, $t3\n"
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"or $v1, $v1, $v0\n"
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"and $v0, $a3, $t3\n"
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"sw $v1, 0($a3)\n"
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"sw $v0, 0($t0)\n"
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"lui $v0, %hi(D_800A2B78)\n"
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"lw $v0, %lo(D_800A2B78)($v0)\n"
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"nop\n"
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"beq $v0, $zero, 2f\n"
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"addiu $a3, $a3, 20\n"
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"lbu $v0, -17($t1)\n"
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"nop\n"
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"andi $v0, $v0, 0x2\n"
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"beq $v0, $zero, 2f\n"
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"lui $a0, 0xE100\n"
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"ori $a0, $a0, 0xA\n"
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"lw $v1, 4($sp)\n"
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"addiu $v0, $zero, 1\n"
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"sb $v0, -1($t1)\n"
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"lui $v0, %hi(D_800A2B78)\n"
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"lw $v0, %lo(D_800A2B78)($v0)\n"
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"srav $v1, $v1, $t9\n"
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"sll $v1, $v1, 2\n"
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"addu $t0, $t8, $v1\n"
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"andi $v0, $v0, 0x3\n"
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"sll $v0, $v0, 5\n"
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"or $v0, $v0, $a0\n"
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"sw $v0, 0($t1)\n"
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"addiu $t1, $t1, 8\n"
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"lw $v1, 0($t0)\n"
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"lui $v0, 0x100\n"
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"and $v1, $v1, $t3\n"
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"or $v1, $v1, $v0\n"
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"and $v0, $a3, $t3\n"
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"sw $v1, 0($a3)\n"
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"addiu $a3, $a3, 8\n"
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"sw $v0, 0($t0)\n"
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"2:\n"
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"addiu $t5, $t5, -1\n"
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"addiu $t2, $t2, 16\n"
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"bne $t5, $zero, 1b\n"
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"addiu $t6, $t6, 16\n"
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"3:\n"
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"addu $v0, $a3, $zero\n"
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"addiu $sp, $sp, 8\n"
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".set\treorder\n"
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);
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}
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/* ---- PsyQ GTE inline macros (the subset this routine uses) --------------- */
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@@ -9517,7 +9793,137 @@ u32 *func_80025EB8(Prim20 *prim, SVEC8_80025EB8 *verts, SVEC8_80025EB8 *norms, F
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return (u32 *)pkt;
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}
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INCLUDE_ASM("asm/nonmatchings/800", func_80026128);
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typedef struct { s16 vx, vy, vz, pad; } SVEC8_80026128;
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typedef struct { /* 0x1C */
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u32 unk00;
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u32 uv0;
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u32 uv1;
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u32 uv2;
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u16 n0, v0;
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u16 n1, v1;
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u16 n2, v2;
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} FaceGT3;
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typedef struct { /* 0x28 */
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u32 tag;
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u32 rgb0, xy0, uv0;
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u32 rgb1, xy1, uv1;
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u32 rgb2, xy2, uv2;
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} PktGT3;
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|
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extern u32 D_80063884;
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#define gte_ldrgb(r0) __asm__ volatile ( \
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"lwc2 $6, 0( %0 )" \
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: \
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: "r"( r0 ) )
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||||
|
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#define gte_ldv3(r0, r1, r2) __asm__ volatile ( \
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"lwc2 $0, 0( %0 );" \
|
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"lwc2 $1, 4( %0 );" \
|
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"lwc2 $2, 0( %1 );" \
|
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"lwc2 $3, 4( %1 );" \
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"lwc2 $4, 0( %2 );" \
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"lwc2 $5, 4( %2 )" \
|
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: \
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: "r"( r0 ), "r"( r1 ), "r"( r2 ) )
|
||||
|
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#define gte_rtpt() __asm__ volatile ("nop;nop;rtpt")
|
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#define gte_nclip() __asm__ volatile ("nop;nop;nclip")
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#define gte_avsz3() __asm__ volatile ("nop;nop;avsz3")
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#define gte_ncct() __asm__ volatile ("nop;nop;ncct")
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||||
#define gte_stflg(r0) __asm__ volatile ( \
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||||
"cfc2 $12, $31;" \
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||||
"nop;" \
|
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"sw $12, 0( %0 )" \
|
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: \
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: "r"( r0 ) \
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: "$12", "memory" )
|
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#define gte_stopz(r0) __asm__ volatile ( \
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||||
"swc2 $24, 0( %0 )" \
|
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: \
|
||||
: "r"( r0 ) \
|
||||
: "memory" )
|
||||
|
||||
#define gte_stotz(r0) __asm__ volatile ( \
|
||||
"swc2 $7, 0( %0 )" \
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: \
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: "r"( r0 ) \
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: "memory" )
|
||||
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||||
#define gte_strgb3_gt3(r0, r1, r2) __asm__ volatile ( \
|
||||
"swc2 $20, 0( %0 );" \
|
||||
"swc2 $21, 0( %1 );" \
|
||||
"swc2 $22, 0( %2 )" \
|
||||
: \
|
||||
: "r"( r0 ), "r"( r1 ), "r"( r2 ) \
|
||||
: "memory" )
|
||||
|
||||
/* func_80026128 — main/800 — textured-GT3 (POLY_GT3) triangle emitter with per-vertex
|
||||
* normal-colour lighting. Sibling of the matched func_800262D8 in this TU (same loop
|
||||
* shape, same pkt->uvN = face->uvN copy); NOT a twin of the Gouraud-only func_800CBC2C.
|
||||
* Vertex type carries the function suffix per TU convention (cf. SVEC8_800262D8) since
|
||||
* gcc-2.7.2 rejects typedef redefinition and SVEC2 already exists at line 93. The SXY
|
||||
* store trio is written inline rather than as gte_stsxy3_gt3 because the TU already
|
||||
* binds that name to the 8/16/24 G3-shape macro further down (func_800277DC block);
|
||||
* offsets here are the true GT3 slot xy words 8/20/32. Splice: replace INCLUDE_ASM at
|
||||
* src/800.c:8983. Base macros above are byte-identical to the in-scope func_8002528C
|
||||
* block (lines 8001-8063); drop this duplicate set when pasting into the TU.
|
||||
*
|
||||
* NOTE: the target .s carries splat's "/* Handwritten function * /" marker (and marks
|
||||
* the bare `cfc2 $t4,$31` as a handwritten instruction). That label is a spimdisasm
|
||||
* heuristic firing on the raw cop2 discipline — the pinned cc1 REACHES all 108 words
|
||||
* from this C (oracle MATCH, repeatedly reproduced), unlike func_80027200 where the
|
||||
* same marker was genuine. If the whole-binary gate still refuses this byte-perfect
|
||||
* body, suspect the extract/prune layer special-casing Handwritten-marked .s files
|
||||
* (duplicate-symbol link), not this function's codegen. */
|
||||
PktGT3 *func_80026128(FaceGT3 *face, SVEC8_80026128 *vtx, SVEC8_80026128 *nrm, PktGT3 *arg3,
|
||||
s32 count, s32 shift, u32 *ot)
|
||||
{
|
||||
long flag;
|
||||
long otz;
|
||||
u32 *otp;
|
||||
PktGT3 *pkt = arg3;
|
||||
|
||||
gte_ldrgb(&D_80063884);
|
||||
|
||||
while (count != 0) {
|
||||
gte_ldv3(&vtx[face->v0], &vtx[face->v1], &vtx[face->v2]);
|
||||
gte_rtpt();
|
||||
pkt->uv0 = face->uv0;
|
||||
pkt->uv1 = face->uv1;
|
||||
pkt->uv2 = face->uv2;
|
||||
gte_stflg(&flag);
|
||||
if (!(flag & ~0x1000)) {
|
||||
gte_nclip();
|
||||
gte_stopz(&otz);
|
||||
if (otz > 0) {
|
||||
__asm__ volatile (
|
||||
"swc2 $12, 8( %0 );"
|
||||
"swc2 $13, 20( %0 );"
|
||||
"swc2 $14, 32( %0 )"
|
||||
:
|
||||
: "r"( pkt )
|
||||
: "memory" );
|
||||
gte_avsz3();
|
||||
gte_stotz(&otz);
|
||||
gte_ldv3(&nrm[face->n0], &nrm[face->n1], &nrm[face->n2]);
|
||||
gte_ncct();
|
||||
otp = &ot[otz >> shift];
|
||||
pkt->tag = (*otp & 0x00FFFFFF) | 0x09000000;
|
||||
gte_strgb3_gt3(&pkt->rgb0, &pkt->rgb1, &pkt->rgb2);
|
||||
*otp = (u32)pkt & 0x00FFFFFF;
|
||||
pkt++;
|
||||
}
|
||||
}
|
||||
face++;
|
||||
count--;
|
||||
}
|
||||
return pkt;
|
||||
}
|
||||
|
||||
|
||||
/* func_800262D8 — main/800 — GT4 quad emitter with per-vertex normal-colour lighting.
|
||||
@@ -12399,7 +12805,33 @@ void func_8002D240(s32 a0) {
|
||||
func_8003B45C(p);
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/800", func_8002D29C);
|
||||
extern s32 D_800A46B4;
|
||||
extern u16 D_800A46B8;
|
||||
extern u16 D_800A4EF4;
|
||||
extern u8 D_800A46BA;
|
||||
|
||||
extern int func_8003EDE8(int a0, int a1, int a2);
|
||||
extern void func_8002EE90(void);
|
||||
|
||||
void func_8002D29C(void) {
|
||||
s32 *s1;
|
||||
s32 s0;
|
||||
s16 v0;
|
||||
s16 v1;
|
||||
|
||||
s1 = &D_800A46B4;
|
||||
s0 = *s1;
|
||||
v0 = D_800A4EF4;
|
||||
func_8003EDE8(0, (s0 * v0) >> 16, (s0 * v0) >> 16);
|
||||
v1 = D_800A46B8;
|
||||
s0 -= v1;
|
||||
if (s0 <= 0) {
|
||||
D_800A46BA = 0;
|
||||
func_8002EE90();
|
||||
s0 = 0;
|
||||
}
|
||||
*s1 = s0;
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/800", func_8002D320);
|
||||
|
||||
|
||||
+9
-1
@@ -4,7 +4,15 @@ INCLUDE_ASM("asm/nonmatchings/800b", func_80047D3C);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/800b", InvSquareRoot);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/800b", func_80047E58);
|
||||
__asm__(".text\n.align 2\n.globl func_80047E58\n.ent\tfunc_80047E58\n"
|
||||
"func_80047E58:\n.frame $sp,0,$31\n.mask 0x00000000,0\n.fmask 0x00000000,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"lw $t0, 0($a0)\n"
|
||||
"lw $t1, 4($a0)\n"
|
||||
"lw $t2, 8($a0)\n"
|
||||
"b .L80047EAC\n"
|
||||
"addu $a3, $ra, $zero\n"
|
||||
".set\treorder\n.end\tfunc_80047E58\n");
|
||||
|
||||
|
||||
/* VectorNormal @ 0x80047E6C -- HANDWRITTEN PsyQ libgte-style wrapper (cookbook §179-B/§179-C,
|
||||
|
||||
+13
-1
@@ -14,7 +14,19 @@ INCLUDE_ASM("asm/nonmatchings/800b_2", Square0);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/800b_2", AverageZ3);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/800b_2", AverageZ4);
|
||||
__asm__(".text\n.align 2\n.globl AverageZ4\n.ent\tAverageZ4\n"
|
||||
"AverageZ4:\n.frame $sp,0,$31\n.mask 0x00000000,0\n.fmask 0,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"mtc2 $a0, $16\n"
|
||||
"mtc2 $a1, $17\n"
|
||||
"mtc2 $a2, $18\n"
|
||||
"mtc2 $a3, $19\n"
|
||||
"nop\n"
|
||||
"avsz4\n"
|
||||
"mfc2 $v0, $7\n"
|
||||
"jr $ra\n"
|
||||
"nop\n"
|
||||
".set\treorder\n.end\tAverageZ4\n");
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/800b_2", OuterProduct12);
|
||||
|
||||
|
||||
+79
-4
@@ -222,7 +222,21 @@ __asm__(
|
||||
".end\tSYS_OBJ_210\n"
|
||||
);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/800c", func_800594CC);
|
||||
extern u8 D_8007278A;
|
||||
extern u32 D_80072784;
|
||||
extern u8 D_80072788;
|
||||
extern u8 D_8007278B;
|
||||
extern u8 D_800740D0;
|
||||
|
||||
s32 func_800594CC(s32 a0) {
|
||||
u8 *p = &D_8007278A;
|
||||
u8 old = *p;
|
||||
*p = a0;
|
||||
if (a0 & 0xFF) {
|
||||
((void (*)(void *, s32, u8, u8))D_80072784)(&D_800740D0, a0 & 0xFF, D_80072788, D_8007278B);
|
||||
}
|
||||
return old;
|
||||
}
|
||||
|
||||
|
||||
extern u8 D_8007278A;
|
||||
@@ -289,7 +303,17 @@ void func_80059658(s32 a0) {
|
||||
}
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/800c", func_800596F4);
|
||||
extern u8 D_8007278A;
|
||||
extern u32 D_80072784;
|
||||
extern void *D_80072780;
|
||||
extern u8 D_80074140;
|
||||
|
||||
void func_800596F4(s32 a0) {
|
||||
if (D_8007278A >= 2) {
|
||||
((void (*)(void *, s32))D_80072784)(&D_80074140, a0);
|
||||
}
|
||||
(*(void (**)(void *))((u8 *)D_80072780 + 0x3C))(a0);
|
||||
}
|
||||
|
||||
|
||||
/* func_80059760 ("checkRECT" per Ghidra) is NOT independently C-compilable: the target's own
|
||||
@@ -1241,7 +1265,33 @@ s32 SYS_OBJ_1AA4(s32 a0, s32 a1, s32 a2, s32 a3) {
|
||||
return v0;
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/800c", func_8005ACF0);
|
||||
__asm__(
|
||||
".text\n"
|
||||
".align\t2\n"
|
||||
".globl\tfunc_8005ACF0\n"
|
||||
".ent\tfunc_8005ACF0\n"
|
||||
"func_8005ACF0:\n"
|
||||
".frame\t$sp,0,$31\n"
|
||||
".mask\t0x00000000,0\n"
|
||||
".fmask\t0x00000000,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"lui $2, %hi(D_80072788)\n"
|
||||
"lbu $2, %lo(D_80072788)($2)\n"
|
||||
"nop\n"
|
||||
"addiu $2, $2, -1\n"
|
||||
"sltiu $2, $2, 2\n"
|
||||
"bnez $2, 1f\n"
|
||||
" andi $3, $5, 0xfff\n"
|
||||
"andi $3, $5, 0x7ff\n"
|
||||
"sll $3, $3, 11\n"
|
||||
"j SYS_OBJ_1AF0\n"
|
||||
" andi $2, $4, 0x7ff\n"
|
||||
"1:\n"
|
||||
"sll $3, $3, 12\n"
|
||||
"andi $2, $4, 0xfff\n"
|
||||
".set\treorder\n"
|
||||
".end\tfunc_8005ACF0\n"
|
||||
);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_1AF0);
|
||||
|
||||
@@ -1359,7 +1409,32 @@ s32 func_8005AE80(s32 *a0, s32 a1) {
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/800c", _clr);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_1D84);
|
||||
__asm__(
|
||||
".text\n"
|
||||
".align\t2\n"
|
||||
".globl\tSYS_OBJ_1D84\n"
|
||||
".ent\tSYS_OBJ_1D84\n"
|
||||
"SYS_OBJ_1D84:\n"
|
||||
".set\tnoreorder\n"
|
||||
"lh $a1, 6($t0)\n"
|
||||
"sh $v0, 4($t0)\n"
|
||||
"bltz $a1, .L8005AFF0\n"
|
||||
"addu $a0, $a1, $zero\n"
|
||||
"lui $v0, %hi(D_8007278E)\n"
|
||||
"lh $v0, %lo(D_8007278E)($v0)\n"
|
||||
"nop\n"
|
||||
"addu $v1, $v0, $zero\n"
|
||||
"addiu $v0, $v0, -1\n"
|
||||
"slt $v0, $v0, $a1\n"
|
||||
"bnez $v0, SYS_OBJ_1DC0\n"
|
||||
"addiu $v1, $v1, -1\n"
|
||||
"j SYS_OBJ_1DC0\n"
|
||||
"addu $v1, $a0, $zero\n"
|
||||
".L8005AFF0:\n"
|
||||
"addu $v1, $zero, $zero\n"
|
||||
".set\treorder\n"
|
||||
".end\tSYS_OBJ_1D84\n"
|
||||
);
|
||||
|
||||
|
||||
/* SYS_OBJ_1DC0 (0x8005AFF4) is NOT a callable function: it is the third code FRAGMENT of one
|
||||
|
||||
+5
-1
@@ -170,7 +170,11 @@ INCLUDE_ASM("asm/nonmatchings/boot", func_80011D54);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/boot", func_80011DA0);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/boot", func_80011DCC);
|
||||
extern s32 D_80074780;
|
||||
|
||||
void func_80011DCC(void) {
|
||||
D_80074780 = 0;
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/boot", func_80011DF4);
|
||||
|
||||
|
||||
+21
-2
@@ -6,7 +6,18 @@ INCLUDE_ASM("asm/nonmatchings/gsgap5", SetVertex1);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/gsgap5", SetVertex2);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/gsgap5", SetVertexTri);
|
||||
void SetVertexTri(long *r0, long *r1, long *r2)
|
||||
{
|
||||
__asm__ volatile(
|
||||
"lwc2 $0, 0( %0 );"
|
||||
"lwc2 $1, 4( %0 );"
|
||||
"lwc2 $2, 0( %1 );"
|
||||
"lwc2 $3, 4( %1 );"
|
||||
"lwc2 $4, 0( %2 );"
|
||||
"lwc2 $5, 4( %2 )"
|
||||
:
|
||||
: "r"(r0), "r"(r1), "r"(r2));
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/gsgap5", SetRGBfifo);
|
||||
|
||||
@@ -16,7 +27,15 @@ INCLUDE_ASM("asm/nonmatchings/gsgap5", SetIR0);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/gsgap5", SetSZfifo3);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/gsgap5", SetSZfifo4);
|
||||
/* probe: naive spelling -- no volatile, no .set noreorder */
|
||||
void SetSZfifo4()
|
||||
{
|
||||
__asm__(
|
||||
"mtc2 $4, $16\n"
|
||||
"mtc2 $5, $17\n"
|
||||
"mtc2 $6, $18\n"
|
||||
"mtc2 $7, $19\n");
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/gsgap5", SetSXSYfifo);
|
||||
|
||||
|
||||
+34
-1
@@ -10,7 +10,40 @@ INCLUDE_ASM("asm/nonmatchings/sgap_8", VM_NOWON_OBJ_2A0);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/sgap_8", VM_NOWON_OBJ_2C8);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/sgap_8", VM_NOWON_OBJ_3D4);
|
||||
__asm__(".text\n.align 2\n.globl VM_NOWON_OBJ_3D4\n.ent VM_NOWON_OBJ_3D4\n"
|
||||
"VM_NOWON_OBJ_3D4:\n"
|
||||
".frame $sp,16,$31\n.mask 0,0\n.fmask 0,0\n.set noreorder\n"
|
||||
"lui $v0, %hi(D_800B9B34)\n"
|
||||
"lbu $v0, %lo(D_800B9B34)($v0)\n"
|
||||
"nop\n"
|
||||
"andi $v0, $v0, 4\n"
|
||||
"beqz $v0, .L80040D54\n"
|
||||
"nor $v1, $zero, $a2\n"
|
||||
"lui $v0, %hi(D_80078D90)\n"
|
||||
"lhu $v0, %lo(D_80078D90)($v0)\n"
|
||||
"lui $v1, %hi(D_80078D92)\n"
|
||||
"lhu $v1, %lo(D_80078D92)($v1)\n"
|
||||
"or $v0, $v0, $a2\n"
|
||||
"or $v1, $v1, $a1\n"
|
||||
"lui $at, %hi(D_80078D90)\n"
|
||||
"sh $v0, %lo(D_80078D90)($at)\n"
|
||||
"lui $at, %hi(D_80078D92)\n"
|
||||
"sh $v1, %lo(D_80078D92)($at)\n"
|
||||
"j VM_NOWON_OBJ_44C\n"
|
||||
".L80040D54:\n"
|
||||
"lui $v0, %hi(D_80078D90)\n"
|
||||
"lhu $v0, %lo(D_80078D90)($v0)\n"
|
||||
"nop\n"
|
||||
"and $v0, $v0, $v1\n"
|
||||
"lui $at, %hi(D_80078D90)\n"
|
||||
"sh $v0, %lo(D_80078D90)($at)\n"
|
||||
"lui $v0, %hi(D_80078D92)\n"
|
||||
"lhu $v0, %lo(D_80078D92)($v0)\n"
|
||||
"nor $v1, $zero, $a1\n"
|
||||
"and $v0, $v0, $v1\n"
|
||||
"lui $at, %hi(D_80078D92)\n"
|
||||
"sh $v0, %lo(D_80078D92)($at)\n"
|
||||
".set reorder\n.end VM_NOWON_OBJ_3D4\n");
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/sgap_8", VM_NOWON_OBJ_44C);
|
||||
|
||||
|
||||
Reference in New Issue
Block a user