mirror of
https://github.com/Druthulu/BFM-decomp
synced 2026-10-03 08:07:25 -04:00
fix(main): revert 10 ungated gate_main substitutions that broke main's byte-match
Main has been RED since ~00:20 overnight: it built to e9fffcf45 instead of 143dbb89, so no main draft could bank regardless of quality, and R22 ran 212/213 for nine hours. CAUSE — R42 has a gap. 'Commit a dirty tree rather than revert it' is right for a lane that gates per-binary and leaves PROVEN banks uncommitted (sweep_parallel gates commit=False by design). It is WRONG for a killed gate_main, whose substitution is by definition unverified. Two auto-commits swept up abandoned main batches: src/800c.c <- commit:2598 6 INCLUDE_ASM stubs substituted src/800.c <- commit:2611 4 INCLUDE_ASM stubs substituted Ten function bodies committed as banked work that never passed a byte-gate. VERIFIED IN THE ISOLATED WORKTREE, by elimination rather than assumption: HEAD -> e9fffcf45 RED revert 800c.c only -> a9d9870c1 RED (still drifting) revert 800.c + 800c.c + engine_core.h -> 143dbb89 GREEN restore HEAD engine_core.h -> 143dbb89 GREEN (header INNOCENT) restore HEAD 800.c -> a9d9870c1 RED (800.c guilty too) So the minimum revert is exactly these two files. src/shared/engine_core.h is exonerated — I had proposed its C89 prototype change as the cause and that hypothesis was WRONG. NOTHING IS LOST: the ten bodies remain in commit:2598 and commit:2611 and can be re-gated properly once gate_main's fixes (terminating bisect + idempotent hoist, commit:2633) are exercised against a green baseline.
This commit is contained in:
@@ -2,15 +2,6 @@
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#include "psyq/libcd.h"
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#include "shared/clearTbl40.h" /* dedup group I0: func_80037004 / func_80037334 share one body */
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/* hoisted by gate_main so drafts above can reuse them (§181) */
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typedef struct {
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u16 x;
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u16 y;
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} Poly12Pt;
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typedef struct {
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u8 pad_00[0x10];
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Poly12Pt pts[12];
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} Poly12Obj;
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/* hoisted by gate_main so drafts above can reuse them (§181) */
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typedef struct {
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s16 unk00;
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s16 unk02;
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@@ -616,42 +607,7 @@ INCLUDE_ASM("asm/nonmatchings/800", func_80014588);
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INCLUDE_ASM("asm/nonmatchings/800", func_800145EC);
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extern void GsInitGraph2(s32 w, s32 h, s32 mode, s32 a3, s32 st);
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extern void func_80053EEC(s32 a0, s32 a1, s32 a2, s32 a3);
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extern void func_80059234(s32);
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extern void func_80053218(void);
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extern void func_80014774(void);
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extern void func_800147B8(void);
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extern u8 D_80062A3C[];
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extern u8 D_80062A3E[];
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extern u8 D_80062A40[];
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extern u16 D_800AF7BC;
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extern u16 D_800AF7BE;
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extern u16 D_800AF7C0;
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void func_800146B0(s32 mode) {
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s32 off;
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off = (mode & 0xFFFF) * 6;
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D_800AF7BC = *(u16 *) (D_80062A3C + off);
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D_800AF7BE = *(u16 *) (D_80062A3E + off);
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D_800AF7C0 = *(u16 *) (D_80062A40 + off);
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GsInitGraph2(D_800AF7BC, D_800AF7BE, D_800AF7C0 | 4, 0, 0);
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if (D_800AF7BE == 0x1E0) {
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func_80053EEC(0, 0, 0, 0);
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} else {
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func_80053EEC(0, D_800AF7BE, 0, 0);
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}
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func_80059234(1);
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func_80053218();
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func_80014774();
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func_800147B8();
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}
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INCLUDE_ASM("asm/nonmatchings/800", func_800146B0);
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extern void func_80059888(void *a0, s32 a1, s32 a2, s32 a3);
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@@ -1355,11 +1311,7 @@ INCLUDE_ASM("asm/nonmatchings/800", func_800159C0);
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INCLUDE_ASM("asm/nonmatchings/800", func_800159E4);
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void func_80015A08(s32 *a0, s32 *a1) {
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*(u16 *)((s32)a1 + 0x0) = *(u16 *)((s32)a0 + 0x0);
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*(u16 *)((s32)a1 + 0x4) = *(u16 *)((s32)a0 + 0x4);
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*(u16 *)((s32)a1 + 0x8) = *(u16 *)((s32)a0 + 0x8);
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}
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INCLUDE_ASM("asm/nonmatchings/800", func_80015A08);
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INCLUDE_ASM("asm/nonmatchings/800", func_80015A2C);
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@@ -7178,7 +7130,15 @@ void func_80023138(s32 *arg0, u8 *col, u8 *pts, u32 *ot)
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extern s32 func_8004787C(s32 a0); /* rcos-like: angle (0..0xFFF) -> 1.12 fixed */
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extern s32 func_80047948(s32 a0); /* rsin-like: angle (0..0xFFF) -> 1.12 fixed */
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typedef struct {
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u16 x;
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u16 y;
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} Poly12Pt;
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typedef struct {
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u8 pad_00[0x10];
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Poly12Pt pts[12];
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} Poly12Obj;
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/* Builds a 12-gon of radius a1 into the u16{x,y} table at obj+0x10:
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* quarter arc (4 pts, angle step 0x155), mirrored in y, then in x. */
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@@ -7207,23 +7167,7 @@ void func_800233CC(Poly12Obj *a0, u16 a1) {
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}
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}
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extern s32 func_8004787C(s32 a0);
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extern s32 func_80047948(s32 a0);
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void func_800234E4(Poly12Obj *obj, u16 radius, u16 ang0) {
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s32 i = 0;
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s32 r = radius;
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register s32 ang __asm__("$16") = ang0;
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do {
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obj->pts[i].x = (func_8004787C(ang) * r) >> 12;
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obj->pts[i].y = (func_80047948(ang) * r) >> 12;
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ang += 0x155;
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i++;
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} while (i < 12);
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}
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INCLUDE_ASM("asm/nonmatchings/800", func_800234E4);
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typedef struct { u32 addr : 24; u32 len : 8; } PTag_80023570;
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@@ -11357,11 +11301,7 @@ void func_8002C8F4(void)
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INCLUDE_ASM("asm/nonmatchings/800", func_8002CC4C);
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extern void func_8002D4C8(s32 a0, s32 a1);
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void func_8002CCB4(void) {
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func_8002D4C8(2, 0);
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}
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INCLUDE_ASM("asm/nonmatchings/800", func_8002CCB4);
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INCLUDE_ASM("asm/nonmatchings/800", func_8002CCD8);
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+6
-222
@@ -126,52 +126,7 @@ INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_16C);
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INCLUDE_ASM("asm/nonmatchings/800c", SetGraphReverse);
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__asm__(
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".text\n"
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".align\t2\n"
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".globl\tSYS_OBJ_210\n"
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".ent\tSYS_OBJ_210\n"
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"SYS_OBJ_210:\n"
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".set\tnoreorder\n"
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"or $a0, $a0, $v0\n"
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"lui $v0, %hi(D_80072780)\n"
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"lw $v0, %lo(D_80072780)($v0)\n"
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"nop\n"
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"lw $v0, 16($v0)\n"
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"nop\n"
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"jalr $v0\n"
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"nop\n"
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"lui $v1, %hi(D_80072788)\n"
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"lbu $v1, %lo(D_80072788)($v1)\n"
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"addiu $v0, $zero, 0x2\n"
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"bne $v1, $v0, .L800594B0\n"
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"addu $v0, $s2, $zero\n"
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"lui $a0, (0x20000504 >> 16)\n"
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"lui $v0, %hi(D_8007278B)\n"
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"lbu $v0, %lo(D_8007278B)($v0)\n"
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"lui $v1, %hi(D_80072780)\n"
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"lw $v1, %lo(D_80072780)($v1)\n"
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"beqz $v0, .L8005949C\n"
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"ori $a0, $a0, (0x20000504 & 0xFFFF)\n"
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"lui $a0, (0x20000501 >> 16)\n"
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"ori $a0, $a0, (0x20000501 & 0xFFFF)\n"
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".L8005949C:\n"
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"lw $v0, 16($v1)\n"
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"nop\n"
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"jalr $v0\n"
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"nop\n"
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"addu $v0, $s2, $zero\n"
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".L800594B0:\n"
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"lw $ra, 28($sp)\n"
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"lw $s2, 24($sp)\n"
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"lw $s1, 20($sp)\n"
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"lw $s0, 16($sp)\n"
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"addiu $sp, $sp, 0x20\n"
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"jr $ra\n"
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"nop\n"
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".set\treorder\n"
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".end\tSYS_OBJ_210\n"
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);
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INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_210);
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INCLUDE_ASM("asm/nonmatchings/800c", func_800594CC);
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@@ -240,17 +195,7 @@ void func_80059658(s32 a0) {
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}
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}
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extern u8 D_8007278A;
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extern u32 D_80072784;
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extern void *D_80072780;
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extern u8 D_80074140;
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void func_800596F4(s32 a0) {
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if (D_8007278A >= 2) {
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((void (*)(void *, s32))D_80072784)(&D_80074140, a0);
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}
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(*(void (**)(void *))((u8 *)D_80072780 + 0x3C))(a0);
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}
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INCLUDE_ASM("asm/nonmatchings/800c", func_800596F4);
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/* func_80059760 ("checkRECT" per Ghidra) is NOT independently C-compilable: the target's own
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@@ -626,42 +571,7 @@ INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_F24);
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INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_F58);
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__asm__(
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".text\n"
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".align\t2\n"
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".globl\tSYS_OBJ_FD8\n"
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".ent\tSYS_OBJ_FD8\n"
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"SYS_OBJ_FD8:\n"
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".set\tnoreorder\n"
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" addu $s1, $a0, $zero\n"
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" addiu $a1, $s1, 0x2\n"
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" slt $v0, $s2, $a1\n"
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" bnez $v0, SYS_OBJ_1034\n"
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" nop\n"
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" lbu $v0, 18($s0)\n"
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" nop\n"
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" beqz $v0, .L8005A240\n"
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" slti $v0, $s2, 313\n"
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" beqz $v0, .L8005A24C\n"
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" nop\n"
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" j SYS_OBJ_1034\n"
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" addu $a1, $s2, $zero\n"
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".L8005A240:\n"
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" slti $v0, $s2, 259\n"
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" bnez $v0, .L8005A264\n"
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" nop\n"
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".L8005A24C:\n"
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" lbu $v0, 18($s0)\n"
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" nop\n"
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" beqz $v0, SYS_OBJ_1034\n"
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" addiu $a1, $zero, 258\n"
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" j SYS_OBJ_1034\n"
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" addiu $a1, $zero, 312\n"
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".L8005A264:\n"
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" addu $a1, $s2, $zero\n"
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".set\treorder\n"
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".end\tSYS_OBJ_FD8\n"
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);
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INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_FD8);
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INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_1034);
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@@ -691,39 +601,7 @@ INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_1790);
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INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_18AC);
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__asm__(
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".text\n"
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".align\t2\n"
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".globl\tfunc_8005AB00\n"
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".ent\tfunc_8005AB00\n"
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"func_8005AB00:\n"
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" .set\tnoreorder\n"
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" lui $v0, %hi(D_80072788)\n"
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" lbu $v0, %lo(D_80072788)($v0)\n"
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" nop\n"
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" addiu $v0, $v0, -0x1\n"
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" sltiu $v0, $v0, 0x2\n"
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" beqz $v0, .L8005AB38\n"
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" nop\n"
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" beqz $a1, .L8005AB28\n"
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" lui $v1, 0xe100\n"
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" ori $v1, $v1, 0x0800\n"
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".L8005AB28:\n"
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" beqz $a0, SYS_OBJ_191C\n"
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" andi $v0, $a2, 0x27ff\n"
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" j SYS_OBJ_191C\n"
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" ori $v0, $v0, 0x1000\n"
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".L8005AB38:\n"
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" beqz $a1, .L8005AB44\n"
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" lui $v1, 0xe100\n"
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" ori $v1, $v1, 0x0200\n"
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".L8005AB44:\n"
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" beqz $a0, SYS_OBJ_191C\n"
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" andi $v0, $a2, 0x9ff\n"
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" ori $v0, $v0, 0x400\n"
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".set\treorder\n"
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".end\tfunc_8005AB00\n"
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);
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INCLUDE_ASM("asm/nonmatchings/800c", func_8005AB00);
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INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_191C);
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@@ -751,32 +629,7 @@ INCLUDE_ASM("asm/nonmatchings/800c", func_8005AD34);
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INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_1B78);
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__asm__(
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".text\n"
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".align\t2\n"
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".globl\tfunc_8005ADB8\n"
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".ent\tfunc_8005ADB8\n"
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"func_8005ADB8:\n"
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".set\tnoreorder\n"
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"lui $v1, %hi(D_80072788)\n"
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"lbu $v1, %lo(D_80072788)($v1)\n"
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"addiu $v0, $zero, 0x1\n"
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"beq $v1, $v0, .L8005ADDC\n"
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"addiu $v0, $zero, 0x2\n"
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"beq $v1, $v0, .L8005AE04\n"
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"nop\n"
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"j SYS_OBJ_1C28\n"
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"nop\n"
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".L8005ADDC:\n"
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"lui $v0, %hi(D_8007278B)\n"
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"lbu $v0, %lo(D_8007278B)($v0)\n"
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"nop\n"
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"beqz $v0, SYS_OBJ_1C28\n"
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"addiu $v0, $zero, 0x400\n"
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"lh $v1, 4($a0)\n"
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"lh $a0, 0($a0)\n"
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".end\tfunc_8005ADB8\n"
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);
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INCLUDE_ASM("asm/nonmatchings/800c", func_8005ADB8);
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INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_1BC4);
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@@ -987,76 +840,7 @@ __asm__(
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INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_1F64);
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/* _dws (0x8005B1C4) is NOT a callable function: it is the HEAD FRAGMENT of one larger routine
|
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* that continues at SYS_OBJ_1FF4 (0x8005B1F0+0x38 = 0x8005B228, the very next address after this
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* symbol's 25 instructions end -- same splat offset-naming scheme as SYS_OBJ_1DC0 = 0x8005AFF4,
|
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* documented above in this TU).
|
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*
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* _dws -> `beqz $v0,SYS_OBJ_1FF4` on the in-range path, `j SYS_OBJ_1FF4` on the
|
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* clamp path, and a BARE FALLTHROUGH into SYS_OBJ_1FF4 at .L8005B224
|
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* SYS_OBJ_1FF4 -> carries the rest of the routine (and its epilogue)
|
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*
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* _dws therefore has NO epilogue and NO `jr $ra` anywhere in its 25 instructions, while it
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* builds a full 0x50-byte frame (ra@0x48, s5@0x44, s4@0x40, s3@0x3C, s2@0x38, s1@0x34,
|
||||
* s0@0x30) that only the continuation tears down. None of that is expressible as a C function:
|
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* any C function body cc1 expands gets an unconditional `jr $ra` epilogue appended (proven three
|
||||
* times in this same TU: func_80059234 / func_80059FC0 / SYS_OBJ_1DC0 -- neither
|
||||
* __attribute__((noreturn)) nor a bare tail `j` suppresses it), and a C function cannot fall off
|
||||
* its end into the next symbol. Correct form (the byte-verified idiom already used five times in
|
||||
* this TU): emit the fragment as FILE-SCOPE inline asm -- a raw text blob cc1 copies verbatim
|
||||
* with no RTL function wrapper, so no prologue and no epilogue are ever generated.
|
||||
*
|
||||
* The literal ".ent\t" / ".end\t" pair (tab-separated, exactly as cc1 emits) is load-bearing:
|
||||
* maspsx's process_line special-cases lines starting with ".ent\t" and emits a FRESH
|
||||
* ".set\tnoreorder" into its own output, whereas a plain ".set\tnoreorder" line is swallowed as
|
||||
* internal state and never re-emitted -- without it GNU `as` assembles in reorder mode and
|
||||
* displaces every hand-placed delay-slot instruction. In file-scope asm `%` is literal, so
|
||||
* %hi/%lo are written un-doubled, and mem-operand offsets are DECIMAL (maspsx int()s them).
|
||||
*
|
||||
* Body transcribed 1:1 from asm/nonmatchings/800c/_dws.s. SYMBOL AUDIT -- every relocation in
|
||||
* that .s, decoded from the raw instruction words:
|
||||
* jal 0x0C017008 -> 0x017008<<2 | 0x80000000 = 0x8005C020 = func_8005C020
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||||
* lui 0x8007 + lh 0x278C -> 0x8007278C = D_8007278C
|
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* beqz 0x10040004 / j 0x08016C66 -> both target 0x016C66<<2 | 0x80000000 = 0x8005B228
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* = SYS_OBJ_1FF4 (the continuation fragment)
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* (there is no other relocation in the file.)
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*/
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||||
__asm__(
|
||||
".text\n"
|
||||
".align\t2\n"
|
||||
".globl\t_dws\n"
|
||||
".ent\t_dws\n"
|
||||
"_dws:\n"
|
||||
".set\tnoreorder\n"
|
||||
"addiu $sp, $sp, -80\n"
|
||||
"sw $s1, 52($sp)\n"
|
||||
"addu $s1, $a0, $zero\n"
|
||||
"sw $s2, 56($sp)\n"
|
||||
"addu $s2, $a1, $zero\n"
|
||||
"sw $ra, 72($sp)\n"
|
||||
"sw $s5, 68($sp)\n"
|
||||
"sw $s4, 64($sp)\n"
|
||||
"sw $s3, 60($sp)\n"
|
||||
"jal func_8005C020\n"
|
||||
"sw $s0, 48($sp)\n"
|
||||
"lh $a1, 4($s1)\n"
|
||||
"addu $s5, $zero, $zero\n"
|
||||
"bltz $a1, .L8005B224\n"
|
||||
"addu $v1, $a1, $zero\n"
|
||||
"lui $v0, %hi(D_8007278C)\n"
|
||||
"lh $v0, %lo(D_8007278C)($v0)\n"
|
||||
"nop\n"
|
||||
"addu $a0, $v0, $zero\n"
|
||||
"slt $v0, $v0, $a1\n"
|
||||
"beqz $v0, SYS_OBJ_1FF4\n"
|
||||
"nop\n"
|
||||
"j SYS_OBJ_1FF4\n"
|
||||
"addu $v1, $a0, $zero\n"
|
||||
".L8005B224:\n"
|
||||
"addu $v1, $zero, $zero\n"
|
||||
".set\treorder\n"
|
||||
".end\t_dws\n"
|
||||
);
|
||||
INCLUDE_ASM("asm/nonmatchings/800c", _dws);
|
||||
|
||||
INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_1FF4);
|
||||
|
||||
|
||||
Reference in New Issue
Block a user