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feat(decomp): main func_8005E228 (83 ins) — a §265 VERBATIM-ASM bank, not a C crack

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Recorded honestly for the accounting: this function is banked as a raw __asm__
transcription of the target disassembly, NOT as decompiled C. Its epilogue
(jr $ra with addiu $sp in the delay slot, two restores above) is unreachable from
C at this project's pinned triple -- the §177/§188 toolchain-wall class.

It is a legitimate route by the project's own established convention, verified
before banking rather than assumed: src/800c3.c already banks InitHeap,
FlushCache and func_8005CE38 exactly this way, and the agent followed the
convention of its immediate neighbour func_8005E3AC in the same TU.

Note it was NOT on .run/S67_walls.txt or the exclude list, so it was fairly drawn
and the wall was DISCOVERED by drafting it. That is a gap in the walls ledger
worth closing: an epilogue-shaped wall that no one has met yet is invisible to the
draw filter, so the next wave can spend an agent rediscovering it.

harvest_verify in the main tree: verified 1 / failed 0, final SHA
143dbb89f34491258bbc27810d0a12ec8b43a8dd BYTE-IDENTICAL. main 1045 -> 1044.

Also fixed en route: a maspsx sltu-operand parse quirk needs no spaces after
commas in the transcription (the submodule itself is UNCHANGED -- verified).
This commit is contained in:
Drew T
2026-08-31 18:43:37 -06:00
parent 54c0624e49
commit 70843992a7
1 changed files with 100 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/800c3.c
+100 -1
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@@ -928,7 +928,106 @@ void func_8005E1A4(void *arg0) {
}
}
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005E228);
__asm__(
"\t.set\tnoreorder\n"
".set noreorder\n"
"\t.globl\tfunc_8005E228\n"
"func_8005E228:\n"
"addiu $sp, $sp, -24\n"
"sw $s0, 16($sp)\n"
"addu $s0, $a0, $zero\n"
"sw $ra, 20($sp)\n"
"lbu $v1, 70($s0)\n"
"addiu $v0, $zero, 3\n"
"beq $v1, $v0, .L8005E2B4\n"
"slti $v0, $v1, 4\n"
"beqz $v0, .L8005E260\n"
"addiu $v0, $zero, 2\n"
"beq $v1, $v0, .L8005E274\n"
"addiu $v0, $zero, 1\n"
"j .L8005E364\n"
"nop\n"
".L8005E260:\n"
"addiu $v0, $zero, 4\n"
"beq $v1, $v0, .L8005E2D8\n"
"addiu $v0, $zero, 1\n"
"j .L8005E364\n"
"nop\n"
".L8005E274:\n"
"lw $v0, 60($s0)\n"
"lw $v1, 60($s0)\n"
"lbu $v0, 3($v0)\n"
"nop\n"
"sb $v0, 227($s0)\n"
"lbu $v0, 4($v1)\n"
"lw $v1, 60($s0)\n"
"sh $zero, 230($s0)\n"
"sb $v0, 228($s0)\n"
"lbu $v0, 5($v1)\n"
"lw $v1, 60($s0)\n"
"sb $v0, 233($s0)\n"
"lbu $v0, 6($v1)\n"
"sw $zero, 236($s0)\n"
"j .L8005E360\n"
"sb $v0, 234($s0)\n"
".L8005E2B4:\n"
"lw $v0, 60($s0)\n"
"nop\n"
"lbu $v1, 4($v0)\n"
"lbu $v0, 5($v0)\n"
"sb $zero, 71($s0)\n"
"sll $v1, $v1, 8\n"
"addu $v0, $v0, $v1\n"
"j .L8005E360\n"
"sh $v0, 230($s0)\n"
".L8005E2D8:\n"
"lw $a0, 236($s0)\n"
"lbu $v0, 71($s0)\n"
"lw $v1, 60($s0)\n"
"addiu $v0, $v0, 1\n"
"lbu $v1, 4($v1)\n"
"addiu $a0, $a0, 8\n"
"sb $v0, 71($s0)\n"
"addiu $v1, $v1, 3\n"
"andi $v1, $v1, 0x1FC\n"
"addu $a0, $a0, $v1\n"
"lbu $v1, 234($s0)\n"
"andi $v0, $v0, 0xFF\n"
"sltu $v0,$v0,$v1\n"
"beqz $v0, .L8005E31C\n"
"sw $a0, 236($s0)\n"
".L8005E314:\n"
"j .L8005E364\n"
"addu $v0, $zero, $zero\n"
".L8005E31C:\n"
"jal func_8005E374\n"
"addu $a0, $s0, $zero\n"
"slti $v0, $v0, 0x81\n"
"bnez $v0, .L8005E344\n"
"addu $a0, $s0, $zero\n"
"addiu $v0, $zero, 0xFE\n"
"sb $v0, 70($s0)\n"
"addiu $v0, $zero, 2\n"
"j .L8005E314\n"
"sb $v0, 73($s0)\n"
".L8005E344:\n"
"addiu $v0, $zero, 0xFF\n"
"addiu $a1, $s0, 0x63\n"
"jal func_8005E3AC\n"
"sb $v0, 70($s0)\n"
"addiu $v0, $zero, 2\n"
"j .L8005E314\n"
"sb $v0, 70($s0)\n"
".L8005E360:\n"
"addiu $v0, $zero, 1\n"
".L8005E364:\n"
"lw $ra, 20($sp)\n"
"lw $s0, 16($sp)\n"
"jr $ra\n"
"addiu $sp, $sp, 24\n"
".set reorder\n"
);
s32 func_8005E374(u8 *a0) {
s32 t = ((a0[0xE3] + 1) / 2) * 4;