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feat(decomp): parallel gate — 9 fns across 6 binaries (8 workers)

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ov_SC06_024    func_8017EC4C
  ov_SC06_029    func_8017F9C0
  ov_SC03_105    func_801867D0
  ov_SC05_010    func_80180F84
  ov_SC02_005    func_80185060 func_80185E80
  ov_SC02_011    func_80183630 func_8018418C func_80188E3C
This commit is contained in:
Drew T
2026-09-02 18:38:30 -06:00
parent f2f3103691
commit 797cb97cb7
15 changed files with 4478 additions and 303 deletions
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config/overlays.mk
+7 -5
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@@ -868,7 +868,7 @@ ov_SC02_005_ELF := $(ov_SC02_005_OUT).elf
ov_SC02_005_MAPFILE := $(ov_SC02_005_OUT).map
ov_SC02_005_LD_SCRIPT := $(ov_SC02_005_OUT).ld
ov_SC02_005_SPLAT_YAML := config/splat.ov_SC02_005.yaml
ov_SC02_005_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_005.o,ov_SC02_005_jr_8012ACE0.o,tail2.data.o,ov_SC02_005_jr_80135888.o,tail3.data.o,ov_SC02_005_jr_80135A4C.o,tail4.data.o,ov_SC02_005_jr_80135D20.o,tail5.data.o,ov_SC02_005_jr_801380E0.o,ov_SC02_005_o0c.o,tail6.data.o,ov_SC02_005_jr_8013F350.o,tail7.data.o,ov_SC02_005_jr_8013FFD8.o,tail8.data.o,ov_SC02_005_jr_80140608.o,tail9.data.o,ov_SC02_005_jr_8015444C.o,ov_SC02_005_jr_80154C24.o,ov_SC02_005_jr_801588CC.o,ov_SC02_005_jr_80159C84.o,tail10.data.o,ov_SC02_005_jr_8015A3C8.o,tail11.data.o,ov_SC02_005_jr_8015AE2C.o,tail12.data.o,ov_SC02_005_jr_8015C32C.o,tail13.data.o,ov_SC02_005_jr_8016AB6C.o,tail14.data.o,ov_SC02_005_jr_80171B4C.o,ov_SC02_005_jr_801734BC.o,tail15.data.o,ov_SC02_005_jr_801789AC.o,ov_SC02_005_jr_80178D40.o,tail16.data.o,ov_SC02_005_jr_8017A4AC.o,tail17.data.o,ov_SC02_005_jr_8017AE2C.o,tail18.data.o,ov_SC02_005_jr_8017CF90.o,tail19.data.o,ov_SC02_005_jr_80181984.o,ov_SC02_005_jr_80181D30.o,tail20.data.o,ov_SC02_005_jr_8018EA04.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
ov_SC02_005_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_005.o,ov_SC02_005_jr_8012ACE0.o,tail2.data.o,ov_SC02_005_jr_80135888.o,tail3.data.o,ov_SC02_005_jr_80135A4C.o,tail4.data.o,ov_SC02_005_jr_80135D20.o,tail5.data.o,ov_SC02_005_jr_801380E0.o,ov_SC02_005_o0c.o,tail6.data.o,ov_SC02_005_jr_8013F350.o,tail7.data.o,ov_SC02_005_jr_8013FFD8.o,tail8.data.o,ov_SC02_005_jr_80140608.o,tail9.data.o,ov_SC02_005_jr_8015444C.o,ov_SC02_005_jr_80154C24.o,ov_SC02_005_jr_801588CC.o,ov_SC02_005_jr_80159C84.o,tail10.data.o,ov_SC02_005_jr_8015A3C8.o,tail11.data.o,ov_SC02_005_jr_8015AE2C.o,tail12.data.o,ov_SC02_005_jr_8015C32C.o,tail13.data.o,ov_SC02_005_jr_8016AB6C.o,tail14.data.o,ov_SC02_005_jr_80171B4C.o,ov_SC02_005_jr_801734BC.o,tail15.data.o,ov_SC02_005_jr_801789AC.o,ov_SC02_005_jr_80178D40.o,tail16.data.o,ov_SC02_005_jr_8017A4AC.o,tail17.data.o,ov_SC02_005_jr_8017AE2C.o,tail18.data.o,ov_SC02_005_jr_8017CF90.o,tail19.data.o,ov_SC02_005_jr_80181984.o,ov_SC02_005_jr_80181D30.o,tail20.data.o,ov_SC02_005_jr_80185060.o,tail21.data.o,ov_SC02_005_jr_80185E80.o,tail22.data.o,ov_SC02_005_jr_8018EA04.o,tail23.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
build/src/ov_SC02_005/ov_SC02_005.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
build/src/ov_SC02_005/ov_SC02_005_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
build/src/ov_SC02_005/ov_SC02_005_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
@@ -903,7 +903,7 @@ ov_SC02_011_ELF := $(ov_SC02_011_OUT).elf
ov_SC02_011_MAPFILE := $(ov_SC02_011_OUT).map
ov_SC02_011_LD_SCRIPT := $(ov_SC02_011_OUT).ld
ov_SC02_011_SPLAT_YAML := config/splat.ov_SC02_011.yaml
ov_SC02_011_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_011.o,ov_SC02_011_jr_8012ACE0.o,tail2.data.o,ov_SC02_011_jr_80135888.o,tail3.data.o,ov_SC02_011_jr_80135A4C.o,tail4.data.o,ov_SC02_011_jr_80135D20.o,tail5.data.o,ov_SC02_011_jr_801380E0.o,ov_SC02_011_o0c.o,tail6.data.o,ov_SC02_011_jr_8013F350.o,tail7.data.o,ov_SC02_011_jr_8013FFD8.o,tail8.data.o,ov_SC02_011_jr_80140608.o,tail9.data.o,ov_SC02_011_jr_8015444C.o,ov_SC02_011_jr_80154C24.o,ov_SC02_011_jr_801588CC.o,ov_SC02_011_jr_80159C84.o,tail10.data.o,ov_SC02_011_jr_8015A3C8.o,tail11.data.o,ov_SC02_011_jr_8015AE2C.o,tail12.data.o,ov_SC02_011_jr_8015C32C.o,tail13.data.o,ov_SC02_011_jr_8016AB6C.o,tail14.data.o,ov_SC02_011_jr_80171B4C.o,ov_SC02_011_jr_801734BC.o,tail15.data.o,ov_SC02_011_jr_801789AC.o,ov_SC02_011_jr_80178D40.o,tail16.data.o,ov_SC02_011_jr_8017A4AC.o,tail17.data.o,ov_SC02_011_jr_8017AE2C.o,tail18.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
ov_SC02_011_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_011.o,ov_SC02_011_jr_8012ACE0.o,tail2.data.o,ov_SC02_011_jr_80135888.o,tail3.data.o,ov_SC02_011_jr_80135A4C.o,tail4.data.o,ov_SC02_011_jr_80135D20.o,tail5.data.o,ov_SC02_011_jr_801380E0.o,ov_SC02_011_o0c.o,tail6.data.o,ov_SC02_011_jr_8013F350.o,tail7.data.o,ov_SC02_011_jr_8013FFD8.o,tail8.data.o,ov_SC02_011_jr_80140608.o,tail9.data.o,ov_SC02_011_jr_8015444C.o,ov_SC02_011_jr_80154C24.o,ov_SC02_011_jr_801588CC.o,ov_SC02_011_jr_80159C84.o,tail10.data.o,ov_SC02_011_jr_8015A3C8.o,tail11.data.o,ov_SC02_011_jr_8015AE2C.o,tail12.data.o,ov_SC02_011_jr_8015C32C.o,tail13.data.o,ov_SC02_011_jr_8016AB6C.o,tail14.data.o,ov_SC02_011_jr_80171B4C.o,ov_SC02_011_jr_801734BC.o,tail15.data.o,ov_SC02_011_jr_801789AC.o,ov_SC02_011_jr_80178D40.o,tail16.data.o,ov_SC02_011_jr_8017A4AC.o,tail17.data.o,ov_SC02_011_jr_8017AE2C.o,tail18.data.o,ov_SC02_011_jr_80183178.o,tail19.data.o,ov_SC02_011_jr_80188E3C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
build/src/ov_SC02_011/ov_SC02_011.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
build/src/ov_SC02_011/ov_SC02_011_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
build/src/ov_SC02_011/ov_SC02_011_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
@@ -917,6 +917,8 @@ build/src/ov_SC02_011/ov_SC02_011_jr_8015AE2C.o: JTBL_PADS := 0,4 # §8e pads (
build/src/ov_SC02_011/ov_SC02_011_jr_8016AB6C.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
build/src/ov_SC02_011/ov_SC02_011_jr_80178D40.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x178
build/src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.o: JTBL_PADS := 0,0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14,+0x2c
build/src/ov_SC02_011/ov_SC02_011_jr_80183178.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x30
build/src/ov_SC02_011/ov_SC02_011_jr_80188E3C.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
build/src/ov_SC02_011/ov_SC02_011_o0c.o: JTBL_PADS := 0,4,4,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x38,+0xa8,+0x118
ov_SC02_011_CHECK_SHA := config/check.ov_SC02_011.sha
ov_SC02_011_SYMBOLS := config/symbols.ov_SC02_011.txt
@@ -2414,7 +2416,7 @@ ov_SC03_105_ELF := $(ov_SC03_105_OUT).elf
ov_SC03_105_MAPFILE := $(ov_SC03_105_OUT).map
ov_SC03_105_LD_SCRIPT := $(ov_SC03_105_OUT).ld
ov_SC03_105_SPLAT_YAML := config/splat.ov_SC03_105.yaml
ov_SC03_105_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_105.o,ov_SC03_105_jr_8012ACE0.o,tail2.data.o,ov_SC03_105_jr_80135888.o,tail3.data.o,ov_SC03_105_jr_80135A4C.o,tail4.data.o,ov_SC03_105_jr_80135D20.o,tail5.data.o,ov_SC03_105_jr_801380E0.o,ov_SC03_105_o0c.o,tail6.data.o,ov_SC03_105_jr_8013F350.o,tail7.data.o,ov_SC03_105_jr_8013FFD8.o,tail8.data.o,ov_SC03_105_jr_80140608.o,tail9.data.o,ov_SC03_105_jr_8015444C.o,ov_SC03_105_jr_80154C24.o,ov_SC03_105_jr_801588CC.o,ov_SC03_105_jr_80159C84.o,tail10.data.o,ov_SC03_105_jr_8015A3C8.o,tail11.data.o,ov_SC03_105_jr_8015AE2C.o,tail12.data.o,ov_SC03_105_jr_8015C32C.o,tail13.data.o,ov_SC03_105_jr_8016AB6C.o,tail14.data.o,ov_SC03_105_jr_80171B4C.o,ov_SC03_105_jr_801734BC.o,tail15.data.o,ov_SC03_105_jr_801789AC.o,ov_SC03_105_jr_80178D40.o,tail16.data.o,ov_SC03_105_jr_8017A4AC.o,tail17.data.o,ov_SC03_105_jr_8017AE2C.o,tail18.data.o,ov_SC03_105_jr_8017C8D0.o,tail19.data.o,ov_SC03_105_jr_80186B24.o,ov_SC03_105_jr_80186DDC.o,tail20.data.o,ov_SC03_105_jr_80189798.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
ov_SC03_105_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_105.o,ov_SC03_105_jr_8012ACE0.o,tail2.data.o,ov_SC03_105_jr_80135888.o,tail3.data.o,ov_SC03_105_jr_80135A4C.o,tail4.data.o,ov_SC03_105_jr_80135D20.o,tail5.data.o,ov_SC03_105_jr_801380E0.o,ov_SC03_105_o0c.o,tail6.data.o,ov_SC03_105_jr_8013F350.o,tail7.data.o,ov_SC03_105_jr_8013FFD8.o,tail8.data.o,ov_SC03_105_jr_80140608.o,tail9.data.o,ov_SC03_105_jr_8015444C.o,ov_SC03_105_jr_80154C24.o,ov_SC03_105_jr_801588CC.o,ov_SC03_105_jr_80159C84.o,tail10.data.o,ov_SC03_105_jr_8015A3C8.o,tail11.data.o,ov_SC03_105_jr_8015AE2C.o,tail12.data.o,ov_SC03_105_jr_8015C32C.o,tail13.data.o,ov_SC03_105_jr_8016AB6C.o,tail14.data.o,ov_SC03_105_jr_80171B4C.o,ov_SC03_105_jr_801734BC.o,tail15.data.o,ov_SC03_105_jr_801789AC.o,ov_SC03_105_jr_80178D40.o,tail16.data.o,ov_SC03_105_jr_8017A4AC.o,tail17.data.o,ov_SC03_105_jr_8017AE2C.o,tail18.data.o,ov_SC03_105_jr_8017C8D0.o,tail19.data.o,ov_SC03_105_jr_8018624C.o,tail20.data.o,ov_SC03_105_jr_80186B24.o,ov_SC03_105_jr_80186DDC.o,tail21.data.o,ov_SC03_105_jr_80189798.o,tail22.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
build/src/ov_SC03_105/ov_SC03_105.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
build/src/ov_SC03_105/ov_SC03_105_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
build/src/ov_SC03_105/ov_SC03_105_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
@@ -3887,7 +3889,7 @@ ov_SC05_010_ELF := $(ov_SC05_010_OUT).elf
ov_SC05_010_MAPFILE := $(ov_SC05_010_OUT).map
ov_SC05_010_LD_SCRIPT := $(ov_SC05_010_OUT).ld
ov_SC05_010_SPLAT_YAML := config/splat.ov_SC05_010.yaml
ov_SC05_010_JTBL_INTERLEAVE := --order tail.data.o,ov_SC05_010.o,ov_SC05_010_jr_8012ACE0.o,tail2.data.o,ov_SC05_010_jr_80135888.o,tail3.data.o,ov_SC05_010_jr_80135A4C.o,tail4.data.o,ov_SC05_010_jr_80135D20.o,tail5.data.o,ov_SC05_010_jr_801380E0.o,ov_SC05_010_o0c.o,tail6.data.o,ov_SC05_010_jr_8013F350.o,tail7.data.o,ov_SC05_010_jr_8013FFD8.o,tail8.data.o,ov_SC05_010_jr_80140608.o,tail9.data.o,ov_SC05_010_jr_8015444C.o,ov_SC05_010_jr_80154C24.o,ov_SC05_010_jr_801588CC.o,ov_SC05_010_jr_80159C84.o,tail10.data.o,ov_SC05_010_jr_8015A3C8.o,tail11.data.o,ov_SC05_010_jr_8015AE2C.o,tail12.data.o,ov_SC05_010_jr_8015C32C.o,tail13.data.o,ov_SC05_010_jr_8016AB6C.o,tail14.data.o,ov_SC05_010_jr_80171B4C.o,ov_SC05_010_jr_801734BC.o,tail15.data.o,ov_SC05_010_jr_801789AC.o,ov_SC05_010_jr_80178D40.o,tail16.data.o,ov_SC05_010_jr_8017A4AC.o,tail17.data.o,ov_SC05_010_jr_8017AE2C.o,tail18.data.o,ov_SC05_010_jr_8017C8D0.o,tail19.data.o,ov_SC05_010_jr_80181CDC.o,tail20.data.o,ov_SC05_010_jr_8018473C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
ov_SC05_010_JTBL_INTERLEAVE := --order tail.data.o,ov_SC05_010.o,ov_SC05_010_jr_8012ACE0.o,tail2.data.o,ov_SC05_010_jr_80135888.o,tail3.data.o,ov_SC05_010_jr_80135A4C.o,tail4.data.o,ov_SC05_010_jr_80135D20.o,tail5.data.o,ov_SC05_010_jr_801380E0.o,ov_SC05_010_o0c.o,tail6.data.o,ov_SC05_010_jr_8013F350.o,tail7.data.o,ov_SC05_010_jr_8013FFD8.o,tail8.data.o,ov_SC05_010_jr_80140608.o,tail9.data.o,ov_SC05_010_jr_8015444C.o,ov_SC05_010_jr_80154C24.o,ov_SC05_010_jr_801588CC.o,ov_SC05_010_jr_80159C84.o,tail10.data.o,ov_SC05_010_jr_8015A3C8.o,tail11.data.o,ov_SC05_010_jr_8015AE2C.o,tail12.data.o,ov_SC05_010_jr_8015C32C.o,tail13.data.o,ov_SC05_010_jr_8016AB6C.o,tail14.data.o,ov_SC05_010_jr_80171B4C.o,ov_SC05_010_jr_801734BC.o,tail15.data.o,ov_SC05_010_jr_801789AC.o,ov_SC05_010_jr_80178D40.o,tail16.data.o,ov_SC05_010_jr_8017A4AC.o,tail17.data.o,ov_SC05_010_jr_8017AE2C.o,tail18.data.o,ov_SC05_010_jr_8017C8D0.o,tail19.data.o,ov_SC05_010_jr_80180F84.o,ov_SC05_010_jr_80181CDC.o,tail20.data.o,ov_SC05_010_jr_8018473C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
build/src/ov_SC05_010/ov_SC05_010.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
build/src/ov_SC05_010/ov_SC05_010_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
build/src/ov_SC05_010/ov_SC05_010_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
@@ -4593,7 +4595,7 @@ build/src/ov_SC06_029/ov_SC06_029_jr_80159C84.o: JTBL_PADS := 0,4 # §8e pads (
build/src/ov_SC06_029/ov_SC06_029_jr_8015AE2C.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
build/src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
build/src/ov_SC06_029/ov_SC06_029_jr_80178D40.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x178
build/src/ov_SC06_029/ov_SC06_029_jr_8017C954.o: JTBL_PADS := 0,0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20,+0x58
build/src/ov_SC06_029/ov_SC06_029_jr_8017C954.o: JTBL_PADS := 0,0,4,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20,+0x58,+0x90
build/src/ov_SC06_029/ov_SC06_029_o0c.o: JTBL_PADS := 0,4,4,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x38,+0xa8,+0x118
ov_SC06_029_CHECK_SHA := config/check.ov_SC06_029.sha
ov_SC06_029_SYMBOLS := config/symbols.ov_SC06_029.txt
config/splat.ov_SC02_005.yaml
+5 -1
View File
@@ -180,8 +180,12 @@ segments:
- [0xbacc8, .rodata, ov_SC02_005_jr_80181984] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xbace0, .rodata, ov_SC02_005_jr_80181D30] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xbad18, data, tail20]
- [0xbad20, .rodata, ov_SC02_005_jr_80185060] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xbad44, data, tail21]
- [0xbad78, .rodata, ov_SC02_005_jr_80185E80] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xbad98, data, tail22]
- [0xbae10, .rodata, ov_SC02_005_jr_8018EA04] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xbae38, data, tail21]
- [0xbae38, data, tail23]
- [0xBCB00, bin, trailing] # final 1 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
- [0xBCB01] # EOF marker = the 0.4.dec byte length
# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
config/splat.ov_SC02_011.yaml
+4
View File
@@ -173,6 +173,10 @@ segments:
- [0xc1c04, data, tail17]
- [0xc1c08, .rodata, ov_SC02_011_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xc1c48, data, tail18]
- [0xc1c88, .rodata, ov_SC02_011_jr_80183178] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xc1cd8, data, tail19]
- [0xc1ce4, .rodata, ov_SC02_011_jr_80188E3C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xc1d10, data, tail20]
- [0xC3924, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
- [0xC3927] # EOF marker = the 0.4.dec byte length
# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
config/splat.ov_SC03_105.yaml
+4 -2
View File
@@ -173,11 +173,13 @@ segments:
- [0x8fe70, data, tail18]
- [0x8ffa8, .rodata, ov_SC03_105_jr_8017C8D0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x8fff4, data, tail19]
- [0x90120, .rodata, ov_SC03_105_jr_8018624C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x90134, data, tail20]
- [0x90138, .rodata, ov_SC03_105_jr_80186B24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x90160, .rodata, ov_SC03_105_jr_80186DDC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x90188, data, tail20]
- [0x90188, data, tail21]
- [0x90190, .rodata, ov_SC03_105_jr_80189798] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x901a4, data, tail21]
- [0x901a4, data, tail22]
- [0x94BC4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
- [0x94BC7] # EOF marker = the 0.4.dec byte length
# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
config/splat.ov_SC05_010.yaml
+2
View File
@@ -121,6 +121,7 @@ segments:
- [0x52354, c, ov_SC05_010_jr_8017A4AC]
- [0x52cd4, c, ov_SC05_010_jr_8017AE2C]
- [0x54778, c, ov_SC05_010_jr_8017C8D0]
- [0x58e2c, c, ov_SC05_010_jr_80180F84]
- [0x59b84, c, ov_SC05_010_jr_80181CDC]
- [0x5c5e4, c, ov_SC05_010_jr_8018473C]
- [0x607fc, data, tail]
@@ -167,6 +168,7 @@ segments:
- [0x9d80c, data, tail18]
- [0x9d944, .rodata, ov_SC05_010_jr_8017C8D0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x9d9a4, data, tail19]
- [0x9d9d4, .rodata, ov_SC05_010_jr_80180F84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x9d9f4, .rodata, ov_SC05_010_jr_80181CDC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x9da28, data, tail20]
- [0x9da34, .rodata, ov_SC05_010_jr_8018473C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
config/splat.ov_SC06_029.yaml
+1 -1
View File
@@ -164,7 +164,7 @@ segments:
- [0xb3468, .rodata, ov_SC06_029_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xb347c, data, tail18]
- [0xb35b4, .rodata, ov_SC06_029_jr_8017C954] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xb3640, data, tail19]
- [0xb3678, data, tail19]
- [0xBA034, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
- [0xBA037] # EOF marker = the 0.4.dec byte length
# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
src/ov_SC02_005/ov_SC02_005_jr_80185060.c
+61 -1
View File
@@ -2,7 +2,67 @@
#include "../shared/engine_core.h"
#include "ov_SC02_005_shared.h"
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_80185060", func_80185060);
#include "common.h"
extern void func_80187280(s32 a0, s32 a1);
extern void func_80189F64(void);
extern void func_801876B0(s32 arg0);
extern void func_80187664(s32 arg0);
extern void func_8012AD44(s32 *a0, s16 a1);
extern u16 D_801E4BBC;
extern s32 D_801E43D0[];
void func_80185060(s32 a0, s32 a1)
{
u16 t;
s32 flag;
t = *(u16 *)(a0 + 0x70) + 1;
func_80187280(a0, t);
*(u8 *)(a0 + 0xC1) = 0;
*(s32 *)(a0 + 0xDC) = 1;
if (*(s16 *)(a0 + 0x104) == 0) {
*(s16 *)(a0 + 0x104) = (s16)a1;
}
flag = 0;
switch ((s16)(*(u16 *)(a0 + 0x70) - 3)) {
case 0:
*(u32 *)(*(s32 *)(a0 + 0xCC) + 0xE8) |= 0x2000;
func_80189F64();
flag = 1;
break;
case 5:
case 7:
*(u16 *)(D_801E43D0[*(s16 *)(a0 + 0x70)] + 0x5C) = 0x8800;
break;
case 6:
*(u32 *)(*(s32 *)(a0 + 0x64) + 0xE8) |= 0x20000;
break;
case 8:
*(u32 *)(*(s32 *)(a0 + 0x64) + 0xE8) |= 0x40000;
break;
}
if (flag) {
*(s16 *)(a0 + 0x100) = 0x18;
if (a1 != 0) {
func_801876B0(a0);
}
} else {
*(s16 *)(a0 + 0x100) = 0x10;
if (a1 != 0) {
func_80187664(a0);
}
if (D_801E4BBC == 0) {
*(s16 *)(*(s32 *)(a0 + 0xCC) + 0xFE) += 1;
}
}
*(s16 *)(a0 + 0xAE) = -1;
func_8012AD44((s32 *)a0, 2);
}
extern void func_8012AD44(s32 *a0, s16 a1);
src/ov_SC02_005/ov_SC02_005_jr_80185E80.c
+115 -1
View File
@@ -2,7 +2,121 @@
#include "../shared/engine_core.h"
#include "ov_SC02_005_shared.h"
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_80185E80", func_80185E80);
#include "common.h"
extern u16 D_801E4BBC;
extern s32 D_801959E0[];
extern s32 D_801E43A0;
extern s32 func_801860F4();
extern s32 func_8018AD20(s32 a0);
extern s32 func_8018AC48(s32 a0);
extern s32 func_80186144(void *a0, s32 a1);
s16 func_80185E80(s32 arg0) {
u16 *p;
s32 flag;
s32 res;
s32 flags;
u16 val;
u16 var;
s16 nxt;
s16 i;
p = (u16 *)D_801959E0[D_801E4BBC];
if (*(s16 *)(arg0 + 0x100) != 0) {
goto ret0;
}
if (*(s32 *)(arg0 + 0xE8) & 0x200) {
goto ret0;
}
var = p[*(s16 *)(arg0 + 0x102) * 2 + 1];
flag = var & 0x100;
var = var & 0xFF;
switch ((s16)(var - 2)) {
case 0:
if (func_801860F4(arg0, (s16)var) != 0) {
if (D_801E43A0 & 0x2000) {
var = 0;
}
} else {
var = 0;
}
break;
case 1:
res = func_8018AD20(arg0);
*(s16 *)(arg0 + 0xE0) = res;
if ((s16)res < 0) {
var = 0;
}
break;
case 2:
res = func_8018AC48(arg0);
*(s16 *)(arg0 + 0xE0) = res;
if ((s16)res < 0) {
var = 1;
}
break;
case 7:
res = func_80186144((void *)arg0, 9);
*(s16 *)(arg0 + 0xE0) = res;
if ((s16)res < 0) {
var = 1;
}
break;
case 3:
if (*(s32 *)(arg0 + 0xE8) & 0x408) {
var = 0;
}
break;
case 4:
case 5:
if ((*(s32 *)(arg0 + 0xE8) & 0x800) == 0) {
if (*(s16 *)(arg0 + 0x76) < 0x81) {
var = 0;
}
}
break;
case 6:
flags = *(s32 *)(arg0 + 0xE8);
if (flags & 0x800) {
var = 0;
break;
}
if ((flags & 0x400) == 0) {
if ((flags & 0xA) != 2) {
goto ret0;
}
*(u16 *)(arg0 + 0xFE) = *(u16 *)(arg0 + 0xFE) + 1;
goto ret0;
}
res = func_80186144((void *)arg0, 8);
*(s16 *)(arg0 + 0xE0) = res;
if ((s16)res < 0) {
var = 6;
}
break;
}
i = *(u16 *)(arg0 + 0x102) + 1;
*(u16 *)(arg0 + 0x102) = i;
nxt = ((s16 *)p)[i * 2];
if (nxt == -1) {
val = D_801E4BBC;
*(s16 *)(arg0 + 0x102) = 0;
val = *(u16 *)D_801959E0[val];
*(u16 *)(arg0 + 0x100) = val;
} else {
*(u16 *)(arg0 + 0x100) = nxt;
}
if (flag != 0) {
if ((*(s32 *)(arg0 + 0xE8) & 0xA) == 2) {
*(u16 *)(arg0 + 0xFE) = *(u16 *)(arg0 + 0xFE) + 1;
}
}
return var;
ret0:
return 0;
}
extern s32 func_80132E6C(s16 *a0);
extern s16 D_80126CB8;
src/ov_SC02_011/ov_SC02_011_jr_80183178.c
+249 -2
View File
@@ -65,7 +65,133 @@ extern void func_8018452C();
}
INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_80183178", func_80183630);
#include "common.h"
extern void func_8012B23C(s32 a0);
extern void func_8012B14C(s32 a0, s32 a1);
extern void func_8012A828(s32 a0, void *a1);
extern s32 func_8012BEE8(s32 a0);
extern void *D_80195144;
void func_80183630(s32 a0) {
extern s32 func_801845F4();
extern void func_8018487C(s32 a0);
extern s32 func_80183954(s32 a0);
extern s32 func_80183B30(s32 a0, s32 a1);
extern s32 func_80183994(s32 a0, s32 a1);
extern void func_8012B178(s32 a0, s32 a1);
extern void func_8012B2CC(s32 a0);
extern s32 func_8012CBCC(s32 a0);
extern void func_8012CC1C(s32 arg0, s32 arg1);
extern void func_8002D4C8(s32 a0, s32 a1);
extern void func_8013C9C4(void *a0);
extern void func_8012B200(u8 *a0);
extern void func_8012AD80(s32 a0);
extern void func_8012B260(u8 *a0);
extern void func_8018452C();
extern s32 D_801955F0;
extern u8 D_801F3EFC[];
extern u8 D_801F3FA4[];
extern u8 D_801F41DC[];
extern u8 D_801F3EA4[];
extern u8 D_80195120[];
extern u8 D_80195184[];
if (func_801845F4() == 1) {
return;
}
switch (*(u16 *)(a0 + 0x34)) {
case 0:
func_8018487C(a0);
D_801955F0 = func_80183954(a0);
if (func_80183B30(a0, D_801955F0) == 1) {
*(s16 *)(a0 + 0x34) = 8;
return;
}
if (func_80183994(a0, D_801955F0) != 1) {
return;
}
*(s16 *)(a0 + 0x34) = 3;
return;
case 1:
*(s32 *)(a0 + 0x1C) = 0x1E;
*(s16 *)(a0 + 0x34) = 2;
case 2:
if (func_80183994(a0, D_801955F0) == 1) {
*(s16 *)(a0 + 0x34) = 3;
return;
}
if (func_8012BEE8(a0) != 0) {
*(s16 *)(a0 + 0x34) = 0;
func_8012A828(a0, D_801F3EFC);
*(s32 *)(a0 + 0x1C) = 0x2D;
}
return;
case 3:
func_8012B23C(a0);
func_8012B178(a0, 0xA0000);
*(s16 *)(a0 + 0x34) = 4;
return;
case 4:
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) -= 0x20;
if (*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) < -0x400) {
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = -0x400;
}
if (func_8012CBCC(a0) & 0x2000) {
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = -0x400;
*(s32 *)(a0 + 0x1C) = 0x1E;
*(s16 *)(a0 + 0x34) = 5;
func_8002D4C8(0xB09, 0);
func_8013C9C4(D_80195184);
}
return;
case 5:
if (func_8012BEE8(a0) != 0) {
*(s16 *)(a0 + 0x34) = 6;
}
return;
case 6:
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) += 0x80;
if (*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) >= 0) {
func_8012B2CC(a0);
func_8012B23C(a0);
func_8012B178(a0, 0xFFFC8000);
func_8012A828(a0, D_801F3FA4);
*(s16 *)(a0 + 0x34) = 7;
}
return;
case 7:
if (((s32 (*)(s32, s32))func_8012CC1C)(a0, (s32)&D_80195144) & 0x8000) {
*(s16 *)(a0 + 0x34) = 0;
func_8018452C(a0);
*(s32 *)(a0 + 0xDC) &= ~0x10;
}
return;
case 8:
func_8012A828(a0, D_801F41DC);
*(s32 *)(a0 + 0x1C) = 0x14;
*(s16 *)(a0 + 0x34) = 9;
return;
case 9:
if (func_8012BEE8(a0) != 0) {
*(s16 *)(a0 + 0x34) = 0xA;
*(s16 *)(a0 + 0x98) = 0;
}
return;
case 10:
func_8012A828(a0, D_801F3EA4);
func_8012B200((u8 *)a0);
func_8012B14C(a0, (s32)D_80195120);
func_8012AD80(a0);
func_8012B23C(a0);
func_8012B260((u8 *)a0);
*(s16 *)(a0 + 0x34) = 0xB;
*(s32 *)(a0 + 0x1C) = 0x10;
*(s32 *)(a0 + 0xDC) = (*(s32 *)(a0 + 0xDC) & ~0x20) | 0x48;
return;
}
}
extern void func_8012AD80(s32 a0);
@@ -346,7 +472,128 @@ void func_80184134(s32 param_1) {
}
INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_80183178", func_8018418C);
/* Declarations: the five names already at file scope above (func_8012B23C L15,
* func_8012B14C L16, func_8012A828 L17, func_8012BEE8 L36, func_80184738 L335)
* are NOT redeclared. Every new name is spelled exactly as this TU already
* spells it further down (func_8012CBCC L813/L862, func_8013C9C4 L2566,
* func_801439C0 L1885, func_80178D18 L2586, func_8001AAD0 L818/L865,
* func_80172658 L369/L443, D_80126B58 L371/L1271/L3304) so the duplicate
* declarations are identical; the rest follow the fleet canon. The
* engine_core.h hits for these symbols are all inside DEFINE_ macros
* (block scope), so they cannot conflict at file scope.
*
* CODEGEN NOTE — the one non-obvious lever (REGALLOC-PERM/$v0>$v1>$v0, 3 ins).
* Case 1, case 5 and the case-2 clamp-hit arm all reach the SAME
* `(*(u16 *)(s0+0x34))++` tail at 0x80184304. Writing case 2's arm as a
* `goto` into that shared tail compiles to the right instruction sequence but
* allocates the post-call block's constant/pointer pair as $v1/$v0 instead of
* the target's $v0/$v1. Writing the increment out LONGHAND in case 2 instead
* matches: gcc-2.7.2 runs the cross-jumping `jump_optimize` pass AFTER
* register allocation, so the duplicated tail is allocated in its own block
* (giving the target's registers) and only then merged back into the shared
* `j 0x80184304`. Both forms emit 162 instructions; only the duplicated form
* is byte-identical. (Cookbook §176-B's law — "1-4 off is usually NOT
* register allocation" — with a new lever: a shared tail reached by `goto`
* vs. duplicated in the source is a REGALLOC dial, not just a jump dial.) */
extern s32 func_8012CBCC(s32 a0);
extern void func_8012CC1C(s32 arg0, s32 arg1);
extern void func_8012E8C4(u8 *a0);
extern void func_8013C9C4(void *a0);
extern s32 func_80172658(s32 *a0);
extern s32 func_801439C0(s32 a0);
extern s32 func_801789AC(s32 a0);
extern void func_80178D18(void);
extern void func_8001AAD0(s32 a0, s32 a1);
extern void func_8001931C(void);
extern s32 D_80126B58;
extern s32 D_80195138;
extern u8 D_8019514C[];
extern u8 D_80195184[];
extern s16 D_801EBA7C;
extern u8 D_801F4654[];
void func_8018418C(s32 a0) {
s32 s0 = a0;
switch (*(u16 *)(s0 + 0x34)) {
case 0:
break;
case 1:
func_8012B23C(s0);
goto incr;
case 2:
*(s16 *)(*(s32 *)(s0 + 0x20) + 0x10) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x10) - 0x20;
if (*(s16 *)(*(s32 *)(s0 + 0x20) + 0x10) < -0x400) {
*(s16 *)(*(s32 *)(s0 + 0x20) + 0x10) = -0x400;
}
if (func_8012CBCC(s0) & 0x2000) {
*(s16 *)(*(s32 *)(s0 + 0x20) + 0x10) = -0x400;
*(s32 *)(s0 + 0x1C) = 0x3C;
func_8013C9C4(D_80195184);
/* longhand on purpose — see CODEGEN NOTE; cross-jumped into 0x80184304 */
*(u16 *)(s0 + 0x34) = *(u16 *)(s0 + 0x34) + 1;
}
break;
case 3:
func_8012E8C4((u8 *)s0);
if (func_8012BEE8(s0) != 0) {
D_801EBA7C = 3;
*(s16 *)(s0 + 0x34) = 0;
func_8001931C();
if (*(s32 *)(s0 + 0xD0) != 0) {
func_801439C0(*(s32 *)(s0 + 0xD0));
}
}
break;
case 4:
if (func_80172658(&D_80126B58) != 0) {
D_801EBA7C = 3;
*(s16 *)(s0 + 0x34) = 0;
func_8001931C();
}
break;
case 5:
if ((*(u16 *)(s0 + 0x5C) & 1) == 0) {
break;
}
*(u16 *)(s0 + 0x5C) = *(u16 *)(s0 + 0x5C) & 0xFFFE;
*(s16 *)(s0 + 0x98) = 0;
func_8012B23C(s0);
func_8012B14C(s0, (s32)&D_80195138);
func_8001AAD0(1, 0x4331);
incr:
*(u16 *)(s0 + 0x34) = *(u16 *)(s0 + 0x34) + 1;
break;
case 6:
if ((((s32 (*)(s32, s32))func_8012CC1C)(s0, (s32)D_8019514C) & 0x2000) == 0) {
*(u16 *)(s0 + 0x34) = *(u16 *)(s0 + 0x34) + 1;
func_8012B23C(s0);
func_8012A828(s0, D_801F4654);
}
break;
case 7:
*(s16 *)(*(s32 *)(s0 + 0x20) + 0x10) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x10) + 0x20;
if (*(s16 *)(*(s32 *)(s0 + 0x20) + 0x10) > 0x400) {
*(s16 *)(*(s32 *)(s0 + 0x20) + 0x10) = 0x400;
}
if (func_8012CBCC(s0) & 0x2000) {
*(s16 *)(*(s32 *)(s0 + 0x20) + 0x10) = 0x400;
*(s32 *)(s0 + 0x1C) = 0x3C;
*(s16 *)(s0 + 0x34) = 3;
func_8013C9C4(D_80195184);
}
break;
}
if (func_801789AC(s0) == 1) {
((void (*)(s32))func_80178D18)(s0);
*(s16 *)(s0 + 2) = 0xE;
func_80184738(0);
}
}
#include "common.h"
src/ov_SC02_011/ov_SC02_011_jr_80188E3C.c
+92 -1
View File
@@ -9,7 +9,98 @@
* config/splat.ov_SC02_011.yaml and cookbook §426/§431. Declarations shared with the sibling
* TUs live in src/ov_SC02_011/ov_SC02_011_shared.h. */
INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_80188E3C", func_80188E3C);
#include "common.h"
extern s32 func_8012B8E4(s32 a0, s32 a1);
extern s32 func_8012BD3C(s32 a0, s32 a1, s32 a2);
extern s32 func_8012BEE8(s32 a0);
extern s32 func_8012D5E4(s32 a0, s32 a1, s32 a2, s32 a3);
extern void func_8012A828(s32 a0, void *a1);
extern void func_801890C8(s32 a0);
extern u8 D_801960A0[];
extern u8 D_801D3ACC[];
extern s16 D_801D3B74;
extern s16 D_801D3F84;
extern s16 D_801D458C;
void func_80188E3C(s32 a0) {
s32 v0;
s32 v1;
switch (*(u16 *)(a0 + 0x34)) {
case 0:
v1 = *(s32 *)(a0 + 0x1C);
v0 = 7;
goto cmpA;
case 1:
v0 = func_8012B8E4(a0, 6);
v1 = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + v0;
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) = v1;
break;
case 2:
v1 = *(s32 *)(a0 + 0x1C);
v0 = 0xA;
cmpA:
if (v1 == v0) {
func_8012D5E4(a0, (s32)D_801960A0, (s32)(D_801960A0 + 8), 0xB);
}
break;
case 3:
if (*(s32 *)(a0 + 0x1C) == 0xB) {
func_8012D5E4(a0, (s32)D_801960A0, (s32)(D_801960A0 + 8), 0x11);
}
break;
case 4:
v0 = func_8012B8E4(a0, 6);
v1 = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + v0;
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) = v1;
if (*(s32 *)(a0 + 0x1C) == 0xC) {
func_801890C8(a0);
}
break;
}
if (func_8012BEE8(a0) != 0) {
switch (*(u16 *)(a0 + 0x34)) {
case 0:
if (func_8012BD3C(a0, 0x400, 0x4000) != 0) {
*(u16 *)(a0 + 0x34) = 1;
func_8012A828(a0, D_801D3ACC);
*(s32 *)(a0 + 0x1C) = 0xA;
} else {
*(u16 *)(a0 + 0x2) = 2;
*(u16 *)(a0 + 0x34) = 0;
func_8012A828(a0, &D_801D3B74);
}
break;
case 1:
*(u16 *)(a0 + 0x34) = 2;
*(s32 *)(a0 + 0x1C) = 0x18;
func_8012A828(a0, &D_801D3F84);
break;
case 2:
*(u16 *)(a0 + 0x2) = 2;
*(u16 *)(a0 + 0x34) = 0;
func_8012A828(a0, &D_801D3B74);
break;
case 3:
break;
case 4:
v0 = *(u16 *)(a0 + 0x100);
v0 -= 1;
*(u16 *)(a0 + 0x100) = v0;
if ((v0 << 16) == 0) {
*(u16 *)(a0 + 0x2) = 8;
func_8012A828(a0, &D_801D458C);
} else {
*(s32 *)(a0 + 0x1C) = 0x1E;
}
break;
}
}
}
extern void func_8012A828(s32 a0, void *a1);
extern void func_8012B200(u8 *a0);
src/ov_SC03_105/ov_SC03_105_jr_8018624C.c
+113 -1
View File
@@ -67,7 +67,119 @@ void func_8018676C(s32 a0) {
}
INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105_jr_8018624C", func_801867D0);
#include "common.h"
/* §379/§30 — the `+= 1` on 0x34 must be a COMPONENT_REF (MEM_IN_STRUCT_P `/s`) so
* sched1 may hoist the fixed-address D_801BCBBC load above the varying-address
* `sh 0x34($s0)` store. A plain `*(u16 *)(s0 + 0x34)` cast denies `/s`, the
* true_dependence drop clause never fires, and the block costs two load-delay
* nops (the whole function's LENGTH-DRIFT/2). */
struct Ctr34 {
u16 h;
};
extern void func_8013C9C4(void *a0);
extern void func_801871C0(void *a0, s32 a1, s32 a2);
extern void func_8002D4C8(s32 a0, s32 a1);
extern s32 func_8012E544(s32 a0);
extern void func_8012A828(s32 a0, void *a1);
extern void func_80187434(void *a0);
extern void func_801870B4(void);
extern s32 func_8012BEE8(s32 a0);
extern s32 D_801BCBBC;
extern u8 D_8018EDF4[];
extern u8 D_8018AAA4[];
extern u8 D_801B2E28[];
extern u8 D_801B2FC0[];
extern u8 D_8018EACC[];
extern u8 D_8018EC24[];
extern u8 D_8018E9BC[];
extern u8 D_8018EAA4[];
void func_801867D0(s32 a0)
{
s32 s0 = a0;
s32 v0;
switch (*(u16 *)(s0 + 0x34)) {
case 0:
if (*(u32 *)(s0 + 0x94) < 0x1F && (*(s32 *)(s0 + 0x1C) & 3) == 0) {
func_8013C9C4(D_8018EDF4);
func_801871C0((void *)s0, 2, 2);
}
if (*(s32 *)(s0 + 0x94) == 0x13) {
func_8002D4C8(0xBC2, 0);
}
if (*(s32 *)(s0 + 0x94) == 0x24) {
func_8002D4C8(0xBC3, 0);
}
if (*(s32 *)(s0 + 0x94) == 0x32) {
func_8013C9C4(D_8018AAA4);
func_801871C0((void *)s0, 10, 5);
}
if (func_8012E544(0x222) == 0) {
func_8012A828(s0, D_801B2E28);
func_8012A828(*(s32 *)(s0 + 0x6C), D_801B2FC0);
((struct Ctr34 *)(s0 + 0x34))->h = ((struct Ctr34 *)(s0 + 0x34))->h + 1;
D_801BCBBC = D_801BCBBC + 1;
return;
}
*(s32 *)(s0 + 0x1C) = *(s32 *)(s0 + 0x1C) + 1;
if (*(s32 *)(s0 + 0x1C) >= 0x12C) {
v0 = func_8012E544(0x222);
if (v0 != 0) {
*(s16 *)(v0 + 0x100) = 1;
}
func_8012A828(s0, D_8018EACC);
func_8012A828(*(s32 *)(s0 + 0x6C), D_8018EC24);
*(u16 *)(s0 + 0x34) = 2;
}
return;
case 1:
if (*(s32 *)(s0 + 0x94) == 0x14) {
func_8013C9C4(D_8018AAA4);
func_801871C0((void *)s0, 10, 5);
func_80187434((void *)s0);
func_8002D4C8(0xC8F, 0);
}
if (*(s16 *)(s0 + 0x98) != 0) {
return;
}
if (D_801BCBBC < 3) {
*(s16 *)(s0 + 2) = 6;
} else {
*(s16 *)(s0 + 2) = 8;
}
return;
case 2:
if (*(s16 *)(s0 + 0x98) != 0) {
return;
}
func_8012A828(s0, D_8018E9BC);
func_8012A828(*(s32 *)(s0 + 0x6C), D_8018EAA4);
*(s16 *)(*(s32 *)(s0 + 0xCC) + 2) = 1;
func_8002D4C8(0x72F, 0);
*(s32 *)(s0 + 0x1C) = 0xA0;
*(u16 *)(s0 + 0x34) = *(u16 *)(s0 + 0x34) + 1;
return;
case 3:
if (*(s32 *)(s0 + 0x1C) == 0x64) {
*(s32 *)(*(s32 *)(*(s32 *)(s0 + 0xCC) + 0x20) + 4) &= 0x7FFFFFFF;
func_801870B4();
*(u16 *)(s0 + 0x34) = *(u16 *)(s0 + 0x34) + 1;
}
/* fall through */
case 4:
if (func_8012BEE8(s0) != 0) {
*(s16 *)(s0 + 2) = 3;
*(s16 *)(*(s32 *)(s0 + 0xCC) + 2) = 2;
*(s32 *)(s0 + 0x1C) = 0x5A;
func_8002D4C8(4, 0x72F);
}
break;
}
}
extern s32 func_80178B18(s32, s32);
src/ov_SC05_010/ov_SC05_010_jr_8017C8D0.c
-286
View File
@@ -5085,289 +5085,3 @@ void func_80180E28(s32 param_1)
}
func_8012B370(param_1);
}
INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_jr_8017C8D0", func_80180F84);
extern void (*D_80192854[])(void);
void func_801813F4(s32 arg0) {
D_80192854[*(u16 *)(arg0 + 2)]();
if (*(u16 *)arg0 != 0) {
*(u16 *)(arg0 + 0xFC) &= 0xFFF;
*(s16 *)(*(s32 *)(arg0 + 0x20) + 0x18) = 0x1000 - (func_80047948(*(s16 *)(arg0 + 0xFC)) >> 3);
*(s16 *)(*(s32 *)(arg0 + 0x20) + 0x1A) = (func_80047948(*(s16 *)(arg0 + 0xFC)) >> 3) + 0x1000;
*(s16 *)(*(s32 *)(arg0 + 0x20) + 0x1C) = (func_80047948(*(s16 *)(arg0 + 0xFC)) >> 3) + 0x1000;
}
}
extern void func_800599B8(void *a0, void *a1);
extern void func_8012C218(void *a0);
extern void func_8002A520(void *a0);
extern void func_8002A790(void *a0);
extern u8 D_80192480[];
extern u8 D_80192488[];
extern u8 D_80192860[];
extern void *D_801C39FC[];
extern void *D_801C3A00[];
extern volatile s32 D_801C7E30;
extern s32 D_801C7E64;
void func_801814AC(s32 param_1) {
volatile s32 pad1;
volatile s32 pad2;
s32 var;
u8 t;
func_8016AA50(param_1, *(s16 *)(param_1 + 0x60));
if (*(u16 *)(param_1 + 0x82) & 1) {
func_8016B428(param_1);
func_80019064(D_80192860);
}
*(s32 *)(param_1 + 0x1C) = 10;
*(u16 *)(param_1 + 0x5C) = 0;
*(u16 *)(param_1 + 0x76) = *(u16 *)(param_1 + 0x76) - *(u16 *)(param_1 + 0x60);
*(u16 *)(D_801C7E30 + 0x34) = 0;
*(u16 *)(D_801C7E30 + 2) = 9;
*(u8 *)(D_801C7E30 + 0xC2) = 0xE;
var = D_801C7E30;
t = (*(u8 *)(var + 0xC2) + 2) & 0xF;
*(u8 *)(var + 0xC2) = t;
func_800599B8(D_80192480, D_801C39FC[t]);
func_800599B8(D_80192488, D_801C3A00[*(u8 *)(var + 0xC2)]);
if (D_801C7E64 != 0) {
func_8012C218(D_801C7E64);
}
if (*(u16 *)(D_801C7E30 + 0x70) & 1) {
func_8002D4C8(4, 0x89F);
*(u16 *)(D_801C7E30 + 0x70) &= 0xFFFE;
}
func_8002D4C8(0x8A0, 0);
if (*(u8 *)(param_1 + 0x5E) != 0x1D) {
if (*(u8 *)(param_1 + 0xC8) != 0) {
func_8002A520(param_1);
}
if (*(u8 *)(param_1 + 0xC9) != 0) {
func_8002A790(param_1);
}
}
}
#define gte_SetRotMatrix(r0) __asm__ volatile ( \
"lw $12, 0( %0 );" \
"lw $13, 4( %0 );" \
"ctc2 $12, $0;" \
"ctc2 $13, $1;" \
"lw $12, 8( %0 );" \
"lw $13, 12( %0 );" \
"lw $14, 16( %0 );" \
"ctc2 $12, $2;" \
"ctc2 $13, $3;" \
"ctc2 $14, $4" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
#define gte_SetTransMatrix(r0) __asm__ volatile ( \
"lw $12, 20( %0 );" \
"lw $13, 24( %0 );" \
"ctc2 $12, $5;" \
"lw $14, 28( %0 );" \
"ctc2 $13, $6;" \
"ctc2 $14, $7" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
extern void RotTransSV(void *a0, void *a1, void *a2);
extern s32 RotTransPers(s32 a0, s32 a1, s32 *a2, s32 *a3);
extern void func_8004914C(void *a0);
extern void func_800491AC(void *a0);
extern s32 func_8004787C(s32 a0);
extern void *func_80010A08(s32 a0);
extern s32 GetTPage(s32 a0, s32 a1, s32 a2, s32 a3);
extern s32 func_8005A600(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4);
extern s32 AddPrim(s32 a0, void *a1);
extern u8 D_801928B0[];
extern u8 D_800AF648;
extern s16 D_80192870;
extern s16 D_800B9A02;
extern s32 D_800A651C;
extern s32 D_80126950;
extern u32 D_80192874[];
extern u8 D_801928A0[];
extern u8 D_801928A1[];
extern u8 D_801928A2[];
extern u8 D_801928A3[];
extern u8 D_80192880[];
extern u8 D_80192881[];
extern u8 D_80192882[];
extern u8 D_80192883[];
extern u8 D_80192890[];
extern u8 D_80192891[];
extern u8 D_80192892[];
extern u8 D_80192893[];
void func_80181670(void *a0)
{
s32 tags[4]; /* sp+0x18 */
s16 sv[4]; /* sp+0x28 */
s16 xs[8]; /* sp+0x30 */
s16 ys[8]; /* sp+0x40 */
struct {
s32 flag; /* sp+0x50 */
u16 sxy[2]; /* sp+0x54 */
s32 pz; /* sp+0x58 */
} o;
s32 m;
s32 ret;
s32 d;
s32 e;
register s32 p __asm__("$8");
register s32 q __asm__("$2");
register s32 n __asm__("$6");
s32 sc;
s32 x;
s32 y;
s32 ot;
u8 *prim;
u8 *pp;
u8 *base;
u32 *pal;
s32 i;
s32 k;
m = *(s32 *)((s32)a0 + 0x20) + 0x34;
gte_SetRotMatrix(m);
gte_SetTransMatrix(m);
RotTransSV(D_801928B0, sv, &o.flag);
func_8004914C(&D_800AF648);
func_800491AC(&D_800AF648);
ret = RotTransPers((s32)sv, (s32)o.sxy, &o.pz, &o.flag);
if ((ret > 0) && (o.flag >= 0)) {
sc = D_80192870;
ot = *(s32 *)((s8 *)&D_800A651C + ((u16)D_800B9A02 * 0x14)) + ret * 4;
*(u16 *)((s32)a0 + 0xDE) += 0x100;
e = (func_8004787C(*(s16 *)((s32)a0 + 0xDE)) * 3 / 8) - 0x800;
if (e < 0) {
e = 0x800 - (func_8004787C(*(s16 *)((s32)a0 + 0xDE)) * 3 / 8);
} else {
e = (func_8004787C(*(s16 *)((s32)a0 + 0xDE)) * 3 / 8) - 0x800;
}
p = e * sc;
q = p >> 12;
n = q + 8;
__asm__ __volatile__("" : "=r"(n) : "0"(n));
d = n * (D_80126950 + 0x1F4) / (ret * 4);
x = o.sxy[0];
y = o.sxy[1];
xs[2] = x;
ys[2] = y;
xs[0] = x - d;
xs[1] = x - ((d * 179) >> 8);
xs[3] = x + ((d * 179) >> 8);
xs[4] = x + d;
ys[0] = y - d;
ys[1] = y - ((d * 179) >> 8);
ys[3] = y + ((d * 179) >> 8);
ys[4] = y + d;
prim = (u8 *)func_80010A08(0x9C);
if (prim != 0) {
s32 tp;
tp = GetTPage(0, 1, 0, 0);
func_8005A600((s32)prim, 0, 1, (u16)tp, 0);
tags[0] = (s32)(prim + 0xC);
pp = prim + 0xC;
pal = D_80192874;
base = (u8 *)tags;
k = 0;
tags[1] = (s32)(prim + 0x30);
tags[2] = (s32)(prim + 0x54);
tags[3] = (s32)(prim + 0x78);
do {
i = k * 4;
*(u32 *)(pp + 0x04) = pal[D_801928A0[i]];
*(u32 *)(pp + 0x0C) = pal[D_801928A1[i]];
*(u32 *)(pp + 0x14) = pal[D_801928A2[i]];
*(u32 *)(pp + 0x1C) = pal[D_801928A3[i]];
*(u8 *)(pp + 0x03) = 8;
*(u8 *)(pp + 0x07) = 0x3A;
*(u16 *)(pp + 0x08) = *(u16 *)(base + 0x18 + D_80192880[i] * 2);
*(u16 *)(pp + 0x10) = *(u16 *)(base + 0x18 + D_80192881[i] * 2);
*(u16 *)(pp + 0x18) = *(u16 *)(base + 0x18 + D_80192882[i] * 2);
*(u16 *)(pp + 0x20) = *(u16 *)(base + 0x18 + D_80192883[i] * 2);
*(u16 *)(pp + 0x0A) = *(u16 *)(base + 0x28 + D_80192890[i] * 2);
*(u16 *)(pp + 0x12) = *(u16 *)(base + 0x28 + D_80192891[i] * 2);
*(u16 *)(pp + 0x1A) = *(u16 *)(base + 0x28 + D_80192892[i] * 2);
*(u16 *)(pp + 0x22) = *(u16 *)(base + 0x28 + D_80192893[i] * 2);
AddPrim(ot, pp);
k += 1;
pp += 0x24;
} while (k < 4);
AddPrim(ot, prim);
}
}
}
#include "common.h"
extern s32 func_8012C1B8(void);
extern void func_8012CAE4(void *a0);
extern void func_8001C2C4(s32 a0);
extern void func_8012B2CC(s32 a0);
extern void func_80181670(void *a0);
extern u8 D_801928B8[];
extern u8 D_801928C8[];
extern u8 D_801A3E2C[];
void func_80181B4C(void *a0)
{
s32 v0;
s32 ptr64;
s32 rec;
if (*(u16 *)((s32)a0 + 0x2) == 0) {
v0 = func_8012C1B8();
*(s32 *)((s32)a0 + 0x20) = v0;
if (v0 == 0) {
func_8012CAE4(a0);
return;
}
func_8001C2C4(v0);
*(u16 *)((s32)a0 + 0x5C) = 0x8000;
*(s32 *)((s32)a0 + 0x58) = (s32)D_801928B8 | 0x40000000 | 0x20000000;
*(u16 *)((s32)a0 + 0x76) = 10000;
*(u8 *)((s32)a0 + 0xC0) = 1;
*(s16 *)((s32)a0 + 0xAE) = -1;
*(s32 *)((s32)a0 + 0xBC) = (s32)D_801928C8;
*(s32 *)((s32)a0 + 0x4) = 0x25B0000;
*(s32 *)((s32)a0 + 0x8) = 0xFF900000;
*(s32 *)((s32)a0 + 0xB4) = 0;
*(u16 *)((s32)a0 + 0x2) += 1;
*(s32 *)((s32)a0 + 0xC4) |= 3;
} else {
ptr64 = *(s32 *)((s32)a0 + 0x64);
if (*(u16 *)ptr64 != 0) {
rec = *(s32 *)(*(s32 *)(ptr64 + 0x20) + 0x20);
*(s16 *)(*(s32 *)((s32)a0 + 0x20) + 0x10) = *(u16 *)(rec + 0x6);
*(s16 *)(*(s32 *)((s32)a0 + 0x20) + 0x12) = *(u16 *)(rec + 0x8);
*(s16 *)(*(s32 *)((s32)a0 + 0x20) + 0x14) = *(u16 *)(rec + 0xA) - 0x100;
*(s16 *)((s32)a0 + 0x6) = *(u16 *)(*(s32 *)((s32)a0 + 0x64) + 0x6) + *(u16 *)(rec + 0x0);
*(s16 *)((s32)a0 + 0xA) = *(u16 *)(*(s32 *)((s32)a0 + 0x64) + 0xA) + *(u16 *)(rec + 0x2);
*(s16 *)((s32)a0 + 0xE) = *(u16 *)(*(s32 *)((s32)a0 + 0x64) + 0xE) + *(u16 *)(rec + 0x4);
func_8012B2CC((s32)a0);
if (*(s32 *)(*(s32 *)((s32)a0 + 0x64) + 0x90) == (s32)D_801A3E2C) {
func_80181670(a0);
}
}
}
}
src/ov_SC05_010/ov_SC05_010_jr_80180F84.c
+3288
View File
File diff suppressed because it is too large Load Diff
src/ov_SC06_024/ov_SC06_024_jr_8017BEBC.c
+364 -1
View File
@@ -4410,7 +4410,370 @@ void func_8017EADC(s32 a0) {
}
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_8017EC4C);
/* func_8017EC4C (ov_SC06_024, TU ov_SC06_024_jr_8017BEBC.c) — S68 fable escalation, MATCH 556/556.
*
* Warm-started from the opus draft (closeness 16); every opus lever preserved:
* func_8012EC04(param_1,..), D_80193440[1]/[2] spelling, dbase in $fp with the
* raw *(u16*)(dbase+0xA3AA) parity read, 16-byte stride on D_80193550/54/58/5C,
* the g{} frame sizing, the in-place abs #1 + zero-byte asm on n (verified
* load-bearing: removing it costs -2 length; its addu $a0,$s1,$zero copy is IN
* the target), the blez guard shape, the two-armed 0x102 write, i reuse, otp/otq.
*
* What closed the final 16 (the two addPrim merge clusters):
* the wrong-register rows were LOCAL-ALLOC QTY DENSITY ORDER, not a scheduling
* tie. gcc-2.7.2 local-alloc allocates qtys by qty_compare density
* (floor_log2(refs)*refs*size/life) and the FIRST qty through the scan grabs the
* scan-order register the next one wanted. Each addPrim RMW merge is spelled:
*
* w = *(u32 *)prim; // raw tag word named EARLY (its own stmt)
* ...interleaving stmts... // nextpri update / otq addr / E1 store
* w &= 0xFF000000; // in-place mask, SPLIT from the ior
* *(u32 *)prim = w | (*otp & 0xFFFFFF); // ior op1 = prim side
*
* The early def + split &= lengthens w's qty life, DROPPING its density below
* the competing address-chain qty, so the chain allocates first (taking $v1)
* and w's tied {lw,and,ior,sw} chain lands on the target's register; the ior
* operand order (op1 = prim word) then emits or $rP,$rP,$rV with dest tied to
* op1. Statement order around pk2[3]=1 is FORCED by a real dependence: the sb
* writes byte 3 of the same word the lw reads, so their source order IS their
* final order — the target's source read *pk2 AFTER pk2[3]=1 (merge-3) and
* *otp BEFORE D_800A5E60=pk2+8 (merge-2). Mask-hoist order (t2 before t3) pins
* the *value*-side and to first LUID use, which is why merge-1 splits BOTH
* sides (wv first, then w1 &= mask).
*
* Verified against tools/reference/gcc-2.7.2 sched.c (no birthing boost for
* block-dying pseudos, so sched1 load order is priority-fixed; final order is
* sched2 under the colors) and local-alloc.c qty_compare. Reloc audit: 1:1 with
* the target .s; D_80193440+2/+4 addends == D_80193442/D_80193444 (contiguous).
*/
#include "common.h"
typedef struct { s16 vx, vy, vz, pad; } SV_8017EC4C;
typedef struct { s16 m[3][3]; s32 t[3]; } MT_8017EC4C;
extern void func_8012EC04(s32, s32, s32 *);
extern void func_8012F14C(s32, s32, s32);
extern s32 func_80135888(s32, s32, s32, s32);
extern void func_8012F568(s32, s32, s32, s32, s32, s32);
extern s32 func_80133784(s32, void *, s32);
extern void func_8012F038(int, short *, short *);
extern void func_800D20C0(void *, void *, s32);
extern void func_80017E68(void *, void *);
extern void ApplyMatrixSV(void *, void *, void *);
extern void func_800D23D0(void *);
extern void RotMatrixYXZ(void *, void *);
extern void ApplyTransposeMatrixLV(void *, void *, void *);
extern s32 ratan2(s32, s32);
extern s16 D_800B9A02;
extern u16 D_800B99DA;
extern u8 D_800A6610[];
extern u8 D_800AF630[];
extern u8 *D_800A5E60;
extern s32 D_801E1158;
extern s32 *D_80126B78;
extern s32 *D_80126B90;
extern u8 D_801152A8[];
extern s32 D_801269A4;
extern s32 D_801269A8;
extern s32 D_801269AC;
extern u16 D_80193440[];
extern u8 D_801934B0[];
extern s32 D_801934F0[];
extern u16 D_80193538[];
extern s32 D_80193550[];
extern s32 D_80193554[];
extern s32 D_80193558[];
extern s32 D_8019355C[];
#define ec4c_SetRotMatrix(r0) __asm__ __volatile__ ( \
"lw $12, 0( %0 );" \
"lw $13, 4( %0 );" \
"ctc2 $12, $0;" \
"ctc2 $13, $1;" \
"lw $12, 8( %0 );" \
"lw $13, 12( %0 );" \
"lw $14, 16( %0 );" \
"ctc2 $12, $2;" \
"ctc2 $13, $3;" \
"ctc2 $14, $4" \
: : "r"( r0 ) : "$12", "$13", "$14" )
#define ec4c_SetTransMatrix(r0) __asm__ __volatile__ (\
"lw $12, 20( %0 );" \
"lw $13, 24( %0 );" \
"ctc2 $12, $5;" \
"lw $14, 28( %0 );" \
"ctc2 $13, $6;" \
"ctc2 $14, $7" \
: : "r"( r0 ) : "$12", "$13", "$14" )
#define ec4c_rotcol(r0) __asm__ __volatile__ ( \
"lhu $12, 0( %0 );" \
"lhu $13, 6( %0 );" \
"lhu $14, 12( %0 );" \
"mtc2 $12, $9;" \
"mtc2 $13, $10;" \
"mtc2 $14, $11;" \
"nop;" \
"nop;" \
"mvmva 1, 0, 3, 3, 0;" \
"mfc2 $12, $9;" \
"mfc2 $13, $10;" \
"mfc2 $14, $11;" \
"sh $12, 0( %0 );" \
"sh $13, 6( %0 );" \
"sh $14, 12( %0 )" \
: : "r"( r0 ) : "$12", "$13", "$14", "memory" )
#define ec4c_rottrans(r0) __asm__ __volatile__ ( \
"lhu $13, 4( %0 );" \
"lhu $12, 0( %0 );" \
"sll $13, $13, 16;" \
"or $12, $12, $13;" \
"mtc2 $12, $0;" \
"lwc2 $1, 8( %0 );" \
"nop;" \
"nop;" \
"mvmva 1, 0, 0, 0, 0;" \
"swc2 $25, 0( %0 );" \
"swc2 $26, 4( %0 );" \
"swc2 $27, 8( %0 )" \
: : "r"( r0 ) : "$12", "$13", "memory" )
#define ec4c_ldv3(r0, r1, r2) __asm__ __volatile__ ( \
"lwc2 $0, 0( %0 );" \
"lwc2 $1, 4( %0 );" \
"lwc2 $2, 0( %1 );" \
"lwc2 $3, 4( %1 );" \
"lwc2 $4, 0( %2 );" \
"lwc2 $5, 4( %2 )" \
: : "r"( r0 ), "r"( r1 ), "r"( r2 ) )
#define ec4c_ldv0(r0) __asm__ __volatile__ ( \
"lwc2 $0, 0( %0 );" \
"lwc2 $1, 4( %0 )" \
: : "r"( r0 ) )
#define ec4c_rtpt() __asm__ __volatile__ ("nop;nop;rtpt")
#define ec4c_rtps() __asm__ __volatile__ ("nop;nop;rtps")
#define ec4c_avsz4() __asm__ __volatile__ ("nop;nop;avsz4")
#define ec4c_stflg(r0) __asm__ __volatile__ ( \
"cfc2 $12, $31;" \
"nop;" \
"sw $12, 0( %0 )" \
: : "r"( r0 ) : "$12", "memory" )
#define ec4c_stsxy3(r0, r1, r2) __asm__ __volatile__ (\
"swc2 $12, 0( %0 );" \
"swc2 $13, 0( %1 );" \
"swc2 $14, 0( %2 )" \
: : "r"( r0 ), "r"( r1 ), "r"( r2 ) : "memory" )
#define ec4c_stsxy(r0) __asm__ __volatile__ ( \
"swc2 $14, 0( %0 )" \
: : "r"( r0 ) : "memory" )
#define ec4c_stotz(r0) __asm__ __volatile__ ( \
"swc2 $7, 0( %0 )" \
: : "r"( r0 ) : "memory" )
void func_8017EC4C(s32 param_1)
{
SV_8017EC4C v[4];
SV_8017EC4C tmp;
struct { s32 vx, vy, vz, pad; } vec;
MT_8017EC4C cmat;
MT_8017EC4C M;
struct { s32 flag, flag2, otz, x0, x1, x2, x3, x4; } g;
u8 *dbase;
u8 *pkt;
u8 *pk2;
u16 *tp;
u32 *otp;
u32 *otq;
u32 ot;
s32 hit;
s32 d, n, t, rem, i, j, k;
s32 aa, bb, cc, rr;
u32 w2;
u32 w1, wv;
u32 w3;
hit = 0;
ot = (u32)&D_800A6610[(*(u16 *)&D_800B9A02) << 14];
dbase = D_800AF630;
func_8012EC04(param_1, D_801E1158, (s32 *)&cmat);
func_8012F14C((s32)&cmat, (s32)&D_80193440[0], *(s32 *)(param_1 + 0xD4) + 8);
v[0].vx = D_80193440[0];
v[0].vy = D_80193440[1];
v[0].vz = D_80193440[2] - *(u16 *)(param_1 + 0x100);
v[1].vx = D_80193440[0];
v[1].vy = D_80193440[1];
v[1].vz = D_80193440[2] - *(u16 *)(param_1 + 0x102);
func_8012F14C((s32)&cmat, (s32)&v[0], (s32)&v[0]);
func_8012F14C((s32)&cmat, (s32)&v[1], (s32)&v[1]);
tmp = v[1];
if (func_80135888((s32)D_80126B78, (s32)D_80126B90, (s32)&v[0], (s32)&v[1]) != 0) {
func_8012F568(1, 0x4018, *(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12), 0x96,
(s32)&v[1], (s32)D_801152A8);
}
d = *(s16 *)(param_1 + 0x102) - *(s16 *)(param_1 + 0x100);
t = d / 128;
n = t;
if (t < 0) {
t = -t;
}
rem = d - n * 128;
__asm__ ("" : "=r" (n) : "0" (n));
if ((d - n * 128) < 0) {
rem = -rem;
}
i = 0;
if (t > 0) {
do {
v[1].vx = D_80193440[0];
v[1].vy = D_80193440[1];
v[1].vz = D_80193440[2] - *(u16 *)(param_1 + 0x100) - ((i + 1) << 7);
func_8012F14C((s32)&cmat, (s32)&v[1], (s32)&v[1]);
hit = func_80133784(1, (void *)&v[0], (s32)&v[1]);
if (hit != 0) {
break;
}
v[0].vx = v[1].vx;
v[0].vy = v[1].vy;
v[0].vz = v[1].vz;
i = i + 1;
} while (i < t);
}
if (hit == 0) {
v[1].vx = D_80193440[0];
v[1].vy = D_80193440[1];
v[1].vz = D_80193440[2] - *(u16 *)(param_1 + 0x100) - (t << 7) - rem;
func_8012F14C((s32)&cmat, (s32)&v[1], (s32)&v[1]);
hit = func_80133784(1, (void *)&v[0], (s32)&v[1]);
}
if (hit != 0) {
*(SV_8017EC4C *)(*(s32 *)(param_1 + 0xD8) + 8) = v[1];
*(s32 *)(*(s32 *)(param_1 + 0xD8) + 4) &= 0x7FFFFFFF;
*(s32 *)D_801934B0 = D_801934F0[D_800B99DA & 1];
func_8012F038((s32)&cmat, (short *)&v[1], (short *)&v[1]);
cc = *(s16 *)(param_1 + 0x100);
aa = (s32)*(s16 *)&D_80193440[2] - cc;
bb = aa - v[1].vz;
if (bb < 0) {
rr = cc + (v[1].vz - aa);
} else {
rr = cc + bb;
}
*(s16 *)(param_1 + 0x102) = rr;
*(s32 *)(param_1 + 0xE4) |= 4;
} else {
*(s32 *)(*(s32 *)(param_1 + 0xD8) + 4) |= 0x80000000;
*(s32 *)(param_1 + 0xE4) &= ~4;
}
v[0].vx = 0;
v[0].vy = D_80193440[1];
v[0].vz = D_80193440[2];
func_8012F14C((s32)&cmat, (s32)&v[0], (s32)&v[0]);
func_800D20C0((void *)&v[0], (void *)&v[1], 8);
func_80017E68((void *)&v[0], (void *)&M);
v[1].vx = 0;
v[1].vy = 0;
k = *(u16 *)(param_1 + 0x100);
v[1].vz = *(u16 *)(param_1 + 0x102) - k;
ApplyMatrixSV((void *)&cmat, (void *)&v[1], (void *)&v[1]);
func_800D23D0((void *)&v[1]);
RotMatrixYXZ((void *)&v[1], (void *)&M);
vec.vx = D_801269A4 - v[0].vx;
vec.vy = D_801269A8 - v[0].vy;
vec.vz = D_801269AC - v[0].vz;
ApplyTransposeMatrixLV((void *)&M, (void *)&vec, (void *)&vec);
v[1].vz = -ratan2(vec.vx, vec.vy);
RotMatrixYXZ((void *)&v[1], (void *)&M);
ec4c_SetRotMatrix(dbase + 0x18);
ec4c_rotcol(&M.m[0][0]);
ec4c_rotcol(&M.m[0][1]);
ec4c_rotcol(&M.m[0][2]);
ec4c_SetTransMatrix(dbase + 0x18);
ec4c_rottrans(&M.t[0]);
ec4c_SetRotMatrix(&M);
ec4c_SetTransMatrix(&M);
tp = D_80193538;
for (i = 0; i < 3; i++) {
pkt = D_800A5E60;
k = (i * 2 + (*(u16 *)(dbase + 0xA3AA) & 1)) * 4;
D_800A5E60 = pkt + 0x24;
*(u32 *)(pkt + 4) = D_80193550[k];
*(u32 *)(pkt + 0xC) = D_80193554[k];
*(u32 *)(pkt + 0x14) = D_80193558[k];
*(u32 *)(pkt + 0x1C) = D_8019355C[k];
pkt[3] = 8;
pkt[7] = 0x38;
v[0].vx = D_80193440[0] + *tp++;
v[0].vy = 0;
v[0].vz = -*(u16 *)(param_1 + 0x100);
v[1].vx = D_80193440[0] + *tp++;
v[1].vy = 0;
v[1].vz = -*(u16 *)(param_1 + 0x102);
v[2].vx = D_80193440[0] - *tp++;
v[2].vy = 0;
v[2].vz = -*(u16 *)(param_1 + 0x100);
v[3].vx = D_80193440[0] - *tp++;
v[3].vy = 0;
v[3].vz = -*(u16 *)(param_1 + 0x102);
ec4c_ldv3(&v[0], &v[1], &v[2]);
ec4c_rtpt();
ec4c_stflg(&g.flag);
ec4c_stsxy3(pkt + 8, pkt + 0x10, pkt + 0x18);
ec4c_ldv0(&v[3]);
ec4c_rtps();
ec4c_stflg(&g.flag2);
g.flag |= g.flag2;
ec4c_stsxy(pkt + 0x20);
ec4c_avsz4();
ec4c_stotz(&g.otz);
if ((g.flag & ~0x1000) == 0) {
g.otz = g.otz + 1;
if (g.otz < 0x1000) {
pkt[7] |= 2;
w1 = *(u32 *)pkt;
otp = (u32 *)((g.otz << 2) + ot);
pk2 = D_800A5E60;
wv = *otp & 0xFFFFFF;
w1 &= 0xFF000000;
*(u32 *)pkt = w1 | wv;
w3 = *otp;
D_800A5E60 = pk2 + 8;
*otp = (w3 & 0xFF000000) | ((u32)pkt & 0xFFFFFF);
pk2[3] = 1;
w2 = *(u32 *)pk2;
otq = (u32 *)((g.otz << 2) + ot);
*(u32 *)(pk2 + 4) = 0xE100002A;
w2 &= 0xFF000000;
*(u32 *)pk2 = w2 | (*otq & 0xFFFFFF);
*otq = (*otq & 0xFF000000) | ((u32)pk2 & 0xFFFFFF);
}
}
}
}
extern u16 D_800B99DA;
extern s32 D_801E1158;
src/ov_SC06_029/ov_SC06_029_jr_8017C954.c
+173 -1
View File
@@ -4628,7 +4628,179 @@ void func_8017F984(s32 arg0) {
}
INCLUDE_ASM("asm/ov_SC06_029/nonmatchings/ov_SC06_029_jr_8017C954", func_8017F9C0);
/* func_8017F9C0 — ov_SC06_029 / ov_SC06_029_jr_8017C954 (294 ins, 13-way jtbl switch).
* Structural sibling of func_8017EF34 / func_8017F330 in this same TU: same jtbl shape,
* same D_801DDB2C[5] flag loops, same shared "0x1C=0x180; 0x34++; func_8002D4C8(0x936,0)"
* tail duplicated per case so cross-jumping re-merges it (.L8017FCEC), and the same
* "0x34++" tail duplicated so cross-jumping re-merges it (.L8017FDC8).
* Every symbol spelled from THIS .s's own relocation lines. D_801DDB30..3C are written as
* D_801DDB2C[1..4] (the TU's §183 TYPE-adopted s32[5]; %hi/%lo(D_801DDB2C+4k) resolve to
* identical bytes). Callee decls copied verbatim from the TU: func_80181170 / func_8012BEE8
* are `void (void)` there, so the a0-passing calls go through function-pointer casts. */
void func_8017F9C0(s32 param_1) {
extern s32 D_801DDB2C[];
extern s32 D_801DFD4C;
extern u16 D_800B99DA;
extern s32 D_80190704[];
extern s32 D_8019070C[];
extern s32 rand(void);
extern void func_8002D4C8(s32 a0, s32 a1);
extern void func_8012BEE8(void);
extern s32 func_8012E544(s32 arg);
extern void func_8017FE58(void *fp, s32 count);
extern s32 func_80180FE0(s32 a0, s32 a1);
extern void func_80181170(void);
extern s32 func_801812AC(s32 a0);
extern s32 func_80181334(void);
s32 i;
s32 m;
s32 *p1;
s32 *p2;
s32 *p3;
s32 *p4;
s32 *p5;
s32 *p6;
switch (*(u16 *)(param_1 + 0x34)) {
case 0:
i = 0;
p1 = D_801DDB2C;
do {
*(s32 *)(*p1 + 0xE0) |= 9;
p1 = p1 + 1;
i = i + 1;
} while (i < 5);
*(s32 *)(param_1 + 0x1C) = 0x180;
*(u16 *)(param_1 + 0x34) = *(u16 *)(param_1 + 0x34) + 1;
func_8002D4C8(0x936, 0);
goto L_end;
case 1:
case 5:
case 9:
if (func_801812AC(0) == 0) {
goto L_end;
}
func_80180FE0(param_1, rand() % 5);
func_8017FE58((void *)param_1, D_8019070C[*(s16 *)(param_1 + 0x106)]);
if ((*(s32 *)(param_1 + 0xE0) & 0x800) == 0) {
if (*(s16 *)(param_1 + 0xFE) >= 3) {
*(u16 *)(param_1 + 0x34) = *(u16 *)(param_1 + 0x34) + 1;
}
goto L_end;
}
if (*(s16 *)(param_1 + 0x104) != *(s16 *)(param_1 + 0xFE)) {
*(u16 *)(param_1 + 0x34) = *(u16 *)(param_1 + 0x34) + 1;
goto L_end;
}
if (((s32 (*)(void *))func_8012BEE8)((void *)param_1) != 0) {
*(u16 *)(param_1 + 0x34) = *(u16 *)(param_1 + 0x34) + 1;
((void (*)(s32))func_80181170)(param_1);
}
goto L_end;
case 2:
i = 0;
m = ~1;
p2 = D_801DDB2C;
do {
*(s32 *)(*p2 + 0xE0) &= m;
*(s32 *)(*p2 + 0xE0) |= 4;
p2 = p2 + 1;
i = i + 1;
} while (i < 5);
*(u16 *)(param_1 + 0x34) = *(u16 *)(param_1 + 0x34) + 1;
goto L_end;
case 3:
case 7:
case 0xB:
if (func_80181334() == 1) {
*(s32 *)(param_1 + 0x1C) = 0x20;
*(u16 *)(param_1 + 0x34) = 0xC;
func_8002D4C8(4, 0x936);
((void (*)(s32))func_80181170)(param_1);
}
goto L_end;
case 4:
i = 0;
p3 = D_801DDB2C;
do {
*(s32 *)(*p3 + 0xE0) |= 0xA;
p3 = p3 + 1;
i = i + 1;
} while (i < 5);
*(s32 *)(param_1 + 0x1C) = 0x180;
*(u16 *)(param_1 + 0x34) = *(u16 *)(param_1 + 0x34) + 1;
func_8002D4C8(0x936, 0);
goto L_end;
case 6:
i = 0;
m = ~2;
p4 = D_801DDB2C;
do {
*(s32 *)(*p4 + 0xE0) &= m;
*(s32 *)(*p4 + 0xE0) |= 4;
p4 = p4 + 1;
i = i + 1;
} while (i < 5);
*(u16 *)(param_1 + 0x34) = *(u16 *)(param_1 + 0x34) + 1;
goto L_end;
case 8:
i = 0;
p5 = D_801DDB2C;
do {
*(s32 *)(*p5 + 0xE0) |= 8;
p5 = p5 + 1;
i = i + 1;
} while (i < 5);
*(s32 *)(D_801DDB2C[0] + 0xE0) |= 2;
*(s32 *)(D_801DDB2C[1] + 0xE0) |= 1;
*(s32 *)(D_801DDB2C[2] + 0xE0) |= 2;
*(s32 *)(D_801DDB2C[3] + 0xE0) |= 1;
*(s32 *)(D_801DDB2C[4] + 0xE0) |= 2;
*(s32 *)(param_1 + 0x1C) = 0x180;
*(u16 *)(param_1 + 0x34) = *(u16 *)(param_1 + 0x34) + 1;
func_8002D4C8(0x936, 0);
goto L_end;
case 0xA:
i = 0;
p6 = D_801DDB2C;
do {
*(s32 *)(*p6 + 0xE0) |= 4;
p6 = p6 + 1;
i = i + 1;
} while (i < 5);
*(s32 *)(D_801DDB2C[0] + 0xE0) &= ~2;
*(s32 *)(D_801DDB2C[1] + 0xE0) &= ~1;
*(s32 *)(D_801DDB2C[2] + 0xE0) &= ~2;
*(s32 *)(D_801DDB2C[3] + 0xE0) &= ~1;
*(s32 *)(D_801DDB2C[4] + 0xE0) &= ~2;
*(u16 *)(param_1 + 0x34) = *(u16 *)(param_1 + 0x34) + 1;
goto L_end;
case 0xC:
if (((s32 (*)(void *))func_8012BEE8)((void *)param_1) != 0) {
if (func_8012E544(0x2EF) == 0) {
if ((*(s32 *)(param_1 + 0xE0) & 0x800) != 0) {
*(u16 *)(param_1 + 0x102) = 0;
}
*(s16 *)(param_1 + 2) = 0xA;
}
}
goto L_end;
}
L_end:
D_801DFD4C = D_80190704[D_800B99DA & 1];
((u16 *)param_1)[0x82] = ((u16 *)param_1)[0x7F];
}
#include "common.h"