feat(phase-30 S48-0b): jtbl family func_8015C32C — 1/3 blocked-binary siblings banked

This commit is contained in:
Drew T
2026-08-11 15:42:44 -06:00
parent b3e379faf4
commit 7db73d89a0
3 changed files with 119 additions and 3 deletions
+1 -1
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@@ -4943,7 +4943,7 @@ ov_SC02_037_SPLAT_YAML := config/splat.ov_SC02_037.yaml
ov_SC02_037_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_037_jr_80131340.o,tail2.data.o,ov_SC02_037_jr_80135EB0.o,tail3.data.o,ov_SC02_037_jr_801380E0.o,tail4.data.o,ov_SC02_037_jr_8013F350.o,tail5.data.o,ov_SC02_037_jr_80159C84.o,tail6.data.o,ov_SC02_037_jr_8015A3C8.o,tail7.data.o,ov_SC02_037_jr_801789AC.o,tail8.data.o,ov_SC02_037_jr_8017AE2C.o,tail9.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
build/src/ov_SC02_037/ov_SC02_037_jr_8013F350.o: JTBL_PADS := 0,0,4,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20,+0x38,+0x58
build/src/ov_SC02_037/ov_SC02_037_jr_80159C84.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
build/src/ov_SC02_037/ov_SC02_037_jr_8015A3C8.o: JTBL_PADS := 0,4,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20,+0x40
build/src/ov_SC02_037/ov_SC02_037_jr_8015A3C8.o: JTBL_PADS := 0,4,4,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20,+0x40,+0x60
build/src/ov_SC02_037/ov_SC02_037_jr_8017AE2C.o: JTBL_PADS := 0,0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14,+0x34,+0x4c
ov_SC02_037_CHECK_SHA := config/check.ov_SC02_037.sha
ov_SC02_037_SYMBOLS := config/symbols.ov_SC02_037.txt
+1 -1
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@@ -114,7 +114,7 @@ segments:
- [0x9fc14, .rodata, ov_SC02_037_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x9fc48, data, tail6]
- [0x9fc4c, .rodata, ov_SC02_037_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x9fca8, data, tail7]
- [0x9fcc8, data, tail7]
- [0x9ff24, .rodata, ov_SC02_037_jr_801789AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x9ff3c, data, tail8]
- [0xa01d4, .rodata, ov_SC02_037_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
+117 -1
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@@ -3215,7 +3215,123 @@ s32 func_8015C128(s32 param_1) {
}
INCLUDE_ASM("asm/ov_SC02_037/nonmatchings/ov_SC02_037_jr_8015A3C8", func_8015C32C);
extern void (*D_801862A8[])(void *);
extern u16 D_800B99DA;
extern s32 func_80149FB0(s32 a0);
extern s32 func_801496D4(void*);
extern void func_80149704(void);
extern s32 func_801619A4(s32*);
extern s32 func_80149AA8(s32*);
extern void func_80149AD4(s32*);
extern s32 func_80149B54(s32*);
extern void func_80149BAC(s32*);
extern s32 func_801498E0(s32*);
extern s32 func_80149954(s32);
extern s32 func_80149A64(s32*);
extern void func_800CCCC0(s32 a0);
extern int func_80148AFC(void *a0);
extern void func_8001382C(s32 a0, void *a1, void *a2);
extern void func_80146DB8(s32 *a0, s32 *a1);
extern void func_80147A84(s32 a0);
extern void func_801473EC(s32*);
extern void func_8014C010(s32 a0, s32 a1);
extern void func_80147324(s32 a0);
extern void func_8014D738(void);
extern void func_8014CC28(s32);
extern s32 func_8014F3E8(s32);
extern s32 func_80146E98(s32 a0);
extern void func_80147078(s32 *a0, s16 a1);
extern s32 func_8015BE94();
extern void func_80159BE4(s32 a0);
extern void func_8015C0C4(s32 a0);
extern void func_8015C6E0(s32*);
void func_8015C32C(s32 arg0) {
s32 iVar2;
u32 uVar4;
s32 vin[4];
s32 vout[4];
func_80149FB0(arg0);
if (((s32 (*)(s32))func_801496D4)(arg0) != 0) {
D_801862A8[*(u16 *)arg0]((void *)arg0);
((void (*)(s32))func_80149704)(arg0);
return;
}
switch (((s32 (*)(s32))func_801619A4)(arg0)) {
case 0:
case 1:
case 6:
if (((s32 (*)(s32))func_80149AA8)(arg0) != 0) {
D_801862A8[*(u16 *)arg0]((void *)arg0);
((void (*)(s32))func_80149AD4)(arg0);
return;
}
if (((s32 (*)(s32))func_80149B54)(arg0) != 0) {
D_801862A8[*(u16 *)arg0]((void *)arg0);
((void (*)(s32))func_80149BAC)(arg0);
return;
}
break;
case 3:
((void (*)(s32))func_801498E0)(arg0);
break;
case 4:
((void (*)(s32))func_80149954)(arg0);
break;
case 5:
if (((s32 (*)(s32))func_80149A64)(arg0) != 0) {
D_801862A8[*(u16 *)arg0]((void *)arg0);
func_800CCCC0(arg0);
return;
}
}
if ((func_80148AFC((void *)arg0) & 0xff) != 0) {
vin[0] = 0;
vin[1] = 0;
vin[2] = -0x4000;
func_8001382C((s32)*(s16 *)(*(s32 *)(arg0 + 0x20) + 0x12), vin, vout);
*(s32 *)(arg0 + 0x234) += vout[0];
*(s32 *)(arg0 + 0x238) += vout[1];
*(s32 *)(arg0 + 0x23c) += vout[2];
}
func_8001382C((s16)-*(u16 *)(*(s32 *)(arg0 + 0x20) + 0x12), (void *)(arg0 + 0x234), vout);
func_80146DB8((s32 *)arg0, vout);
func_80147A84(arg0);
((void (*)(s32))func_801473EC)(arg0);
if ((D_800B99DA & 3) == 0) {
func_8014C010(arg0, 1);
func_80147324(0x65f);
}
if (((s32 (*)(s32))func_8014D738)(arg0) != 0) {
D_801862A8[*(u16 *)arg0]((void *)arg0);
((void (*)(s32))func_8015C6E0)(arg0);
return;
}
iVar2 = ((s32 (*)(s32))func_8014CC28)(arg0);
uVar4 = ((u32 (*)(s32))func_8014F3E8)(arg0);
if (uVar4 != 0) {
if ((uVar4 & 0x4000) == 0) {
if (func_80146E98(arg0) != 0) {
D_801862A8[*(u16 *)arg0]((void *)arg0);
func_80147078((s32 *)arg0, 0);
func_80159BE4(arg0);
}
} else {
func_80147078((s32 *)arg0, 4);
func_8015C0C4(arg0);
}
} else {
if (iVar2 == 0) {
D_801862A8[*(u16 *)arg0]((void *)arg0);
func_80147078((s32 *)arg0, 3);
((void (*)(s32))func_8015BE94)(arg0);
}
}
}
void func_8015C6A4(void) {
}