mirror of
https://github.com/Druthulu/BFM-decomp
synced 2026-09-26 13:33:34 -04:00
phase-36: S104 e10 (4 main closes) + e13 banked — ov_SC02_017_jr_8017DF34.c has 0 lever sites (17 classes, e4/e7/e9/e13); e15/e16 packs (800.c, 800_b_2.c)
This commit is contained in:
Drew T
@@ -1,6 +1,9 @@
|
||||
rank fn alias copies best needed kinds regs tu
|
||||
62 func_8017F10C ov_SC06_010 1 5 1 pin $18 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c
|
||||
23 func_8017BEBC ov_SC06_010 1 6 1 launder src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c
|
||||
25 func_8017CAD4 ov_SC06_010 1 6 1 launder src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c
|
||||
40 func_8017BEBC ov_SC03_107 1 48 7 barrier,launder src/ov_SC03_107/ov_SC03_107_jr_801789AC.c
|
||||
82 func_80180A88 ov_SC06_010 1 98 1 pin $16 src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c
|
||||
38 func_80013694 main 1 4 2 barrier,pin $2 src/800.c
|
||||
110 func_800336A8 main 1 6 1 barrier src/800_b_2.c
|
||||
128 func_800166E8 main 1 6 2 barrier,pin $2 src/800.c
|
||||
104 func_800331D4 main 1 9 1 pin $3 src/800_b_2.c
|
||||
90 func_80031B7C main 1 15 1 pin $3 src/800_b_2.c
|
||||
108 func_80015760 main 1 16 2 pin $21,$3 src/800.c
|
||||
344 func_80025818 main 1 23 1 launder src/800.c
|
||||
113 func_80034314 main 1 23 1 pin $3 src/800_b_2.c
|
||||
|
||||
|
@@ -0,0 +1,97 @@
|
||||
void func_80013694(s16 angle, void *a1, void *a2)
|
||||
{
|
||||
s16 matrix[16];
|
||||
s16 vec0[9];
|
||||
s16 pad[4];
|
||||
s32 sin_val;
|
||||
s32 cos_val;
|
||||
s32 v1;
|
||||
s16 *v0p;
|
||||
s16 *m0p;
|
||||
|
||||
func_80013F3C(matrix);
|
||||
sin_val = func_8004787C((s32)angle);
|
||||
cos_val = func_80047948((s32)angle);
|
||||
|
||||
v1 = 0x1000;
|
||||
vec0[0] = (s16)v1;
|
||||
v1 = -sin_val;
|
||||
vec0[4] = (s16)cos_val;
|
||||
vec0[8] = (s16)cos_val;
|
||||
v0p = vec0;
|
||||
vec0[7] = (s16)sin_val;
|
||||
m0p = matrix;
|
||||
vec0[1] = 0;
|
||||
vec0[2] = 0;
|
||||
vec0[3] = 0;
|
||||
vec0[5] = (s16)v1;
|
||||
vec0[6] = 0;
|
||||
|
||||
__asm__ __volatile__ (
|
||||
"lw $12, 0(%1);"
|
||||
"lw $13, 4(%1);"
|
||||
"ctc2 $12, $0;"
|
||||
"ctc2 $13, $1;"
|
||||
"lw $12, 8(%1);"
|
||||
"lw $13, 12(%1);"
|
||||
"lw $14, 16(%1);"
|
||||
"ctc2 $12, $2;"
|
||||
"ctc2 $13, $3;"
|
||||
"ctc2 $14, $4;"
|
||||
"lhu $12, 0(%0);"
|
||||
"lhu $13, 6(%0);"
|
||||
"lhu $14, 12(%0);"
|
||||
"mtc2 $12, $9;"
|
||||
"mtc2 $13, $10;"
|
||||
"mtc2 $14, $11;"
|
||||
"nop;"
|
||||
"nop;"
|
||||
"mvmva 1, 0, 3, 3, 0;"
|
||||
"mfc2 $12, $9;"
|
||||
"mfc2 $13, $10;"
|
||||
"mfc2 $14, $11;"
|
||||
"sh $12, 0(%1);"
|
||||
"sh $13, 6(%1);"
|
||||
"sh $14, 12(%1);"
|
||||
"addiu $2, $sp, 50;"
|
||||
"lhu $12, 0($2);"
|
||||
"lhu $13, 6($2);"
|
||||
"lhu $14, 12($2);"
|
||||
"mtc2 $12, $9;"
|
||||
"mtc2 $13, $10;"
|
||||
"mtc2 $14, $11;"
|
||||
"nop;"
|
||||
"nop;"
|
||||
"mvmva 1, 0, 3, 3, 0;"
|
||||
"addiu $2, $sp, 18;"
|
||||
"mfc2 $12, $9;"
|
||||
"mfc2 $13, $10;"
|
||||
"mfc2 $14, $11;"
|
||||
"sh $12, 0($2);"
|
||||
"sh $13, 6($2);"
|
||||
"sh $14, 12($2);"
|
||||
"addiu $2, $sp, 52;"
|
||||
"lhu $12, 0($2);"
|
||||
"lhu $13, 6($2);"
|
||||
"lhu $14, 12($2);"
|
||||
"mtc2 $12, $9;"
|
||||
"mtc2 $13, $10;"
|
||||
"mtc2 $14, $11;"
|
||||
"nop;"
|
||||
"nop;"
|
||||
"mvmva 1, 0, 3, 3, 0;"
|
||||
"addiu $2, $sp, 20;"
|
||||
"mfc2 $12, $9;"
|
||||
"mfc2 $13, $10;"
|
||||
"mfc2 $14, $11;"
|
||||
"sh $12, 0($2);"
|
||||
"sh $13, 6($2);"
|
||||
"sh $14, 12($2)"
|
||||
:
|
||||
: "r"(v0p), "r"(m0p)
|
||||
: "$12", "$13", "$14", "$2"
|
||||
);
|
||||
|
||||
func_8001282C(matrix);
|
||||
ApplyMatrixSV(matrix, a1, a2);
|
||||
}
|
||||
@@ -0,0 +1,98 @@
|
||||
void func_80013694(s16 angle, void *a1, void *a2)
|
||||
{
|
||||
s16 matrix[16];
|
||||
s16 vec0[9];
|
||||
s16 pad[4];
|
||||
s32 sin_val;
|
||||
s32 cos_val;
|
||||
s32 v1;
|
||||
register s16 *v0p __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
s16 *m0p;
|
||||
|
||||
func_80013F3C(matrix);
|
||||
sin_val = func_8004787C((s32)angle);
|
||||
cos_val = func_80047948((s32)angle);
|
||||
|
||||
v1 = 0x1000;
|
||||
vec0[0] = (s16)v1;
|
||||
v1 = -sin_val;
|
||||
vec0[4] = (s16)cos_val;
|
||||
vec0[8] = (s16)cos_val;
|
||||
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9)
|
||||
v0p = vec0;
|
||||
vec0[7] = (s16)sin_val;
|
||||
m0p = matrix;
|
||||
vec0[1] = 0;
|
||||
vec0[2] = 0;
|
||||
vec0[3] = 0;
|
||||
vec0[5] = (s16)v1;
|
||||
vec0[6] = 0;
|
||||
|
||||
__asm__ __volatile__ (
|
||||
"lw $12, 0(%1);"
|
||||
"lw $13, 4(%1);"
|
||||
"ctc2 $12, $0;"
|
||||
"ctc2 $13, $1;"
|
||||
"lw $12, 8(%1);"
|
||||
"lw $13, 12(%1);"
|
||||
"lw $14, 16(%1);"
|
||||
"ctc2 $12, $2;"
|
||||
"ctc2 $13, $3;"
|
||||
"ctc2 $14, $4;"
|
||||
"lhu $12, 0(%0);"
|
||||
"lhu $13, 6(%0);"
|
||||
"lhu $14, 12(%0);"
|
||||
"mtc2 $12, $9;"
|
||||
"mtc2 $13, $10;"
|
||||
"mtc2 $14, $11;"
|
||||
"nop;"
|
||||
"nop;"
|
||||
"mvmva 1, 0, 3, 3, 0;"
|
||||
"mfc2 $12, $9;"
|
||||
"mfc2 $13, $10;"
|
||||
"mfc2 $14, $11;"
|
||||
"sh $12, 0(%1);"
|
||||
"sh $13, 6(%1);"
|
||||
"sh $14, 12(%1);"
|
||||
"addiu $2, $sp, 50;"
|
||||
"lhu $12, 0($2);"
|
||||
"lhu $13, 6($2);"
|
||||
"lhu $14, 12($2);"
|
||||
"mtc2 $12, $9;"
|
||||
"mtc2 $13, $10;"
|
||||
"mtc2 $14, $11;"
|
||||
"nop;"
|
||||
"nop;"
|
||||
"mvmva 1, 0, 3, 3, 0;"
|
||||
"addiu $2, $sp, 18;"
|
||||
"mfc2 $12, $9;"
|
||||
"mfc2 $13, $10;"
|
||||
"mfc2 $14, $11;"
|
||||
"sh $12, 0($2);"
|
||||
"sh $13, 6($2);"
|
||||
"sh $14, 12($2);"
|
||||
"addiu $2, $sp, 52;"
|
||||
"lhu $12, 0($2);"
|
||||
"lhu $13, 6($2);"
|
||||
"lhu $14, 12($2);"
|
||||
"mtc2 $12, $9;"
|
||||
"mtc2 $13, $10;"
|
||||
"mtc2 $14, $11;"
|
||||
"nop;"
|
||||
"nop;"
|
||||
"mvmva 1, 0, 3, 3, 0;"
|
||||
"addiu $2, $sp, 20;"
|
||||
"mfc2 $12, $9;"
|
||||
"mfc2 $13, $10;"
|
||||
"mfc2 $14, $11;"
|
||||
"sh $12, 0($2);"
|
||||
"sh $13, 6($2);"
|
||||
"sh $14, 12($2)"
|
||||
:
|
||||
: "r"(v0p), "r"(m0p)
|
||||
: "$12", "$13", "$14", "$2"
|
||||
);
|
||||
|
||||
func_8001282C(matrix);
|
||||
ApplyMatrixSV(matrix, a1, a2);
|
||||
}
|
||||
@@ -0,0 +1,14 @@
|
||||
s5: verdict NO-MATCH start 9 best 4 compiles 192 path R7 do-while @1006 + R6 inline v1 @1002
|
||||
best-scoring single candidates of the last trace (move -> score [residual class]):
|
||||
R6 inline v1 @1002 -> 4 [REG] (from 8)
|
||||
R8 cse tmp0 @1003 -> 5 [COUNT] (from 8)
|
||||
R9 swap-stmts @1003 -> 7 [COUNT] (from 8)
|
||||
R6 inline v0p @1007 -> 7 [COUNT] (from 8)
|
||||
R9 swap-stmts @1007 -> 7 [COUNT] (from 8)
|
||||
R7 do-while @1007 -> 7 [COUNT] (from 9)
|
||||
R7 do-while @1006 -> 8 [REG] (from 9)
|
||||
R7 do-while @1007 -> 8 [REG] (from 9)
|
||||
R6 inline v1 @1004 -> 8 [COUNT] (from 8)
|
||||
R10 param-copy angle @997 -> 8 [REG] (from 8)
|
||||
R12 width v1 s32->u16 @994 -> 8 [REG] (from 8)
|
||||
R7 block @1003 -> 8 [REG] (from 8)
|
||||
@@ -0,0 +1,9 @@
|
||||
--- every @class/@stuck/@crack note in this translation unit ---
|
||||
* @class: MATCH — 120/120 byte-exact under tools/match_one.py AND
|
||||
* @class: MATCH — 131/131 byte-exact (relocation-masked), and
|
||||
* @class: (was regalloc-order / sched)
|
||||
* @stuck: none — MATCH, 122/122 instructions, byte-exact under match_one, and
|
||||
* @class: was regalloc-order + IOR-tree reassociation
|
||||
* @stuck: none — MATCH (128 ins), byte-exact under match_one.
|
||||
* @class: MATCH (was LENGTH-DRIFT/+1 -> ADDRESSING -> MATCH)
|
||||
* @class: MATCH (was SCHEDULE-REORDER/2)
|
||||
@@ -0,0 +1,200 @@
|
||||
=== lever-free bodies in main sharing a callee or global with func_80013694 (5 found; top 6 by shared symbols) — read them for the SHAPE ===
|
||||
--- func_800139C8 (src/800.c:1181) shares 4: func_8001282C func_80013F3C func_8004787C func_80047948 ---
|
||||
void func_800139C8(s16 param_1, void *param_2, void *param_3)
|
||||
{
|
||||
s16 sin_val;
|
||||
s32 cos_val;
|
||||
s16 *ip;
|
||||
s16 *rp;
|
||||
MTX_139C8 ident;
|
||||
MTX_139C8 rotm;
|
||||
|
||||
func_80013F3C(&ident);
|
||||
sin_val = func_8004787C(param_1);
|
||||
cos_val = func_80047948(param_1);
|
||||
|
||||
rotm.m[0][2] = sin_val;
|
||||
rotm.m[1][0] = rotm.m[0][1] = 0;
|
||||
rotm.m[1][1] = 0x1000;
|
||||
rotm.m[0][0] = cos_val;
|
||||
rotm.m[2][2] = cos_val;
|
||||
rp = &rotm.m[0][0];
|
||||
rotm.m[2][0] = -sin_val;
|
||||
ip = &ident.m[0][0];
|
||||
rotm.m[1][2] = 0;
|
||||
rotm.m[2][1] = 0;
|
||||
|
||||
gte_SetRotMatrix(ip);
|
||||
gte_ldclmv(rp);
|
||||
gte_rtir();
|
||||
gte_stclmv(ip);
|
||||
gte_ldclmv(rp + 1);
|
||||
gte_rtir();
|
||||
gte_stclmv(ip + 1);
|
||||
gte_ldclmv(rp + 2);
|
||||
gte_rtir();
|
||||
gte_stclmv(ip + 2);
|
||||
|
||||
func_8001282C(ip);
|
||||
ApplyMatrixSV(ip, param_2, param_3);
|
||||
}
|
||||
|
||||
--- func_80013CFC (src/800.c:1329) shares 4: func_8001282C func_80013F3C func_8004787C func_80047948 ---
|
||||
void func_80013CFC(short param_1, void *param_2, void *param_3)
|
||||
{
|
||||
s16 matrix[16];
|
||||
s16 rot[16];
|
||||
s32 sin_val;
|
||||
s32 cos_val;
|
||||
u16 v1;
|
||||
s16 *rotp;
|
||||
s16 *matp;
|
||||
|
||||
func_80013F3C(matrix);
|
||||
sin_val = func_8004787C(param_1);
|
||||
cos_val = func_80047948(param_1);
|
||||
|
||||
v1 = -sin_val;
|
||||
*(s16 *)((s32)rot + 0x00) = cos_val;
|
||||
*(s16 *)((s32)rot + 0x08) = cos_val;
|
||||
*(s16 *)((s32)rot + 0x10) = 0x1000;
|
||||
rotp = rot;
|
||||
*(s16 *)((s32)rot + 0x06) = sin_val;
|
||||
matp = matrix;
|
||||
*(s16 *)((s32)rot + 0x02) = v1;
|
||||
*(s16 *)((s32)rot + 0x04) = 0;
|
||||
*(s16 *)((s32)rot + 0x0A) = 0;
|
||||
*(s16 *)((s32)rot + 0x0C) = 0;
|
||||
*(s16 *)((s32)rot + 0x0E) = 0;
|
||||
|
||||
gte_SetRotMatrix(matp);
|
||||
gte_ldclmv(rotp);
|
||||
gte_rtir();
|
||||
gte_stclmv(matp);
|
||||
gte_ldclmv(rotp + 1);
|
||||
gte_rtir();
|
||||
gte_stclmv(matp + 1);
|
||||
gte_ldclmv(rotp + 2);
|
||||
gte_rtir();
|
||||
gte_stclmv(matp + 2);
|
||||
|
||||
func_8001282C(matp);
|
||||
ApplyMatrixSV(matp, param_2, param_3);
|
||||
}
|
||||
|
||||
--- func_800234E4 (src/800.c:14526) shares 2: func_8004787C func_80047948 ---
|
||||
void func_800234E4(void *a0, u16 a1, u16 a2) {
|
||||
s32 k = 0;
|
||||
s32 rad = a1;
|
||||
|
||||
/* Struct-free spelling of the func_800233CC sibling: the only dependencies
|
||||
* are common.h types and the two callee externs, so the body survives any
|
||||
* splice model (whole-snippet or function-only extraction). Addresses are
|
||||
* written as a0 + k*4 + 0x10/0x12 so LSR keeps the incoming pointer as the
|
||||
* IV base (addu s1,a0,zero) and folds the member offset into the sh
|
||||
* displacements, exactly as the struct form did. */
|
||||
while (k < 12) {
|
||||
*(u16 *)((u8 *)a0 + k * 4 + 0x10) = (func_8004787C(a2 + k * 0x155) * rad) >> 12;
|
||||
*(u16 *)((u8 *)a0 + k * 4 + 0x12) = (func_80047948(a2 + k * 0x155) * rad) >> 12;
|
||||
k++;
|
||||
}
|
||||
}
|
||||
|
||||
--- func_800233CC (src/800.c:14498) shares 2: func_8004787C func_80047948 ---
|
||||
void func_800233CC(Poly12Obj *a0, u16 a1) {
|
||||
s32 i = 0;
|
||||
s32 radius = a1;
|
||||
|
||||
/* `i * 0x155` must stay a DERIVED induction variable (no explicit `ang`
|
||||
* local): loop_strength_reduce then emits its preheader init alongside the
|
||||
* hoisted &pts[0] copy, giving the target's s2-before-s1 init order and the
|
||||
* s1-before-s0 increment order. An explicit pre-loop `ang = 0` statement
|
||||
* sits ahead of the LSR-inserted init instead -> 6-instruction residual. */
|
||||
for (; i < 4; i++) {
|
||||
a0->pts[i].x = (func_8004787C(i * 0x155) * radius) >> 12;
|
||||
a0->pts[i].y = (func_80047948(i * 0x155) * radius) >> 12;
|
||||
}
|
||||
|
||||
for (i = 4; i < 7; i++) {
|
||||
a0->pts[i].x = a0->pts[6 - i].x;
|
||||
a0->pts[i].y = -a0->pts[6 - i].y;
|
||||
}
|
||||
|
||||
for (i = 7; i < 12; i++) {
|
||||
a0->pts[i].x = -a0->pts[12 - i].x;
|
||||
a0->pts[i].y = a0->pts[12 - i].y;
|
||||
}
|
||||
}
|
||||
|
||||
--- func_8002C410 (src/800_b_o0a.c:97) shares 2: func_8004787C func_80047948 ---
|
||||
void func_8002C410(void)
|
||||
{
|
||||
func_80059888(0, 0, 0, 0);
|
||||
func_800596F4(0);
|
||||
func_800599B8(0, 0);
|
||||
MoveImage(0, 0, 0);
|
||||
GetClut(0, 0);
|
||||
GetTPage(0, 0, 0, 0);
|
||||
AddPrim(0, 0);
|
||||
func_8005A600(0, 0, 0, 0, 0);
|
||||
SetLineF2(0);
|
||||
SetLineG2(0);
|
||||
SetPolyF3(0);
|
||||
SetPolyFT4(0);
|
||||
SetSemiTrans(0, 0);
|
||||
MulMatrix0(0, 0, 0);
|
||||
func_80048D9C(0, 0);
|
||||
func_80048EAC(0, 0);
|
||||
MulRotMatrix(0);
|
||||
SetMulMatrix(0, 0);
|
||||
SetMulRotMatrix(0);
|
||||
ApplyRotMatrix(0, 0);
|
||||
ApplyRotMatrixLV(0, 0);
|
||||
func_800484EC(0, 0, 0);
|
||||
ApplyMatrixSV(0, 0, 0);
|
||||
ApplyTransposeMatrixLV(0, 0, 0);
|
||||
func_8004978C(0, 0);
|
||||
RotMatrixYXZ(0, 0);
|
||||
func_80049CAC(0, 0);
|
||||
RotMatrixX(0, 0);
|
||||
RotMatrixY(0, 0);
|
||||
RotMatrixZ(0, 0);
|
||||
func_8004901C(0, 0);
|
||||
func_8004974C(0, 0);
|
||||
CompMatrix(0, 0, 0);
|
||||
CompMatrixLV(0, 0, 0);
|
||||
func_8004914C(0);
|
||||
func_800491AC(0);
|
||||
PushMatrix(0);
|
||||
PopMatrix(0);
|
||||
ReadRotMatrix(0);
|
||||
func_8004921C(0, 0);
|
||||
ReadGeomOffset(0, 0);
|
||||
func_800491EC(0);
|
||||
RotTransPers(0, 0, 0, 0);
|
||||
RotTransSV(0, 0, 0);
|
||||
Square12(0, 0);
|
||||
Square0(0, 0);
|
||||
func_800495EC(0, 0, 0);
|
||||
RotTransPers4(0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
|
||||
RotNclip4(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
|
||||
VectorNormalSS(0, 0);
|
||||
func_80047D3C(0);
|
||||
SquareRoot12(0);
|
||||
gteMIMefunc(0, 0, 0, 0);
|
||||
func_80047948(0);
|
||||
func_8004787C(0);
|
||||
csqrt(0);
|
||||
ratan2(0, 0);
|
||||
SsUtKeyOnV(0, 0, 0, 0, 0, 0, 0, 0);
|
||||
SsUtKeyOffV(0);
|
||||
SsGetCurrentPoint(0, 0);
|
||||
func_8005C324(0, 0, 0);
|
||||
func_8005C2C8(0, 0);
|
||||
rand(0);
|
||||
func_8005C4CC(0);
|
||||
getchar(0);
|
||||
func_8005C388(0);
|
||||
strcpy(0, 0);
|
||||
}
|
||||
|
||||
@@ -0,0 +1,15 @@
|
||||
src/800.c:func_80013694: score 9 (COUNT; mine 102 ins, target 102) — not yet
|
||||
register pairs (mine -> target, count): v1->v0 x3
|
||||
replace mine[20:22] target[20:23]
|
||||
20 sh v1,58(sp) | sh v0,56(sp)
|
||||
21 addiu v1,sp,48 | sh v0,64(sp)
|
||||
22 -- | addiu v0,sp,48
|
||||
delete mine[24:26] target[25:25]
|
||||
24 sh v0,56(sp) | --
|
||||
25 sh v0,64(sp) | --
|
||||
insert mine[29:29] target[28:29]
|
||||
29 -- | sh v1,58(sp)
|
||||
replace mine[40:43] target[40:43]
|
||||
40 lhu t4,0(v1) | lhu t4,0(v0)
|
||||
41 lhu t5,6(v1) | lhu t5,6(v0)
|
||||
42 lhu t6,12(v1) | lhu t6,12(v0)
|
||||
@@ -0,0 +1,4 @@
|
||||
REMOVED pin $3 line 995
|
||||
NEEDED pin $2 line 996
|
||||
NEEDED barrier line 1008
|
||||
REMOVED barrier line 1015
|
||||
@@ -0,0 +1,2 @@
|
||||
src/800.c
|
||||
func_80013694
|
||||
@@ -0,0 +1,84 @@
|
||||
void func_80015760(Obj_80015760 *obj, s32 *ot)
|
||||
{
|
||||
s32 x0;
|
||||
u32 tx;
|
||||
s32 y0;
|
||||
s32 flags;
|
||||
u32 value;
|
||||
u32 digits;
|
||||
s32 count;
|
||||
u8 digitCount;
|
||||
u8 width;
|
||||
u32 tagHi;
|
||||
u32 color;
|
||||
u32 yWord;
|
||||
u32 tagCode;
|
||||
s32 *pkt;
|
||||
tx = obj->x;
|
||||
x0 = ((s32) tx) - (D_800AF7BC >> 1);
|
||||
flags = obj->flags;
|
||||
y0 = ((s32) obj->y) - (D_800AF7BE >> 1);
|
||||
value = (u32) obj->value;
|
||||
count = flags & 0xF;
|
||||
digitCount = count;
|
||||
if (count == 0)
|
||||
{
|
||||
digitCount = 8;
|
||||
}
|
||||
if (flags & 0x40)
|
||||
{
|
||||
digits = func_80015A74(value);
|
||||
}
|
||||
else
|
||||
{
|
||||
digits = value;
|
||||
}
|
||||
width = 8;
|
||||
if (flags & 0x80)
|
||||
{
|
||||
y0++;
|
||||
y0--;
|
||||
width = 0x10;
|
||||
}
|
||||
tagHi = width;
|
||||
if (tagHi == 8)
|
||||
{
|
||||
tagHi = 0x74000000;
|
||||
}
|
||||
else
|
||||
{
|
||||
tagHi = 0x7C000000;
|
||||
}
|
||||
tagCode = 0x03000000;
|
||||
pkt = (s32 *) D_800A5E60;
|
||||
if (digitCount != 0)
|
||||
{
|
||||
color = tagHi | 0x00808080;
|
||||
yWord = (u32) (y0 << 16);
|
||||
do
|
||||
{
|
||||
u32 xLow;
|
||||
u32 idx;
|
||||
s32 tile;
|
||||
u16 *uvPtr;
|
||||
u32 uvc;
|
||||
u32 mask;
|
||||
xLow = (u16) x0;
|
||||
x0 = width + x0;
|
||||
idx = (digits >> ((digitCount - 1) << 2)) & 0xF;
|
||||
tile = D_80062B78[idx];
|
||||
pkt[1] = (s32) color;
|
||||
digitCount--;
|
||||
pkt[2] = (s32) (xLow | yWord);
|
||||
uvPtr = func_80015908(tile, (u16) flags); /* the caller's original prototype took u16: the target masks (andi) before the call */
|
||||
uvc = 0x40560000;
|
||||
pkt[3] = (s32) ((*uvPtr) | uvc);
|
||||
mask = 0x00FFFFFF;
|
||||
pkt[0] = (s32) (((*ot) & mask) | tagCode);
|
||||
*ot = (s32) (((u32) pkt) & mask);
|
||||
pkt += 4;
|
||||
}
|
||||
while (digitCount != 0);
|
||||
}
|
||||
D_800A5E60 = (u8 *) pkt;
|
||||
}
|
||||
@@ -0,0 +1,84 @@
|
||||
void func_80015760(Obj_80015760 *obj, s32 *ot)
|
||||
{
|
||||
s32 x0;
|
||||
u32 tx;
|
||||
s32 y0;
|
||||
s32 flags;
|
||||
u32 value;
|
||||
u32 digits;
|
||||
s32 count;
|
||||
u8 digitCount;
|
||||
u8 width;
|
||||
u32 tagHi;
|
||||
u32 color;
|
||||
u32 yWord;
|
||||
register u32 tagCode __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
s32 *pkt;
|
||||
tx = obj->x;
|
||||
x0 = ((s32) tx) - (D_800AF7BC >> 1);
|
||||
flags = obj->flags;
|
||||
y0 = ((s32) obj->y) - (D_800AF7BE >> 1);
|
||||
value = (u32) obj->value;
|
||||
count = flags & 0xF;
|
||||
digitCount = count;
|
||||
if (count == 0)
|
||||
{
|
||||
digitCount = 8;
|
||||
}
|
||||
if (flags & 0x40)
|
||||
{
|
||||
digits = func_80015A74(value);
|
||||
}
|
||||
else
|
||||
{
|
||||
digits = value;
|
||||
}
|
||||
width = 8;
|
||||
if (flags & 0x80)
|
||||
{
|
||||
y0++;
|
||||
y0--;
|
||||
width = 0x10;
|
||||
}
|
||||
tagHi = width;
|
||||
if (tagHi == 8)
|
||||
{
|
||||
tagHi = 0x74000000;
|
||||
}
|
||||
else
|
||||
{
|
||||
tagHi = 0x7C000000;
|
||||
}
|
||||
tagCode = 0x03000000;
|
||||
pkt = (s32 *) D_800A5E60;
|
||||
if (digitCount != 0)
|
||||
{
|
||||
color = tagHi | 0x00808080;
|
||||
yWord = (u32) (y0 << 16);
|
||||
do
|
||||
{
|
||||
u32 xLow;
|
||||
u32 idx;
|
||||
s32 tile;
|
||||
u16 *uvPtr;
|
||||
u32 uvc;
|
||||
register u32 mask __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
xLow = (u16) x0;
|
||||
x0 = width + x0;
|
||||
idx = (digits >> ((digitCount - 1) << 2)) & 0xF;
|
||||
tile = D_80062B78[idx];
|
||||
pkt[1] = (s32) color;
|
||||
digitCount--;
|
||||
pkt[2] = (s32) (xLow | yWord);
|
||||
uvPtr = func_80015908(tile, (u16) flags); /* the caller's original prototype took u16: the target masks (andi) before the call */
|
||||
uvc = 0x40560000;
|
||||
pkt[3] = (s32) ((*uvPtr) | uvc);
|
||||
mask = 0x00FFFFFF;
|
||||
pkt[0] = (s32) (((*ot) & mask) | tagCode);
|
||||
*ot = (s32) (((u32) pkt) & mask);
|
||||
pkt += 4;
|
||||
}
|
||||
while (digitCount != 0);
|
||||
}
|
||||
D_800A5E60 = (u8 *) pkt;
|
||||
}
|
||||
@@ -0,0 +1,15 @@
|
||||
s3: verdict BUDGET start 23 best 16 compiles 400 path R7 do-while @2744 + R12 width tagCode u32->s16 @2716 + R7 do-while @2770
|
||||
s3b: verdict BUDGET start 23 best 16 compiles 400 path R7 do-while @2744 + R12 width tagCode u32->s16 @2716 + R7 do-while @2770
|
||||
best-scoring single candidates of the last trace (move -> score [residual class]):
|
||||
R7 do-while @2770 -> 16 [COUNT] (from 17)
|
||||
R12 width tagCode u32->u16 @2716 -> 17 [COUNT] (from 18)
|
||||
R12 width tagCode u32->s16 @2716 -> 17 [COUNT] (from 18)
|
||||
R16 const-holder uvc=0x40560000 x1 -> 17 [COUNT] (from 18)
|
||||
R12 width tagCode u32->u8 @2716 -> 17 [COUNT] (from 18)
|
||||
R6 inline uvc @2775 -> 17 [COUNT] (from 18)
|
||||
R6 inline idx @2769 -> 17 [COUNT] (from 17)
|
||||
R8 hoist tmp0 @2769 -> 17 [COUNT] (from 17)
|
||||
R7 block @2769 -> 17 [COUNT] (from 17)
|
||||
R5 swap + @2768 -> 17 [COUNT] (from 17)
|
||||
R10 param-copy obj @2718 -> 17 [COUNT] (from 17)
|
||||
R4 decl-move tagCode 12->0 -> 17 [COUNT] (from 17)
|
||||
@@ -0,0 +1,9 @@
|
||||
--- every @class/@stuck/@crack note in this translation unit ---
|
||||
* @class: MATCH — 120/120 byte-exact under tools/match_one.py AND
|
||||
* @class: MATCH — 131/131 byte-exact (relocation-masked), and
|
||||
* @class: (was regalloc-order / sched)
|
||||
* @stuck: none — MATCH, 122/122 instructions, byte-exact under match_one, and
|
||||
* @class: was regalloc-order + IOR-tree reassociation
|
||||
* @stuck: none — MATCH (128 ins), byte-exact under match_one.
|
||||
* @class: MATCH (was LENGTH-DRIFT/+1 -> ADDRESSING -> MATCH)
|
||||
* @class: MATCH (was SCHEDULE-REORDER/2)
|
||||
@@ -0,0 +1,197 @@
|
||||
=== lever-free bodies in main sharing a callee or global with func_80015760 (13 found; top 6 by shared symbols) — read them for the SHAPE ===
|
||||
--- func_800145EC (src/800.c:1756) shares 2: D_800AF7BC D_800AF7BE ---
|
||||
void func_800145EC(s32 mode) {
|
||||
extern void func_800525DC(s32 w, s32 h, s32 mode2, s32 a3, s32 st);
|
||||
extern void func_80053178(s32 a0, s32 a1, s32 a2, s32 a3);
|
||||
extern void func_80059234(s32);
|
||||
extern void func_80053218(void);
|
||||
extern void func_80014774(void);
|
||||
extern void func_800147B8(void);
|
||||
extern u8 D_80062A3C[];
|
||||
extern u8 D_80062A3E[];
|
||||
extern u8 D_80062A40[];
|
||||
extern u16 D_800AF7BC;
|
||||
extern u16 D_800AF7BE;
|
||||
extern u16 D_800AF7C0;
|
||||
s32 off;
|
||||
|
||||
off = (mode & 0xFFFF) * 6;
|
||||
|
||||
D_800AF7BC = *(u16 *) (D_80062A3C + off);
|
||||
D_800AF7BE = *(u16 *) (D_80062A3E + off);
|
||||
D_800AF7C0 = *(u16 *) (D_80062A40 + off);
|
||||
|
||||
func_800525DC(D_800AF7BC, D_800AF7BE, D_800AF7C0 | 4, 0, 0);
|
||||
|
||||
if (D_800AF7BE == 0x1E0) {
|
||||
func_80053178(0, 0, 0, 0);
|
||||
} else {
|
||||
func_80053178(0, D_800AF7BE, 0, 0);
|
||||
}
|
||||
|
||||
func_80059234(1);
|
||||
func_80053218();
|
||||
func_80014774();
|
||||
func_800147B8();
|
||||
}
|
||||
|
||||
--- func_800146B0 (src/800.c:1791) shares 2: D_800AF7BC D_800AF7BE ---
|
||||
void func_800146B0(s32 mode) {
|
||||
extern void GsInitGraph2(s32 w, s32 h, s32 mode, s32 a3, s32 st);
|
||||
extern void func_80053EEC(s32 a0, s32 a1, s32 a2, s32 a3);
|
||||
extern void func_80059234(s32);
|
||||
extern void func_80053218(void);
|
||||
extern void func_80014774(void);
|
||||
extern void func_800147B8(void);
|
||||
extern u8 D_80062A3C[];
|
||||
extern u8 D_80062A3E[];
|
||||
extern u8 D_80062A40[];
|
||||
extern u16 D_800AF7BC;
|
||||
extern u16 D_800AF7BE;
|
||||
extern u16 D_800AF7C0;
|
||||
s32 off;
|
||||
|
||||
off = (mode & 0xFFFF) * 6;
|
||||
|
||||
D_800AF7BC = *(u16 *) (D_80062A3C + off);
|
||||
D_800AF7BE = *(u16 *) (D_80062A3E + off);
|
||||
D_800AF7C0 = *(u16 *) (D_80062A40 + off);
|
||||
|
||||
GsInitGraph2(D_800AF7BC, D_800AF7BE, D_800AF7C0 | 4, 0, 0);
|
||||
|
||||
if (D_800AF7BE == 0x1E0) {
|
||||
func_80053EEC(0, 0, 0, 0);
|
||||
} else {
|
||||
func_80053EEC(0, D_800AF7BE, 0, 0);
|
||||
}
|
||||
|
||||
func_80059234(1);
|
||||
func_80053218();
|
||||
func_80014774();
|
||||
func_800147B8();
|
||||
}
|
||||
|
||||
--- func_800147B8 (src/800.c:1862) shares 2: D_800AF7BC D_800AF7BE ---
|
||||
void func_800147B8(void) {
|
||||
s32 raw_h = D_800AF7BE;
|
||||
u8 *base = D_800AF630;
|
||||
s32 h_offset = raw_h;
|
||||
u16 halfW;
|
||||
u16 halfH;
|
||||
s16 h;
|
||||
|
||||
if (h_offset == 0x1E0) {
|
||||
h_offset = 0;
|
||||
}
|
||||
|
||||
func_80058A4C(base + 0x38, 0, 0xA, D_800AF7BC, D_800AF7BE - 0x14);
|
||||
SetDefDispEnv(base + 0x14C, 0, 0, D_800AF7BC, D_800AF7BE);
|
||||
func_80058A4C(base + 0x94, 0, h_offset + 0xA, D_800AF7BC, D_800AF7BE - 0x14);
|
||||
SetDefDispEnv(base + 0x160, 0, h_offset, D_800AF7BC, D_800AF7BE);
|
||||
|
||||
halfW = D_800AF7BC >> 1;
|
||||
halfH = D_800AF7BE >> 1;
|
||||
D_800AF672 = halfH;
|
||||
D_800AF670 = halfW;
|
||||
D_800AF6CC = halfW;
|
||||
|
||||
h = (D_800AF7BE == 0xF0) ? 0x168 : 0xF0;
|
||||
|
||||
D_800AF6D6 = 0x100;
|
||||
D_800AF6D4 = 0x100;
|
||||
D_800AF67A = 0x100;
|
||||
D_800AF678 = 0x100;
|
||||
D_800AF6CE = h;
|
||||
D_800AF6DA = 0;
|
||||
D_800AF67E = 0;
|
||||
D_800AF6DC = 1;
|
||||
D_800AF680 = 1;
|
||||
|
||||
func_80014960();
|
||||
}
|
||||
|
||||
--- func_8001BB60 (src/800.c:8775) shares 1: D_800A5E60 ---
|
||||
void func_8001BB60(void)
|
||||
{
|
||||
s32 i;
|
||||
|
||||
D_80074808 = (s32)D_800A5E60;
|
||||
for (i = 0; i < 30; i++) {
|
||||
func_8001BBBC(0, i * 8, 0);
|
||||
}
|
||||
D_8007480C = 0;
|
||||
}
|
||||
|
||||
--- func_80010A08 (src/boot.c:415) shares 1: D_800A5E60 ---
|
||||
s32 func_80010A08(s32 arg0) {
|
||||
register u8 *p;
|
||||
s32 old;
|
||||
s32 q;
|
||||
|
||||
p = D_800AF630;
|
||||
q = (arg0 + 3) / 4;
|
||||
old = D_800A5E60;
|
||||
D_800A5E60 += q << 2;
|
||||
return old;
|
||||
}
|
||||
|
||||
--- func_8001212C (src/boot.c:1122) shares 1: D_800A5E60 ---
|
||||
void func_8001212C(void) {
|
||||
typedef struct {
|
||||
unsigned int addr : 24;
|
||||
unsigned int len : 8;
|
||||
} PrimTag;
|
||||
typedef struct {
|
||||
u8 pad0, pad1, pad2, len;
|
||||
u32 tpage;
|
||||
u8 r0, g0, b0, code;
|
||||
s16 x0, y0;
|
||||
u8 u0, v0;
|
||||
u16 clut;
|
||||
s16 w, h;
|
||||
} Sprt24;
|
||||
|
||||
register u8 *base = D_800AF630;
|
||||
Sprt24 *p;
|
||||
u32 *ot;
|
||||
|
||||
p = (Sprt24 *)D_800A5E60;
|
||||
ot = (u32 *)(D_800A6610 + *(u16 *)(base + 0xA3D2) * 0x4000);
|
||||
|
||||
p->len = 5;
|
||||
((u32 *)p)[1] = 0xE1000018;
|
||||
p->code = 0x66;
|
||||
p->clut = 0x77D6;
|
||||
p->r0 = 0x80;
|
||||
p->g0 = 0x80;
|
||||
p->b0 = 0x80;
|
||||
p->x0 = 0x30;
|
||||
p->y0 = 0x2E;
|
||||
p->u0 = 0x40;
|
||||
p->v0 = 0xE0;
|
||||
p->w = 0x60;
|
||||
p->h = 0x18;
|
||||
((PrimTag *)p)->addr = ((PrimTag *)(ot + 1))->addr;
|
||||
((PrimTag *)(ot + 1))->addr = (u32)p;
|
||||
p++;
|
||||
|
||||
p->len = 5;
|
||||
((u32 *)p)[1] = 0xE1000018;
|
||||
p->code = 0x66;
|
||||
p->clut = 0x77D6;
|
||||
p->r0 = 0x80;
|
||||
p->g0 = 0x80;
|
||||
p->b0 = 0x80;
|
||||
p->x0 = 0x30;
|
||||
p->y0 = 0x46;
|
||||
p->u0 = 0xA0;
|
||||
p->v0 = 0xE0;
|
||||
p->w = 0x60;
|
||||
p->h = 0x18;
|
||||
((PrimTag *)p)->addr = ((PrimTag *)(ot + 1))->addr;
|
||||
((PrimTag *)(ot + 1))->addr = (u32)p;
|
||||
p++;
|
||||
|
||||
D_800A5E60 = (s32)p;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
src/800.c:func_80015760: score 23 (COUNT; mine 106 ins, target 106) — not yet
|
||||
register pairs (mine -> target, count): s5->s4 x5, s4->s3 x1
|
||||
replace mine[19:20] target[19:20]
|
||||
19 subu s4,a1,v0 | subu s3,a1,v0
|
||||
replace mine[32:33] target[32:33]
|
||||
32 li s5,8 | li s4,8
|
||||
replace mine[35:36] target[35:36]
|
||||
35 li s5,8 | li s4,8
|
||||
replace mine[38:41] target[38:41]
|
||||
38 andi v1,s5,0xff | andi v1,s4,0xff
|
||||
39 li s5,16 | li s4,16
|
||||
40 andi v1,s5,0xff | andi v1,s4,0xff
|
||||
insert mine[49:49] target[49:50]
|
||||
49 -- | lui s5,0x300
|
||||
delete mine[53:55] target[54:54]
|
||||
53 lui s3,0xff | --
|
||||
54 ori s3,s3,0xffff | --
|
||||
replace mine[58:59] target[57:59]
|
||||
58 andi v1,s4,0xffff | andi v1,s3,0xffff
|
||||
59 -- | addu s3,s4,s3
|
||||
replace mine[68:69] target[68:69]
|
||||
68 addu s4,s5,s4 | addiu s2,s2,-1
|
||||
replace mine[75:76] target[75:77]
|
||||
75 addiu s2,s2,-1 | lui v1,0xff
|
||||
76 -- | ori v1,v1,0xffff
|
||||
insert mine[80:80] target[81:82]
|
||||
80 -- | lw v0,0(s8)
|
||||
replace mine[81:85] target[83:86]
|
||||
81 lw v0,0(s8) | and v0,v0,v1
|
||||
82 lui a2,0x300 | or v0,v0,s5
|
||||
83 and v0,v0,s3 | and v1,s1,v1
|
||||
84 or v0,v0,a2 | --
|
||||
replace mine[86:88] target[87:88]
|
||||
86 and v0,s1,s3 | addiu s1,s1,16
|
||||
87 sw v0,0(s8) | --
|
||||
replace mine[89:91] target[89:91]
|
||||
89 bnez v0,3458 <func_80015760+0xe8> | bnez v0,3454 <func_80015760+0xe4>
|
||||
90 addiu s1,s1,16 | sw v1,0(s8)
|
||||
@@ -0,0 +1,4 @@
|
||||
REMOVED pin $5 line 2814
|
||||
REMOVED pin $2 line 2819
|
||||
NEEDED pin $21 line 2825
|
||||
NEEDED pin $3 line 2875
|
||||
@@ -0,0 +1,2 @@
|
||||
src/800.c
|
||||
func_80015760
|
||||
@@ -0,0 +1,21 @@
|
||||
void func_800166E8(void *a0, s32 a1) {
|
||||
s32 local_buffer[2];
|
||||
s32 v0;
|
||||
s32 v1;
|
||||
|
||||
|
||||
if (a1 == 0)
|
||||
goto skip;
|
||||
|
||||
v0 = a1 - 1;
|
||||
v1 = -1;
|
||||
|
||||
do {
|
||||
*(u8 *)a0 = 0;
|
||||
v0--;
|
||||
a0 = (void *)((s32)a0 + 1);
|
||||
} while (v0 != v1);
|
||||
|
||||
skip:
|
||||
return;
|
||||
}
|
||||
@@ -0,0 +1,22 @@
|
||||
void func_800166E8(void *a0, s32 a1) {
|
||||
s32 local_buffer[2];
|
||||
register s32 v0 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
s32 v1;
|
||||
|
||||
__asm__ volatile(""); // Barrier to force stack allocation first // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9)
|
||||
|
||||
if (a1 == 0)
|
||||
goto skip;
|
||||
|
||||
v0 = a1 - 1;
|
||||
v1 = -1;
|
||||
|
||||
do {
|
||||
*(u8 *)a0 = 0;
|
||||
v0--;
|
||||
a0 = (void *)((s32)a0 + 1);
|
||||
} while (v0 != v1);
|
||||
|
||||
skip:
|
||||
return;
|
||||
}
|
||||
@@ -0,0 +1,14 @@
|
||||
s5: verdict NO-MATCH start 6 best 6 compiles 98 path
|
||||
best-scoring single candidates of the last trace (move -> score [residual class]):
|
||||
R12 width v1 s32->u16 @3755 -> 6 [COUNT] (from 6)
|
||||
R6 inline v1 @3762 -> 6 [COUNT] (from 6)
|
||||
R7 block @3761 -> 6 [COUNT] (from 6)
|
||||
R9 swap-stmts @3761 -> 6 [COUNT] (from 6)
|
||||
R10 param-copy a0 @3756 -> 6 [COUNT] (from 6)
|
||||
R4 decl-move v0 1->0 -> 6 [COUNT] (from 6)
|
||||
R12 width v1 s32->s16 @3755 -> 6 [COUNT] (from 6)
|
||||
R7 do-while @3761 -> 6 [COUNT] (from 6)
|
||||
R9 swap-stmts @3765 -> 6 [COUNT] (from 6)
|
||||
R10 param-copy a1 @3756 -> 6 [COUNT] (from 6)
|
||||
R4 decl-move v0 1->2 -> 6 [COUNT] (from 6)
|
||||
R12 width v1 s32->u8 @3755 -> 6 [COUNT] (from 6)
|
||||
@@ -0,0 +1,15 @@
|
||||
--- func_80016714 (line 3773) ---
|
||||
/* bzero(p, n): n<4 byte path; else align-to-4 -> word-fill (sw) -> remainder bytes.
|
||||
* Logically correct and instruction-identical to the target EXCEPT gcc 2.7.2 emits a
|
||||
* phantom empty 16-byte stack frame here (target is frameless) — that one frame
|
||||
* prologue/epilogue is the entire residual. A decomp-permuter candidate (structural
|
||||
* permutation can flip frame allocation). See docs/matching-cookbook.md §4. */
|
||||
--- every @class/@stuck/@crack note in this translation unit ---
|
||||
* @class: MATCH — 120/120 byte-exact under tools/match_one.py AND
|
||||
* @class: MATCH — 131/131 byte-exact (relocation-masked), and
|
||||
* @class: (was regalloc-order / sched)
|
||||
* @stuck: none — MATCH, 122/122 instructions, byte-exact under match_one, and
|
||||
* @class: was regalloc-order + IOR-tree reassociation
|
||||
* @stuck: none — MATCH (128 ins), byte-exact under match_one.
|
||||
* @class: MATCH (was LENGTH-DRIFT/+1 -> ADDRESSING -> MATCH)
|
||||
* @class: MATCH (was SCHEDULE-REORDER/2)
|
||||
@@ -0,0 +1,11 @@
|
||||
src/800.c:func_800166E8: score 6 (COUNT; mine 11 ins, target 11) — not yet
|
||||
register pairs (mine -> target, count): a1->v0 x3, v0->v1 x1
|
||||
delete mine[0:1] target[0:0]
|
||||
0 beqz a1,4318 <func_800166E8+0x20> | --
|
||||
replace mine[2:4] target[1:4]
|
||||
2 addiu a1,a1,-1 | beqz a1,4318 <func_800166E8+0x20>
|
||||
3 li v0,-1 | addiu v0,a1,-1
|
||||
4 -- | li v1,-1
|
||||
replace mine[5:7] target[5:7]
|
||||
5 addiu a1,a1,-1 | addiu v0,v0,-1
|
||||
6 bne a1,v0,4308 <func_800166E8+0x10> | bne v0,v1,4308 <func_800166E8+0x10>
|
||||
@@ -0,0 +1,3 @@
|
||||
NEEDED pin $2 line 3864
|
||||
REMOVED pin $3 line 3865
|
||||
NEEDED barrier line 3867
|
||||
@@ -0,0 +1,2 @@
|
||||
src/800.c
|
||||
func_800166E8
|
||||
@@ -0,0 +1,66 @@
|
||||
PG3 *func_80025818(TPRIM_80025818 *prim, SVEC8_80025818 *vtx, SVEC8_80025818 *nrm, PG3 *poly,
|
||||
s32 n, s32 shift, u32 *ot)
|
||||
{
|
||||
s32 otz;
|
||||
s32 flag;
|
||||
u32 *otp;
|
||||
|
||||
if (n != 0) {
|
||||
/* Zero-instruction launder of the `poly` biv's initial value.
|
||||
* Without it, loop.c's record_initial (loop.c:3454-3511) takes the biv's
|
||||
* initial value straight from the parameter copy `poly = $a3`, so the GIV
|
||||
* preheader init is emitted as `giv = (hard $a3) + 4`. That keeps hard
|
||||
* $a3 live to the preheader, which makes the `poly` pseudo CONFLICT with
|
||||
* $a3 (dump: `75 conflicts: ... 7`), so $a3 goes to the GIV and `poly`
|
||||
* needs an extra `move`. An asm_operands SET_SRC fails
|
||||
* valid_initial_value_p, so bl->initial_value stays the pseudo and $a3
|
||||
* stays free for `poly` -- byte-exact, 135 -> 134 instructions.
|
||||
* It MUST sit below the `n != 0` guard: above it the #APP/#NO_APP pair
|
||||
* blocks the `prim` parameter copy from hopping into the beqz delay slot
|
||||
* (cookbook RC-11). */
|
||||
do {
|
||||
gte_ldv3(&vtx[prim->v0], &vtx[prim->v1], &vtx[prim->v2]);
|
||||
gte_rtpt();
|
||||
gte_stflg(&flag);
|
||||
if ((flag & ~0x1000) == 0) {
|
||||
gte_nclip();
|
||||
gte_stopz(&otz);
|
||||
if (otz > 0) {
|
||||
gte_stsxy3_ft3(poly);
|
||||
gte_avsz3();
|
||||
gte_stotz(&otz);
|
||||
gte_ldv0(&nrm[prim->n0]);
|
||||
gte_ldrgb(&prim->rgb0);
|
||||
gte_nccs();
|
||||
gte_strgb(&poly->r0);
|
||||
gte_ldrgb(&prim->rgb1);
|
||||
gte_nccs();
|
||||
gte_strgb(&poly->r1);
|
||||
gte_ldrgb(&prim->rgb2);
|
||||
gte_nccs();
|
||||
gte_strgb(&poly->r2);
|
||||
poly->code = (poly->code & 2) | 0x30;
|
||||
otp = ot + (otz >> shift);
|
||||
*(u32 *)poly = (*otp & 0xFFFFFF) | 0x06000000;
|
||||
*otp = (u32)poly & 0xFFFFFF;
|
||||
poly++;
|
||||
if (D_800A2B78 != 0) {
|
||||
if (poly[-1].code & 2) {
|
||||
/* 2-word DR_MODE packet chained in front of the G3 */
|
||||
otp = ot + (otz >> shift);
|
||||
*((u8 *)poly + 3) = 1;
|
||||
*(u32 *)((u8 *)poly + 4) =
|
||||
0xE100000A | ((D_800A2B78 & 3) << 5);
|
||||
*(u32 *)poly = (*otp & 0xFFFFFF) | 0x01000000;
|
||||
*otp = (u32)poly & 0xFFFFFF;
|
||||
poly = (PG3 *)((u8 *)poly + 8);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
n--;
|
||||
prim++;
|
||||
} while (n != 0);
|
||||
}
|
||||
return poly;
|
||||
}
|
||||
@@ -0,0 +1,67 @@
|
||||
PG3 *func_80025818(TPRIM_80025818 *prim, SVEC8_80025818 *vtx, SVEC8_80025818 *nrm, PG3 *poly,
|
||||
s32 n, s32 shift, u32 *ot)
|
||||
{
|
||||
s32 otz;
|
||||
s32 flag;
|
||||
u32 *otp;
|
||||
|
||||
if (n != 0) {
|
||||
/* Zero-instruction launder of the `poly` biv's initial value.
|
||||
* Without it, loop.c's record_initial (loop.c:3454-3511) takes the biv's
|
||||
* initial value straight from the parameter copy `poly = $a3`, so the GIV
|
||||
* preheader init is emitted as `giv = (hard $a3) + 4`. That keeps hard
|
||||
* $a3 live to the preheader, which makes the `poly` pseudo CONFLICT with
|
||||
* $a3 (dump: `75 conflicts: ... 7`), so $a3 goes to the GIV and `poly`
|
||||
* needs an extra `move`. An asm_operands SET_SRC fails
|
||||
* valid_initial_value_p, so bl->initial_value stays the pseudo and $a3
|
||||
* stays free for `poly` -- byte-exact, 135 -> 134 instructions.
|
||||
* It MUST sit below the `n != 0` guard: above it the #APP/#NO_APP pair
|
||||
* blocks the `prim` parameter copy from hopping into the beqz delay slot
|
||||
* (cookbook RC-11). */
|
||||
__asm__ ("" : "=r"(poly) : "0"(poly)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9)
|
||||
do {
|
||||
gte_ldv3(&vtx[prim->v0], &vtx[prim->v1], &vtx[prim->v2]);
|
||||
gte_rtpt();
|
||||
gte_stflg(&flag);
|
||||
if ((flag & ~0x1000) == 0) {
|
||||
gte_nclip();
|
||||
gte_stopz(&otz);
|
||||
if (otz > 0) {
|
||||
gte_stsxy3_ft3(poly);
|
||||
gte_avsz3();
|
||||
gte_stotz(&otz);
|
||||
gte_ldv0(&nrm[prim->n0]);
|
||||
gte_ldrgb(&prim->rgb0);
|
||||
gte_nccs();
|
||||
gte_strgb(&poly->r0);
|
||||
gte_ldrgb(&prim->rgb1);
|
||||
gte_nccs();
|
||||
gte_strgb(&poly->r1);
|
||||
gte_ldrgb(&prim->rgb2);
|
||||
gte_nccs();
|
||||
gte_strgb(&poly->r2);
|
||||
poly->code = (poly->code & 2) | 0x30;
|
||||
otp = ot + (otz >> shift);
|
||||
*(u32 *)poly = (*otp & 0xFFFFFF) | 0x06000000;
|
||||
*otp = (u32)poly & 0xFFFFFF;
|
||||
poly++;
|
||||
if (D_800A2B78 != 0) {
|
||||
if (poly[-1].code & 2) {
|
||||
/* 2-word DR_MODE packet chained in front of the G3 */
|
||||
otp = ot + (otz >> shift);
|
||||
*((u8 *)poly + 3) = 1;
|
||||
*(u32 *)((u8 *)poly + 4) =
|
||||
0xE100000A | ((D_800A2B78 & 3) << 5);
|
||||
*(u32 *)poly = (*otp & 0xFFFFFF) | 0x01000000;
|
||||
*otp = (u32)poly & 0xFFFFFF;
|
||||
poly = (PG3 *)((u8 *)poly + 8);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
n--;
|
||||
prim++;
|
||||
} while (n != 0);
|
||||
}
|
||||
return poly;
|
||||
}
|
||||
@@ -0,0 +1,14 @@
|
||||
g6b: verdict NO-MATCH start 23 best 23 compiles 323 path
|
||||
best-scoring single candidates of the last trace (move -> score [residual class]):
|
||||
R5 swap + @16299 -> 23 [COUNT] (from 23)
|
||||
R5 swap + @16292 -> 23 [COUNT] (from 23)
|
||||
R7 block @16273 -> 23 [COUNT] (from 23)
|
||||
R7 do-while @16273 -> 23 [COUNT] (from 23)
|
||||
R7 block @16272 -> 23 [COUNT] (from 23)
|
||||
R7 do-while @16272 -> 23 [COUNT] (from 23)
|
||||
R7 block @16281 -> 23 [COUNT] (from 23)
|
||||
R7 do-while @16281 -> 23 [COUNT] (from 23)
|
||||
R7 block @16310 -> 23 [COUNT] (from 23)
|
||||
R7 block @16295 -> 23 [COUNT] (from 23)
|
||||
R7 block @16284 -> 23 [COUNT] (from 23)
|
||||
R7 do-while @16284 -> 23 [COUNT] (from 23)
|
||||
@@ -0,0 +1,9 @@
|
||||
--- every @class/@stuck/@crack note in this translation unit ---
|
||||
* @class: MATCH — 120/120 byte-exact under tools/match_one.py AND
|
||||
* @class: MATCH — 131/131 byte-exact (relocation-masked), and
|
||||
* @class: (was regalloc-order / sched)
|
||||
* @stuck: none — MATCH, 122/122 instructions, byte-exact under match_one, and
|
||||
* @class: was regalloc-order + IOR-tree reassociation
|
||||
* @stuck: none — MATCH (128 ins), byte-exact under match_one.
|
||||
* @class: MATCH (was LENGTH-DRIFT/+1 -> ADDRESSING -> MATCH)
|
||||
* @class: MATCH (was SCHEDULE-REORDER/2)
|
||||
@@ -0,0 +1,300 @@
|
||||
=== lever-free bodies in main sharing a callee or global with func_80025818 (8 found; top 6 by shared symbols) — read them for the SHAPE ===
|
||||
--- func_800243EC (src/800.c:15354) shares 1: D_800A2B78 ---
|
||||
void func_800243EC(s32 *a0) {
|
||||
s32 v = *a0;
|
||||
|
||||
D_80078D88[0] = v;
|
||||
D_800A2B78 = (v >> 28) & 7;
|
||||
|
||||
if (v & 0x40) {
|
||||
func_80026D64();
|
||||
} else {
|
||||
func_80024448();
|
||||
}
|
||||
}
|
||||
|
||||
--- func_800273F4 (src/800.c:17833) shares 1: D_800A2B78 ---
|
||||
u8 *func_800273F4(TmdG3 *f, u8 *vtx, u8 *nrm, u8 *pkt, s32 n, s32 shift, u32 *ot)
|
||||
{
|
||||
s32 flag;
|
||||
s32 z;
|
||||
u32 *otp;
|
||||
u8 *pkt2;
|
||||
pkt2 = pkt;
|
||||
|
||||
if (n != 0) {
|
||||
do {
|
||||
gte_ldv3(vtx + f->v0 * 8, vtx + f->v1 * 8, vtx + f->v2 * 8);
|
||||
gte_rtpt();
|
||||
gte_stflg(&flag);
|
||||
if ((flag & ~0x1000) == 0) {
|
||||
gte_nclip();
|
||||
gte_stopz(&z);
|
||||
if (z > 0) {
|
||||
gte_stsxy3_ft3(pkt2);
|
||||
gte_avsz3();
|
||||
gte_stotz(&z);
|
||||
*(u32 *)(pkt2 + 4) = f->rgb0;
|
||||
*(u32 *)(pkt2 + 0xC) = f->rgb1;
|
||||
*(u32 *)(pkt2 + 0x14) = f->rgb2;
|
||||
pkt2[7] = (pkt2[7] & 2) | 0x30;
|
||||
otp = ot + (z >> shift);
|
||||
*(u32 *)pkt2 = (*otp & 0xFFFFFF) | 0x6000000;
|
||||
*otp = (u32)pkt2 & 0xFFFFFF;
|
||||
pkt2 += 0x1C;
|
||||
if (D_800A2B78 != 0) {
|
||||
if (pkt2[7 - 0x1C] & 2) {
|
||||
otp = ot + (z >> shift);
|
||||
pkt2[3] = 1;
|
||||
*(u32 *)(pkt2 + 4) = ((D_800A2B78 & 3) << 5) | 0xE100000A;
|
||||
*(u32 *)pkt2 = (*otp & 0xFFFFFF) | 0x1000000;
|
||||
*otp = (u32)pkt2 & 0xFFFFFF;
|
||||
pkt2 += 8;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
n--;
|
||||
f++;
|
||||
} while (n != 0);
|
||||
}
|
||||
return pkt2;
|
||||
}
|
||||
|
||||
--- func_80024BC0 (src/800.c:15700) shares 1: D_800A2B78 ---
|
||||
POLY_F4 *func_80024BC0(Face *f, SVECTOR_80024BC0 *sv, SVECTOR_80024BC0 *nv, POLY_F4 *poly0,
|
||||
s32 n, s32 shift, u32 *ot)
|
||||
{
|
||||
POLY_F4 *poly = poly0;
|
||||
s32 flag;
|
||||
s32 otz;
|
||||
u32 *p;
|
||||
|
||||
if (n != 0) {
|
||||
do {
|
||||
gte_ldv3(&sv[f->v0], &sv[f->v1], &sv[f->v2]);
|
||||
gte_rtpt();
|
||||
gte_stflg(&flag);
|
||||
if ((flag & 0xFFFFEFFF) == 0) {
|
||||
gte_nclip();
|
||||
gte_stopz(&otz);
|
||||
if (otz > 0) {
|
||||
gte_stsxy3_f3(poly);
|
||||
gte_ldv0(&sv[f->v3]);
|
||||
gte_rtps();
|
||||
gte_stflg(&flag);
|
||||
if ((flag & 0xFFFFEFFF) == 0) {
|
||||
gte_stsxy(&poly->x3);
|
||||
gte_avsz4();
|
||||
gte_stotz(&otz);
|
||||
gte_ldrgb(&f->rgb);
|
||||
gte_ldv0(&nv[f->n0]);
|
||||
gte_nccs();
|
||||
gte_strgb(&poly->r0);
|
||||
p = &ot[otz >> shift];
|
||||
poly->tag = (*p & 0x00FFFFFF) | 0x05000000;
|
||||
*p = (u32)poly & 0x00FFFFFF;
|
||||
poly++;
|
||||
if (D_800A2B78 != 0 && (poly[-1].code & 2) != 0) {
|
||||
s32 z = otz;
|
||||
*((u8 *)poly + 3) = 1;
|
||||
p = &ot[z >> shift];
|
||||
*(u32 *)((u8 *)poly + 4) =
|
||||
0xE100000A | ((D_800A2B78 & 3) << 5);
|
||||
poly->tag = (*p & 0x00FFFFFF) | 0x01000000;
|
||||
*p = (u32)poly & 0x00FFFFFF;
|
||||
poly = (POLY_F4 *)((u8 *)poly + 8);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
n--;
|
||||
f++;
|
||||
} while (n != 0);
|
||||
}
|
||||
return poly;
|
||||
}
|
||||
|
||||
--- func_800275BC (src/800.c:17911) shares 1: D_800A2B78 ---
|
||||
void *func_800275BC(TPRIM_800275BC *prim, SVEC_800275BC *vp, void *nrm, u8 *pk, s32 n,
|
||||
s32 shift, u32 *ot)
|
||||
{
|
||||
s32 flag;
|
||||
s32 otz;
|
||||
u32 *op;
|
||||
|
||||
if (n == 0) {
|
||||
return pk;
|
||||
}
|
||||
|
||||
do {
|
||||
gte_ldv3(&vp[prim->v0], &vp[prim->v1], &vp[prim->v2]);
|
||||
gte_rtpt();
|
||||
gte_stflg(&flag);
|
||||
if ((flag & 0xFFFFEFFF) == 0) {
|
||||
gte_nclip();
|
||||
gte_stopz(&otz);
|
||||
if (otz > 0) {
|
||||
gte_stsxy3_ft3(pk);
|
||||
gte_ldv0(&vp[prim->v3]);
|
||||
gte_rtps();
|
||||
gte_stflg(&flag);
|
||||
if ((flag & 0xFFFFEFFF) == 0) {
|
||||
gte_stsxy(pk + 0x20);
|
||||
gte_avsz4();
|
||||
gte_stotz(&otz);
|
||||
*(u32 *)(pk + 0x04) = prim->c0;
|
||||
*(u32 *)(pk + 0x0C) = prim->c1;
|
||||
*(u32 *)(pk + 0x14) = prim->c2;
|
||||
*(u32 *)(pk + 0x1C) = prim->c3;
|
||||
*(u8 *)(pk + 7) = (*(u8 *)(pk + 7) & 2) | 0x38;
|
||||
op = &ot[otz >> shift];
|
||||
*(u32 *)pk = (*op & 0xFFFFFF) | 0x08000000;
|
||||
*op = (u32)pk & 0xFFFFFF;
|
||||
pk += 0x24;
|
||||
if (D_800A2B78 != 0) {
|
||||
if (*(u8 *)(pk - 0x1D) & 2) {
|
||||
op = &ot[otz >> shift];
|
||||
*(u8 *)(pk + 3) = 1;
|
||||
*(u32 *)(pk + 4) =
|
||||
((D_800A2B78 & 3) << 5) | 0xE100000A;
|
||||
*(u32 *)pk = (*op & 0xFFFFFF) | 0x01000000;
|
||||
*op = (u32)pk & 0xFFFFFF;
|
||||
pk += 8;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
prim++;
|
||||
} while (--n != 0);
|
||||
return pk;
|
||||
}
|
||||
|
||||
--- func_8002528C (src/800.c:15971) shares 1: D_800A2B78 ---
|
||||
u8 *func_8002528C(Prim *pr, Vec8 *vtx, Vec8 *nrm, void *arg3, s32 n, s32 shift, u32 *ot)
|
||||
{
|
||||
struct { s32 flag, opz, sz1, sz2, sz3; } g;
|
||||
u8 *pk = (u8 *)arg3;
|
||||
u32 *otp;
|
||||
s32 z;
|
||||
|
||||
if (n != 0) {
|
||||
do {
|
||||
gte_ldv3(&vtx[pr->v0], &vtx[pr->v1], &vtx[pr->v2]);
|
||||
gte_rtpt();
|
||||
gte_stflg(&g.flag);
|
||||
if (!(g.flag & ~0x1000)) {
|
||||
gte_nclip();
|
||||
gte_stopz(&g.opz);
|
||||
if (g.opz > 0) {
|
||||
gte_stsxy3_ft3(pk);
|
||||
if (D_80078D88[0] & 0x8000) {
|
||||
gte_stsz3(&g.sz1, &g.sz2, &g.sz3);
|
||||
if (g.sz1 > g.sz2) {
|
||||
z = g.sz1;
|
||||
if (z < g.sz3) {
|
||||
z = g.sz3;
|
||||
}
|
||||
} else {
|
||||
z = g.sz2;
|
||||
if (z < g.sz3) {
|
||||
z = g.sz3;
|
||||
}
|
||||
}
|
||||
g.opz = z >> 2;
|
||||
} else {
|
||||
gte_avsz3();
|
||||
gte_stotz(&g.opz);
|
||||
}
|
||||
gte_ldrgb(&pr->rgbc);
|
||||
gte_ldv3(&nrm[pr->n0], &nrm[pr->n1], &nrm[pr->n2]);
|
||||
gte_ncct();
|
||||
gte_strgb3_g3(pk);
|
||||
otp = &ot[g.opz >> shift];
|
||||
*(u32 *)pk = (*otp & 0xFFFFFF) | 0x6000000;
|
||||
*otp = (u32)pk & 0xFFFFFF;
|
||||
pk += 0x1C;
|
||||
if (D_800A2B78 != 0 && (pk[-0x15] & 2)) {
|
||||
otp = &ot[g.opz >> shift];
|
||||
pk[3] = 1;
|
||||
*(u32 *)(pk + 4) = 0xE100000A | ((D_800A2B78 & 3) << 5);
|
||||
*(u32 *)pk = (*otp & 0xFFFFFF) | 0x1000000;
|
||||
*otp = (u32)pk & 0xFFFFFF;
|
||||
pk += 8;
|
||||
}
|
||||
}
|
||||
}
|
||||
n--;
|
||||
pr++;
|
||||
} while (n != 0);
|
||||
}
|
||||
return pk;
|
||||
}
|
||||
|
||||
--- func_80024DE8 (src/800.c:15767) shares 1: D_800A2B78 ---
|
||||
u8 *func_80024DE8(TmdG3 *prim, u8 *vtx, u8 *nrm, u8 *pkt, s32 n, s32 shift, u32 *ot)
|
||||
{
|
||||
s32 flag;
|
||||
s32 z;
|
||||
u32 *otp;
|
||||
u8 *pkt2;
|
||||
pkt2 = pkt;
|
||||
|
||||
if (n != 0) {
|
||||
/* Identity no-op (emits nothing). It must sit in the loop PREHEADER (inside the
|
||||
`if (n != 0)`), not before the guard branch.
|
||||
Why: loop.c `record_initial`/`valid_initial_value_p` otherwise take the biv's
|
||||
initial value to be the raw incoming hard reg $a3, so the `pkt2 + 4` giv is
|
||||
emitted as `addiu giv,$a3,4`. That keeps $a3 live past the parameter copy, so
|
||||
the pkt2 pseudo CONFLICTS with $a3 and can never live there (costing an extra
|
||||
`move`). An asm_operands src makes valid_initial_value_p reject it, the giv is
|
||||
computed from the pseudo, and pkt2 keeps $a3.
|
||||
In the preheader it also stays clear of reorg's backward delay-slot scan, which
|
||||
breaks on any asm and would otherwise lose `addu $t5,$a0,$zero` from the guard's
|
||||
delay slot. */
|
||||
do {
|
||||
gte_ldv3(vtx + prim->v0 * 8, vtx + prim->v1 * 8, vtx + prim->v2 * 8);
|
||||
gte_rtpt();
|
||||
gte_stflg(&flag);
|
||||
if ((flag & ~0x1000) == 0) {
|
||||
gte_nclip();
|
||||
gte_stopz(&z);
|
||||
if (z > 0) {
|
||||
gte_stsxy3_ft3(pkt2);
|
||||
gte_avsz3();
|
||||
gte_stotz(&z);
|
||||
gte_ldv0(nrm + prim->n0 * 8);
|
||||
gte_ldrgb(&prim->rgb0);
|
||||
gte_nccs();
|
||||
gte_strgb(pkt2 + 4);
|
||||
gte_ldrgb(&prim->rgb1);
|
||||
gte_nccs();
|
||||
gte_strgb(pkt2 + 0xC);
|
||||
gte_ldrgb(&prim->rgb2);
|
||||
gte_nccs();
|
||||
gte_strgb(pkt2 + 0x14);
|
||||
pkt2[7] = (pkt2[7] & 2) | 0x30;
|
||||
otp = ot + (z >> shift);
|
||||
*(u32 *)pkt2 = (*otp & 0xFFFFFF) | 0x6000000;
|
||||
*otp = (u32)pkt2 & 0xFFFFFF;
|
||||
pkt2 += 0x1C;
|
||||
if (D_800A2B78 != 0) {
|
||||
if (pkt2[7 - 0x1C] & 2) {
|
||||
otp = ot + (z >> shift);
|
||||
pkt2[3] = 1;
|
||||
*(u32 *)(pkt2 + 4) = ((D_800A2B78 & 3) << 5) | 0xE100000A;
|
||||
*(u32 *)pkt2 = (*otp & 0xFFFFFF) | 0x1000000;
|
||||
*otp = (u32)pkt2 & 0xFFFFFF;
|
||||
pkt2 += 8;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
n--;
|
||||
prim++;
|
||||
} while (n != 0);
|
||||
}
|
||||
return pkt2;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,41 @@
|
||||
src/800.c:func_80025818: score 23 (COUNT; mine 135 ins, target 134) — not yet
|
||||
register pairs (mine -> target, count): t1->a3 x14, a3->t1 x11, a3->a0 x1, t1->t5 x1
|
||||
delete mine[1:2] target[1:1]
|
||||
1 move t5,a0 | --
|
||||
replace mine[6:7] target[5:6]
|
||||
6 move t1,a3 | move t5,a0
|
||||
replace mine[11:12] target[10:11]
|
||||
11 addiu a3,a3,4 | addiu t1,a3,4
|
||||
replace mine[46:49] target[45:48]
|
||||
46 swc2 $12,8(t1) | swc2 $12,8(a3)
|
||||
47 swc2 $13,16(t1) | swc2 $13,16(a3)
|
||||
48 swc2 $14,24(t1) | swc2 $14,24(a3)
|
||||
replace mine[64:65] target[63:64]
|
||||
64 swc2 $22,0(a3) | swc2 $22,0(t1)
|
||||
replace mine[70:71] target[69:70]
|
||||
70 addiu v0,t1,12 | addiu v0,a3,12
|
||||
replace mine[76:77] target[75:76]
|
||||
76 addiu v0,t1,20 | addiu v0,a3,20
|
||||
replace mine[78:79] target[77:78]
|
||||
78 lbu v0,3(a3) | lbu v0,3(t1)
|
||||
replace mine[82:83] target[81:82]
|
||||
82 sb v0,3(a3) | sb v0,3(t1)
|
||||
replace mine[84:85] target[83:84]
|
||||
84 addiu a3,a3,28 | addiu t1,t1,28
|
||||
replace mine[92:94] target[91:93]
|
||||
92 and v0,t1,t3 | and v0,a3,t3
|
||||
93 sw v1,0(t1) | sw v1,0(a3)
|
||||
replace mine[99:101] target[98:100]
|
||||
99 addiu t1,t1,28 | addiu a3,a3,28
|
||||
100 lbu v0,-25(a3) | lbu v0,-25(t1)
|
||||
replace mine[108:109] target[107:108]
|
||||
108 sb v0,-1(a3) | sb v0,-1(t1)
|
||||
replace mine[117:119] target[116:118]
|
||||
117 sw v0,0(a3) | sw v0,0(t1)
|
||||
118 addiu a3,a3,8 | addiu t1,t1,8
|
||||
replace mine[123:126] target[122:125]
|
||||
123 and v0,t1,t3 | and v0,a3,t3
|
||||
124 sw v1,0(t1) | sw v1,0(a3)
|
||||
125 addiu t1,t1,8 | addiu a3,a3,8
|
||||
replace mine[131:132] target[130:131]
|
||||
131 move v0,t1 | move v0,a3
|
||||
@@ -0,0 +1 @@
|
||||
NEEDED launder line 17508
|
||||
@@ -0,0 +1,2 @@
|
||||
src/800.c
|
||||
func_80025818
|
||||
@@ -0,0 +1,17 @@
|
||||
void func_80031B7C() {
|
||||
s32 a0 = 0;
|
||||
u8 a2 = 1;
|
||||
u16 a1 = 0x7FFF;
|
||||
u8 *v1;
|
||||
|
||||
v1 = D_800A49D2;
|
||||
|
||||
do {
|
||||
if (v1[4] && !v1[2] && v1[3]) {
|
||||
v1[2] = a2;
|
||||
*(u16 *)v1 = a1;
|
||||
}
|
||||
v1 += 0x54;
|
||||
a0++;
|
||||
} while (a0 < 8);
|
||||
}
|
||||
@@ -0,0 +1,17 @@
|
||||
void func_80031B7C() {
|
||||
s32 a0 = 0;
|
||||
u8 a2 = 1;
|
||||
u16 a1 = 0x7FFF;
|
||||
register u8 *v1 asm("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
|
||||
v1 = D_800A49D2;
|
||||
|
||||
do {
|
||||
if (v1[4] && !v1[2] && v1[3]) {
|
||||
v1[2] = a2;
|
||||
*(u16 *)v1 = a1;
|
||||
}
|
||||
v1 += 0x54;
|
||||
a0++;
|
||||
} while (a0 < 8);
|
||||
}
|
||||
@@ -0,0 +1,14 @@
|
||||
g6b: verdict NO-MATCH start 18 best 15 compiles 155 path R9 swap-stmts @4254 + R6 inline a1 @4244 + R7 do-while @4253
|
||||
best-scoring single candidates of the last trace (move -> score [residual class]):
|
||||
R7 do-while @4253 -> 15 [COUNT] (from 17)
|
||||
R7 do-while @4251 -> 16 [COUNT] (from 17)
|
||||
R12 width a1 u16->s32 @4244 -> 16 [COUNT] (from 16)
|
||||
R6 inline a1 @4244 -> 16 [COUNT] (from 16)
|
||||
R7 block @4254 -> 16 [COUNT] (from 16)
|
||||
R4 decl-move v1 3->0 -> 16 [COUNT] (from 16)
|
||||
R12 width a1 u16->s16 @4244 -> 16 [COUNT] (from 16)
|
||||
R7 do-while @4254 -> 16 [COUNT] (from 16)
|
||||
R4 decl-move v1 3->1 -> 16 [COUNT] (from 16)
|
||||
R12 width a1 u16->u8 @4244 -> 16 [COUNT] (from 16)
|
||||
R7 block @4247 -> 16 [COUNT] (from 16)
|
||||
R4 decl-move v1 3->2 -> 16 [COUNT] (from 16)
|
||||
@@ -0,0 +1 @@
|
||||
|
||||
@@ -0,0 +1 @@
|
||||
=== lever-free bodies in main sharing a callee or global with func_80031B7C (0 found; top 6 by shared symbols) — read them for the SHAPE ===
|
||||
@@ -0,0 +1,24 @@
|
||||
src/800_b_2.c:func_80031B7C: score 18 (COUNT; mine 27 ins, target 25) — not yet
|
||||
replace mine[0:7] target[0:6]
|
||||
0 move a1,zero | move a0,zero
|
||||
1 li a3,1 | li a2,1
|
||||
2 li a2,32767 | li a1,32767
|
||||
3 lui a0,0x0 | lui v1,0x0
|
||||
4 addiu a0,a0,0 | addiu v1,v1,0
|
||||
5 addiu v1,a0,2 | lbu v0,4(v1)
|
||||
6 lbu v0,2(v1) | --
|
||||
replace mine[10:11] target[9:10]
|
||||
10 lbu v0,0(v1) | lbu v0,2(v1)
|
||||
replace mine[14:15] target[13:14]
|
||||
14 lbu v0,1(v1) | lbu v0,3(v1)
|
||||
replace mine[18:20] target[17:22]
|
||||
18 sb a3,0(v1) | sb a2,2(v1)
|
||||
19 sh a2,0(a0) | sh a1,0(v1)
|
||||
20 -- | addiu a0,a0,1
|
||||
21 -- | slti v0,a0,8
|
||||
22 -- | bnez v0,52d4 <func_80031B7C+0x14>
|
||||
delete mine[21:25] target[23:23]
|
||||
21 addiu a1,a1,1 | --
|
||||
22 slti v0,a1,8 | --
|
||||
23 bnez v0,52d8 <func_80031B7C+0x18> | --
|
||||
24 addiu a0,a0,84 | --
|
||||
@@ -0,0 +1,4 @@
|
||||
REMOVED pin $4 line 4244
|
||||
REMOVED pin $6 line 4245
|
||||
REMOVED pin $5 line 4246
|
||||
NEEDED pin $3 line 4247
|
||||
@@ -0,0 +1,2 @@
|
||||
src/800_b_2.c
|
||||
func_80031B7C
|
||||
@@ -0,0 +1,17 @@
|
||||
s32 func_800331D4(s32 arg0) {
|
||||
u16 *p;
|
||||
s32 i;
|
||||
|
||||
p = D_800A46E8;
|
||||
i = 0;
|
||||
do {
|
||||
if ((*p & 0x3F) == 1 && p[2] == (arg0 & 0xFFFF)) {
|
||||
if (((u32)arg0 >> 16) == 0 || ((u32)arg0 >> 16) == p[3]) {
|
||||
return i + 1;
|
||||
}
|
||||
}
|
||||
i += 1;
|
||||
p += 42;
|
||||
} while (i < 8);
|
||||
return 0;
|
||||
}
|
||||
@@ -0,0 +1,17 @@
|
||||
s32 func_800331D4(s32 arg0) {
|
||||
u16 *p;
|
||||
register s32 i __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
|
||||
p = D_800A46E8;
|
||||
i = 0;
|
||||
do {
|
||||
if ((*p & 0x3F) == 1 && p[2] == (arg0 & 0xFFFF)) {
|
||||
if (((u32)arg0 >> 16) == 0 || ((u32)arg0 >> 16) == p[3]) {
|
||||
return i + 1;
|
||||
}
|
||||
}
|
||||
i += 1;
|
||||
p += 42;
|
||||
} while (i < 8);
|
||||
return 0;
|
||||
}
|
||||
@@ -0,0 +1,16 @@
|
||||
g6b: verdict NO-MATCH start 9 best 9 compiles 126 path
|
||||
s3: verdict NO-MATCH start 9 best 9 compiles 132 path
|
||||
s3b: verdict NO-MATCH start 9 best 9 compiles 132 path
|
||||
best-scoring single candidates of the last trace (move -> score [residual class]):
|
||||
R10 param-copy arg0 @5660 -> 9 [REG] (from 9)
|
||||
R7 block @5670 -> 9 [REG] (from 9)
|
||||
R9 swap-stmts @5669 -> 9 [MIXED] (from 9)
|
||||
R4 decl-move i 1->0 -> 9 [REG] (from 9)
|
||||
R7 block @5669 -> 9 [REG] (from 9)
|
||||
R7 do-while @5669 -> 9 [REG] (from 9)
|
||||
R7 block @5661 -> 9 [REG] (from 9)
|
||||
R7 block @5662 -> 9 [REG] (from 9)
|
||||
R7 do-while @5662 -> 9 [REG] (from 9)
|
||||
R4 decl-move i 1->0 -> 9 [MIXED] (from 9)
|
||||
R7 block @5670 -> 9 [MIXED] (from 9)
|
||||
R10 param-copy arg0 @5660 -> 9 [MIXED] (from 9)
|
||||
@@ -0,0 +1 @@
|
||||
|
||||
@@ -0,0 +1,90 @@
|
||||
=== lever-free bodies in main sharing a callee or global with func_800331D4 (15 found; top 6 by shared symbols) — read them for the SHAPE ===
|
||||
--- func_800342E8 (src/800_b_2.c:6726) shares 1: D_800A46E8 ---
|
||||
void func_800342E8(u8 *a0, s32 a1) {
|
||||
u32 t = a1 * 84 + (u32)D_800A46E8;
|
||||
*(u8 *)(t + (u32)a0 + 0x3A) = 0;
|
||||
}
|
||||
|
||||
--- func_800347C8 (src/800_b_2.c:7019) shares 1: D_800A46E8 ---
|
||||
void func_800347C8(s32 arg0) {
|
||||
Sl *e;
|
||||
s32 i;
|
||||
|
||||
e = (Sl *)D_800A46E8;
|
||||
for (i = 0; i < 8; i++, e++) {
|
||||
if (e->state == 5 && e->id == (s16)arg0 &&
|
||||
((arg0 >> 16) == 0 || (arg0 >> 16) == e->group)) {
|
||||
e->active = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
--- func_800348A8 (src/800_b_2.c:7060) shares 1: D_800A46E8 ---
|
||||
s32 func_800348A8(u32 arg0) {
|
||||
u16 *p;
|
||||
s32 i;
|
||||
|
||||
p = D_800A46E8;
|
||||
for (i = 0; i < 8; i++, p += 0x2A) {
|
||||
if (p[0] == 5 && p[2] == (arg0 & 0xFFFF) && ((arg0 >> 16) == 0 || p[3] == (arg0 >> 16))) {
|
||||
return ++i;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
--- func_80031D70 (src/800_b_2.c:4322) shares 1: D_800A46E8 ---
|
||||
void func_80031D70(void) {
|
||||
extern u16 D_800A46E8[];
|
||||
extern void func_8003350C(s32 a0, s32 a1);
|
||||
u16 *p;
|
||||
s32 i;
|
||||
|
||||
p = D_800A46E8;
|
||||
i = 0;
|
||||
do {
|
||||
if (((*p & 0x3F) == 1) && (*(u8 *)(p + 5) != 0)) {
|
||||
func_8003350C(i, 0);
|
||||
}
|
||||
i += 1;
|
||||
p += 0x2A;
|
||||
} while (i < 8);
|
||||
}
|
||||
|
||||
--- func_80031E94 (src/800_b_2.c:4363) shares 1: D_800A46E8 ---
|
||||
void func_80031E94(void) {
|
||||
extern u16 D_800A46E8[];
|
||||
extern void func_80034A9C(void *a0);
|
||||
u16 *p;
|
||||
s32 i;
|
||||
|
||||
p = D_800A46E8;
|
||||
i = 0;
|
||||
do {
|
||||
if ((*p & 0x3F) != 1 && (*p & 0x3F) == 5) {
|
||||
func_80034A9C(p);
|
||||
}
|
||||
i += 1;
|
||||
p += 0x2A;
|
||||
} while (i < 8);
|
||||
}
|
||||
|
||||
--- func_80033324 (src/800_b_2.c:5768) shares 1: D_800A46E8 ---
|
||||
void func_80033324(s32 a0, s32 a1) {
|
||||
u8 *e = (u8 *)D_800A46E8 + a1 * 0x54;
|
||||
u16 t;
|
||||
|
||||
if ((*(u16 *)e & 0x3F) == 1) {
|
||||
*(u8 *)(e + a0 + 0xE) = 0;
|
||||
t = *(u16 *)(e + 0xC) - 1;
|
||||
*(u16 *)(e + 0xC) = t;
|
||||
if (t != 0) {
|
||||
return;
|
||||
}
|
||||
if (*(u8 *)(e + 0xA) != 5) {
|
||||
*(u8 *)(e + 0xA) = 0;
|
||||
*(u16 *)e = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,16 @@
|
||||
src/800_b_2.c:func_800331D4: score 9 (REG-caller; mine 30 ins, target 30) — not yet
|
||||
register pairs (mine -> target, count): a1->v1 x6, v1->a1 x5
|
||||
replace mine[2:3] target[2:3]
|
||||
2 move a1,zero | move v1,zero
|
||||
replace mine[6:7] target[6:7]
|
||||
6 addiu v1,a2,6 | addiu a1,a2,6
|
||||
replace mine[12:13] target[12:13]
|
||||
12 lhu v0,-2(v1) | lhu v0,-2(a1)
|
||||
replace mine[17:19] target[17:19]
|
||||
17 addiu v0,a1,1 | addiu v0,v1,1
|
||||
18 lhu v0,0(v1) | lhu v0,0(a1)
|
||||
replace mine[21:25] target[21:25]
|
||||
21 addiu v0,a1,1 | addiu v0,v1,1
|
||||
22 addiu a1,a1,1 | addiu v1,v1,1
|
||||
23 addiu v1,v1,84 | addiu a1,a1,84
|
||||
24 slti v0,a1,8 | slti v0,v1,8
|
||||
@@ -0,0 +1 @@
|
||||
NEEDED pin $3 line 5661
|
||||
@@ -0,0 +1,2 @@
|
||||
src/800_b_2.c
|
||||
func_800331D4
|
||||
@@ -0,0 +1,73 @@
|
||||
void func_800336A8(Req336A8 *arg)
|
||||
{
|
||||
Chan336A8 *ch;
|
||||
Voice336A8 *vo;
|
||||
u16 *p;
|
||||
const u16 *q;
|
||||
u32 m;
|
||||
u32 n;
|
||||
u32 v;
|
||||
s32 i;
|
||||
s32 j;
|
||||
|
||||
for (i = 0; i < 8; i++) {
|
||||
if (arg->unk3A[i] == 0) {
|
||||
continue;
|
||||
}
|
||||
ch = (Chan336A8 *)(D_800A4988 + i * 0x54);
|
||||
vo = (Voice336A8 *)(D_800A4988 + 0x2A0 + i * 0x48);
|
||||
vo->unk00 = D_80073140[ch->unk0A];
|
||||
m = ch->unk34;
|
||||
m = D_8006AA30[m];
|
||||
m = m * *(s16 *)(D_800A4988 + 0x572);
|
||||
m = m >> 7;
|
||||
if (arg->unk16 != 0) {
|
||||
m = m * arg->unk18;
|
||||
m = m >> 15;
|
||||
}
|
||||
p = arg->unk1C;
|
||||
for (j = 2; j >= 0; j--, p += 4) {
|
||||
m = m * *p;
|
||||
m = m >> 14;
|
||||
}
|
||||
n = ch->unk35;
|
||||
if (n == 0) {
|
||||
v = m;
|
||||
vo->unk0A = v;
|
||||
vo->unk08 = v;
|
||||
} else {
|
||||
if (arg->unk38 != 0) {
|
||||
n += arg->unk38;
|
||||
if (n >= 0x42) {
|
||||
n -= 0x40;
|
||||
if (n >= 0x80) {
|
||||
n = 0x7F;
|
||||
}
|
||||
} else {
|
||||
n = 1;
|
||||
}
|
||||
}
|
||||
ch->unk52 = n;
|
||||
if (D_800A4F19 != 0) {
|
||||
/* zero-byte dbr fence: ASM_INPUT stops reorg's fallthrough trial scan
|
||||
* (stop_search_p), so the beqz above keeps its `nop` delay slot. */
|
||||
v = (m * D_8007319E[n]) >> 14;
|
||||
vo->unk0A = v;
|
||||
q = D_8007319E + 1;
|
||||
v = (m * q[0x7F - n]) >> 14;
|
||||
vo->unk08 = v;
|
||||
} else {
|
||||
v = (m * D_8007321E) >> 14;
|
||||
vo->unk0A = v;
|
||||
vo->unk08 = v;
|
||||
}
|
||||
}
|
||||
vo->unk40 = ch->unk0A;
|
||||
if (vo->unk44 != 0) {
|
||||
vo->unk04 |= 3;
|
||||
} else {
|
||||
vo->unk04 = 3;
|
||||
vo->unk44 = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,74 @@
|
||||
void func_800336A8(Req336A8 *arg)
|
||||
{
|
||||
Chan336A8 *ch;
|
||||
Voice336A8 *vo;
|
||||
u16 *p;
|
||||
const u16 *q;
|
||||
u32 m;
|
||||
u32 n;
|
||||
u32 v;
|
||||
s32 i;
|
||||
s32 j;
|
||||
|
||||
for (i = 0; i < 8; i++) {
|
||||
if (arg->unk3A[i] == 0) {
|
||||
continue;
|
||||
}
|
||||
ch = (Chan336A8 *)(D_800A4988 + i * 0x54);
|
||||
vo = (Voice336A8 *)(D_800A4988 + 0x2A0 + i * 0x48);
|
||||
vo->unk00 = D_80073140[ch->unk0A];
|
||||
m = ch->unk34;
|
||||
m = D_8006AA30[m];
|
||||
m = m * *(s16 *)(D_800A4988 + 0x572);
|
||||
m = m >> 7;
|
||||
if (arg->unk16 != 0) {
|
||||
m = m * arg->unk18;
|
||||
m = m >> 15;
|
||||
}
|
||||
p = arg->unk1C;
|
||||
for (j = 2; j >= 0; j--, p += 4) {
|
||||
m = m * *p;
|
||||
m = m >> 14;
|
||||
}
|
||||
n = ch->unk35;
|
||||
if (n == 0) {
|
||||
v = m;
|
||||
vo->unk0A = v;
|
||||
vo->unk08 = v;
|
||||
} else {
|
||||
if (arg->unk38 != 0) {
|
||||
n += arg->unk38;
|
||||
if (n >= 0x42) {
|
||||
n -= 0x40;
|
||||
if (n >= 0x80) {
|
||||
n = 0x7F;
|
||||
}
|
||||
} else {
|
||||
n = 1;
|
||||
}
|
||||
}
|
||||
ch->unk52 = n;
|
||||
if (D_800A4F19 != 0) {
|
||||
/* zero-byte dbr fence: ASM_INPUT stops reorg's fallthrough trial scan
|
||||
* (stop_search_p), so the beqz above keeps its `nop` delay slot. */
|
||||
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9)
|
||||
v = (m * D_8007319E[n]) >> 14;
|
||||
vo->unk0A = v;
|
||||
q = D_8007319E + 1;
|
||||
v = (m * q[0x7F - n]) >> 14;
|
||||
vo->unk08 = v;
|
||||
} else {
|
||||
v = (m * D_8007321E) >> 14;
|
||||
vo->unk0A = v;
|
||||
vo->unk08 = v;
|
||||
}
|
||||
}
|
||||
vo->unk40 = ch->unk0A;
|
||||
if (vo->unk44 != 0) {
|
||||
vo->unk04 |= 3;
|
||||
} else {
|
||||
vo->unk04 = 3;
|
||||
vo->unk44 = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,14 @@
|
||||
g6b: verdict NO-MATCH start 7 best 6 compiles 320 path R9 swap-stmts @6085
|
||||
best-scoring single candidates of the last trace (move -> score [residual class]):
|
||||
R9 swap-stmts @6085 -> 6 [COUNT] (from 7)
|
||||
R7 block @6073 -> 6 [COUNT] (from 6)
|
||||
R5 swap * @6059 -> 6 [COUNT] (from 6)
|
||||
R10 param-copy arg @6041 -> 6 [COUNT] (from 6)
|
||||
R8 hoist tmp0 @6083 -> 6 [COUNT] (from 6)
|
||||
R7 do-while @6073 -> 6 [COUNT] (from 6)
|
||||
R5 swap * @6054 -> 6 [COUNT] (from 6)
|
||||
R8 hoist tmp0 @6085 -> 6 [COUNT] (from 6)
|
||||
R7 block @6094 -> 6 [COUNT] (from 6)
|
||||
R5 swap * @6051 -> 6 [COUNT] (from 6)
|
||||
R8 hoist tmp0 @6089 -> 6 [COUNT] (from 6)
|
||||
R9 swap-stmts @6086 -> 6 [COUNT] (from 6)
|
||||
@@ -0,0 +1 @@
|
||||
|
||||
@@ -0,0 +1,461 @@
|
||||
=== lever-free bodies in main sharing a callee or global with func_800336A8 (10 found; top 6 by shared symbols) — read them for the SHAPE ===
|
||||
--- func_8002C8F4 (src/800_b_2.c:205) shares 2: D_800A4988 D_800A4F19 ---
|
||||
void func_8002C8F4(void)
|
||||
{
|
||||
s32 sp10[2];
|
||||
s32 *p;
|
||||
u8 *q;
|
||||
s32 i;
|
||||
s32 j;
|
||||
s32 k;
|
||||
s32 n;
|
||||
s32 m;
|
||||
|
||||
func_8003A424();
|
||||
func_8003D518();
|
||||
|
||||
p = &D_800A4EA4;
|
||||
*p = 0x23CF;
|
||||
D_800A4EA8 = 0x3FFF;
|
||||
D_800A4EAA = 0x3FFF;
|
||||
D_800A4EB4 = 0x3FFF;
|
||||
D_800A4EB6 = 0x3FFF;
|
||||
D_800A4EAC = 0;
|
||||
D_800A4EAE = 0;
|
||||
D_800A4EB8 = 0;
|
||||
D_800A4EBC = 1;
|
||||
D_800A4EC8 = 0;
|
||||
|
||||
func_8003C598(p);
|
||||
func_8003BE24(1);
|
||||
func_8002D1F0(4);
|
||||
func_8003B280(1);
|
||||
func_80037D98();
|
||||
|
||||
D_800A4E68 = 0x3C;
|
||||
D_800A4E6C = 0x2F;
|
||||
D_800A4E6E = 0x2F;
|
||||
D_800A4E70 = 1;
|
||||
D_800A4F18 = 1;
|
||||
D_800A4F19 = 1;
|
||||
D_800A4EF6 = 1;
|
||||
(&D_800A4638)[1] = 0x1010;
|
||||
D_800A4638 = 0;
|
||||
D_800A4E7A = 0;
|
||||
D_800A46E4 = 0;
|
||||
D_800A4654 = 0x10000;
|
||||
D_800A466C = 0x14000;
|
||||
D_800A4684 = 0x18000;
|
||||
D_800A469C = 0x39F00;
|
||||
|
||||
for (j = 0x54; j >= 0; j -= 0xC) {
|
||||
*(s32 *)((u8 *)&D_800A64B0 + j) = 0;
|
||||
}
|
||||
|
||||
for (i = 0; i < 5; i++) {
|
||||
k = i * 0x18;
|
||||
D_800A4650[k] = 1;
|
||||
*(s16 *)((u8 *)D_800A4644 + k) = 0;
|
||||
*(s16 *)((u8 *)D_800A4642 + k) = -1;
|
||||
}
|
||||
|
||||
for (n = 0x24C; n >= 0; n -= 0x54) {
|
||||
*(u16 *)((u8 *)D_800A46E8 + n) = 0;
|
||||
}
|
||||
|
||||
m = 0x10;
|
||||
for (i = 0, q = D_800A4988 + 0x4F; i < 8; i++, m++, q += 0x54) {
|
||||
k = i * 0x48;
|
||||
q[2] = i;
|
||||
*(s16 *)(q - 0x45) = m;
|
||||
q[-1] = 0;
|
||||
*(s32 *)(q - 0x4B) = 0;
|
||||
*(s32 *)(q - 0xF) = 0;
|
||||
q[1] = 0;
|
||||
*(s32 *)((u8 *)D_800A4C68 + k) = m;
|
||||
D_800A4C6C[k] = 0;
|
||||
D_800A4C6D[k] = 0;
|
||||
}
|
||||
|
||||
func_8002CC4C();
|
||||
|
||||
D_800A4EFA = 0x7F;
|
||||
D_800A4EF8 = 0x7F;
|
||||
D_800A4F1B = 1;
|
||||
D_800A46BA = 0;
|
||||
D_800A2B98 = 0;
|
||||
D_800C7D20 = 0;
|
||||
D_800C7D2C = 0;
|
||||
D_800A2BA0 = 0;
|
||||
D_800A4F17 = 0;
|
||||
D_800A4E8E = 0;
|
||||
D_800A4EA2 = 0;
|
||||
D_800A4EF0 = 0;
|
||||
D_800A4EE8 = 0;
|
||||
D_800A4EFC = 0;
|
||||
D_800A4F20 = 0;
|
||||
D_800A4F22 = 0;
|
||||
D_800A4F1D = 0;
|
||||
D_800A4EEC = 0;
|
||||
D_800A4EE6 = 0;
|
||||
D_800A4EE0 = 0x4000;
|
||||
D_800A4EE4 = 0x4000;
|
||||
D_800A4F24 = 0;
|
||||
D_800A4F16 = 0;
|
||||
|
||||
func_8002FAE0();
|
||||
func_80037CC8();
|
||||
func_8003BE74(0, 0xFFFFFF);
|
||||
|
||||
sp10[0] = 1;
|
||||
sp10[1] = 0;
|
||||
func_8003B1EC(sp10);
|
||||
|
||||
D_800A4F1C = 0;
|
||||
D_800A4F1E = 0;
|
||||
func_80034C24();
|
||||
func_80037004();
|
||||
}
|
||||
|
||||
--- func_80039308 (src/800_c.c:3468) shares 2: D_80073140 D_800A4F19 ---
|
||||
void func_80039308(u8 **arg0, s16 arg1) {
|
||||
u8 *src;
|
||||
u8 *s0;
|
||||
u8 *t9;
|
||||
u8 *a3;
|
||||
u8 *t1;
|
||||
u8 *a1p;
|
||||
u8 *a0p;
|
||||
u8 *p;
|
||||
u8 *q;
|
||||
u8 *r;
|
||||
u8 *tb;
|
||||
s32 b2;
|
||||
s32 b3;
|
||||
s16 b4;
|
||||
s32 bb;
|
||||
u8 t3;
|
||||
u8 t5;
|
||||
s16 t7;
|
||||
s16 cc;
|
||||
s32 i;
|
||||
s32 cnt;
|
||||
s32 a2;
|
||||
s32 t0;
|
||||
s32 v1;
|
||||
s32 res;
|
||||
s32 idx1;
|
||||
u8 *cb;
|
||||
s32 *mm;
|
||||
s32 *mp;
|
||||
s32 mv2;
|
||||
s32 two;
|
||||
s32 tmp;
|
||||
s32 pan;
|
||||
s32 pan1;
|
||||
s32 x;
|
||||
s32 s17;
|
||||
s32 s18;
|
||||
s32 v;
|
||||
s32 u26;
|
||||
s32 n;
|
||||
s32 off;
|
||||
u32 t2;
|
||||
u16 vol;
|
||||
u32 vv;
|
||||
u32 prod;
|
||||
s32 k2;
|
||||
u8 *tbl;
|
||||
s32 tmp2;
|
||||
s32 coff;
|
||||
s32 xoff;
|
||||
s32 mv;
|
||||
s32 j;
|
||||
s32 ax;
|
||||
s32 ax2;
|
||||
u8 *pb;
|
||||
s32 c7;
|
||||
u32 gx;
|
||||
|
||||
src = *arg0;
|
||||
*arg0 = src + 1;
|
||||
b2 = src[0];
|
||||
*arg0 = src + 2;
|
||||
b3 = src[1];
|
||||
|
||||
if (b3 != 0) {
|
||||
if ((((u8 *)arg0 + arg1)[0x1BA] & 1) == 0) {
|
||||
s0 = (u8 *)arg0 + (arg1 * 26 + 26);
|
||||
i = 0;
|
||||
b4 = *s0;
|
||||
n = b4;
|
||||
v = n * 0x10;
|
||||
t9 = *(u8 **)((u8 *)arg0 + 0x1E0) + n * 0x200;
|
||||
cnt = *(*(u8 **)((u8 *)arg0 + 0x1DC) + v);
|
||||
if (cnt != 0) {
|
||||
u26 = b2;
|
||||
do {
|
||||
if (u26 >= t9[6] && u26 <= t9[7]) {
|
||||
t2 = 0x100;
|
||||
t3 = 0;
|
||||
t5 = 0;
|
||||
t7 = -1;
|
||||
t0 = 0;
|
||||
a3 = D_800C6DDD;
|
||||
a2 = 1;
|
||||
t1 = D_800762B0;
|
||||
do {
|
||||
if (a3[0x4E] != 0) {
|
||||
bb = a3[0];
|
||||
if ((u8)bb < (t2 & 0xFF)) {
|
||||
t3 = a2;
|
||||
t2 = bb & 0xFF;
|
||||
} else if ((u8)bb == (t2 & 0xFF)) {
|
||||
if (D_800762B3[a2] == 0 && *t1 == 2) {
|
||||
t3 = a2;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
t5 = 1;
|
||||
t7 = t0;
|
||||
break;
|
||||
}
|
||||
a2++;
|
||||
t1++;
|
||||
t0++;
|
||||
a3 += 0x60;
|
||||
} while (t0 < 0x10);
|
||||
if (t5 == 0) {
|
||||
if (*t9 >= t2) {
|
||||
t7 = t3 - 1;
|
||||
} else {
|
||||
a1p = D_800762B0;
|
||||
a0p = D_800762B4;
|
||||
v1 = 0;
|
||||
while (v1 < 0x10) {
|
||||
if (*a1p == 2 && *a0p == 0) {
|
||||
res = v1;
|
||||
goto found;
|
||||
}
|
||||
v1++;
|
||||
a1p++;
|
||||
a0p++;
|
||||
}
|
||||
res = -1;
|
||||
found:
|
||||
t7 = res;
|
||||
}
|
||||
}
|
||||
if (t7 >= 0) {
|
||||
p = &D_800C6DD0[t7 * 0x60];
|
||||
q = p + 0x10;
|
||||
p[0xD] = *t9;
|
||||
if (p[0x5C] != 0 && *(s16 *)(p + 8) == b4 && p[0xC] == i &&
|
||||
*(s16 *)(*(u32 *)(p + 0x50) + 0x1EC) == *(s16 *)((u8 *)arg0 + 0x1EC)) {
|
||||
*(s32 *)(p + 0x14) = 0x13;
|
||||
} else {
|
||||
tmp = *(s16 *)(t9 + 0x16) - 1;
|
||||
tbl = *(u8 **)((u8 *)arg0 + 0x1DC) + (tmp >> 1) * 0x10;
|
||||
if (tmp & 1) {
|
||||
x = *(s16 *)(tbl + 0xE) << 3;
|
||||
} else {
|
||||
x = *(s16 *)(tbl + 0xC) << 3;
|
||||
}
|
||||
*(s32 *)(q + 0x1C) = x;
|
||||
*(u16 *)(q + 0x3A) = *(u16 *)(t9 + 0x10);
|
||||
*(u16 *)(q + 0x3C) = *(u16 *)(t9 + 0x12);
|
||||
*(s32 *)(q + 4) = 0x6009F;
|
||||
}
|
||||
gx = s0[1];
|
||||
gx -= 0x100;
|
||||
v = b3 * (u8)gx;
|
||||
v >>= 7;
|
||||
v = v * t9[2];
|
||||
v >>= 7;
|
||||
v = D_8006ACD8[v];
|
||||
v = v * *(s16 *)((u8 *)arg0 + 0x1F2);
|
||||
v >>= 7;
|
||||
if (D_800A4F19 != 0) {
|
||||
bb = s0[4];
|
||||
pan1 = bb + t9[3]; pan1 -= 0x40;
|
||||
cc = pan1;
|
||||
if (pan1 < 0) {
|
||||
cc = 0;
|
||||
} else if (pan1 >= 0x80) {
|
||||
cc = 0x7F;
|
||||
}
|
||||
if (cc > 0) {
|
||||
s17 = v * D_8006AF08[0x80 - cc] * 4 >> 16;
|
||||
} else {
|
||||
s17 = (s16)v;
|
||||
}
|
||||
s18 = v * D_8006AF08[cc] * 4 >> 16;
|
||||
} else {
|
||||
s17 = s18 = v * 0x2D41 >> 14;
|
||||
}
|
||||
*(s16 *)(q + 8) = (u32)((s16)s17 * *(s16 *)((u8 *)arg0 + 0x10)) >> 14;
|
||||
*(s16 *)(q + 0xA) = (u32)((s16)s18 * *(s16 *)((u8 *)arg0 + 0x10)) >> 14;
|
||||
pan = *(s16 *)(s0 + 2);
|
||||
vol = b2 * 0x100;
|
||||
if (pan >= 0x41) {
|
||||
vol = (b2 * 0x100) + (u32)((pan - 0x40) * t9[0xD] * 4);
|
||||
} else if (pan < 0x40) {
|
||||
vol = (b2 * 0x100) - (u32)((0x40 - pan) * t9[0xC] * 4);
|
||||
}
|
||||
tmp2 = t9[4] * 0x100 - t9[5];
|
||||
*(s32 *)(p + 0x54) = tmp2;
|
||||
tmp2 -= 0x3C00;
|
||||
vol -= (u32)tmp2;
|
||||
p[0x58] = t9[0xC];
|
||||
p[0x59] = t9[0xD];
|
||||
vv = (u16)vol;
|
||||
if (vv >= 0x5301) {
|
||||
*(s16 *)(q + 0x14) = 0x3FFF;
|
||||
} else {
|
||||
prod = D_8006AB30[vv >> 8];
|
||||
prod *= D_8006ABD8[(vv & 0xFE) / 2];
|
||||
*(s16 *)(q + 0x14) = prod >> 15;
|
||||
}
|
||||
p[0x5D] = 1;
|
||||
D_800A2B98 &= ~((VMask *)q)->w;
|
||||
D_800C7D20 |= ((VMask *)q)->w;
|
||||
D_800762B4[t7] = 1;
|
||||
if (t9[1] & 4) {
|
||||
D_800A2BA0 &= ~((VMask *)q)->w;
|
||||
D_800C7D2C |= ((VMask *)q)->w;
|
||||
} else {
|
||||
D_800C7D2C &= ~((VMask *)q)->w;
|
||||
D_800A2BA0 |= ((VMask *)q)->w;
|
||||
}
|
||||
idx1 = t7;
|
||||
r = &D_800C6DD0[idx1 * 0x60];
|
||||
p = r;
|
||||
if (r[0x5A] != 0) {
|
||||
coff = *(s16 *)&r[6] * 26;
|
||||
*(u8 *)(*(u32 *)&r[0x50] + coff + idx1 + 0x23) = 0;
|
||||
r[0x5A] = 0;
|
||||
}
|
||||
r = 0;
|
||||
*(s0 + idx1 + 9) = 1;
|
||||
*(s16 *)(p + 4) = b2;
|
||||
*(s16 *)(p + 8) = b4;
|
||||
p[0xC] = i;
|
||||
p[0x5C] = 1;
|
||||
*(s16 *)(p + 0) = s17;
|
||||
*(s16 *)(p + 2) = s18;
|
||||
*(s16 *)(p + 6) = arg1;
|
||||
*(u32 *)(p + 0x50) = (u32)arg0;
|
||||
p[0x5B] = 1;
|
||||
if (*((u8 *)arg0 + 0x1F4) != 0) {
|
||||
p[0x5A] = 2;
|
||||
} else {
|
||||
p[0x5A] = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
i++;
|
||||
t9 += 0x20;
|
||||
} while (i < cnt);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
j = 0;
|
||||
s17 = (s32)((u8 *)arg0 + arg1 * 26);
|
||||
s18 = b2;
|
||||
off = 0;
|
||||
do {
|
||||
if (((u8 *)s17 + j)[0x23] != 0 && *(s16 *)&D_800C6DD4[off] == s18) {
|
||||
idx1 = (s16)j;
|
||||
xoff = idx1 * 0x60;
|
||||
cb = D_800C6DD0;
|
||||
r = cb + xoff;
|
||||
if (r[0x5A] != 0) {
|
||||
coff = *(s16 *)&r[6] * 26;
|
||||
*(u8 *)(*(u32 *)&r[0x50] + coff + idx1 + 0x23) = 0;
|
||||
r[0x5A] = 0;
|
||||
}
|
||||
mm = (s32 *)D_80073140;
|
||||
D_800C7D20 &= ~mm[j];
|
||||
D_800A2B98 |= mm[j];
|
||||
pb = D_800762B0 + j;
|
||||
two = 2;
|
||||
*pb = two;
|
||||
D_800762B4[j] = 0;
|
||||
}
|
||||
cb = 0;
|
||||
mm = 0;
|
||||
two = 0;
|
||||
j++;
|
||||
off += 0x60;
|
||||
} while (j < 0x10);
|
||||
}
|
||||
}
|
||||
|
||||
--- func_8002E5BC (src/800_b_2.c:1546) shares 1: D_800A4F19 ---
|
||||
void func_8002E5BC(void) {
|
||||
u8 sp10[4];
|
||||
|
||||
sp10[0] = 0x5A;
|
||||
sp10[1] = 0x5A;
|
||||
sp10[2] = 0x5A;
|
||||
sp10[3] = 0x5A;
|
||||
CdMix(sp10);
|
||||
D_800A4F19 = 0;
|
||||
}
|
||||
|
||||
--- func_8002E5F8 (src/800_b_2.c:1560) shares 1: D_800A4F19 ---
|
||||
void func_8002E5F8(void) {
|
||||
u8 sp10[4];
|
||||
|
||||
sp10[0] = 0x80;
|
||||
sp10[1] = 0;
|
||||
sp10[2] = 0x80;
|
||||
sp10[3] = 0;
|
||||
CdMix(sp10);
|
||||
D_800A4F19 = 1;
|
||||
}
|
||||
|
||||
--- func_80034650 (src/800_b_2.c:6940) shares 1: D_800A4988 ---
|
||||
void func_80034650(u8 *param_1, s32 param_2)
|
||||
{
|
||||
s32 i;
|
||||
s32 pm;
|
||||
|
||||
pm = (param_2 & 0xFF) << 16;
|
||||
for (i = 0; i < 8; i++) {
|
||||
if (*(param_1 + i + 0x3A) != 0) {
|
||||
func_80030D80((Ent30D80 *)(D_800A4988 + i * 0x54), pm >> 16);
|
||||
}
|
||||
}
|
||||
*(u16 *)param_1 = 0;
|
||||
}
|
||||
|
||||
--- func_80031A98 (src/800_b_2.c:4208) shares 1: D_800A4988 ---
|
||||
void func_80031A98(void)
|
||||
{
|
||||
u8 *p;
|
||||
s32 i;
|
||||
s32 w;
|
||||
u16 h;
|
||||
|
||||
for (p = D_800A4988, i = 0; i < 8; i++, p += 0x54) {
|
||||
if (p[0x4E] != 0) {
|
||||
if (p[0x36] != 0) {
|
||||
w = *(s16 *)((u8 *)D_800C532A + (*(u16 *)(p + 0xE) << 2));
|
||||
goto chk;
|
||||
}
|
||||
h = *(u16 *)(p + 0xE);
|
||||
if (h & 0x80) {
|
||||
if (D_800A46B0 != 0)
|
||||
func_80030D80((Ent30D80 *)p, 1);
|
||||
} else {
|
||||
w = *(s16 *)((u8 *)D_800C5328 + (h << 2));
|
||||
chk:
|
||||
if (w >= 0)
|
||||
continue;
|
||||
func_80030D80((Ent30D80 *)p, 1);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,14 @@
|
||||
src/800_b_2.c:func_800336A8: score 7 (COUNT; mine 120 ins, target 121) — not yet
|
||||
replace mine[11:12] target[11:12]
|
||||
11 beqz v0,6fb0 <func_800336A8+0x1c4> | beqz v0,6fb4 <func_800336A8+0x1c8>
|
||||
replace mine[52:53] target[52:53]
|
||||
52 beqz v1,6f70 <func_800336A8+0x184> | beqz v1,6f74 <func_800336A8+0x188>
|
||||
replace mine[72:73] target[72:74]
|
||||
72 beqz v0,6f58 <func_800336A8+0x16c> | beqz v0,6f5c <func_800336A8+0x170>
|
||||
73 -- | nop
|
||||
replace mine[89:90] target[90:91]
|
||||
89 j 6f74 <func_800336A8+0x188> | j 6f78 <func_800336A8+0x18c>
|
||||
replace mine[107:108] target[108:109]
|
||||
107 j 6fb0 <func_800336A8+0x1c4> | j 6fb4 <func_800336A8+0x1c8>
|
||||
replace mine[116:117] target[117:118]
|
||||
116 bnez v0,6e0c <func_800336A8+0x20> | bnez v0,6e0c <func_800336A8+0x20>
|
||||
@@ -0,0 +1 @@
|
||||
NEEDED barrier line 6086
|
||||
@@ -0,0 +1,2 @@
|
||||
src/800_b_2.c
|
||||
func_800336A8
|
||||
@@ -0,0 +1,127 @@
|
||||
s32 func_80034314(u32 arg0, u8 *p, u32 arg2) {
|
||||
u32 flags;
|
||||
Snd54 *e;
|
||||
Rec12 *rec;
|
||||
u8 *q;
|
||||
s16 *pa;
|
||||
s32 idx;
|
||||
s32 ret;
|
||||
s32 i;
|
||||
s32 j;
|
||||
s32 b1;
|
||||
u32 x;
|
||||
u32 y;
|
||||
|
||||
y = arg0 >> 16;
|
||||
flags = arg2;
|
||||
x = arg0;
|
||||
b1 = p[1];
|
||||
if (b1 == 0) {
|
||||
rec = &D_80068A54[p[3]];
|
||||
} else {
|
||||
if (D_800A4EE8 == 0) {
|
||||
return 0;
|
||||
}
|
||||
if (D_800A4EF0 != b1) {
|
||||
return 0;
|
||||
}
|
||||
rec = *(Rec12 **)((u8 *)D_800A4EE8 + 0x18) + p[3];
|
||||
}
|
||||
|
||||
idx = func_800348A8(arg0);
|
||||
ret = idx;
|
||||
if (idx != 0) {
|
||||
idx = ret - 1;
|
||||
e = (Snd54 *)((u8 *)D_800A46E8 + idx * 0x54);
|
||||
if (flags & 0x1000) {
|
||||
e->unk1C[0].unk06 = 1;
|
||||
e->unk1C[0].unk02 = 0x100;
|
||||
e->unk1C[0].unk04 = ((s32)(flags & 0x7F) * 0x3FFF) >> 7;
|
||||
if (flags & 0x2000) {
|
||||
e->unk38 = D_8006AED8[(flags >> 8) & 0xF];
|
||||
} else {
|
||||
e->unk38 = 0;
|
||||
e->unk39 = 0;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
if (e->unk08 != 0) {
|
||||
return 0;
|
||||
}
|
||||
func_80034650(e, 0);
|
||||
} else {
|
||||
idx = func_8003310C(rec->unk04);
|
||||
ret = idx;
|
||||
if (idx == 0) {
|
||||
return 0;
|
||||
}
|
||||
idx = ret - 1;
|
||||
e = (Snd54 *)((u8 *)D_800A46E8 + idx * 0x54);
|
||||
}
|
||||
|
||||
/* dbr fence (zero-byte, non-volatile asm -> reorg stop_search_p): keeps the
|
||||
* `j .L800344B4` delay slot a nop; without it reorg eagerly steals + duplicates
|
||||
* the merge block's first store. */
|
||||
e->unk37 = rec->unk08;
|
||||
e->unk34 = b1;
|
||||
e->unk0C = rec->unk00;
|
||||
e->unk02 = rec->unk04;
|
||||
e->unk10 = e->unk0C;
|
||||
e->unk04 = x;
|
||||
e->unk06 = y;
|
||||
e->unk14 = 1;
|
||||
e->unk17 = p[2];
|
||||
e->unk16 = 0;
|
||||
e->unk18 = 0x7FFF;
|
||||
e->unk08 = rec->unk06;
|
||||
e->unk50 = 0;
|
||||
e->unk52 = 0;
|
||||
|
||||
if (rec->unk08 & 0x10) {
|
||||
e->unk48 = 1;
|
||||
} else {
|
||||
e->unk48 = 0;
|
||||
}
|
||||
|
||||
if (rec->unk08 & 4) {
|
||||
e->unk1A = 0x400;
|
||||
} else if (rec->unk08 & 8) {
|
||||
e->unk1A = 0x200;
|
||||
} else {
|
||||
e->unk1A = 0x5F;
|
||||
}
|
||||
e->unk36 = 0;
|
||||
/* sched fence: without it the two stores (memory-unit users) sink below the
|
||||
* whole loop preheader (potential_hazard beats the LUID tie-break). */
|
||||
|
||||
pa = &e->unk1C[0].unk00;
|
||||
for (i = 0; i < 3; i++, pa = (s16 *)((u8 *)pa + 8)) {
|
||||
pa[1] = 0x100;
|
||||
*((u8 *)pa + 6) = 0;
|
||||
if (i != 0) {
|
||||
pa[0] = 0x3FFF;
|
||||
pa[2] = 0x3FFF;
|
||||
} else if (flags & 0x1000) {
|
||||
pa[0] = ((flags & 0x7F) * 0x3FFF) >> 7;
|
||||
pa[2] = ((flags & 0x7F) * 0x3FFF) >> 7;
|
||||
if (flags & 0x2000) {
|
||||
u8 tv = D_8006AED8[(flags >> 8) & 0xF];
|
||||
e->unk38 = tv;
|
||||
e->unk39 = tv;
|
||||
}
|
||||
} else {
|
||||
pa[0] = 0x3FFF;
|
||||
pa[2] = 0x3FFF;
|
||||
e->unk38 = 0;
|
||||
e->unk39 = 0;
|
||||
}
|
||||
}
|
||||
|
||||
q = e->unk3A;
|
||||
for (j = 7; j >= 0; j--) {
|
||||
*q++ = 0;
|
||||
}
|
||||
|
||||
e->unk00 = 5;
|
||||
return ret;
|
||||
}
|
||||
@@ -0,0 +1,127 @@
|
||||
s32 func_80034314(u32 arg0, u8 *p, u32 arg2) {
|
||||
u32 flags;
|
||||
Snd54 *e;
|
||||
Rec12 *rec;
|
||||
u8 *q;
|
||||
s16 *pa;
|
||||
register s32 idx __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
s32 ret;
|
||||
s32 i;
|
||||
s32 j;
|
||||
s32 b1;
|
||||
u32 x;
|
||||
u32 y;
|
||||
|
||||
y = arg0 >> 16;
|
||||
flags = arg2;
|
||||
x = arg0;
|
||||
b1 = p[1];
|
||||
if (b1 == 0) {
|
||||
rec = &D_80068A54[p[3]];
|
||||
} else {
|
||||
if (D_800A4EE8 == 0) {
|
||||
return 0;
|
||||
}
|
||||
if (D_800A4EF0 != b1) {
|
||||
return 0;
|
||||
}
|
||||
rec = *(Rec12 **)((u8 *)D_800A4EE8 + 0x18) + p[3];
|
||||
}
|
||||
|
||||
idx = func_800348A8(arg0);
|
||||
ret = idx;
|
||||
if (idx != 0) {
|
||||
idx = ret - 1;
|
||||
e = (Snd54 *)((u8 *)D_800A46E8 + idx * 0x54);
|
||||
if (flags & 0x1000) {
|
||||
e->unk1C[0].unk06 = 1;
|
||||
e->unk1C[0].unk02 = 0x100;
|
||||
e->unk1C[0].unk04 = ((s32)(flags & 0x7F) * 0x3FFF) >> 7;
|
||||
if (flags & 0x2000) {
|
||||
e->unk38 = D_8006AED8[(flags >> 8) & 0xF];
|
||||
} else {
|
||||
e->unk38 = 0;
|
||||
e->unk39 = 0;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
if (e->unk08 != 0) {
|
||||
return 0;
|
||||
}
|
||||
func_80034650(e, 0);
|
||||
} else {
|
||||
idx = func_8003310C(rec->unk04);
|
||||
ret = idx;
|
||||
if (idx == 0) {
|
||||
return 0;
|
||||
}
|
||||
idx = ret - 1;
|
||||
e = (Snd54 *)((u8 *)D_800A46E8 + idx * 0x54);
|
||||
}
|
||||
|
||||
/* dbr fence (zero-byte, non-volatile asm -> reorg stop_search_p): keeps the
|
||||
* `j .L800344B4` delay slot a nop; without it reorg eagerly steals + duplicates
|
||||
* the merge block's first store. */
|
||||
e->unk37 = rec->unk08;
|
||||
e->unk34 = b1;
|
||||
e->unk0C = rec->unk00;
|
||||
e->unk02 = rec->unk04;
|
||||
e->unk10 = e->unk0C;
|
||||
e->unk04 = x;
|
||||
e->unk06 = y;
|
||||
e->unk14 = 1;
|
||||
e->unk17 = p[2];
|
||||
e->unk16 = 0;
|
||||
e->unk18 = 0x7FFF;
|
||||
e->unk08 = rec->unk06;
|
||||
e->unk50 = 0;
|
||||
e->unk52 = 0;
|
||||
|
||||
if (rec->unk08 & 0x10) {
|
||||
e->unk48 = 1;
|
||||
} else {
|
||||
e->unk48 = 0;
|
||||
}
|
||||
|
||||
if (rec->unk08 & 4) {
|
||||
e->unk1A = 0x400;
|
||||
} else if (rec->unk08 & 8) {
|
||||
e->unk1A = 0x200;
|
||||
} else {
|
||||
e->unk1A = 0x5F;
|
||||
}
|
||||
e->unk36 = 0;
|
||||
/* sched fence: without it the two stores (memory-unit users) sink below the
|
||||
* whole loop preheader (potential_hazard beats the LUID tie-break). */
|
||||
|
||||
pa = &e->unk1C[0].unk00;
|
||||
for (i = 0; i < 3; i++, pa = (s16 *)((u8 *)pa + 8)) {
|
||||
pa[1] = 0x100;
|
||||
*((u8 *)pa + 6) = 0;
|
||||
if (i != 0) {
|
||||
pa[0] = 0x3FFF;
|
||||
pa[2] = 0x3FFF;
|
||||
} else if (flags & 0x1000) {
|
||||
pa[0] = ((flags & 0x7F) * 0x3FFF) >> 7;
|
||||
pa[2] = ((flags & 0x7F) * 0x3FFF) >> 7;
|
||||
if (flags & 0x2000) {
|
||||
u8 tv = D_8006AED8[(flags >> 8) & 0xF];
|
||||
e->unk38 = tv;
|
||||
e->unk39 = tv;
|
||||
}
|
||||
} else {
|
||||
pa[0] = 0x3FFF;
|
||||
pa[2] = 0x3FFF;
|
||||
e->unk38 = 0;
|
||||
e->unk39 = 0;
|
||||
}
|
||||
}
|
||||
|
||||
q = e->unk3A;
|
||||
for (j = 7; j >= 0; j--) {
|
||||
*q++ = 0;
|
||||
}
|
||||
|
||||
e->unk00 = 5;
|
||||
return ret;
|
||||
}
|
||||
@@ -0,0 +1,14 @@
|
||||
g6b: verdict NO-MATCH start 27 best 23 compiles 325 path R12 width i s32->u16 @6817 + R7 do-while @6836
|
||||
best-scoring single candidates of the last trace (move -> score [residual class]):
|
||||
R7 do-while @6836 -> 23 [COUNT] (from 27)
|
||||
R7 block @6921 -> 23 [COUNT] (from 23)
|
||||
R4 decl-move idx 5->0 -> 23 [COUNT] (from 23)
|
||||
R7 do-while @6921 -> 23 [COUNT] (from 23)
|
||||
R4 decl-move idx 5->1 -> 23 [COUNT] (from 23)
|
||||
R12 width i u16->u8 @6817 -> 23 [COUNT] (from 23)
|
||||
R10 param-copy arg2 @6822 -> 23 [COUNT] (from 23)
|
||||
R4 decl-move idx 5->2 -> 23 [COUNT] (from 23)
|
||||
R7 block @6866 -> 23 [COUNT] (from 23)
|
||||
R4 decl-move idx 5->3 -> 23 [COUNT] (from 23)
|
||||
R4 decl-move idx 5->4 -> 23 [COUNT] (from 23)
|
||||
R8 cse tmp0 @6913 -> 23 [COUNT] (from 23)
|
||||
@@ -0,0 +1 @@
|
||||
|
||||
@@ -0,0 +1,555 @@
|
||||
=== lever-free bodies in main sharing a callee or global with func_80034314 (21 found; top 6 by shared symbols) — read them for the SHAPE ===
|
||||
--- func_80032048 (src/800_b_2.c:4446) shares 4: D_800A46E8 D_800A4EE8 D_800A4EF0 func_8003310C ---
|
||||
s32 func_80032048(u32 arg0, u8 *p, u32 flags) {
|
||||
Rec14 *rec;
|
||||
Slot54 *e;
|
||||
s32 idx;
|
||||
s32 ret;
|
||||
u32 x;
|
||||
u32 y;
|
||||
u32 v;
|
||||
u8 old;
|
||||
u8 b1;
|
||||
u8 b2;
|
||||
u32 b3;
|
||||
u32 b0;
|
||||
|
||||
y = arg0 >> 16;
|
||||
b1 = p[1];
|
||||
b2 = p[2];
|
||||
b3 = p[3];
|
||||
|
||||
if (b1 == 0) {
|
||||
rec = &D_80068304[b2][b3];
|
||||
} else {
|
||||
if (D_800A4EF0 != b1) {
|
||||
return 0;
|
||||
}
|
||||
if (D_800A4EE8 == 0) {
|
||||
return 0;
|
||||
}
|
||||
rec = D_800A4EE8->unk14[b2];
|
||||
rec += b3;
|
||||
}
|
||||
|
||||
old = *(u8 *)&D_800A4F17;
|
||||
*(u8 *)&D_800A4F17 = 1;
|
||||
|
||||
ret = 0;
|
||||
v = rec->unk00;
|
||||
if ((u16)flags == 0xFFFF) {
|
||||
flags = 0;
|
||||
x = (u16)y;
|
||||
y = 0;
|
||||
} else {
|
||||
x = arg0;
|
||||
}
|
||||
|
||||
idx = func_800331D4(x);
|
||||
if (idx == 0) {
|
||||
if (flags & 0x4000) {
|
||||
if ((flags & 0x3000) == 0) {
|
||||
goto done;
|
||||
}
|
||||
} else if (flags & 0x1000) {
|
||||
if ((flags & 0x7F) < 0x30) {
|
||||
v >>= 1;
|
||||
}
|
||||
}
|
||||
idx = func_8003310C(v);
|
||||
if (idx == 0) {
|
||||
goto done;
|
||||
}
|
||||
ret = idx;
|
||||
idx = ret - 1;
|
||||
e = (Slot54 *)((u8 *)D_800A46E8 + idx * 0x54);
|
||||
} else {
|
||||
if (flags & 0x4000) {
|
||||
func_800335B8(idx - 1, (u16)flags);
|
||||
goto done;
|
||||
}
|
||||
idx--;
|
||||
e = (Slot54 *)((u8 *)D_800A46E8 + idx * 0x54);
|
||||
if (e->unk08 != 0) {
|
||||
goto done;
|
||||
}
|
||||
ret = idx + 1;
|
||||
func_8003324C((u16)idx);
|
||||
}
|
||||
|
||||
b0 = p[0];
|
||||
e->unk04 = x;
|
||||
e->unk06 = y;
|
||||
e->unk02 = v;
|
||||
e->unk00 = (b0 & 0xC0) | 1;
|
||||
e->unk08 = rec->unk0C;
|
||||
e->unk0A = 5;
|
||||
func_80032A74(e, idx, rec, (u16)flags);
|
||||
|
||||
done:
|
||||
*(u8 *)&D_800A4F17 = old;
|
||||
return ret;
|
||||
}
|
||||
|
||||
--- func_800324A4 (src/800_b_2.c:4757) shares 4: D_800A46E8 D_800A4EE8 D_800A4EF0 func_8003310C ---
|
||||
s32 func_800324A4(u32 arg0, u8 *p, u32 flags, s32 arg3) {
|
||||
Rec14 *rec;
|
||||
Slot54 *e;
|
||||
u8 *q;
|
||||
s32 i;
|
||||
s32 idx;
|
||||
s32 ret;
|
||||
s32 count;
|
||||
s32 minp;
|
||||
s32 maxp;
|
||||
s32 pr;
|
||||
u16 x;
|
||||
/* t: keeps the raw incoming arg0 in $a0 so the "srl $t4, $a0, 16" that
|
||||
* feeds the y spill reads $a0 and not $fp. Without it cse collapses
|
||||
* x into the parameter pseudo, the shift reads the callee-saved home and
|
||||
* the $s7/$fp pair flips (v <-> arg0) -- 9 diffs. Emits no instruction. */
|
||||
u32 t;
|
||||
u16 y;
|
||||
s32 v;
|
||||
u8 old;
|
||||
u8 b0;
|
||||
u8 b1;
|
||||
u8 b2;
|
||||
/* b3 is u32, NOT u8: the width is what wins it $a0 ahead of b1. See the
|
||||
* header note (lever 3) -- with u8 it loses the allocno density race and
|
||||
* the b1/b3 pair comes out swapped. */
|
||||
u32 b3;
|
||||
|
||||
t = arg0;
|
||||
x = arg0;
|
||||
b2 = p[2];
|
||||
b1 = p[1];
|
||||
b3 = p[3];
|
||||
/* maxp = 0 must precede the shift: it gates when "sw $s4" becomes ready
|
||||
* in sched2 (lever 2). */
|
||||
maxp = 0;
|
||||
y = t >> 16;
|
||||
|
||||
if (b1 == 0) {
|
||||
rec = &D_80068304[b2][b3];
|
||||
} else {
|
||||
if (D_800A4EF0 != b1) {
|
||||
return 0;
|
||||
}
|
||||
if (D_800A4EE8 == 0) {
|
||||
return 0;
|
||||
}
|
||||
rec = D_800A4EE8->unk14[b2];
|
||||
rec += b3;
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
idx = 0;
|
||||
count = 0;
|
||||
|
||||
old = LOCKBYTE;
|
||||
LOCKBYTE = 1;
|
||||
|
||||
v = rec->unk00;
|
||||
|
||||
q = SLOTBASE;
|
||||
minp = 0x80;
|
||||
for (i = 0; i < 8; i++, q += 0x54) {
|
||||
if ((*(u16 *)q & 0x3F) == 1 && *(u16 *)(q + 4) == (u16)x) {
|
||||
pr = q[0xB] & 0x7F;
|
||||
if (pr < minp) {
|
||||
idx = i + 1;
|
||||
minp = pr;
|
||||
}
|
||||
if (pr >= maxp) {
|
||||
maxp = pr;
|
||||
}
|
||||
count++;
|
||||
}
|
||||
}
|
||||
|
||||
if (count <= arg3) {
|
||||
idx = 0;
|
||||
} else if ((s32)(flags & 0x7F) < minp) {
|
||||
goto done;
|
||||
}
|
||||
|
||||
if (idx == 0) {
|
||||
if (flags & 0x4000) {
|
||||
if ((flags & 0x3000) == 0) {
|
||||
goto done;
|
||||
}
|
||||
}
|
||||
idx = func_8003310C(v);
|
||||
if (idx == 0) {
|
||||
goto done;
|
||||
}
|
||||
ret = idx;
|
||||
idx = ret - 1;
|
||||
e = (Slot54 *)((u8 *)D_800A46E8 + idx * 0x54);
|
||||
} else {
|
||||
idx--;
|
||||
e = (Slot54 *)((u8 *)D_800A46E8 + idx * 0x54);
|
||||
if (e->unk08 != 0) {
|
||||
goto done;
|
||||
}
|
||||
ret = idx + 1;
|
||||
func_8003324C((u16)idx);
|
||||
}
|
||||
|
||||
if (flags & 0x1000) {
|
||||
((u8 *)e)[0xB] = flags & 0x7F;
|
||||
if ((s32)(flags & 0x7F) < maxp) {
|
||||
flags |= 0x8000;
|
||||
}
|
||||
}
|
||||
|
||||
b0 = p[0];
|
||||
e->unk04 = x;
|
||||
e->unk06 = y;
|
||||
e->unk02 = v;
|
||||
e->unk00 = (b0 & 0xC0) | 1;
|
||||
e->unk08 = rec->unk0C;
|
||||
e->unk0A = 5;
|
||||
func_80032A74(e, idx, rec, (u16)flags);
|
||||
|
||||
done:
|
||||
LOCKBYTE = old;
|
||||
return ret;
|
||||
}
|
||||
|
||||
--- func_800322A8 (src/800_b_2.c:4590) shares 3: D_800A4EE8 D_800A4EF0 func_8003310C ---
|
||||
s32 func_800322A8(u32 arg0, u8 *p, u32 arg2) {
|
||||
Rec14 *rec;
|
||||
Slot54 *e;
|
||||
s32 idx;
|
||||
s32 ret;
|
||||
u16 y;
|
||||
u32 x;
|
||||
u32 flags;
|
||||
u32 v;
|
||||
u8 old;
|
||||
u8 b1;
|
||||
u8 b2;
|
||||
u32 b3;
|
||||
u32 b0;
|
||||
|
||||
y = arg0 >> 16;
|
||||
flags = arg2;
|
||||
x = arg0;
|
||||
b1 = p[1];
|
||||
b2 = p[2];
|
||||
b3 = p[3];
|
||||
|
||||
if (b1 == 0) {
|
||||
rec = &D_80068304[b2][b3];
|
||||
} else {
|
||||
if (D_800A4EF0 != b1) {
|
||||
return 0;
|
||||
}
|
||||
if (D_800A4EE8 == 0) {
|
||||
return 0;
|
||||
}
|
||||
rec = D_800A4EE8->unk14[b2];
|
||||
rec += b3;
|
||||
}
|
||||
|
||||
old = *(u8 *)&D_800A4F17;
|
||||
*(u8 *)&D_800A4F17 = 1;
|
||||
|
||||
ret = 0;
|
||||
v = rec->unk00;
|
||||
|
||||
idx = func_800331D4((u16)arg0);
|
||||
if (idx == 0) {
|
||||
if (flags & 0x4000) {
|
||||
if ((flags & 0x3000) == 0) {
|
||||
goto done;
|
||||
}
|
||||
}
|
||||
idx = func_8003310C(v);
|
||||
if (idx == 0) {
|
||||
goto done;
|
||||
}
|
||||
ret = idx;
|
||||
idx = ret - 1;
|
||||
e = (Slot54 *)(SLOT_BASE + idx * 0x54);
|
||||
} else {
|
||||
idx--;
|
||||
e = (Slot54 *)(SLOT_BASE + idx * 0x54);
|
||||
if (e->unk08 != 0) {
|
||||
goto done;
|
||||
}
|
||||
ret = idx + 1;
|
||||
func_8003324C((u16)idx);
|
||||
}
|
||||
|
||||
b0 = p[0];
|
||||
e->unk04 = x;
|
||||
e->unk06 = y;
|
||||
e->unk02 = v;
|
||||
e->unk00 = (b0 & 0xC0) | 1;
|
||||
e->unk08 = rec->unk0C;
|
||||
e->unk0A = 5;
|
||||
func_80032A74(e, idx, rec, (u16)flags);
|
||||
|
||||
done:
|
||||
*(u8 *)&D_800A4F17 = old;
|
||||
return ret;
|
||||
}
|
||||
|
||||
--- func_8002C8F4 (src/800_b_2.c:205) shares 3: D_800A46E8 D_800A4EE8 D_800A4EF0 ---
|
||||
void func_8002C8F4(void)
|
||||
{
|
||||
s32 sp10[2];
|
||||
s32 *p;
|
||||
u8 *q;
|
||||
s32 i;
|
||||
s32 j;
|
||||
s32 k;
|
||||
s32 n;
|
||||
s32 m;
|
||||
|
||||
func_8003A424();
|
||||
func_8003D518();
|
||||
|
||||
p = &D_800A4EA4;
|
||||
*p = 0x23CF;
|
||||
D_800A4EA8 = 0x3FFF;
|
||||
D_800A4EAA = 0x3FFF;
|
||||
D_800A4EB4 = 0x3FFF;
|
||||
D_800A4EB6 = 0x3FFF;
|
||||
D_800A4EAC = 0;
|
||||
D_800A4EAE = 0;
|
||||
D_800A4EB8 = 0;
|
||||
D_800A4EBC = 1;
|
||||
D_800A4EC8 = 0;
|
||||
|
||||
func_8003C598(p);
|
||||
func_8003BE24(1);
|
||||
func_8002D1F0(4);
|
||||
func_8003B280(1);
|
||||
func_80037D98();
|
||||
|
||||
D_800A4E68 = 0x3C;
|
||||
D_800A4E6C = 0x2F;
|
||||
D_800A4E6E = 0x2F;
|
||||
D_800A4E70 = 1;
|
||||
D_800A4F18 = 1;
|
||||
D_800A4F19 = 1;
|
||||
D_800A4EF6 = 1;
|
||||
(&D_800A4638)[1] = 0x1010;
|
||||
D_800A4638 = 0;
|
||||
D_800A4E7A = 0;
|
||||
D_800A46E4 = 0;
|
||||
D_800A4654 = 0x10000;
|
||||
D_800A466C = 0x14000;
|
||||
D_800A4684 = 0x18000;
|
||||
D_800A469C = 0x39F00;
|
||||
|
||||
for (j = 0x54; j >= 0; j -= 0xC) {
|
||||
*(s32 *)((u8 *)&D_800A64B0 + j) = 0;
|
||||
}
|
||||
|
||||
for (i = 0; i < 5; i++) {
|
||||
k = i * 0x18;
|
||||
D_800A4650[k] = 1;
|
||||
*(s16 *)((u8 *)D_800A4644 + k) = 0;
|
||||
*(s16 *)((u8 *)D_800A4642 + k) = -1;
|
||||
}
|
||||
|
||||
for (n = 0x24C; n >= 0; n -= 0x54) {
|
||||
*(u16 *)((u8 *)D_800A46E8 + n) = 0;
|
||||
}
|
||||
|
||||
m = 0x10;
|
||||
for (i = 0, q = D_800A4988 + 0x4F; i < 8; i++, m++, q += 0x54) {
|
||||
k = i * 0x48;
|
||||
q[2] = i;
|
||||
*(s16 *)(q - 0x45) = m;
|
||||
q[-1] = 0;
|
||||
*(s32 *)(q - 0x4B) = 0;
|
||||
*(s32 *)(q - 0xF) = 0;
|
||||
q[1] = 0;
|
||||
*(s32 *)((u8 *)D_800A4C68 + k) = m;
|
||||
D_800A4C6C[k] = 0;
|
||||
D_800A4C6D[k] = 0;
|
||||
}
|
||||
|
||||
func_8002CC4C();
|
||||
|
||||
D_800A4EFA = 0x7F;
|
||||
D_800A4EF8 = 0x7F;
|
||||
D_800A4F1B = 1;
|
||||
D_800A46BA = 0;
|
||||
D_800A2B98 = 0;
|
||||
D_800C7D20 = 0;
|
||||
D_800C7D2C = 0;
|
||||
D_800A2BA0 = 0;
|
||||
D_800A4F17 = 0;
|
||||
D_800A4E8E = 0;
|
||||
D_800A4EA2 = 0;
|
||||
D_800A4EF0 = 0;
|
||||
D_800A4EE8 = 0;
|
||||
D_800A4EFC = 0;
|
||||
D_800A4F20 = 0;
|
||||
D_800A4F22 = 0;
|
||||
D_800A4F1D = 0;
|
||||
D_800A4EEC = 0;
|
||||
D_800A4EE6 = 0;
|
||||
D_800A4EE0 = 0x4000;
|
||||
D_800A4EE4 = 0x4000;
|
||||
D_800A4F24 = 0;
|
||||
D_800A4F16 = 0;
|
||||
|
||||
func_8002FAE0();
|
||||
func_80037CC8();
|
||||
func_8003BE74(0, 0xFFFFFF);
|
||||
|
||||
sp10[0] = 1;
|
||||
sp10[1] = 0;
|
||||
func_8003B1EC(sp10);
|
||||
|
||||
D_800A4F1C = 0;
|
||||
D_800A4F1E = 0;
|
||||
func_80034C24();
|
||||
func_80037004();
|
||||
}
|
||||
|
||||
--- func_80032774 (src/800_b_2.c:4928) shares 3: D_800A4EE8 D_800A4EF0 func_8003310C ---
|
||||
s32 func_80032774(u32 arg0, u8 *p, u32 flags)
|
||||
{
|
||||
Rec14 *rec;
|
||||
Slot54View *e;
|
||||
Slot54View *q;
|
||||
s32 ret;
|
||||
s32 best;
|
||||
s32 cnt;
|
||||
s32 i;
|
||||
s32 mn;
|
||||
s32 mx;
|
||||
s32 t;
|
||||
s32 yy;
|
||||
s32 f4000;
|
||||
u32 x;
|
||||
u16 y;
|
||||
u16 v;
|
||||
u8 old;
|
||||
u8 b0;
|
||||
u8 b1;
|
||||
u8 b2;
|
||||
s32 b3;
|
||||
|
||||
b2 = p[2];
|
||||
b1 = p[1];
|
||||
b3 = p[3];
|
||||
mx = 0;
|
||||
y = arg0 >> 16;
|
||||
x = arg0;
|
||||
|
||||
if (b1 == 0) {
|
||||
rec = &D_80068304[b2][b3];
|
||||
} else {
|
||||
if (D_800A4EF0 != b1) {
|
||||
return 0;
|
||||
}
|
||||
if (D_800A4EE8 == 0) {
|
||||
return 0;
|
||||
}
|
||||
rec = D_800A4EE8->unk14[b2];
|
||||
rec += b3;
|
||||
}
|
||||
|
||||
yy = y;
|
||||
ret = 0;
|
||||
best = 0;
|
||||
cnt = 0;
|
||||
old = *PFLAG;
|
||||
*PFLAG = 1;
|
||||
q = SLOTS;
|
||||
mn = 0x80;
|
||||
v = rec->unk00;
|
||||
for (i = 0, f4000 = flags & 0x4000; i < 8; i++, q++) {
|
||||
if ((q->unk00 & 0x3F) == 1 && q->unk04 == (u16)x) {
|
||||
if (yy == 0 || q->unk06 == yy) {
|
||||
if (f4000) {
|
||||
func_800335B8(i, (u16)flags);
|
||||
}
|
||||
goto done;
|
||||
}
|
||||
t = q->unk0B & 0x7F;
|
||||
if (t < mn) {
|
||||
best = i + 1;
|
||||
mn = t;
|
||||
}
|
||||
if (mx <= t) {
|
||||
mx = t;
|
||||
}
|
||||
cnt++;
|
||||
}
|
||||
}
|
||||
|
||||
if (cnt < 2) {
|
||||
best = 0;
|
||||
} else if ((s32)(flags & 0x7F) < mn) {
|
||||
goto done;
|
||||
}
|
||||
|
||||
if (best == 0) {
|
||||
if (flags & 0x4000) {
|
||||
if ((flags & 0x3000) == 0) {
|
||||
goto done;
|
||||
}
|
||||
}
|
||||
best = func_8003310C(v);
|
||||
if (best == 0) {
|
||||
goto done;
|
||||
}
|
||||
ret = best;
|
||||
best = ret - 1;
|
||||
e = &SLOTS[best];
|
||||
} else {
|
||||
ret = best;
|
||||
best = ret - 1;
|
||||
e = &SLOTS[best];
|
||||
if (e->unk08 != 0) {
|
||||
goto done;
|
||||
}
|
||||
func_8003324C((u16)best);
|
||||
}
|
||||
|
||||
if (flags & 0x1000) {
|
||||
e->unk0B = flags & 0x7F;
|
||||
if ((s32)(flags & 0x7F) < mx) {
|
||||
flags |= 0x8000;
|
||||
}
|
||||
}
|
||||
|
||||
b0 = p[0];
|
||||
e->unk04 = x;
|
||||
e->unk06 = y;
|
||||
e->unk02 = v;
|
||||
e->unk00 = (b0 & 0xC0) | 1;
|
||||
e->unk08 = rec->unk0C;
|
||||
e->unk0A = 5;
|
||||
func_80032A74((Slot54 *)e, best, rec, (u16)flags);
|
||||
|
||||
done:
|
||||
*PFLAG = old;
|
||||
return ret;
|
||||
}
|
||||
|
||||
--- func_8002F5C8 (src/800_b_2.c:2429) shares 2: D_800A4EE8 D_800A4EF0 ---
|
||||
void func_8002F5C8(u8 *a0) {
|
||||
extern Owner4EE8 *D_800A4EE8;
|
||||
s16 *p = &D_800A4EF0;
|
||||
u16 temp;
|
||||
|
||||
if (*p != 0) {
|
||||
func_8002F620();
|
||||
}
|
||||
temp = *(u16 *)a0;
|
||||
D_800A4EE8 = a0;
|
||||
*p = temp;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,49 @@
|
||||
src/800_b_2.c:func_80034314: score 27 (COUNT; mine 205 ins, target 207) — not yet
|
||||
register pairs (mine -> target, count): s5->s3 x5, s3->v1 x2, s3->s5 x1
|
||||
replace mine[1:3] target[1:3]
|
||||
1 sw s5,36(sp) | sw s3,28(sp)
|
||||
2 move s5,a1 | move s3,a1
|
||||
insert mine[9:9] target[9:10]
|
||||
9 -- | sw s5,36(sp)
|
||||
delete mine[10:11] target[11:11]
|
||||
10 sw s3,28(sp) | --
|
||||
replace mine[13:14] target[13:14]
|
||||
13 lbu s4,1(s5) | lbu s4,1(s3)
|
||||
replace mine[17:18] target[17:18]
|
||||
17 lbu v0,3(s5) | lbu v0,3(s3)
|
||||
replace mine[28:29] target[28:29]
|
||||
28 beqz a1,7d5c <func_80034314+0x304> | beqz a1,7d64 <func_80034314+0x30c>
|
||||
replace mine[33:34] target[33:34]
|
||||
33 bne v0,s4,7d5c <func_80034314+0x304> | bne v0,s4,7d64 <func_80034314+0x30c>
|
||||
replace mine[35:36] target[35:36]
|
||||
35 lbu v0,3(s5) | lbu v0,3(s3)
|
||||
replace mine[43:46] target[43:47]
|
||||
43 move s3,v0 | move v1,v0
|
||||
44 beqz s3,7bb0 <func_80034314+0x158> | beqz v1,7bb4 <func_80034314+0x15c>
|
||||
45 addiu v1,s3,-1 | move s5,v1
|
||||
46 -- | addiu v1,s5,-1
|
||||
replace mine[72:73] target[73:74]
|
||||
72 j 7d58 <func_80034314+0x300> | j 7d60 <func_80034314+0x308>
|
||||
replace mine[75:76] target[76:77]
|
||||
75 j 7d58 <func_80034314+0x300> | j 7d60 <func_80034314+0x308>
|
||||
replace mine[79:80] target[80:81]
|
||||
79 bnez v0,7d5c <func_80034314+0x304> | bnez v0,7d64 <func_80034314+0x30c>
|
||||
replace mine[84:85] target[85:86]
|
||||
84 j 7bf0 <func_80034314+0x198> | j 7bf8 <func_80034314+0x1a0>
|
||||
replace mine[89:93] target[90:94]
|
||||
89 move s3,v0 | move v1,v0
|
||||
90 bnez s3,7bd0 <func_80034314+0x178> | bnez v1,7bd4 <func_80034314+0x17c>
|
||||
91 addiu v1,s3,-1 | move s5,v1
|
||||
92 j 7d5c <func_80034314+0x304> | j 7d64 <func_80034314+0x30c>
|
||||
insert mine[94:94] target[95:96]
|
||||
94 -- | addiu v1,s5,-1
|
||||
replace mine[116:117] target[118:119]
|
||||
116 lbu v1,2(s5) | lbu v1,2(s3)
|
||||
replace mine[130:131] target[132:133]
|
||||
130 j 7c6c <func_80034314+0x214> | j 7c74 <func_80034314+0x21c>
|
||||
replace mine[161:162] target[163:164]
|
||||
161 j 7d24 <func_80034314+0x2cc> | j 7d2c <func_80034314+0x2d4>
|
||||
replace mine[173:174] target[175:176]
|
||||
173 j 7d24 <func_80034314+0x2cc> | j 7d2c <func_80034314+0x2d4>
|
||||
replace mine[192:193] target[194:195]
|
||||
192 move v0,s3 | move v0,s5
|
||||
@@ -0,0 +1,3 @@
|
||||
NEEDED pin $3 line 6818
|
||||
REMOVED launder line 6876
|
||||
REMOVED launder line 6908
|
||||
@@ -0,0 +1,2 @@
|
||||
src/800_b_2.c
|
||||
func_80034314
|
||||
@@ -15,7 +15,7 @@
|
||||
"gte_nccs": 25,
|
||||
"gte_nclip": 108,
|
||||
"gte_rtir": 75,
|
||||
"gte_rtps": 438,
|
||||
"gte_rtps": 439,
|
||||
"gte_rtpt": 352,
|
||||
"gte_rtv0tr": 228,
|
||||
"gte_stclmv": 108,
|
||||
@@ -55,15 +55,15 @@
|
||||
"asm-body/direct": 13,
|
||||
"barrier/direct": 327,
|
||||
"barrier/via-macro": 2,
|
||||
"gte-lever/direct": 360,
|
||||
"gte-lever/direct": 357,
|
||||
"gte-lever/via-macro": 94,
|
||||
"gte-unsigned/direct": 270,
|
||||
"gte/direct": 199,
|
||||
"gte/via-macro": 6135,
|
||||
"gte/via-macro": 6138,
|
||||
"instruction/direct": 210,
|
||||
"instruction/via-macro": 22,
|
||||
"keepalive/direct": 341,
|
||||
"launder/direct": 660,
|
||||
"launder/direct": 658,
|
||||
"launder/via-macro": 42,
|
||||
"verbatim-body/direct": 2682
|
||||
}
|
||||
@@ -72,16 +72,7 @@
|
||||
"cfake_markers": {
|
||||
"count": 41,
|
||||
"sample": [
|
||||
"src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c:3125",
|
||||
"src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c:5384",
|
||||
"src/ov_SC06_020/ov_SC06_020_jr_80180B04.c:3714",
|
||||
"src/ov_SC06_022/ov_SC06_022_jr_80184A28.c:3757",
|
||||
"src/ov_SC06_024/ov_SC06_024_jr_80186F00.c:3771",
|
||||
"src/ov_SC06_024/ov_SC06_024_jr_80186F00.c:5414",
|
||||
"src/ov_SC06_032/ov_SC06_032_jr_80182890.c:2961",
|
||||
"src/ov_SC06_032/ov_SC06_032_jr_80182890.c:5277",
|
||||
"src/ov_SC06_033/ov_SC06_033_jr_80186574.c:3049",
|
||||
"src/800.c:12748",
|
||||
"src/800.c:12732",
|
||||
"src/md_SC07_003/md_SC07_003.c:3577",
|
||||
"src/md_SC07_004/md_SC07_004.c:280",
|
||||
"src/ov_SC01_000/ov_SC01_000_jr_8017BEBC.c:3570",
|
||||
@@ -111,43 +102,52 @@
|
||||
"src/ov_SC05_018/ov_SC05_018_jr_8017D604.c:4942",
|
||||
"src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:8485",
|
||||
"src/ov_SC06_016/ov_SC06_016_jr_801816DC.c:3082",
|
||||
"src/ov_SC06_029/ov_SC06_029_jr_8017C954.c:6669"
|
||||
"src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c:3125",
|
||||
"src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c:5384",
|
||||
"src/ov_SC06_020/ov_SC06_020_jr_80180B04.c:3714",
|
||||
"src/ov_SC06_022/ov_SC06_022_jr_80184A28.c:3757",
|
||||
"src/ov_SC06_024/ov_SC06_024_jr_80186F00.c:3771",
|
||||
"src/ov_SC06_024/ov_SC06_024_jr_80186F00.c:5414",
|
||||
"src/ov_SC06_029/ov_SC06_029_jr_8017C954.c:6669",
|
||||
"src/ov_SC06_032/ov_SC06_032_jr_80182890.c:2961",
|
||||
"src/ov_SC06_032/ov_SC06_032_jr_80182890.c:5277",
|
||||
"src/ov_SC06_033/ov_SC06_033_jr_80186574.c:3049"
|
||||
]
|
||||
},
|
||||
"classes": {
|
||||
"A": {
|
||||
"bodies": 1483,
|
||||
"distinct_bodies": 647,
|
||||
"bodies": 1478,
|
||||
"distinct_bodies": 642,
|
||||
"file_scope": 0,
|
||||
"in_bodies": 2378,
|
||||
"in_bodies": 2370,
|
||||
"kinds": {
|
||||
"pin": 2378
|
||||
"pin": 2370
|
||||
},
|
||||
"marked": 2378,
|
||||
"sites": 2378,
|
||||
"tus": 1084,
|
||||
"marked": 2370,
|
||||
"sites": 2370,
|
||||
"tus": 1083,
|
||||
"unmarked": 0
|
||||
},
|
||||
"B": {
|
||||
"bodies": 4713,
|
||||
"distinct_bodies": 772,
|
||||
"bodies": 4711,
|
||||
"distinct_bodies": 770,
|
||||
"file_scope": 13,
|
||||
"in_bodies": 11344,
|
||||
"in_bodies": 11342,
|
||||
"kinds": {
|
||||
"asm-body": 13,
|
||||
"barrier": 329,
|
||||
"gte": 6334,
|
||||
"gte-lever": 454,
|
||||
"gte": 6337,
|
||||
"gte-lever": 451,
|
||||
"gte-unsigned": 270,
|
||||
"instruction": 232,
|
||||
"keepalive": 341,
|
||||
"launder": 702,
|
||||
"launder": 700,
|
||||
"verbatim-body": 2682
|
||||
},
|
||||
"marked": 2561,
|
||||
"sites": 11357,
|
||||
"marked": 2555,
|
||||
"sites": 11355,
|
||||
"tus": 1428,
|
||||
"unmarked": 8796
|
||||
"unmarked": 8800
|
||||
},
|
||||
"C": {
|
||||
"bodies": 495,
|
||||
@@ -251,9 +251,9 @@
|
||||
"coverage": {
|
||||
"asm": {
|
||||
"comment_dead": 6782,
|
||||
"live": 15390,
|
||||
"live": 15377,
|
||||
"macro_block": 194,
|
||||
"raw": 22366
|
||||
"raw": 22353
|
||||
},
|
||||
"attribute": {
|
||||
"comment_dead": 0,
|
||||
@@ -269,38 +269,38 @@
|
||||
},
|
||||
"register": {
|
||||
"comment_dead": 8576,
|
||||
"live": 2428,
|
||||
"live": 2420,
|
||||
"macro_block": 18,
|
||||
"raw": 11022
|
||||
"raw": 11014
|
||||
},
|
||||
"volatile": {
|
||||
"comment_dead": 2606,
|
||||
"live": 1693,
|
||||
"live": 1690,
|
||||
"macro_block": 82,
|
||||
"raw": 4381
|
||||
"raw": 4378
|
||||
}
|
||||
},
|
||||
"coverage_ok": true,
|
||||
"elapsed_s": 23.6,
|
||||
"elapsed_s": 25.4,
|
||||
"generated": "2026-09-11",
|
||||
"gte_levers": {
|
||||
"direct": 360,
|
||||
"marked": 454,
|
||||
"sites": 454,
|
||||
"direct": 357,
|
||||
"marked": 451,
|
||||
"sites": 451,
|
||||
"unmarked": 0,
|
||||
"unsigned": 270,
|
||||
"via_macro": 94,
|
||||
"what": "GTE ops whose clobbers exceed the canonical macro's (a scheduling steer): class-B levers INSIDE the headline number since T5 (2026-09-09), marked, 0 at the close"
|
||||
},
|
||||
"head": "27a23a12b",
|
||||
"head": "08541f3c1",
|
||||
"headers": 3181,
|
||||
"levers_AB": {
|
||||
"asm": 2071,
|
||||
"bodies": 2193,
|
||||
"distinct_bodies": 879,
|
||||
"marked": 4449,
|
||||
"pins": 2378,
|
||||
"sites": 4449,
|
||||
"asm": 2066,
|
||||
"bodies": 2187,
|
||||
"distinct_bodies": 873,
|
||||
"marked": 4436,
|
||||
"pins": 2370,
|
||||
"sites": 4436,
|
||||
"unmarked": 0,
|
||||
"what": "register pins + asm statements excluding GTE ops: the classes the phase drives to 0"
|
||||
},
|
||||
@@ -339,16 +339,16 @@
|
||||
5,
|
||||
1
|
||||
],
|
||||
[
|
||||
"DRAW",
|
||||
3,
|
||||
1
|
||||
],
|
||||
[
|
||||
"gte_SetRotMatrix_m",
|
||||
3,
|
||||
2
|
||||
],
|
||||
[
|
||||
"DRAW",
|
||||
3,
|
||||
1
|
||||
],
|
||||
[
|
||||
"gte_rtv0tr_m",
|
||||
2,
|
||||
@@ -436,7 +436,7 @@
|
||||
"bare_name": 15,
|
||||
"init": 221,
|
||||
"registers": {
|
||||
"$0": 65,
|
||||
"$0": 64,
|
||||
"$10": 10,
|
||||
"$11": 5,
|
||||
"$12": 9,
|
||||
@@ -447,19 +447,19 @@
|
||||
"$17": 40,
|
||||
"$18": 32,
|
||||
"$19": 22,
|
||||
"$2": 818,
|
||||
"$2": 815,
|
||||
"$20": 7,
|
||||
"$21": 6,
|
||||
"$22": 3,
|
||||
"$23": 6,
|
||||
"$25": 1,
|
||||
"$29": 13,
|
||||
"$3": 190,
|
||||
"$3": 188,
|
||||
"$4": 504,
|
||||
"$5": 387,
|
||||
"$5": 386,
|
||||
"$6": 62,
|
||||
"$7": 26,
|
||||
"$8": 25,
|
||||
"$8": 24,
|
||||
"$9": 22,
|
||||
"7": 1,
|
||||
"a0": 7,
|
||||
@@ -467,29 +467,29 @@
|
||||
"v0": 2,
|
||||
"v1": 3
|
||||
},
|
||||
"sites": 2378,
|
||||
"sites": 2370,
|
||||
"sp": 13,
|
||||
"spelling": {
|
||||
"__asm__": 2348,
|
||||
"__asm__": 2340,
|
||||
"asm": 30
|
||||
},
|
||||
"volatile_qualified": 0,
|
||||
"zero": 65
|
||||
"zero": 64
|
||||
},
|
||||
"src_stamp": "af467c8fdfa6e21f",
|
||||
"src_stamp": "c99f4d2663088e3a",
|
||||
"tus": 4121,
|
||||
"unclassified": 0,
|
||||
"union_AD": {
|
||||
"bodies": 5941,
|
||||
"bodies": 5937,
|
||||
"by_kind": {
|
||||
"main": 159,
|
||||
"main": 157,
|
||||
"md": 117,
|
||||
"ov": 5494,
|
||||
"ov": 5492,
|
||||
"resident": 10,
|
||||
"shared": 161
|
||||
},
|
||||
"copies_in_multi": 4865,
|
||||
"distinct_bodies": 1194,
|
||||
"distinct_bodies": 1190,
|
||||
"multi_copy_classes": 118
|
||||
},
|
||||
"verbatim_excluded": {
|
||||
|
||||
@@ -1,32 +1,32 @@
|
||||
lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13)
|
||||
coverage asm raw 22366 = live 15390 + macro-block 194 + comment/dead 6782
|
||||
coverage register raw 11022 = live 2428 + macro-block 18 + comment/dead 8576
|
||||
coverage volatile raw 4381 = live 1693 + macro-block 82 + comment/dead 2606
|
||||
coverage asm raw 22353 = live 15377 + macro-block 194 + comment/dead 6782
|
||||
coverage register raw 11014 = live 2420 + macro-block 18 + comment/dead 8576
|
||||
coverage volatile raw 4378 = live 1690 + macro-block 82 + comment/dead 2606
|
||||
coverage builtin raw 599 = live 445 + macro-block 0 + comment/dead 154
|
||||
coverage attribute raw 76 = live 76 + macro-block 0 + comment/dead 0
|
||||
class sites in-bodies file-scope bodies distinct TUs marked unmarked kinds
|
||||
A pins 2378 2378 0 1483 647 1084 2378 0 {'pin': 2378}
|
||||
B asm 11357 11344 13 4713 772 1428 2561 8796 {'keepalive': 341, 'launder': 702, 'gte': 6334, 'instruction': 232, 'barrier': 329, 'gte-lever': 454, 'gte-unsigned': 270, 'asm-body': 13, 'verbatim-body': 2682}
|
||||
A pins 2370 2370 0 1478 642 1083 2370 0 {'pin': 2370}
|
||||
B asm 11355 11342 13 4711 770 1428 2555 8800 {'gte': 6337, 'barrier': 329, 'gte-lever': 451, 'gte-unsigned': 270, 'launder': 700, 'instruction': 232, 'asm-body': 13, 'keepalive': 341, 'verbatim-body': 2682}
|
||||
C volatile 1589 1437 152 495 94 609 14 1575 {'decl-body': 58, 'decl-file': 152, 'cast': 1377, 'param': 2}
|
||||
D register 50 50 0 47 47 6 0 50 {'register': 50}
|
||||
E asm-label 7788 1364 6424 1096 157 2090 0 7788 {'asm-label': 7788}
|
||||
F builtin 445 445 0 428 27 302 0 445 {'builtin': 445}
|
||||
G attribute 76 1 75 1 1 40 0 76 {'attribute': 76}
|
||||
UNION A–D: 5,941 bodies · 1,194 distinct (addresses normalized) · 118 multi-copy classes holding 4,865 bodies · by kind {'ov': 5494, 'main': 159, 'md': 117, 'resident': 10, 'shared': 161}
|
||||
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 4,449 sites in 2,193 bodies (879 distinct) · marked !FAKE 4,449 · UNMARKED 0
|
||||
UNION A–D: 5,937 bodies · 1,190 distinct (addresses normalized) · 118 multi-copy classes holding 4,865 bodies · by kind {'ov': 5492, 'shared': 161, 'main': 157, 'md': 117, 'resident': 10}
|
||||
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 4,436 sites in 2,187 bodies (873 distinct) · marked !FAKE 4,436 · UNMARKED 0
|
||||
orphan !FAKE markers (no pin/asm site on the line nor below): 0
|
||||
marked ordinary-C fakes kept by Drew's S104 ruling (a) (`do { } while (0)`, dead initialisers; NOT levers): 41
|
||||
GTE levers (clobbers beyond the canonical macro's): 454 sites (94 via a variant macro, 360 direct) · marked 454 · UNMARKED 0 · unsigned GTE statements 270
|
||||
per-TU asm macro definitions outside the GTE header: 314 {'launder': 154, 'instruction': 9, 'gte': 150, 'barrier': 1} (GTE variants 64)
|
||||
pins: 2,378 · $0 65 · $sp 13 · with initializer 221 · volatile-qualified 0 · bare-name 15 · spellings {'__asm__': 2348, 'asm': 30}
|
||||
GTE levers (clobbers beyond the canonical macro's): 451 sites (94 via a variant macro, 357 direct) · marked 451 · UNMARKED 0 · unsigned GTE statements 270
|
||||
per-TU asm macro definitions outside the GTE header: 314 {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1} (GTE variants 64)
|
||||
pins: 2,370 · $0 64 · $sp 13 · with initializer 221 · volatile-qualified 0 · bare-name 15 · spellings {'__asm__': 2340, 'asm': 30}
|
||||
whole-body asm routines in C shells, manifest PERMANENT (hand asm, NOT levers): 22 routines · 2,682 sites (2,660 private copies + 22 shared headers); asm-bodies NOT permanent (levers): 13 site(s) ['func_8001E378:DECOMPILE-NOW', 'func_80020F34:DECOMPILE-NOW', 'func_800249F0:DECOMPILE-NOW', 'func_80025CBC:DECOMPILE-NOW', 'func_80026514:UNCERTAIN', 'func_800268D0:UNCERTAIN', 'func_80027058:DECOMPILE-NOW', 'func_80027200:DECOMPILE-NOW', 'func_800CBA44:DECOMPILE-NOW', 'func_8017D810:DECOMPILE-NOW', 'func_8017E26C:UNCERTAIN', 'func_80184440:DECOMPILE-NOW', 'func_801A3BCC:DECOMPILE-NOW']
|
||||
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 327, 'barrier/via-macro': 2, 'gte/direct': 199, 'gte/via-macro': 6135, 'gte-lever/direct': 360, 'gte-lever/via-macro': 94, 'gte-unsigned/direct': 270, 'instruction/direct': 210, 'instruction/via-macro': 22, 'keepalive/direct': 341, 'launder/direct': 660, 'launder/via-macro': 42, 'verbatim-body/direct': 2682}
|
||||
instruction mnemonics: {'la': 142, 'addu': 23, 'RTP_SND': 22, 'addiu': 22, '.section': 7, 'lui': 4, 'lh': 3, 'and': 2, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
|
||||
gte mnemonics: {'gte_ldv0': 758, 'gte_stlvnl': 593, 'gte_stsxy': 448, 'gte_rtps': 438, 'gte_stflg': 415, 'gte_rtpt': 352, 'gte_SetRotMatrix': 251, 'gte_stsxy3': 236, 'gte_SetTransMatrix': 231, 'gte_rtv0tr': 228, 'gte_ldv3c': 184, 'gte_ldv3': 177, 'gte_stsv': 161, 'lwc2': 158, 'gte_stsz4': 149, 'gte_stsz3': 147, 'gte_stszotz': 134, 'gte_dpcl': 134, 'gte_stsxy3_f3': 111, 'gte_stclmv': 108, 'gte_nclip': 108, 'gte_stopz': 108, 'gte_stsxy3c': 108, 'gte_stsxy3_ft3': 79, 'gte_rtir': 75, 'gte_ldclmv': 72, 'gte_avsz4': 56, 'gte_stotz': 52, 'gte_ldrgb': 30, 'gte_nccs': 25}
|
||||
asm-bearing macro definitions: 314 (20 names, 3 with >1 text) kinds {'launder': 154, 'instruction': 9, 'gte': 150, 'barrier': 1}
|
||||
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 327, 'barrier/via-macro': 2, 'gte/direct': 199, 'gte/via-macro': 6138, 'gte-lever/direct': 357, 'gte-lever/via-macro': 94, 'gte-unsigned/direct': 270, 'instruction/direct': 210, 'instruction/via-macro': 22, 'keepalive/direct': 341, 'launder/direct': 658, 'launder/via-macro': 42, 'verbatim-body/direct': 2682}
|
||||
instruction mnemonics: {'la': 142, 'addu': 23, 'addiu': 22, 'RTP_SND': 22, '.section': 7, 'lui': 4, 'lh': 3, 'and': 2, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
|
||||
gte mnemonics: {'gte_ldv0': 758, 'gte_stlvnl': 593, 'gte_stsxy': 448, 'gte_rtps': 439, 'gte_stflg': 415, 'gte_rtpt': 352, 'gte_SetRotMatrix': 251, 'gte_stsxy3': 236, 'gte_SetTransMatrix': 231, 'gte_rtv0tr': 228, 'gte_ldv3c': 184, 'gte_ldv3': 177, 'gte_stsv': 161, 'lwc2': 158, 'gte_stsz4': 149, 'gte_stsz3': 147, 'gte_stszotz': 134, 'gte_dpcl': 134, 'gte_stsxy3_f3': 111, 'gte_stclmv': 108, 'gte_nclip': 108, 'gte_stopz': 108, 'gte_stsxy3c': 108, 'gte_stsxy3_ft3': 79, 'gte_rtir': 75, 'gte_ldclmv': 72, 'gte_avsz4': 56, 'gte_stotz': 52, 'gte_ldrgb': 30, 'gte_nccs': 25}
|
||||
asm-bearing macro definitions: 314 (20 names, 3 with >1 text) kinds {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1}
|
||||
controls (R39):
|
||||
src/800.c func_800226C0 pins got 14 expected 45 N-A
|
||||
src/shared/ov/func_80178004.h pins got 8 expected 26 N-A
|
||||
ov_SC03_006 func_80184034 bare-name pins got 0 expected 3 N-A
|
||||
engine_prelude.h asm sites (a macro definition only) got 0 expected 0 OK
|
||||
elapsed 23.6 s
|
||||
elapsed 25.4 s
|
||||
|
||||
Reference in New Issue
Block a user