feat(decomp): ox wave bv overlays — 44 banked

Committed before the main batch: gate_main reverts on failure and would take these with it.
This commit is contained in:
Drew T
2026-08-24 18:43:23 -06:00
parent 86ebc95a81
commit 88673d3708
10 changed files with 6266 additions and 3299 deletions
+1 -1
View File
@@ -4456,7 +4456,7 @@ ov_SC06_025_ELF := $(ov_SC06_025_OUT).elf
ov_SC06_025_MAPFILE := $(ov_SC06_025_OUT).map
ov_SC06_025_LD_SCRIPT := $(ov_SC06_025_OUT).ld
ov_SC06_025_SPLAT_YAML := config/splat.ov_SC06_025.yaml
ov_SC06_025_JTBL_INTERLEAVE := --order tail.data.o,ov_SC06_025.o,ov_SC06_025_jr_8012ACE0.o,tail2.data.o,ov_SC06_025_jr_80135888.o,tail3.data.o,ov_SC06_025_jr_80135A4C.o,tail4.data.o,ov_SC06_025_jr_80135D20.o,tail5.data.o,ov_SC06_025_jr_801380E0.o,ov_SC06_025_o0c.o,tail6.data.o,ov_SC06_025_jr_8013F350.o,tail7.data.o,ov_SC06_025_jr_8013FFD8.o,tail8.data.o,ov_SC06_025_jr_80140608.o,tail9.data.o,ov_SC06_025_jr_8015444C.o,ov_SC06_025_jr_80154C24.o,ov_SC06_025_jr_801588CC.o,ov_SC06_025_jr_80159C84.o,tail10.data.o,ov_SC06_025_jr_8015A3C8.o,tail11.data.o,ov_SC06_025_jr_8015AE2C.o,tail12.data.o,ov_SC06_025_jr_8015C32C.o,tail13.data.o,ov_SC06_025_jr_8016AB6C.o,tail14.data.o,ov_SC06_025_jr_80171B4C.o,ov_SC06_025_jr_801734BC.o,tail15.data.o,ov_SC06_025_jr_801789AC.o,ov_SC06_025_jr_80178D40.o,tail16.data.o,ov_SC06_025_jr_8017A4AC.o,tail17.data.o,ov_SC06_025_jr_8017AE2C.o,ov_SC06_025_jr_8017BEBC.o,tail18.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
ov_SC06_025_JTBL_INTERLEAVE := --order tail.data.o,ov_SC06_025.o,ov_SC06_025_jr_8012ACE0.o,tail2.data.o,ov_SC06_025_jr_80135888.o,tail3.data.o,ov_SC06_025_jr_80135A4C.o,tail4.data.o,ov_SC06_025_jr_80135D20.o,tail5.data.o,ov_SC06_025_jr_801380E0.o,ov_SC06_025_o0c.o,tail6.data.o,ov_SC06_025_jr_8013F350.o,tail7.data.o,ov_SC06_025_jr_8013FFD8.o,tail8.data.o,ov_SC06_025_jr_80140608.o,tail9.data.o,ov_SC06_025_jr_8015444C.o,ov_SC06_025_jr_80154C24.o,ov_SC06_025_jr_801588CC.o,ov_SC06_025_jr_80159C84.o,tail10.data.o,ov_SC06_025_jr_8015A3C8.o,tail11.data.o,ov_SC06_025_jr_8015AE2C.o,tail12.data.o,ov_SC06_025_jr_8015C32C.o,tail13.data.o,ov_SC06_025_jr_8016AB6C.o,tail14.data.o,ov_SC06_025_jr_80171B4C.o,ov_SC06_025_jr_801734BC.o,tail15.data.o,ov_SC06_025_jr_801789AC.o,ov_SC06_025_jr_80178D40.o,tail16.data.o,ov_SC06_025_jr_8017A4AC.o,tail17.data.o,ov_SC06_025_jr_8017AE2C.o,ov_SC06_025_jr_8017BEBC.o,tail18.data.o,ov_SC06_025_jr_8017EEC4.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
build/src/ov_SC06_025/ov_SC06_025.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
build/src/ov_SC06_025/ov_SC06_025_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
build/src/ov_SC06_025/ov_SC06_025_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
+3
View File
@@ -121,6 +121,7 @@ segments:
- [0x52354, c, ov_SC06_025_jr_8017A4AC]
- [0x52cd4, c, ov_SC06_025_jr_8017AE2C]
- [0x53d64, c, ov_SC06_025_jr_8017BEBC]
- [0x56d6c, c, ov_SC06_025_jr_8017EEC4]
- [0x5caf0, data, tail]
- [0x86c90, .rodata, ov_SC06_025] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x86d6c, .rodata, ov_SC06_025_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
@@ -164,6 +165,8 @@ segments:
- [0x87db0, .rodata, ov_SC06_025_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x87dc4, .rodata, ov_SC06_025_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x87de4, data, tail18]
- [0x87dec, .rodata, ov_SC06_025_jr_8017EEC4] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x87e0c, data, tail19]
- [0x8A12C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
- [0x8A12F] # EOF marker = the 0.4.dec byte length
# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
+11 -204
View File
@@ -1,9 +1,6 @@
#include "common.h"
#include "psyq/libcd.h"
#include "shared/clearTbl40.h" /* dedup group I0: func_80037004 / func_80037334 share one body */
typedef struct {
s32 words[38];
} Blk98_80029274;
/* hoisted by gate_main so drafts above can reuse them (§181) */
typedef struct {
s16 unk00;
@@ -6368,110 +6365,7 @@ void func_8001D3FC(s32 arg0)
}
}
void func_8001D70C(s32 param_1)
{
s32 matrix[8]; /* sp+0x10 */
s16 sc[20]; /* sp+0x30 */
func_8004978C((s16 *)(param_1 + 0x10), (void *)matrix);
/* build the diagonal scale matrix at sp+0x30 */
sc[0] = *(u16 *)(param_1 + 0x18);
sc[1] = 0;
sc[2] = 0;
sc[3] = 0;
sc[4] = *(u16 *)(param_1 + 0x1A);
sc[5] = 0;
sc[6] = 0;
sc[7] = 0;
sc[8] = 0x1000;
__asm__ volatile (
"lw $12, 0(%0);"
"lw $13, 4(%0);"
"ctc2 $12, $0;"
"ctc2 $13, $1;"
"lw $12, 8(%0);"
"lw $13, 12(%0);"
"lw $14, 16(%0);"
"ctc2 $12, $2;"
"ctc2 $13, $3;"
"ctc2 $14, $4;"
"addiu $2, $sp, 0x30;"
"lhu $12, 0($2);"
"lhu $13, 6($2);"
"lhu $14, 12($2);"
"mtc2 $12, $9;"
"mtc2 $13, $10;"
"mtc2 $14, $11;"
"nop;"
"nop;"
"mvmva 1, 0, 3, 3, 0;"
"mfc2 $12, $9;"
"mfc2 $13, $10;"
"mfc2 $14, $11;"
"sh $12, 0(%0);"
"sh $13, 6(%0);"
"sh $14, 12(%0);"
"addiu $2, $sp, 0x32;"
"lhu $12, 0($2);"
"lhu $13, 6($2);"
"lhu $14, 12($2);"
"mtc2 $12, $9;"
"mtc2 $13, $10;"
"mtc2 $14, $11;"
"nop;"
"nop;"
"mvmva 1, 0, 3, 3, 0;"
"addiu $2, $sp, 0x12;"
"mfc2 $12, $9;"
"mfc2 $13, $10;"
"mfc2 $14, $11;"
"sh $12, 0($2);"
"sh $13, 6($2);"
"sh $14, 12($2);"
"addiu $2, $sp, 0x34;"
"lhu $12, 0($2);"
"lhu $13, 6($2);"
"lhu $14, 12($2);"
"mtc2 $12, $9;"
"mtc2 $13, $10;"
"mtc2 $14, $11;"
"nop;"
"nop;"
"mvmva 1, 0, 3, 3, 0;"
"addiu $2, $sp, 0x14;"
"mfc2 $12, $9;"
"mfc2 $13, $10;"
"mfc2 $14, $11;"
"sh $12, 0($2);"
"sh $13, 6($2);"
"sh $14, 12($2);"
: : "r"((s32)matrix) : "$12", "$13", "$14", "$2", "memory");
*(s32 *)((u8 *)matrix + 0x14) = *(s16 *)(param_1 + 8);
*(s32 *)((u8 *)matrix + 0x18) = *(s16 *)(param_1 + 10);
*(s32 *)((u8 *)matrix + 0x1C) = *(s16 *)(param_1 + 12);
__asm__ volatile (
"lw $12, 0(%0);"
"lw $13, 4(%0);"
"ctc2 $12, $0;"
"ctc2 $13, $1;"
"lw $12, 8(%0);"
"lw $13, 12(%0);"
"lw $14, 16(%0);"
"ctc2 $12, $2;"
"ctc2 $13, $3;"
"ctc2 $14, $4;"
"lw $12, 20(%0);"
"lw $13, 24(%0);"
"ctc2 $12, $5;"
"lw $14, 28(%0);"
"ctc2 $13, $6;"
"ctc2 $14, $7"
: : "r"((s32)matrix) : "$12", "$13", "$14", "$2");
}
INCLUDE_ASM("asm/nonmatchings/800", func_8001D70C);
/* ---- PsyQ GTE inline macros (same spelling as func_8001F730 / ov_SC03_* / 800.c gte_ldv0) ---- */
@@ -10452,29 +10346,13 @@ s32 func_80029178(u32 arg0) {
return (D_800AE648[idx] & m) != 0;
}
extern u8 D_800BA1B8[];
INCLUDE_ASM("asm/nonmatchings/800", func_800291A0);
void func_800291A0(s32 arg0, s32 arg1) {
D_800BA1B8[arg0] = arg1;
}
INCLUDE_ASM("asm/nonmatchings/800", func_800291B4);
extern u8 D_800BA1B8[];
INCLUDE_ASM("asm/nonmatchings/800", func_800291C8);
s32 func_800291B4(s32 arg0) {
return D_800BA1B8[arg0];
}
extern u8 D_800BA1B8[];
void func_800291C8(s32 arg0, s32 arg1) {
*(u16 *) &D_800BA1B8[arg0] = arg1;
}
extern u8 D_800BA1B8[];
s32 func_800291DC(s32 index) {
return *(s16 *)&D_800BA1B8[index];
}
INCLUDE_ASM("asm/nonmatchings/800", func_800291DC);
INCLUDE_ASM("asm/nonmatchings/800", func_800291F0);
@@ -10501,6 +10379,9 @@ s32 func_80029264(void) {
}
typedef struct {
s32 words[38];
} Blk98_80029274;
extern Blk98_80029274 D_80072C84;
extern Blk98_80029274 D_80078E78;
@@ -10623,38 +10504,7 @@ INCLUDE_ASM("asm/nonmatchings/800", func_80029774);
INCLUDE_ASM("asm/nonmatchings/800", func_800298BC);
typedef struct {
u8 b[4];
} Blk4;
extern Blk98_80029274 D_80078E78;
extern u16 D_800A6588[];
extern u8 D_800BA2B8[];
extern u8 D_80078F28[];
extern u8 D_800AE648[];
extern u8 D_800BA1B8[];
void func_8002992C(s32 arg0) {
u8* base;
s32 i;
base = D_80078F28 + arg0 * 0x2DC;
D_80078E78 = *(Blk98_80029274*)(base + 0x24);
for (i = 0; i < 0x40; i++) {
D_800A6588[i] = *(u16*)(base + 0xBC + i * 2);
}
for (i = 0; i < 0x40; i++) {
D_800AE648[i] = *(i + base + 0x13C);
}
for (i = 0; i < 0x100; i++) {
D_800BA1B8[i] = *(i + base + 0x17C);
}
for (i = 0; i < 0x18; i++) {
*(Blk4*)(D_800BA2B8 + i * 4) = *(Blk4*)(base + 0x27C + i * 4);
}
}
INCLUDE_ASM("asm/nonmatchings/800", func_8002992C);
INCLUDE_ASM("asm/nonmatchings/800", func_80029A58);
@@ -15706,48 +15556,7 @@ void func_80038668(s32 a0, s32 a1) {
*(baseptr + a1) &= 0xFE;
}
s32 func_80038698(void *arg0) {
register u8 *a3 asm("$7");
u32 a2;
u16 v1;
s32 a0;
a3 = *(u8 **)(arg0);
*(u8 **)(arg0) = a3 + 1;
a2 = a3[0];
*(u8 **)(arg0) = a3 + 2;
a2 |= (a3[1] << 8);
*(u8 **)(arg0) = a3 + 3;
a2 |= (a3[2] << 16);
*(u8 **)(arg0) = a3 + 4;
a2 |= (a3[3] << 24);
if (a2 != 0x6468544D) {
return -1;
}
*(u8 **)(arg0) = a3 + 5;
a2 = a3[4];
*(u8 **)(arg0) = a3 + 6;
a2 = (a2 << 8) | a3[5];
*(u8 **)(arg0) = a3 + 7;
a2 = (a2 << 8) | a3[6];
*(u8 **)(arg0) = a3 + 8;
a2 = (a2 << 8) | a3[7];
v1 = (a3[8] << 8) | a3[9];
if (v1 != 0) {
return -1;
}
v1 = (a3[10] << 8) | a3[11];
if ((s16)v1 != 1) {
return -1;
}
a0 = (s16)((a3[12] << 8) | a3[13]);
if (a0 & 0x8000) {
return -1;
}
*(u16 *)((char *)(arg0) + 0x1E6) = a0 & 0x7FFF;
*(u8 **)(arg0) += a2;
return 0;
}
INCLUDE_ASM("asm/nonmatchings/800", func_80038698);
INCLUDE_ASM("asm/nonmatchings/800", func_800387C0);
@@ -15914,9 +15723,7 @@ INCLUDE_ASM("asm/nonmatchings/800", func_80039F50);
INCLUDE_ASM("asm/nonmatchings/800", func_8003A098);
void func_8003A0D0(s32 *arg0) {
(*arg0)++;
}
INCLUDE_ASM("asm/nonmatchings/800", func_8003A0D0);
INCLUDE_ASM("asm/nonmatchings/800", func_8003A0E4);
+1 -63
View File
@@ -563,69 +563,7 @@ __asm__(
".end\tfunc_80059FC0\n"
);
__asm__(
".text\n"
".align\t2\n"
".globl\tSYS_OBJ_E34\n"
".ent\tSYS_OBJ_E34\n"
"SYS_OBJ_E34:\n"
".set\tnoreorder\n"
"or $4, $2, $3\n"
"lui $2, %hi(D_80072780)\n"
"lw $2, %lo(D_80072780)($2)\n"
"nop\n"
"lw $2, 16($2)\n"
"nop\n"
"jalr $2\n"
"nop\n"
"lui $2, %hi(D_800727FC)\n"
"addiu $2, $2, %lo(D_800727FC)\n"
"lhu $2, 0($2)\n"
"lh $3, 8($16)\n"
"sll $2, $2, 16\n"
"sra $2, $2, 16\n"
"bne $2, $3, .L8005A0FC\n"
"nop\n"
"lui $2, %hi(D_800727FE)\n"
"lhu $2, %lo(D_800727FE)($2)\n"
"lh $3, 10($16)\n"
"sll $2, $2, 16\n"
"sra $2, $2, 16\n"
"bne $2, $3, .L8005A0FC\n"
"nop\n"
"lui $2, %hi(D_80072800)\n"
"lhu $2, %lo(D_80072800)($2)\n"
"lh $3, 12($16)\n"
"sll $2, $2, 16\n"
"sra $2, $2, 16\n"
"bne $2, $3, .L8005A0FC\n"
"nop\n"
"lui $2, %hi(D_80072802)\n"
"lhu $2, %lo(D_80072802)($2)\n"
"lh $3, 14($16)\n"
"sll $2, $2, 16\n"
"sra $2, $2, 16\n"
"beq $2, $3, .L8005A2C4\n"
"nop\n"
".L8005A0FC:\n"
"jal func_80043078\n"
"nop\n"
"lh $4, 8($16)\n"
"sb $2, 18($16)\n"
"andi $2, $2, 0xFF\n"
"sll $3, $4, 2\n"
"addu $3, $3, $4\n"
"sll $3, $3, 1\n"
"lh $4, 10($16)\n"
"beqz $2, .L8005A130\n"
"addiu $3, $3, 0x260\n"
"j SYS_OBJ_F00\n"
"addiu $17, $4, 0x13\n"
".L8005A130:\n"
"addiu $17, $4, 0x10\n"
".set\treorder\n"
".end\tSYS_OBJ_E34\n"
);
INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_E34);
INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_F00);
+95 -3
View File
@@ -3499,7 +3499,38 @@ void func_8017DE28(s32 p) {
}
INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_jr_8017C8D0", func_8017DEEC);
extern s32 func_80146E98(s32 a0);
extern void func_80162CCC(void);
void func_8017DEEC(s32 a0) {
u8 *s0;
u8 *s2;
u16 w;
s2 = *(u8 **)(a0 + 0x4C);
s0 = *(u8 **)(a0 + 0x20);
if (func_80146E98(a0) != 0) {
w = *(u16 *)(s0 + 0x1C) + 0x400;
*(u16 *)(s0 + 0x1C) = w;
*(u16 *)(s0 + 0x18) = w;
if ((s16)w >= 0x7001) {
*(u16 *)(s0 + 0x1C) = 0x7000;
*(u16 *)(s0 + 0x18) = 0x7000;
}
w = *(u16 *)(s0 + 0x1A) + 0x100;
*(u16 *)(s0 + 0x1A) = w;
if ((s16)w >= 0x7001) {
*(u16 *)(s0 + 0x1A) = 0x7000;
}
}
if (*(u16 *)s2 != 0x16) {
((void (*)(s32))func_80162CCC)(a0);
}
}
@@ -4070,7 +4101,57 @@ void func_8018060C(s32 param_1)
}
INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_jr_8017C8D0", func_801806A0);
typedef struct {
u8 unk00[0x70];
s16 unk70;
s16 unk72;
s16 unk74;
s16 unk76;
u8 pad78[0x84];
s16 unkFC;
} Work;
extern void MoveImage(void *a0, s32 a1, s32 a2);
extern u8 D_801925C4[];
extern s16 D_80192614[];
extern s16 D_801926D4[];
void func_801806A0(Work *work, s32 arg1)
{
s32 i;
if (work->unk76 > 0) {
for (i = 0; i < 5; i++) {
if (work->unk76 >= D_801926D4[i]) {
if (work->unkFC == i) {
return;
}
MoveImage(D_801925C4 + i * 0x10, work->unk70 * 0x10 + 0x2B0, 0x100);
MoveImage(D_801925C4 + i * 0x10 + 8, 0x160, work->unk70 + 0x147);
work->unkFC = i;
return;
}
}
return;
}
if (arg1 != 0) {
if (work->unk76 == 0) {
work->unk76 = 300;
MoveImage(D_801925C4, work->unk70 * 0x10 + 0x2B0, 0x100);
MoveImage(D_801925C4 + 8, 0x160, work->unk70 + 0x147);
work->unkFC = 0;
return;
}
if (work->unk76 >= -4) {
MoveImage(&D_801926D4[work->unk76 * 8], work->unk70 * 0x10 + 0x2B0, 0x100);
MoveImage(&D_801926D4[work->unk76 * 8 + 4], 0x160, work->unk70 + 0x147);
return;
}
}
MoveImage(&D_80192614[(work->unk76 & 7) * 8], work->unk70 * 0x10 + 0x2B0, 0x100);
MoveImage(&D_80192614[(work->unk76 & 7) * 8 + 4], 0x160, work->unk70 + 0x147);
}
INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_jr_8017C8D0", func_80180854);
@@ -4090,7 +4171,18 @@ INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_jr_8017C8D0", func_80180E2
INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_jr_8017C8D0", func_80180F84);
INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_jr_8017C8D0", func_801813F4);
extern void (*D_80192854[])(void);
void func_801813F4(s32 arg0) {
D_80192854[*(u16 *)(arg0 + 2)]();
if (*(u16 *)arg0 != 0) {
*(u16 *)(arg0 + 0xFC) &= 0xFFF;
*(s16 *)(*(s32 *)(arg0 + 0x20) + 0x18) = 0x1000 - (func_80047948(*(s16 *)(arg0 + 0xFC)) >> 3);
*(s16 *)(*(s32 *)(arg0 + 0x20) + 0x1A) = (func_80047948(*(s16 *)(arg0 + 0xFC)) >> 3) + 0x1000;
*(s16 *)(*(s32 *)(arg0 + 0x20) + 0x1C) = (func_80047948(*(s16 *)(arg0 + 0xFC)) >> 3) + 0x1000;
}
}
extern void func_800599B8(void *a0, void *a1);
extern void func_8012C218(void *a0);
+43 -1
View File
@@ -3408,7 +3408,49 @@ void func_8017D34C(void *a0) {
}
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8017BEBC", func_8017D388);
void func_8017D388(s32 a0) {
typedef struct {
s16 v[4];
} Blk8_80126940_8017D388;
extern s32 D_80126B58;
extern s16 D_801932E0[];
extern Blk8_80126940_8017D388 D_80126940;
Blk8_80126940_8017D388 sp10;
u8 t;
s16 v0, v1;
if (func_80148800(&D_80126B58) & 3) {
t = (*(u8 *)(a0 + 5) + 1) & 1;
*(u8 *)(a0 + 5) = t;
*(s32 *)(a0 + 0x14) = D_801932E0[t];
}
sp10 = D_80126940;
/* Clamp sp10.v[0] */
v1 = sp10.v[0];
if (v1 < -0xF80) {
sp10.v[0] = -0xF80;
} else if (v1 < 0x941) {
/* v1 stays unchanged */
} else {
sp10.v[0] = 0x940;
}
/* Clamp sp10.v[2] */
v0 = sp10.v[2];
if (v0 < -0x100) {
sp10.v[2] = -0x100;
} else if (v0 < 0x481) {
/* v0 stays unchanged */
} else {
sp10.v[2] = 0x480;
}
func_8017D63C(a0, sp10.v);
}
typedef struct {
s16 v[4];
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
+30 -1
View File
@@ -3306,7 +3306,36 @@ void func_8017DA94(void) {
}
INCLUDE_ASM("asm/ov_SC06_030/nonmatchings/ov_SC06_030_jr_8017C8D0", func_8017DABC);
extern void func_8012A094(s32 a0);
extern void func_8012A018(s32 a, s32 b);
extern s32 D_80126954;
extern s32 D_8012695C;
extern s16 D_80126968;
extern s16 D_8012696A;
extern s16 D_8012696C;
extern s16 D_80126976;
extern s16 D_80126978;
extern s16 D_8012697A;
extern u8 D_80126948[];
extern void func_8017DB58(void *a0);
void func_8017DABC(void) {
u8 *s0;
D_80126954 = 0x190;
D_8012695C = 0x4B0;
D_80126968 = 0x155;
D_8012696A = 0x800;
D_8012696C = 0;
D_80126976 = 0;
D_80126978 = -0x20;
D_8012697A = 0;
func_8012A018((s32)func_8017DB58, 0);
s0 = D_80126948;
func_8012A094((s32)s0);
func_8017DB58(s0);
}
extern void (*D_80185920[])(void);
+109 -2
View File
@@ -4326,7 +4326,100 @@ INCLUDE_ASM("asm/ov_SC07_000/nonmatchings/ov_SC07_000_jr_8017BEBC", func_8017F09
INCLUDE_ASM("asm/ov_SC07_000/nonmatchings/ov_SC07_000_jr_8017BEBC", func_8017F0D0);
INCLUDE_ASM("asm/ov_SC07_000/nonmatchings/ov_SC07_000_jr_8017BEBC", func_8017F15C);
extern void func_8012AD80();
extern s32 func_8012BEE8(s32 a0);
extern void func_8012A828();
extern void func_8017F888(s32 *a0, s32 *a1);
extern s32 func_80132EF4(s32 a0, s32 a1);
extern void func_8012AD44(s32 *a0, s16 a1);
extern void func_8002D4C8(s32 a0, s32 a1);
extern s16 D_801D0B7C;
extern void D_80186558;
extern void D_801BCE04;
void func_8017F15C(s32 s0)
{
register s32 v1 __asm__("v1");
s32 t;
s32 u;
s32 z;
v1 = *(u16 *)(s0 + 0x34);
switch (v1) {
case 0:
v1 = *(s32 *)(s0 + 0x20);
*(u16 *)(v1 + 0x12) = *(u16 *)(v1 + 0x12) - 0x20;
v1 = *(s32 *)(s0 + 0x20);
*(u16 *)(v1 + 0x10) = *(u16 *)(v1 + 0x10) + 0x18;
func_8012AD80(s0);
if (func_8012BEE8(s0) == 0) {
return;
}
v1 = *(s32 *)(s0 + 0x20);
*(u16 *)(v1 + 0x1C) = 0x2400;
*(u16 *)(v1 + 0x1A) = 0x2400;
*(u16 *)(v1 + 0x18) = 0x2400;
*(u16 *)(s0 + 0xFE) = 0x120;
*(s32 *)(s0 + 0x1C) = 0x40;
*(u16 *)(s0 + 0x34) += 1;
return;
case 1:
v1 = *(s32 *)(s0 + 0x20);
*(u16 *)(v1 + 0x10) = *(u16 *)(v1 + 0x10) + 0x80;
v1 = *(s32 *)(s0 + 0x20);
*(u16 *)(v1 + 0x14) = *(u16 *)(v1 + 0x14) - 0x10;
func_8012AD80(s0);
if (func_8012BEE8(s0) != 0) {
*(u16 *)(s0 + 0x34) += 1;
return;
}
t = *(s32 *)(s0 + 0x20);
if (*(s16 *)(t + 0x18) >= 0x201) {
*(s16 *)(t + 0x18) = *(s16 *)(t + 0x18) - *(u16 *)(s0 + 0xFE);
}
u = *(s32 *)(s0 + 0x20);
v1 = *(u16 *)(u + 0x18);
*(u16 *)(u + 0x1C) = v1;
*(u16 *)(u + 0x1A) = v1;
if (*(s16 *)(s0 + 0xFE) < 0x41) {
return;
}
*(u16 *)(s0 + 0xFE) = *(s16 *)(s0 + 0xFE) - 8;
return;
case 2:
if (*(u16 *)&D_801D0B7C != 7) {
return;
}
func_8017F888((s32 *)s0, (s32 *)&D_80186558);
z = *(s32 *)(s0 + 0x20);
*(u16 *)(z + 0x14) = 0;
*(u16 *)(z + 0x12) = 0;
*(u16 *)(z + 0x10) = 0;
v1 = *(s32 *)(s0 + 0x20);
*(u16 *)(v1 + 0x1C) = 0x1000;
*(u16 *)(v1 + 0x1A) = 0x1000;
*(u16 *)(v1 + 0x18) = 0x1000;
*(u16 *)(s0 + 0x34) += 1;
return;
case 3:
if (*(u16 *)&D_801D0B7C != 6) {
return;
}
func_8012A828(s0, (void *)&D_801BCE04);
*(s32 *)(s0 + 0x10) = 0x00080000;
*(s32 *)(s0 + 0x14) = -0x160000;
*(s32 *)(s0 + 0x18) = 0x00180000;
*(s32 *)(s0 + 0x1C) = 0xC;
v1 = func_80132EF4(s0, 0x76);
if (v1 != 0) {
*(u16 *)(v1 + 0xA) = *(u16 *)(v1 + 0xA) - 0x50;
}
func_8012AD44((s32 *)s0, 6);
func_8002D4C8(0xC1B, 0);
return;
}
}
extern void (*D_80186560[])(void);
@@ -5057,7 +5150,21 @@ void func_801813D4(s32 a0)
}
INCLUDE_ASM("asm/ov_SC07_000/nonmatchings/ov_SC07_000_jr_8017BEBC", func_801814B0);
void func_801814B0(s32 param)
{
extern s32 func_8012BEE8(s32 arg0);
extern void func_8012C218(void *arg0);
extern void func_8012AD80(s32 arg0);
if (func_8012BEE8(param) != 0) {
func_8012C218((void *)param);
} else {
func_8012AD80(param);
*(u16 *)(*(s32 *)(param + 0x20) + 0x10) += *(u16 *)(param + 0x106);
*(u16 *)(*(s32 *)(param + 0x20) + 0x14) += *(u16 *)(param + 0x108);
}
}
INCLUDE_ASM("asm/ov_SC07_000/nonmatchings/ov_SC07_000_jr_8017BEBC", func_80181528);