mirror of
https://github.com/Druthulu/BFM-decomp
synced 2026-09-26 13:33:34 -04:00
phase-36: S105 s105_f9 — func_8017F498 banked at 0 through the whole-object gate + propagated — f9 plain C (the constant holder declared per arm; 2 → 0)
This commit is contained in:
Drew T
+167
-167
@@ -1,5 +1,5 @@
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{
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@@ -21,206 +21,206 @@
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
},
|
||||
"ok": true,
|
||||
"seconds": 2.2
|
||||
|
||||
@@ -29630,3 +29630,4 @@
|
||||
{"ts": "2026-09-11 18:45:25", "label": "s105_comment6", "rung": "E", "calib": {"head": "5c8030119", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_000/ov_SC02_000_jr_8018173C.c", "fn": "func_80185840", "addr": 2149079104, "aliases": null, "header": false, "includers": 0, "nhash_before": "6e5f8dd4c3f75fb8910cdcabb12218b81738cad3", "nhash_after": "c9c0b61cd6eb7a5a23817e5b4a57e0d6697af1e8", "source": "delever_regen R15 sink @17 (r)", "verdict": "LEVER-FREE", "sites": [], "compiles": 2, "seconds": 0.3, "objects": ["build/src/ov_SC02_000/ov_SC02_000_jr_8018173C.o", "build/src/ov_SC02_003/ov_SC02_003_jr_8018173C.o"], "before_text": "void func_80185840(s32 param_1) {\n s16 r;\n s16 t;\n u32 val;\n\n func_80185C48(param_1, 0);\n *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) += *(u16 *)(param_1 + 0xE0);\n t = *(s16 *)(param_1 + 0xE0);\n /* if/else (NOT \"r = 0x80; if (t < 0x80) r = ...;\"): the else-arm shape keeps\n * `li r,0x80` in a block AFTER the branch at register-allocation time, so r\n * does not conflict with the slt result and gets $v0 instead of $a0. */\n if (t >= 0x80) {\n r = 0x80;\n } else {\n r = t + *(u16 *)(param_1 + 0xE2);\n }\n *(s16 *)(param_1 + 0xE0) = r;\n __asm__ __volatile__(\"\"); /* cookbook \u00a7194-A: zero-byte sched fence \u2014 emits the // !FAKE: barrier \u2014 NEEDED COMPILE-ERROR (P36 rung B tus10)\n * sh first in the join block, ahead of li 0x27D7D */\n D_801E8750 += 0x27D7D;\n val = (u32)D_801E8750 >> 16;\n if (val >= 0x80) {\n val = 0x7F;\n }\n ((void (*)(s32, s32))func_8018623C)(0x4DF, val + 0x1000);\n if (*(s32 *)(param_1 + 0x18) < -0xB9999) {\n *(s32 *)(param_1 + 0x18) = -0xB9999;\n *(s16 *)(param_1 + 2) = 0xB;\n ((void (*)(s32, s32))func_8018623C)(0x4DF, 0x107F);\n }\n}\n", "after_text": "void func_80185840(s32 param_1) {\n s16 t;\n u32 val;\n\n func_80185C48(param_1, 0);\n *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) += *(u16 *)(param_1 + 0xE0);\n t = *(s16 *)(param_1 + 0xE0);\n /* if/else (NOT \"r = 0x80; if (t < 0x80) r = ...;\"): the else-arm shape keeps\n * `li r,0x80` in a block AFTER the branch at register-allocation time, so r\n * does not conflict with the slt result and gets $v0 instead of $a0. */\n if (t >= 0x80) {\n *(s16 *)(param_1 + 0xE0) = (0x80);\n } else {\n *(s16 *)(param_1 + 0xE0) = (t + *(u16 *)(param_1 + 0xE2));\n }\n /* cookbook \u00a7194-A: zero-byte sched fence \u2014 emits the \n * sh first in the join block, ahead of li 0x27D7D */\n D_801E8750 += 0x27D7D;\n val = (u32)D_801E8750 >> 16;\n if (val >= 0x80) {\n val = 0x7F;\n }\n ((void (*)(s32, s32))func_8018623C)(0x4DF, val + 0x1000);\n if (*(s32 *)(param_1 + 0x18) < -0xB9999) {\n *(s32 *)(param_1 + 0x18) = -0xB9999;\n *(s16 *)(param_1 + 2) = 0xB;\n ((void (*)(s32, s32))func_8018623C)(0x4DF, 0x107F);\n }\n}\n"}
|
||||
{"ts": "2026-09-11 18:45:27", "label": "s105_comment6", "rung": "E", "calib": {"head": "5c8030119", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c", "fn": "func_8018009C", "addr": 2149056668, "aliases": null, "header": false, "includers": 0, "nhash_before": "adcdef44bce5f7f112aba8abee4eef2686b7e18e", "nhash_after": "eebdc0e036e8bb017e67a740c66a18e1e437f3df", "source": "delever_regen R9 swap-stmts @26", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.16, "objects": ["build/src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.o"], "before_text": "void func_8018009C(s32 param_1)\n{\n s32 v0;\n s32 a1;\n s32 t0;\n s32 t1;\n s32 r;\n\n switch ((s16)(*(u16 *)(param_1 + 0xFC) - 1)) {\n case 1:\n if (*(s32 *)(param_1 + 0x90) != (s32)&D_801D3BC4) {\n func_8012A828(param_1, (s32)&D_801D3BC4);\n }\n v0 = *(s32 *)(param_1 + 0x20);\n __asm__ __volatile__(\"\"); /* \u00a75a cross-jump barrier, placed between the two tail // !FAKE: barrier \u2014 NEEDED COMPILE-ERROR (P36 rung B tus7)\n stores (not immediately before the jump) so reorg can\n still fill the branch delay slot with `a1 = 0xC00`;\n keeps this arm's tail distinct from case 0's identical\n one so gcc does not fold the two duplicate tails */\n a1 = 0xC00;\n goto common;\n case 0:\n if (*(s32 *)(param_1 + 0x90) != (s32)&D_801BEAF8) {\n func_8012A828(param_1, (s32)&D_801BEAF8);\n }\n v0 = *(s32 *)(param_1 + 0x20);\n a1 = 0xC00;\n goto common;\n case 3:\n t0 = *(s32 *)(param_1 + 0x90);\n t1 = (s32)&D_801D3BC4;\n goto LAB_80180154;\n case 2:\n t0 = *(s32 *)(param_1 + 0x90);\n t1 = (s32)&D_801BEAF8;\n LAB_80180154:\n if (t0 != t1) {\n func_8012A828(param_1, t1);\n }\n v0 = *(s32 *)(param_1 + 0x20);\n a1 = 0xE00;\n common:\n r = func_8012B608((s32)*(s16 *)(v0 + 0x12), a1, 8);\n *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) =\n *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) + r;\n return;\n case 4:\n func_801801B0(param_1);\n return;\n default:\n return;\n }\n}\n", "after_text": "void func_8018009C(s32 param_1)\n{\n s32 v0;\n s32 a1;\n s32 t0;\n s32 t1;\n s32 r;\n\n switch ((s16)(*(u16 *)(param_1 + 0xFC) - 1)) {\n case 1:\n if (*(s32 *)(param_1 + 0x90) != (s32)&D_801D3BC4) {\n func_8012A828(param_1, (s32)&D_801D3BC4);\n }\n v0 = *(s32 *)(param_1 + 0x20);\n /* \u00a75a cross-jump barrier, placed between the two tail \n stores (not immediately before the jump) so reorg can\n still fill the branch delay slot with `a1 = 0xC00`;\n keeps this arm's tail distinct from case 0's identical\n one so gcc does not fold the two duplicate tails */\n a1 = 0xC00;\n goto common;\n case 0:\n if (*(s32 *)(param_1 + 0x90) != (s32)&D_801BEAF8) {\n func_8012A828(param_1, (s32)&D_801BEAF8);\n }\n a1 = 0xC00;\n v0 = *(s32 *)(param_1 + 0x20);\n goto common;\n case 3:\n t0 = *(s32 *)(param_1 + 0x90);\n t1 = (s32)&D_801D3BC4;\n goto LAB_80180154;\n case 2:\n t0 = *(s32 *)(param_1 + 0x90);\n t1 = (s32)&D_801BEAF8;\n LAB_80180154:\n if (t0 != t1) {\n func_8012A828(param_1, t1);\n }\n v0 = *(s32 *)(param_1 + 0x20);\n a1 = 0xE00;\n common:\n r = func_8012B608((s32)*(s16 *)(v0 + 0x12), a1, 8);\n *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) =\n *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) + r;\n return;\n case 4:\n func_801801B0(param_1);\n return;\n default:\n return;\n }\n}\n"}
|
||||
{"ts": "2026-09-11 19:12:48", "label": "s105_f9", "rung": "E", "calib": {"head": "ea0556951", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_027/ov_SC02_027_jr_8017D898.c", "fn": "func_801810A0", "addr": 2149060768, "aliases": null, "header": false, "includers": 0, "nhash_before": "bd1795bd5136441bf3abb1216317029249002455", "nhash_after": "9b1a1f2c1b2654c3b048eceae057c1cebac9c333", "source": ".run/P36/agents/ov_SC02_027__func_801810A0/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.28, "objects": ["build/src/ov_SC02_027/ov_SC02_027_jr_8017D898.o"], "before_text": "void func_801810A0(W_801810A0 *w) {\n extern u64 D_8018F298[];\n struct {\n s16 f0, f1, f2, f3, f4, f5, f6;\n u16 timer;\n s32 tbl;\n s32 pad[5];\n } L;\n register s32 t asm(\"v0\"); // !FAKE: pin v0 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 f;\n register s32 u asm(\"a0\"); // !FAKE: pin a0 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n if (func_8012BDBC((s32)w, 0x380)) {\n __asm__ __volatile__(\"\" ::: \"memory\"); // !FAKE: barrier memory \u2014 NEEDED DIFFERS (P36 rung B tus9)\n if (!func_8018152C((s32)w, 0x380)) {\n goto el;\n }\n __asm__ __volatile__(\"\" ::: \"memory\"); // !FAKE: barrier memory \u2014 NEEDED DIFFERS (P36 rung B tus9)\n *(s16 *)(w->f20 + 0x12) += func_8012B8E4((s32)w, 0x14);\n if (w->f34 == 0) {\n if (w->fFE == 0) {\n func_8002D4C8(0x68B, 0);\n w->fFE = 1;\n }\n if (w->fFC >= 0xA) {\n w->fFC = 0xA;\n w->f34 += 1;\n }\n L.tbl = (s32)&D_8018F298[*(s16 *)&w->fFC];\n L.f3 = 0x175;\n L.f6 = 0x7FFF;\n L.f2 = 0;\n L.f1 = 0;\n L.f0 = 0;\n L.f5 = 0;\n L.f4 = 0;\n L.timer = w->fFC;\n if (func_8012C51C((s32)&L, (s32)w)) {\n w->fFC += 1;\n }\n }\n } else {\nel:\n t = w->fFC;\n if (t != 0) {\n f = w->fFE;\n u = t;\n __asm__ __volatile__(\"\" : : \"r\"(t)); // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B tus9)\n t = u - 1;\n w->fFC = t;\n w->f34 = 0;\n if (f != 0) {\n w->fFE = 0;\n func_8002D4C8(4, 0x68B);\n }\n }\n }\n}\n", "after_text": "void func_801810A0(W_801810A0 *w) {\n extern u64 D_8018F298[];\n struct {\n s16 f0, f1, f2, f3, f4, f5, f6;\n u16 timer;\n s32 tbl;\n s32 pad[2]; /* frame accounting (P36 S105 f9): the 20-byte request + one 8-byte reload slot for the `cnt`\n split's orphan (combine.c:2306, reload1.c:2331) leave 8 bytes of the original's 64-byte frame\n unexplained; the tree's pad[5] covered the orphan too. pad[2] and pad[3] both give 0. */\n } L;\n s16 cnt;\n s32 f;\n\n if (func_8012BDBC((s32)w, 0x380)) {\n if (!func_8018152C((s32)w, 0x380)) {\n goto el;\n }\n *(s16 *)(w->f20 + 0x12) += func_8012B8E4((s32)w, 0x14);\n if (w->f34 == 0) {\n if (w->fFE == 0) {\n func_8002D4C8(0x68B, 0);\n w->fFE = 1;\n }\n if (w->fFC >= 0xA) {\n w->fFC = 0xA;\n w->f34 += 1;\n }\n L.tbl = (s32)&D_8018F298[*(s16 *)&w->fFC];\n L.f3 = 0x175;\n L.f6 = 0x7FFF;\n L.f2 = 0;\n L.f1 = 0;\n L.f0 = 0;\n L.f5 = 0;\n L.f4 = 0;\n L.timer = w->fFC;\n if (func_8012C51C((s32)&L, (s32)w)) {\n w->fFC += 1;\n }\n }\n } else {\nel:\n cnt = w->fFC;\n if (cnt != 0) {\n f = w->fFE;\n w->fFC = cnt - 1;\n w->f34 = 0;\n if (f != 0) {\n w->fFE = 0;\n func_8002D4C8(4, 0x68B);\n }\n }\n }\n}\n"}
|
||||
{"ts": "2026-09-11 19:13:06", "label": "s105_f9", "rung": "E", "calib": {"head": "41ab73ae6", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_027/ov_SC02_027_jr_8017D898.c", "fn": "func_8017F498", "addr": 2149053592, "aliases": null, "header": false, "includers": 0, "nhash_before": "035b880d5c9e3941c6b9027e942e7effcf701db0", "nhash_after": "25abdc768527cc40c4cbd8c3c92182a2a6a9ca41", "source": ".run/P36/agents/ov_SC02_027__func_8017F498/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.285, "objects": ["build/src/ov_SC02_027/ov_SC02_027_jr_8017D898.o"], "before_text": "void func_8017F498(s32 a0) {\n\n extern s16 D_8018F0B0[];\n extern Blk8_80126940_8017D6D0_8017F498 D_80126940;\n Blk8_80126940_8017D6D0_8017F498 sp10;\n u8 t;\n s16 lim;\n register s16 mid __asm__(\"$5\"); // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n if (func_80148800(&D_80126B58) & 3) {\n t = (*(u8 *)(a0 + 5) + 1) & 1;\n *(u8 *)(a0 + 5) = t;\n }\n sp10 = D_80126940;\n if (sp10.v[0] < -0x3C0) {\n lim = -0x540;\n if (sp10.v[0] < -0x540) {\n sp10.v[0] = lim;\n }\n *(s16 *)(a0 + 0x2E) = 0;\n *(s32 *)(a0 + 0x14) = D_8018F0B0[*(u8 *)(a0 + 5)];\n } else {\n if (sp10.v[2] >= 0x1081) {\n mid = -0x300;\n if (sp10.v[0] < mid) {\n *(s16 *)(a0 + 0x2E) = mid - sp10.v[0];\n } else {\n *(s16 *)(a0 + 0x2E) = 0;\n }\n } else {\n mid = -0x340;\n if (sp10.v[0] < mid) {\n *(s16 *)(a0 + 0x2E) = mid - sp10.v[0];\n } else {\n *(s16 *)(a0 + 0x2E) = 0;\n }\n }\n __asm__ __volatile__(\"\" :: \"r\"(mid)); /* zero-byte: keep $a1 live past the subu */ // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B tus9)\n if (sp10.v[2] >= 0x1241) {\n *(s32 *)(a0 + 0x14) = D_8018F0B0[*(u8 *)(a0 + 5)];\n } else {\n *(s32 *)(a0 + 0x14) = 0x12C;\n }\n }\n *(s16 *)(a0 + 0x28) = func_80012F74(*(s16 *)(a0 + 0x28), *(s16 *)(a0 + 0x2E), 4, 1);\n lim = -0x180;\n if (lim < sp10.v[0]) {\n sp10.v[0] = lim;\n }\n lim = -0x380;\n if (lim < sp10.v[1]) {\n sp10.v[1] = lim;\n }\n func_8017F918(a0, sp10.v);\n}\n", "after_text": "void func_8017F498(s32 a0) {\n\n extern s16 D_8018F0B0[];\n extern Blk8_80126940_8017D6D0_8017F498 D_80126940;\n Blk8_80126940_8017D6D0_8017F498 sp10;\n u8 t;\n s16 lim;\n\n if (func_80148800(&D_80126B58) & 3) {\n t = (*(u8 *)(a0 + 5) + 1) & 1;\n *(u8 *)(a0 + 5) = t;\n }\n sp10 = D_80126940;\n if (sp10.v[0] < -0x3C0) {\n lim = -0x540;\n if (sp10.v[0] < -0x540) {\n sp10.v[0] = lim;\n }\n *(s16 *)(a0 + 0x2E) = 0;\n *(s32 *)(a0 + 0x14) = D_8018F0B0[*(u8 *)(a0 + 5)];\n } else {\n if (sp10.v[2] >= 0x1081) {\n s16 mid = -0x300;\n if (sp10.v[0] < mid) {\n *(s16 *)(a0 + 0x2E) = mid - sp10.v[0];\n } else {\n *(s16 *)(a0 + 0x2E) = 0;\n }\n } else {\n s16 mid = -0x340;\n if (sp10.v[0] < mid) {\n *(s16 *)(a0 + 0x2E) = mid - sp10.v[0];\n } else {\n *(s16 *)(a0 + 0x2E) = 0;\n }\n }\n if (sp10.v[2] >= 0x1241) {\n *(s32 *)(a0 + 0x14) = D_8018F0B0[*(u8 *)(a0 + 5)];\n } else {\n *(s32 *)(a0 + 0x14) = 0x12C;\n }\n }\n *(s16 *)(a0 + 0x28) = func_80012F74(*(s16 *)(a0 + 0x28), *(s16 *)(a0 + 0x2E), 4, 1);\n lim = -0x180;\n if (lim < sp10.v[0]) {\n sp10.v[0] = lim;\n }\n lim = -0x380;\n if (lim < sp10.v[1]) {\n sp10.v[1] = lim;\n }\n func_8017F918(a0, sp10.v);\n}\n"}
|
||||
|
||||
@@ -3390,7 +3390,6 @@ void func_8017F498(s32 a0) {
|
||||
Blk8_80126940_8017D6D0_8017F498 sp10;
|
||||
u8 t;
|
||||
s16 lim;
|
||||
register s16 mid __asm__("$5"); // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
|
||||
if (func_80148800(&D_80126B58) & 3) {
|
||||
t = (*(u8 *)(a0 + 5) + 1) & 1;
|
||||
@@ -3406,21 +3405,20 @@ void func_8017F498(s32 a0) {
|
||||
*(s32 *)(a0 + 0x14) = D_8018F0B0[*(u8 *)(a0 + 5)];
|
||||
} else {
|
||||
if (sp10.v[2] >= 0x1081) {
|
||||
mid = -0x300;
|
||||
s16 mid = -0x300;
|
||||
if (sp10.v[0] < mid) {
|
||||
*(s16 *)(a0 + 0x2E) = mid - sp10.v[0];
|
||||
} else {
|
||||
*(s16 *)(a0 + 0x2E) = 0;
|
||||
}
|
||||
} else {
|
||||
mid = -0x340;
|
||||
s16 mid = -0x340;
|
||||
if (sp10.v[0] < mid) {
|
||||
*(s16 *)(a0 + 0x2E) = mid - sp10.v[0];
|
||||
} else {
|
||||
*(s16 *)(a0 + 0x2E) = 0;
|
||||
}
|
||||
}
|
||||
__asm__ __volatile__("" :: "r"(mid)); /* zero-byte: keep $a1 live past the subu */ // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus9)
|
||||
if (sp10.v[2] >= 0x1241) {
|
||||
*(s32 *)(a0 + 0x14) = D_8018F0B0[*(u8 *)(a0 + 5)];
|
||||
} else {
|
||||
|
||||
Reference in New Issue
Block a user