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refactor(main): convert the last 9 DECOMPILE-NOW verbatim bodies to stubs

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The 9 SDK functions the verbatim manifest marks DECOMPILE-NOW in src/800c3.c
and src/800c2_2.c were §265 verbatim __asm__ blocks: byte-identical by
construction, undecompiled, and unreachable by every gate in the project,
which splices a draft in place of an INCLUDE_ASM line these did not have.
splat also stops emitting <fn>.s for them, so they had no target asm to
match against either. Byte-neutral: main still builds 143dbb89.

verbatim_to_stub refused three of them — src/800c2_2.c has no sibling
INCLUDE_ASM to copy the subdir spelling from, and all three of its remaining
functions are verbatim, so the file can never grow the sibling the rule
wants. The tool that exists to reach unreachable functions could not reach
them. It now DERIVES the spelling and proves it: the prefix from this
binary's other TUs, the last component from the file stem, which must appear
as a "c" segment in the binary's own splat config — the same file that
decides where splat writes the .s. Still refuses when either half is
unproven; --asm-subdir is the explicit override.

The S75 checkpoint recorded this group as "20 of 21 banked, one bisection";
counted from src/, it is 9 outstanding, corroborated by an independent count
from config/verbatim_manifest.json.
This commit is contained in:
Drew T
2026-09-03 13:04:57 -06:00
parent 08d49c1715
commit 9992cab319
3 changed files with 44 additions and 745 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/800c2_2.c
+3 -138
View File
@@ -24,106 +24,10 @@ s32 func_80062394(void)
return D_80072A24;
}
__asm__(
".text\n"
".align 2\n"
".globl func_800623A4\n"
".ent\tfunc_800623A4\n"
"func_800623A4:\n"
".frame $sp,40,$31\n"
".mask 0x001F0000,-16\n"
".fmask 0,0\n"
".set\tnoreorder\n"
"addiu $sp, $sp, -40\n"
"sw $s0, 16($sp)\n"
"addu $s0, $a0, $zero\n"
"sw $s1, 20($sp)\n"
"addu $s1, $a1, $zero\n"
"sw $s2, 24($sp)\n"
"addu $s2, $a2, $zero\n"
"sw $s3, 28($sp)\n"
"sw $ra, 32($sp)\n"
"jal func_80062768\n"
"addu $s3, $a3, $zero\n"
"jal func_8005CF08\n"
"nop\n"
"jal func_800626F0\n"
"nop\n"
"jal func_8005CF18\n"
"nop\n"
"jal ChangeClearPAD\n"
"addu $a0, $zero, $zero\n"
"jal func_8006252C\n"
"nop\n"
"addu $a0, $s0, $zero\n"
"addu $a1, $s1, $zero\n"
"addu $a2, $s2, $zero\n"
"jal PAD_init2\n"
"addu $a3, $s3, $zero\n"
"addiu $v0, $zero, 1\n"
"lui $at, %hi(D_80072A24)\n"
"sw $v0, %lo(D_80072A24)($at)\n"
"lw $ra, 32($sp)\n"
"lw $s3, 28($sp)\n"
"lw $s2, 24($sp)\n"
"lw $s1, 20($sp)\n"
"lw $s0, 16($sp)\n"
"jr $ra\n"
"addiu $sp, $sp, 40\n"
".set\treorder\n"
".end\tfunc_800623A4\n"
);
INCLUDE_ASM("asm/nonmatchings/800c2_2", func_800623A4);
__asm__(
".text\n"
".align 2\n"
".globl func_80062434\n"
".ent\tfunc_80062434\n"
"func_80062434:\n"
".frame $sp,40,$31\n"
".mask 0x001F0000,-16\n"
".fmask 0,0\n"
".set\tnoreorder\n"
"addiu $sp, $sp, -40\n"
"sw $s0, 16($sp)\n"
"addu $s0, $a0, $zero\n"
"sw $s1, 20($sp)\n"
"addu $s1, $a1, $zero\n"
"sw $s2, 24($sp)\n"
"addu $s2, $a2, $zero\n"
"sw $s3, 28($sp)\n"
"sw $ra, 32($sp)\n"
"jal func_80062768\n"
"addu $s3, $a3, $zero\n"
"jal func_8005CF08\n"
"nop\n"
"jal func_800626F0\n"
"nop\n"
"jal func_8005CF18\n"
"nop\n"
"jal ChangeClearPAD\n"
"addu $a0, $zero, $zero\n"
"jal func_8006252C\n"
"nop\n"
"addu $a0, $s0, $zero\n"
"addu $a1, $s1, $zero\n"
"addu $a2, $s2, $zero\n"
"jal InitPAD2\n"
"addu $a3, $s3, $zero\n"
"addiu $v0, $zero, 1\n"
"lui $at, %hi(D_80072A24)\n"
"sw $v0, %lo(D_80072A24)($at)\n"
"lw $ra, 32($sp)\n"
"lw $s3, 28($sp)\n"
"lw $s2, 24($sp)\n"
"lw $s1, 20($sp)\n"
"lw $s0, 16($sp)\n"
"jr $ra\n"
"addiu $sp, $sp, 40\n"
".set\treorder\n"
".end\tfunc_80062434\n"
);
INCLUDE_ASM("asm/nonmatchings/800c2_2", func_80062434);
extern void StartPAD2(void);
extern s32 ChangeClearPAD(s32 mode);
@@ -150,46 +54,7 @@ void func_800624F4(void)
D_80072A24 = 0;
}
__asm__(
".text\n"
".align\t2\n"
".globl\tfunc_8006252C\n"
".ent\tfunc_8006252C\n"
"func_8006252C:\n"
".set\tnoreorder\n"
"addiu\t$sp, $sp, -24\n"
"sw\t$ra, 20($sp)\n"
"jal\tfunc_8005CF08\n"
"sw\t$s0, 16($sp)\n"
"li\t$a0, 1\n"
"lui\t$v1, %hi(D_80078D0C)\n"
"addiu\t$v1, $v1, %lo(D_80078D0C)\n"
"addiu\t$s0, $v1, -4\n"
"lui\t$v0, %hi(func_800625DC)\n"
"addiu\t$v0, $v0, %lo(func_800625DC)\n"
"sw\t$v0, 0($v1)\n"
"lui\t$v0, %hi(func_80062644)\n"
"addiu\t$v0, $v0, %lo(func_80062644)\n"
"sw\t$v0, 4($v1)\n"
"lui\t$at, %hi(D_80078D08)\n"
"sw\t$zero, %lo(D_80078D08)($at)\n"
"lui\t$at, %hi(D_80078D14)\n"
"sw\t$zero, %lo(D_80078D14)($at)\n"
"jal\tSysDeqIntRP\n"
"addu\t$a1, $s0, $zero\n"
"li\t$a0, 1\n"
"jal\tSysEnqIntRP\n"
"addu\t$a1, $s0, $zero\n"
"jal\tfunc_8005CF18\n"
"nop\n"
"li\t$v0, 1\n"
"lw\t$ra, 20($sp)\n"
"lw\t$s0, 16($sp)\n"
"jr\t$ra\n"
"addiu\t$sp, $sp, 24\n"
".set\treorder\n"
".end\tfunc_8006252C\n"
);
INCLUDE_ASM("asm/nonmatchings/800c2_2", func_8006252C);
extern void func_8005CF08(void);
extern void func_8005CF18(void);
src/800c3.c
+6 -602
View File
@@ -299,23 +299,7 @@ s32 StartRCnt(s32 spec) {
return t < 3;
}
__asm__(".text\n.align 2\n.globl StopRCnt\n.ent\tStopRCnt\n"
"StopRCnt:\n.frame $sp,0,$31\n"
".set\tnoreorder\n"
"andi $a0, $a0, 65535\n"
"sll $a0, $a0, 2\n"
"lui $a1, %hi(D_80072934)\n"
"lw $a1, %lo(D_80072934)($a1)\n"
"lui $v0, %hi(D_8007293C)\n"
"addu $v0, $v0, $a0\n"
"lw $v0, %lo(D_8007293C)($v0)\n"
"lw $v1, 4($a1)\n"
"nor $v0, $zero, $v0\n"
"and $v1, $v1, $v0\n"
"addiu $v0, $zero, 1\n"
"jr $ra\n"
"sw $v1, 4($a1)\n"
".set\treorder\n.end\tStopRCnt\n");
INCLUDE_ASM("asm/nonmatchings/800c3", StopRCnt);
extern u32 D_80072938;
@@ -1561,31 +1545,7 @@ void func_8005EAA8(void *arg0, s32 arg1) {
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005EAC8);
__asm__(
".text\n"
".align\t2\n"
".globl\tfunc_8005EAE8\n"
".ent\tfunc_8005EAE8\n"
"func_8005EAE8:\n"
".set\tnoreorder\n"
"addiu $sp, $sp, -24\n"
"sw $s0, 16($sp)\n"
"lui $v0, %hi(D_80072974)\n"
"lw $v0, %lo(D_80072974)($v0)\n"
"sw $ra, 20($sp)\n"
"jalr $v0\n"
"addu $s0, $a0, $zero\n"
"addu $a0, $s0, $zero\n"
"lui $at, %hi(D_800729DC)\n"
"sw $v0, %lo(D_800729DC)($at)\n"
"jal func_8005DCA0\n"
"addiu $a1, $zero, -2\n"
"lw $ra, 20($sp)\n"
"lw $s0, 16($sp)\n"
"jr $ra\n"
"addiu $sp, $sp, 24\n"
".set\treorder\n"
".end\tfunc_8005EAE8\n");
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005EAE8);
/*
* func_8005EB28 -- the target's epilogue restores TWO callee-saved registers
@@ -1617,68 +1577,7 @@ __asm__(
* it through untouched. See src/md_MAIN_003/md_MAIN_003.c:524 (func_800D0440)
* for the precedent this follows.
*/
__asm__(".text\n.align 2\n.globl func_8005EB28\n.ent\tfunc_8005EB28\n"
"func_8005EB28:\n.frame $sp,24,$31\n.mask 0x80010000,-4\n.fmask 0,0\n"
".set\tnoreorder\n"
"lui $v1, %hi(D_8007299C)\n"
"lw $v1, %lo(D_8007299C)($v1)\n"
"lui $v0, %hi(D_800729AC)\n"
"lw $v0, %lo(D_800729AC)($v0)\n"
"addiu $sp, $sp, -24\n"
"sw $s0, 16($sp)\n"
"addu $s0, $a0, $zero\n"
"bne $v1, $v0, .L8005EB88\n"
" sw $ra, 20($sp)\n"
"lui $v0, %hi(D_80072998)\n"
"lw $v0, %lo(D_80072998)($v0)\n"
"nop\n"
"beqz $v0, .L8005EB88\n"
" nop\n"
"lui $v0, %hi(D_8007298C)\n"
"lw $v0, %lo(D_8007298C)($v0)\n"
"nop\n"
"jalr $v0\n"
" nop\n"
"lui $v0, %hi(D_80072988)\n"
"lw $v0, %lo(D_80072988)($v0)\n"
"nop\n"
"jalr $v0\n"
" nop\n"
".L8005EB88:\n"
"lui $v0, %hi(D_800729DC)\n"
"lw $v0, %lo(D_800729DC)($v0)\n"
"nop\n"
"beqz $v0, .L8005EBCC\n"
" nop\n"
"lw $a0, 12($s0)\n"
"lui $v0, %hi(D_80072974)\n"
"lw $v0, %lo(D_80072974)($v0)\n"
"nop\n"
"jalr $v0\n"
" nop\n"
"lw $a0, 12($s0)\n"
"lui $v0, %hi(D_80072974)\n"
"lw $v0, %lo(D_80072974)($v0)\n"
"nop\n"
"jalr $v0\n"
" addiu $a0, $a0, 240\n"
".L8005EBCC:\n"
"lbu $v0, 54($s0)\n"
"nop\n"
"bnez $v0, .L8005EBE4\n"
" addu $a0, $s0, $zero\n"
"j .L8005EBE8\n"
" addiu $a1, $zero, 66\n"
".L8005EBE4:\n"
"lbu $a1, 54($s0)\n"
".L8005EBE8:\n"
"jal func_8005DE78\n"
" nop\n"
"lw $ra, 20($sp)\n"
"lw $s0, 16($sp)\n"
"jr $ra\n"
" addiu $sp, $sp, 24\n"
".set\treorder\n.end\tfunc_8005EB28\n");
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005EB28);
/*
* func_8005EC00 -- same wall as func_8005EB28 (src/800c3.c:1338): the target
@@ -1758,62 +1657,7 @@ __asm__(".text\n.align 2\n.globl func_8005EB28\n.ent\tfunc_8005EB28\n"
* return 0;
* }
*/
__asm__(".text\n.align 2\n.globl func_8005EC00\n.ent\tfunc_8005EC00\n"
"func_8005EC00:\n.frame $sp,24,$31\n.mask 0x80010000,-4\n.fmask 0,0\n"
".set\tnoreorder\n"
"lui $v0, %hi(D_800729DC)\n"
"lw $v0, %lo(D_800729DC)($v0)\n"
"addiu $sp, $sp, -24\n"
"sw $s0, 16($sp)\n"
"addu $s0, $a0, $zero\n"
"beqz $v0, .L8005EC4C\n"
" sw $ra, 20($sp)\n"
"lw $a0, 12($s0)\n"
"lui $v0, %hi(D_80072974)\n"
"lw $v0, %lo(D_80072974)($v0)\n"
"nop\n"
"jalr $v0\n"
" addiu $a0, $a0, 480\n"
"lw $a0, 12($s0)\n"
"lui $v0, %hi(D_80072974)\n"
"lw $v0, %lo(D_80072974)($v0)\n"
"nop\n"
"jalr $v0\n"
" addiu $a0, $a0, 720\n"
".L8005EC4C:\n"
"lbu $v0, 54($s0)\n"
"nop\n"
"bnez $v0, .L8005EC64\n"
" addu $a1, $zero, $zero\n"
"lui $a1, %hi(D_800729A8)\n"
"lw $a1, %lo(D_800729A8)($a1)\n"
".L8005EC64:\n"
"jal func_8005DE78\n"
" addu $a0, $s0, $zero\n"
"addu $v1, $v0, $zero\n"
"bltz $v1, .L8005ECB0\n"
" nop\n"
"andi $v0, $v1, 240\n"
"bnez $v0, .L8005EC8C\n"
" andi $v0, $v1, 15\n"
"j .L8005ECB0\n"
" addiu $v0, $zero, -9\n"
".L8005EC8C:\n"
"sll $v0, $v0, 1\n"
"lui $at, %hi(D_800729D4)\n"
"sw $v0, %lo(D_800729D4)($at)\n"
"bnez $v0, .L8005ECB0\n"
" addu $v0, $zero, $zero\n"
"addiu $v0, $zero, 32\n"
"lui $at, %hi(D_800729D4)\n"
"sw $v0, %lo(D_800729D4)($at)\n"
"addu $v0, $zero, $zero\n"
".L8005ECB0:\n"
"lw $ra, 20($sp)\n"
"lw $s0, 16($sp)\n"
"jr $ra\n"
" addiu $sp, $sp, 24\n"
".set\treorder\n.end\tfunc_8005EC00\n");
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005EC00);
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005ECC0);
@@ -1827,258 +1671,7 @@ INCLUDE_ASM("asm/nonmatchings/800c3", func_8005ECC0);
* Byte-equivalent to the INCLUDE_ASM stub by construction; the function is NOT
* decompiled (§265 ACCOUNTING). Immediates/offsets are decimal for maspsx (§383).
*/
__asm__(
".text\n"
".align\t2\n"
".globl\tfunc_8005ED4C\n"
".ent\tfunc_8005ED4C\n"
"func_8005ED4C:\n"
".frame\t$sp,48,$31\n"
".mask\t0x803F0000,-4\n"
".fmask\t0,0\n"
".set\tnoreorder\n"
"addiu $sp,$sp,-48\n"
"sw $s1,20($sp)\n"
"addu $s1,$a0,$zero\n"
"lui $v0,%hi(D_80072968)\n"
"lw $v0,%lo(D_80072968)($v0)\n"
"sw $ra,40($sp)\n"
"sw $s5,36($sp)\n"
"sw $s4,32($sp)\n"
"sw $s3,28($sp)\n"
"sw $s2,24($sp)\n"
"jalr $v0\n"
" sw $s0,16($sp)\n"
"lui $v0,%hi(D_800729A8)\n"
"lw $v0,%lo(D_800729A8)($v0)\n"
"nop\n"
"beqz $v0,.L8005EDB8\n"
" addu $s4,$zero,$zero\n"
"lw $v0,60($s1)\n"
"nop\n"
"lbu $v0,0($v0)\n"
"addiu $v1,$zero,8\n"
"sra $v0,$v0,4\n"
"bne $v0,$v1,.L8005EDB8\n"
" nop\n"
"lbu $v0,54($s1)\n"
"nop\n"
"sltiu $s4,$v0,1\n"
".L8005EDB8:\n"
"beqz $s4,.L8005EE54\n"
" nop\n"
"addiu $s0,$zero,-1\n"
"addiu $s2,$zero,-240\n"
".L8005EDC8:\n"
"lui $v0,%hi(D_800729D4)\n"
"lw $v0,%lo(D_800729D4)($v0)\n"
"nop\n"
"addiu $v0,$v0,-1\n"
"lui $at,%hi(D_800729D4)\n"
"blez $v0,.L8005EE54\n"
" sw $v0,%lo(D_800729D4)($at)\n"
"bltz $s0,.L8005EE04\n"
" nop\n"
"lw $a0,12($s1)\n"
"lui $v0,%hi(D_80072968)\n"
"lw $v0,%lo(D_80072968)($v0)\n"
"nop\n"
"jalr $v0\n"
" addu $a0,$a0,$s2\n"
".L8005EE04:\n"
"addu $a0,$s1,$zero\n"
"lui $v0,%hi(D_80072964)\n"
"lw $v0,%lo(D_80072964)($v0)\n"
"nop\n"
"jalr $v0\n"
" addiu $a1,$zero,1\n"
"addu $a0,$s1,$zero\n"
"jal func_8005DE78\n"
" andi $a1,$v0,255\n"
"bltz $v0,.L8005F0A4\n"
" nop\n"
"jal func_8005FBA8\n"
" addiu $a0,$zero,60\n"
"jal func_8005E0AC\n"
" nop\n"
"beqz $v0,.L8005EFC8\n"
" addiu $s0,$s0,1\n"
"slti $v0,$s0,4\n"
"bnez $v0,.L8005EDC8\n"
" addiu $s2,$s2,240\n"
".L8005EE54:\n"
"lui $v1,%hi(D_8007299C)\n"
"lw $v1,%lo(D_8007299C)($v1)\n"
"lui $v0,%hi(D_800729D4)\n"
"lw $v0,%lo(D_800729D4)($v0)\n"
"nop\n"
"slti $v0,$v0,2\n"
"bnez $v0,.L8005F040\n"
" sltiu $a0,$v1,1\n"
"lui $v1,%hi(D_800729B4)\n"
"addiu $v1,$v1,%lo(D_800729B4)\n"
"sll $v0,$a0,2\n"
"addu $s0,$v0,$v1\n"
"sll $v0,$a0,4\n"
"subu $v0,$v0,$a0\n"
"sll $s2,$v0,4\n"
"addiu $s5,$zero,3\n"
".L8005EE94:\n"
"lw $a0,0($s0)\n"
"nop\n"
"bltz $a0,.L8005F040\n"
" nop\n"
"blez $a0,.L8005EEE0\n"
" sll $v0,$a0,4\n"
"lui $v1,%hi(D_80072990)\n"
"lw $v1,%lo(D_80072990)($v1)\n"
"subu $v0,$v0,$a0\n"
"addu $v1,$s2,$v1\n"
"lw $v1,12($v1)\n"
"sll $v0,$v0,4\n"
"addu $v1,$v1,$v0\n"
"addiu $s3,$v1,-240\n"
"lui $v0,%hi(D_8007297C)\n"
"lw $v0,%lo(D_8007297C)($v0)\n"
"nop\n"
"jalr $v0\n"
" addu $a0,$s3,$zero\n"
".L8005EEE0:\n"
"lw $v1,0($s0)\n"
"nop\n"
"beq $v1,$s5,.L8005EF28\n"
" nop\n"
"slti $v0,$v1,4\n"
"beqz $v0,.L8005EF14\n"
" slti $v0,$v1,2\n"
"beqz $v0,.L8005EF88\n"
" addu $a0,$s1,$zero\n"
"bltz $v1,.L8005EF88\n"
" nop\n"
"j .L8005EF44\n"
" nop\n"
".L8005EF14:\n"
"addiu $v0,$zero,4\n"
"bne $v1,$v0,.L8005EF88\n"
" addu $a0,$s1,$zero\n"
"j .L8005EF88\n"
" sw $s5,0($s0)\n"
".L8005EF28:\n"
"lui $v0,%hi(D_8007297C)\n"
"lw $v0,%lo(D_8007297C)($v0)\n"
"nop\n"
"jalr $v0\n"
" addiu $a0,$s3,-240\n"
"j .L8005EF80\n"
" addiu $v0,$zero,1\n"
".L8005EF44:\n"
"lui $v0,%hi(D_80072990)\n"
"lw $v0,%lo(D_80072990)($v0)\n"
"nop\n"
"addu $s3,$v0,$s2\n"
"lui $v0,%hi(D_8007297C)\n"
"lw $v0,%lo(D_8007297C)($v0)\n"
"nop\n"
"jalr $v0\n"
" addu $a0,$s3,$zero\n"
"lui $v0,%hi(D_80072980)\n"
"lw $v0,%lo(D_80072980)($v0)\n"
"nop\n"
"jalr $v0\n"
" addu $a0,$s3,$zero\n"
"addiu $v0,$zero,-1\n"
".L8005EF80:\n"
"sw $v0,0($s0)\n"
"addu $a0,$s1,$zero\n"
".L8005EF88:\n"
"lui $v0,%hi(D_80072964)\n"
"lw $v0,%lo(D_80072964)($v0)\n"
"nop\n"
"jalr $v0\n"
" addu $a1,$s4,$zero\n"
"addu $a0,$s1,$zero\n"
"jal func_8005DCA0\n"
" andi $a1,$v0,255\n"
"bltz $v0,.L8005F0A4\n"
" nop\n"
"jal func_8005FBA8\n"
" addiu $a0,$zero,60\n"
"jal func_8005E0AC\n"
" nop\n"
"bnez $v0,.L8005EFD0\n"
" nop\n"
".L8005EFC8:\n"
"j .L8005F0A4\n"
" addiu $v0,$zero,-3\n"
".L8005EFD0:\n"
"lui $v0,%hi(D_800729D4)\n"
"lw $v0,%lo(D_800729D4)($v0)\n"
"nop\n"
"addiu $v0,$v0,-1\n"
"lui $at,%hi(D_800729D4)\n"
"sw $v0,%lo(D_800729D4)($at)\n"
"slti $v0,$v0,2\n"
"beqz $v0,.L8005EE94\n"
" nop\n"
"j .L8005F040\n"
" nop\n"
".L8005EFFC:\n"
"addu $a0,$s1,$zero\n"
"lui $v0,%hi(D_80072964)\n"
"lw $v0,%lo(D_80072964)($v0)\n"
"nop\n"
"jalr $v0\n"
" addu $a1,$s4,$zero\n"
"addu $a0,$s1,$zero\n"
"jal func_8005DCA0\n"
" andi $a1,$v0,255\n"
"bltz $v0,.L8005F0A4\n"
" nop\n"
"jal func_8005FBA8\n"
" addiu $a0,$zero,60\n"
"jal func_8005E0AC\n"
" nop\n"
"beqz $v0,.L8005F0A4\n"
" addiu $v0,$zero,-3\n"
".L8005F040:\n"
"lui $v0,%hi(D_800729D4)\n"
"lw $v0,%lo(D_800729D4)($v0)\n"
"nop\n"
"addiu $v0,$v0,-1\n"
"lui $at,%hi(D_800729D4)\n"
"bgtz $v0,.L8005EFFC\n"
" sw $v0,%lo(D_800729D4)($at)\n"
"jal func_8005E13C\n"
" nop\n"
"lbu $v1,68($s1)\n"
"nop\n"
"addiu $v0,$v1,1\n"
"sb $v0,68($s1)\n"
"lui $v0,%hi(D_800729D8)\n"
"lw $v0,%lo(D_800729D8)($v0)\n"
"lw $a0,60($s1)\n"
"lbu $v0,0($v0)\n"
"addu $v1,$v1,$a0\n"
"sb $v0,0($v1)\n"
"lui $v0,%hi(D_8007295C)\n"
"lw $v0,%lo(D_8007295C)($v0)\n"
"nop\n"
"jalr $v0\n"
" addu $a0,$zero,$zero\n"
"addu $v0,$zero,$zero\n"
".L8005F0A4:\n"
"lw $ra,40($sp)\n"
"lw $s5,36($sp)\n"
"lw $s4,32($sp)\n"
"lw $s3,28($sp)\n"
"lw $s2,24($sp)\n"
"lw $s1,20($sp)\n"
"lw $s0,16($sp)\n"
"jr $ra\n"
" addiu $sp,$sp,48\n"
".set\treorder\n"
".end\tfunc_8005ED4C\n"
);
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005ED4C);
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005F0C8);
@@ -2161,196 +1754,7 @@ s32 func_8005F394(u8 *arg0) {
* Byte-equivalent to the INCLUDE_ASM stub by construction; the function is NOT
* decompiled (§265 ACCOUNTING). Immediates/offsets are decimal for maspsx (§383).
*/
__asm__(
".text\n"
".align\t2\n"
".globl\tfunc_8005F450\n"
".ent\tfunc_8005F450\n"
"func_8005F450:\n"
".frame\t$sp,24,$31\n"
".mask\t0x80010000,0\n"
".fmask\t0,0\n"
".set\tnoreorder\n"
"addiu $sp,$sp,-24\n"
"sw $s0,16($sp)\n"
"addu $s0,$a0,$zero\n"
"addiu $a0,$s0,87\n"
"sw $ra,20($sp)\n"
"jal func_8005C2C8\n"
" addiu $a1,$zero,6\n"
"lhu $v0,230($s0)\n"
"nop\n"
"beqz $v0,.L8005F5C8\n"
" nop\n"
"lw $v0,40($s0)\n"
"nop\n"
"beqz $v0,.L8005F5C8\n"
" nop\n"
"lbu $v0,52($s0)\n"
"nop\n"
"sltiu $v0,$v0,7\n"
"beqz $v0,.L8005F4A4\n"
" addiu $t1,$zero,6\n"
"lbu $t1,52($s0)\n"
".L8005F4A4:\n"
"lbu $v0,233($s0)\n"
"nop\n"
"beqz $v0,.L8005F6BC\n"
" addu $t0,$zero,$zero\n"
"addiu $t3,$zero,1\n"
"addu $t2,$zero,$zero\n"
".L8005F4BC:\n"
"lw $v0,4($s0)\n"
"addu $a2,$zero,$zero\n"
"addu $v0,$t2,$v0\n"
"lbu $v0,2($v0)\n"
"nop\n"
"beqz $v0,.L8005F4DC\n"
" addiu $a3,$zero,1\n"
"addiu $a3,$zero,255\n"
".L8005F4DC:\n"
"addiu $a1,$s0,93\n"
"lw $a0,40($s0)\n"
"beqz $t1,.L8005F524\n"
" addu $v1,$zero,$zero\n"
".L8005F4EC:\n"
"lbu $v0,0($a1)\n"
"nop\n"
"bne $v0,$t0,.L8005F510\n"
" nop\n"
"lbu $v0,0($a0)\n"
"nop\n"
"and $v0,$v0,$a3\n"
"bnez $v0,.L8005F564\n"
" nop\n"
".L8005F510:\n"
"addiu $a1,$a1,1\n"
"addiu $v1,$v1,1\n"
"slt $v0,$v1,$t1\n"
"bnez $v0,.L8005F4EC\n"
" addiu $a0,$a0,1\n"
".L8005F524:\n"
"beqz $a2,.L8005F5AC\n"
" nop\n"
"lw $v0,4($s0)\n"
"nop\n"
"addu $v0,$t2,$v0\n"
"lbu $v1,3($v0)\n"
"lui $v0,%hi(D_800729A4)\n"
"lw $v0,%lo(D_800729A4)($v0)\n"
"nop\n"
"addu $v1,$v0,$v1\n"
"slti $v0,$v1,61\n"
"beqz $v0,.L8005F56C\n"
" nop\n"
"lui $at,%hi(D_800729A4)\n"
"j .L8005F570\n"
" sw $v1,%lo(D_800729A4)($at)\n"
".L8005F564:\n"
"j .L8005F524\n"
" addiu $a2,$zero,1\n"
".L8005F56C:\n"
"addu $a2,$zero,$zero\n"
".L8005F570:\n"
"beqz $a2,.L8005F5AC\n"
" nop\n"
"addiu $a1,$s0,93\n"
"addiu $a0,$s0,87\n"
"beqz $t1,.L8005F5AC\n"
" addu $v1,$zero,$zero\n"
".L8005F588:\n"
"lbu $v0,0($a1)\n"
"nop\n"
"bne $v0,$t0,.L8005F59C\n"
" addiu $a1,$a1,1\n"
"sb $t3,0($a0)\n"
".L8005F59C:\n"
"addiu $v1,$v1,1\n"
"slt $v0,$v1,$t1\n"
"bnez $v0,.L8005F588\n"
" addiu $a0,$a0,1\n"
".L8005F5AC:\n"
"lbu $v0,233($s0)\n"
"addiu $t0,$t0,1\n"
"slt $v0,$t0,$v0\n"
"bnez $v0,.L8005F4BC\n"
" addiu $t2,$t2,5\n"
"j .L8005F6BC\n"
" nop\n"
".L8005F5C8:\n"
"lbu $v1,232($s0)\n"
"nop\n"
"addiu $v0,$v1,-4\n"
"sltiu $v0,$v0,2\n"
"bnez $v0,.L8005F5E8\n"
" addiu $v0,$zero,7\n"
"bne $v1,$v0,.L8005F67C\n"
" nop\n"
".L8005F5E8:\n"
"lhu $v0,230($s0)\n"
"nop\n"
"bnez $v0,.L8005F67C\n"
" nop\n"
"lbu $v0,52($s0)\n"
"nop\n"
"sltiu $v0,$v0,2\n"
"bnez $v0,.L8005F67C\n"
" addiu $v1,$zero,64\n"
"lw $a0,40($s0)\n"
"nop\n"
"lbu $v0,0($a0)\n"
"nop\n"
"andi $v0,$v0,192\n"
"bne $v0,$v1,.L8005F6BC\n"
" nop\n"
"lbu $v0,1($a0)\n"
"nop\n"
"andi $v0,$v0,1\n"
"beqz $v0,.L8005F6BC\n"
" nop\n"
"lui $v0,%hi(D_800729A4)\n"
"lw $v0,%lo(D_800729A4)($v0)\n"
"nop\n"
"addiu $v0,$v0,10\n"
"slti $v0,$v0,61\n"
"beqz $v0,.L8005F6BC\n"
" addiu $v0,$zero,1\n"
"sb $v0,88($s0)\n"
"sb $v0,87($s0)\n"
"lui $v0,%hi(D_800729A4)\n"
"lw $v0,%lo(D_800729A4)($v0)\n"
"nop\n"
"addiu $v0,$v0,10\n"
"lui $at,%hi(D_800729A4)\n"
"j .L8005F6BC\n"
" sw $v0,%lo(D_800729A4)($at)\n"
".L8005F67C:\n"
"lbu $v1,232($s0)\n"
"addiu $v0,$zero,3\n"
"bne $v1,$v0,.L8005F694\n"
" addiu $v0,$zero,1\n"
"j .L8005F6BC\n"
" sb $v0,87($s0)\n"
".L8005F694:\n"
"lhu $v0,230($s0)\n"
"nop\n"
"bnez $v0,.L8005F6BC\n"
" addiu $v0,$zero,1\n"
"addiu $v1,$zero,5\n"
"addiu $a0,$s0,5\n"
".L8005F6AC:\n"
"sb $v0,87($a0)\n"
"addiu $v1,$v1,-1\n"
"bgez $v1,.L8005F6AC\n"
" addiu $a0,$a0,-1\n"
".L8005F6BC:\n"
"lw $ra,20($sp)\n"
"lw $s0,16($sp)\n"
"jr $ra\n"
" addiu $sp,$sp,24\n"
".set\treorder\n"
".end\tfunc_8005F450\n"
);
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005F450);
extern u8 D_80078A48;
tools/verbatim_to_stub.py
+35 -5
View File
@@ -76,6 +76,10 @@ def main():
ap.add_argument('--apply', action='store_true')
ap.add_argument('--gate', action='store_true', help='rebuild the binary and assert the SHA is unchanged')
ap.add_argument('--restore', help='restore a .bak written by --apply')
ap.add_argument('--asm-subdir',
help='the asm/... path the stub should name. Only needed when the TU has no '
'sibling INCLUDE_ASM AND the spelling cannot be derived from the binary\'s '
'splat config; you are asserting you verified it.')
a = ap.parse_args()
if a.restore:
@@ -126,11 +130,37 @@ def main():
# neighbouring file's spelling is a different subseg — using it would produce a stub that
# compiles and includes the WRONG function's asm).
sib = re.search(r'INCLUDE_ASM\("([^"]+)",\s*\w+\)', text)
if not sib:
sys.exit(f'verbatim_to_stub: {os.path.relpath(path, REPO)} has no sibling INCLUDE_ASM to copy '
f'the asm subdir spelling from — REFUSING to guess it (a wrong subdir silently '
f'includes another function\'s assembly)')
subdir = sib.group(1)
if sib:
subdir = sib.group(1)
elif a.asm_subdir:
subdir = a.asm_subdir
print(f'asm subdir: {subdir} (GIVEN on the command line, not derived)')
else:
# NO SIBLING IN THIS FILE. Refusing outright is right when the alternative is a GUESS, but
# it stranded a whole TU: src/800c2_2.c's three remaining functions are ALL verbatim, so it
# can never grow the sibling this rule wants, and the tool that exists to reach unreachable
# functions could not reach them (P31 S76). Derive it instead, and PROVE the derivation:
# * the PREFIX comes from how this binary's other TUs spell it (one distinct prefix, or
# we are back to guessing);
# * the LAST COMPONENT is this file's stem, which must appear as a `c` segment in the
# binary's own splat config — the same file that decides where splat writes the .s.
# A derivation checked against the generating invariant is not a guess (R33/R32).
stem = os.path.basename(path)[:-2]
prefixes = {os.path.dirname(v) for v in asm_subdir_for(a.binary, a.fn).values()}
yml = (os.path.join(REPO, 'config', 'splat.us.exe.yaml') if a.binary == 'main'
else os.path.join(REPO, 'config', f'splat.{a.binary}.yaml'))
seg_ok = (os.path.exists(yml)
and re.search(rf',\s*c,\s*{re.escape(stem)}\s*\]', open(yml).read()))
if len(prefixes) != 1 or not seg_ok:
sys.exit(f'verbatim_to_stub: {os.path.relpath(path, REPO)} has no sibling INCLUDE_ASM to '
f'copy the asm subdir spelling from, and it could not be DERIVED either '
f'(distinct prefixes in this binary: {sorted(prefixes) or "none"}; '
f'`, c, {stem}]` in {os.path.relpath(yml, REPO)}: {bool(seg_ok)}). REFUSING to '
f'guess it — a wrong subdir silently includes another function\'s assembly. '
f'Pass --asm-subdir if you have verified the spelling yourself.')
subdir = os.path.join(prefixes.pop(), stem)
print(f'asm subdir: {subdir} (DERIVED: prefix from this binary\'s other TUs, segment '
f'`{stem}` confirmed in {os.path.relpath(yml, REPO)})')
stub = f'INCLUDE_ASM("{subdir}", {a.fn});\n'
print(f'file : {os.path.relpath(path, REPO)}')