chore(decomp): commit in-tree banked work before the serial lane

This commit is contained in:
Drew T
2026-08-25 15:42:21 -06:00
parent 201015c0d1
commit bd50b9191c
19 changed files with 6498 additions and 93 deletions
+1 -1
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@@ -4405,7 +4405,7 @@ ov_SC06_022_ELF := $(ov_SC06_022_OUT).elf
ov_SC06_022_MAPFILE := $(ov_SC06_022_OUT).map
ov_SC06_022_LD_SCRIPT := $(ov_SC06_022_OUT).ld
ov_SC06_022_SPLAT_YAML := config/splat.ov_SC06_022.yaml
ov_SC06_022_JTBL_INTERLEAVE := --order tail.data.o,ov_SC06_022.o,ov_SC06_022_jr_8012ACE0.o,tail2.data.o,ov_SC06_022_jr_80135888.o,tail3.data.o,ov_SC06_022_jr_80135A4C.o,tail4.data.o,ov_SC06_022_jr_80135D20.o,tail5.data.o,ov_SC06_022_jr_801380E0.o,ov_SC06_022_o0c.o,tail6.data.o,ov_SC06_022_jr_8013F350.o,tail7.data.o,ov_SC06_022_jr_8013FFD8.o,tail8.data.o,ov_SC06_022_jr_80140608.o,tail9.data.o,ov_SC06_022_jr_8015444C.o,ov_SC06_022_jr_80154C24.o,ov_SC06_022_jr_801588CC.o,ov_SC06_022_jr_80159C84.o,tail10.data.o,ov_SC06_022_jr_8015A3C8.o,tail11.data.o,ov_SC06_022_jr_8015AE2C.o,tail12.data.o,ov_SC06_022_jr_8015C32C.o,tail13.data.o,ov_SC06_022_jr_8016AB6C.o,tail14.data.o,ov_SC06_022_jr_80171B4C.o,ov_SC06_022_jr_801734BC.o,tail15.data.o,ov_SC06_022_jr_801789AC.o,ov_SC06_022_jr_80178D40.o,tail16.data.o,ov_SC06_022_jr_8017A4AC.o,tail17.data.o,ov_SC06_022_jr_8017AE2C.o,ov_SC06_022_jr_8017BEBC.o,tail18.data.o,ov_SC06_022_jr_80180CD0.o,tail19.data.o,ov_SC06_022_jr_80182D08.o,ov_SC06_022_jr_80184304.o,ov_SC06_022_jr_80184A28.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
ov_SC06_022_JTBL_INTERLEAVE := --order tail.data.o,ov_SC06_022.o,ov_SC06_022_jr_8012ACE0.o,tail2.data.o,ov_SC06_022_jr_80135888.o,tail3.data.o,ov_SC06_022_jr_80135A4C.o,tail4.data.o,ov_SC06_022_jr_80135D20.o,tail5.data.o,ov_SC06_022_jr_801380E0.o,ov_SC06_022_o0c.o,tail6.data.o,ov_SC06_022_jr_8013F350.o,tail7.data.o,ov_SC06_022_jr_8013FFD8.o,tail8.data.o,ov_SC06_022_jr_80140608.o,tail9.data.o,ov_SC06_022_jr_8015444C.o,ov_SC06_022_jr_80154C24.o,ov_SC06_022_jr_801588CC.o,ov_SC06_022_jr_80159C84.o,tail10.data.o,ov_SC06_022_jr_8015A3C8.o,tail11.data.o,ov_SC06_022_jr_8015AE2C.o,tail12.data.o,ov_SC06_022_jr_8015C32C.o,tail13.data.o,ov_SC06_022_jr_8016AB6C.o,tail14.data.o,ov_SC06_022_jr_80171B4C.o,ov_SC06_022_jr_801734BC.o,tail15.data.o,ov_SC06_022_jr_801789AC.o,ov_SC06_022_jr_80178D40.o,tail16.data.o,ov_SC06_022_jr_8017A4AC.o,tail17.data.o,ov_SC06_022_jr_8017AE2C.o,ov_SC06_022_jr_8017BEBC.o,tail18.data.o,ov_SC06_022_jr_80180CD0.o,ov_SC06_022_jr_80182D08.o,ov_SC06_022_jr_80184304.o,ov_SC06_022_jr_80184A28.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
build/src/ov_SC06_022/ov_SC06_022.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
build/src/ov_SC06_022/ov_SC06_022_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
build/src/ov_SC06_022/ov_SC06_022_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
+2
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@@ -106,6 +106,7 @@ segments:
- [0x31390, c, ov_SC02_037_jr_801594E8]
- [0x31b2c, c, ov_SC02_037_jr_80159C84]
- [0x32270, c, ov_SC02_037_jr_8015A3C8]
- [0x42a14, c, ov_SC02_037_jr_8016AB6C]
- [0x42d04, c, ov_SC02_037_jr_8016AE5C]
- [0x499f4, c, ov_SC02_037_jr_80171B4C]
- [0x50854, c, ov_SC02_037_jr_801789AC]
@@ -131,6 +132,7 @@ segments:
- [0x9fc48, data, tail8]
- [0x9fc4c, .rodata, ov_SC02_037_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x9fcc8, data, tail9]
- [0x9fce0, .rodata, ov_SC02_037_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x9fd00, .rodata, ov_SC02_037_jr_8016AE5C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x9fd20, data, tail10]
- [0x9fd60, .rodata, ov_SC02_037_jr_80171B4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
+1 -1
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@@ -161,7 +161,7 @@ segments:
- [0xcdd44, .rodata, ov_SC03_006_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xcddd0, data, tail17]
- [0xcddd4, .rodata, ov_SC03_006_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xcde1c, data, tail18]
- [0xcdee4, data, tail18]
- [0xCF75C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
- [0xCF75F] # EOF marker = the 0.4.dec byte length
# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
+1
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@@ -121,6 +121,7 @@ segments:
- [0x52354, c, ov_SC06_030_jr_8017A4AC]
- [0x52cd4, c, ov_SC06_030_jr_8017AE2C]
- [0x54778, c, ov_SC06_030_jr_8017C8D0]
- [0x59928, c, ov_SC06_030_jr_80181A80]
- [0x59cb4, data, tail]
- [0x8f6ac, .rodata, ov_SC06_030] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x8f788, .rodata, ov_SC06_030_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
+123 -1
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@@ -64,6 +64,128 @@ void func_800CEF1C(void) {
}
INCLUDE_ASM("asm/md_MAIN_008/nonmatchings/md_MAIN_008", func_800CEF50);
void func_800CEF50(void) {
extern u8 D_800CF10C[3];
extern u8 D_800CF10F;
extern u32 D_800CF110;
extern u8 D_800CF114;
extern u8 D_800CF115;
extern u8 D_800CF116;
extern u8 D_800CF117;
extern s16 D_800CF118;
extern s16 D_800CF11A;
extern u8 D_800CF11C;
extern u8 D_800CF11D;
extern u16 D_800CF11E;
extern u16 D_800CF120;
extern u16 D_800CF122;
extern u8 D_800CF124[3];
extern u8 D_800CF127;
extern u32 D_800CF128;
extern u8 D_800CF12C;
extern u8 D_800CF12D;
extern u8 D_800CF12E;
extern u8 D_800CF12F;
extern u16 D_800CF130;
extern s16 D_800CF132;
extern u8 D_800CF134;
extern u8 D_800CF135;
extern u16 D_800CF136;
extern u16 D_800CF138;
extern u16 D_800CF13A;
extern s16 D_800B9A02;
extern u8 D_800AA60C[];
register s32 v __asm__("$2");
register s32 c __asm__("$3");
register u32 w __asm__("$4");
register s32 x78 __asm__("$6");
register s32 m __asm__("$7");
register s32 f __asm__("$8");
register s32 ten __asm__("$9");
register s32 neg __asm__("$10");
register s32 hundred __asm__("$11");
register s32 five __asm__("$12");
register s32 v2 __asm__("$13");
register u32 *p __asm__("$5");
register s32 pm __asm__("$5");
v = 0xE100008A;
v2 = 0xE100008C;
m = 0xFF0000;
__asm__("" : "=r"(m) : "0"(m));
five = 5;
__asm__("" : "=r"(five) : "0"(five));
p = (u32 *)&D_800CF10C;
m |= 0xFFFF;
D_800CF10F = five;
w = *p;
__asm__ volatile("" ::: "memory");
hundred = 100;
__asm__("" : "=r"(hundred) : "0"(hundred));
__asm__ volatile("" ::: "memory");
D_800CF110 = v;
v = -0xA0;
neg = -0x6E;
__asm__("" : "=r"(neg) : "0"(neg));
c = 0x80;
ten = 10;
__asm__("" : "=r"(ten) : "0"(ten));
D_800CF118 = v;
v = 0x100;
f = 0xF0;
D_800CF116 = c;
D_800CF115 = c;
D_800CF114 = c;
D_800CF12E = c;
D_800CF12D = c;
D_800CF12C = c;
c = (s32)&D_800B9A02;
c = *(u16 *)c;
x78 = 0x7800;
D_800CF120 = v;
v = 0x60;
D_800CF130 = v;
v = 0x40;
D_800CF122 = f;
D_800CF13A = f;
f = (s32)&D_800AA60C[0];
D_800CF11E = x78;
D_800CF136 = x78;
x78 = 0xFF000000;
D_800CF117 = hundred;
D_800CF11A = neg;
D_800CF11C = 0;
D_800CF11D = ten;
D_800CF127 = five;
D_800CF128 = v2;
D_800CF12F = hundred;
D_800CF132 = neg;
D_800CF134 = 0;
D_800CF135 = ten;
D_800CF138 = v;
c = (c << 14) + f;
v = *(u32 *)c;
*p = (w & x78) | (v & m);
v = *(u32 *)c;
__asm__("and %0,%1,%2" : "=r"(pm) : "r"(p), "r"(m));
v = (v & x78) | pm;
__asm__ volatile("" ::: "memory");
p = (u32 *)&D_800CF124;
*(u32 *)c = v;
c = (s32)&D_800B9A02;
c = *(u16 *)c;
w = *p;
c = (c << 14) + f;
v = *(u32 *)c;
*p = (w & x78) | (v & m);
v = *(u32 *)c;
__asm__("and %0,%1,%2" : "=r"(pm) : "r"(p), "r"(m));
v = (v & x78) | pm;
*(u32 *)c = v;
}
INCLUDE_RODATA("asm/md_MAIN_008/nonmatchings/md_MAIN_008", D_800CEDF8);
+7 -1
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@@ -223,7 +223,13 @@ void func_800CB5D4(void) {
}
INCLUDE_ASM("asm/md_MAIN_026/nonmatchings/md_MAIN_026", func_800CB5F4);
void func_800CB5F4(s32 a0) {
extern void func_80146EC0(s32 a0, s32 a1, s32 a2, s32 a3);
extern void (*D_800CBB38[])(void);
extern u8 D_800CBB40;
func_80146EC0(*(s32 *)(a0 + 0x4C), a0 + 4, (s32)&D_800CBB40, (s32)&D_800CBB38);
}
extern void func_800CB8A4(void);
+33 -1
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@@ -486,7 +486,39 @@ void func_800CBECC(int param_1)
}
INCLUDE_ASM("asm/md_MAIN_027/nonmatchings/md_MAIN_027", func_800CBF28);
extern u32 D_800CC250;
extern u32 D_800CC254;
extern s32 func_80146578(void);
extern void func_8001CD04(s32, s32);
extern void func_800233CC(s32, s32);
extern void func_800CC024();
void func_800CBF28(s32 p1)
{
s32 v0;
s32 r;
register s32 base __asm__("$17"); /* $s1 */
v0 = ((s32 (*)(void))func_80146578)();
base = (s32)&D_800CC250;
__asm__("" : "=r"(r) : "0"(v0));
*(s32 *)(p1 + 0x20) = v0;
if (v0 != 0) {
func_8001CD04(v0, base);
if (*(s32 *)(p1 + 0x50) == 0) {
func_800233CC(base, 0x20);
D_800CC254 = 0;
*(u32 *)base = 0x202000;
}
*(s16 *)(p1 + 0x60) = 0;
*(u32 *)(r + 4) |= 0x50000000;
func_800CC024(p1);
func_80146CA0((void *)p1);
} else {
func_800CC004(p1);
}
}
extern void func_800CC024(void);
void func_800CBFE4(void) {
@@ -9059,6 +9059,3 @@ void func_8016AB30(void *a0) {
extern void (*D_80186D78[])(void);
D_80186D78[*(u16 *)((s32)a0 + 0x2)]();
}
INCLUDE_ASM("asm/ov_SC02_037/nonmatchings/ov_SC02_037_jr_8015A3C8", func_8016AB6C);
File diff suppressed because it is too large Load Diff
+137 -2
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@@ -5764,7 +5764,41 @@ void func_8017F2D0(s32 p) {
}
INCLUDE_ASM("asm/ov_SC03_006/nonmatchings/ov_SC03_006_jr_8017AE2C", func_8017F394);
void func_8017F394(void *a0) {
extern s32 func_80146E98(s32 a0);
extern void func_80162CCC(void);
register s32 s1 __asm__("$17") = (s32)a0;
register u16 *s2 __asm__("$18");
register u16 *s0 __asm__("$16");
s2 = *(u16 **)(s1 + 0x4C);
s0 = *(u16 **)(s1 + 0x20);
if (func_80146E98((s32)a0)) {
{
s16 t = *(u16 *)(s0 + 0xE) + 0x400;
*(u16 *)(s0 + 0xE) = t;
*(u16 *)(s0 + 0xC) = t;
if (t >= 0x7001) {
*(u16 *)(s0 + 0xE) = 0x7000;
*(u16 *)(s0 + 0xC) = 0x7000;
}
}
{
s16 u = *(u16 *)(s0 + 0xD) + 0x100;
*(u16 *)(s0 + 0xD) = u;
if (u >= 0x7001) {
*(u16 *)(s0 + 0xD) = 0x7000;
}
}
}
if (*(u16 *)s2 != 0x16) {
((void (*)(s32))func_80162CCC)((s32)s1);
}
}
void func_8017F454(s32 param_1) {
s32 tbl;
@@ -11485,7 +11519,108 @@ L9F0:
}
INCLUDE_ASM("asm/ov_SC03_006/nonmatchings/ov_SC03_006_jr_8017AE2C", func_80188410);
#include "common.h"
/* Local standalone-compile clone of engine_types.h's Mtx8_8017DE10_8017E710
* (match_one's isolated compile only has -Iinclude, can't resolve
* ../shared/engine_types.h; the host TU already includes it via engine_core.h).
* Same-shape clone -> byte-neutral; the gate's strip_provided_typedefs drops it. */
void func_80188410(s32 a0)
{
extern void func_80188978(s32 a0, s32 a1, s32 a2);
extern void func_8012A828(s32 a0, void *a1);
extern void func_8012B2CC(s32 a0);
extern s32 func_8012B864(s32 a0);
extern void RotMatrixY(s32 a0, void *a1);
extern void func_800484EC(s32 a0, s32 a1, s32 a2);
extern Mtx8_8017DE10_8017E710 D_800AE620;
extern M2C_UNK D_801C9FFC;
extern M2C_UNK D_801CA030;
extern u8 D_801CA074[];
extern u8 D_801CA084[];
extern u8 D_801CA094[];
Mtx8_8017DE10_8017E710 m;
u8 *p;
func_80188978(a0, (s32)&D_801C9FFC, 0);
func_8012A828(a0, (void *)&D_801CA030);
func_8012B2CC(a0);
m = D_800AE620;
RotMatrixY((func_8012B864(a0) + 0x800) & 0xFFF, &m);
/* LOAD-BEARING: every case label 1..0x32 must be WRITTEN OUT. gcc-2.7.2's
* table-vs-compare-chain choice keys on DISTINCT LABEL COUNT over the
* value range, not on a `default:` arm: with only the 4 distinct bodies
* spelled (case 8 / 5,0x1d,0x20 / default) it emits a li/beq chain and no
* jtbl at all. With ~50 labels it emits addiu $v1,$v0,-1 ; sltiu
* $v0,$v1,0x32 ; sll 2 ; jtbl_801F5F74 (minval=1, 50 entries) -- the
* target's exact dispatch. Do NOT "simplify" to a default-only switch. */
switch (*(u16 *)(a0 + 0x5e)) {
case 8:
p = D_801CA084;
break;
case 5:
case 0x1d:
case 0x20:
p = D_801CA094;
break;
case 1:
case 2:
case 3:
case 4:
case 6:
case 7:
case 9:
case 10:
case 11:
case 12:
case 13:
case 14:
case 15:
case 16:
case 17:
case 18:
case 19:
case 20:
case 21:
case 22:
case 23:
case 24:
case 25:
case 26:
case 27:
case 28:
case 30:
case 31:
case 33:
case 34:
case 35:
case 36:
case 37:
case 38:
case 39:
case 40:
case 41:
case 42:
case 43:
case 44:
case 45:
case 46:
case 47:
case 48:
case 49:
case 50:
default:
p = D_801CA074;
break;
}
func_800484EC((s32)&m, (s32)p, a0 + 0x10);
*(u16 *)(a0 + 0x34) = 0;
*(s32 *)(a0 + 0x1c) = 0;
}
#include "common.h"
+18 -1
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@@ -6313,7 +6313,24 @@ void func_801860D0(int param_1)
}
INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105_jr_8017C8D0", func_801861DC);
extern s32 func_80029504(void);
extern s32 func_8016F1AC(void);
extern void func_8014704C(s32 *a0);
extern s32 func_80178B18(s32, s32);
extern s32 D_80126B58;
extern void (*D_8018EEB4[])(void);
void func_801861DC(void *a0)
{
if ((u32)func_80029504() < 0x258u) {
*(u16 *)((s32)a0 + 2) = 2;
func_80178B18((s32)a0, (s32)D_8018EEB4);
} else if (func_8016F1AC() == 0) {
*(u16 *)((s32)a0 + 2) = 10;
func_8014704C(&D_80126B58);
}
}
INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105_jr_8017C8D0", func_8018624C);
+37 -1
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@@ -5226,7 +5226,43 @@ void func_80184E24(u8 *a0) {
}
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80184E78);
extern u8 D_80078EB1;
extern s32 func_800130D0(s32 a0, s32 a1, s32 a2);
extern void func_80184F18();
void func_80184E78(s32 *param_1)
{
register s16 sp18 __asm__("$5");
register s16 col __asm__("$2");
register s32 w __asm__("$3");
register s32 ec __asm__("$5");
register s32 t1 __asm__("$4");
register s32 packed __asm__("$4");
register s32 *p __asm__("$4");
u16 cnt;
sp18 = 0x10;
if (D_80078EB1 - 7U < 0xC) {
sp18 = 0x40;
}
col = func_800130D0(*(s16 *)((u8 *)param_1 + 0xFE), sp18, 1);
w = col << 16;
ec = w >> 16;
t1 = ec << 16;
packed = t1 | ec << 8;
asm volatile("" ::: "memory");
cnt = *(u16 *)((u8 *)param_1 + 0xFC);
*(s16 *)((u8 *)param_1 + 0xFE) = col;
*(u16 *)((u8 *)param_1 + 0xFC) = cnt + 1;
ec = ec | packed;
if ((s16)(cnt + 1) >= 0x7F) {
*(u16 *)((u8 *)param_1 + 0xFC) = 0;
}
p = param_1;
func_80184F18(p, ec,
*(s16 *)((u8 *)p + 0xFC));
}
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_80184F18);
+29 -1
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@@ -3417,7 +3417,35 @@ void func_8018356C(u8 *a0) {
}
INCLUDE_ASM("asm/ov_SC03_125/nonmatchings/ov_SC03_125_jr_80182BA0", func_801835B4);
void func_801835B4(s32 arg0) {
extern s32 func_80029504(void);
extern s32 func_8012C658(s32 arg0, s32 arg1, s32 arg2);
extern void func_8012C218(void *a0);
s32 flag;
s32 r;
r = func_80029504();
flag = 0;
switch (*(s16 *)((s32)arg0 + 0x70)) {
case 0:
if ((u32)(r - 0x64) < 0x1E) {
flag = 1;
}
break;
case 1:
if ((u32)(r - 0x3B6) < 0x32) {
flag = 1;
}
break;
}
if (flag != 0) {
func_8012C658(0x21, 1 - *(u16 *)((s32)arg0 + 2), arg0);
func_8012C218((void *)arg0);
} else if (*(u16 *)((s32)arg0 + 2) == 0) {
*(u16 *)((s32)arg0 + 2) = *(u16 *)((s32)arg0 + 2) + 1;
}
}
extern void (*D_801C12C4[])(void);
+54 -1
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@@ -8101,7 +8101,60 @@ void func_80183710(void *a0) {
INCLUDE_ASM("asm/ov_SC04_002/nonmatchings/ov_SC04_002_jr_8017BEBC", func_80183790);
INCLUDE_ASM("asm/ov_SC04_002/nonmatchings/ov_SC04_002_jr_8017BEBC", func_80183820);
extern s32 func_80183904(s16 *a0, s16 *a1, s32 a2);
s32 func_80183820(s32 arg0) {
extern u8 D_801202A0[];
register s32 zr __asm__("$0");
u8 *pe;
u8 *ps;
s16 *ca;
s16 *cb;
u16 state;
u16 t;
s32 count;
pe = D_801202A0;
count = 0;
ps = pe + 4;
do {
if ((s32)pe == arg0) {
goto next;
}
state = *(u16 *)pe;
ca = (s16 *)((s32)arg0 + zr);
if (state == 0x1FC) {
goto b1fc;
}
cb = (s16 *)((s32)ps + zr);
if (state == 0x239) {
goto b239;
}
goto next;
b1fc:
cb = (s16 *)((s32)ps + zr);
t = (*(s16 *)(*(s32 *)(arg0 + 0x20) + 0x18) * 9u) >> 9;
goto call;
b239:
t = (u32)(*(s16 *)(*(s32 *)(arg0 + 0x20) + 0x18) + *(s16 *)(*(s32 *)(ps + 0x1C) + 0x18)) >> 6;
/* fall through */
call:
if (func_80183904(ca, cb, t) == 0) {
goto next;
}
__asm__ __volatile__("" :: "r"(pe));
return (s32)pe;
next:
count++;
ps += 0x10C;
pe += 0x10C;
} while (count < 0x60);
return 0;
}
s32 func_80183904(s16 *a0, s16 *a1, s32 a2) {
s32 d;
+21 -1
View File
@@ -4696,7 +4696,27 @@ void func_8017F180(s32 param_1, s32 param_2) {
INCLUDE_ASM("asm/ov_SC04_006/nonmatchings/ov_SC04_006_jr_8017BEBC", func_8017F354);
INCLUDE_ASM("asm/ov_SC04_006/nonmatchings/ov_SC04_006_jr_8017BEBC", func_8017F43C);
int func_8017F43C(short *a0) {
int data[3];
data[0] = a0[3] - a0[68];
data[1] = 0;
data[2] = a0[7] - a0[70];
__asm__ __volatile__(
"lwc2 $9, 0($sp)\n"
"lwc2 $10, 4($sp)\n"
"lwc2 $11, 8($sp)\n"
"nop\n"
"nop\n"
"sqr 0\n"
: : : "$9", "$10", "$11", "memory");
__asm__ __volatile__(
"swc2 $25, 0($sp)\n"
"swc2 $26, 4($sp)\n"
"swc2 $27, 8($sp)\n"
: : : "memory");
return (data[0] + data[2]) <= 0x18FFFF;
}
extern void (*D_8019B250[])(void);
+32 -1
View File
@@ -3381,7 +3381,38 @@ void func_8017D1D4(void *a0) {
}
INCLUDE_ASM("asm/ov_SC04_010/nonmatchings/ov_SC04_010_jr_8017BEBC", func_8017D210);
extern void func_8017D2D4();
extern Blk8_80126940_8017D210 D_80126940;
void func_8017D210(s32 a0) {
Blk8_80126940_8017D210 sp10;
Blk8_80126940_8017D210 sp18;
s16 y;
sp10 = D_80126940;
sp18 = D_80126940;
sp10.v[0] = 0x1D0;
*(s16 *)&sp10.v[1] = -0x802;
sp10.v[2] = 0x1180;
y = sp18.v[0];
if (y >= 0x1D1) {
sp18.v[0] = 0x1D0;
}
y = sp18.v[2];
if (y < 0x10E0) {
sp18.v[2] = 0x10E0;
} else if (y >= 0x1221) {
sp18.v[2] = 0x1220;
}
func_8017D2D4(a0, (s16 *)sp10.v, (s16 *)sp18.v);
}
/* 8 bytes */
+20 -1
View File
@@ -10094,7 +10094,26 @@ void func_801896BC(void *a0) {
}
INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_801896F8);
#include "common.h"
extern s32 func_80132EF4(s32 a0, s32 a1);
void func_801896F8(s32 a0)
{
s16 t;
*(u8 *)(a0 + 0xC1) = 1;
t = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) - 0x180;
*(s16 *)(a0 + 0xFE) = t;
if (t < 0x601) {
*(s16 *)(a0 + 0xFE) = 0;
*(s16 *)(a0 + 0x100) = 0x10;
}
*(s16 *)(a0 + 0xAE) = -1;
*(u16 *)(a0 + 0x5C) &= 0xFFFE;
func_80132EF4(a0, 0x79);
}
#include "common.h"
-76
View File
@@ -4857,79 +4857,3 @@ void func_80181938(void *a0) {
*(s16 *)((s32)a0 + 0xAE) = -1;
}
}
INCLUDE_ASM("asm/ov_SC06_030/nonmatchings/ov_SC06_030_jr_8017C8D0", func_80181A80);
extern void (*D_801B4DA8[])(void);
void func_80181C30(void *a0) {
D_801B4DA8[*(u16 *)((s32)a0 + 0x2)]();
}
extern void (*D_801B4DE4[])(void);
void func_80181C6C(void *a0) {
D_801B4DE4[*(u16 *)((s32)a0 + 0x2)]();
}
extern s32 func_8012C354(s32 a0, s32 a1);
extern void func_8012A828(s32 a0, void *a1);
void func_80181CA8(void *a0) {
extern u8 D_801B4CF8[];
extern u8 D_80182184[];
if (func_8012C354((s32)a0, (s32)D_801B4CF8) != 0) {
*(u8 *)((s32)a0 + 0xC0) = 1;
*(s16 *)((s32)a0 + 0xAE) = -1;
func_8012A828(a0, D_80182184);
*(u16 *)((s32)a0 + 0x2) = *(u16 *)((s32)a0 + 0x2) + 1;
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x2C) =
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x2C) | 0x10;
*(s16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18) = 0xE00;
*(s16 *)(*(s32 *)((s32)a0 + 0x20) + 0x1A) = 0xE00;
*(s16 *)(*(s32 *)((s32)a0 + 0x20) + 0x1C) = 0xE00;
*(u16 *)((s32)a0 + 0xFC) = 0x300;
*(u8 *)((s32)a0 + 0x75) = 8;
}
}
extern s32 func_8012C354(s32 a0, s32 a1);
extern void func_8012A828(s32 a0, void *a1);
void func_80181D50(void *a0) {
extern u8 D_801B4DB0[];
extern u8 D_80182184[];
if (func_8012C354((s32)a0, (s32)D_801B4DB0) != 0) {
*(u8 *)((s32)a0 + 0xC0) = 1;
func_8012A828(a0, D_80182184);
*(u16 *)((s32)a0 + 2) = *(u16 *)((s32)a0 + 2) + 1;
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x2C) =
*(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x2C) | 0x10;
*(s16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18) = 0xAAA;
*(s16 *)(*(s32 *)((s32)a0 + 0x20) + 0x1C) = 0xAAA;
}
}
extern void func_80181164(void);
void func_80181DD4(s32 arg0) {
s32 temp_v0;
func_80181164();
temp_v0 = *(s32 *)(arg0 + 0x1c) + 1;
*(s32 *)(arg0 + 0x1c) = temp_v0;
}
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