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feat(phase-30 S38/S1c): re-sweep the matched-exemplar families after the type lift — 97 members banked

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Families that returned 0/N before the 895-type lift now bank: 97 member-matches across 137 families
(1,138 failed; skipped 186 STRUCT-class by design, 106 unresolved-immediate, 6 not-stub).
R22 clean-fleet 140/140. Fleet 94.2 -> 94.3% instr / 88.9 -> 89.1% distinct / 96.29 -> 96.32% fn.

RESIDUE PRICED FROM THE SWEEP'S OWN .classified.txt PAYLOADS, not inferred: in the 400 most recent
failure records, 133 are genuine DIFF and the clear majority are `conflicting types for <sym>` —
the §103/§20 extern-conflict class, across ~12 overlays. That confirms S1b (wire reconcile_tu /
cast_call_sites into the --hseq path) is the correct next lever, and it is now justified by
measurement rather than by the plan's projection.

Method note worth keeping: those per-member diagnoses have been written on every sweep run for a
month and were never read — including by me, until after I had spent two probes and a manual
--stage-only round rediscovering one of them. Every remaining task now starts by reading the payload.
This commit is contained in:
Drew T
2026-08-04 19:04:56 -06:00
parent c57860db4e
commit be2eaa1842
52 changed files with 4292 additions and 395 deletions
Download Patch File Download Diff File Expand all files Collapse all files
docs/backlog.md
+208 -210
View File
@@ -2,7 +2,7 @@
> Generated by `tools/backlog.py render` from `.run/backlog.jsonl`. These are functions the Phase-21 automation got **close** on but did NOT byte-match. The whole-binary byte-gate is the sole arbiter (G3/P9): **byte-matches bank and are NOT listed here** — only genuine near-misses/blockers are. Ranked by hand-session priority: **reach** (×N propagation leverage) → **closeness** (match_one mismatch count, lower = closer) → **size**. Each row's `best_draft` is the closest C the machine reached — resume from there.
**Open near-misses:** 855 · by status {'near': 817, 'failed': 38} · by class {'schedule': 4, 'plumbing': 6, 'struct': 11, 'regalloc-order': 9, None: 819, 'other': 1, 'WAVE': 3, 'STRUCT': 1, 'loose-typing': 1}
**Open near-misses:** 853 · by status {'near': 815, 'failed': 38} · by class {'schedule': 4, 'plumbing': 6, 'struct': 11, 'regalloc-order': 9, None: 817, 'other': 1, 'WAVE': 3, 'STRUCT': 1, 'loose-typing': 1}
| # | addr | reach | class | nins | status | closeness | where it stuck | best draft |
|--:|------|------:|-------|-----:|--------|----------:|----------------|------------|
@@ -652,212 +652,210 @@
| 644 | func_8017E94C | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_8017E94C.c` |
| 645 | func_8017E170 | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_8017E170.c` |
| 646 | func_8018043C | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_8018043C.c` |
| 647 | func_8018A3F0 | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_8018A3F0.c` |
| 648 | func_80183364 | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_80183364.c` |
| 649 | func_801824F0 | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_801824F0.c` |
| 650 | func_8017F4A0 | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_8017F4A0.c` |
| 651 | func_801877E4 | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_801877E4.c` |
| 652 | func_80183F4C | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_80183F4C.c` |
| 653 | func_80186044 | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_80186044.c` |
| 654 | func_80180010 | None | | None | near | 42 | residual: 42 mismatch | `.run/backlog_drafts/func_80180010.c` |
| 655 | func_8017E824 | None | | None | near | 42 | residual: 42 mismatch | `.run/backlog_drafts/func_8017E824.c` |
| 656 | func_80183598 | None | | None | near | 42 | residual: 42 mismatch | `.run/backlog_drafts/func_80183598.c` |
| 657 | func_8017ECF4 | None | | None | near | 43 | residual: 43 mismatch | `.run/backlog_drafts/func_8017ECF4.c` |
| 658 | func_8018118C | None | | None | near | 43 | residual: 43 mismatch | `.run/backlog_drafts/func_8018118C.c` |
| 659 | func_8018FB8C | None | | None | near | 43 | residual: 43 mismatch | `.run/backlog_drafts/func_8018FB8C.c` |
| 660 | func_8017D96C | None | | None | near | 43 | residual: 43 mismatch | `.run/backlog_drafts/func_8017D96C.c` |
| 661 | func_801812FC | None | | None | near | 43 | residual: 43 mismatch | `.run/backlog_drafts/func_801812FC.c` |
| 662 | func_80186B08 | None | | None | near | 43 | residual: 43 mismatch | `.run/backlog_drafts/func_80186B08.c` |
| 663 | func_8017E7D0 | None | | None | near | 45 | residual: 45 mismatch | `.run/backlog_drafts/func_8017E7D0.c` |
| 664 | func_8017D01C | None | | None | near | 45 | residual: 45 mismatch | `.run/backlog_drafts/func_8017D01C.c` |
| 665 | func_8017E380 | None | | None | near | 45 | residual: 45 mismatch | `.run/backlog_drafts/func_8017E380.c` |
| 666 | func_80180A88 | None | | None | near | 45 | residual: 45 mismatch | `.run/backlog_drafts/func_80180A88.c` |
| 667 | func_80189DB4 | None | | None | near | 45 | residual: 45 mismatch | `.run/backlog_drafts/func_80189DB4.c` |
| 668 | func_8018001C | None | | None | near | 46 | residual: 46 mismatch | `.run/backlog_drafts/func_8018001C.c` |
| 669 | func_8017F2A0 | None | | None | near | 46 | residual: 46 mismatch | `.run/backlog_drafts/func_8017F2A0.c` |
| 670 | func_80188BEC | None | | None | near | 47 | residual: 47 mismatch | `.run/backlog_drafts/func_80188BEC.c` |
| 671 | func_801804DC | None | | None | near | 47 | residual: 47 mismatch | `.run/backlog_drafts/func_801804DC.c` |
| 672 | func_801808D8 | None | | None | near | 47 | residual: 47 mismatch | `.run/backlog_drafts/func_801808D8.c` |
| 673 | func_8017E8D0 | None | | None | near | 47 | residual: 47 mismatch | `.run/backlog_drafts/func_8017E8D0.c` |
| 674 | func_801805DC | None | | None | near | 47 | residual: 47 mismatch | `.run/backlog_drafts/func_801805DC.c` |
| 675 | func_80184D0C | None | | None | near | 47 | residual: 47 mismatch | `.run/backlog_drafts/func_80184D0C.c` |
| 676 | func_8017F84C | None | | None | near | 48 | residual: 48 mismatch | `.run/backlog_drafts/func_8017F84C.c` |
| 677 | func_8017EF54 | None | | None | near | 48 | residual: 48 mismatch | `.run/backlog_drafts/func_8017EF54.c` |
| 678 | func_8017FCF0 | None | | None | near | 48 | residual: 48 mismatch | `.run/backlog_drafts/func_8017FCF0.c` |
| 679 | func_8017D6F0 | None | | None | near | 49 | residual: 49 mismatch | `.run/backlog_drafts/func_8017D6F0.c` |
| 680 | func_8017DF40 | None | | None | near | 49 | residual: 49 mismatch | `.run/backlog_drafts/func_8017DF40.c` |
| 681 | func_801845EC | None | | None | near | 50 | residual: 50 mismatch | `.run/backlog_drafts/func_801845EC.c` |
| 682 | func_8017F4C4 | None | | None | near | 50 | residual: 50 mismatch | `.run/backlog_drafts/func_8017F4C4.c` |
| 683 | func_8017DE74 | None | | None | near | 50 | residual: 50 mismatch | `.run/backlog_drafts/func_8017DE74.c` |
| 684 | func_80183D48 | None | | None | near | 50 | residual: 50 mismatch | `.run/backlog_drafts/func_80183D48.c` |
| 685 | func_80181124 | None | | None | near | 52 | residual: 52 mismatch | `.run/backlog_drafts/func_80181124.c` |
| 686 | func_8017FB48 | None | | None | near | 52 | residual: 52 mismatch | `.run/backlog_drafts/func_8017FB48.c` |
| 687 | func_8018592C | None | | None | near | 53 | residual: 53 mismatch | `.run/backlog_drafts/func_8018592C.c` |
| 688 | func_8018CFF4 | None | | None | near | 53 | residual: 53 mismatch | `.run/backlog_drafts/func_8018CFF4.c` |
| 689 | func_8017DB6C | None | | None | near | 53 | residual: 53 mismatch | `.run/backlog_drafts/func_8017DB6C.c` |
| 690 | func_8018048C | None | | None | near | 53 | residual: 53 mismatch | `.run/backlog_drafts/func_8018048C.c` |
| 691 | func_8018465C | None | | None | near | 54 | residual: 54 mismatch | `.run/backlog_drafts/func_8018465C.c` |
| 692 | func_80180B7C | None | | None | near | 54 | residual: 54 mismatch | `.run/backlog_drafts/func_80180B7C.c` |
| 693 | func_8017FE54 | None | | None | near | 55 | residual: 55 mismatch | `.run/backlog_drafts/func_8017FE54.c` |
| 694 | func_801802BC | None | | None | near | 55 | residual: 55 mismatch | `.run/backlog_drafts/func_801802BC.c` |
| 695 | func_80182030 | None | | None | near | 55 | residual: 55 mismatch | `.run/backlog_drafts/func_80182030.c` |
| 696 | func_80180204 | None | | None | near | 55 | residual: 55 mismatch | `.run/backlog_drafts/func_80180204.c` |
| 697 | func_80181DEC | None | | None | near | 57 | residual: 57 mismatch | `.run/backlog_drafts/func_80181DEC.c` |
| 698 | func_8017E524 | None | | None | near | 57 | residual: 57 mismatch | `.run/backlog_drafts/func_8017E524.c` |
| 699 | func_8017ECB0 | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_8017ECB0.c` |
| 700 | func_801898C8 | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_801898C8.c` |
| 701 | func_80184920 | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_80184920.c` |
| 702 | func_80182EA0 | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_80182EA0.c` |
| 703 | func_8017F1C4 | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_8017F1C4.c` |
| 704 | func_80181A5C | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_80181A5C.c` |
| 705 | func_8017D544 | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_8017D544.c` |
| 706 | func_8017EA2C | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_8017EA2C.c` |
| 707 | func_80183624 | None | | None | near | 59 | residual: 59 mismatch | `.run/backlog_drafts/func_80183624.c` |
| 708 | func_80180B50 | None | | None | near | 59 | residual: 59 mismatch | `.run/backlog_drafts/func_80180B50.c` |
| 709 | func_8018567C | None | | None | near | 59 | residual: 59 mismatch | `.run/backlog_drafts/func_8018567C.c` |
| 710 | func_8017EEE0 | None | | None | near | 62 | residual: 62 mismatch | `.run/backlog_drafts/func_8017EEE0.c` |
| 711 | func_80188204 | None | | None | near | 62 | residual: 62 mismatch | `.run/backlog_drafts/func_80188204.c` |
| 712 | func_8017F25C | None | | None | near | 62 | residual: 62 mismatch | `.run/backlog_drafts/func_8017F25C.c` |
| 713 | func_8017EB74 | None | | None | near | 63 | residual: 63 mismatch | `.run/backlog_drafts/func_8017EB74.c` |
| 714 | func_8017E798 | None | | None | near | 64 | residual: 64 mismatch | `.run/backlog_drafts/func_8017E798.c` |
| 715 | func_8017D610 | None | | None | near | 64 | residual: 64 mismatch | `.run/backlog_drafts/func_8017D610.c` |
| 716 | func_8017CD10 | None | | None | near | 64 | residual: 64 mismatch | `.run/backlog_drafts/func_8017CD10.c` |
| 717 | func_8017F1A0 | None | | None | near | 64 | residual: 64 mismatch | `.run/backlog_drafts/func_8017F1A0.c` |
| 718 | func_8017D928 | None | | None | near | 64 | residual: 64 mismatch | `.run/backlog_drafts/func_8017D928.c` |
| 719 | func_8018656C | None | | None | near | 65 | residual: 65 mismatch | `.run/backlog_drafts/func_8018656C.c` |
| 720 | func_80185B5C | None | | None | near | 67 | residual: 67 mismatch | `.run/backlog_drafts/func_80185B5C.c` |
| 721 | func_8017E910 | None | | None | near | 68 | residual: 68 mismatch | `.run/backlog_drafts/func_8017E910.c` |
| 722 | func_80182378 | None | | None | near | 69 | residual: 69 mismatch | `.run/backlog_drafts/func_80182378.c` |
| 723 | func_80180224 | None | | None | near | 71 | residual: 71 mismatch | `.run/backlog_drafts/func_80180224.c` |
| 724 | func_80184238 | None | | None | near | 72 | residual: 72 mismatch | `.run/backlog_drafts/func_80184238.c` |
| 725 | func_801866B0 | None | | None | near | 72 | residual: 72 mismatch | `.run/backlog_drafts/func_801866B0.c` |
| 726 | func_8017D9E4 | None | | None | near | 73 | residual: 73 mismatch | `.run/backlog_drafts/func_8017D9E4.c` |
| 727 | func_80181344 | None | | None | near | 73 | residual: 73 mismatch | `.run/backlog_drafts/func_80181344.c` |
| 728 | func_80189B3C | None | | None | near | 74 | residual: 74 mismatch | `.run/backlog_drafts/func_80189B3C.c` |
| 729 | func_80182B90 | None | | None | near | 74 | residual: 74 mismatch | `.run/backlog_drafts/func_80182B90.c` |
| 730 | func_8018165C | None | | None | near | 74 | residual: 74 mismatch | `.run/backlog_drafts/func_8018165C.c` |
| 731 | func_8017F468 | None | | None | near | 74 | residual: 74 mismatch | `.run/backlog_drafts/func_8017F468.c` |
| 732 | func_8017DAB4 | None | | None | near | 75 | residual: 75 mismatch | `.run/backlog_drafts/func_8017DAB4.c` |
| 733 | func_80181500 | None | | None | near | 75 | residual: 75 mismatch | `.run/backlog_drafts/func_80181500.c` |
| 734 | func_801814A8 | None | | None | near | 76 | residual: 76 mismatch | `.run/backlog_drafts/func_801814A8.c` |
| 735 | func_8017E81C | None | | None | near | 76 | residual: 76 mismatch | `.run/backlog_drafts/func_8017E81C.c` |
| 736 | func_8018474C | None | | None | near | 76 | residual: 76 mismatch | `.run/backlog_drafts/func_8018474C.c` |
| 737 | func_80184DDC | None | | None | near | 77 | residual: 77 mismatch | `.run/backlog_drafts/func_80184DDC.c` |
| 738 | func_8017E2F4 | None | | None | near | 77 | residual: 77 mismatch | `.run/backlog_drafts/func_8017E2F4.c` |
| 739 | func_8017EDBC | None | | None | near | 78 | residual: 78 mismatch | `.run/backlog_drafts/func_8017EDBC.c` |
| 740 | func_8017E5F0 | None | | None | near | 79 | residual: 79 mismatch | `.run/backlog_drafts/func_8017E5F0.c` |
| 741 | func_801815AC | None | | None | near | 79 | residual: 79 mismatch | `.run/backlog_drafts/func_801815AC.c` |
| 742 | func_8017D54C | None | | None | near | 79 | residual: 79 mismatch | `.run/backlog_drafts/func_8017D54C.c` |
| 743 | func_80181260 | None | | None | near | 79 | residual: 79 mismatch | `.run/backlog_drafts/func_80181260.c` |
| 744 | func_801805D0 | None | | None | near | 79 | residual: 79 mismatch | `.run/backlog_drafts/func_801805D0.c` |
| 745 | func_8017F290 | 1 | regalloc-order | 86 | near | 81 | none — MATCH. Two levers: (1) hold &D_801270CC in a `int *state` local so its | `.run/backlog_drafts/func_8017F290.c` |
| 746 | func_80181068 | None | | None | near | 81 | residual: 81 mismatch | `.run/backlog_drafts/func_80181068.c` |
| 747 | func_80184E00 | None | | None | near | 82 | residual: 82 mismatch | `.run/backlog_drafts/func_80184E00.c` |
| 748 | func_8017EB88 | None | | None | near | 82 | residual: 82 mismatch | `.run/backlog_drafts/func_8017EB88.c` |
| 749 | func_8017F840 | None | | None | near | 82 | residual: 82 mismatch | `.run/backlog_drafts/func_8017F840.c` |
| 750 | func_8017DA9C | None | | None | near | 83 | residual: 83 mismatch | `.run/backlog_drafts/func_8017DA9C.c` |
| 751 | func_801829F0 | None | | None | near | 83 | residual: 83 mismatch | `.run/backlog_drafts/func_801829F0.c` |
| 752 | func_8017FBA4 | None | | None | near | 83 | residual: 83 mismatch | `.run/backlog_drafts/func_8017FBA4.c` |
| 753 | func_801848AC | None | | None | near | 84 | residual: 84 mismatch | `.run/backlog_drafts/func_801848AC.c` |
| 754 | func_801847FC | None | | None | near | 86 | residual: 86 mismatch | `.run/backlog_drafts/func_801847FC.c` |
| 755 | func_8018006C | None | | None | near | 86 | residual: 86 mismatch | `.run/backlog_drafts/func_8018006C.c` |
| 756 | func_8017DFD8 | None | | None | near | 87 | residual: 87 mismatch | `.run/backlog_drafts/func_8017DFD8.c` |
| 757 | func_801821D4 | None | | None | near | 90 | residual: 90 mismatch | `.run/backlog_drafts/func_801821D4.c` |
| 758 | func_8017F0A8 | None | | None | near | 90 | residual: 90 mismatch | `.run/backlog_drafts/func_8017F0A8.c` |
| 759 | func_8018AD3C | None | | None | near | 90 | residual: 90 mismatch | `.run/backlog_drafts/func_8018AD3C.c` |
| 760 | func_8017EDC0 | None | | None | near | 91 | residual: 91 mismatch | `.run/backlog_drafts/func_8017EDC0.c` |
| 761 | func_801807DC | None | | None | near | 92 | residual: 92 mismatch | `.run/backlog_drafts/func_801807DC.c` |
| 762 | func_80180170 | None | | None | near | 92 | residual: 92 mismatch | `.run/backlog_drafts/func_80180170.c` |
| 763 | func_8017D98C | 1 | plumbing | 31 | near | 93 | none — MATCH (expected): straight global stores + tail call; const 0x140 reused for two halves | `.run/backlog_drafts/func_8017D98C.c` |
| 764 | func_8017EFFC | None | | None | near | 93 | residual: 93 mismatch | `.run/backlog_drafts/func_8017EFFC.c` |
| 765 | func_8017D940 | None | | None | near | 94 | residual: 94 mismatch | `.run/backlog_drafts/func_8017D940.c` |
| 766 | func_8017DAB8 | None | | None | near | 97 | residual: 97 mismatch | `.run/backlog_drafts/func_8017DAB8.c` |
| 767 | func_80180040 | None | | None | near | 97 | residual: 97 mismatch | `.run/backlog_drafts/func_80180040.c` |
| 768 | func_8017FBE0 | None | | None | near | 97 | residual: 97 mismatch | `.run/backlog_drafts/func_8017FBE0.c` |
| 769 | func_80182728 | None | | None | near | 98 | residual: 98 mismatch | `.run/backlog_drafts/func_80182728.c` |
| 770 | func_8017D808 | None | | None | near | 102 | residual: 102 mismatch | `.run/backlog_drafts/func_8017D808.c` |
| 771 | func_80182D10 | None | | None | near | 102 | residual: 102 mismatch | `.run/backlog_drafts/func_80182D10.c` |
| 772 | func_8017DC40 | None | | None | near | 104 | residual: 104 mismatch | `.run/backlog_drafts/func_8017DC40.c` |
| 773 | func_8017F96C | None | | None | near | 106 | residual: 106 mismatch | `.run/backlog_drafts/func_8017F96C.c` |
| 774 | func_8017EFEC | None | | None | near | 107 | residual: 107 mismatch | `.run/backlog_drafts/func_8017EFEC.c` |
| 775 | func_80182BC8 | None | | None | near | 107 | residual: 107 mismatch | `.run/backlog_drafts/func_80182BC8.c` |
| 776 | func_8017F69C | None | | None | near | 107 | residual: 107 mismatch | `.run/backlog_drafts/func_8017F69C.c` |
| 777 | func_80184828 | None | | None | near | 109 | residual: 109 mismatch | `.run/backlog_drafts/func_80184828.c` |
| 778 | func_8017F3E4 | None | | None | near | 110 | residual: 110 mismatch | `.run/backlog_drafts/func_8017F3E4.c` |
| 779 | func_8017DAF4 | None | | None | near | 111 | residual: 111 mismatch | `.run/backlog_drafts/func_8017DAF4.c` |
| 780 | func_8017FE9C | None | | None | near | 111 | residual: 111 mismatch | `.run/backlog_drafts/func_8017FE9C.c` |
| 781 | func_8017F768 | None | | None | near | 112 | residual: 112 mismatch | `.run/backlog_drafts/func_8017F768.c` |
| 782 | func_8017F3B8 | None | | None | near | 112 | residual: 112 mismatch | `.run/backlog_drafts/func_8017F3B8.c` |
| 783 | func_8017D508 | None | | None | near | 113 | residual: 113 mismatch | `.run/backlog_drafts/func_8017D508.c` |
| 784 | func_8018788C | None | | None | near | 113 | residual: 113 mismatch | `.run/backlog_drafts/func_8018788C.c` |
| 785 | func_80181858 | None | | None | near | 117 | residual: 117 mismatch | `.run/backlog_drafts/func_80181858.c` |
| 786 | func_8017E8F8 | None | | None | near | 120 | residual: 120 mismatch | `.run/backlog_drafts/func_8017E8F8.c` |
| 787 | func_80184358 | None | | None | near | 121 | residual: 121 mismatch | `.run/backlog_drafts/func_80184358.c` |
| 788 | func_8017F074 | None | | None | near | 121 | residual: 121 mismatch | `.run/backlog_drafts/func_8017F074.c` |
| 789 | func_8017D890 | None | | None | near | 124 | residual: 124 mismatch | `.run/backlog_drafts/func_8017D890.c` |
| 790 | func_8017DECC | None | | None | near | 125 | residual: 125 mismatch | `.run/backlog_drafts/func_8017DECC.c` |
| 791 | func_80185020 | None | | None | near | 125 | residual: 125 mismatch | `.run/backlog_drafts/func_80185020.c` |
| 792 | func_8017DD2C | None | | None | near | 125 | residual: 125 mismatch | `.run/backlog_drafts/func_8017DD2C.c` |
| 793 | func_801884BC | None | | None | near | 125 | residual: 125 mismatch | `.run/backlog_drafts/func_801884BC.c` |
| 794 | func_801892CC | None | | None | near | 127 | residual: 127 mismatch | `.run/backlog_drafts/func_801892CC.c` |
| 795 | func_8017EB00 | None | | None | near | 127 | residual: 127 mismatch | `.run/backlog_drafts/func_8017EB00.c` |
| 796 | func_80185E68 | 1 | STRUCT | 132 | near | 131 | STRUCT: 131 mismatch | `.run/backlog_drafts/func_80185E68.c` |
| 797 | func_8017E378 | None | | None | near | 134 | residual: 134 mismatch | `.run/backlog_drafts/func_8017E378.c` |
| 798 | func_80186530 | None | | None | near | 139 | residual: 139 mismatch | `.run/backlog_drafts/func_80186530.c` |
| 799 | func_80184F08 | None | regalloc-order | None | near | 141 | none — MATCH (145/145 ins, match_one confirmed) | `.run/backlog_drafts/func_80184F08.c` |
| 800 | func_80185668 | None | | None | near | 142 | residual: 142 mismatch | `.run/backlog_drafts/func_80185668.c` |
| 801 | func_8017DB0C | None | | None | near | 142 | residual: 142 mismatch | `.run/backlog_drafts/func_8017DB0C.c` |
| 802 | func_80181984 | None | | None | near | 153 | residual: 153 mismatch | `.run/backlog_drafts/func_80181984.c` |
| 803 | func_8017E6EC | None | | None | near | 172 | residual: 172 mismatch | `.run/backlog_drafts/func_8017E6EC.c` |
| 804 | func_80184210 | None | | None | near | 176 | residual: 176 mismatch | `.run/backlog_drafts/func_80184210.c` |
| 805 | func_80180568 | None | | None | near | 185 | residual: 185 mismatch | `.run/backlog_drafts/func_80180568.c` |
| 806 | func_801809C4 | None | | None | near | 190 | residual: 190 mismatch | `.run/backlog_drafts/func_801809C4.c` |
| 807 | func_80183D84 | None | | None | near | 192 | residual: 192 mismatch | `.run/backlog_drafts/func_80183D84.c` |
| 808 | func_80183FEC | None | | None | near | 198 | residual: 198 mismatch | `.run/backlog_drafts/func_80183FEC.c` |
| 809 | func_801823B8 | None | | None | near | 204 | residual: 204 mismatch | `.run/backlog_drafts/func_801823B8.c` |
| 810 | func_801826C4 | None | | None | near | 207 | residual: 207 mismatch | `.run/backlog_drafts/func_801826C4.c` |
| 811 | func_8018C3F8 | None | | None | near | 236 | residual: 236 mismatch | `.run/backlog_drafts/func_8018C3F8.c` |
| 812 | func_8017E7D4 | None | | None | near | 241 | residual: 241 mismatch | `.run/backlog_drafts/func_8017E7D4.c` |
| 813 | func_80183BF8 | None | | None | near | 258 | residual: 258 mismatch | `.run/backlog_drafts/func_80183BF8.c` |
| 814 | func_8017EB30 | None | | None | near | 278 | residual: 278 mismatch | `.run/backlog_drafts/func_8017EB30.c` |
| 815 | func_801804A0 | None | | None | near | 280 | residual: 280 mismatch | `.run/backlog_drafts/func_801804A0.c` |
| 816 | func_80181670 | None | | None | near | 311 | residual: 311 mismatch | `.run/backlog_drafts/func_80181670.c` |
| 817 | func_8018057C | None | | None | near | 897 | residual: 897 mismatch | `.run/backlog_drafts/func_8018057C.c` |
| 818 | func_80184A68 | 1 | regalloc-order | 33 | failed | | none — MATCH | `.run/backlog_drafts/func_80184A68.c` |
| 819 | func_80180B64 | 1 | struct | 75 | failed | | none — MATCH (75 ins, relocation-masked) | `.run/backlog_drafts/func_80180B64.c` |
| 820 | func_80183DE0 | 1 | regalloc-order | 91 | failed | | testing if(!=1) layout + counter-before-pointer init order | `.run/backlog_drafts/func_80183DE0.c` |
| 821 | func_80182C9C | 1 | schedule | 101 | failed | | none — MATCH (101 ins). Inner-switch break-to-shared-tail must be written as | `.run/backlog_drafts/func_80182C9C.c` |
| 822 | func_80183FB8 | 1 | loose-typing | 101 | failed | | none — MATCH (relocation-masked match_one, 101/101 ins) | `.run/backlog_drafts/func_80183FB8.c` |
| 823 | func_80185BA4 | 1 | WAVE | 177 | failed | | won't compile standalone (loose-typing / missing decl) | |
| 824 | func_8017D8DC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017D8DC.c` |
| 825 | func_8017FFEC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017FFEC.c` |
| 826 | func_8017DC18 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017DC18.c` |
| 827 | func_801853CC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801853CC.c` |
| 828 | func_80181894 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80181894.c` |
| 829 | func_8018BFBC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8018BFBC.c` |
| 830 | func_801807F4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801807F4.c` |
| 831 | func_8017FFC8 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017FFC8.c` |
| 832 | func_8017E99C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E99C.c` |
| 833 | func_80180294 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80180294.c` |
| 834 | func_8017E76C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E76C.c` |
| 835 | func_8017F29C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017F29C.c` |
| 836 | func_8017F00C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017F00C.c` |
| 837 | func_801802B0 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801802B0.c` |
| 838 | func_8017DA1C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017DA1C.c` |
| 839 | func_8017FFC4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017FFC4.c` |
| 840 | func_8017E2F0 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E2F0.c` |
| 841 | func_801841E4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801841E4.c` |
| 842 | func_80181738 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80181738.c` |
| 843 | func_801873D8 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801873D8.c` |
| 844 | func_80185628 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80185628.c` |
| 845 | func_80181A78 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80181A78.c` |
| 846 | func_801805D4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801805D4.c` |
| 847 | func_8017EA1C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017EA1C.c` |
| 848 | func_8017F098 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017F098.c` |
| 849 | func_801822CC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801822CC.c` |
| 850 | func_8017E3F4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E3F4.c` |
| 851 | func_800D1658 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_800D1658.c` |
| 852 | func_800D1984 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_800D1984.c` |
| 853 | func_800D24A0 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_800D24A0.c` |
| 854 | func_80144B9C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80144B9C.c` |
| 855 | func_8013DD68 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8013DD68.c` |
| 647 | func_80183364 | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_80183364.c` |
| 648 | func_801824F0 | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_801824F0.c` |
| 649 | func_8017F4A0 | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_8017F4A0.c` |
| 650 | func_80183F4C | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_80183F4C.c` |
| 651 | func_80186044 | None | | None | near | 41 | residual: 41 mismatch | `.run/backlog_drafts/func_80186044.c` |
| 652 | func_80180010 | None | | None | near | 42 | residual: 42 mismatch | `.run/backlog_drafts/func_80180010.c` |
| 653 | func_8017E824 | None | | None | near | 42 | residual: 42 mismatch | `.run/backlog_drafts/func_8017E824.c` |
| 654 | func_80183598 | None | | None | near | 42 | residual: 42 mismatch | `.run/backlog_drafts/func_80183598.c` |
| 655 | func_8017ECF4 | None | | None | near | 43 | residual: 43 mismatch | `.run/backlog_drafts/func_8017ECF4.c` |
| 656 | func_8018118C | None | | None | near | 43 | residual: 43 mismatch | `.run/backlog_drafts/func_8018118C.c` |
| 657 | func_8018FB8C | None | | None | near | 43 | residual: 43 mismatch | `.run/backlog_drafts/func_8018FB8C.c` |
| 658 | func_8017D96C | None | | None | near | 43 | residual: 43 mismatch | `.run/backlog_drafts/func_8017D96C.c` |
| 659 | func_801812FC | None | | None | near | 43 | residual: 43 mismatch | `.run/backlog_drafts/func_801812FC.c` |
| 660 | func_80186B08 | None | | None | near | 43 | residual: 43 mismatch | `.run/backlog_drafts/func_80186B08.c` |
| 661 | func_8017E7D0 | None | | None | near | 45 | residual: 45 mismatch | `.run/backlog_drafts/func_8017E7D0.c` |
| 662 | func_8017D01C | None | | None | near | 45 | residual: 45 mismatch | `.run/backlog_drafts/func_8017D01C.c` |
| 663 | func_8017E380 | None | | None | near | 45 | residual: 45 mismatch | `.run/backlog_drafts/func_8017E380.c` |
| 664 | func_80180A88 | None | | None | near | 45 | residual: 45 mismatch | `.run/backlog_drafts/func_80180A88.c` |
| 665 | func_80189DB4 | None | | None | near | 45 | residual: 45 mismatch | `.run/backlog_drafts/func_80189DB4.c` |
| 666 | func_8018001C | None | | None | near | 46 | residual: 46 mismatch | `.run/backlog_drafts/func_8018001C.c` |
| 667 | func_8017F2A0 | None | | None | near | 46 | residual: 46 mismatch | `.run/backlog_drafts/func_8017F2A0.c` |
| 668 | func_80188BEC | None | | None | near | 47 | residual: 47 mismatch | `.run/backlog_drafts/func_80188BEC.c` |
| 669 | func_801804DC | None | | None | near | 47 | residual: 47 mismatch | `.run/backlog_drafts/func_801804DC.c` |
| 670 | func_801808D8 | None | | None | near | 47 | residual: 47 mismatch | `.run/backlog_drafts/func_801808D8.c` |
| 671 | func_8017E8D0 | None | | None | near | 47 | residual: 47 mismatch | `.run/backlog_drafts/func_8017E8D0.c` |
| 672 | func_801805DC | None | | None | near | 47 | residual: 47 mismatch | `.run/backlog_drafts/func_801805DC.c` |
| 673 | func_80184D0C | None | | None | near | 47 | residual: 47 mismatch | `.run/backlog_drafts/func_80184D0C.c` |
| 674 | func_8017F84C | None | | None | near | 48 | residual: 48 mismatch | `.run/backlog_drafts/func_8017F84C.c` |
| 675 | func_8017EF54 | None | | None | near | 48 | residual: 48 mismatch | `.run/backlog_drafts/func_8017EF54.c` |
| 676 | func_8017FCF0 | None | | None | near | 48 | residual: 48 mismatch | `.run/backlog_drafts/func_8017FCF0.c` |
| 677 | func_8017D6F0 | None | | None | near | 49 | residual: 49 mismatch | `.run/backlog_drafts/func_8017D6F0.c` |
| 678 | func_8017DF40 | None | | None | near | 49 | residual: 49 mismatch | `.run/backlog_drafts/func_8017DF40.c` |
| 679 | func_801845EC | None | | None | near | 50 | residual: 50 mismatch | `.run/backlog_drafts/func_801845EC.c` |
| 680 | func_8017F4C4 | None | | None | near | 50 | residual: 50 mismatch | `.run/backlog_drafts/func_8017F4C4.c` |
| 681 | func_8017DE74 | None | | None | near | 50 | residual: 50 mismatch | `.run/backlog_drafts/func_8017DE74.c` |
| 682 | func_80183D48 | None | | None | near | 50 | residual: 50 mismatch | `.run/backlog_drafts/func_80183D48.c` |
| 683 | func_80181124 | None | | None | near | 52 | residual: 52 mismatch | `.run/backlog_drafts/func_80181124.c` |
| 684 | func_8017FB48 | None | | None | near | 52 | residual: 52 mismatch | `.run/backlog_drafts/func_8017FB48.c` |
| 685 | func_8018592C | None | | None | near | 53 | residual: 53 mismatch | `.run/backlog_drafts/func_8018592C.c` |
| 686 | func_8018CFF4 | None | | None | near | 53 | residual: 53 mismatch | `.run/backlog_drafts/func_8018CFF4.c` |
| 687 | func_8017DB6C | None | | None | near | 53 | residual: 53 mismatch | `.run/backlog_drafts/func_8017DB6C.c` |
| 688 | func_8018048C | None | | None | near | 53 | residual: 53 mismatch | `.run/backlog_drafts/func_8018048C.c` |
| 689 | func_8018465C | None | | None | near | 54 | residual: 54 mismatch | `.run/backlog_drafts/func_8018465C.c` |
| 690 | func_80180B7C | None | | None | near | 54 | residual: 54 mismatch | `.run/backlog_drafts/func_80180B7C.c` |
| 691 | func_8017FE54 | None | | None | near | 55 | residual: 55 mismatch | `.run/backlog_drafts/func_8017FE54.c` |
| 692 | func_801802BC | None | | None | near | 55 | residual: 55 mismatch | `.run/backlog_drafts/func_801802BC.c` |
| 693 | func_80182030 | None | | None | near | 55 | residual: 55 mismatch | `.run/backlog_drafts/func_80182030.c` |
| 694 | func_80180204 | None | | None | near | 55 | residual: 55 mismatch | `.run/backlog_drafts/func_80180204.c` |
| 695 | func_80181DEC | None | | None | near | 57 | residual: 57 mismatch | `.run/backlog_drafts/func_80181DEC.c` |
| 696 | func_8017E524 | None | | None | near | 57 | residual: 57 mismatch | `.run/backlog_drafts/func_8017E524.c` |
| 697 | func_8017ECB0 | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_8017ECB0.c` |
| 698 | func_801898C8 | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_801898C8.c` |
| 699 | func_80184920 | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_80184920.c` |
| 700 | func_80182EA0 | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_80182EA0.c` |
| 701 | func_8017F1C4 | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_8017F1C4.c` |
| 702 | func_80181A5C | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_80181A5C.c` |
| 703 | func_8017D544 | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_8017D544.c` |
| 704 | func_8017EA2C | None | | None | near | 58 | residual: 58 mismatch | `.run/backlog_drafts/func_8017EA2C.c` |
| 705 | func_80183624 | None | | None | near | 59 | residual: 59 mismatch | `.run/backlog_drafts/func_80183624.c` |
| 706 | func_80180B50 | None | | None | near | 59 | residual: 59 mismatch | `.run/backlog_drafts/func_80180B50.c` |
| 707 | func_8018567C | None | | None | near | 59 | residual: 59 mismatch | `.run/backlog_drafts/func_8018567C.c` |
| 708 | func_8017EEE0 | None | | None | near | 62 | residual: 62 mismatch | `.run/backlog_drafts/func_8017EEE0.c` |
| 709 | func_80188204 | None | | None | near | 62 | residual: 62 mismatch | `.run/backlog_drafts/func_80188204.c` |
| 710 | func_8017F25C | None | | None | near | 62 | residual: 62 mismatch | `.run/backlog_drafts/func_8017F25C.c` |
| 711 | func_8017EB74 | None | | None | near | 63 | residual: 63 mismatch | `.run/backlog_drafts/func_8017EB74.c` |
| 712 | func_8017E798 | None | | None | near | 64 | residual: 64 mismatch | `.run/backlog_drafts/func_8017E798.c` |
| 713 | func_8017D610 | None | | None | near | 64 | residual: 64 mismatch | `.run/backlog_drafts/func_8017D610.c` |
| 714 | func_8017CD10 | None | | None | near | 64 | residual: 64 mismatch | `.run/backlog_drafts/func_8017CD10.c` |
| 715 | func_8017F1A0 | None | | None | near | 64 | residual: 64 mismatch | `.run/backlog_drafts/func_8017F1A0.c` |
| 716 | func_8017D928 | None | | None | near | 64 | residual: 64 mismatch | `.run/backlog_drafts/func_8017D928.c` |
| 717 | func_8018656C | None | | None | near | 65 | residual: 65 mismatch | `.run/backlog_drafts/func_8018656C.c` |
| 718 | func_80185B5C | None | | None | near | 67 | residual: 67 mismatch | `.run/backlog_drafts/func_80185B5C.c` |
| 719 | func_8017E910 | None | | None | near | 68 | residual: 68 mismatch | `.run/backlog_drafts/func_8017E910.c` |
| 720 | func_80182378 | None | | None | near | 69 | residual: 69 mismatch | `.run/backlog_drafts/func_80182378.c` |
| 721 | func_80180224 | None | | None | near | 71 | residual: 71 mismatch | `.run/backlog_drafts/func_80180224.c` |
| 722 | func_80184238 | None | | None | near | 72 | residual: 72 mismatch | `.run/backlog_drafts/func_80184238.c` |
| 723 | func_801866B0 | None | | None | near | 72 | residual: 72 mismatch | `.run/backlog_drafts/func_801866B0.c` |
| 724 | func_8017D9E4 | None | | None | near | 73 | residual: 73 mismatch | `.run/backlog_drafts/func_8017D9E4.c` |
| 725 | func_80181344 | None | | None | near | 73 | residual: 73 mismatch | `.run/backlog_drafts/func_80181344.c` |
| 726 | func_80189B3C | None | | None | near | 74 | residual: 74 mismatch | `.run/backlog_drafts/func_80189B3C.c` |
| 727 | func_80182B90 | None | | None | near | 74 | residual: 74 mismatch | `.run/backlog_drafts/func_80182B90.c` |
| 728 | func_8018165C | None | | None | near | 74 | residual: 74 mismatch | `.run/backlog_drafts/func_8018165C.c` |
| 729 | func_8017F468 | None | | None | near | 74 | residual: 74 mismatch | `.run/backlog_drafts/func_8017F468.c` |
| 730 | func_8017DAB4 | None | | None | near | 75 | residual: 75 mismatch | `.run/backlog_drafts/func_8017DAB4.c` |
| 731 | func_80181500 | None | | None | near | 75 | residual: 75 mismatch | `.run/backlog_drafts/func_80181500.c` |
| 732 | func_801814A8 | None | | None | near | 76 | residual: 76 mismatch | `.run/backlog_drafts/func_801814A8.c` |
| 733 | func_8017E81C | None | | None | near | 76 | residual: 76 mismatch | `.run/backlog_drafts/func_8017E81C.c` |
| 734 | func_8018474C | None | | None | near | 76 | residual: 76 mismatch | `.run/backlog_drafts/func_8018474C.c` |
| 735 | func_80184DDC | None | | None | near | 77 | residual: 77 mismatch | `.run/backlog_drafts/func_80184DDC.c` |
| 736 | func_8017E2F4 | None | | None | near | 77 | residual: 77 mismatch | `.run/backlog_drafts/func_8017E2F4.c` |
| 737 | func_8017EDBC | None | | None | near | 78 | residual: 78 mismatch | `.run/backlog_drafts/func_8017EDBC.c` |
| 738 | func_8017E5F0 | None | | None | near | 79 | residual: 79 mismatch | `.run/backlog_drafts/func_8017E5F0.c` |
| 739 | func_801815AC | None | | None | near | 79 | residual: 79 mismatch | `.run/backlog_drafts/func_801815AC.c` |
| 740 | func_8017D54C | None | | None | near | 79 | residual: 79 mismatch | `.run/backlog_drafts/func_8017D54C.c` |
| 741 | func_80181260 | None | | None | near | 79 | residual: 79 mismatch | `.run/backlog_drafts/func_80181260.c` |
| 742 | func_801805D0 | None | | None | near | 79 | residual: 79 mismatch | `.run/backlog_drafts/func_801805D0.c` |
| 743 | func_8017F290 | 1 | regalloc-order | 86 | near | 81 | none — MATCH. Two levers: (1) hold &D_801270CC in a `int *state` local so its | `.run/backlog_drafts/func_8017F290.c` |
| 744 | func_80181068 | None | | None | near | 81 | residual: 81 mismatch | `.run/backlog_drafts/func_80181068.c` |
| 745 | func_80184E00 | None | | None | near | 82 | residual: 82 mismatch | `.run/backlog_drafts/func_80184E00.c` |
| 746 | func_8017EB88 | None | | None | near | 82 | residual: 82 mismatch | `.run/backlog_drafts/func_8017EB88.c` |
| 747 | func_8017F840 | None | | None | near | 82 | residual: 82 mismatch | `.run/backlog_drafts/func_8017F840.c` |
| 748 | func_8017DA9C | None | | None | near | 83 | residual: 83 mismatch | `.run/backlog_drafts/func_8017DA9C.c` |
| 749 | func_801829F0 | None | | None | near | 83 | residual: 83 mismatch | `.run/backlog_drafts/func_801829F0.c` |
| 750 | func_8017FBA4 | None | | None | near | 83 | residual: 83 mismatch | `.run/backlog_drafts/func_8017FBA4.c` |
| 751 | func_801848AC | None | | None | near | 84 | residual: 84 mismatch | `.run/backlog_drafts/func_801848AC.c` |
| 752 | func_801847FC | None | | None | near | 86 | residual: 86 mismatch | `.run/backlog_drafts/func_801847FC.c` |
| 753 | func_8018006C | None | | None | near | 86 | residual: 86 mismatch | `.run/backlog_drafts/func_8018006C.c` |
| 754 | func_8017DFD8 | None | | None | near | 87 | residual: 87 mismatch | `.run/backlog_drafts/func_8017DFD8.c` |
| 755 | func_801821D4 | None | | None | near | 90 | residual: 90 mismatch | `.run/backlog_drafts/func_801821D4.c` |
| 756 | func_8017F0A8 | None | | None | near | 90 | residual: 90 mismatch | `.run/backlog_drafts/func_8017F0A8.c` |
| 757 | func_8018AD3C | None | | None | near | 90 | residual: 90 mismatch | `.run/backlog_drafts/func_8018AD3C.c` |
| 758 | func_8017EDC0 | None | | None | near | 91 | residual: 91 mismatch | `.run/backlog_drafts/func_8017EDC0.c` |
| 759 | func_801807DC | None | | None | near | 92 | residual: 92 mismatch | `.run/backlog_drafts/func_801807DC.c` |
| 760 | func_80180170 | None | | None | near | 92 | residual: 92 mismatch | `.run/backlog_drafts/func_80180170.c` |
| 761 | func_8017D98C | 1 | plumbing | 31 | near | 93 | none — MATCH (expected): straight global stores + tail call; const 0x140 reused for two halves | `.run/backlog_drafts/func_8017D98C.c` |
| 762 | func_8017EFFC | None | | None | near | 93 | residual: 93 mismatch | `.run/backlog_drafts/func_8017EFFC.c` |
| 763 | func_8017D940 | None | | None | near | 94 | residual: 94 mismatch | `.run/backlog_drafts/func_8017D940.c` |
| 764 | func_8017DAB8 | None | | None | near | 97 | residual: 97 mismatch | `.run/backlog_drafts/func_8017DAB8.c` |
| 765 | func_80180040 | None | | None | near | 97 | residual: 97 mismatch | `.run/backlog_drafts/func_80180040.c` |
| 766 | func_8017FBE0 | None | | None | near | 97 | residual: 97 mismatch | `.run/backlog_drafts/func_8017FBE0.c` |
| 767 | func_80182728 | None | | None | near | 98 | residual: 98 mismatch | `.run/backlog_drafts/func_80182728.c` |
| 768 | func_8017D808 | None | | None | near | 102 | residual: 102 mismatch | `.run/backlog_drafts/func_8017D808.c` |
| 769 | func_80182D10 | None | | None | near | 102 | residual: 102 mismatch | `.run/backlog_drafts/func_80182D10.c` |
| 770 | func_8017DC40 | None | | None | near | 104 | residual: 104 mismatch | `.run/backlog_drafts/func_8017DC40.c` |
| 771 | func_8017F96C | None | | None | near | 106 | residual: 106 mismatch | `.run/backlog_drafts/func_8017F96C.c` |
| 772 | func_8017EFEC | None | | None | near | 107 | residual: 107 mismatch | `.run/backlog_drafts/func_8017EFEC.c` |
| 773 | func_80182BC8 | None | | None | near | 107 | residual: 107 mismatch | `.run/backlog_drafts/func_80182BC8.c` |
| 774 | func_8017F69C | None | | None | near | 107 | residual: 107 mismatch | `.run/backlog_drafts/func_8017F69C.c` |
| 775 | func_80184828 | None | | None | near | 109 | residual: 109 mismatch | `.run/backlog_drafts/func_80184828.c` |
| 776 | func_8017F3E4 | None | | None | near | 110 | residual: 110 mismatch | `.run/backlog_drafts/func_8017F3E4.c` |
| 777 | func_8017DAF4 | None | | None | near | 111 | residual: 111 mismatch | `.run/backlog_drafts/func_8017DAF4.c` |
| 778 | func_8017FE9C | None | | None | near | 111 | residual: 111 mismatch | `.run/backlog_drafts/func_8017FE9C.c` |
| 779 | func_8017F768 | None | | None | near | 112 | residual: 112 mismatch | `.run/backlog_drafts/func_8017F768.c` |
| 780 | func_8017F3B8 | None | | None | near | 112 | residual: 112 mismatch | `.run/backlog_drafts/func_8017F3B8.c` |
| 781 | func_8017D508 | None | | None | near | 113 | residual: 113 mismatch | `.run/backlog_drafts/func_8017D508.c` |
| 782 | func_8018788C | None | | None | near | 113 | residual: 113 mismatch | `.run/backlog_drafts/func_8018788C.c` |
| 783 | func_80181858 | None | | None | near | 117 | residual: 117 mismatch | `.run/backlog_drafts/func_80181858.c` |
| 784 | func_8017E8F8 | None | | None | near | 120 | residual: 120 mismatch | `.run/backlog_drafts/func_8017E8F8.c` |
| 785 | func_80184358 | None | | None | near | 121 | residual: 121 mismatch | `.run/backlog_drafts/func_80184358.c` |
| 786 | func_8017F074 | None | | None | near | 121 | residual: 121 mismatch | `.run/backlog_drafts/func_8017F074.c` |
| 787 | func_8017D890 | None | | None | near | 124 | residual: 124 mismatch | `.run/backlog_drafts/func_8017D890.c` |
| 788 | func_8017DECC | None | | None | near | 125 | residual: 125 mismatch | `.run/backlog_drafts/func_8017DECC.c` |
| 789 | func_80185020 | None | | None | near | 125 | residual: 125 mismatch | `.run/backlog_drafts/func_80185020.c` |
| 790 | func_8017DD2C | None | | None | near | 125 | residual: 125 mismatch | `.run/backlog_drafts/func_8017DD2C.c` |
| 791 | func_801884BC | None | | None | near | 125 | residual: 125 mismatch | `.run/backlog_drafts/func_801884BC.c` |
| 792 | func_801892CC | None | | None | near | 127 | residual: 127 mismatch | `.run/backlog_drafts/func_801892CC.c` |
| 793 | func_8017EB00 | None | | None | near | 127 | residual: 127 mismatch | `.run/backlog_drafts/func_8017EB00.c` |
| 794 | func_80185E68 | 1 | STRUCT | 132 | near | 131 | STRUCT: 131 mismatch | `.run/backlog_drafts/func_80185E68.c` |
| 795 | func_8017E378 | None | | None | near | 134 | residual: 134 mismatch | `.run/backlog_drafts/func_8017E378.c` |
| 796 | func_80186530 | None | | None | near | 139 | residual: 139 mismatch | `.run/backlog_drafts/func_80186530.c` |
| 797 | func_80184F08 | None | regalloc-order | None | near | 141 | none — MATCH (145/145 ins, match_one confirmed) | `.run/backlog_drafts/func_80184F08.c` |
| 798 | func_80185668 | None | | None | near | 142 | residual: 142 mismatch | `.run/backlog_drafts/func_80185668.c` |
| 799 | func_8017DB0C | None | | None | near | 142 | residual: 142 mismatch | `.run/backlog_drafts/func_8017DB0C.c` |
| 800 | func_80181984 | None | | None | near | 153 | residual: 153 mismatch | `.run/backlog_drafts/func_80181984.c` |
| 801 | func_8017E6EC | None | | None | near | 172 | residual: 172 mismatch | `.run/backlog_drafts/func_8017E6EC.c` |
| 802 | func_80184210 | None | | None | near | 176 | residual: 176 mismatch | `.run/backlog_drafts/func_80184210.c` |
| 803 | func_80180568 | None | | None | near | 185 | residual: 185 mismatch | `.run/backlog_drafts/func_80180568.c` |
| 804 | func_801809C4 | None | | None | near | 190 | residual: 190 mismatch | `.run/backlog_drafts/func_801809C4.c` |
| 805 | func_80183D84 | None | | None | near | 192 | residual: 192 mismatch | `.run/backlog_drafts/func_80183D84.c` |
| 806 | func_80183FEC | None | | None | near | 198 | residual: 198 mismatch | `.run/backlog_drafts/func_80183FEC.c` |
| 807 | func_801823B8 | None | | None | near | 204 | residual: 204 mismatch | `.run/backlog_drafts/func_801823B8.c` |
| 808 | func_801826C4 | None | | None | near | 207 | residual: 207 mismatch | `.run/backlog_drafts/func_801826C4.c` |
| 809 | func_8018C3F8 | None | | None | near | 236 | residual: 236 mismatch | `.run/backlog_drafts/func_8018C3F8.c` |
| 810 | func_8017E7D4 | None | | None | near | 241 | residual: 241 mismatch | `.run/backlog_drafts/func_8017E7D4.c` |
| 811 | func_80183BF8 | None | | None | near | 258 | residual: 258 mismatch | `.run/backlog_drafts/func_80183BF8.c` |
| 812 | func_8017EB30 | None | | None | near | 278 | residual: 278 mismatch | `.run/backlog_drafts/func_8017EB30.c` |
| 813 | func_801804A0 | None | | None | near | 280 | residual: 280 mismatch | `.run/backlog_drafts/func_801804A0.c` |
| 814 | func_80181670 | None | | None | near | 311 | residual: 311 mismatch | `.run/backlog_drafts/func_80181670.c` |
| 815 | func_8018057C | None | | None | near | 897 | residual: 897 mismatch | `.run/backlog_drafts/func_8018057C.c` |
| 816 | func_80184A68 | 1 | regalloc-order | 33 | failed | | none — MATCH | `.run/backlog_drafts/func_80184A68.c` |
| 817 | func_80180B64 | 1 | struct | 75 | failed | | none — MATCH (75 ins, relocation-masked) | `.run/backlog_drafts/func_80180B64.c` |
| 818 | func_80183DE0 | 1 | regalloc-order | 91 | failed | | testing if(!=1) layout + counter-before-pointer init order | `.run/backlog_drafts/func_80183DE0.c` |
| 819 | func_80182C9C | 1 | schedule | 101 | failed | | none — MATCH (101 ins). Inner-switch break-to-shared-tail must be written as | `.run/backlog_drafts/func_80182C9C.c` |
| 820 | func_80183FB8 | 1 | loose-typing | 101 | failed | | none — MATCH (relocation-masked match_one, 101/101 ins) | `.run/backlog_drafts/func_80183FB8.c` |
| 821 | func_80185BA4 | 1 | WAVE | 177 | failed | | won't compile standalone (loose-typing / missing decl) | |
| 822 | func_8017D8DC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017D8DC.c` |
| 823 | func_8017FFEC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017FFEC.c` |
| 824 | func_8017DC18 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017DC18.c` |
| 825 | func_801853CC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801853CC.c` |
| 826 | func_80181894 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80181894.c` |
| 827 | func_8018BFBC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8018BFBC.c` |
| 828 | func_801807F4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801807F4.c` |
| 829 | func_8017FFC8 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017FFC8.c` |
| 830 | func_8017E99C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E99C.c` |
| 831 | func_80180294 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80180294.c` |
| 832 | func_8017E76C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E76C.c` |
| 833 | func_8017F29C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017F29C.c` |
| 834 | func_8017F00C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017F00C.c` |
| 835 | func_801802B0 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801802B0.c` |
| 836 | func_8017DA1C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017DA1C.c` |
| 837 | func_8017FFC4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017FFC4.c` |
| 838 | func_8017E2F0 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E2F0.c` |
| 839 | func_801841E4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801841E4.c` |
| 840 | func_80181738 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80181738.c` |
| 841 | func_801873D8 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801873D8.c` |
| 842 | func_80185628 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80185628.c` |
| 843 | func_80181A78 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80181A78.c` |
| 844 | func_801805D4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801805D4.c` |
| 845 | func_8017EA1C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017EA1C.c` |
| 846 | func_8017F098 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017F098.c` |
| 847 | func_801822CC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801822CC.c` |
| 848 | func_8017E3F4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E3F4.c` |
| 849 | func_800D1658 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_800D1658.c` |
| 850 | func_800D1984 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_800D1984.c` |
| 851 | func_800D24A0 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_800D24A0.c` |
| 852 | func_80144B9C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80144B9C.c` |
| 853 | func_8013DD68 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8013DD68.c` |
docs/progress.fleet.md
+60 -60
View File
@@ -4,16 +4,16 @@
# cross-binary collapsible-byte leverage: docs/duplicates.cross.md.
# THREE progress metrics (all matter — see the labels):
FLEET fn-count byte-ident: 340584 / 353721 = 96.29% (REAL+LINKED+empties; FUNCTION-count, ×134-inflated — one crack counts per overlay)
FLEET instr-weighted : 12378852 / 13141652 = 94.2% (shipped .text across main + resident + 138 overlays; the decomp.dev-DISPLAY number)
FLEET distinct-code(uniq): 5010667 / 5634875 = 88.9% (77796/87459 unique fns; the DISTINCT-RE number)
FLEET fn-count byte-ident: 340690 / 353721 = 96.32% (REAL+LINKED+empties; FUNCTION-count, ×134-inflated — one crack counts per overlay)
FLEET instr-weighted : 12387520 / 13141652 = 94.3% (shipped .text across main + resident + 138 overlays; the decomp.dev-DISPLAY number)
FLEET distinct-code(uniq): 5018334 / 5634875 = 89.1% (77884/87459 unique fns; the DISTINCT-RE number)
MAIN game-code weighted : 436 / 60201 = 0.7% (INCLUDED in the fleet numbers above since 2026-07-22 — roadmap §1 metrics contract; LINKED-excluding Ghidra sig dated 2026-06-14; caveat is R34: no independent second oracle for a PS-X EXE, NOT drift)
(fleet EXCLUDING main, for continuity with pre-2026-07-22 readings: 12378416 / 13081451 = 94.6%)
(fleet EXCLUDING main, for continuity with pre-2026-07-22 readings: 12387084 / 13081451 = 94.7%)
FLEET REAL substantive : 338729 (of which dedup-shared 241142 via 1910 groups / 241216 instances)
FLEET REAL substantive : 338835 (of which dedup-shared 241142 via 1910 groups / 241216 instances)
FLEET LINKED PsyQ objs : 959
FLEET NON_MATCHING : 7 (0 in any default build — G4)
FLEET INCLUDE_ASM stubs : 13130
FLEET INCLUDE_ASM stubs : 13024
FLEET matchable : 353721
| binary | REAL | shared | LINKED | byte-ident | matchable | byte-ident % |
@@ -28,109 +28,109 @@ FLEET matchable : 353721
| ov_SC01_008 | 2387 | 1745 | 0 | 2389 | 2426 | 98.5% |
| ov_SC01_009 | 2413 | 1746 | 0 | 2414 | 2507 | 96.3% |
| ov_SC01_074 | 2389 | 1746 | 0 | 2391 | 2425 | 98.6% |
| ov_SC01_077 | 2539 | 1711 | 0 | 2541 | 2586 | 98.3% |
| ov_SC01_077 | 2540 | 1711 | 0 | 2542 | 2586 | 98.3% |
| ov_SC01_080 | 2417 | 1749 | 0 | 2417 | 2512 | 96.2% |
| ov_SC01_084 | 2442 | 1754 | 0 | 2447 | 2579 | 94.9% |
| ov_SC02_000 | 2508 | 1793 | 0 | 2508 | 2683 | 93.5% |
| ov_SC02_003 | 2508 | 1793 | 0 | 2508 | 2683 | 93.5% |
| ov_SC02_004 | 2382 | 1749 | 0 | 2382 | 2401 | 99.2% |
| ov_SC02_005 | 2530 | 1745 | 0 | 2540 | 2927 | 86.8% |
| ov_SC02_011 | 2616 | 1752 | 0 | 2627 | 2893 | 90.8% |
| ov_SC02_005 | 2531 | 1745 | 0 | 2541 | 2927 | 86.8% |
| ov_SC02_011 | 2617 | 1752 | 0 | 2628 | 2893 | 90.8% |
| ov_SC02_015 | 2393 | 1751 | 0 | 2393 | 2414 | 99.1% |
| ov_SC02_016 | 2474 | 1751 | 0 | 2477 | 2545 | 97.3% |
| ov_SC02_017 | 2543 | 1751 | 0 | 2551 | 2732 | 93.4% |
| ov_SC02_017 | 2544 | 1751 | 0 | 2552 | 2732 | 93.4% |
| ov_SC02_021 | 2398 | 1751 | 0 | 2398 | 2437 | 98.4% |
| ov_SC02_026 | 2494 | 1749 | 0 | 2500 | 2572 | 97.2% |
| ov_SC02_027 | 2551 | 1749 | 0 | 2560 | 2692 | 95.1% |
| ov_SC02_028 | 2555 | 1749 | 0 | 2565 | 2701 | 95.0% |
| ov_SC02_028 | 2556 | 1749 | 0 | 2566 | 2701 | 95.0% |
| ov_SC02_031 | 2487 | 1750 | 0 | 2492 | 2562 | 97.3% |
| ov_SC02_035 | 2479 | 1749 | 0 | 2482 | 2520 | 98.5% |
| ov_SC02_039 | 2388 | 1749 | 0 | 2388 | 2416 | 98.8% |
| ov_SC02_041 | 2465 | 1749 | 0 | 2468 | 2561 | 96.4% |
| ov_SC03_001 | 2652 | 1750 | 0 | 2669 | 2869 | 93.0% |
| ov_SC03_002 | 2528 | 1754 | 0 | 2543 | 2631 | 96.7% |
| ov_SC02_041 | 2466 | 1749 | 0 | 2469 | 2561 | 96.4% |
| ov_SC03_001 | 2653 | 1750 | 0 | 2670 | 2869 | 93.1% |
| ov_SC03_002 | 2529 | 1754 | 0 | 2544 | 2631 | 96.7% |
| ov_SC03_003 | 2391 | 1749 | 0 | 2392 | 2423 | 98.7% |
| ov_SC03_006 | 2543 | 1755 | 0 | 2552 | 2767 | 92.2% |
| ov_SC03_007 | 2454 | 1749 | 0 | 2458 | 2623 | 93.7% |
| ov_SC03_006 | 2544 | 1755 | 0 | 2553 | 2767 | 92.3% |
| ov_SC03_007 | 2455 | 1749 | 0 | 2459 | 2623 | 93.7% |
| ov_SC03_010 | 2407 | 1749 | 0 | 2407 | 2471 | 97.4% |
| ov_SC03_011 | 2409 | 1749 | 0 | 2415 | 2527 | 95.6% |
| ov_SC03_012 | 2381 | 1749 | 0 | 2382 | 2406 | 99.0% |
| ov_SC03_013 | 2413 | 1749 | 0 | 2413 | 2493 | 96.8% |
| ov_SC03_014 | 2564 | 1777 | 0 | 2564 | 2685 | 95.5% |
| ov_SC03_015 | 2564 | 1777 | 0 | 2564 | 2685 | 95.5% |
| ov_SC03_015 | 2565 | 1777 | 0 | 2565 | 2685 | 95.5% |
| ov_SC03_023 | 2393 | 1749 | 0 | 2394 | 2435 | 98.3% |
| ov_SC03_024 | 2507 | 1754 | 0 | 2514 | 2641 | 95.2% |
| ov_SC03_024 | 2508 | 1754 | 0 | 2515 | 2641 | 95.2% |
| ov_SC03_028 | 2452 | 1749 | 0 | 2456 | 2664 | 92.2% |
| ov_SC03_029 | 2493 | 1751 | 0 | 2503 | 2644 | 94.7% |
| ov_SC03_030 | 2411 | 1754 | 0 | 2413 | 2495 | 96.7% |
| ov_SC03_031 | 2440 | 1749 | 0 | 2443 | 2514 | 97.2% |
| ov_SC03_089 | 2502 | 1754 | 0 | 2509 | 2581 | 97.2% |
| ov_SC03_090 | 2515 | 1754 | 0 | 2523 | 2625 | 96.1% |
| ov_SC03_091 | 2529 | 1749 | 0 | 2537 | 2640 | 96.1% |
| ov_SC03_092 | 2494 | 1754 | 0 | 2506 | 2587 | 96.9% |
| ov_SC03_093 | 2506 | 1749 | 0 | 2510 | 2563 | 97.9% |
| ov_SC03_094 | 2493 | 1749 | 0 | 2499 | 2577 | 97.0% |
| ov_SC03_095 | 2422 | 1749 | 0 | 2425 | 2474 | 98.0% |
| ov_SC03_096 | 2419 | 1749 | 0 | 2422 | 2465 | 98.3% |
| ov_SC03_097 | 2514 | 1749 | 0 | 2521 | 2603 | 96.8% |
| ov_SC03_098 | 2498 | 1749 | 0 | 2501 | 2541 | 98.4% |
| ov_SC03_099 | 2476 | 1749 | 0 | 2479 | 2504 | 99.0% |
| ov_SC03_100 | 2511 | 1749 | 0 | 2515 | 2539 | 99.1% |
| ov_SC03_101 | 2472 | 1754 | 0 | 2476 | 2528 | 97.9% |
| ov_SC03_102 | 2460 | 1749 | 0 | 2463 | 2492 | 98.8% |
| ov_SC03_103 | 2484 | 1751 | 0 | 2487 | 2510 | 99.1% |
| ov_SC03_104 | 2528 | 1754 | 0 | 2535 | 2616 | 96.9% |
| ov_SC03_105 | 2436 | 1749 | 0 | 2443 | 2597 | 94.1% |
| ov_SC03_089 | 2505 | 1754 | 0 | 2512 | 2581 | 97.3% |
| ov_SC03_090 | 2518 | 1754 | 0 | 2526 | 2625 | 96.2% |
| ov_SC03_091 | 2532 | 1749 | 0 | 2540 | 2640 | 96.2% |
| ov_SC03_092 | 2497 | 1754 | 0 | 2509 | 2587 | 97.0% |
| ov_SC03_093 | 2509 | 1749 | 0 | 2513 | 2563 | 98.0% |
| ov_SC03_094 | 2496 | 1749 | 0 | 2502 | 2577 | 97.1% |
| ov_SC03_095 | 2425 | 1749 | 0 | 2428 | 2474 | 98.1% |
| ov_SC03_096 | 2422 | 1749 | 0 | 2425 | 2465 | 98.4% |
| ov_SC03_097 | 2518 | 1749 | 0 | 2525 | 2603 | 97.0% |
| ov_SC03_098 | 2501 | 1749 | 0 | 2504 | 2541 | 98.5% |
| ov_SC03_099 | 2479 | 1749 | 0 | 2482 | 2504 | 99.1% |
| ov_SC03_100 | 2514 | 1749 | 0 | 2518 | 2539 | 99.2% |
| ov_SC03_101 | 2476 | 1754 | 0 | 2480 | 2528 | 98.1% |
| ov_SC03_102 | 2463 | 1749 | 0 | 2466 | 2492 | 99.0% |
| ov_SC03_103 | 2487 | 1751 | 0 | 2490 | 2510 | 99.2% |
| ov_SC03_104 | 2532 | 1754 | 0 | 2539 | 2616 | 97.1% |
| ov_SC03_105 | 2439 | 1749 | 0 | 2446 | 2597 | 94.2% |
| ov_SC03_108 | 2392 | 1749 | 0 | 2392 | 2443 | 97.9% |
| ov_SC03_109 | 2400 | 1749 | 0 | 2402 | 2424 | 99.1% |
| ov_SC03_110 | 2434 | 1749 | 0 | 2434 | 2468 | 98.6% |
| ov_SC03_111 | 2465 | 1749 | 0 | 2468 | 2510 | 98.3% |
| ov_SC03_112 | 2428 | 1751 | 0 | 2430 | 2526 | 96.2% |
| ov_SC03_112 | 2429 | 1751 | 0 | 2431 | 2526 | 96.2% |
| ov_SC03_113 | 2428 | 1751 | 0 | 2431 | 2468 | 98.5% |
| ov_SC03_114 | 2383 | 1749 | 0 | 2385 | 2415 | 98.8% |
| ov_SC03_115 | 2423 | 1749 | 0 | 2425 | 2472 | 98.1% |
| ov_SC03_116 | 2390 | 1749 | 0 | 2393 | 2438 | 98.2% |
| ov_SC03_115 | 2424 | 1749 | 0 | 2426 | 2472 | 98.1% |
| ov_SC03_116 | 2393 | 1749 | 0 | 2396 | 2438 | 98.3% |
| ov_SC03_117 | 2459 | 1749 | 0 | 2465 | 2557 | 96.4% |
| ov_SC03_118 | 2532 | 1773 | 0 | 2533 | 2685 | 94.3% |
| ov_SC03_119 | 2528 | 1773 | 0 | 2529 | 2685 | 94.2% |
| ov_SC03_118 | 2534 | 1773 | 0 | 2535 | 2685 | 94.4% |
| ov_SC03_119 | 2530 | 1773 | 0 | 2531 | 2685 | 94.3% |
| ov_SC03_121 | 2396 | 1749 | 0 | 2399 | 2459 | 97.6% |
| ov_SC03_124 | 2561 | 1745 | 0 | 2581 | 2741 | 94.2% |
| ov_SC03_125 | 2515 | 1749 | 0 | 2527 | 2588 | 97.6% |
| ov_SC03_124 | 2563 | 1745 | 0 | 2583 | 2741 | 94.2% |
| ov_SC03_125 | 2517 | 1749 | 0 | 2529 | 2588 | 97.7% |
| ov_SC03_126 | 2392 | 1751 | 0 | 2392 | 2423 | 98.7% |
| ov_SC04_000 | 2465 | 1753 | 0 | 2474 | 2546 | 97.2% |
| ov_SC04_002 | 2492 | 1749 | 0 | 2496 | 2636 | 94.7% |
| ov_SC04_003 | 2430 | 1749 | 0 | 2434 | 2502 | 97.3% |
| ov_SC04_004 | 2462 | 1749 | 0 | 2464 | 2558 | 96.3% |
| ov_SC04_005 | 2487 | 1749 | 0 | 2493 | 2612 | 95.4% |
| ov_SC04_006 | 2422 | 1749 | 0 | 2424 | 2454 | 98.8% |
| ov_SC04_007 | 2481 | 1749 | 0 | 2485 | 2569 | 96.7% |
| ov_SC04_000 | 2466 | 1753 | 0 | 2475 | 2546 | 97.2% |
| ov_SC04_002 | 2494 | 1749 | 0 | 2498 | 2636 | 94.8% |
| ov_SC04_003 | 2431 | 1749 | 0 | 2435 | 2502 | 97.3% |
| ov_SC04_004 | 2463 | 1749 | 0 | 2465 | 2558 | 96.4% |
| ov_SC04_005 | 2489 | 1749 | 0 | 2495 | 2612 | 95.5% |
| ov_SC04_006 | 2423 | 1749 | 0 | 2425 | 2454 | 98.8% |
| ov_SC04_007 | 2483 | 1749 | 0 | 2487 | 2569 | 96.8% |
| ov_SC04_008 | 2393 | 1749 | 0 | 2393 | 2415 | 99.1% |
| ov_SC04_009 | 2419 | 1749 | 0 | 2422 | 2441 | 99.2% |
| ov_SC04_010 | 2395 | 1749 | 0 | 2396 | 2419 | 99.0% |
| ov_SC04_011 | 2508 | 1754 | 0 | 2514 | 2803 | 89.7% |
| ov_SC04_012 | 2390 | 1749 | 0 | 2391 | 2420 | 98.8% |
| ov_SC04_015 | 2518 | 1750 | 0 | 2529 | 2611 | 96.9% |
| ov_SC04_015 | 2520 | 1750 | 0 | 2531 | 2611 | 96.9% |
| ov_SC04_016 | 2394 | 1749 | 0 | 2396 | 2440 | 98.2% |
| ov_SC04_018 | 2662 | 1785 | 0 | 2662 | 2857 | 93.2% |
| ov_SC04_019 | 2654 | 1785 | 0 | 2654 | 2857 | 92.9% |
| ov_SC04_020 | 2501 | 1749 | 0 | 2513 | 2567 | 97.9% |
| ov_SC04_019 | 2656 | 1785 | 0 | 2656 | 2857 | 93.0% |
| ov_SC04_020 | 2503 | 1749 | 0 | 2515 | 2567 | 98.0% |
| ov_SC04_021 | 2392 | 1751 | 0 | 2392 | 2423 | 98.7% |
| ov_SC05_000 | 2399 | 1753 | 0 | 2402 | 2422 | 99.2% |
| ov_SC05_001 | 2469 | 1749 | 0 | 2474 | 2574 | 96.1% |
| ov_SC05_001 | 2470 | 1749 | 0 | 2475 | 2574 | 96.2% |
| ov_SC05_002 | 2423 | 1749 | 0 | 2426 | 2442 | 99.3% |
| ov_SC05_003 | 2404 | 1749 | 0 | 2405 | 2481 | 96.9% |
| ov_SC05_003 | 2405 | 1749 | 0 | 2406 | 2481 | 97.0% |
| ov_SC05_004 | 2416 | 1749 | 0 | 2418 | 2464 | 98.1% |
| ov_SC05_005 | 2429 | 1754 | 0 | 2430 | 2491 | 97.6% |
| ov_SC05_006 | 2415 | 1749 | 0 | 2415 | 2430 | 99.4% |
| ov_SC05_007 | 2422 | 1749 | 0 | 2427 | 2482 | 97.8% |
| ov_SC05_007 | 2423 | 1749 | 0 | 2428 | 2482 | 97.8% |
| ov_SC05_008 | 2435 | 1749 | 0 | 2437 | 2543 | 95.8% |
| ov_SC05_009 | 2400 | 1749 | 0 | 2404 | 2438 | 98.6% |
| ov_SC05_010 | 2440 | 1749 | 0 | 2444 | 2588 | 94.4% |
| ov_SC05_011 | 2389 | 1749 | 0 | 2390 | 2409 | 99.2% |
| ov_SC05_017 | 2633 | 1746 | 0 | 2644 | 2842 | 93.0% |
| ov_SC05_018 | 2530 | 1749 | 0 | 2543 | 2673 | 95.1% |
| ov_SC05_017 | 2635 | 1746 | 0 | 2646 | 2842 | 93.1% |
| ov_SC05_018 | 2532 | 1749 | 0 | 2545 | 2673 | 95.2% |
| ov_SC05_019 | 2392 | 1751 | 0 | 2392 | 2423 | 98.7% |
| ov_SC06_000 | 2519 | 1758 | 0 | 2522 | 2691 | 93.7% |
| ov_SC06_000 | 2521 | 1758 | 0 | 2524 | 2691 | 93.8% |
| ov_SC06_006 | 2416 | 1749 | 0 | 2417 | 2511 | 96.3% |
| ov_SC06_008 | 2476 | 1751 | 0 | 2482 | 2542 | 97.6% |
| ov_SC06_010 | 2450 | 1749 | 0 | 2455 | 2517 | 97.5% |
@@ -140,7 +140,7 @@ FLEET matchable : 353721
| ov_SC06_015 | 2403 | 1749 | 0 | 2403 | 2421 | 99.3% |
| ov_SC06_016 | 2444 | 1749 | 0 | 2446 | 2549 | 96.0% |
| ov_SC06_018 | 2483 | 1751 | 0 | 2490 | 2665 | 93.4% |
| ov_SC06_020 | 2434 | 1751 | 0 | 2435 | 2518 | 96.7% |
| ov_SC06_020 | 2435 | 1751 | 0 | 2436 | 2518 | 96.7% |
| ov_SC06_022 | 2467 | 1749 | 0 | 2475 | 2642 | 93.7% |
| ov_SC06_024 | 2486 | 1749 | 0 | 2492 | 2667 | 93.4% |
| ov_SC06_025 | 2444 | 1749 | 0 | 2449 | 2572 | 95.2% |
@@ -152,7 +152,7 @@ FLEET matchable : 353721
| ov_SC07_000 | 2425 | 1753 | 0 | 2427 | 2521 | 96.3% |
| ov_SC07_001 | 2397 | 1749 | 0 | 2399 | 2454 | 97.8% |
| ov_SC07_002 | 2450 | 1749 | 0 | 2454 | 2579 | 95.2% |
| ov_SC07_006 | 2307 | 1573 | 0 | 2387 | 2456 | 97.2% |
| ov_SC07_006 | 2308 | 1573 | 0 | 2388 | 2456 | 97.2% |
| ov_SC07_007 | 2325 | 1605 | 0 | 2409 | 2613 | 92.2% |
| ov_SC07_008 | 2378 | 1749 | 0 | 2378 | 2386 | 99.7% |
| ov_SC07_009 | 2390 | 1749 | 0 | 2392 | 2430 | 98.4% |
src/ov_SC01_077/ov_SC01_077_a.c
+17 -1
View File
@@ -446,7 +446,23 @@ s32 func_80128C98(s32 arg0) {
}
INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077_a", func_80128CFC);
extern CdFileLoc cdFileLocTable[];
extern void func_8001ABBC(s32 a0, s32 a1, void *a2, s32 a3, s32 a4);
s32 func_80128CFC(s32 arg0) {
extern s16 D_80186DDC[];
s16 idx = D_80186DDC[arg0];
if (idx >= 0) {
func_8001ABBC(0, 0, (u8 *)&cdFileLocTable[idx], D_801D7F90, 0);
} else {
return 1;
}
}
DEFINE_func_80128D60() /* dedup: shared engine-core @0x80128D60 (src/shared) */
src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c
+15 -1
View File
@@ -5434,7 +5434,21 @@ void func_8018A47C(s32 a0) {
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_8017AE2C", func_8018A4C4);
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_8017AE2C", func_8018A658);
/* 8-byte, alignment-1 blob: the target copies it with lwl/lwr + swl/swr,
* which is gcc's emit_block_move for align < 4. */
extern void func_8018A6A0(s32 a0, Blob8_8018A47C *a1);
void func_8018A658(s32 a0) {
extern Blob8_8018A47C D_801E2F48;
Blob8_8018A47C tmp;
tmp = D_801E2F48;
func_8018A6A0(a0, &tmp);
}
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_8017AE2C", func_8018A6A0);
src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c
+121 -6
View File
@@ -5177,11 +5177,6 @@ extern void func_800491AC(void *a0);
extern int rand(void);
extern void func_80017714(void *);
extern SVECTOR_8017E72C D_801EB4C8[4];
extern struct PW8017E72C D_801EB4E8;
extern struct PW8017E72C D_801EB4EC;
extern u8 D_801EB4F0, D_801EB4F1, D_801EB4F2, D_801EB4F4, D_801EB4F5, D_801EB4F6;
extern int D_801EB4F8;
extern struct PW8017E72C D_80194BA4[];
#define gte_ldv0(r0) __asm__ __volatile__( \
@@ -5207,6 +5202,14 @@ extern struct PW8017E72C D_80194BA4[];
void func_8017E72C(int a, s16 *b, SVECTOR_8017E72C *c, SVECTOR_8017E72C *d,
SVECTOR_8017E72C *e, SVECTOR_8017E72C *f, s16 *g)
{
/* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every
LATER function in this TU, which blocks a byte-true decl of a different type.
Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
extern SVECTOR_8017E72C D_801EB4C8[4];
extern struct PW8017E72C D_801EB4E8;
extern struct PW8017E72C D_801EB4EC;
extern u8 D_801EB4F0, D_801EB4F1, D_801EB4F2, D_801EB4F4, D_801EB4F5, D_801EB4F6;
extern int D_801EB4F8;
MATRIX_8017E72C m;
SVECTOR_8017E72C *r0_00;
SVECTOR_8017E72C *pSVar6;
@@ -5480,7 +5483,119 @@ INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8017AE2C", func_8017F63
INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8017AE2C", func_8017F67C);
INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8017AE2C", func_8017F7B4);
extern void func_80013F3C(s32 a0);
extern void func_80017714(void *);
extern void func_8004914C();
extern void func_800491AC();
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
#define gte_ldv0(r0) __asm__ volatile ( \
"lwc2 $0, 0( %0 );" \
"lwc2 $1, 4( %0 )" \
: \
: "r"( r0 ) )
void func_8017F7B4(int a0, SVECTOR_8017C290 *a1, SVECTOR_8017C290 *a2, s32 a3)
{
extern struct PW8017C290 D_80194BCC[];
extern struct PW8017C290 D_80194BE0[];
extern SVECTOR_8017C290 D_801EB4C8[4];
extern struct PW8017C290 D_801EB4E8;
extern struct PW8017C290 D_801EB4EC;
extern u8 D_801EB4F0, D_801EA8E9, D_801EA8EA, D_801EB4F4, D_801EA8ED, D_801EA8EE;
extern u8 D_801EB4F0, D_801EA8E9, D_801EA8EA, D_801EB4F4, D_801EA8ED, D_801EA8EE;
extern int D_801EB4F8;
MATRIX_8017C290 m;
SVECTOR_8017C290 *r0_00;
SVECTOR_8017C290 *r0;
SVECTOR_8017C290 *pSVar6;
D_801EB4F8 = 0x50000000;
D_801EB4E8 = D_80194BCC[*(s32 *)(a0 + 0x2C)];
D_801EB4EC = D_80194BE0[*(s32 *)(a0 + 0x2C)];
*(struct PW8017C290 *)&D_801EB4F0 = D_80194BCC[*(s32 *)(a0 + 0x2C)];
*(struct PW8017C290 *)&D_801EB4F4 = D_80194BE0[*(s32 *)(a0 + 0x2C)];
func_80013F3C((s32)&m);
RotMatrixZ((s16)a3, &m);
m.t[0] = *(s16 *)(a0 + 0x6);
m.t[1] = *(s16 *)(a0 + 0xA);
m.t[2] = 0;
func_8004914C(&m);
func_800491AC(&m);
r0_00 = &D_801EB4C8[0];
gte_ldv0(a1);
gte_rt();
gte_stsv(r0_00);
gte_ldv0(a2);
gte_rt();
gte_stsv(r0_00 + 1);
a1->vx = a1->vx - 2;
gte_ldv0(a1);
gte_rt();
r0 = r0_00 + 2;
gte_stsv(r0);
a2->vx = a2->vx - 2;
gte_ldv0(a2);
gte_rt();
pSVar6 = r0_00 + 3;
gte_stsv(pSVar6);
r0_00->vz = *(u16 *)(a0 + 0xE);
func_80017714(r0_00);
a1->vx = a1->vx + 4;
gte_ldv0(a1);
gte_rt();
gte_stsv(r0);
a2->vx = a2->vx + 4;
gte_ldv0(a2);
gte_rt();
gte_stsv(pSVar6);
r0_00->vz = *(u16 *)(a0 + 0xE);
func_80017714(r0_00);
}
extern s32 func_80146A6C(s32 a0, void *a1, s32 a2, s32 a3, s32 a4, s32 a5, s32 a6);
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
+22 -1
View File
@@ -6326,7 +6326,28 @@ void func_8018A3E4(void *arg0) {
}
INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_8018A428);
/* Sibling shape: DEFINE_func_80143BDC() in src/shared/engine_core.h (cookbook §71) */
extern s32 func_8012C51C(void *a0, s32 a1);
void func_8018A428(s32 a0, u16 *a1, s16 a2) {
struct S80190C84 sp;
u16 t;
sp.f0 = a1[0];
sp.f2 = a1[1];
t = a1[2];
sp.f6 = 0x35C;
sp.fA = 0;
sp.f8 = 0;
sp.fE = a2;
sp.f10 = 0;
sp.fC = 0x7FFF;
sp.f4 = t;
func_8012C51C(&sp, a0);
}
src/ov_SC02_041/ov_SC02_041_jr_8017BEBC.c
+22 -1
View File
@@ -5764,7 +5764,28 @@ void func_80184CDC(void *arg0) {
}
INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_jr_8017BEBC", func_80184D20);
/* Sibling shape: DEFINE_func_80143BDC() in src/shared/engine_core.h (cookbook §71) */
extern s32 func_8012C51C(void *a0, s32 a1);
void func_80184D20(s32 a0, u16 *a1, s16 a2) {
struct S80190C84 sp;
u16 t;
sp.f0 = a1[0];
sp.f2 = a1[1];
t = a1[2];
sp.f6 = 0x35C;
sp.fA = 0;
sp.f8 = 0;
sp.fE = a2;
sp.f10 = 0;
sp.fC = 0x7FFF;
sp.f4 = t;
func_8012C51C(&sp, a0);
}
src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c
+91 -2
View File
@@ -4262,7 +4262,6 @@ void func_8017DEE8(void *arg0) {
extern u8 D_80078EB1;
extern u8 D_80078E78[];
extern u8 D_800AF630[];
extern Ent_8017D6EC_8017DEE8 D_801EE888[];
extern s32 func_8004787C(s32 a0);
extern void func_8012AD44(s32 *a0, s16 a1);
extern void func_8017E1B4(void *a0);
@@ -4270,6 +4269,10 @@ extern void func_8017E2C0(void *arg0);
void func_8017DF78(void *arg0)
{
/* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every
LATER function in this TU, which blocks a byte-true decl of a different type.
Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
extern Ent_8017D6EC_8017DEE8 D_801EE888[];
u8 *m;
u8 *e78;
s32 k;
@@ -8920,7 +8923,93 @@ void func_80188B80(void *a0)
}
INCLUDE_ASM("asm/ov_SC03_001/nonmatchings/ov_SC03_001_jr_8017AE2C", func_80188BFC);
/* func_80188BFC — scan the 96-entry / 0x10C-stride D_801202A0 actor table for
* the lowest-scoring slot whose u16 tag at +0 is 0x61, then splat 3 words plus
* an align-1 8-byte block into the caller's struct.
*
* Byte-verified idioms (all four were needed; each was a real residual):
*
* 1. The 0x61 compare constant is NOT a source variable. gcc keeps it in a
* callee-saved reg and LICM sinks the `li` into the loop PREHEADER, so
* `addiu $s5,$zero,0x61` lands AFTER the guard branch's delay slot. Pinning
* an `s5` local puts the `li` in the entry block instead (+1 wrong slot).
*
* 2. The 8-byte copy at +0x10 is ONE align-1 struct assign, not two 4-byte
* ones. gcc's MIPS block move loads BOTH words first (lwl/lwr $a0,
* lwl/lwr $a1) then stores both; splitting it emits load/nop/store twice
* and costs an instruction (cookbook-index: "align-1 4xu8 struct assign
* emits the inline form").
*
* 3. The parameter must NOT be register-pinned. With `register u8 *s2
* __asm__("$18")` the entry-block `move` is a schedulable body insn and
* the list scheduler ranks the higher-priority `lui $s0` chain ahead of
* it, so the anti-dependent prologue `sw`s come out in regno order
* (s0,s1,s2,s3) instead of the target's def order (s2,s0,s1,s3). Letting
* gcc allocate the incoming parameter itself keeps the copy first and the
* whole prologue falls into place. (The other five pins are still needed.)
*
* 4. After the block store, gcc-2.7.2 CSE has invalidated memory, so
* a0->0x20 is RELOADED into a second pseudo — two separate C variables,
* not one reused variable (one variable => one pseudo => $a3 for both).
* The destination pointer must also be loaded BEFORE the source pointer:
* that source order is what lets the scheduler hoist `lw $v1,0x20($s2)`
* up into the first word-copy's load-delay slot.
*/
extern s32 func_8012BD14(s32 a0);
/* align-1 8-byte payload — drives the lwl/lwr + swl/swr inline block move */
void func_80188BFC(void *a0)
{
extern u8 D_801202A0[];
register u8 *s0 __asm__("$16");
register s32 s1 __asm__("$17");
register u8 *s3 __asm__("$19");
register u8 *s4 __asm__("$20");
u8 *s2;
u8 *v0;
u8 *v1;
u8 *a0p;
s2 = (u8 *)a0;
s0 = D_801202A0;
s1 = 0x7FFF;
s3 = s0 + 0x6480;
while (s0 != s3) {
if (*(u16 *)s0 == 0x61) {
s32 v1_val = func_8012BD14((s32)s0);
if (v1_val < s1) {
s1 = v1_val;
s4 = s0;
}
}
s0 += 0x10C;
}
s0 = s4;
if (s1 == 0x7FFF) {
*(s16 *)((s32)s2 + 0x5C) = 0;
} else {
*(s32 *)(s2 + 0x4) = *(s32 *)(s0 + 0x4);
*(s32 *)(s2 + 0x8) = *(s32 *)(s0 + 0x8);
*(s32 *)(s2 + 0xC) = *(s32 *)(s0 + 0xC);
v1 = *(u8 **)(s2 + 0x20);
v0 = *(u8 **)(s0 + 0x20);
*(struct Un8_8018613C *)(v1 + 0x10) = *(struct Un8_8018613C *)(v0 + 0x10);
a0p = *(u8 **)(s2 + 0x20);
*(u16 *)(a0p + 0x12) = *(u16 *)(a0p + 0x12) - *(u16 *)(s0 + 0xFE);
*(s16 *)((s32)s2 + 0x5C) = 0x800;
}
}
INCLUDE_ASM("asm/ov_SC03_001/nonmatchings/ov_SC03_001_jr_8017AE2C", func_80188D1C);
src/ov_SC03_002/ov_SC03_002_jr_8017D604.c
+91 -2
View File
@@ -3370,10 +3370,13 @@ extern void func_8017F9D0(void *arg0);
* the C89 duplicate-typedef clash (S33); match_one compiles this file standalone (no
* TU context), so the typedef must be repeated here regardless. */
extern Ent_8017F688 D_801CB920[];
void func_8017F688(s32 *arg0)
{
/* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every
LATER function in this TU, which blocks a byte-true decl of a different type.
Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
extern Ent_8017F688 D_801CB920[];
u8 *m = D_800AF630;
u8 *q = D_80078E78;
Ent_8017F688 *p;
@@ -5500,7 +5503,93 @@ void func_8018466C(void *a0)
}
INCLUDE_ASM("asm/ov_SC03_002/nonmatchings/ov_SC03_002_jr_8017D604", func_801846E8);
/* func_801846E8 — scan the 96-entry / 0x10C-stride D_801202A0 actor table for
* the lowest-scoring slot whose u16 tag at +0 is 0x61, then splat 3 words plus
* an align-1 8-byte block into the caller's struct.
*
* Byte-verified idioms (all four were needed; each was a real residual):
*
* 1. The 0x61 compare constant is NOT a source variable. gcc keeps it in a
* callee-saved reg and LICM sinks the `li` into the loop PREHEADER, so
* `addiu $s5,$zero,0x61` lands AFTER the guard branch's delay slot. Pinning
* an `s5` local puts the `li` in the entry block instead (+1 wrong slot).
*
* 2. The 8-byte copy at +0x10 is ONE align-1 struct assign, not two 4-byte
* ones. gcc's MIPS block move loads BOTH words first (lwl/lwr $a0,
* lwl/lwr $a1) then stores both; splitting it emits load/nop/store twice
* and costs an instruction (cookbook-index: "align-1 4xu8 struct assign
* emits the inline form").
*
* 3. The parameter must NOT be register-pinned. With `register u8 *s2
* __asm__("$18")` the entry-block `move` is a schedulable body insn and
* the list scheduler ranks the higher-priority `lui $s0` chain ahead of
* it, so the anti-dependent prologue `sw`s come out in regno order
* (s0,s1,s2,s3) instead of the target's def order (s2,s0,s1,s3). Letting
* gcc allocate the incoming parameter itself keeps the copy first and the
* whole prologue falls into place. (The other five pins are still needed.)
*
* 4. After the block store, gcc-2.7.2 CSE has invalidated memory, so
* a0->0x20 is RELOADED into a second pseudo — two separate C variables,
* not one reused variable (one variable => one pseudo => $a3 for both).
* The destination pointer must also be loaded BEFORE the source pointer:
* that source order is what lets the scheduler hoist `lw $v1,0x20($s2)`
* up into the first word-copy's load-delay slot.
*/
extern s32 func_8012BD14(s32 a0);
/* align-1 8-byte payload — drives the lwl/lwr + swl/swr inline block move */
void func_801846E8(void *a0)
{
extern u8 D_801202A0[];
register u8 *s0 __asm__("$16");
register s32 s1 __asm__("$17");
register u8 *s3 __asm__("$19");
register u8 *s4 __asm__("$20");
u8 *s2;
u8 *v0;
u8 *v1;
u8 *a0p;
s2 = (u8 *)a0;
s0 = D_801202A0;
s1 = 0x7FFF;
s3 = s0 + 0x6480;
while (s0 != s3) {
if (*(u16 *)s0 == 0x61) {
s32 v1_val = func_8012BD14((s32)s0);
if (v1_val < s1) {
s1 = v1_val;
s4 = s0;
}
}
s0 += 0x10C;
}
s0 = s4;
if (s1 == 0x7FFF) {
*(s16 *)((s32)s2 + 0x5C) = 0;
} else {
*(s32 *)(s2 + 0x4) = *(s32 *)(s0 + 0x4);
*(s32 *)(s2 + 0x8) = *(s32 *)(s0 + 0x8);
*(s32 *)(s2 + 0xC) = *(s32 *)(s0 + 0xC);
v1 = *(u8 **)(s2 + 0x20);
v0 = *(u8 **)(s0 + 0x20);
*(struct Un8_8018613C *)(v1 + 0x10) = *(struct Un8_8018613C *)(v0 + 0x10);
a0p = *(u8 **)(s2 + 0x20);
*(u16 *)(a0p + 0x12) = *(u16 *)(a0p + 0x12) - *(u16 *)(s0 + 0xFE);
*(s16 *)((s32)s2 + 0x5C) = 0x800;
}
}
INCLUDE_ASM("asm/ov_SC03_002/nonmatchings/ov_SC03_002_jr_8017D604", func_80184808);
src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c
+26 -2
View File
@@ -6656,7 +6656,6 @@ extern u8 D_80078E78[];
* function actually names differ (unk1C is the only member accessed via `.`, everything
* else goes through raw casts, matching the sibling verbatim). */
extern Ent_801F7618 D_801F7618[];
extern void func_8012AD44(s32 *a0, s16 a1);
extern s32 func_8004787C(s32 a0);
@@ -6665,6 +6664,10 @@ extern void func_80182080(void *a0);
void func_80181D38(s32 *arg0)
{
/* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every
LATER function in this TU, which blocks a byte-true decl of a different type.
Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
extern Ent_801F7618 D_801F7618[];
u8 *m = D_800AF630;
u8 *q = D_80078E78;
Ent_801F7618 *p;
@@ -8869,7 +8872,28 @@ void func_8018C04C(void *arg0) {
}
INCLUDE_ASM("asm/ov_SC03_006/nonmatchings/ov_SC03_006_jr_8017AE2C", func_8018C090);
/* Sibling shape: DEFINE_func_80143BDC() in src/shared/engine_core.h (cookbook §71) */
extern s32 func_8012C51C(void *a0, s32 a1);
void func_8018C090(s32 a0, u16 *a1, s16 a2) {
struct S80190C84 sp;
u16 t;
sp.f0 = a1[0];
sp.f2 = a1[1];
t = a1[2];
sp.f6 = 0x35C;
sp.fA = 0;
sp.f8 = 0;
sp.fE = a2;
sp.f10 = 0;
sp.fC = 0x7FFF;
sp.f4 = t;
func_8012C51C(&sp, a0);
}
extern void func_80174684(void *);
extern s32 func_8018C118;
src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c
+22 -1
View File
@@ -5087,7 +5087,28 @@ void func_801872E8(void *arg0) {
}
INCLUDE_ASM("asm/ov_SC03_007/nonmatchings/ov_SC03_007_jr_8017AE2C", func_8018732C);
/* Sibling shape: DEFINE_func_80143BDC() in src/shared/engine_core.h (cookbook §71) */
extern s32 func_8012C51C(void *a0, s32 a1);
void func_8018732C(s32 a0, u16 *a1, s16 a2) {
struct S80190C84 sp;
u16 t;
sp.f0 = a1[0];
sp.f2 = a1[1];
t = a1[2];
sp.f6 = 0x35C;
sp.fA = 0;
sp.f8 = 0;
sp.fE = a2;
sp.f10 = 0;
sp.fC = 0x7FFF;
sp.f4 = t;
func_8012C51C(&sp, a0);
}
src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.c
+121 -6
View File
@@ -3422,11 +3422,6 @@ extern void func_800491AC(void *a0);
extern int rand(void);
extern void func_80017714(void *);
extern SVECTOR_8017C290 D_801EA8C0[4];
extern struct PW8017C290 D_801EA8E0;
extern struct PW8017C290 D_801EA8E4;
extern u8 D_801EA8E8, D_801EA8E9, D_801EA8EA, D_801EA8EC, D_801EA8ED, D_801EA8EE;
extern int D_801EA8F0;
extern struct PW8017C290 D_8018EF70[];
#define gte_ldv0(r0) __asm__ __volatile__( \
@@ -3452,6 +3447,14 @@ extern struct PW8017C290 D_8018EF70[];
void func_8017C290(int a, s16 *b, SVECTOR_8017C290 *c, SVECTOR_8017C290 *d,
SVECTOR_8017C290 *e, SVECTOR_8017C290 *f, s16 *g)
{
/* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every
LATER function in this TU, which blocks a byte-true decl of a different type.
Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
extern SVECTOR_8017C290 D_801EA8C0[4];
extern struct PW8017C290 D_801EA8E0;
extern struct PW8017C290 D_801EA8E4;
extern u8 D_801EA8E8, D_801EA8E9, D_801EA8EA, D_801EA8EC, D_801EA8ED, D_801EA8EE;
extern int D_801EA8F0;
MATRIX_8017C290 m;
SVECTOR_8017C290 *r0_00;
SVECTOR_8017C290 *pSVar6;
@@ -3725,7 +3728,119 @@ INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017AE2C", func_8017D19
INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017AE2C", func_8017D1E0);
INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017AE2C", func_8017D318);
extern void func_80013F3C(s32 a0);
extern void func_80017714(void *);
extern void func_8004914C();
extern void func_800491AC();
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
#define gte_ldv0(r0) __asm__ volatile ( \
"lwc2 $0, 0( %0 );" \
"lwc2 $1, 4( %0 )" \
: \
: "r"( r0 ) )
void func_8017D318(int a0, SVECTOR_8017C290 *a1, SVECTOR_8017C290 *a2, s32 a3)
{
extern struct PW8017C290 D_8018EF98[];
extern struct PW8017C290 D_8018EFAC[];
extern SVECTOR_8017C290 D_801EA8C0[4];
extern struct PW8017C290 D_801EA8E0;
extern struct PW8017C290 D_801EA8E4;
extern u8 D_801EA8E8, D_801EA8E9, D_801EA8EA, D_801EA8EC, D_801EA8ED, D_801EA8EE;
extern u8 D_801EA8E8, D_801EA8E9, D_801EA8EA, D_801EA8EC, D_801EA8ED, D_801EA8EE;
extern int D_801EA8F0;
MATRIX_8017C290 m;
SVECTOR_8017C290 *r0_00;
SVECTOR_8017C290 *r0;
SVECTOR_8017C290 *pSVar6;
D_801EA8F0 = 0x50000000;
D_801EA8E0 = D_8018EF98[*(s32 *)(a0 + 0x2C)];
D_801EA8E4 = D_8018EFAC[*(s32 *)(a0 + 0x2C)];
*(struct PW8017C290 *)&D_801EA8E8 = D_8018EF98[*(s32 *)(a0 + 0x2C)];
*(struct PW8017C290 *)&D_801EA8EC = D_8018EFAC[*(s32 *)(a0 + 0x2C)];
func_80013F3C((s32)&m);
RotMatrixZ((s16)a3, &m);
m.t[0] = *(s16 *)(a0 + 0x6);
m.t[1] = *(s16 *)(a0 + 0xA);
m.t[2] = 0;
func_8004914C(&m);
func_800491AC(&m);
r0_00 = &D_801EA8C0[0];
gte_ldv0(a1);
gte_rt();
gte_stsv(r0_00);
gte_ldv0(a2);
gte_rt();
gte_stsv(r0_00 + 1);
a1->vx = a1->vx - 2;
gte_ldv0(a1);
gte_rt();
r0 = r0_00 + 2;
gte_stsv(r0);
a2->vx = a2->vx - 2;
gte_ldv0(a2);
gte_rt();
pSVar6 = r0_00 + 3;
gte_stsv(pSVar6);
r0_00->vz = *(u16 *)(a0 + 0xE);
func_80017714(r0_00);
a1->vx = a1->vx + 4;
gte_ldv0(a1);
gte_rt();
gte_stsv(r0);
a2->vx = a2->vx + 4;
gte_ldv0(a2);
gte_rt();
gte_stsv(pSVar6);
r0_00->vz = *(u16 *)(a0 + 0xE);
func_80017714(r0_00);
}
extern s32 func_80146A6C(s32 a0, void *a1, s32 a2, s32 a3, s32 a4, s32 a5, s32 a6);
src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c
+121 -6
View File
@@ -3429,11 +3429,6 @@ extern void func_800491AC(void *a0);
extern int rand(void);
extern void func_80017714(void *);
extern SVECTOR_8017C290 D_801C1230[4];
extern struct PW8017C290 D_801C1250;
extern struct PW8017C290 D_801C1254;
extern u8 D_801C1258, D_801C1259, D_801C125A, D_801C125C, D_801C125D, D_801C125E;
extern int D_801C1260;
extern struct PW8017C290 D_8018A910[];
#define gte_ldv0(r0) __asm__ __volatile__( \
@@ -3459,6 +3454,14 @@ extern struct PW8017C290 D_8018A910[];
void func_8017C290(int a, s16 *b, SVECTOR_8017C290 *c, SVECTOR_8017C290 *d,
SVECTOR_8017C290 *e, SVECTOR_8017C290 *f, s16 *g)
{
/* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every
LATER function in this TU, which blocks a byte-true decl of a different type.
Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
extern SVECTOR_8017C290 D_801C1230[4];
extern struct PW8017C290 D_801C1250;
extern struct PW8017C290 D_801C1254;
extern u8 D_801C1258, D_801C1259, D_801C125A, D_801C125C, D_801C125D, D_801C125E;
extern int D_801C1260;
MATRIX_8017C290 m;
SVECTOR_8017C290 *r0_00;
SVECTOR_8017C290 *pSVar6;
@@ -3732,7 +3735,119 @@ INCLUDE_ASM("asm/ov_SC03_024/nonmatchings/ov_SC03_024_jr_8017AE2C", func_8017D19
INCLUDE_ASM("asm/ov_SC03_024/nonmatchings/ov_SC03_024_jr_8017AE2C", func_8017D1E0);
INCLUDE_ASM("asm/ov_SC03_024/nonmatchings/ov_SC03_024_jr_8017AE2C", func_8017D318);
extern void func_80013F3C(s32 a0);
extern void func_80017714(void *);
extern void func_8004914C();
extern void func_800491AC();
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
#define gte_ldv0(r0) __asm__ volatile ( \
"lwc2 $0, 0( %0 );" \
"lwc2 $1, 4( %0 )" \
: \
: "r"( r0 ) )
void func_8017D318(int a0, SVECTOR_8017C290 *a1, SVECTOR_8017C290 *a2, s32 a3)
{
extern struct PW8017C290 D_8018A938[];
extern struct PW8017C290 D_8018A94C[];
extern SVECTOR_8017C290 D_801C1230[4];
extern struct PW8017C290 D_801C1250;
extern struct PW8017C290 D_801C1254;
extern u8 D_801C1258, D_801EA8E9, D_801EA8EA, D_801C125C, D_801EA8ED, D_801EA8EE;
extern u8 D_801C1258, D_801EA8E9, D_801EA8EA, D_801C125C, D_801EA8ED, D_801EA8EE;
extern int D_801C1260;
MATRIX_8017C290 m;
SVECTOR_8017C290 *r0_00;
SVECTOR_8017C290 *r0;
SVECTOR_8017C290 *pSVar6;
D_801C1260 = 0x50000000;
D_801C1250 = D_8018A938[*(s32 *)(a0 + 0x2C)];
D_801C1254 = D_8018A94C[*(s32 *)(a0 + 0x2C)];
*(struct PW8017C290 *)&D_801C1258 = D_8018A938[*(s32 *)(a0 + 0x2C)];
*(struct PW8017C290 *)&D_801C125C = D_8018A94C[*(s32 *)(a0 + 0x2C)];
func_80013F3C((s32)&m);
RotMatrixZ((s16)a3, &m);
m.t[0] = *(s16 *)(a0 + 0x6);
m.t[1] = *(s16 *)(a0 + 0xA);
m.t[2] = 0;
func_8004914C(&m);
func_800491AC(&m);
r0_00 = &D_801C1230[0];
gte_ldv0(a1);
gte_rt();
gte_stsv(r0_00);
gte_ldv0(a2);
gte_rt();
gte_stsv(r0_00 + 1);
a1->vx = a1->vx - 2;
gte_ldv0(a1);
gte_rt();
r0 = r0_00 + 2;
gte_stsv(r0);
a2->vx = a2->vx - 2;
gte_ldv0(a2);
gte_rt();
pSVar6 = r0_00 + 3;
gte_stsv(pSVar6);
r0_00->vz = *(u16 *)(a0 + 0xE);
func_80017714(r0_00);
a1->vx = a1->vx + 4;
gte_ldv0(a1);
gte_rt();
gte_stsv(r0);
a2->vx = a2->vx + 4;
gte_ldv0(a2);
gte_rt();
gte_stsv(pSVar6);
r0_00->vz = *(u16 *)(a0 + 0xE);
func_80017714(r0_00);
}
extern s32 func_80146A6C(s32 a0, void *a1, s32 a2, s32 a3, s32 a4, s32 a5, s32 a6);
src/ov_SC03_089/ov_SC03_089_jr_8017CA80.c
+66 -3
View File
@@ -7908,16 +7908,79 @@ void func_8018912C(void *a0) {
INCLUDE_ASM("asm/ov_SC03_089/nonmatchings/ov_SC03_089_jr_8017CA80", func_80189168);
INCLUDE_ASM("asm/ov_SC03_089/nonmatchings/ov_SC03_089_jr_8017CA80", func_8018935C);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018935C(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801C3C60;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801C3C60;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_089/nonmatchings/ov_SC03_089_jr_8017CA80", func_8018940C);
INCLUDE_ASM("asm/ov_SC03_089/nonmatchings/ov_SC03_089_jr_8017CA80", func_801894BC);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801C3CB0,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_801894BC(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_801C3CB0;
extern s32 D_800A5E90;
D_800A5E88 = D_801C3CB0;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_8018956C(void) {
}
INCLUDE_ASM("asm/ov_SC03_089/nonmatchings/ov_SC03_089_jr_8017CA80", func_80189574);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80189574(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801C3CE8;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801C3CE8;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
src/ov_SC03_090/ov_SC03_090_jr_8017CA80.c
+66 -3
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@@ -8595,16 +8595,79 @@ void func_8018B550(void *a0) {
INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_8018B58C);
INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_8018B780);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018B780(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801C90CC;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801C90CC;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_8018B830);
INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_8018B8E0);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801C911C,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018B8E0(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_801C911C;
extern s32 D_800A5E90;
D_800A5E88 = D_801C911C;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_8018B990(void) {
}
INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_8018B998);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018B998(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801C9154;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801C9154;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
src/ov_SC03_091/ov_SC03_091_jr_80182268.c
+66 -3
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@@ -7087,14 +7087,77 @@ void func_8018C3F8(void *a0) {
INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_jr_80182268", func_8018C434);
INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_jr_80182268", func_8018C628);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018C628(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801CF798;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801CF798;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_jr_80182268", func_8018C6D8);
INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_jr_80182268", func_8018C788);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801CF7E8,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018C788(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_801CF7E8;
extern s32 D_800A5E90;
D_800A5E88 = D_801CF7E8;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_8018C838(void) {
}
INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_jr_80182268", func_8018C840);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018C840(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801CF820;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801CF820;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c
+66 -3
View File
@@ -5436,16 +5436,79 @@ void func_80182C00(void *a0) {
INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092_jr_8017AE2C", func_80182C3C);
INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092_jr_8017AE2C", func_80182E30);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80182E30(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801AFDE8;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801AFDE8;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092_jr_8017AE2C", func_80182EE0);
INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092_jr_8017AE2C", func_80182F90);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801AFE38,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80182F90(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_801AFE38;
extern s32 D_800A5E90;
D_800A5E88 = D_801AFE38;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_80183040(void) {
}
INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092_jr_8017AE2C", func_80183048);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80183048(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801AFE70;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801AFE70;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
extern void (*D_801B01E8[])(void);
src/ov_SC03_093/ov_SC03_093_jr_8017D898.c
+66 -3
View File
@@ -6574,16 +6574,79 @@ void func_801859A0(void *a0) {
INCLUDE_ASM("asm/ov_SC03_093/nonmatchings/ov_SC03_093_jr_8017D898", func_801859DC);
INCLUDE_ASM("asm/ov_SC03_093/nonmatchings/ov_SC03_093_jr_8017D898", func_80185BD0);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80185BD0(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801C97C4;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801C97C4;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_093/nonmatchings/ov_SC03_093_jr_8017D898", func_80185C80);
INCLUDE_ASM("asm/ov_SC03_093/nonmatchings/ov_SC03_093_jr_8017D898", func_80185D30);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801C9814,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80185D30(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_801C9814;
extern s32 D_800A5E90;
D_800A5E88 = D_801C9814;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_80185DE0(void) {
}
INCLUDE_ASM("asm/ov_SC03_093/nonmatchings/ov_SC03_093_jr_8017D898", func_80185DE8);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80185DE8(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801C984C;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801C984C;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
src/ov_SC03_094/ov_SC03_094_jr_8017BEBC.c
+66 -3
View File
@@ -7601,16 +7601,79 @@ void func_8018739C(void *a0) {
INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_jr_8017BEBC", func_801873D8);
INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_jr_8017BEBC", func_801875CC);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_801875CC(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801D0600;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801D0600;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_jr_8017BEBC", func_8018767C);
INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_jr_8017BEBC", func_8018772C);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801D0650,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018772C(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_801D0650;
extern s32 D_800A5E90;
D_800A5E88 = D_801D0650;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_801877DC(void) {
}
INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_jr_8017BEBC", func_801877E4);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_801877E4(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801D0688;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801D0688;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
src/ov_SC03_095/ov_SC03_095_jr_8017BEBC.c
+66 -3
View File
@@ -4603,16 +4603,79 @@ void func_801809FC(void *a0) {
INCLUDE_ASM("asm/ov_SC03_095/nonmatchings/ov_SC03_095_jr_8017BEBC", func_80180A38);
INCLUDE_ASM("asm/ov_SC03_095/nonmatchings/ov_SC03_095_jr_8017BEBC", func_80180C2C);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80180C2C(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_8019922C;
extern s32 D_800A5EB0;
D_800A5EA8 = D_8019922C;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_095/nonmatchings/ov_SC03_095_jr_8017BEBC", func_80180CDC);
INCLUDE_ASM("asm/ov_SC03_095/nonmatchings/ov_SC03_095_jr_8017BEBC", func_80180D8C);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_8019927C,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80180D8C(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_8019927C;
extern s32 D_800A5E90;
D_800A5E88 = D_8019927C;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_80180E3C(void) {
}
INCLUDE_ASM("asm/ov_SC03_095/nonmatchings/ov_SC03_095_jr_8017BEBC", func_80180E44);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80180E44(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801992B4;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801992B4;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
src/ov_SC03_096/ov_SC03_096_jr_8017BEBC.c
+66 -3
View File
@@ -4501,16 +4501,79 @@ void func_8018057C(void *a0) {
INCLUDE_ASM("asm/ov_SC03_096/nonmatchings/ov_SC03_096_jr_8017BEBC", func_801805B8);
INCLUDE_ASM("asm/ov_SC03_096/nonmatchings/ov_SC03_096_jr_8017BEBC", func_801807AC);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_801807AC(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_80197CE0;
extern s32 D_800A5EB0;
D_800A5EA8 = D_80197CE0;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_096/nonmatchings/ov_SC03_096_jr_8017BEBC", func_8018085C);
INCLUDE_ASM("asm/ov_SC03_096/nonmatchings/ov_SC03_096_jr_8017BEBC", func_8018090C);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_80197D30,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018090C(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_80197D30;
extern s32 D_800A5E90;
D_800A5E88 = D_80197D30;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_801809BC(void) {
}
INCLUDE_ASM("asm/ov_SC03_096/nonmatchings/ov_SC03_096_jr_8017BEBC", func_801809C4);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_801809C4(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_80197D68;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_80197D68;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
src/ov_SC03_097/ov_SC03_097_jr_8017D898.c
+66 -3
View File
@@ -6148,16 +6148,79 @@ void func_8018517C(void *a0) {
INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097_jr_8017D898", func_801851B8);
INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097_jr_8017D898", func_801853AC);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_801853AC(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801A7318;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801A7318;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097_jr_8017D898", func_8018545C);
INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097_jr_8017D898", func_8018550C);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801A7368,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018550C(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_801A7368;
extern s32 D_800A5E90;
D_800A5E88 = D_801A7368;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_801855BC(void) {
}
INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097_jr_8017D898", func_801855C4);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_801855C4(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801A73A0;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801A73A0;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
extern void (*D_801A7718[])(void);
src/ov_SC03_098/ov_SC03_098_jr_8017D898.c
+66 -3
View File
@@ -6888,16 +6888,79 @@ void func_80184DE8(void *a0) {
INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_jr_8017D898", func_80184E24);
INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_jr_8017D898", func_80185018);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80185018(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801C29D4;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801C29D4;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_jr_8017D898", func_801850C8);
INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_jr_8017D898", func_80185178);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801C2A24,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80185178(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_801C2A24;
extern s32 D_800A5E90;
D_800A5E88 = D_801C2A24;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_80185228(void) {
}
INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_jr_8017D898", func_80185230);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80185230(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801C2A5C;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801C2A5C;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
src/ov_SC03_099/ov_SC03_099_jr_8017BEBC.c
+66 -3
View File
@@ -7026,16 +7026,79 @@ void func_80182EE8(void *a0) {
INCLUDE_ASM("asm/ov_SC03_099/nonmatchings/ov_SC03_099_jr_8017BEBC", func_80182F24);
INCLUDE_ASM("asm/ov_SC03_099/nonmatchings/ov_SC03_099_jr_8017BEBC", func_80183118);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80183118(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801BC6A8;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801BC6A8;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_099/nonmatchings/ov_SC03_099_jr_8017BEBC", func_801831C8);
INCLUDE_ASM("asm/ov_SC03_099/nonmatchings/ov_SC03_099_jr_8017BEBC", func_80183278);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801BC6F8,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80183278(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_801BC6F8;
extern s32 D_800A5E90;
D_800A5E88 = D_801BC6F8;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_80183328(void) {
}
INCLUDE_ASM("asm/ov_SC03_099/nonmatchings/ov_SC03_099_jr_8017BEBC", func_80183330);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80183330(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801BC730;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801BC730;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
src/ov_SC03_100/ov_SC03_100_jr_8017D898.c
+66 -3
View File
@@ -6574,16 +6574,79 @@ void func_80183BD4(void *a0) {
INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100_jr_8017D898", func_80183C10);
INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100_jr_8017D898", func_80183E04);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80183E04(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801C4EF4;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801C4EF4;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100_jr_8017D898", func_80183EB4);
INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100_jr_8017D898", func_80183F64);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801C4F44,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80183F64(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_801C4F44;
extern s32 D_800A5E90;
D_800A5E88 = D_801C4F44;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_80184014(void) {
}
INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100_jr_8017D898", func_8018401C);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018401C(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801C4F7C;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801C4F7C;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
extern void (*D_801C52F4[])(void);
src/ov_SC03_101/ov_SC03_101_jr_8017CA80.c
+66 -3
View File
@@ -6095,16 +6095,79 @@ void func_80183390(void *a0) {
INCLUDE_ASM("asm/ov_SC03_101/nonmatchings/ov_SC03_101_jr_8017CA80", func_801833CC);
INCLUDE_ASM("asm/ov_SC03_101/nonmatchings/ov_SC03_101_jr_8017CA80", func_801835C0);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_801835C0(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_8019B1F4;
extern s32 D_800A5EB0;
D_800A5EA8 = D_8019B1F4;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_101/nonmatchings/ov_SC03_101_jr_8017CA80", func_80183670);
INCLUDE_ASM("asm/ov_SC03_101/nonmatchings/ov_SC03_101_jr_8017CA80", func_80183720);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_8019B244,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80183720(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_8019B244;
extern s32 D_800A5E90;
D_800A5E88 = D_8019B244;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_801837D0(void) {
}
INCLUDE_ASM("asm/ov_SC03_101/nonmatchings/ov_SC03_101_jr_8017CA80", func_801837D8);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_801837D8(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_8019B27C;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_8019B27C;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
src/ov_SC03_102/ov_SC03_102_jr_8017BEBC.c
+66 -3
View File
@@ -6913,16 +6913,79 @@ void func_80185594(void *a0) {
INCLUDE_ASM("asm/ov_SC03_102/nonmatchings/ov_SC03_102_jr_8017BEBC", func_801855D0);
INCLUDE_ASM("asm/ov_SC03_102/nonmatchings/ov_SC03_102_jr_8017BEBC", func_801857C4);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_801857C4(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801B6E0C;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801B6E0C;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_102/nonmatchings/ov_SC03_102_jr_8017BEBC", func_80185874);
INCLUDE_ASM("asm/ov_SC03_102/nonmatchings/ov_SC03_102_jr_8017BEBC", func_80185924);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801B6E5C,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80185924(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_801B6E5C;
extern s32 D_800A5E90;
D_800A5E88 = D_801B6E5C;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_801859D4(void) {
}
INCLUDE_ASM("asm/ov_SC03_102/nonmatchings/ov_SC03_102_jr_8017BEBC", func_801859DC);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_801859DC(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801B6E94;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801B6E94;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
extern void (*D_801B6EDC[])(void);
src/ov_SC03_103/ov_SC03_103_jr_8017C294.c
+66 -3
View File
@@ -7443,16 +7443,79 @@ void func_80183BF8(void *a0) {
INCLUDE_ASM("asm/ov_SC03_103/nonmatchings/ov_SC03_103_jr_8017C294", func_80183C34);
INCLUDE_ASM("asm/ov_SC03_103/nonmatchings/ov_SC03_103_jr_8017C294", func_80183E28);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80183E28(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801C2024;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801C2024;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_103/nonmatchings/ov_SC03_103_jr_8017C294", func_80183ED8);
INCLUDE_ASM("asm/ov_SC03_103/nonmatchings/ov_SC03_103_jr_8017C294", func_80183F88);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801C2074,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80183F88(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_801C2074;
extern s32 D_800A5E90;
D_800A5E88 = D_801C2074;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_80184038(void) {
}
INCLUDE_ASM("asm/ov_SC03_103/nonmatchings/ov_SC03_103_jr_8017C294", func_80184040);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80184040(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801C20AC;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801C20AC;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
src/ov_SC03_104/ov_SC03_104_jr_8017CA80.c
+66 -3
View File
@@ -8400,16 +8400,79 @@ void func_80189FA8(void *a0) {
INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104_jr_8017CA80", func_80189FE4);
INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104_jr_8017CA80", func_8018A1D8);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018A1D8(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801BCB4C;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801BCB4C;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104_jr_8017CA80", func_8018A288);
INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104_jr_8017CA80", func_8018A338);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801BCB9C,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018A338(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_801BCB9C;
extern s32 D_800A5E90;
D_800A5E88 = D_801BCB9C;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_8018A3E8(void) {
}
INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104_jr_8017CA80", func_8018A3F0);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018A3F0(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801BCBD4;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801BCBD4;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
extern void (*D_801BCF4C[])(void);
src/ov_SC03_105/ov_SC03_105_jr_8017C8D0.c
+66 -3
View File
@@ -4278,16 +4278,79 @@ void func_8018975C(void *a0) {
INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105_jr_8017C8D0", func_80189798);
INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105_jr_8017C8D0", func_8018998C);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_8018998C(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801B6818;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801B6818;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105_jr_8017C8D0", func_80189A3C);
INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105_jr_8017C8D0", func_80189AEC);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_801B6868,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80189AEC(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_801B6868;
extern s32 D_800A5E90;
D_800A5E88 = D_801B6868;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_80189B9C(void) {
}
INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105_jr_8017C8D0", func_80189BA4);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80189BA4(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_801B68A0;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_801B68A0;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
extern void (*D_801B68E8[])(void);
src/ov_SC03_112/ov_SC03_112_jr_80183AE0.c
+22 -1
View File
@@ -3499,7 +3499,28 @@ void func_80185638(void *arg0) {
}
INCLUDE_ASM("asm/ov_SC03_112/nonmatchings/ov_SC03_112_jr_80183AE0", func_8018567C);
/* Sibling shape: DEFINE_func_80143BDC() in src/shared/engine_core.h (cookbook §71) */
extern s32 func_8012C51C(void *a0, s32 a1);
void func_8018567C(s32 a0, u16 *a1, s16 a2) {
struct S80190C84 sp;
u16 t;
sp.f0 = a1[0];
sp.f2 = a1[1];
t = a1[2];
sp.f6 = 0x35C;
sp.fA = 0;
sp.f8 = 0;
sp.fE = a2;
sp.f10 = 0;
sp.fC = 0x7FFF;
sp.f4 = t;
func_8012C51C(&sp, a0);
}
src/ov_SC03_115/ov_SC03_115_jr_8017BEBC.c
+22 -1
View File
@@ -4559,7 +4559,28 @@ void func_801803BC(void *arg0) {
}
INCLUDE_ASM("asm/ov_SC03_115/nonmatchings/ov_SC03_115_jr_8017BEBC", func_80180400);
/* Sibling shape: DEFINE_func_80143BDC() in src/shared/engine_core.h (cookbook §71) */
extern s32 func_8012C51C(void *a0, s32 a1);
void func_80180400(s32 a0, u16 *a1, s16 a2) {
struct S80190C84 sp;
u16 t;
sp.f0 = a1[0];
sp.f2 = a1[1];
t = a1[2];
sp.f6 = 0x35C;
sp.fA = 0;
sp.f8 = 0;
sp.fE = a2;
sp.f10 = 0;
sp.fC = 0x7FFF;
sp.f4 = t;
func_8012C51C(&sp, a0);
}
src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c
+66 -3
View File
@@ -4508,16 +4508,79 @@ void func_80182378(void *a0) {
INCLUDE_ASM("asm/ov_SC03_116/nonmatchings/ov_SC03_116_jr_8017AE2C", func_801823B4);
INCLUDE_ASM("asm/ov_SC03_116/nonmatchings/ov_SC03_116_jr_8017AE2C", func_801825A8);
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_801825A8(void *a0) {
extern struct B16_80185634 D_800A5EA8;
extern struct B16_80185634 D_801950BC;
extern s32 D_800A5EB0;
D_800A5EA8 = D_801950BC;
D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(2, &D_800A5EA8);
}
INCLUDE_ASM("asm/ov_SC03_116/nonmatchings/ov_SC03_116_jr_8017AE2C", func_80182658);
INCLUDE_ASM("asm/ov_SC03_116/nonmatchings/ov_SC03_116_jr_8017AE2C", func_80182708);
/* §71 sibling-first: func_80185634 (same TU, already MATCHed) is the exact template.
* Deltas: record D_800A5EA8<-D_801CCBF8 becomes D_800A5E88<-D_8019510C,
* *10/4096-5 becomes *20/4096-10, slot 2 becomes slot 0.
* The scaled member (D_800A5E90) is record base +8, written as a DIRECT global so it
* emits `lui $at; sw %lo(..)($at)` rather than folding onto the $s1 record base. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_80182708(void *a0) {
extern struct B16_80185794 D_800A5E88;
extern struct B16_80185794 D_8019510C;
extern s32 D_800A5E90;
D_800A5E88 = D_8019510C;
D_800A5E90 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 20 / 4096 - 10;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &D_800A5E88);
}
void func_801827B8(void) {
}
INCLUDE_ASM("asm/ov_SC03_116/nonmatchings/ov_SC03_116_jr_8017AE2C", func_801827C0);
/* §37 data asm-label alias: the TU already declares
* extern struct B16_80185794 D_800A5E88;
* at file scope (that tag is defined next to func_80185794). Re-declaring the
* symbol with this function's own 16-byte record tag is a `conflicting types`
* error, and the tag cannot be re-defined either. Aliasing a private C
* identifier onto the same linker symbol sidesteps the collision at zero blast
* radius and emits the identical %hi/%lo(D_800A5E88) pair. */
extern s32 func_8004787C(s32 a0);
extern void func_80028620(s32 a0, void *a1);
void func_801827C0(void *a0) {
extern struct B16_8018584C aD800A5E88 __asm__("D_800A5E88");
extern struct B16_8018584C D_80195144;
extern s32 D_800A5E90;
s32 t;
aD800A5E88 = D_80195144;
t = func_8004787C(*(s16 *)((s32)a0 + 0xFE));
if (t < 0) t += 0x1FF;
D_800A5E90 = (t >> 9) + 8;
*(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF;
func_80028620(0, &aD800A5E88);
}
src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c
+230 -2
View File
@@ -3393,7 +3393,123 @@ DEFINE_func_8017C14C() /* dedup: shared engine-core @0x8017C14C (src/shared) */
INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118_jr_8017AE2C", func_8017C154);
INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118_jr_8017AE2C", func_8017C290);
extern void func_80013F3C(s32 a0);
extern void func_80017714(void *);
extern void func_8004914C();
extern void func_800491AC();
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
void func_8017C290(int a, s16 *b, SVECTOR_8017E72C *c, SVECTOR_8017E72C *d,
SVECTOR_8017E72C *e, SVECTOR_8017E72C *f, s16 *g)
{
extern struct PW8017E72C D_8018D36C[];
/* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every
LATER function in this TU, which blocks a byte-true decl of a different type.
Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
extern SVECTOR_8017E72C D_801D42A8[4];
extern struct PW8017E72C D_801D42C8;
extern struct PW8017E72C D_801D42CC;
extern u8 D_801D42D0, D_801D42D1, D_801D42D2, D_801D42D4, D_801D42D5, D_801D42D6;
extern int D_801D42D8;
MATRIX_8017E72C m;
SVECTOR_8017E72C *r0_00;
SVECTOR_8017E72C *pSVar6;
SVECTOR_8017E72C *r0;
int r;
int mask;
func_80013F3C((s32)&m);
RotMatrixZ(g[0], &m);
m.t[0] = b[0];
m.t[1] = b[1];
m.t[2] = 0;
func_8004914C(&m);
func_800491AC(&m);
r0_00 = &D_801D42A8[0];
if (*(s16 *)(a + 0x12) == 0) {
D_801D42D8 = 0x50000000;
D_801D42C8 = D_8018D36C[*(s32 *)(a + 0x2C)];
D_801D42CC = D_8018D36C[*(s32 *)(a + 0x2C)];
D_801D42D0 = 0;
D_801D42D1 = 0;
D_801D42D2 = 0;
D_801D42D4 = 0;
D_801D42D5 = 0;
D_801D42D6 = 0;
}
f->vx = f->vx + c->vx;
f->vy = f->vy + c->vy;
r = rand();
mask = f->pad & r;
if (*(u16 *)(a + 0x12) & 1)
f->vx = f->vx + mask;
else
f->vx = f->vx - mask;
r = rand();
{ int t = f->vy - 0x10; f->vy = t + (r & 0x1f); }
gte_ldv0(c);
gte_rt();
gte_stsv(r0_00);
gte_ldv0(f);
gte_rt();
gte_stsv(r0_00 + 1);
gte_ldv0(d);
gte_rt();
r0 = r0_00 + 2;
gte_stsv(r0);
*d = *f;
r = rand();
d->vx = d->vx - (f->pad & r);
gte_ldv0(d);
gte_rt();
pSVar6 = r0_00 + 3;
gte_stsv(pSVar6);
r0_00->vz = ((u16 *)b)[2];
func_80017714(r0_00);
gte_ldv0(e);
gte_rt();
gte_stsv(r0);
*e = *f;
r = rand();
e->vx = e->vx + (f->pad & r);
gte_ldv0(e);
gte_rt();
gte_stsv(pSVar6);
r0_00->vz = ((u16 *)b)[2];
func_80017714(r0_00);
*c = *f;
}
INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118_jr_8017AE2C", func_8017C624);
@@ -3585,7 +3701,119 @@ INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118_jr_8017AE2C", func_8017D19
INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118_jr_8017AE2C", func_8017D1E0);
INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118_jr_8017AE2C", func_8017D318);
extern void func_80013F3C(s32 a0);
extern void func_80017714(void *);
extern void func_8004914C();
extern void func_800491AC();
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
#define gte_ldv0(r0) __asm__ volatile ( \
"lwc2 $0, 0( %0 );" \
"lwc2 $1, 4( %0 )" \
: \
: "r"( r0 ) )
void func_8017D318(int a0, SVECTOR_8017C290 *a1, SVECTOR_8017C290 *a2, s32 a3)
{
extern struct PW8017C290 D_8018D394[];
extern struct PW8017C290 D_8018D3A8[];
extern SVECTOR_8017C290 D_801D42A8[4];
extern struct PW8017C290 D_801D42C8;
extern struct PW8017C290 D_801D42CC;
extern u8 D_801D42D0, D_801EA8E9, D_801EA8EA, D_801D42D4, D_801EA8ED, D_801EA8EE;
extern u8 D_801D42D0, D_801EA8E9, D_801EA8EA, D_801D42D4, D_801EA8ED, D_801EA8EE;
extern int D_801D42D8;
MATRIX_8017C290 m;
SVECTOR_8017C290 *r0_00;
SVECTOR_8017C290 *r0;
SVECTOR_8017C290 *pSVar6;
D_801D42D8 = 0x50000000;
D_801D42C8 = D_8018D394[*(s32 *)(a0 + 0x2C)];
D_801D42CC = D_8018D3A8[*(s32 *)(a0 + 0x2C)];
*(struct PW8017C290 *)&D_801D42D0 = D_8018D394[*(s32 *)(a0 + 0x2C)];
*(struct PW8017C290 *)&D_801D42D4 = D_8018D3A8[*(s32 *)(a0 + 0x2C)];
func_80013F3C((s32)&m);
RotMatrixZ((s16)a3, &m);
m.t[0] = *(s16 *)(a0 + 0x6);
m.t[1] = *(s16 *)(a0 + 0xA);
m.t[2] = 0;
func_8004914C(&m);
func_800491AC(&m);
r0_00 = &D_801D42A8[0];
gte_ldv0(a1);
gte_rt();
gte_stsv(r0_00);
gte_ldv0(a2);
gte_rt();
gte_stsv(r0_00 + 1);
a1->vx = a1->vx - 2;
gte_ldv0(a1);
gte_rt();
r0 = r0_00 + 2;
gte_stsv(r0);
a2->vx = a2->vx - 2;
gte_ldv0(a2);
gte_rt();
pSVar6 = r0_00 + 3;
gte_stsv(pSVar6);
r0_00->vz = *(u16 *)(a0 + 0xE);
func_80017714(r0_00);
a1->vx = a1->vx + 4;
gte_ldv0(a1);
gte_rt();
gte_stsv(r0);
a2->vx = a2->vx + 4;
gte_ldv0(a2);
gte_rt();
gte_stsv(pSVar6);
r0_00->vz = *(u16 *)(a0 + 0xE);
func_80017714(r0_00);
}
extern s32 func_80146A6C(s32 a0, void *a1, s32 a2, s32 a3, s32 a4, s32 a5, s32 a6);
src/ov_SC03_119/ov_SC03_119_jr_8017AE2C.c
+230 -2
View File
@@ -3387,7 +3387,123 @@ DEFINE_func_8017C14C() /* dedup: shared engine-core @0x8017C14C (src/shared) */
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017AE2C", func_8017C154);
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017AE2C", func_8017C290);
extern void func_80013F3C(s32 a0);
extern void func_80017714(void *);
extern void func_8004914C();
extern void func_800491AC();
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
void func_8017C290(int a, s16 *b, SVECTOR_8017E72C *c, SVECTOR_8017E72C *d,
SVECTOR_8017E72C *e, SVECTOR_8017E72C *f, s16 *g)
{
extern struct PW8017E72C D_8018D36C[];
/* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every
LATER function in this TU, which blocks a byte-true decl of a different type.
Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
extern SVECTOR_8017E72C D_801D42A8[4];
extern struct PW8017E72C D_801D42C8;
extern struct PW8017E72C D_801D42CC;
extern u8 D_801D42D0, D_801D42D1, D_801D42D2, D_801D42D4, D_801D42D5, D_801D42D6;
extern int D_801D42D8;
MATRIX_8017E72C m;
SVECTOR_8017E72C *r0_00;
SVECTOR_8017E72C *pSVar6;
SVECTOR_8017E72C *r0;
int r;
int mask;
func_80013F3C((s32)&m);
RotMatrixZ(g[0], &m);
m.t[0] = b[0];
m.t[1] = b[1];
m.t[2] = 0;
func_8004914C(&m);
func_800491AC(&m);
r0_00 = &D_801D42A8[0];
if (*(s16 *)(a + 0x12) == 0) {
D_801D42D8 = 0x50000000;
D_801D42C8 = D_8018D36C[*(s32 *)(a + 0x2C)];
D_801D42CC = D_8018D36C[*(s32 *)(a + 0x2C)];
D_801D42D0 = 0;
D_801D42D1 = 0;
D_801D42D2 = 0;
D_801D42D4 = 0;
D_801D42D5 = 0;
D_801D42D6 = 0;
}
f->vx = f->vx + c->vx;
f->vy = f->vy + c->vy;
r = rand();
mask = f->pad & r;
if (*(u16 *)(a + 0x12) & 1)
f->vx = f->vx + mask;
else
f->vx = f->vx - mask;
r = rand();
{ int t = f->vy - 0x10; f->vy = t + (r & 0x1f); }
gte_ldv0(c);
gte_rt();
gte_stsv(r0_00);
gte_ldv0(f);
gte_rt();
gte_stsv(r0_00 + 1);
gte_ldv0(d);
gte_rt();
r0 = r0_00 + 2;
gte_stsv(r0);
*d = *f;
r = rand();
d->vx = d->vx - (f->pad & r);
gte_ldv0(d);
gte_rt();
pSVar6 = r0_00 + 3;
gte_stsv(pSVar6);
r0_00->vz = ((u16 *)b)[2];
func_80017714(r0_00);
gte_ldv0(e);
gte_rt();
gte_stsv(r0);
*e = *f;
r = rand();
e->vx = e->vx + (f->pad & r);
gte_ldv0(e);
gte_rt();
gte_stsv(pSVar6);
r0_00->vz = ((u16 *)b)[2];
func_80017714(r0_00);
*c = *f;
}
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017AE2C", func_8017C624);
@@ -3579,7 +3695,119 @@ INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017AE2C", func_8017D19
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017AE2C", func_8017D1E0);
INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017AE2C", func_8017D318);
extern void func_80013F3C(s32 a0);
extern void func_80017714(void *);
extern void func_8004914C();
extern void func_800491AC();
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
#define gte_ldv0(r0) __asm__ volatile ( \
"lwc2 $0, 0( %0 );" \
"lwc2 $1, 4( %0 )" \
: \
: "r"( r0 ) )
void func_8017D318(int a0, SVECTOR_8017C290 *a1, SVECTOR_8017C290 *a2, s32 a3)
{
extern struct PW8017C290 D_8018D394[];
extern struct PW8017C290 D_8018D3A8[];
extern SVECTOR_8017C290 D_801D42A8[4];
extern struct PW8017C290 D_801D42C8;
extern struct PW8017C290 D_801D42CC;
extern u8 D_801D42D0, D_801EA8E9, D_801EA8EA, D_801D42D4, D_801EA8ED, D_801EA8EE;
extern u8 D_801D42D0, D_801EA8E9, D_801EA8EA, D_801D42D4, D_801EA8ED, D_801EA8EE;
extern int D_801D42D8;
MATRIX_8017C290 m;
SVECTOR_8017C290 *r0_00;
SVECTOR_8017C290 *r0;
SVECTOR_8017C290 *pSVar6;
D_801D42D8 = 0x50000000;
D_801D42C8 = D_8018D394[*(s32 *)(a0 + 0x2C)];
D_801D42CC = D_8018D3A8[*(s32 *)(a0 + 0x2C)];
*(struct PW8017C290 *)&D_801D42D0 = D_8018D394[*(s32 *)(a0 + 0x2C)];
*(struct PW8017C290 *)&D_801D42D4 = D_8018D3A8[*(s32 *)(a0 + 0x2C)];
func_80013F3C((s32)&m);
RotMatrixZ((s16)a3, &m);
m.t[0] = *(s16 *)(a0 + 0x6);
m.t[1] = *(s16 *)(a0 + 0xA);
m.t[2] = 0;
func_8004914C(&m);
func_800491AC(&m);
r0_00 = &D_801D42A8[0];
gte_ldv0(a1);
gte_rt();
gte_stsv(r0_00);
gte_ldv0(a2);
gte_rt();
gte_stsv(r0_00 + 1);
a1->vx = a1->vx - 2;
gte_ldv0(a1);
gte_rt();
r0 = r0_00 + 2;
gte_stsv(r0);
a2->vx = a2->vx - 2;
gte_ldv0(a2);
gte_rt();
pSVar6 = r0_00 + 3;
gte_stsv(pSVar6);
r0_00->vz = *(u16 *)(a0 + 0xE);
func_80017714(r0_00);
a1->vx = a1->vx + 4;
gte_ldv0(a1);
gte_rt();
gte_stsv(r0);
a2->vx = a2->vx + 4;
gte_ldv0(a2);
gte_rt();
gte_stsv(pSVar6);
r0_00->vz = *(u16 *)(a0 + 0xE);
func_80017714(r0_00);
}
extern s32 func_80146A6C(s32 a0, void *a1, s32 a2, s32 a3, s32 a4, s32 a5, s32 a6);
src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c
+112 -3
View File
@@ -47,7 +47,6 @@ extern void func_80162120(void);
extern void func_80029124(s32, s32);
extern s32 func_80165A50(s32);
extern void func_80029514(s32);
extern u8 D_800AF630[];
extern u8 D_80078EC0;
extern s32 func_80028FBC(void);
extern s32 func_80029000(void);
@@ -5854,7 +5853,31 @@ void func_80183918(void *arg0) {
INCLUDE_ASM("asm/ov_SC03_124/nonmatchings/ov_SC03_124_jr_8017AE2C", func_801839A8);
INCLUDE_ASM("asm/ov_SC03_124/nonmatchings/ov_SC03_124_jr_8017AE2C", func_80183BE4);
/* func_80183BE4 - iterate through 4-entry array, call func_80183C34 if any unk1C is non-zero */
extern void func_80183C34(void *arg0);
void func_80183BE4(void) {
extern Ent_8017D6EC D_801E1BD0[];
s32 i = 0;
Ent_8017D6EC *p = &D_801E1BD0[0];
while (i < 4) {
if (p->unk1C != 0) {
func_80183C34(p);
break;
}
i++;
p = (Ent_8017D6EC *)((char *)p + 0x24);
}
}
extern s32 rand(void);
@@ -7213,7 +7236,93 @@ void func_801857E8(void *a0)
}
INCLUDE_ASM("asm/ov_SC03_124/nonmatchings/ov_SC03_124_jr_8017AE2C", func_80185864);
/* func_80185864 — scan the 96-entry / 0x10C-stride D_801202A0 actor table for
* the lowest-scoring slot whose u16 tag at +0 is 0x61, then splat 3 words plus
* an align-1 8-byte block into the caller's struct.
*
* Byte-verified idioms (all four were needed; each was a real residual):
*
* 1. The 0x61 compare constant is NOT a source variable. gcc keeps it in a
* callee-saved reg and LICM sinks the `li` into the loop PREHEADER, so
* `addiu $s5,$zero,0x61` lands AFTER the guard branch's delay slot. Pinning
* an `s5` local puts the `li` in the entry block instead (+1 wrong slot).
*
* 2. The 8-byte copy at +0x10 is ONE align-1 struct assign, not two 4-byte
* ones. gcc's MIPS block move loads BOTH words first (lwl/lwr $a0,
* lwl/lwr $a1) then stores both; splitting it emits load/nop/store twice
* and costs an instruction (cookbook-index: "align-1 4xu8 struct assign
* emits the inline form").
*
* 3. The parameter must NOT be register-pinned. With `register u8 *s2
* __asm__("$18")` the entry-block `move` is a schedulable body insn and
* the list scheduler ranks the higher-priority `lui $s0` chain ahead of
* it, so the anti-dependent prologue `sw`s come out in regno order
* (s0,s1,s2,s3) instead of the target's def order (s2,s0,s1,s3). Letting
* gcc allocate the incoming parameter itself keeps the copy first and the
* whole prologue falls into place. (The other five pins are still needed.)
*
* 4. After the block store, gcc-2.7.2 CSE has invalidated memory, so
* a0->0x20 is RELOADED into a second pseudo — two separate C variables,
* not one reused variable (one variable => one pseudo => $a3 for both).
* The destination pointer must also be loaded BEFORE the source pointer:
* that source order is what lets the scheduler hoist `lw $v1,0x20($s2)`
* up into the first word-copy's load-delay slot.
*/
extern s32 func_8012BD14(s32 a0);
/* align-1 8-byte payload — drives the lwl/lwr + swl/swr inline block move */
void func_80185864(void *a0)
{
extern u8 D_801202A0[];
register u8 *s0 __asm__("$16");
register s32 s1 __asm__("$17");
register u8 *s3 __asm__("$19");
register u8 *s4 __asm__("$20");
u8 *s2;
u8 *v0;
u8 *v1;
u8 *a0p;
s2 = (u8 *)a0;
s0 = D_801202A0;
s1 = 0x7FFF;
s3 = s0 + 0x6480;
while (s0 != s3) {
if (*(u16 *)s0 == 0x61) {
s32 v1_val = func_8012BD14((s32)s0);
if (v1_val < s1) {
s1 = v1_val;
s4 = s0;
}
}
s0 += 0x10C;
}
s0 = s4;
if (s1 == 0x7FFF) {
*(s16 *)((s32)s2 + 0x5C) = 0;
} else {
*(s32 *)(s2 + 0x4) = *(s32 *)(s0 + 0x4);
*(s32 *)(s2 + 0x8) = *(s32 *)(s0 + 0x8);
*(s32 *)(s2 + 0xC) = *(s32 *)(s0 + 0xC);
v1 = *(u8 **)(s2 + 0x20);
v0 = *(u8 **)(s0 + 0x20);
*(struct Un8_8018613C *)(v1 + 0x10) = *(struct Un8_8018613C *)(v0 + 0x10);
a0p = *(u8 **)(s2 + 0x20);
*(u16 *)(a0p + 0x12) = *(u16 *)(a0p + 0x12) - *(u16 *)(s0 + 0xFE);
*(s16 *)((s32)s2 + 0x5C) = 0x800;
}
}
INCLUDE_ASM("asm/ov_SC03_124/nonmatchings/ov_SC03_124_jr_8017AE2C", func_80185984);
src/ov_SC03_125/ov_SC03_125_jr_8017D604.c
+112 -3
View File
@@ -50,7 +50,6 @@ extern void func_80162120(void);
extern void func_80029124(s32, s32);
extern s32 func_80165A50(s32);
extern void func_80029514(s32);
extern u8 D_800AF630[];
extern u8 D_80078EC0;
extern s32 func_80028FBC(void);
extern s32 func_80029000(void);
@@ -3798,7 +3797,31 @@ void func_801807C0(void *arg0) {
INCLUDE_ASM("asm/ov_SC03_125/nonmatchings/ov_SC03_125_jr_8017D604", func_80180850);
INCLUDE_ASM("asm/ov_SC03_125/nonmatchings/ov_SC03_125_jr_8017D604", func_80180A8C);
/* func_80180A8C - iterate through 4-entry array, call func_80180ADC if any unk1C is non-zero */
extern void func_80180ADC(void *arg0);
void func_80180A8C(void) {
extern Ent_8017D6EC D_801C4310[];
s32 i = 0;
Ent_8017D6EC *p = &D_801C4310[0];
while (i < 4) {
if (p->unk1C != 0) {
func_80180ADC(p);
break;
}
i++;
p = (Ent_8017D6EC *)((char *)p + 0x24);
}
}
extern s32 rand(void);
@@ -5290,7 +5313,93 @@ void func_80182EF0(void *a0)
}
INCLUDE_ASM("asm/ov_SC03_125/nonmatchings/ov_SC03_125_jr_8017D604", func_80182F6C);
/* func_80182F6C — scan the 96-entry / 0x10C-stride D_801202A0 actor table for
* the lowest-scoring slot whose u16 tag at +0 is 0x61, then splat 3 words plus
* an align-1 8-byte block into the caller's struct.
*
* Byte-verified idioms (all four were needed; each was a real residual):
*
* 1. The 0x61 compare constant is NOT a source variable. gcc keeps it in a
* callee-saved reg and LICM sinks the `li` into the loop PREHEADER, so
* `addiu $s5,$zero,0x61` lands AFTER the guard branch's delay slot. Pinning
* an `s5` local puts the `li` in the entry block instead (+1 wrong slot).
*
* 2. The 8-byte copy at +0x10 is ONE align-1 struct assign, not two 4-byte
* ones. gcc's MIPS block move loads BOTH words first (lwl/lwr $a0,
* lwl/lwr $a1) then stores both; splitting it emits load/nop/store twice
* and costs an instruction (cookbook-index: "align-1 4xu8 struct assign
* emits the inline form").
*
* 3. The parameter must NOT be register-pinned. With `register u8 *s2
* __asm__("$18")` the entry-block `move` is a schedulable body insn and
* the list scheduler ranks the higher-priority `lui $s0` chain ahead of
* it, so the anti-dependent prologue `sw`s come out in regno order
* (s0,s1,s2,s3) instead of the target's def order (s2,s0,s1,s3). Letting
* gcc allocate the incoming parameter itself keeps the copy first and the
* whole prologue falls into place. (The other five pins are still needed.)
*
* 4. After the block store, gcc-2.7.2 CSE has invalidated memory, so
* a0->0x20 is RELOADED into a second pseudo — two separate C variables,
* not one reused variable (one variable => one pseudo => $a3 for both).
* The destination pointer must also be loaded BEFORE the source pointer:
* that source order is what lets the scheduler hoist `lw $v1,0x20($s2)`
* up into the first word-copy's load-delay slot.
*/
extern s32 func_8012BD14(s32 a0);
/* align-1 8-byte payload — drives the lwl/lwr + swl/swr inline block move */
void func_80182F6C(void *a0)
{
extern u8 D_801202A0[];
register u8 *s0 __asm__("$16");
register s32 s1 __asm__("$17");
register u8 *s3 __asm__("$19");
register u8 *s4 __asm__("$20");
u8 *s2;
u8 *v0;
u8 *v1;
u8 *a0p;
s2 = (u8 *)a0;
s0 = D_801202A0;
s1 = 0x7FFF;
s3 = s0 + 0x6480;
while (s0 != s3) {
if (*(u16 *)s0 == 0x61) {
s32 v1_val = func_8012BD14((s32)s0);
if (v1_val < s1) {
s1 = v1_val;
s4 = s0;
}
}
s0 += 0x10C;
}
s0 = s4;
if (s1 == 0x7FFF) {
*(s16 *)((s32)s2 + 0x5C) = 0;
} else {
*(s32 *)(s2 + 0x4) = *(s32 *)(s0 + 0x4);
*(s32 *)(s2 + 0x8) = *(s32 *)(s0 + 0x8);
*(s32 *)(s2 + 0xC) = *(s32 *)(s0 + 0xC);
v1 = *(u8 **)(s2 + 0x20);
v0 = *(u8 **)(s0 + 0x20);
*(struct Un8_8018613C *)(v1 + 0x10) = *(struct Un8_8018613C *)(v0 + 0x10);
a0p = *(u8 **)(s2 + 0x20);
*(u16 *)(a0p + 0x12) = *(u16 *)(a0p + 0x12) - *(u16 *)(s0 + 0xFE);
*(s16 *)((s32)s2 + 0x5C) = 0x800;
}
}
INCLUDE_ASM("asm/ov_SC03_125/nonmatchings/ov_SC03_125_jr_8017D604", func_8018308C);
src/ov_SC04_000/ov_SC04_000_jr_8017BEBC.c
+22 -1
View File
@@ -5714,7 +5714,28 @@ void func_8018224C(void *arg0) {
}
INCLUDE_ASM("asm/ov_SC04_000/nonmatchings/ov_SC04_000_jr_8017BEBC", func_80182290);
/* Sibling shape: DEFINE_func_80143BDC() in src/shared/engine_core.h (cookbook §71) */
extern s32 func_8012C51C(void *a0, s32 a1);
void func_80182290(s32 a0, u16 *a1, s16 a2) {
struct S80190C84 sp;
u16 t;
sp.f0 = a1[0];
sp.f2 = a1[1];
t = a1[2];
sp.f6 = 0x35C;
sp.fA = 0;
sp.f8 = 0;
sp.fE = a2;
sp.f10 = 0;
sp.fC = 0x7FFF;
sp.f4 = t;
func_8012C51C(&sp, a0);
}
INCLUDE_ASM("asm/ov_SC04_000/nonmatchings/ov_SC04_000_jr_8017BEBC", func_801822F0);
src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c
+187 -3
View File
@@ -50,7 +50,6 @@ extern void func_80162120(void);
extern void func_80029124(s32, s32);
extern s32 func_80165A50(s32);
extern void func_80029514(s32);
extern u8 D_800AF630[];
extern u8 D_80078EC0;
extern s32 func_80028FBC(void);
extern s32 func_80029000(void);
@@ -6404,7 +6403,171 @@ void func_80186D94(s32 a0) {
}
INCLUDE_ASM("asm/ov_SC04_002/nonmatchings/ov_SC04_002_jr_8017BEBC", func_80186DD4);
extern void func_80017714(void *);
#define gte_ldv0_801837B0(r0) __asm__ volatile ( \
"lwc2 $0, 0( %0 );" \
"lwc2 $1, 4( %0 )" \
: \
: "r"( r0 ) )
#define gte_ldv3_801837B0(r0, r1, r2) __asm__ volatile ( \
"lwc2 $0, 0( %0 );" \
"lwc2 $1, 4( %0 );" \
"lwc2 $2, 0( %1 );" \
"lwc2 $3, 4( %1 );" \
"lwc2 $4, 0( %2 );" \
"lwc2 $5, 4( %2 )" \
: \
: "r"( r0 ), "r"( r1 ), "r"( r2 ) )
#define gte_rtps_801837B0() __asm__ volatile ("nop;nop;rtps")
#define gte_rtpt_801837B0() __asm__ volatile ("nop;nop;rtpt")
#define gte_avsz4_801837B0() __asm__ volatile ("nop;nop;avsz4")
#define gte_stsxy_801837B0(r0) __asm__ volatile ( \
"swc2 $14, 0( %0 )" \
: \
: "r"( r0 ) \
: "memory" )
#define gte_stsxy3_801837B0(r0, r1, r2) __asm__ volatile ( \
"swc2 $12, 0( %0 );" \
"swc2 $13, 0( %1 );" \
"swc2 $14, 0( %2 )" \
: \
: "r"( r0 ), "r"( r1 ), "r"( r2 ) \
: "memory" )
#define gte_stotz_801837B0(r0) __asm__ volatile ( \
"swc2 $7, 0( %0 )" \
: \
: "r"( r0 ) \
: "memory" )
#define gte_stflg_801837B0(r0) __asm__ volatile ( \
"cfc2 $12, $31;" \
"nop;" \
"sw $12, 0( %0 )" \
: \
: "r"( r0 ) \
: "$12", "memory" )
#define gte_SetRotMatrix_801837B0(r0) __asm__ volatile ( \
"lw $12, 0( %0 );" \
"lw $13, 4( %0 );" \
"ctc2 $12, $0;" \
"ctc2 $13, $1;" \
"lw $12, 8( %0 );" \
"lw $13, 12( %0 );" \
"lw $14, 16( %0 );" \
"ctc2 $12, $2;" \
"ctc2 $13, $3;" \
"ctc2 $14, $4" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
#define gte_SetTransMatrix_801837B0(r0) __asm__ volatile ( \
"lw $12, 20( %0 );" \
"lw $13, 24( %0 );" \
"ctc2 $12, $5;" \
"lw $14, 28( %0 );" \
"ctc2 $13, $6;" \
"ctc2 $14, $7" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
void func_80186DD4(s32 a0)
{
extern u8 D_800AF630[];
PKT_801837B0 pkt; /* 0x10 */
s32 flag1; /* 0x48 */
s32 flag2; /* 0x4C */
s32 otz; /* 0x50 */
u8 *base;
s32 *m;
s16 c, p, q;
s32 d;
c = *(s32 *)(a0 + 0x1C) * 15;
base = D_800AF630;
p = c;
d = c >> 1;
q = d;
if ((*(u16 *)(a0 + 0x70) & 1) == 0) {
pkt.rgb[0].b = pkt.rgb[1].b = p;
pkt.rgb[0].r = pkt.rgb[1].r = pkt.rgb[0].g = pkt.rgb[1].g = q;
c -= 0x10;
p = c;
{
s32 e; /* block-scoped: one pseudo per arm (§136/L1) */
e = d - 0x10;
q = e;
if (c < 0) {
p = 0;
}
if (e < 0) {
q = 0;
}
}
pkt.rgb[2].b = pkt.rgb[3].b = p;
pkt.rgb[2].r = pkt.rgb[3].r = pkt.rgb[2].g = pkt.rgb[3].g = q;
} else {
pkt.rgb[0].r = pkt.rgb[1].r = p;
pkt.rgb[0].g = pkt.rgb[1].g = pkt.rgb[0].b = pkt.rgb[1].b = q;
c -= 0x10;
p = c;
{
s32 e; /* block-scoped: one pseudo per arm (§136/L1) */
e = d - 0x10;
q = e;
if (c < 0) {
p = 0;
}
if (e < 0) {
q = 0;
}
}
pkt.rgb[2].r = pkt.rgb[3].r = p;
pkt.rgb[2].g = pkt.rgb[3].g = pkt.rgb[2].b = pkt.rgb[3].b = q;
}
pkt.code = 0x50000000;
m = (s32 *)(base + 0x18);
gte_SetRotMatrix_801837B0(m);
gte_SetTransMatrix_801837B0(m);
gte_ldv3_801837B0((SV_801837B0 *)(a0 + 0xFC), (SV_801837B0 *)(a0 + 0x104),
(SV_801837B0 *)(a0 + 0xEC));
gte_rtpt_801837B0();
gte_stflg_801837B0(&flag1);
gte_stsxy3_801837B0(&pkt.v[0], &pkt.v[1], &pkt.v[2]);
gte_ldv0_801837B0((SV_801837B0 *)(a0 + 0xF4));
gte_rtps_801837B0();
gte_stflg_801837B0(&flag2);
flag1 = flag1 | flag2;
gte_stsxy_801837B0(&pkt.v[3]);
gte_avsz4_801837B0();
gte_stotz_801837B0(&otz);
if ((flag1 & 0xFFFFEFFF) == 0) {
pkt.v[0].vz = (s16)otz;
func_80017714(&pkt.v[0]);
}
gte_ldv3_801837B0((SV_801837B0 *)(a0 + 0xEC), (SV_801837B0 *)(a0 + 0xF4),
(SV_801837B0 *)(a0 + 0xDC));
gte_rtpt_801837B0();
gte_stflg_801837B0(&flag1);
gte_stsxy3_801837B0(&pkt.v[0], &pkt.v[1], &pkt.v[2]);
gte_ldv0_801837B0((SV_801837B0 *)(a0 + 0xE4));
gte_rtps_801837B0();
gte_stflg_801837B0(&flag2);
flag1 = flag1 | flag2;
gte_stsxy_801837B0(&pkt.v[3]);
gte_avsz4_801837B0();
gte_stotz_801837B0(&otz);
if ((flag1 & 0xFFFFEFFF) == 0) {
pkt.v[0].vz = (s16)otz;
func_80017714(&pkt.v[0]);
}
}
INCLUDE_ASM("asm/ov_SC04_002/nonmatchings/ov_SC04_002_jr_8017BEBC", func_8018710C);
@@ -6705,7 +6868,28 @@ void func_80188300(void *arg0) {
}
INCLUDE_ASM("asm/ov_SC04_002/nonmatchings/ov_SC04_002_jr_8017BEBC", func_80188344);
/* Sibling shape: DEFINE_func_80143BDC() in src/shared/engine_core.h (cookbook §71) */
extern s32 func_8012C51C(void *a0, s32 a1);
void func_80188344(s32 a0, u16 *a1, s16 a2) {
struct S80190C84 sp;
u16 t;
sp.f0 = a1[0];
sp.f2 = a1[1];
t = a1[2];
sp.f6 = 0x35C;
sp.fA = 0;
sp.f8 = 0;
sp.fE = a2;
sp.f10 = 0;
sp.fC = 0x7FFF;
sp.f4 = t;
func_8012C51C(&sp, a0);
}
src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c
+22 -1
View File
@@ -6604,7 +6604,28 @@ void func_801845D0(void *arg0) {
}
INCLUDE_ASM("asm/ov_SC04_004/nonmatchings/ov_SC04_004_jr_8017AE2C", func_80184614);
/* Sibling shape: DEFINE_func_80143BDC() in src/shared/engine_core.h (cookbook §71) */
extern s32 func_8012C51C(void *a0, s32 a1);
void func_80184614(s32 a0, u16 *a1, s16 a2) {
struct S80190C84 sp;
u16 t;
sp.f0 = a1[0];
sp.f2 = a1[1];
t = a1[2];
sp.f6 = 0x35C;
sp.fA = 0;
sp.f8 = 0;
sp.fE = a2;
sp.f10 = 0;
sp.fC = 0x7FFF;
sp.f4 = t;
func_8012C51C(&sp, a0);
}
src/ov_SC04_005/ov_SC04_005_jr_8017BEBC.c
+165 -2
View File
@@ -50,7 +50,6 @@ extern void func_80162120(void);
extern void func_80029124(s32, s32);
extern s32 func_80165A50(s32);
extern void func_80029514(s32);
extern u8 D_800AF630[];
extern u8 D_80078EC0;
extern s32 D_80126B58;
extern s32 func_80028FBC(void);
@@ -6560,7 +6559,171 @@ void func_80186164(s32 a0) {
}
INCLUDE_ASM("asm/ov_SC04_005/nonmatchings/ov_SC04_005_jr_8017BEBC", func_801861A4);
extern void func_80017714(void *);
#define gte_ldv0_801837B0(r0) __asm__ volatile ( \
"lwc2 $0, 0( %0 );" \
"lwc2 $1, 4( %0 )" \
: \
: "r"( r0 ) )
#define gte_ldv3_801837B0(r0, r1, r2) __asm__ volatile ( \
"lwc2 $0, 0( %0 );" \
"lwc2 $1, 4( %0 );" \
"lwc2 $2, 0( %1 );" \
"lwc2 $3, 4( %1 );" \
"lwc2 $4, 0( %2 );" \
"lwc2 $5, 4( %2 )" \
: \
: "r"( r0 ), "r"( r1 ), "r"( r2 ) )
#define gte_rtps_801837B0() __asm__ volatile ("nop;nop;rtps")
#define gte_rtpt_801837B0() __asm__ volatile ("nop;nop;rtpt")
#define gte_avsz4_801837B0() __asm__ volatile ("nop;nop;avsz4")
#define gte_stsxy_801837B0(r0) __asm__ volatile ( \
"swc2 $14, 0( %0 )" \
: \
: "r"( r0 ) \
: "memory" )
#define gte_stsxy3_801837B0(r0, r1, r2) __asm__ volatile ( \
"swc2 $12, 0( %0 );" \
"swc2 $13, 0( %1 );" \
"swc2 $14, 0( %2 )" \
: \
: "r"( r0 ), "r"( r1 ), "r"( r2 ) \
: "memory" )
#define gte_stotz_801837B0(r0) __asm__ volatile ( \
"swc2 $7, 0( %0 )" \
: \
: "r"( r0 ) \
: "memory" )
#define gte_stflg_801837B0(r0) __asm__ volatile ( \
"cfc2 $12, $31;" \
"nop;" \
"sw $12, 0( %0 )" \
: \
: "r"( r0 ) \
: "$12", "memory" )
#define gte_SetRotMatrix_801837B0(r0) __asm__ volatile ( \
"lw $12, 0( %0 );" \
"lw $13, 4( %0 );" \
"ctc2 $12, $0;" \
"ctc2 $13, $1;" \
"lw $12, 8( %0 );" \
"lw $13, 12( %0 );" \
"lw $14, 16( %0 );" \
"ctc2 $12, $2;" \
"ctc2 $13, $3;" \
"ctc2 $14, $4" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
#define gte_SetTransMatrix_801837B0(r0) __asm__ volatile ( \
"lw $12, 20( %0 );" \
"lw $13, 24( %0 );" \
"ctc2 $12, $5;" \
"lw $14, 28( %0 );" \
"ctc2 $13, $6;" \
"ctc2 $14, $7" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
void func_801861A4(s32 a0)
{
extern u8 D_800AF630[];
PKT_801837B0 pkt; /* 0x10 */
s32 flag1; /* 0x48 */
s32 flag2; /* 0x4C */
s32 otz; /* 0x50 */
u8 *base;
s32 *m;
s16 c, p, q;
s32 d;
c = *(s32 *)(a0 + 0x1C) * 15;
base = D_800AF630;
p = c;
d = c >> 1;
q = d;
if ((*(u16 *)(a0 + 0x70) & 1) == 0) {
pkt.rgb[0].b = pkt.rgb[1].b = p;
pkt.rgb[0].r = pkt.rgb[1].r = pkt.rgb[0].g = pkt.rgb[1].g = q;
c -= 0x10;
p = c;
{
s32 e; /* block-scoped: one pseudo per arm (§136/L1) */
e = d - 0x10;
q = e;
if (c < 0) {
p = 0;
}
if (e < 0) {
q = 0;
}
}
pkt.rgb[2].b = pkt.rgb[3].b = p;
pkt.rgb[2].r = pkt.rgb[3].r = pkt.rgb[2].g = pkt.rgb[3].g = q;
} else {
pkt.rgb[0].r = pkt.rgb[1].r = p;
pkt.rgb[0].g = pkt.rgb[1].g = pkt.rgb[0].b = pkt.rgb[1].b = q;
c -= 0x10;
p = c;
{
s32 e; /* block-scoped: one pseudo per arm (§136/L1) */
e = d - 0x10;
q = e;
if (c < 0) {
p = 0;
}
if (e < 0) {
q = 0;
}
}
pkt.rgb[2].r = pkt.rgb[3].r = p;
pkt.rgb[2].g = pkt.rgb[3].g = pkt.rgb[2].b = pkt.rgb[3].b = q;
}
pkt.code = 0x50000000;
m = (s32 *)(base + 0x18);
gte_SetRotMatrix_801837B0(m);
gte_SetTransMatrix_801837B0(m);
gte_ldv3_801837B0((SV_801837B0 *)(a0 + 0xFC), (SV_801837B0 *)(a0 + 0x104),
(SV_801837B0 *)(a0 + 0xEC));
gte_rtpt_801837B0();
gte_stflg_801837B0(&flag1);
gte_stsxy3_801837B0(&pkt.v[0], &pkt.v[1], &pkt.v[2]);
gte_ldv0_801837B0((SV_801837B0 *)(a0 + 0xF4));
gte_rtps_801837B0();
gte_stflg_801837B0(&flag2);
flag1 = flag1 | flag2;
gte_stsxy_801837B0(&pkt.v[3]);
gte_avsz4_801837B0();
gte_stotz_801837B0(&otz);
if ((flag1 & 0xFFFFEFFF) == 0) {
pkt.v[0].vz = (s16)otz;
func_80017714(&pkt.v[0]);
}
gte_ldv3_801837B0((SV_801837B0 *)(a0 + 0xEC), (SV_801837B0 *)(a0 + 0xF4),
(SV_801837B0 *)(a0 + 0xDC));
gte_rtpt_801837B0();
gte_stflg_801837B0(&flag1);
gte_stsxy3_801837B0(&pkt.v[0], &pkt.v[1], &pkt.v[2]);
gte_ldv0_801837B0((SV_801837B0 *)(a0 + 0xE4));
gte_rtps_801837B0();
gte_stflg_801837B0(&flag2);
flag1 = flag1 | flag2;
gte_stsxy_801837B0(&pkt.v[3]);
gte_avsz4_801837B0();
gte_stotz_801837B0(&otz);
if ((flag1 & 0xFFFFEFFF) == 0) {
pkt.v[0].vz = (s16)otz;
func_80017714(&pkt.v[0]);
}
}
INCLUDE_ASM("asm/ov_SC04_005/nonmatchings/ov_SC04_005_jr_8017BEBC", func_801864DC);
src/ov_SC04_006/ov_SC04_006_jr_8017BEBC.c
+22 -1
View File
@@ -4676,7 +4676,28 @@ void func_8017FAE4(void *arg0) {
}
INCLUDE_ASM("asm/ov_SC04_006/nonmatchings/ov_SC04_006_jr_8017BEBC", func_8017FB28);
/* Sibling shape: DEFINE_func_80143BDC() in src/shared/engine_core.h (cookbook §71) */
extern s32 func_8012C51C(void *a0, s32 a1);
void func_8017FB28(s32 a0, u16 *a1, s16 a2) {
struct S80190C84 sp;
u16 t;
sp.f0 = a1[0];
sp.f2 = a1[1];
t = a1[2];
sp.f6 = 0x35C;
sp.fA = 0;
sp.f8 = 0;
sp.fE = a2;
sp.f10 = 0;
sp.fC = 0x7FFF;
sp.f4 = t;
func_8012C51C(&sp, a0);
}
src/ov_SC04_007/ov_SC04_007_jr_8017BEBC.c
+165 -2
View File
@@ -50,7 +50,6 @@ extern void func_80162120(void);
extern void func_80029124(s32, s32);
extern s32 func_80165A50(s32);
extern void func_80029514(s32);
extern u8 D_800AF630[];
extern u8 D_80078EC0;
extern s32 D_80126B58;
extern s32 func_80028FBC(void);
@@ -5505,7 +5504,171 @@ void func_801827D0(s32 a0) {
}
INCLUDE_ASM("asm/ov_SC04_007/nonmatchings/ov_SC04_007_jr_8017BEBC", func_80182810);
extern void func_80017714(void *);
#define gte_ldv0_801837B0(r0) __asm__ volatile ( \
"lwc2 $0, 0( %0 );" \
"lwc2 $1, 4( %0 )" \
: \
: "r"( r0 ) )
#define gte_ldv3_801837B0(r0, r1, r2) __asm__ volatile ( \
"lwc2 $0, 0( %0 );" \
"lwc2 $1, 4( %0 );" \
"lwc2 $2, 0( %1 );" \
"lwc2 $3, 4( %1 );" \
"lwc2 $4, 0( %2 );" \
"lwc2 $5, 4( %2 )" \
: \
: "r"( r0 ), "r"( r1 ), "r"( r2 ) )
#define gte_rtps_801837B0() __asm__ volatile ("nop;nop;rtps")
#define gte_rtpt_801837B0() __asm__ volatile ("nop;nop;rtpt")
#define gte_avsz4_801837B0() __asm__ volatile ("nop;nop;avsz4")
#define gte_stsxy_801837B0(r0) __asm__ volatile ( \
"swc2 $14, 0( %0 )" \
: \
: "r"( r0 ) \
: "memory" )
#define gte_stsxy3_801837B0(r0, r1, r2) __asm__ volatile ( \
"swc2 $12, 0( %0 );" \
"swc2 $13, 0( %1 );" \
"swc2 $14, 0( %2 )" \
: \
: "r"( r0 ), "r"( r1 ), "r"( r2 ) \
: "memory" )
#define gte_stotz_801837B0(r0) __asm__ volatile ( \
"swc2 $7, 0( %0 )" \
: \
: "r"( r0 ) \
: "memory" )
#define gte_stflg_801837B0(r0) __asm__ volatile ( \
"cfc2 $12, $31;" \
"nop;" \
"sw $12, 0( %0 )" \
: \
: "r"( r0 ) \
: "$12", "memory" )
#define gte_SetRotMatrix_801837B0(r0) __asm__ volatile ( \
"lw $12, 0( %0 );" \
"lw $13, 4( %0 );" \
"ctc2 $12, $0;" \
"ctc2 $13, $1;" \
"lw $12, 8( %0 );" \
"lw $13, 12( %0 );" \
"lw $14, 16( %0 );" \
"ctc2 $12, $2;" \
"ctc2 $13, $3;" \
"ctc2 $14, $4" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
#define gte_SetTransMatrix_801837B0(r0) __asm__ volatile ( \
"lw $12, 20( %0 );" \
"lw $13, 24( %0 );" \
"ctc2 $12, $5;" \
"lw $14, 28( %0 );" \
"ctc2 $13, $6;" \
"ctc2 $14, $7" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14" )
void func_80182810(s32 a0)
{
extern u8 D_800AF630[];
PKT_801837B0 pkt; /* 0x10 */
s32 flag1; /* 0x48 */
s32 flag2; /* 0x4C */
s32 otz; /* 0x50 */
u8 *base;
s32 *m;
s16 c, p, q;
s32 d;
c = *(s32 *)(a0 + 0x1C) * 15;
base = D_800AF630;
p = c;
d = c >> 1;
q = d;
if ((*(u16 *)(a0 + 0x70) & 1) == 0) {
pkt.rgb[0].b = pkt.rgb[1].b = p;
pkt.rgb[0].r = pkt.rgb[1].r = pkt.rgb[0].g = pkt.rgb[1].g = q;
c -= 0x10;
p = c;
{
s32 e; /* block-scoped: one pseudo per arm (§136/L1) */
e = d - 0x10;
q = e;
if (c < 0) {
p = 0;
}
if (e < 0) {
q = 0;
}
}
pkt.rgb[2].b = pkt.rgb[3].b = p;
pkt.rgb[2].r = pkt.rgb[3].r = pkt.rgb[2].g = pkt.rgb[3].g = q;
} else {
pkt.rgb[0].r = pkt.rgb[1].r = p;
pkt.rgb[0].g = pkt.rgb[1].g = pkt.rgb[0].b = pkt.rgb[1].b = q;
c -= 0x10;
p = c;
{
s32 e; /* block-scoped: one pseudo per arm (§136/L1) */
e = d - 0x10;
q = e;
if (c < 0) {
p = 0;
}
if (e < 0) {
q = 0;
}
}
pkt.rgb[2].r = pkt.rgb[3].r = p;
pkt.rgb[2].g = pkt.rgb[3].g = pkt.rgb[2].b = pkt.rgb[3].b = q;
}
pkt.code = 0x50000000;
m = (s32 *)(base + 0x18);
gte_SetRotMatrix_801837B0(m);
gte_SetTransMatrix_801837B0(m);
gte_ldv3_801837B0((SV_801837B0 *)(a0 + 0xFC), (SV_801837B0 *)(a0 + 0x104),
(SV_801837B0 *)(a0 + 0xEC));
gte_rtpt_801837B0();
gte_stflg_801837B0(&flag1);
gte_stsxy3_801837B0(&pkt.v[0], &pkt.v[1], &pkt.v[2]);
gte_ldv0_801837B0((SV_801837B0 *)(a0 + 0xF4));
gte_rtps_801837B0();
gte_stflg_801837B0(&flag2);
flag1 = flag1 | flag2;
gte_stsxy_801837B0(&pkt.v[3]);
gte_avsz4_801837B0();
gte_stotz_801837B0(&otz);
if ((flag1 & 0xFFFFEFFF) == 0) {
pkt.v[0].vz = (s16)otz;
func_80017714(&pkt.v[0]);
}
gte_ldv3_801837B0((SV_801837B0 *)(a0 + 0xEC), (SV_801837B0 *)(a0 + 0xF4),
(SV_801837B0 *)(a0 + 0xDC));
gte_rtpt_801837B0();
gte_stflg_801837B0(&flag1);
gte_stsxy3_801837B0(&pkt.v[0], &pkt.v[1], &pkt.v[2]);
gte_ldv0_801837B0((SV_801837B0 *)(a0 + 0xE4));
gte_rtps_801837B0();
gte_stflg_801837B0(&flag2);
flag1 = flag1 | flag2;
gte_stsxy_801837B0(&pkt.v[3]);
gte_avsz4_801837B0();
gte_stotz_801837B0(&otz);
if ((flag1 & 0xFFFFEFFF) == 0) {
pkt.v[0].vz = (s16)otz;
func_80017714(&pkt.v[0]);
}
}
INCLUDE_ASM("asm/ov_SC04_007/nonmatchings/ov_SC04_007_jr_8017BEBC", func_80182B48);
src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
+112 -3
View File
@@ -47,7 +47,6 @@ extern void func_80162120(void);
extern void func_80029124(s32, s32);
extern s32 func_80165A50(s32);
extern void func_80029514(s32);
extern u8 D_800AF630[];
extern u8 D_80078EC0;
extern s32 func_80028FBC(void);
extern s32 func_80029000(void);
@@ -4766,7 +4765,31 @@ void func_80180618(void *arg0) {
INCLUDE_ASM("asm/ov_SC04_015/nonmatchings/ov_SC04_015_jr_8017AE2C", func_801806A8);
INCLUDE_ASM("asm/ov_SC04_015/nonmatchings/ov_SC04_015_jr_8017AE2C", func_801808E4);
/* func_801808E4 - iterate through 4-entry array, call func_80180934 if any unk1C is non-zero */
extern void func_80180934(void *arg0);
void func_801808E4(void) {
extern Ent_8017D6EC D_801C9010[];
s32 i = 0;
Ent_8017D6EC *p = &D_801C9010[0];
while (i < 4) {
if (p->unk1C != 0) {
func_80180934(p);
break;
}
i++;
p = (Ent_8017D6EC *)((char *)p + 0x24);
}
}
extern s32 rand(void);
@@ -6098,7 +6121,93 @@ void func_8018242C(void *a0)
}
INCLUDE_ASM("asm/ov_SC04_015/nonmatchings/ov_SC04_015_jr_8017AE2C", func_801824A8);
/* func_801824A8 — scan the 96-entry / 0x10C-stride D_801202A0 actor table for
* the lowest-scoring slot whose u16 tag at +0 is 0x61, then splat 3 words plus
* an align-1 8-byte block into the caller's struct.
*
* Byte-verified idioms (all four were needed; each was a real residual):
*
* 1. The 0x61 compare constant is NOT a source variable. gcc keeps it in a
* callee-saved reg and LICM sinks the `li` into the loop PREHEADER, so
* `addiu $s5,$zero,0x61` lands AFTER the guard branch's delay slot. Pinning
* an `s5` local puts the `li` in the entry block instead (+1 wrong slot).
*
* 2. The 8-byte copy at +0x10 is ONE align-1 struct assign, not two 4-byte
* ones. gcc's MIPS block move loads BOTH words first (lwl/lwr $a0,
* lwl/lwr $a1) then stores both; splitting it emits load/nop/store twice
* and costs an instruction (cookbook-index: "align-1 4xu8 struct assign
* emits the inline form").
*
* 3. The parameter must NOT be register-pinned. With `register u8 *s2
* __asm__("$18")` the entry-block `move` is a schedulable body insn and
* the list scheduler ranks the higher-priority `lui $s0` chain ahead of
* it, so the anti-dependent prologue `sw`s come out in regno order
* (s0,s1,s2,s3) instead of the target's def order (s2,s0,s1,s3). Letting
* gcc allocate the incoming parameter itself keeps the copy first and the
* whole prologue falls into place. (The other five pins are still needed.)
*
* 4. After the block store, gcc-2.7.2 CSE has invalidated memory, so
* a0->0x20 is RELOADED into a second pseudo — two separate C variables,
* not one reused variable (one variable => one pseudo => $a3 for both).
* The destination pointer must also be loaded BEFORE the source pointer:
* that source order is what lets the scheduler hoist `lw $v1,0x20($s2)`
* up into the first word-copy's load-delay slot.
*/
extern s32 func_8012BD14(s32 a0);
/* align-1 8-byte payload — drives the lwl/lwr + swl/swr inline block move */
void func_801824A8(void *a0)
{
extern u8 D_801202A0[];
register u8 *s0 __asm__("$16");
register s32 s1 __asm__("$17");
register u8 *s3 __asm__("$19");
register u8 *s4 __asm__("$20");
u8 *s2;
u8 *v0;
u8 *v1;
u8 *a0p;
s2 = (u8 *)a0;
s0 = D_801202A0;
s1 = 0x7FFF;
s3 = s0 + 0x6480;
while (s0 != s3) {
if (*(u16 *)s0 == 0x61) {
s32 v1_val = func_8012BD14((s32)s0);
if (v1_val < s1) {
s1 = v1_val;
s4 = s0;
}
}
s0 += 0x10C;
}
s0 = s4;
if (s1 == 0x7FFF) {
*(s16 *)((s32)s2 + 0x5C) = 0;
} else {
*(s32 *)(s2 + 0x4) = *(s32 *)(s0 + 0x4);
*(s32 *)(s2 + 0x8) = *(s32 *)(s0 + 0x8);
*(s32 *)(s2 + 0xC) = *(s32 *)(s0 + 0xC);
v1 = *(u8 **)(s2 + 0x20);
v0 = *(u8 **)(s0 + 0x20);
*(struct Un8_8018613C *)(v1 + 0x10) = *(struct Un8_8018613C *)(v0 + 0x10);
a0p = *(u8 **)(s2 + 0x20);
*(u16 *)(a0p + 0x12) = *(u16 *)(a0p + 0x12) - *(u16 *)(s0 + 0xFE);
*(s16 *)((s32)s2 + 0x5C) = 0x800;
}
}
INCLUDE_ASM("asm/ov_SC04_015/nonmatchings/ov_SC04_015_jr_8017AE2C", func_801825C8);
src/ov_SC04_019/ov_SC04_019_jr_8017AE2C.c
+112 -3
View File
@@ -47,7 +47,6 @@ extern void func_80162120(void);
extern void func_80029124(s32, s32);
extern s32 func_80165A50(s32);
extern void func_80029514(s32);
extern u8 D_800AF630[];
extern u8 D_80078EC0;
extern s32 func_80028FBC(void);
extern s32 func_80029000(void);
@@ -4212,7 +4211,31 @@ void func_8017D6EC(void *arg0) {
INCLUDE_ASM("asm/ov_SC04_019/nonmatchings/ov_SC04_019_jr_8017AE2C", func_8017D77C);
INCLUDE_ASM("asm/ov_SC04_019/nonmatchings/ov_SC04_019_jr_8017AE2C", func_8017D9B8);
/* func_8017D9B8 - iterate through 4-entry array, call func_8017DA08 if any unk1C is non-zero */
extern void func_8017DA08(void *arg0);
void func_8017D9B8(void) {
extern Ent_8017D6EC D_801E6F58[];
s32 i = 0;
Ent_8017D6EC *p = &D_801E6F58[0];
while (i < 4) {
if (p->unk1C != 0) {
func_8017DA08(p);
break;
}
i++;
p = (Ent_8017D6EC *)((char *)p + 0x24);
}
}
extern s32 rand(void);
@@ -7842,7 +7865,93 @@ void func_801860C0(void *a0)
}
INCLUDE_ASM("asm/ov_SC04_019/nonmatchings/ov_SC04_019_jr_8017AE2C", func_8018613C);
/* func_8018613C — scan the 96-entry / 0x10C-stride D_801202A0 actor table for
* the lowest-scoring slot whose u16 tag at +0 is 0x61, then splat 3 words plus
* an align-1 8-byte block into the caller's struct.
*
* Byte-verified idioms (all four were needed; each was a real residual):
*
* 1. The 0x61 compare constant is NOT a source variable. gcc keeps it in a
* callee-saved reg and LICM sinks the `li` into the loop PREHEADER, so
* `addiu $s5,$zero,0x61` lands AFTER the guard branch's delay slot. Pinning
* an `s5` local puts the `li` in the entry block instead (+1 wrong slot).
*
* 2. The 8-byte copy at +0x10 is ONE align-1 struct assign, not two 4-byte
* ones. gcc's MIPS block move loads BOTH words first (lwl/lwr $a0,
* lwl/lwr $a1) then stores both; splitting it emits load/nop/store twice
* and costs an instruction (cookbook-index: "align-1 4xu8 struct assign
* emits the inline form").
*
* 3. The parameter must NOT be register-pinned. With `register u8 *s2
* __asm__("$18")` the entry-block `move` is a schedulable body insn and
* the list scheduler ranks the higher-priority `lui $s0` chain ahead of
* it, so the anti-dependent prologue `sw`s come out in regno order
* (s0,s1,s2,s3) instead of the target's def order (s2,s0,s1,s3). Letting
* gcc allocate the incoming parameter itself keeps the copy first and the
* whole prologue falls into place. (The other five pins are still needed.)
*
* 4. After the block store, gcc-2.7.2 CSE has invalidated memory, so
* a0->0x20 is RELOADED into a second pseudo — two separate C variables,
* not one reused variable (one variable => one pseudo => $a3 for both).
* The destination pointer must also be loaded BEFORE the source pointer:
* that source order is what lets the scheduler hoist `lw $v1,0x20($s2)`
* up into the first word-copy's load-delay slot.
*/
extern s32 func_8012BD14(s32 a0);
/* align-1 8-byte payload — drives the lwl/lwr + swl/swr inline block move */
void func_8018613C(void *a0)
{
extern u8 D_801202A0[];
register u8 *s0 __asm__("$16");
register s32 s1 __asm__("$17");
register u8 *s3 __asm__("$19");
register u8 *s4 __asm__("$20");
u8 *s2;
u8 *v0;
u8 *v1;
u8 *a0p;
s2 = (u8 *)a0;
s0 = D_801202A0;
s1 = 0x7FFF;
s3 = s0 + 0x6480;
while (s0 != s3) {
if (*(u16 *)s0 == 0x61) {
s32 v1_val = func_8012BD14((s32)s0);
if (v1_val < s1) {
s1 = v1_val;
s4 = s0;
}
}
s0 += 0x10C;
}
s0 = s4;
if (s1 == 0x7FFF) {
*(s16 *)((s32)s2 + 0x5C) = 0;
} else {
*(s32 *)(s2 + 0x4) = *(s32 *)(s0 + 0x4);
*(s32 *)(s2 + 0x8) = *(s32 *)(s0 + 0x8);
*(s32 *)(s2 + 0xC) = *(s32 *)(s0 + 0xC);
v1 = *(u8 **)(s2 + 0x20);
v0 = *(u8 **)(s0 + 0x20);
*(struct Un8_8018613C *)(v1 + 0x10) = *(struct Un8_8018613C *)(v0 + 0x10);
a0p = *(u8 **)(s2 + 0x20);
*(u16 *)(a0p + 0x12) = *(u16 *)(a0p + 0x12) - *(u16 *)(s0 + 0xFE);
*(s16 *)((s32)s2 + 0x5C) = 0x800;
}
}
INCLUDE_ASM("asm/ov_SC04_019/nonmatchings/ov_SC04_019_jr_8017AE2C", func_8018625C);
src/ov_SC04_020/ov_SC04_020_jr_8017D604.c
+112 -3
View File
@@ -49,7 +49,6 @@ extern void func_80162120(void);
extern void func_80029124(s32, s32);
extern s32 func_80165A50(s32);
extern void func_80029514(s32);
extern u8 D_800AF630[];
extern u8 D_80078EC0;
extern s32 func_80028FBC(void);
extern s32 func_80029000(void);
@@ -3691,7 +3690,31 @@ void func_80180064(void *arg0) {
INCLUDE_ASM("asm/ov_SC04_020/nonmatchings/ov_SC04_020_jr_8017D604", func_801800F4);
INCLUDE_ASM("asm/ov_SC04_020/nonmatchings/ov_SC04_020_jr_8017D604", func_80180330);
/* func_80180330 - iterate through 4-entry array, call func_80180380 if any unk1C is non-zero */
extern void func_80180380(void *arg0);
void func_80180330(void) {
extern Ent_8017D6EC D_801BC580[];
s32 i = 0;
Ent_8017D6EC *p = &D_801BC580[0];
while (i < 4) {
if (p->unk1C != 0) {
func_80180380(p);
break;
}
i++;
p = (Ent_8017D6EC *)((char *)p + 0x24);
}
}
extern s32 rand(void);
@@ -5142,7 +5165,93 @@ void func_8018289C(void *a0)
}
INCLUDE_ASM("asm/ov_SC04_020/nonmatchings/ov_SC04_020_jr_8017D604", func_80182918);
/* func_80182918 — scan the 96-entry / 0x10C-stride D_801202A0 actor table for
* the lowest-scoring slot whose u16 tag at +0 is 0x61, then splat 3 words plus
* an align-1 8-byte block into the caller's struct.
*
* Byte-verified idioms (all four were needed; each was a real residual):
*
* 1. The 0x61 compare constant is NOT a source variable. gcc keeps it in a
* callee-saved reg and LICM sinks the `li` into the loop PREHEADER, so
* `addiu $s5,$zero,0x61` lands AFTER the guard branch's delay slot. Pinning
* an `s5` local puts the `li` in the entry block instead (+1 wrong slot).
*
* 2. The 8-byte copy at +0x10 is ONE align-1 struct assign, not two 4-byte
* ones. gcc's MIPS block move loads BOTH words first (lwl/lwr $a0,
* lwl/lwr $a1) then stores both; splitting it emits load/nop/store twice
* and costs an instruction (cookbook-index: "align-1 4xu8 struct assign
* emits the inline form").
*
* 3. The parameter must NOT be register-pinned. With `register u8 *s2
* __asm__("$18")` the entry-block `move` is a schedulable body insn and
* the list scheduler ranks the higher-priority `lui $s0` chain ahead of
* it, so the anti-dependent prologue `sw`s come out in regno order
* (s0,s1,s2,s3) instead of the target's def order (s2,s0,s1,s3). Letting
* gcc allocate the incoming parameter itself keeps the copy first and the
* whole prologue falls into place. (The other five pins are still needed.)
*
* 4. After the block store, gcc-2.7.2 CSE has invalidated memory, so
* a0->0x20 is RELOADED into a second pseudo — two separate C variables,
* not one reused variable (one variable => one pseudo => $a3 for both).
* The destination pointer must also be loaded BEFORE the source pointer:
* that source order is what lets the scheduler hoist `lw $v1,0x20($s2)`
* up into the first word-copy's load-delay slot.
*/
extern s32 func_8012BD14(s32 a0);
/* align-1 8-byte payload — drives the lwl/lwr + swl/swr inline block move */
void func_80182918(void *a0)
{
extern u8 D_801202A0[];
register u8 *s0 __asm__("$16");
register s32 s1 __asm__("$17");
register u8 *s3 __asm__("$19");
register u8 *s4 __asm__("$20");
u8 *s2;
u8 *v0;
u8 *v1;
u8 *a0p;
s2 = (u8 *)a0;
s0 = D_801202A0;
s1 = 0x7FFF;
s3 = s0 + 0x6480;
while (s0 != s3) {
if (*(u16 *)s0 == 0x61) {
s32 v1_val = func_8012BD14((s32)s0);
if (v1_val < s1) {
s1 = v1_val;
s4 = s0;
}
}
s0 += 0x10C;
}
s0 = s4;
if (s1 == 0x7FFF) {
*(s16 *)((s32)s2 + 0x5C) = 0;
} else {
*(s32 *)(s2 + 0x4) = *(s32 *)(s0 + 0x4);
*(s32 *)(s2 + 0x8) = *(s32 *)(s0 + 0x8);
*(s32 *)(s2 + 0xC) = *(s32 *)(s0 + 0xC);
v1 = *(u8 **)(s2 + 0x20);
v0 = *(u8 **)(s0 + 0x20);
*(struct Un8_8018613C *)(v1 + 0x10) = *(struct Un8_8018613C *)(v0 + 0x10);
a0p = *(u8 **)(s2 + 0x20);
*(u16 *)(a0p + 0x12) = *(u16 *)(a0p + 0x12) - *(u16 *)(s0 + 0xFE);
*(s16 *)((s32)s2 + 0x5C) = 0x800;
}
}
INCLUDE_ASM("asm/ov_SC04_020/nonmatchings/ov_SC04_020_jr_8017D604", func_80182A38);
src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c
+22 -1
View File
@@ -6110,7 +6110,28 @@ void func_80185198(void *arg0) {
}
INCLUDE_ASM("asm/ov_SC05_001/nonmatchings/ov_SC05_001_jr_8017BEBC", func_801851DC);
/* Sibling shape: DEFINE_func_80143BDC() in src/shared/engine_core.h (cookbook §71) */
extern s32 func_8012C51C(void *a0, s32 a1);
void func_801851DC(s32 a0, u16 *a1, s16 a2) {
struct S80190C84 sp;
u16 t;
sp.f0 = a1[0];
sp.f2 = a1[1];
t = a1[2];
sp.f6 = 0x35C;
sp.fA = 0;
sp.f8 = 0;
sp.fE = a2;
sp.f10 = 0;
sp.fC = 0x7FFF;
sp.f4 = t;
func_8012C51C(&sp, a0);
}
extern void (*D_801B29B8[])(void);
src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c
+22 -1
View File
@@ -4526,7 +4526,28 @@ void func_80182470(void *arg0) {
}
INCLUDE_ASM("asm/ov_SC05_003/nonmatchings/ov_SC05_003_jr_8017BEBC", func_801824B4);
/* Sibling shape: DEFINE_func_80143BDC() in src/shared/engine_core.h (cookbook §71) */
extern s32 func_8012C51C(void *a0, s32 a1);
void func_801824B4(s32 a0, u16 *a1, s16 a2) {
struct S80190C84 sp;
u16 t;
sp.f0 = a1[0];
sp.f2 = a1[1];
t = a1[2];
sp.f6 = 0x35C;
sp.fA = 0;
sp.f8 = 0;
sp.fE = a2;
sp.f10 = 0;
sp.fC = 0x7FFF;
sp.f4 = t;
func_8012C51C(&sp, a0);
}
src/ov_SC05_007/ov_SC05_007_jr_8017BEBC.c
+22 -1
View File
@@ -4587,7 +4587,28 @@ void func_8018096C(void *arg0) {
}
INCLUDE_ASM("asm/ov_SC05_007/nonmatchings/ov_SC05_007_jr_8017BEBC", func_801809B0);
/* Sibling shape: DEFINE_func_80143BDC() in src/shared/engine_core.h (cookbook §71) */
extern s32 func_8012C51C(void *a0, s32 a1);
void func_801809B0(s32 a0, u16 *a1, s16 a2) {
struct S80190C84 sp;
u16 t;
sp.f0 = a1[0];
sp.f2 = a1[1];
t = a1[2];
sp.f6 = 0x35C;
sp.fA = 0;
sp.f8 = 0;
sp.fE = a2;
sp.f10 = 0;
sp.fC = 0x7FFF;
sp.f4 = t;
func_8012C51C(&sp, a0);
}
src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c
+112 -3
View File
@@ -47,7 +47,6 @@ extern void func_80162120(void);
extern void func_80029124(s32, s32);
extern s32 func_80165A50(s32);
extern void func_80029514(s32);
extern u8 D_800AF630[];
extern u8 D_80078EC0;
extern s32 func_80028FBC(void);
extern s32 func_80029000(void);
@@ -4224,7 +4223,31 @@ void func_8017D6EC(void *arg0) {
INCLUDE_ASM("asm/ov_SC05_017/nonmatchings/ov_SC05_017_jr_8017AE2C", func_8017D77C);
INCLUDE_ASM("asm/ov_SC05_017/nonmatchings/ov_SC05_017_jr_8017AE2C", func_8017D9B8);
/* func_8017D9B8 - iterate through 4-entry array, call func_8017DA08 if any unk1C is non-zero */
extern void func_8017DA08(void *arg0);
void func_8017D9B8(void) {
extern Ent_8017D6EC D_801ECDB0[];
s32 i = 0;
Ent_8017D6EC *p = &D_801ECDB0[0];
while (i < 4) {
if (p->unk1C != 0) {
func_8017DA08(p);
break;
}
i++;
p = (Ent_8017D6EC *)((char *)p + 0x24);
}
}
extern s32 rand(void);
@@ -7681,7 +7704,93 @@ void func_80185DC0(void *a0)
}
INCLUDE_ASM("asm/ov_SC05_017/nonmatchings/ov_SC05_017_jr_8017AE2C", func_80185E3C);
/* func_80185E3C — scan the 96-entry / 0x10C-stride D_801202A0 actor table for
* the lowest-scoring slot whose u16 tag at +0 is 0x61, then splat 3 words plus
* an align-1 8-byte block into the caller's struct.
*
* Byte-verified idioms (all four were needed; each was a real residual):
*
* 1. The 0x61 compare constant is NOT a source variable. gcc keeps it in a
* callee-saved reg and LICM sinks the `li` into the loop PREHEADER, so
* `addiu $s5,$zero,0x61` lands AFTER the guard branch's delay slot. Pinning
* an `s5` local puts the `li` in the entry block instead (+1 wrong slot).
*
* 2. The 8-byte copy at +0x10 is ONE align-1 struct assign, not two 4-byte
* ones. gcc's MIPS block move loads BOTH words first (lwl/lwr $a0,
* lwl/lwr $a1) then stores both; splitting it emits load/nop/store twice
* and costs an instruction (cookbook-index: "align-1 4xu8 struct assign
* emits the inline form").
*
* 3. The parameter must NOT be register-pinned. With `register u8 *s2
* __asm__("$18")` the entry-block `move` is a schedulable body insn and
* the list scheduler ranks the higher-priority `lui $s0` chain ahead of
* it, so the anti-dependent prologue `sw`s come out in regno order
* (s0,s1,s2,s3) instead of the target's def order (s2,s0,s1,s3). Letting
* gcc allocate the incoming parameter itself keeps the copy first and the
* whole prologue falls into place. (The other five pins are still needed.)
*
* 4. After the block store, gcc-2.7.2 CSE has invalidated memory, so
* a0->0x20 is RELOADED into a second pseudo — two separate C variables,
* not one reused variable (one variable => one pseudo => $a3 for both).
* The destination pointer must also be loaded BEFORE the source pointer:
* that source order is what lets the scheduler hoist `lw $v1,0x20($s2)`
* up into the first word-copy's load-delay slot.
*/
extern s32 func_8012BD14(s32 a0);
/* align-1 8-byte payload — drives the lwl/lwr + swl/swr inline block move */
void func_80185E3C(void *a0)
{
extern u8 D_801202A0[];
register u8 *s0 __asm__("$16");
register s32 s1 __asm__("$17");
register u8 *s3 __asm__("$19");
register u8 *s4 __asm__("$20");
u8 *s2;
u8 *v0;
u8 *v1;
u8 *a0p;
s2 = (u8 *)a0;
s0 = D_801202A0;
s1 = 0x7FFF;
s3 = s0 + 0x6480;
while (s0 != s3) {
if (*(u16 *)s0 == 0x61) {
s32 v1_val = func_8012BD14((s32)s0);
if (v1_val < s1) {
s1 = v1_val;
s4 = s0;
}
}
s0 += 0x10C;
}
s0 = s4;
if (s1 == 0x7FFF) {
*(s16 *)((s32)s2 + 0x5C) = 0;
} else {
*(s32 *)(s2 + 0x4) = *(s32 *)(s0 + 0x4);
*(s32 *)(s2 + 0x8) = *(s32 *)(s0 + 0x8);
*(s32 *)(s2 + 0xC) = *(s32 *)(s0 + 0xC);
v1 = *(u8 **)(s2 + 0x20);
v0 = *(u8 **)(s0 + 0x20);
*(struct Un8_8018613C *)(v1 + 0x10) = *(struct Un8_8018613C *)(v0 + 0x10);
a0p = *(u8 **)(s2 + 0x20);
*(u16 *)(a0p + 0x12) = *(u16 *)(a0p + 0x12) - *(u16 *)(s0 + 0xFE);
*(s16 *)((s32)s2 + 0x5C) = 0x800;
}
}
INCLUDE_ASM("asm/ov_SC05_017/nonmatchings/ov_SC05_017_jr_8017AE2C", func_80185F5C);
src/ov_SC05_018/ov_SC05_018_jr_8017D604.c
+112 -3
View File
@@ -49,7 +49,6 @@ extern void func_80162120(void);
extern void func_80029124(s32, s32);
extern s32 func_80165A50(s32);
extern void func_80029514(s32);
extern u8 D_800AF630[];
extern u8 D_80078EC0;
extern s32 func_80028FBC(void);
extern s32 func_80029000(void);
@@ -4033,7 +4032,31 @@ void func_8018326C(void *arg0) {
INCLUDE_ASM("asm/ov_SC05_018/nonmatchings/ov_SC05_018_jr_8017D604", func_801832FC);
INCLUDE_ASM("asm/ov_SC05_018/nonmatchings/ov_SC05_018_jr_8017D604", func_80183538);
/* func_80183538 - iterate through 4-entry array, call func_80183588 if any unk1C is non-zero */
extern void func_80183588(void *arg0);
void func_80183538(void) {
extern Ent_8017D6EC D_801E6658[];
s32 i = 0;
Ent_8017D6EC *p = &D_801E6658[0];
while (i < 4) {
if (p->unk1C != 0) {
func_80183588(p);
break;
}
i++;
p = (Ent_8017D6EC *)((char *)p + 0x24);
}
}
extern s32 rand(void);
@@ -5452,7 +5475,93 @@ void func_80185AA4(void *a0)
}
INCLUDE_ASM("asm/ov_SC05_018/nonmatchings/ov_SC05_018_jr_8017D604", func_80185B20);
/* func_80185B20 — scan the 96-entry / 0x10C-stride D_801202A0 actor table for
* the lowest-scoring slot whose u16 tag at +0 is 0x61, then splat 3 words plus
* an align-1 8-byte block into the caller's struct.
*
* Byte-verified idioms (all four were needed; each was a real residual):
*
* 1. The 0x61 compare constant is NOT a source variable. gcc keeps it in a
* callee-saved reg and LICM sinks the `li` into the loop PREHEADER, so
* `addiu $s5,$zero,0x61` lands AFTER the guard branch's delay slot. Pinning
* an `s5` local puts the `li` in the entry block instead (+1 wrong slot).
*
* 2. The 8-byte copy at +0x10 is ONE align-1 struct assign, not two 4-byte
* ones. gcc's MIPS block move loads BOTH words first (lwl/lwr $a0,
* lwl/lwr $a1) then stores both; splitting it emits load/nop/store twice
* and costs an instruction (cookbook-index: "align-1 4xu8 struct assign
* emits the inline form").
*
* 3. The parameter must NOT be register-pinned. With `register u8 *s2
* __asm__("$18")` the entry-block `move` is a schedulable body insn and
* the list scheduler ranks the higher-priority `lui $s0` chain ahead of
* it, so the anti-dependent prologue `sw`s come out in regno order
* (s0,s1,s2,s3) instead of the target's def order (s2,s0,s1,s3). Letting
* gcc allocate the incoming parameter itself keeps the copy first and the
* whole prologue falls into place. (The other five pins are still needed.)
*
* 4. After the block store, gcc-2.7.2 CSE has invalidated memory, so
* a0->0x20 is RELOADED into a second pseudo — two separate C variables,
* not one reused variable (one variable => one pseudo => $a3 for both).
* The destination pointer must also be loaded BEFORE the source pointer:
* that source order is what lets the scheduler hoist `lw $v1,0x20($s2)`
* up into the first word-copy's load-delay slot.
*/
extern s32 func_8012BD14(s32 a0);
/* align-1 8-byte payload — drives the lwl/lwr + swl/swr inline block move */
void func_80185B20(void *a0)
{
extern u8 D_801202A0[];
register u8 *s0 __asm__("$16");
register s32 s1 __asm__("$17");
register u8 *s3 __asm__("$19");
register u8 *s4 __asm__("$20");
u8 *s2;
u8 *v0;
u8 *v1;
u8 *a0p;
s2 = (u8 *)a0;
s0 = D_801202A0;
s1 = 0x7FFF;
s3 = s0 + 0x6480;
while (s0 != s3) {
if (*(u16 *)s0 == 0x61) {
s32 v1_val = func_8012BD14((s32)s0);
if (v1_val < s1) {
s1 = v1_val;
s4 = s0;
}
}
s0 += 0x10C;
}
s0 = s4;
if (s1 == 0x7FFF) {
*(s16 *)((s32)s2 + 0x5C) = 0;
} else {
*(s32 *)(s2 + 0x4) = *(s32 *)(s0 + 0x4);
*(s32 *)(s2 + 0x8) = *(s32 *)(s0 + 0x8);
*(s32 *)(s2 + 0xC) = *(s32 *)(s0 + 0xC);
v1 = *(u8 **)(s2 + 0x20);
v0 = *(u8 **)(s0 + 0x20);
*(struct Un8_8018613C *)(v1 + 0x10) = *(struct Un8_8018613C *)(v0 + 0x10);
a0p = *(u8 **)(s2 + 0x20);
*(u16 *)(a0p + 0x12) = *(u16 *)(a0p + 0x12) - *(u16 *)(s0 + 0xFE);
*(s16 *)((s32)s2 + 0x5C) = 0x800;
}
}
INCLUDE_ASM("asm/ov_SC05_018/nonmatchings/ov_SC05_018_jr_8017D604", func_80185C40);
src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c
+230 -2
View File
@@ -3399,7 +3399,123 @@ DEFINE_func_8017C14C() /* dedup: shared engine-core @0x8017C14C (src/shared) */
INCLUDE_ASM("asm/ov_SC06_000/nonmatchings/ov_SC06_000_jr_8017AE2C", func_8017C154);
INCLUDE_ASM("asm/ov_SC06_000/nonmatchings/ov_SC06_000_jr_8017AE2C", func_8017C290);
extern void func_80013F3C(s32 a0);
extern void func_80017714(void *);
extern void func_8004914C();
extern void func_800491AC();
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
void func_8017C290(int a, s16 *b, SVECTOR_8017E72C *c, SVECTOR_8017E72C *d,
SVECTOR_8017E72C *e, SVECTOR_8017E72C *f, s16 *g)
{
extern struct PW8017E72C D_8018BC8C[];
/* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every
LATER function in this TU, which blocks a byte-true decl of a different type.
Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
extern SVECTOR_8017E72C D_801AE6A8[4];
extern struct PW8017E72C D_801AE6C8;
extern struct PW8017E72C D_801AE6CC;
extern u8 D_801AE6D0, D_801AE6D1, D_801AE6D2, D_801AE6D4, D_801AE6D5, D_801AE6D6;
extern int D_801AE6D8;
MATRIX_8017E72C m;
SVECTOR_8017E72C *r0_00;
SVECTOR_8017E72C *pSVar6;
SVECTOR_8017E72C *r0;
int r;
int mask;
func_80013F3C((s32)&m);
RotMatrixZ(g[0], &m);
m.t[0] = b[0];
m.t[1] = b[1];
m.t[2] = 0;
func_8004914C(&m);
func_800491AC(&m);
r0_00 = &D_801AE6A8[0];
if (*(s16 *)(a + 0x12) == 0) {
D_801AE6D8 = 0x50000000;
D_801AE6C8 = D_8018BC8C[*(s32 *)(a + 0x2C)];
D_801AE6CC = D_8018BC8C[*(s32 *)(a + 0x2C)];
D_801AE6D0 = 0;
D_801AE6D1 = 0;
D_801AE6D2 = 0;
D_801AE6D4 = 0;
D_801AE6D5 = 0;
D_801AE6D6 = 0;
}
f->vx = f->vx + c->vx;
f->vy = f->vy + c->vy;
r = rand();
mask = f->pad & r;
if (*(u16 *)(a + 0x12) & 1)
f->vx = f->vx + mask;
else
f->vx = f->vx - mask;
r = rand();
{ int t = f->vy - 0x10; f->vy = t + (r & 0x1f); }
gte_ldv0(c);
gte_rt();
gte_stsv(r0_00);
gte_ldv0(f);
gte_rt();
gte_stsv(r0_00 + 1);
gte_ldv0(d);
gte_rt();
r0 = r0_00 + 2;
gte_stsv(r0);
*d = *f;
r = rand();
d->vx = d->vx - (f->pad & r);
gte_ldv0(d);
gte_rt();
pSVar6 = r0_00 + 3;
gte_stsv(pSVar6);
r0_00->vz = ((u16 *)b)[2];
func_80017714(r0_00);
gte_ldv0(e);
gte_rt();
gte_stsv(r0);
*e = *f;
r = rand();
e->vx = e->vx + (f->pad & r);
gte_ldv0(e);
gte_rt();
gte_stsv(pSVar6);
r0_00->vz = ((u16 *)b)[2];
func_80017714(r0_00);
*c = *f;
}
INCLUDE_ASM("asm/ov_SC06_000/nonmatchings/ov_SC06_000_jr_8017AE2C", func_8017C624);
@@ -3591,7 +3707,119 @@ INCLUDE_ASM("asm/ov_SC06_000/nonmatchings/ov_SC06_000_jr_8017AE2C", func_8017D19
INCLUDE_ASM("asm/ov_SC06_000/nonmatchings/ov_SC06_000_jr_8017AE2C", func_8017D1E0);
INCLUDE_ASM("asm/ov_SC06_000/nonmatchings/ov_SC06_000_jr_8017AE2C", func_8017D318);
extern void func_80013F3C(s32 a0);
extern void func_80017714(void *);
extern void func_8004914C();
extern void func_800491AC();
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
#define gte_ldv0(r0) __asm__ __volatile__( \
"lwc2 $0, 0(%0)\n" \
"lwc2 $1, 4(%0)\n" \
: : "r"(r0) : "memory")
#define gte_rt() __asm__ __volatile__( \
"nop\n" \
"nop\n" \
"mvmva 1, 0, 0, 0, 0\n" \
: : : "memory")
#define gte_stsv(r0) __asm__ __volatile__( \
"mfc2 $12, $9\n" \
"mfc2 $13, $10\n" \
"mfc2 $14, $11\n" \
"sh $12, 0(%0)\n" \
"sh $13, 2(%0)\n" \
"sh $14, 4(%0)\n" \
: : "r"(r0) : "$12", "$13", "$14", "memory")
#define gte_ldv0(r0) __asm__ volatile ( \
"lwc2 $0, 0( %0 );" \
"lwc2 $1, 4( %0 )" \
: \
: "r"( r0 ) )
void func_8017D318(int a0, SVECTOR_8017C290 *a1, SVECTOR_8017C290 *a2, s32 a3)
{
extern struct PW8017C290 D_8018BCB4[];
extern struct PW8017C290 D_8018BCC8[];
extern SVECTOR_8017C290 D_801AE6A8[4];
extern struct PW8017C290 D_801AE6C8;
extern struct PW8017C290 D_801AE6CC;
extern u8 D_801AE6D0, D_801EA8E9, D_801EA8EA, D_801AE6D4, D_801EA8ED, D_801EA8EE;
extern u8 D_801AE6D0, D_801EA8E9, D_801EA8EA, D_801AE6D4, D_801EA8ED, D_801EA8EE;
extern int D_801AE6D8;
MATRIX_8017C290 m;
SVECTOR_8017C290 *r0_00;
SVECTOR_8017C290 *r0;
SVECTOR_8017C290 *pSVar6;
D_801AE6D8 = 0x50000000;
D_801AE6C8 = D_8018BCB4[*(s32 *)(a0 + 0x2C)];
D_801AE6CC = D_8018BCC8[*(s32 *)(a0 + 0x2C)];
*(struct PW8017C290 *)&D_801AE6D0 = D_8018BCB4[*(s32 *)(a0 + 0x2C)];
*(struct PW8017C290 *)&D_801AE6D4 = D_8018BCC8[*(s32 *)(a0 + 0x2C)];
func_80013F3C((s32)&m);
RotMatrixZ((s16)a3, &m);
m.t[0] = *(s16 *)(a0 + 0x6);
m.t[1] = *(s16 *)(a0 + 0xA);
m.t[2] = 0;
func_8004914C(&m);
func_800491AC(&m);
r0_00 = &D_801AE6A8[0];
gte_ldv0(a1);
gte_rt();
gte_stsv(r0_00);
gte_ldv0(a2);
gte_rt();
gte_stsv(r0_00 + 1);
a1->vx = a1->vx - 2;
gte_ldv0(a1);
gte_rt();
r0 = r0_00 + 2;
gte_stsv(r0);
a2->vx = a2->vx - 2;
gte_ldv0(a2);
gte_rt();
pSVar6 = r0_00 + 3;
gte_stsv(pSVar6);
r0_00->vz = *(u16 *)(a0 + 0xE);
func_80017714(r0_00);
a1->vx = a1->vx + 4;
gte_ldv0(a1);
gte_rt();
gte_stsv(r0);
a2->vx = a2->vx + 4;
gte_ldv0(a2);
gte_rt();
gte_stsv(pSVar6);
r0_00->vz = *(u16 *)(a0 + 0xE);
func_80017714(r0_00);
}
extern s32 func_80146A6C(s32 a0, void *a1, s32 a2, s32 a3, s32 a4, s32 a5, s32 a6);