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https://github.com/Druthulu/BFM-decomp
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feat(phase-30 S38): wave-6 propagation — func_80181CE4 x6 sibling slots
jtbl_family_bank (the §53 carve path; family_sweep --hseq refuses has_mid_jr families by design). Each sibling individually byte-gated: carve -> extract -> remap -> whole-binary build, kept iff byte-identical else reverted. Committed here because jtbl_family_bank requires a clean tree between families (its per-sibling revert restores from HEAD). R22 clean-fleet runs once over the whole batch.
This commit is contained in:
Drew T
+3
-2
@@ -2525,7 +2525,7 @@ ov_SC03_112_ELF := $(ov_SC03_112_OUT).elf
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ov_SC03_112_MAPFILE := $(ov_SC03_112_OUT).map
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ov_SC03_112_LD_SCRIPT := $(ov_SC03_112_OUT).ld
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ov_SC03_112_SPLAT_YAML := config/splat.ov_SC03_112.yaml
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ov_SC03_112_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_112.o,ov_SC03_112_jr_8012ACE0.o,tail2.data.o,ov_SC03_112_jr_80135888.o,tail3.data.o,ov_SC03_112_jr_80135A4C.o,tail4.data.o,ov_SC03_112_jr_80135D20.o,tail5.data.o,ov_SC03_112_jr_801380E0.o,ov_SC03_112_o0c.o,tail6.data.o,ov_SC03_112_jr_8013F350.o,tail7.data.o,ov_SC03_112_jr_8013FFD8.o,tail8.data.o,ov_SC03_112_jr_80140608.o,tail9.data.o,ov_SC03_112_jr_8015444C.o,ov_SC03_112_jr_80154C24.o,ov_SC03_112_jr_801588CC.o,ov_SC03_112_jr_80159C84.o,tail10.data.o,ov_SC03_112_jr_8015A3C8.o,tail11.data.o,ov_SC03_112_jr_8015AE2C.o,tail12.data.o,ov_SC03_112_jr_8015C32C.o,tail13.data.o,ov_SC03_112_jr_8016AB6C.o,tail14.data.o,ov_SC03_112_jr_80171B4C.o,ov_SC03_112_jr_801734BC.o,tail15.data.o,ov_SC03_112_jr_801789AC.o,ov_SC03_112_jr_80178D40.o,tail16.data.o,ov_SC03_112_jr_8017A4AC.o,tail17.data.o,ov_SC03_112_jr_8017AE2C.o,ov_SC03_112_jr_8017C294.o,tail18.data.o,ov_SC03_112_jr_80183AE0.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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ov_SC03_112_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_112.o,ov_SC03_112_jr_8012ACE0.o,tail2.data.o,ov_SC03_112_jr_80135888.o,tail3.data.o,ov_SC03_112_jr_80135A4C.o,tail4.data.o,ov_SC03_112_jr_80135D20.o,tail5.data.o,ov_SC03_112_jr_801380E0.o,ov_SC03_112_o0c.o,tail6.data.o,ov_SC03_112_jr_8013F350.o,tail7.data.o,ov_SC03_112_jr_8013FFD8.o,tail8.data.o,ov_SC03_112_jr_80140608.o,tail9.data.o,ov_SC03_112_jr_8015444C.o,ov_SC03_112_jr_80154C24.o,ov_SC03_112_jr_801588CC.o,ov_SC03_112_jr_80159C84.o,tail10.data.o,ov_SC03_112_jr_8015A3C8.o,tail11.data.o,ov_SC03_112_jr_8015AE2C.o,tail12.data.o,ov_SC03_112_jr_8015C32C.o,tail13.data.o,ov_SC03_112_jr_8016AB6C.o,tail14.data.o,ov_SC03_112_jr_80171B4C.o,ov_SC03_112_jr_801734BC.o,tail15.data.o,ov_SC03_112_jr_801789AC.o,ov_SC03_112_jr_80178D40.o,tail16.data.o,ov_SC03_112_jr_8017A4AC.o,tail17.data.o,ov_SC03_112_jr_8017AE2C.o,ov_SC03_112_jr_8017C294.o,tail18.data.o,ov_SC03_112_jr_80182BF8.o,ov_SC03_112_jr_80183AE0.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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build/src/ov_SC03_112/ov_SC03_112.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
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build/src/ov_SC03_112/ov_SC03_112_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
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build/src/ov_SC03_112/ov_SC03_112_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
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@@ -2573,6 +2573,7 @@ build/src/ov_SC03_113/ov_SC03_113_jr_80159C84.o: JTBL_PADS := 0,4 # §8e pads (
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build/src/ov_SC03_113/ov_SC03_113_jr_8015AE2C.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
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build/src/ov_SC03_113/ov_SC03_113_jr_8016AB6C.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
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build/src/ov_SC03_113/ov_SC03_113_jr_80178D40.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x178
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build/src/ov_SC03_113/ov_SC03_113_jr_8017C294.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
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build/src/ov_SC03_113/ov_SC03_113_o0c.o: JTBL_PADS := 0,4,4,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x38,+0xa8,+0x118
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ov_SC03_113_CHECK_SHA := config/check.ov_SC03_113.sha
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ov_SC03_113_SYMBOLS := config/symbols.ov_SC03_113.txt
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@@ -3580,7 +3581,7 @@ ov_SC05_004_ELF := $(ov_SC05_004_OUT).elf
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ov_SC05_004_MAPFILE := $(ov_SC05_004_OUT).map
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ov_SC05_004_LD_SCRIPT := $(ov_SC05_004_OUT).ld
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ov_SC05_004_SPLAT_YAML := config/splat.ov_SC05_004.yaml
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ov_SC05_004_JTBL_INTERLEAVE := --order tail.data.o,ov_SC05_004.o,ov_SC05_004_jr_8012ACE0.o,tail2.data.o,ov_SC05_004_jr_80135888.o,tail3.data.o,ov_SC05_004_jr_80135A4C.o,tail4.data.o,ov_SC05_004_jr_80135D20.o,tail5.data.o,ov_SC05_004_jr_801380E0.o,ov_SC05_004_o0c.o,tail6.data.o,ov_SC05_004_jr_8013F350.o,tail7.data.o,ov_SC05_004_jr_8014032C.o,tail8.data.o,ov_SC05_004_jr_80140608.o,tail9.data.o,ov_SC05_004_jr_8015444C.o,ov_SC05_004_jr_80154C24.o,ov_SC05_004_jr_801588CC.o,ov_SC05_004_jr_80159C84.o,tail10.data.o,ov_SC05_004_jr_8015A3C8.o,tail11.data.o,ov_SC05_004_jr_8015AE2C.o,tail12.data.o,ov_SC05_004_jr_8015C32C.o,tail13.data.o,ov_SC05_004_jr_8016AB6C.o,tail14.data.o,ov_SC05_004_jr_80171B4C.o,ov_SC05_004_jr_801734BC.o,tail15.data.o,ov_SC05_004_jr_801789AC.o,ov_SC05_004_jr_80178D40.o,tail16.data.o,ov_SC05_004_jr_8017A4AC.o,tail17.data.o,ov_SC05_004_jr_8017AE2C.o,ov_SC05_004_jr_8017BEBC.o,tail18.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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ov_SC05_004_JTBL_INTERLEAVE := --order tail.data.o,ov_SC05_004.o,ov_SC05_004_jr_8012ACE0.o,tail2.data.o,ov_SC05_004_jr_80135888.o,tail3.data.o,ov_SC05_004_jr_80135A4C.o,tail4.data.o,ov_SC05_004_jr_80135D20.o,tail5.data.o,ov_SC05_004_jr_801380E0.o,ov_SC05_004_o0c.o,tail6.data.o,ov_SC05_004_jr_8013F350.o,tail7.data.o,ov_SC05_004_jr_8014032C.o,tail8.data.o,ov_SC05_004_jr_80140608.o,tail9.data.o,ov_SC05_004_jr_8015444C.o,ov_SC05_004_jr_80154C24.o,ov_SC05_004_jr_801588CC.o,ov_SC05_004_jr_80159C84.o,tail10.data.o,ov_SC05_004_jr_8015A3C8.o,tail11.data.o,ov_SC05_004_jr_8015AE2C.o,tail12.data.o,ov_SC05_004_jr_8015C32C.o,tail13.data.o,ov_SC05_004_jr_8016AB6C.o,tail14.data.o,ov_SC05_004_jr_80171B4C.o,ov_SC05_004_jr_801734BC.o,tail15.data.o,ov_SC05_004_jr_801789AC.o,ov_SC05_004_jr_80178D40.o,tail16.data.o,ov_SC05_004_jr_8017A4AC.o,tail17.data.o,ov_SC05_004_jr_8017AE2C.o,ov_SC05_004_jr_8017BEBC.o,tail18.data.o,ov_SC05_004_jr_8017F210.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
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build/src/ov_SC05_004/ov_SC05_004.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
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build/src/ov_SC05_004/ov_SC05_004_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
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build/src/ov_SC05_004/ov_SC05_004_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
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@@ -121,6 +121,7 @@ segments:
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- [0x52354, c, ov_SC03_112_jr_8017A4AC]
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- [0x52cd4, c, ov_SC03_112_jr_8017AE2C]
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- [0x5413c, c, ov_SC03_112_jr_8017C294]
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- [0x5aaa0, c, ov_SC03_112_jr_80182BF8]
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- [0x5b988, c, ov_SC03_112_jr_80183AE0]
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- [0x5d584, data, tail]
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- [0x826d8, .rodata, ov_SC03_112] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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@@ -165,6 +166,7 @@ segments:
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- [0x837f8, .rodata, ov_SC03_112_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x8380c, .rodata, ov_SC03_112_jr_8017C294] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x8382c, data, tail18]
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- [0x83928, .rodata, ov_SC03_112_jr_80182BF8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x83990, .rodata, ov_SC03_112_jr_80183AE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x839b8, data, tail19]
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- [0x84FF4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
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@@ -163,7 +163,7 @@ segments:
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- [0x7c47c, data, tail17]
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- [0x7c480, .rodata, ov_SC03_113_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x7c494, .rodata, ov_SC03_113_jr_8017C294] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x7c4b4, data, tail18]
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- [0x7c51c, data, tail18]
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- [0x7DB94, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
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- [0x7DB97] # EOF marker = the 0.4.dec byte length
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# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
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@@ -121,6 +121,7 @@ segments:
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- [0x52354, c, ov_SC05_004_jr_8017A4AC]
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- [0x52cd4, c, ov_SC05_004_jr_8017AE2C]
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- [0x53d64, c, ov_SC05_004_jr_8017BEBC]
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- [0x570b8, c, ov_SC05_004_jr_8017F210]
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- [0x594c8, data, tail]
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- [0x7494c, .rodata, ov_SC05_004] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x74a28, .rodata, ov_SC05_004_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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@@ -164,6 +165,8 @@ segments:
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- [0x75a6c, .rodata, ov_SC05_004_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x75a80, .rodata, ov_SC05_004_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x75aa0, data, tail18]
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- [0x75aa8, .rodata, ov_SC05_004_jr_8017F210] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
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- [0x75b10, data, tail19]
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- [0x771CC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
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- [0x771CF] # EOF marker = the 0.4.dec byte length
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# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
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@@ -4953,191 +4953,3 @@ INCLUDE_ASM("asm/ov_SC03_112/nonmatchings/ov_SC03_112_jr_8017C294", func_8018294
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INCLUDE_ASM("asm/ov_SC03_112/nonmatchings/ov_SC03_112_jr_8017C294", func_80182A28);
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INCLUDE_ASM("asm/ov_SC03_112/nonmatchings/ov_SC03_112_jr_8017C294", func_80182B20);
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INCLUDE_ASM("asm/ov_SC03_112/nonmatchings/ov_SC03_112_jr_8017C294", func_80182BF8);
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extern s32 func_8004787C(s32 a0);
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extern s32 func_80047948(s32 a0);
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extern void func_80049CAC(s32 a0, s32 a1);
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extern void func_8012C218(void *a0);
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extern s32 func_8012CEB0(s32 a0, s32 a1, s32 a2);
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#define SRM_80186B78(r0) __asm__ __volatile__( \
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"lw $12, 0(%0)\n" \
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"lw $13, 4(%0)\n" \
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"ctc2 $12, $0\n" \
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"ctc2 $13, $1\n" \
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"lw $12, 8(%0)\n" \
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"lw $13, 12(%0)\n" \
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"lw $14, 16(%0)\n" \
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"ctc2 $12, $2\n" \
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"ctc2 $13, $3\n" \
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"ctc2 $14, $4\n" \
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: : "r"(r0) : "$12", "$13", "$14", "memory")
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#define STM_80186B78(r0) __asm__ __volatile__( \
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"lw $12, 20(%0)\n" \
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"lw $13, 24(%0)\n" \
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"ctc2 $12, $5\n" \
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"lw $14, 28(%0)\n" \
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"ctc2 $13, $6\n" \
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"ctc2 $14, $7\n" \
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: : "r"(r0) : "$12", "$13", "$14", "memory")
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void func_801833A4(s32 a0)
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{
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u16 out[4]; /* sp+0x10 */
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s16 sv[4]; /* sp+0x18 */
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s16 pos[4]; /* sp+0x20 */
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s32 flag; /* sp+0x28 */
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s16 *p;
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if (*(s16 *)(*(s32 *)(a0 + 0x64) + 0x36) != *(s16 *)(a0 + 0xFE)) {
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((void (*)(void))func_8012C218)();
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return;
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}
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if (*(s16 *)(a0 + 0x70) == 1 || *(s16 *)(a0 + 0x70) == 8) {
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s32 ang;
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s32 t;
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ang = (*(u16 *)(a0 + 0xFC) + 0x40) & 0xFFF;
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p = *(s16 **)(a0 + 0xCC);
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*(s16 *)(a0 + 0xFC) = ang;
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t = (func_8004787C(ang) >> 6) + 0xBF;
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p[2] = t;
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p[1] = t;
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p[0] = t;
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}
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if (*(s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 4) < 0) {
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{ register s32 *q __asm__("$3"); q = *(s32 **)(a0 + 0x20);
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q[1] = q[1] | 0x80000000; }
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} else {
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__asm__ __volatile__("");
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*(s32 *)(*(s32 *)(a0 + 0x20) + 4) =
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*(s32 *)(*(s32 *)(a0 + 0x20) + 4) & 0x7FFFFFFF;
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}
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*(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) =
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*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x18);
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if (*(s16 *)(*(s32 *)(a0 + 0x64) + 0x70) < 8) {
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*(s16 *)(a0 + 0x108) = (*(u16 *)(a0 + 0x108) + 0x40) & 0xFFF;
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*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
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*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) & 0xFFF;
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*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12) =
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*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12) & 0xFFF;
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flag = *(s16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12) -
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*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12);
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if (flag > 0x800) {
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flag = flag - 0x1000;
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}
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if (flag < -0x800) {
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flag = flag + 0x1000;
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}
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if (flag > 0x200) {
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s32 t = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) - 0x200;
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*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) = t + flag;
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} else if (flag < -0x200) {
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s32 t = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + 0x200;
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*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) = t + flag;
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} else {
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*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
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*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + (flag / 16);
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}
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*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
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*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) +
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(func_8004787C(*(s16 *)(a0 + 0x108)) >> 6);
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func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
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SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
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STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
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p = *(s16 **)(a0 + 0xD0);
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sv[0] = 0;
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sv[1] = 0;
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sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
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RotTransSV(sv, out, &flag);
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*(s16 *)(a0 + 6) = out[0];
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*(s16 *)(a0 + 0xA) = out[1];
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*(s16 *)(a0 + 0xE) = out[2];
|
||||
out[1] = out[1] - 0x40;
|
||||
|
||||
pos[0] = *(u16 *)(a0 + 6);
|
||||
pos[1] = *(u16 *)(a0 + 0xA) + 0x10;
|
||||
pos[2] = *(u16 *)(a0 + 0xE);
|
||||
flag = func_8012CEB0((s32)out, (s32)pos, 1);
|
||||
if (flag & 0x1000) {
|
||||
return;
|
||||
}
|
||||
if (flag != 0) {
|
||||
s32 d;
|
||||
s32 t = pos[1] - 0x10;
|
||||
d = *(s16 *)(a0 + 0xA) - t;
|
||||
if (d < 5) {
|
||||
return;
|
||||
}
|
||||
if (d > 0x40) {
|
||||
d = 0x40;
|
||||
}
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) + (d << 4);
|
||||
|
||||
func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
|
||||
SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
|
||||
STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
|
||||
|
||||
p = *(s16 **)(a0 + 0xD0);
|
||||
sv[0] = 0;
|
||||
sv[1] = 0;
|
||||
sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
|
||||
RotTransSV(sv, out, &flag);
|
||||
|
||||
*(s16 *)(a0 + 6) = out[0];
|
||||
*(s16 *)(a0 + 0xA) = out[1];
|
||||
*(s16 *)(a0 + 0xE) = out[2];
|
||||
} else {
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) - 0x80;
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) & 0xFFF;
|
||||
if ((u32)(*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) - 0x801) < 0x3FF) {
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = 0xC00;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
s32 ang;
|
||||
s32 ang2;
|
||||
|
||||
ang = (*(u16 *)(a0 + 0x102) + *(u16 *)(a0 + 0x106)) & 0xFFF;
|
||||
*(s16 *)(a0 + 0x102) = ang;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = func_80047948(ang) >> 6;
|
||||
|
||||
ang2 = (*(u16 *)(a0 + 0x104) + *(u16 *)(a0 + 0x100)) & 0xFFF;
|
||||
*(s16 *)(a0 + 0x104) = ang2;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x14) = func_80047948(ang2) >> 6;
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) + 0xC00;
|
||||
|
||||
func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
|
||||
SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
|
||||
STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
|
||||
|
||||
p = *(s16 **)(a0 + 0xD0);
|
||||
sv[0] = 0;
|
||||
sv[1] = 0;
|
||||
sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
|
||||
RotTransSV(sv, out, &flag);
|
||||
|
||||
*(s16 *)(a0 + 6) = out[0];
|
||||
*(s16 *)(a0 + 0xA) = out[1];
|
||||
*(s16 *)(a0 + 0xE) = out[2];
|
||||
}
|
||||
{ s32 pad[2]; } /* LEVER 1: frame pad. INNER-BLOCK + LAST is load-bearing --
|
||||
a function-scope decl takes 0x28 and evicts flag to 0x30 */
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_112/nonmatchings/ov_SC03_112_jr_8017C294", func_801839AC);
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -5167,7 +5167,311 @@ void func_80180910(void *a0) {
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC03_113/nonmatchings/ov_SC03_113_jr_8017C294", func_8018097C);
|
||||
extern s32 func_8012C354(s32*, s32);
|
||||
extern s32 func_8012C658(s32 arg0, s32 arg1, s32 arg2);
|
||||
extern void func_8012CAE4(void *a0);
|
||||
extern void func_8012A828(s32*, s32);
|
||||
extern void func_8012B1B4(s32 a0, s32 a1);
|
||||
extern void func_8012B23C(s32 a0);
|
||||
extern s32 func_8012C1B8(void);
|
||||
extern void func_8001CA1C(s32 a0, s32 a1);
|
||||
extern void func_800233CC(void *, unsigned short);
|
||||
extern s32 func_8004787C(s32 a0);
|
||||
extern s32 func_80047948(s32 a0);
|
||||
extern s32 rand(void);
|
||||
|
||||
|
||||
void func_8018097C(void *a0v)
|
||||
{
|
||||
|
||||
extern u8 D_8019F1EC[];
|
||||
extern u8 D_801A061C[];
|
||||
extern u8 D_8019F2C0[];
|
||||
extern u8 D_8019F28C[];
|
||||
extern u8 D_801A5A00[];
|
||||
extern u8 D_8019F220[];
|
||||
extern u8 D_8019F22C[];
|
||||
extern u8 D_8019F234[];
|
||||
extern u8 D_8019F244[];
|
||||
extern u16 D_8019F248;
|
||||
extern u8 D_8019F24C[];
|
||||
extern u8 D_8019F258[];
|
||||
extern u8 D_8019F260[];
|
||||
extern u8 D_8019F284[];
|
||||
extern u16 D_8019F288;
|
||||
extern u8 D_8019F270[];
|
||||
extern u8 D_8019F27C[];
|
||||
extern u8 D_801A5A41;
|
||||
extern u8 D_801A5A42;
|
||||
extern u8 D_801A5A44;
|
||||
s32 e;
|
||||
s32 r;
|
||||
s32 o;
|
||||
s32 cc;
|
||||
s32 sv;
|
||||
u8 *p;
|
||||
u8 *q;
|
||||
|
||||
e = (s32)a0v;
|
||||
|
||||
switch (*(s16 *)(e + 0x70)) {
|
||||
case 0:
|
||||
if (((s32 (*)(s32, s32))func_8012C354)(e, (s32)D_8019F1EC) == 0) {
|
||||
return;
|
||||
}
|
||||
*(u8 *)(e + 0xC0) = 1;
|
||||
*(s32 *)(e + 0xB4) = -1;
|
||||
*(s32 *)(e + 0xBC) = (s32)D_8019F2C0;
|
||||
((void (*)(s32, void *))func_8012A828)(e, D_801A061C);
|
||||
*(s16 *)(e + 0x2) = 1;
|
||||
*(s16 *)(e + 0x34) = 1;
|
||||
func_8012B23C(e);
|
||||
func_8012B1B4(e, (s32)D_8019F28C);
|
||||
*(s32 *)(e + 0xCC) = (s32)(D_801A5A00 + *(s16 *)(e + 0xFC) * 8);
|
||||
o = func_8012C658(0x1EA, 1, e);
|
||||
if (o != 0) {
|
||||
*(u16 *)(o + 0xFE) = *(u16 *)(e + 0x36);
|
||||
}
|
||||
return;
|
||||
|
||||
case 1:
|
||||
r = func_8012C1B8();
|
||||
*(s32 *)(e + 0x20) = r;
|
||||
if (r == 0) {
|
||||
func_8012CAE4((void *)e);
|
||||
return;
|
||||
}
|
||||
func_8001CA1C(r, (s32)D_8019F220);
|
||||
((void (*)(s32, void *))func_8012A828)(e, D_8019F22C);
|
||||
*(s16 *)(e + 0x2) = 2;
|
||||
*(s16 *)(e + 0x5C) = 0x810;
|
||||
*(s32 *)(e + 0x58) = (s32)D_8019F234 | 0x40000000 | 0x20000000;
|
||||
*(s32 *)(e + 0xD0) = (s32)D_8019F244;
|
||||
*(u16 *)(e + 0xE) = *(u16 *)(e + 0xE) + D_8019F248;
|
||||
cc = *(s32 *)(*(s32 *)(e + 0x64) + 0xCC);
|
||||
*(u16 *)(*(s32 *)(e + 0x20) + 0x2C) = *(u16 *)(*(s32 *)(e + 0x20) + 0x2C) | 0x80;
|
||||
*(s32 *)(*(s32 *)(e + 0x20) + 0x80) = cc;
|
||||
*(s32 *)(e + 0xCC) = cc;
|
||||
o = func_8012C658(0x1EA, 2, e);
|
||||
if (o != 0) {
|
||||
*(u16 *)(o + 0xFE) = *(u16 *)(e + 0x36);
|
||||
}
|
||||
return;
|
||||
|
||||
case 2:
|
||||
case 3:
|
||||
case 4:
|
||||
case 5:
|
||||
case 6:
|
||||
r = func_8012C1B8();
|
||||
*(s32 *)(e + 0x20) = r;
|
||||
if (r == 0) {
|
||||
func_8012CAE4((void *)e);
|
||||
return;
|
||||
}
|
||||
func_8001CA1C(r, (s32)D_8019F24C);
|
||||
((void (*)(s32, void *))func_8012A828)(e, D_8019F258);
|
||||
*(s16 *)(e + 0x2) = 0xF;
|
||||
*(s16 *)(e + 0x5C) = 0x810;
|
||||
*(s32 *)(e + 0x58) = (s32)D_8019F260 | 0x40000000 | 0x20000000;
|
||||
*(s32 *)(e + 0xD0) = (s32)D_8019F284;
|
||||
*(u16 *)(e + 0xE) = *(u16 *)(e + 0xE) + D_8019F288;
|
||||
return;
|
||||
|
||||
case 7:
|
||||
if (((s32 (*)(s32, s32))func_8012C354)(e, (s32)D_8019F1EC) == 0) {
|
||||
return;
|
||||
}
|
||||
p = &D_801A5A41;
|
||||
q = p - 1;
|
||||
D_801A5A42 = 0xFF;
|
||||
*q = 0xFF;
|
||||
*p = 0;
|
||||
D_801A5A42 = 0;
|
||||
D_801A5A44 = 0;
|
||||
func_800233CC(q, 0x20);
|
||||
*(u8 *)(e + 0xC0) = 1;
|
||||
*(s32 *)(e + 0xB4) = -1;
|
||||
*(s32 *)(e + 0xBC) = (s32)D_8019F2C0;
|
||||
((void (*)(s32, void *))func_8012A828)(e, D_801A061C);
|
||||
*(s16 *)(e + 0x2) = 8;
|
||||
*(s16 *)(e + 0x34) = 0xB;
|
||||
func_8012B23C(e);
|
||||
sv = *(s16 *)(e + 0xFC);
|
||||
*(s16 *)(e + 0xFC) = 0;
|
||||
*(s32 *)(e + 0xCC) = (s32)(D_801A5A00 + sv * 8);
|
||||
o = func_8012C658(0x1EA, 8, e);
|
||||
if (o != 0) {
|
||||
*(u16 *)(o + 0xFE) = *(u16 *)(e + 0x36);
|
||||
}
|
||||
return;
|
||||
|
||||
case 8:
|
||||
r = func_8012C1B8();
|
||||
*(s32 *)(e + 0x20) = r;
|
||||
if (r == 0) {
|
||||
func_8012CAE4((void *)e);
|
||||
return;
|
||||
}
|
||||
func_8001CA1C(r, (s32)D_8019F220);
|
||||
((void (*)(s32, void *))func_8012A828)(e, D_8019F22C);
|
||||
*(s16 *)(e + 0x2) = 2;
|
||||
*(s16 *)(e + 0x5C) = 0x810;
|
||||
*(s32 *)(e + 0x58) = (s32)D_8019F234 | 0x40000000 | 0x20000000;
|
||||
*(s32 *)(e + 0xD0) = (s32)D_8019F244;
|
||||
*(u16 *)(e + 0xE) = *(u16 *)(e + 0xE) + D_8019F248;
|
||||
cc = *(s32 *)(*(s32 *)(e + 0x64) + 0xCC);
|
||||
*(u16 *)(*(s32 *)(e + 0x20) + 0x2C) = *(u16 *)(*(s32 *)(e + 0x20) + 0x2C) | 0x80;
|
||||
*(s32 *)(*(s32 *)(e + 0x20) + 0x80) = cc;
|
||||
*(s32 *)(e + 0xCC) = cc;
|
||||
o = func_8012C658(0x1EA, 9, e);
|
||||
if (o != 0) {
|
||||
*(u16 *)(o + 0xFE) = *(u16 *)(e + 0x36);
|
||||
}
|
||||
*(u16 *)(e + 0x106) = (rand() & 0x1F) + 0x20;
|
||||
*(u16 *)(e + 0x100) = (rand() & 0x1F) + 0x20;
|
||||
*(u16 *)(e + 0x102) = rand() & 0xFFF;
|
||||
*(u16 *)(e + 0x104) = rand() & 0xFFF;
|
||||
return;
|
||||
|
||||
case 9:
|
||||
case 10:
|
||||
case 11:
|
||||
case 12:
|
||||
case 13:
|
||||
r = func_8012C1B8();
|
||||
*(s32 *)(e + 0x20) = r;
|
||||
if (r == 0) {
|
||||
func_8012CAE4((void *)e);
|
||||
return;
|
||||
}
|
||||
func_8001CA1C(r, (s32)D_8019F24C);
|
||||
((void (*)(s32, void *))func_8012A828)(e, D_8019F258);
|
||||
*(s16 *)(e + 0x2) = 0xF;
|
||||
*(s16 *)(e + 0x5C) = 0x810;
|
||||
*(s32 *)(e + 0x58) = (s32)D_8019F260 | 0x40000000 | 0x20000000;
|
||||
*(s32 *)(e + 0xD0) = (s32)D_8019F284;
|
||||
*(u16 *)(e + 0xE) = *(u16 *)(e + 0xE) + D_8019F288;
|
||||
*(u16 *)(e + 0x106) = (rand() & 0x1F) + 0x20;
|
||||
*(u16 *)(e + 0x100) = (rand() & 0x1F) + 0x20;
|
||||
*(u16 *)(e + 0x102) = rand() & 0xFFF;
|
||||
*(u16 *)(e + 0x104) = rand() & 0xFFF;
|
||||
return;
|
||||
|
||||
case 14:
|
||||
r = func_8012C1B8();
|
||||
*(s32 *)(e + 0x20) = r;
|
||||
if (r == 0) {
|
||||
func_8012CAE4((void *)e);
|
||||
return;
|
||||
}
|
||||
func_8001CA1C(r, (s32)D_8019F270);
|
||||
((void (*)(s32, void *))func_8012A828)(e, D_8019F27C);
|
||||
*(s16 *)(e + 0x2) = 0xC;
|
||||
*(u16 *)(*(s32 *)(e + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(e + 0x64) + 0x20) + 0x10);
|
||||
*(u16 *)(*(s32 *)(e + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(e + 0x64) + 0x20) + 0x12);
|
||||
*(s32 *)(e + 0x14) = func_8004787C(*(s16 *)(*(s32 *)(e + 0x20) + 0x10)) << 9;
|
||||
{
|
||||
s32 t1 = func_8004787C(*(s16 *)(*(s32 *)(e + 0x20) + 0x12));
|
||||
*(s32 *)(e + 0x10) = -((t1 * func_80047948(*(s16 *)(*(s32 *)(e + 0x20) + 0x10))) >> 3);
|
||||
}
|
||||
{
|
||||
s32 t2 = func_80047948(*(s16 *)(*(s32 *)(e + 0x20) + 0x12));
|
||||
*(s32 *)(e + 0x18) = -((t2 * func_80047948(*(s16 *)(*(s32 *)(e + 0x20) + 0x10))) >> 3);
|
||||
}
|
||||
*(s32 *)(e + 0x10) = (*(s32 *)(e + 0x10) * 2) / 3;
|
||||
*(s32 *)(e + 0x1C) = 0x12C;
|
||||
*(s32 *)(e + 0x14) = (*(s32 *)(e + 0x14) * 2) / 3;
|
||||
*(s32 *)(e + 0x18) = (*(s32 *)(e + 0x18) * 2) / 3;
|
||||
return;
|
||||
|
||||
case 15:
|
||||
if (((s32 (*)(s32, s32))func_8012C354)(e, (s32)D_8019F1EC) == 0) {
|
||||
return;
|
||||
}
|
||||
*(u8 *)(e + 0xC0) = 1;
|
||||
*(s32 *)(e + 0xB4) = -1;
|
||||
*(s32 *)(e + 0xBC) = (s32)D_8019F2C0;
|
||||
((void (*)(s32, void *))func_8012A828)(e, D_801A061C);
|
||||
*(s16 *)(e + 0x2) = 0xD;
|
||||
*(s16 *)(e + 0x34) = 0xD;
|
||||
func_8012B23C(e);
|
||||
*(s32 *)(e + 0xCC) = (s32)(D_801A5A00 + *(s16 *)(e + 0xFC) * 8);
|
||||
o = func_8012C658(0x1EA, 0x11, e);
|
||||
if (o != 0) {
|
||||
*(u16 *)(o + 0xFE) = *(u16 *)(e + 0x36);
|
||||
*(s32 *)(e + 0x6C) = o;
|
||||
}
|
||||
*(s16 *)(e + 0xFC) = 0xA;
|
||||
return;
|
||||
|
||||
case 16:
|
||||
case 24:
|
||||
*(s16 *)(e + 0x2) = 0xE;
|
||||
*(s32 *)(e + 0x1C) = 6;
|
||||
return;
|
||||
|
||||
case 17:
|
||||
r = func_8012C1B8();
|
||||
*(s32 *)(e + 0x20) = r;
|
||||
if (r == 0) {
|
||||
func_8012CAE4((void *)e);
|
||||
return;
|
||||
}
|
||||
func_8001CA1C(r, (s32)D_8019F220);
|
||||
((void (*)(s32, void *))func_8012A828)(e, D_8019F22C);
|
||||
*(s16 *)(e + 0x2) = 0x11;
|
||||
*(s16 *)(e + 0x5C) = 0x810;
|
||||
*(s32 *)(e + 0x58) = (s32)D_8019F234 | 0x40000000 | 0x20000000;
|
||||
*(s32 *)(e + 0xD0) = (s32)D_8019F244;
|
||||
*(u16 *)(e + 0xE) = *(u16 *)(e + 0xE) + D_8019F248;
|
||||
cc = *(s32 *)(*(s32 *)(e + 0x64) + 0xCC);
|
||||
*(u16 *)(*(s32 *)(e + 0x20) + 0x2C) = *(u16 *)(*(s32 *)(e + 0x20) + 0x2C) | 0x80;
|
||||
*(s32 *)(*(s32 *)(e + 0x20) + 0x80) = cc;
|
||||
*(s32 *)(e + 0xCC) = cc;
|
||||
o = func_8012C658(0x1EA, 0x12, e);
|
||||
if (o != 0) {
|
||||
*(u16 *)(o + 0xFE) = *(u16 *)(e + 0x36);
|
||||
*(s32 *)(e + 0x6C) = o;
|
||||
}
|
||||
*(u16 *)(e + 0x106) = (rand() & 0x1F) + 0x20;
|
||||
*(u16 *)(e + 0x100) = (rand() & 0x1F) + 0x20;
|
||||
*(u16 *)(e + 0x102) = rand() & 0xFFF;
|
||||
*(u16 *)(e + 0x104) = rand() & 0xFFF;
|
||||
return;
|
||||
|
||||
case 18:
|
||||
case 19:
|
||||
case 20:
|
||||
case 21:
|
||||
case 22:
|
||||
r = func_8012C1B8();
|
||||
*(s32 *)(e + 0x20) = r;
|
||||
if (r == 0) {
|
||||
func_8012CAE4((void *)e);
|
||||
return;
|
||||
}
|
||||
func_8001CA1C(r, (s32)D_8019F24C);
|
||||
((void (*)(s32, void *))func_8012A828)(e, D_8019F258);
|
||||
*(s16 *)(e + 0x2) = 0x10;
|
||||
*(s16 *)(e + 0x5C) = 0x810;
|
||||
*(s32 *)(e + 0x58) = (s32)D_8019F260 | 0x40000000 | 0x20000000;
|
||||
*(s32 *)(e + 0xD0) = (s32)D_8019F284;
|
||||
*(u16 *)(e + 0xE) = *(u16 *)(e + 0xE) + D_8019F288;
|
||||
*(u16 *)(e + 0x106) = (rand() & 0x1F) + 0x20;
|
||||
*(u16 *)(e + 0x100) = (rand() & 0x1F) + 0x20;
|
||||
*(u16 *)(e + 0x102) = rand() & 0xFFF;
|
||||
*(u16 *)(e + 0x104) = rand() & 0xFFF;
|
||||
return;
|
||||
|
||||
case 25:
|
||||
*(s16 *)(e + 0x2) = 0x13;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
extern s32 func_8004787C(s32 a0);
|
||||
extern s32 func_80047948(s32 a0);
|
||||
|
||||
@@ -4469,518 +4469,3 @@ INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_8017EFD
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_8017F0B8);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_8017F188);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_8017F210);
|
||||
|
||||
extern s32 func_8004787C(s32 a0);
|
||||
extern s32 func_80047948(s32 a0);
|
||||
extern void func_80049CAC(s32 a0, s32 a1);
|
||||
extern void func_8012C218(void *a0);
|
||||
extern s32 func_8012CEB0(s32 a0, s32 a1, s32 a2);
|
||||
#define SRM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 0(%0)\n" \
|
||||
"lw $13, 4(%0)\n" \
|
||||
"ctc2 $12, $0\n" \
|
||||
"ctc2 $13, $1\n" \
|
||||
"lw $12, 8(%0)\n" \
|
||||
"lw $13, 12(%0)\n" \
|
||||
"lw $14, 16(%0)\n" \
|
||||
"ctc2 $12, $2\n" \
|
||||
"ctc2 $13, $3\n" \
|
||||
"ctc2 $14, $4\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
#define STM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 20(%0)\n" \
|
||||
"lw $13, 24(%0)\n" \
|
||||
"ctc2 $12, $5\n" \
|
||||
"lw $14, 28(%0)\n" \
|
||||
"ctc2 $13, $6\n" \
|
||||
"ctc2 $14, $7\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
|
||||
void func_8017F9BC(s32 a0)
|
||||
{
|
||||
u16 out[4]; /* sp+0x10 */
|
||||
s16 sv[4]; /* sp+0x18 */
|
||||
s16 pos[4]; /* sp+0x20 */
|
||||
s32 flag; /* sp+0x28 */
|
||||
s16 *p;
|
||||
|
||||
if (*(s16 *)(*(s32 *)(a0 + 0x64) + 0x36) != *(s16 *)(a0 + 0xFE)) {
|
||||
((void (*)(void))func_8012C218)();
|
||||
return;
|
||||
}
|
||||
|
||||
if (*(s16 *)(a0 + 0x70) == 1 || *(s16 *)(a0 + 0x70) == 8) {
|
||||
s32 ang;
|
||||
s32 t;
|
||||
ang = (*(u16 *)(a0 + 0xFC) + 0x40) & 0xFFF;
|
||||
p = *(s16 **)(a0 + 0xCC);
|
||||
*(s16 *)(a0 + 0xFC) = ang;
|
||||
t = (func_8004787C(ang) >> 6) + 0xBF;
|
||||
p[2] = t;
|
||||
p[1] = t;
|
||||
p[0] = t;
|
||||
}
|
||||
|
||||
if (*(s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 4) < 0) {
|
||||
{ register s32 *q __asm__("$3"); q = *(s32 **)(a0 + 0x20);
|
||||
q[1] = q[1] | 0x80000000; }
|
||||
} else {
|
||||
__asm__ __volatile__("");
|
||||
*(s32 *)(*(s32 *)(a0 + 0x20) + 4) =
|
||||
*(s32 *)(*(s32 *)(a0 + 0x20) + 4) & 0x7FFFFFFF;
|
||||
}
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) =
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x18);
|
||||
|
||||
if (*(s16 *)(*(s32 *)(a0 + 0x64) + 0x70) < 8) {
|
||||
*(s16 *)(a0 + 0x108) = (*(u16 *)(a0 + 0x108) + 0x40) & 0xFFF;
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) & 0xFFF;
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12) & 0xFFF;
|
||||
|
||||
flag = *(s16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12) -
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12);
|
||||
if (flag > 0x800) {
|
||||
flag = flag - 0x1000;
|
||||
}
|
||||
if (flag < -0x800) {
|
||||
flag = flag + 0x1000;
|
||||
}
|
||||
if (flag > 0x200) {
|
||||
s32 t = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) - 0x200;
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) = t + flag;
|
||||
} else if (flag < -0x200) {
|
||||
s32 t = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + 0x200;
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) = t + flag;
|
||||
} else {
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + (flag / 16);
|
||||
}
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) +
|
||||
(func_8004787C(*(s16 *)(a0 + 0x108)) >> 6);
|
||||
|
||||
func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
|
||||
SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
|
||||
STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
|
||||
|
||||
p = *(s16 **)(a0 + 0xD0);
|
||||
sv[0] = 0;
|
||||
sv[1] = 0;
|
||||
sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
|
||||
RotTransSV(sv, out, &flag);
|
||||
|
||||
*(s16 *)(a0 + 6) = out[0];
|
||||
*(s16 *)(a0 + 0xA) = out[1];
|
||||
*(s16 *)(a0 + 0xE) = out[2];
|
||||
out[1] = out[1] - 0x40;
|
||||
|
||||
pos[0] = *(u16 *)(a0 + 6);
|
||||
pos[1] = *(u16 *)(a0 + 0xA) + 0x10;
|
||||
pos[2] = *(u16 *)(a0 + 0xE);
|
||||
flag = func_8012CEB0((s32)out, (s32)pos, 1);
|
||||
if (flag & 0x1000) {
|
||||
return;
|
||||
}
|
||||
if (flag != 0) {
|
||||
s32 d;
|
||||
s32 t = pos[1] - 0x10;
|
||||
d = *(s16 *)(a0 + 0xA) - t;
|
||||
if (d < 5) {
|
||||
return;
|
||||
}
|
||||
if (d > 0x40) {
|
||||
d = 0x40;
|
||||
}
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) + (d << 4);
|
||||
|
||||
func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
|
||||
SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
|
||||
STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
|
||||
|
||||
p = *(s16 **)(a0 + 0xD0);
|
||||
sv[0] = 0;
|
||||
sv[1] = 0;
|
||||
sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
|
||||
RotTransSV(sv, out, &flag);
|
||||
|
||||
*(s16 *)(a0 + 6) = out[0];
|
||||
*(s16 *)(a0 + 0xA) = out[1];
|
||||
*(s16 *)(a0 + 0xE) = out[2];
|
||||
} else {
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) - 0x80;
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) & 0xFFF;
|
||||
if ((u32)(*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) - 0x801) < 0x3FF) {
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = 0xC00;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
s32 ang;
|
||||
s32 ang2;
|
||||
|
||||
ang = (*(u16 *)(a0 + 0x102) + *(u16 *)(a0 + 0x106)) & 0xFFF;
|
||||
*(s16 *)(a0 + 0x102) = ang;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = func_80047948(ang) >> 6;
|
||||
|
||||
ang2 = (*(u16 *)(a0 + 0x104) + *(u16 *)(a0 + 0x100)) & 0xFFF;
|
||||
*(s16 *)(a0 + 0x104) = ang2;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x14) = func_80047948(ang2) >> 6;
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) =
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) + 0xC00;
|
||||
|
||||
func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
|
||||
SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
|
||||
STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
|
||||
|
||||
p = *(s16 **)(a0 + 0xD0);
|
||||
sv[0] = 0;
|
||||
sv[1] = 0;
|
||||
sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
|
||||
RotTransSV(sv, out, &flag);
|
||||
|
||||
*(s16 *)(a0 + 6) = out[0];
|
||||
*(s16 *)(a0 + 0xA) = out[1];
|
||||
*(s16 *)(a0 + 0xE) = out[2];
|
||||
}
|
||||
{ s32 pad[2]; } /* LEVER 1: frame pad. INNER-BLOCK + LAST is load-bearing --
|
||||
a function-scope decl takes 0x28 and evicts flag to 0x30 */
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_8017FFC4);
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_801800F8);
|
||||
|
||||
extern s32 func_8004787C(s32 a0);
|
||||
extern s32 func_80047948(s32 a0);
|
||||
extern void func_80049CAC(s32 a0, s32 a1);
|
||||
extern void func_8012C218(void *a0);
|
||||
#define SRM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 0(%0)\n" \
|
||||
"lw $13, 4(%0)\n" \
|
||||
"ctc2 $12, $0\n" \
|
||||
"ctc2 $13, $1\n" \
|
||||
"lw $12, 8(%0)\n" \
|
||||
"lw $13, 12(%0)\n" \
|
||||
"lw $14, 16(%0)\n" \
|
||||
"ctc2 $12, $2\n" \
|
||||
"ctc2 $13, $3\n" \
|
||||
"ctc2 $14, $4\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
#define STM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 20(%0)\n" \
|
||||
"lw $13, 24(%0)\n" \
|
||||
"ctc2 $12, $5\n" \
|
||||
"lw $14, 28(%0)\n" \
|
||||
"ctc2 $13, $6\n" \
|
||||
"ctc2 $14, $7\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
#define SRM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 0(%0)\n" \
|
||||
"lw $13, 4(%0)\n" \
|
||||
"ctc2 $12, $0\n" \
|
||||
"ctc2 $13, $1\n" \
|
||||
"lw $12, 8(%0)\n" \
|
||||
"lw $13, 12(%0)\n" \
|
||||
"lw $14, 16(%0)\n" \
|
||||
"ctc2 $12, $2\n" \
|
||||
"ctc2 $13, $3\n" \
|
||||
"ctc2 $14, $4\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
#define STM_80186B78(r0) __asm__ __volatile__( \
|
||||
"lw $12, 20(%0)\n" \
|
||||
"lw $13, 24(%0)\n" \
|
||||
"ctc2 $12, $5\n" \
|
||||
"lw $14, 28(%0)\n" \
|
||||
"ctc2 $13, $6\n" \
|
||||
"ctc2 $14, $7\n" \
|
||||
: : "r"(r0) : "$12", "$13", "$14", "memory")
|
||||
|
||||
void func_801804B8(s32 a0)
|
||||
{
|
||||
u16 out[4]; /* sp+0x10 */
|
||||
s16 sv[4]; /* sp+0x18 */
|
||||
s16 pos[4]; /* sp+0x20 */
|
||||
s32 flag; /* sp+0x28 */
|
||||
s16 *p;
|
||||
|
||||
if (*(s16 *)(*(s32 *)(a0 + 0x64) + 0x36) != *(s16 *)(a0 + 0xFE)) {
|
||||
((void (*)(void))func_8012C218)();
|
||||
return;
|
||||
}
|
||||
|
||||
if (*(s16 *)(a0 + 0x70) == 0x11) {
|
||||
s32 ang;
|
||||
s32 t;
|
||||
ang = (*(u16 *)(a0 + 0xFC) + 0x40) & 0xFFF;
|
||||
p = *(s16 **)(a0 + 0xCC);
|
||||
*(s16 *)(a0 + 0xFC) = ang;
|
||||
t = (func_8004787C(ang) >> 6) + 0xBF;
|
||||
p[2] = t;
|
||||
p[1] = t;
|
||||
p[0] = t;
|
||||
}
|
||||
|
||||
if (*(s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 4) < 0) {
|
||||
{ register s32 *q __asm__("$3"); q = *(s32 **)(a0 + 0x20);
|
||||
q[1] = q[1] | 0x80000000; }
|
||||
} else {
|
||||
__asm__ __volatile__("");
|
||||
*(s32 *)(*(s32 *)(a0 + 0x20) + 4) =
|
||||
*(s32 *)(*(s32 *)(a0 + 0x20) + 4) & 0x7FFFFFFF;
|
||||
}
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) =
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x18);
|
||||
|
||||
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x14) =
|
||||
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x14);
|
||||
|
||||
{
|
||||
s32 ang;
|
||||
s32 ang2;
|
||||
|
||||
ang = (*(u16 *)(a0 + 0x102) + *(u16 *)(a0 + 0x106)) & 0xFFF;
|
||||
*(s16 *)(a0 + 0x102) = ang;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x10) = func_80047948(ang) >> 3;
|
||||
|
||||
ang2 = (*(u16 *)(a0 + 0x104) + *(u16 *)(a0 + 0x100)) & 0xFFF;
|
||||
*(s16 *)(a0 + 0x104) = ang2;
|
||||
*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12) = func_80047948(ang2) >> 3;
|
||||
|
||||
func_80049CAC(*(s32 *)(a0 + 0x20) + 0x10, *(s32 *)(a0 + 0x20) + 0x34);
|
||||
SRM_80186B78((s32 *)(*(s32 *)(a0 + 0x20) + 0x34));
|
||||
STM_80186B78((s32 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x34));
|
||||
|
||||
p = *(s16 **)(a0 + 0xD0);
|
||||
sv[0] = 0;
|
||||
sv[1] = 0;
|
||||
sv[2] = (p[2] * *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18)) >> 12;
|
||||
RotTransSV(sv, out, &flag);
|
||||
|
||||
*(s16 *)(a0 + 6) = out[0];
|
||||
*(s16 *)(a0 + 0xA) = out[1];
|
||||
*(s16 *)(a0 + 0xE) = out[2];
|
||||
}
|
||||
{ s32 pad[2]; } /* LEVER 1: frame pad -- matches func_80186B78's byte-verified 8-byte
|
||||
trailing dead local (docs/matching-cookbook.md §136 L6). */
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_801806FC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_801807AC);
|
||||
|
||||
|
||||
extern void (*D_8019AF58[])(void);
|
||||
|
||||
void func_80180890(void *a0) {
|
||||
D_8019AF58[*(u16 *)((s32)a0 + 0x2)]();
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_801808CC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_80180930);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_801809C4);
|
||||
|
||||
extern void func_8012E688(s32 arg0, s32 arg1, s32 arg2);
|
||||
void func_80180AEC(void *a0) {
|
||||
if (*(s16 *)((s32)a0 + 0x76) > 0) {
|
||||
func_8012E688((s32)a0, 0x8C6, 0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
extern void func_8012E688(s32 arg0, s32 arg1, s32 arg2);
|
||||
extern void func_8002AC00(s32 arg0);
|
||||
void func_80180B1C(void *arg0) {
|
||||
func_8012E688((s32)arg0, 0x8C7, 0);
|
||||
func_8002AC00(0x10);
|
||||
}
|
||||
|
||||
|
||||
void func_80180B48(void) {
|
||||
}
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_80180B50);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_80180C3C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_80180CBC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_80180D70);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_80180E50);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_80180EB8);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_80180F18);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_80180FA8);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_8018101C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_8018106C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_801810EC);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_8018118C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_8018125C);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
extern void func_8012C218(void *a0);
|
||||
void func_801812F0(void *a0)
|
||||
{
|
||||
register s32 v0 __asm__("$2");
|
||||
register s32 v1 __asm__("$3");
|
||||
v0 = (*((s32 *) (((s32) a0) + 0x8)) = (*((s32 *) (((s32) a0) + 0x8))) + 0x40000);
|
||||
v1 = 0x400000;
|
||||
if (v1 < v0)
|
||||
{
|
||||
v1 = v1 / 65536;
|
||||
((s32 (*)(s32)) func_8012C218)((s32) a0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_8018132C);
|
||||
|
||||
|
||||
extern void func_8001CD50(s32 a0, s32 a1);
|
||||
extern void func_800233CC(void *, unsigned short);
|
||||
|
||||
void func_80181414(void *a0)
|
||||
{
|
||||
|
||||
extern u8 D_8019F0B8[];
|
||||
s32 s1;
|
||||
u8 *p;
|
||||
|
||||
s1 = *(s32 *)((s32)a0 + 0x20);
|
||||
p = D_8019F0B8 + *(s32 *)((s32)a0 + 0x2C) * 0x40;
|
||||
func_8001CD50(s1, (s32)p);
|
||||
*(s16 *)(s1 + 0x1E) = 0xCCC;
|
||||
*(s16 *)(s1 + 0x10) = 0x400;
|
||||
*(s16 *)(s1 + 0x1A) = 0;
|
||||
*(s16 *)(s1 + 0x18) = 0;
|
||||
*(s32 *)(s1 + 4) = *(s32 *)(s1 + 4) | 0x50000000;
|
||||
func_800233CC(p, 0x80);
|
||||
p[2] = 0xFF;
|
||||
p[1] = 0xFF;
|
||||
p[0] = 0xFF;
|
||||
p[5] = 0x40;
|
||||
p[4] = 0x40;
|
||||
p[6] = 0x80;
|
||||
*(s32 *)((s32)a0 + 0x1C) = 0x10;
|
||||
*(u16 *)((s32)a0 + 2) = *(u16 *)((s32)a0 + 2) + 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* Declaration reconciliation with src/ov_SC03_118/ov_SC03_118_jr_8017FB84.c:
|
||||
* - D_8019F0B8: the TU already declares it at line 4526 as `extern u8 D_8019F0B8[];`
|
||||
* (used by the banked func_801885D0 just above the splice point). The draft had
|
||||
* `extern s32 D_8019F0B8[]` -> "conflicting types". Lever (A): conform the decl
|
||||
* VERBATIM and keep the disagreement at the use site, which already casts the
|
||||
* decayed pointer to s32. Zero bytes change.
|
||||
* - func_801292C8: not declared anywhere in this TU, but src/shared/engine_core.h
|
||||
* declares it as `extern void func_801292C8(u8 *a0);` inside four DEFINE_ macros
|
||||
* (6304/8491/13623/13794). None of those macros is expanded in this TU today, but
|
||||
* conforming to that shape now makes the splice conflict-proof if one ever is.
|
||||
* $a0 already holds the incoming pointer, so passing it costs no instruction
|
||||
* (jal + nop delay slot, exactly as in the target).
|
||||
*/
|
||||
|
||||
extern void func_801292C8(u8 *a0);
|
||||
|
||||
void func_801814D8(void *a0) {
|
||||
|
||||
extern u8 D_8019F0B8[];
|
||||
s32 v0;
|
||||
s32 v1;
|
||||
s32 a1;
|
||||
s32 a2;
|
||||
u8 *v1ptr;
|
||||
|
||||
v0 = *(s32 *)((s32)a0 + 0x1C);
|
||||
v1 = *(s32 *)((s32)a0 + 0x2C);
|
||||
a1 = v0 - 1;
|
||||
/* §21 zero-byte re-tie barrier: without it gcc's scheduler hoists the 0x2C load
|
||||
* (and its sll) ahead of the 0x1C load + addiu pair -- the 4-slot SCHEDULE-REORDER
|
||||
* residual. Folding the shift into the address expression fixes the order but then
|
||||
* swaps $v0/$v1 across the sll/lui pair (REGALLOC-PERM). The re-tie keeps the
|
||||
* in-place `v1 <<= 6` form (so the shift stays in $v1) AND anchors it after the
|
||||
* two loads. Emits no code. */
|
||||
__asm__ __volatile__("" : "=r"(v1) : "0"(v1));
|
||||
v1 = v1 << 6;
|
||||
a2 = (s32)D_8019F0B8 + v1;
|
||||
v1ptr = *(u8 **)((s32)a0 + 0x20);
|
||||
|
||||
*(s32 *)((s32)a0 + 0x1C) = a1;
|
||||
|
||||
if (!(a1 == -1)) {
|
||||
v0 = 0x10 - a1;
|
||||
*(u16 *)((s32)v1ptr + 0x1A) = v0 << 8;
|
||||
*(u16 *)((s32)v1ptr + 0x18) = v0 << 8;
|
||||
|
||||
v1 = *(s32 *)((s32)a0 + 0x1C);
|
||||
v0 = (v1 << 8) - v1;
|
||||
if (v0 < 0) {
|
||||
v0 = v0 + 0xF;
|
||||
}
|
||||
v0 = (u32)v0 >> 4;
|
||||
|
||||
*(u8 *)(a2 + 0x2) = v0;
|
||||
*(u8 *)(a2 + 0x1) = v0;
|
||||
*(u8 *)(a2 + 0x0) = v0;
|
||||
|
||||
v0 = *(s32 *)((s32)a0 + 0x1C) << 2;
|
||||
*(u8 *)(a2 + 0x5) = v0;
|
||||
*(u8 *)(a2 + 0x4) = v0;
|
||||
|
||||
*(u8 *)(a2 + 0x6) = *(s32 *)((s32)a0 + 0x1C) << 3;
|
||||
} else {
|
||||
func_801292C8((u8 *)a0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_8018158C);
|
||||
|
||||
INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8017BEBC", func_801815CC);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user