phase-36: S104 e7 packs (ov_SC02_017 batch 2 after e4's three closes)

This commit is contained in:
Drew T
2026-09-11 00:48:47 -06:00
parent 577b2592d6
commit c4c60c9170
35 changed files with 2007 additions and 49 deletions
+4 -3
View File
@@ -1,4 +1,5 @@
rank fn alias copies best needed kinds regs tu
286 func_80189A84 ov_SC03_006 2 3 2 pin $2,$3 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c
51 func_8017E710 ov_SC03_006 1 7 1 pin $2 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c
128 func_80182F4C ov_SC03_006 1 13 1 pin $4 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c
87 func_80181BBC ov_SC02_017 1 4 1 pin $4 src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
119 func_801831FC ov_SC02_017 1 6 1 pin $2 src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
77 func_80181294 ov_SC02_017 1 9 1 pin $2 src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
4 func_80181E98 ov_SC02_017 1 11 1 barrier src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
1 rank fn alias copies best needed kinds regs tu
2 286 87 func_80189A84 func_80181BBC ov_SC03_006 ov_SC02_017 2 1 3 4 2 1 pin $2,$3 $4 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
3 51 119 func_8017E710 func_801831FC ov_SC03_006 ov_SC02_017 1 7 6 1 pin $2 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
4 128 77 func_80182F4C func_80181294 ov_SC03_006 ov_SC02_017 1 13 9 1 pin $4 $2 src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
5 4 func_80181E98 ov_SC02_017 1 11 1 barrier src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
@@ -0,0 +1,80 @@
s32 func_80181294(s32 arg0) {
s32 e; /* *(s32 *)(arg0 + 0x20) -- the owned effect/entity */
s16 *rot; /* (s16 *)(e + 0x10) : rot[0]=0x10 rot[1]=0x12 rot[2]=0x14 */
s32 i;
s32 t;
s32 t2;
s32 base1;
s32 base2;
u16 sp10[3];
e = *(s32 *)(arg0 + 0x20);
rot = (s16 *)(e + 0x10);
if (rand() & 1) {
*(u16 *)(e + 0x14) += *(s16 *)(arg0 + 0xFC) * (rand() % 8 + 1);
}
if (rot[2] > 0x38) {
*(s16 *)(arg0 + 0xFC) = -1;
rot[2] = 0x38;
} else if (rot[2] < -0x38) {
*(s16 *)(arg0 + 0xFC) = 1;
rot[2] = -0x38;
}
if (*(s32 *)(arg0 + 0x1C) % 10 == 0) {
sp10[1] = D_8018E40A;
for (i = 0; i < 5; i++) {
s32 v;
t = rand() % 80;
if ((rand() & 1) == 0) {
v = -t;
} else {
v = t;
}
sp10[0] = v;
t2 = rand() % 16;
if ((rand() & 1) == 0) {
v = -t2 + 0x40;
} else {
v = t2 + 0x40;
}
sp10[2] = v;
((void (*)(s32, void *, s32))func_8017DC70)(arg0, sp10, 1);
}
func_8002D4C8(0xBA0, 0);
if (*(s32 *)(arg0 + 0x1C) % 10 == 0) {
sp10[0] = *(u16 *)(arg0 + 0x6);
sp10[1] = *(u16 *)(arg0 + 0xA);
sp10[2] = *(u16 *)(arg0 + 0xE) + 0x50;
for (i = 0; i < 10; i++) {
s32 v;
t = rand() % 80;
base1 = *(s16 *)(arg0 + 0x6);
if ((rand() & 1) == 0) {
v = base1 - t;
} else {
v = base1 + t;
}
sp10[0] = v;
t = rand() % 56;
base2 = *(s16 *)(arg0 + 0xA);
if ((rand() & 1) == 0) {
v = base2 - t;
} else {
v = base2 + t;
}
sp10[1] = v;
func_80143BDC(sp10);
}
}
}
if (func_8012BEE8(arg0)) {
rot[2] = 0;
func_8012B23C(arg0);
return 1;
}
return 0;
}
@@ -0,0 +1,80 @@
s32 func_80181294(s32 arg0) {
s32 e; /* *(s32 *)(arg0 + 0x20) -- the owned effect/entity */
s16 *rot; /* (s16 *)(e + 0x10) : rot[0]=0x10 rot[1]=0x12 rot[2]=0x14 */
s32 i;
s32 t;
s32 t2;
s32 base1;
s32 base2;
u16 sp10[3];
e = *(s32 *)(arg0 + 0x20);
rot = (s16 *)(e + 0x10);
if (rand() & 1) {
*(u16 *)(e + 0x14) += *(s16 *)(arg0 + 0xFC) * (rand() % 8 + 1);
}
if (rot[2] > 0x38) {
*(s16 *)(arg0 + 0xFC) = -1;
rot[2] = 0x38;
} else if (rot[2] < -0x38) {
*(s16 *)(arg0 + 0xFC) = 1;
rot[2] = -0x38;
}
if (*(s32 *)(arg0 + 0x1C) % 10 == 0) {
sp10[1] = D_8018E40A;
for (i = 0; i < 5; i++) {
register s32 v __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus8)
t = rand() % 80;
if ((rand() & 1) == 0) {
v = -t;
} else {
v = t;
}
sp10[0] = v;
t2 = rand() % 16;
if ((rand() & 1) == 0) {
v = -t2 + 0x40;
} else {
v = t2 + 0x40;
}
sp10[2] = v;
((void (*)(s32, void *, s32))func_8017DC70)(arg0, sp10, 1);
}
func_8002D4C8(0xBA0, 0);
if (*(s32 *)(arg0 + 0x1C) % 10 == 0) {
sp10[0] = *(u16 *)(arg0 + 0x6);
sp10[1] = *(u16 *)(arg0 + 0xA);
sp10[2] = *(u16 *)(arg0 + 0xE) + 0x50;
for (i = 0; i < 10; i++) {
s32 v;
t = rand() % 80;
base1 = *(s16 *)(arg0 + 0x6);
if ((rand() & 1) == 0) {
v = base1 - t;
} else {
v = base1 + t;
}
sp10[0] = v;
t = rand() % 56;
base2 = *(s16 *)(arg0 + 0xA);
if ((rand() & 1) == 0) {
v = base2 - t;
} else {
v = base2 + t;
}
sp10[1] = v;
func_80143BDC(sp10);
}
}
}
if (func_8012BEE8(arg0)) {
rot[2] = 0;
func_8012B23C(arg0);
return 1;
}
return 0;
}
@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 10 best 9 compiles 191 path R8 hoist tmp0 @4776 + R12 width tmp0 s32->u16 @4747
best-scoring single candidates of the last trace (move -> score [residual class]):
R12 width tmp0 s32->u16 @4747 -> 9 [COUNT] (from 10)
R12 width tmp0 s32->u8 @4747 -> 9 [COUNT] (from 10)
R8 hoist tmp0 @4776 -> 10 [COUNT] (from 10)
R7 block @4771 -> 10 [COUNT] (from 10)
R10 param-copy arg0 @4747 -> 10 [COUNT] (from 10)
R8 hoist tmp0 @4774 -> 10 [COUNT] (from 10)
R7 do-while @4771 -> 10 [COUNT] (from 10)
R8 hoist tmp0 @4767 -> 10 [COUNT] (from 10)
R7 block @4780 -> 10 [COUNT] (from 10)
R7 do-while @4780 -> 10 [COUNT] (from 10)
R7 block @4776 -> 10 [COUNT] (from 10)
R8 temp tmp0 @4785 -> 10 [COUNT] (from 10)
@@ -0,0 +1,15 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: straight-derive
// @stuck: none — MATCH (52 ins) on iteration 1, confirmed by rtu_match.
// @class: structural (STRENGTH/mflo!=lw -> MATCH)
// @stuck: none - MATCH (41 ins), match_one + rtu_match.
// @class: regalloc (WIDTH/li!=addu -> MATCH)
// @stuck: none — MATCH (58 ins), match_one + rtu_match. PIN-FREE (no register __asm__).
// @class: plumbing
// @stuck: none — MATCH (52 ins), iteration 1. Keys: (1) §3-T4 — Ghidra inverted the arms; the
@@ -0,0 +1,151 @@
=== lever-free bodies in ov_SC02_017 sharing a callee or global with func_80181294 (95 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_8018372C (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:6273) shares 2: func_8002D4C8 func_8012B23C ---
void func_8018372C(void *a0) {
*(u16 *)((s32)a0 + 2) = 2;
func_8012E88C((u8 *)a0);
func_8012B2CC((s32)a0);
func_8012B23C((s32)a0);
func_8012B14C((s32)a0, (s32)D_8018EEB4);
*(s32 *)((s32)a0 + 0x1C) = 0x16;
func_8002D4C8(0x5D8, 0);
}
--- func_8012FC30 (src/shared/ov/func_8012FC30.h:8) shares 2: func_8002D4C8 func_8012B23C ---
void func_8012FC30(s32 a0) {
*(s8 *)(a0 + 0xC1) = 0xA;
if (*(s32 *)(a0 + 0xB4) & 0x400) {
func_80131B14();
*(s8 *)(a0 + 0xC2) = 0;
*(u16 *)(a0 + 0x98) = 0;
func_8012B23C(a0);
func_80131A34(a0, 8);
func_8002D4C8(0xA74, 0);
}
func_80131CA8(a0, 0x1A);
}
--- func_8017FF48 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:3882) shares 2: func_8002D4C8 func_8012B23C ---
void func_8017FF48(int param_1) {
s32 v0;
if (func_801805D4(param_1) != 1) {
v0 = func_800291B4(D_8018E204[(*(u16 *)(param_1 + 0x70)) & 0xF]) & 0xFF;
if (v0 == 1) {
*(s16 *)(param_1 + 0x2) = 3;
*(s16 *)(param_1 + 0x34) = 0;
func_80180398((void *)param_1);
func_8012B23C(param_1);
func_8012B14C(param_1, (s32)D_8018E264);
func_8002D4C8(0x59E, 0);
func_8002D4C8(0x5C1, 0);
} else if (v0 == 2) {
*(s16 *)(param_1 + 0x2) = 2;
*(s16 *)(param_1 + 0xA) = *(u16 *)(param_1 + 0xA) + 0x42;
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x10) = 0x400;
*(s32 *)(param_1 + 0x58) = (s32)D_8018E254 | 0x40000000 | 0x20000000;
*(u16 *)(param_1 + 0x5C) = 0x8C00;
*(s32 *)(param_1 + 0xCC) = func_801788B8(param_1, (s32)func_8018183C);
func_8012B2CC(param_1);
}
}
}
--- func_80188620 (src/ov_SC02_017/ov_SC02_017_jr_80186C64.c:4474) shares 2: func_8002D4C8 func_8012BEE8 ---
void func_80188620(s32 arg0) {
u16 sp10[3];
u16 sp18[12];
if (*(s32 *)(arg0 + 0x1C) == 9) {
if (func_8012D5E4(arg0, (s32)D_801E2118, (s32)(D_801E2118 + 8), 10) != 0) {
D_80126B96 |= 0x800;
}
if (*(s16 *)(arg0 + 0x70) & 0x8000) {
func_8012F214(arg0, (s32)D_801E2128, (s32)sp10);
sp18[3] = 0x126;
sp18[5] = 0;
sp18[6] = 0x7FFF;
sp18[0] = sp10[0];
sp18[1] = sp10[1];
sp18[2] = sp10[2];
sp18[7] = *(u16 *)(*(s32 *)(arg0 + 0x20) + 0x12);
func_8012C51C(sp18, arg0);
sp18[7] = *(u16 *)(*(s32 *)(arg0 + 0x20) + 0x12) + 0x100;
func_8012C51C(sp18, arg0);
sp18[7] = *(u16 *)(*(s32 *)(arg0 + 0x20) + 0x12) - 0x100;
func_8012C51C(sp18, arg0);
}
func_8002D4C8(0x43E, 0);
}
if (func_8012BEE8(arg0) != 0) {
((void (*)(void *))func_801883A0)(arg0);
}
}
--- func_80183E70 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:6622) shares 2: func_8002D4C8 func_8012BEE8 ---
void func_80183E70(s32 param_1) {
s32 v0;
SV3 in;
SV3 out;
if (func_8012BEE8(param_1) != 0) {
func_8002D4C8(0x5D7, 0);
func_8012C218((void *)param_1);
} else {
v0 = *(s16 *)(param_1 + 0x70);
if (v0 != 0) {
in.a = v0 << 4;
in.b = 0;
in.c = 0;
((void (*)(s32, void *, void *))func_8012F214)((s32)aD801EF9FC, &in, &out);
*(s16 *)(param_1 + 0x6) = out.a;
*(s16 *)(param_1 + 0xA) = out.b;
*(s16 *)(param_1 + 0xE) = out.c;
*(Blk8 *)(*(s32 *)(param_1 + 0x20) + 0x10) =
*(Blk8 *)(*(s32 *)((s32)aD801EF9FC + 0x20) + 0x10);
} else {
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x10) += D_8018EED4;
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) += D_8018EED6;
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x14) += D_8018EED8;
func_8012AD80(param_1);
func_8012B2CC(param_1);
}
}
}
--- func_80187D80 (src/ov_SC02_017/ov_SC02_017_jr_80186C64.c:4019) shares 2: func_8012B23C func_8012BEE8 ---
void func_80187D80(int param_1)
{
SV3 in;
SV3 out;
short c;
if (*(unsigned short *)(param_1 + 0x34) == 0) {
*(short *)(*(int *)(param_1 + 0x20) + 0x12) =
*(short *)(*(int *)(*(int *)(param_1 + 0x64) + 0x20) + 0x12);
((void (*)(void))func_8012B2CC)();
func_8012B23C(param_1);
((void (*)(int, void *))func_8012B14C)(param_1, &D_801E1D80);
in.a = 0;
in.b = 0;
in.c = 0x10;
((void (*)(int, void *, void *))func_8012F214)(param_1, &in, &out);
*(short *)(param_1 + 6) = out.a;
*(short *)(param_1 + 0xa) = out.b;
c = out.c;
*(int *)(param_1 + 0x1c) = 0x5a;
*(short *)(param_1 + 0x34) = 1;
*(short *)(param_1 + 0xe) = c;
}
*(short *)(*(int *)(param_1 + 0x20) + 0x10) =
*(short *)(*(int *)(param_1 + 0x20) + 0x10) - 0x80;
*(short *)(*(int *)(param_1 + 0x20) + 0x12) =
*(short *)(*(int *)(param_1 + 0x20) + 0x12) + 4;
*(short *)(*(int *)(param_1 + 0x20) + 0x14) =
*(short *)(*(int *)(param_1 + 0x20) + 0x14) + 5;
func_8012AD80(param_1);
if (func_8012BEE8(param_1) != 0) {
((void (*)(int))func_8012C218)(param_1);
}
}
@@ -0,0 +1,18 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:func_80181294: score 10 (COUNT; mine 191 ins, target 192) — not yet
register pairs (mine -> target, count): v1->v0 x3
replace mine[55:56] target[55:56]
55 bne a0,v0,3618 <func_80181294+0x2b8> | bne a0,v0,361c <func_80181294+0x2bc>
replace mine[77:79] target[77:79]
77 move v1,s0 | move v0,s0
78 negu v1,s0 | negu v0,s0
replace mine[80:81] target[80:81]
80 sh v1,16(sp) | sh v0,16(sp)
delete mine[91:92] target[91:91]
91 addiu v1,s0,64 | --
replace mine[93:95] target[92:96]
93 addiu v1,v0,64 | j 34dc <func_80181294+0x17c>
94 sh v1,20(sp) | addiu v0,v0,64
95 -- | addiu v0,s0,64
96 -- | sh v0,20(sp)
replace mine[101:102] target[102:103]
101 bnez v0,3454 <func_80181294+0xf4> | bnez v0,3454 <func_80181294+0xf4>
@@ -0,0 +1,2 @@
NEEDED pin $2 line 4891
REMOVED pin $2 line 4914
@@ -0,0 +1,2 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
func_80181294
@@ -0,0 +1,29 @@
void func_80181BBC(s32 a0)
{
s32 s0;
s32 v0;
s32 v1;
s32 a0_2;
s0 = a0;
if (func_8012C438(s0, (s32)D_8018E4F8) == 0) {
return;
}
func_8001D0E8(*(s32 *)(s0 + 0x20), 0x1E0, 0x168);
v1 = *(s32 *)(s0 + 0x20);
*(s32 *)(v1 + 0x20) = (s32)D_8018E540;
v0 = *(s32 *)(s0 + 0x64);
a0_2 = *(s32 *)(s0 + 0x20);
v1 = *(u16 *)(v0 + 0x36);
*(s8 *)(s0 + 0x75) = 4;
*(u16 *)(s0 + 0xFE) = v1;
v0 = *(s32 *)(a0_2 + 4);
v0 |= 0x8000;
*(s32 *)(a0_2 + 4) = v0;
func_8001D0E8(*(s32 *)(s0 + 0x20), 0x1E0, 0x168);
v0 = *(u16 *)(s0 + 0xA);
v1 = 1;
*(s16 *)(s0 + 2) = v1;
v0 += 0x36;
*(s16 *)(s0 + 0xA) = v0;
}
@@ -0,0 +1,29 @@
void func_80181BBC(s32 a0)
{
s32 s0;
s32 v0;
s32 v1;
register s32 a0_2 __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus8)
s0 = a0;
if (func_8012C438(s0, (s32)D_8018E4F8) == 0) {
return;
}
func_8001D0E8(*(s32 *)(s0 + 0x20), 0x1E0, 0x168);
v1 = *(s32 *)(s0 + 0x20);
*(s32 *)(v1 + 0x20) = (s32)D_8018E540;
v0 = *(s32 *)(s0 + 0x64);
a0_2 = *(s32 *)(s0 + 0x20);
v1 = *(u16 *)(v0 + 0x36);
*(s8 *)(s0 + 0x75) = 4;
*(u16 *)(s0 + 0xFE) = v1;
v0 = *(s32 *)(a0_2 + 4);
v0 |= 0x8000;
*(s32 *)(a0_2 + 4) = v0;
func_8001D0E8(*(s32 *)(s0 + 0x20), 0x1E0, 0x168);
v0 = *(u16 *)(s0 + 0xA);
v1 = 1;
*(s16 *)(s0 + 2) = v1;
v0 += 0x36;
*(s16 *)(s0 + 0xA) = v0;
}
@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 9 best 4 compiles 188 path R12 width v1 s32->u16 @5119 + R8 cse tmp0 @5127
best-scoring single candidates of the last trace (move -> score [residual class]):
R8 cse tmp0 @5127 -> 4 [COUNT] (from 8)
R6 inline v1 @5127 -> 7 [REG] (from 9)
R8 temp tmp0 @5127 -> 7 [REG] (from 9)
R8 temp tmp0 @5130 -> 7 [REG] (from 7)
R10 param-alias s0->a0 @5122 -> 7 [REG] (from 7)
R7 block @5127 -> 7 [REG] (from 7)
R4 decl-move a0_2 3->0 -> 7 [REG] (from 7)
R6 inline v0 @5128 -> 7 [REG] (from 7)
R8 base tmp0 @5130 -> 7 [REG] (from 7)
R10 param-copy a0 @5121 -> 7 [REG] (from 7)
R4 decl-move a0_2 3->1 -> 7 [REG] (from 7)
R8 temp tmp0 @5136 -> 7 [REG] (from 7)
@@ -0,0 +1,15 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: straight-derive
// @stuck: none — MATCH (52 ins) on iteration 1, confirmed by rtu_match.
// @class: structural (STRENGTH/mflo!=lw -> MATCH)
// @stuck: none - MATCH (41 ins), match_one + rtu_match.
// @class: regalloc (WIDTH/li!=addu -> MATCH)
// @stuck: none — MATCH (58 ins), match_one + rtu_match. PIN-FREE (no register __asm__).
// @class: plumbing
// @stuck: none — MATCH (52 ins), iteration 1. Keys: (1) §3-T4 — Ghidra inverted the arms; the
@@ -0,0 +1,34 @@
=== lever-free bodies in ov_SC02_017 sharing a callee or global with func_80181BBC (2 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80181A98 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:5063) shares 1: func_8001D0E8 ---
void func_80181A98(s32 s0)
{
u16 uVar1;
if (func_8012C354(s0, (s32)D_8018E4C4) == 0) {
return;
}
func_8001D0E8(*(s32 *)(s0 + 0x20), 0x1E0, 0x168);
func_8012A828(s0, (void *)aD8018A800);
uVar1 = *(u16 *)(*(s32 *)(s0 + 0x64) + 0x36);
*(u8 *)(s0 + 0x75) = 2;
*(u16 *)(s0 + 0x2) = 1;
*(u16 *)(s0 + 0xFC) = uVar1;
}
--- func_801819B0 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:5029) shares 1: func_8001D0E8 ---
void func_801819B0(s32 s0)
{
if (func_8012C354(s0, (s32)&D_8018E490) == 0) {
return;
}
if (func_8012C588(0xB4, s0) == 0 || func_8012C658(0xB5, *(s16 *)(s0 + 0x70), s0) == 0) {
func_8012CAE4((void *)s0);
return;
}
func_8001D0E8(*(s32 *)(s0 + 0x20), 0x1E0, 0x168);
func_8012A828(s0, (void *)aD8018A800);
*(u8 *)(s0 + 0x75) = 2;
*(u16 *)(s0 + 0x2) = 1;
*(u16 *)(s0 + 0xA) -= 0x70;
}
@@ -0,0 +1,17 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:func_80181BBC: score 9 (REG-caller; mine 39 ins, target 39) — not yet
register pairs (mine -> target, count): a0->v1 x6, v1->a0 x3
replace mine[12:13] target[12:13]
12 lw a0,32(s0) | lw v1,32(s0)
replace mine[15:16] target[15:16]
15 sw v0,32(a0) | sw v0,32(v1)
replace mine[17:19] target[17:19]
17 lw v1,32(s0) | lw a0,32(s0)
18 lhu a0,54(v0) | lhu v1,54(v0)
replace mine[21:23] target[21:23]
21 sh a0,254(s0) | sh v1,254(s0)
22 lw v0,4(v1) | lw v0,4(a0)
replace mine[25:26] target[25:26]
25 sw v0,4(v1) | sw v0,4(a0)
replace mine[30:32] target[30:32]
30 li a0,1 | li v1,1
31 sh a0,2(s0) | sh v1,2(s0)
@@ -0,0 +1,2 @@
REMOVED pin $3 line 5268
NEEDED pin $4 line 5269
@@ -0,0 +1,2 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
func_80181BBC
@@ -0,0 +1,87 @@
s32 func_80181E98_impl(void *arg)
{
extern void func_8012F214(s32 a0, s32 a1, s32 a2);
extern s32 func_80013478(s32 a0, s32 a1);
extern void func_8002D4C8(s32 a0, s32 a1);
extern s32 D_8018E564;
extern u8 D_800AF648;
extern u8 D_80126B5C;
struct {
s16 in0[4];
s16 in1[4];
s16 sxy[2];
s32 flag;
} w;
s32 t;
s32 r;
s32 k;
func_8012F214((s32)arg, (s32)&D_8018E564, (s32)w.in0);
gte_SetRotMatrix(&D_800AF648);
gte_SetTransMatrix(&D_800AF648);
gte_ldv0(w.in0);
gte_rtps();
gte_stsxy(w.sxy);
gte_stflg(&w.flag);
if (w.flag & 0xFFFFEFFF) {
goto ret0;
}
t = w.sxy[0];
if (t < 0) {
t = -t;
}
if (t < 0xAB) {
if (w.sxy[1] >= 0) {
if (w.sxy[1] >= 0x83) {
goto second;
}
goto pass;
} else {
if (-w.sxy[1] < 0x83) {
goto pass;
}
}
}
second:
w.in1[0] = *(s16 *)((s32)arg + 6);
w.in1[1] = *(s16 *)((s32)arg + 10);
w.in1[2] = *(s16 *)((s32)arg + 14);
gte_ldv0(w.in1);
gte_rtps();
gte_stsxy(w.sxy);
gte_stflg(&w.flag);
if (w.flag & 0xFFFFEFFF) {
goto ret0;
}
t = w.sxy[0];
if (t < 0) {
t = -t;
}
if (t >= 0x105) {
goto ret0;
}
if (w.sxy[1] >= 0) {
if (w.sxy[1] >= 0x8D) {
goto ret0;
}
/* zero-byte cross_jump fence (jump.c find_cross_jump): without an insn
here the two |sxy[1]| arms share the suffix `slti 0x8D; beq ret0`
and cross_jump merges them into a single conditional-negate (-5 ins). */
goto pass;
} else {
if (-w.sxy[1] >= 0x8D) {
goto ret0;
}
}
pass:
r = func_80013478((s32)&D_80126B5C, (s32)w.in0);
k = 0x5A0;
if (r <= 0x41010) {
k = 0x59F;
}
func_8002D4C8(k, 0);
return 1;
ret0:
return 0;
}
@@ -0,0 +1,88 @@
s32 func_80181E98_impl(void *arg)
{
extern void func_8012F214(s32 a0, s32 a1, s32 a2);
extern s32 func_80013478(s32 a0, s32 a1);
extern void func_8002D4C8(s32 a0, s32 a1);
extern s32 D_8018E564;
extern u8 D_800AF648;
extern u8 D_80126B5C;
struct {
s16 in0[4];
s16 in1[4];
s16 sxy[2];
s32 flag;
} w;
s32 t;
s32 r;
s32 k;
func_8012F214((s32)arg, (s32)&D_8018E564, (s32)w.in0);
gte_SetRotMatrix(&D_800AF648);
gte_SetTransMatrix(&D_800AF648);
gte_ldv0(w.in0);
gte_rtps();
gte_stsxy(w.sxy);
gte_stflg(&w.flag);
if (w.flag & 0xFFFFEFFF) {
goto ret0;
}
t = w.sxy[0];
if (t < 0) {
t = -t;
}
if (t < 0xAB) {
if (w.sxy[1] >= 0) {
if (w.sxy[1] >= 0x83) {
goto second;
}
goto pass;
} else {
if (-w.sxy[1] < 0x83) {
goto pass;
}
}
}
second:
w.in1[0] = *(s16 *)((s32)arg + 6);
w.in1[1] = *(s16 *)((s32)arg + 10);
w.in1[2] = *(s16 *)((s32)arg + 14);
gte_ldv0(w.in1);
gte_rtps();
gte_stsxy(w.sxy);
gte_stflg(&w.flag);
if (w.flag & 0xFFFFEFFF) {
goto ret0;
}
t = w.sxy[0];
if (t < 0) {
t = -t;
}
if (t >= 0x105) {
goto ret0;
}
if (w.sxy[1] >= 0) {
if (w.sxy[1] >= 0x8D) {
goto ret0;
}
/* zero-byte cross_jump fence (jump.c find_cross_jump): without an insn
here the two |sxy[1]| arms share the suffix `slti 0x8D; beq ret0`
and cross_jump merges them into a single conditional-negate (-5 ins). */
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus8)
goto pass;
} else {
if (-w.sxy[1] >= 0x8D) {
goto ret0;
}
}
pass:
r = func_80013478((s32)&D_80126B5C, (s32)w.in0);
k = 0x5A0;
if (r <= 0x41010) {
k = 0x59F;
}
func_8002D4C8(k, 0);
return 1;
ret0:
return 0;
}
@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 11 best 11 compiles 189 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R7 block @5270 -> 11 [COUNT] (from 11)
R7 do-while @5270 -> 11 [COUNT] (from 11)
R8 temp tmp0 @5287 -> 11 [COUNT] (from 11)
R7 block @5272 -> 11 [COUNT] (from 11)
R8 base tmp0 @5287 -> 11 [COUNT] (from 11)
R7 do-while @5272 -> 11 [COUNT] (from 11)
R8 temp tmp0 @5288 -> 11 [COUNT] (from 11)
R7 block @5287 -> 11 [COUNT] (from 11)
R8 base tmp0 @5288 -> 11 [COUNT] (from 11)
R7 do-while @5287 -> 11 [COUNT] (from 11)
R8 temp tmp0 @5289 -> 11 [COUNT] (from 11)
R7 block @5299 -> 11 [COUNT] (from 11)
@@ -0,0 +1,15 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: straight-derive
// @stuck: none — MATCH (52 ins) on iteration 1, confirmed by rtu_match.
// @class: structural (STRENGTH/mflo!=lw -> MATCH)
// @stuck: none - MATCH (41 ins), match_one + rtu_match.
// @class: regalloc (WIDTH/li!=addu -> MATCH)
// @stuck: none — MATCH (58 ins), match_one + rtu_match. PIN-FREE (no register __asm__).
// @class: plumbing
// @stuck: none — MATCH (52 ins), iteration 1. Keys: (1) §3-T4 — Ghidra inverted the arms; the
@@ -0,0 +1,830 @@
=== lever-free bodies in ov_SC02_017 sharing a callee or global with func_80181E98 (77 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_8012D4B4 (src/shared/ov/func_8012D4B4.h:13) shares 2: D_800AF648 func_8012F214 ---
void func_8012D4B4(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 sp10[2];
s32 sp18[2];
s32 sp20;
s32 sp24;
s32 temp_v0_2;
void *temp_v0;
func_8012F214(arg0, arg1, (s32)sp10);
func_8012F214(arg0, arg2, (s32)sp18);
temp_v0 = func_80010A08(0x10);
(*(s32 *)((s8 *)(temp_v0) + (4))) = arg3;
SetLineF2(temp_v0);
func_8004914C(&D_800AF648);
func_800491AC(&D_800AF648);
temp_v0_2 = RotTransPers((s32)sp10, temp_v0 + 8, &sp20, &sp24);
if ((temp_v0_2 > 0) && (sp24 >= 0) &&
(RotTransPers((s32)sp18, temp_v0 + 0xC, &sp20, &sp24) > 0) && (sp24 >= 0)) {
AddPrim(*(s32 *)((s8 *)&D_800A651C + ((u16)D_800B9A02 * 0x14)) + (temp_v0_2 * 4), temp_v0);
}
}
--- func_80188620 (src/ov_SC02_017/ov_SC02_017_jr_80186C64.c:4474) shares 2: func_8002D4C8 func_8012F214 ---
void func_80188620(s32 arg0) {
u16 sp10[3];
u16 sp18[12];
if (*(s32 *)(arg0 + 0x1C) == 9) {
if (func_8012D5E4(arg0, (s32)D_801E2118, (s32)(D_801E2118 + 8), 10) != 0) {
D_80126B96 |= 0x800;
}
if (*(s16 *)(arg0 + 0x70) & 0x8000) {
func_8012F214(arg0, (s32)D_801E2128, (s32)sp10);
sp18[3] = 0x126;
sp18[5] = 0;
sp18[6] = 0x7FFF;
sp18[0] = sp10[0];
sp18[1] = sp10[1];
sp18[2] = sp10[2];
sp18[7] = *(u16 *)(*(s32 *)(arg0 + 0x20) + 0x12);
func_8012C51C(sp18, arg0);
sp18[7] = *(u16 *)(*(s32 *)(arg0 + 0x20) + 0x12) + 0x100;
func_8012C51C(sp18, arg0);
sp18[7] = *(u16 *)(*(s32 *)(arg0 + 0x20) + 0x12) - 0x100;
func_8012C51C(sp18, arg0);
}
func_8002D4C8(0x43E, 0);
}
if (func_8012BEE8(arg0) != 0) {
((void (*)(void *))func_801883A0)(arg0);
}
}
--- func_80183E70 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:6622) shares 2: func_8002D4C8 func_8012F214 ---
void func_80183E70(s32 param_1) {
s32 v0;
SV3 in;
SV3 out;
if (func_8012BEE8(param_1) != 0) {
func_8002D4C8(0x5D7, 0);
func_8012C218((void *)param_1);
} else {
v0 = *(s16 *)(param_1 + 0x70);
if (v0 != 0) {
in.a = v0 << 4;
in.b = 0;
in.c = 0;
((void (*)(s32, void *, void *))func_8012F214)((s32)aD801EF9FC, &in, &out);
*(s16 *)(param_1 + 0x6) = out.a;
*(s16 *)(param_1 + 0xA) = out.b;
*(s16 *)(param_1 + 0xE) = out.c;
*(Blk8 *)(*(s32 *)(param_1 + 0x20) + 0x10) =
*(Blk8 *)(*(s32 *)((s32)aD801EF9FC + 0x20) + 0x10);
} else {
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x10) += D_8018EED4;
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) += D_8018EED6;
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x14) += D_8018EED8;
func_8012AD80(param_1);
func_8012B2CC(param_1);
}
}
}
--- func_80149954 (src/shared/ov/func_80149954.h:12) shares 2: D_80126B5C func_8002D4C8 ---
s32 func_80149954(s32 s0) {
s32 sp10[2];
s16 buf[10];
if (*(s32 *)(s0 + 0x44) & 0x404) {
return 0;
}
if ((*(u16 *)(s0 + 0xAA) & 0x90) == 0) {
if (currentLocationId == 0x308D) {
func_80015978((s32)&D_80126B5C, sp10);
func_8012E5CC((s32)sp10, 0x4, 0x8E0);
return 0;
}
func_8002D4C8(0x4, 0x8E0);
return 0;
}
if (*(u16 *)(s0 + 0xAC) & 0x90) {
if ((s32)D_8012707C == 0x8E0) {
D_8012707C = 0;
} else {
func_80147364(0x8E0, 0);
}
}
func_800CCF28(s0);
*(s16 *)((s32)buf + 0x0) = 0x12;
*(s32 *)((s32)buf + 0x8) = s0;
*(s16 *)((s32)buf + 0x2) = 0;
*(s16 *)((s32)buf + 0x4) = -0x1E;
*(s16 *)((s32)buf + 0x6) = 0;
*(s32 *)((s32)buf + 0xC) = 0;
*(s32 *)((s32)buf + 0x10) = 0;
func_80146750(buf);
return 1;
}
--- func_80187AB0 (src/ov_SC02_017/ov_SC02_017_jr_80186C64.c:3894) shares 2: D_80126B5C func_8002D4C8 ---
void func_80187AB0(s32 param_1) {
extern M2C_UNK D_801E1F04;
extern u8 D_801E1CDC;
extern u8 D_80126B5C;
extern s32 D_80126B60;
extern s32 D_80126B64;
s32 iVar1;
struct In in;
s32 out[2];
s32 t;
s32 o;
iVar1 = ((s32 (*)(void))func_8012C1B8)();
*(s32 *)(param_1 + 0x20) = iVar1;
if (iVar1 == 0) {
((void (*)(s32))func_8012CAE4)(param_1);
return;
}
((void (*)(s32, void *))func_8001C214)(iVar1, &(*(u8 *)&D_801E1F04));
if ((*(u16 *)(param_1 + 0x70) & 0x1000) == 0) {
func_8002D4C8(0x43A, 0);
} else {
func_8002D4C8(0x6D6, 0);
}
func_8012A828(param_1, &D_801E1CDC);
*(s16 *)(param_1 + 2) = 1;
*(s32 *)(param_1 + 0x1C) = 100;
*(s32 *)&in.lo = D_80126B60;
in.hi -= 0x20;
in.w0 = (*(s32 *)&D_80126B5C);
in.w2 = D_80126B64;
func_8012B77C(out, param_1 + 4, &in);
o = out[0];
t = *(u16 *)(param_1 + 0x70) & 0xF;
switch (t) {
case 0:
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x10) = (s16)o;
break;
case 1:
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x10) = (s16)o;
case 3:
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12) = (s16)(o >> 16);
break;
case 2:
break;
}
if (*(u16 *)(param_1 + 0x70) & 0x1000) {
*(s32 *)(param_1 + 0x1C) = *(s32 *)(param_1 + 0x1C) << 1;
}
func_8012B2CC(param_1);
((void (*)(s32, s32))func_8012C588)(0xBC, param_1);
}
--- func_80178D40 (src/ov_SC02_017/ov_SC02_017_jr_80178D40.c:2639) shares 2: func_8002D4C8 func_8012F214 ---
s32 func_80178D40(s32 arg0, s32 arg1)
{
extern void func_80179B28(s32);
extern s32 func_80137614(s32, s32, s32);
extern void func_8012F214(void *, void *, void *);
extern void func_8012F40C(void *, void *);
extern void func_80179D30(void *);
extern void func_80179D78(void *);
extern void func_80179EA0(void *);
extern void func_80179DCC(s32);
extern void func_80179DF8(void);
extern void func_80179E1C(s32);
extern void func_80179E48(s32);
extern void func_80179E74(s32);
extern void func_80179EE8(s32);
extern void func_80179F14(s32, s32);
extern void func_80179F44(void);
extern void func_80179F6C(s32);
extern void func_80179F98(s32);
extern void func_80179FEC(s32);
extern void func_8017A040(s32);
extern void func_8017A094(s32);
extern void func_8017A0C4(s32);
extern void func_8017A0F4(void);
extern void func_8017A11C(void);
extern void func_8017A144(s32);
extern void func_8017A180(void);
extern void func_8017A1A8(void);
extern void func_8017A1D0(void);
extern void func_8017A1F8(void);
extern void func_8017A220(void);
extern void func_8017A248(void);
extern void func_8017A270(void);
extern void func_8017A298(void);
extern void func_8017A2C0(void);
extern void func_8017A2E8(void);
extern void func_8017A310(void);
extern void func_8017A338(void);
extern void func_8017A360(void);
extern void func_8017A388(void);
extern void func_8017A3B0(void);
extern void func_8017A3D8(void);
extern void func_8017AD0C(s32);
extern void func_8017B238(void *, s32);
extern void func_8017B614(void *, s32);
extern void func_8017B7A8(void *);
extern void func_8017B824(void);
extern void func_8017B880(void);
extern void func_8017B940(void *);
extern void func_8017BA3C(void *, s32);
extern void func_8017BB34(void *, s32);
extern void func_8012A828(void *, s32);
extern s32 func_8012B8A4(void *);
extern void func_8012E88C(void *);
extern void func_8012E8A8(void *);
extern void func_8001AAD0(s32, s32);
extern s32 D_801EF2BC;
extern s32 D_801EF6D0;
extern s16 D_801EF6D4;
extern s16 D_801EF6D8;
extern s16 D_801EF6DC;
extern s16 D_801EF6E0;
extern s32 D_801EF6E8;
extern s32 D_801EF6EC;
extern s32 D_801EF6FC;
extern s16 D_801EF700;
extern s16 D_801EF704;
extern s32 D_801EF708;
extern s32 D_801EF710;
extern s32 D_801EF714[10];
extern s32 D_801EFBD8;
extern s16 D_801EFC90;
extern s32 D_801EFCBC;
SV3_80178D40 v10, v18, v20, v28, v30, v38, v40, v48;
s32 out50[2];
SV3_80178D40 v58, v60;
Actor_80178D40 *pv = &(*(Actor_80178D40*)&D_80126B58);
s32 i5b, i5c, fp5b, fp5c;
s32 *q5b, *q5c, *p5c, *r5c;
s16 *g = &D_801EFC90;
switch (((Cmd_80178D40 *)arg1)->op) {
case 1:
func_80179B28(D_801EF6D0);
D_801EF6D0 = func_80137614(((Cmd_80178D40 *)arg1)->a.w, D_801EF6DC, D_801EF6E0 ? 0x48 : 0x40);
(*(s16*)&D_801EFD34) = 2;
break;
case 0:
func_80179B28(D_801EF6D0);
D_801EF6D0 = func_80137614(((Cmd_80178D40 *)arg1)->a.w, D_801EF6D4, D_801EF6D8 ? 0x48 : 0x40);
(*(s16*)&D_801EFD34) = 1;
break;
case 0x45:
((void (*)(s32))((Cmd_80178D40 *)arg1)->a.w)(((Actor_80178D40 *)arg0));
if (D_801EFBD8 != 0) {
func_80179B28(D_801EF6D0);
D_801EF6D0 = func_80137614(((Actor_80178D40 *)arg0)->unkDC[1], D_801EF6D4, D_801EF6D8 ? 0x48 : 0x40);
(*(s16*)&D_801EFD34) = 1;
} else {
(*(s16*)&D_801EFD34) = 3;
}
break;
case 0x32:
func_80179B28(D_801EF6D0);
D_801EF6D0 = func_80137614(((Actor_80178D40 *)arg0)->unkDC[((Cmd_80178D40 *)arg1)->a.w], D_801EF6D4,
D_801EF6D8 ? 0x48 : 0x40);
(*(s16*)&D_801EFD34) = 1;
break;
case 2:
func_80179B28(D_801EF6D0);
if (D_801EF6E8 != 0) {
D_801EF2B8 = D_801EF6E8;
D_801EF6E8 = 0;
(*(s16*)&D_801EFD34) = 3;
return;
}
(*(s16*)&D_801EFD34) = 6;
break;
case 6:
func_80179DF8();
(*(s16*)&D_801EFD34) = 3;
break;
case 3:
v10.vx = ((Cmd_80178D40 *)arg1)->a.uh[0];
v10.vy = 0;
v10.vz = ((Cmd_80178D40 *)arg1)->a.uh[1];
func_80179D30(&v10);
(*(s16*)&D_801EFD34) = 3;
break;
case 4:
v10.vx = ((Cmd_80178D40 *)arg1)->a.uh[0];
v10.vy = 0;
v10.vz = ((Cmd_80178D40 *)arg1)->a.uh[1];
func_8012F214(((Actor_80178D40 *)arg0), &v10, &v18);
func_80179D30(&v18);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x4C:
func_80179D78((void *)((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x4D:
v10.vx = ((Blk_80178D40 *)((Cmd_80178D40 *)arg1)->a.p)->f0;
v10.vy = 0;
v10.vz = ((Blk_80178D40 *)((Cmd_80178D40 *)arg1)->a.p)->f4;
func_8012F214(((Actor_80178D40 *)arg0), &v10, &v18);
v18.pad = ((Blk_80178D40 *)((Cmd_80178D40 *)arg1)->a.p)->f6;
func_80179D78(&v18);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x15:
v10.vx = ((Cmd_80178D40 *)arg1)->a.uh[0];
v10.vy = 0;
v10.vz = ((Cmd_80178D40 *)arg1)->a.uh[1];
func_8012F214(((Actor_80178D40 *)arg0)->unkD4, &v10, &v18);
func_80179D30(&v18);
(*(s16*)&D_801EFD34) = 3;
break;
case 5:
func_80179DCC(((Cmd_80178D40 *)arg1)->a.h[0]);
(*(s16*)&D_801EFD34) = 3;
break;
case 7:
func_80179E1C(((Cmd_80178D40 *)arg1)->a.h[0]);
(*(s16*)&D_801EFD34) = 3;
break;
case 8:
func_80179E74(((Cmd_80178D40 *)arg1)->a.h[0]);
(*(s16*)&D_801EFD34) = 3;
break;
case 9:
v10.vx = ((Cmd_80178D40 *)arg1)->a.uh[0];
v10.vy = 0;
v10.vz = ((Cmd_80178D40 *)arg1)->a.uh[1];
func_80179EA0(&v10);
(*(s16*)&D_801EFD34) = 3;
break;
case 0xA:
v10.vx = ((Actor_80178D40 *)arg0)->unk6;
v10.vy = ((Actor_80178D40 *)arg0)->unkA;
v10.vz = ((Actor_80178D40 *)arg0)->unkE;
func_80179EA0(&v10);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x16: {
Actor_80178D40 *p = ((Actor_80178D40 *)arg0)->unkD4;
v10.vx = p->unk6;
v10.vy = p->unkA;
v10.vz = p->unkE;
func_80179EA0(&v10);
(*(s16*)&D_801EFD34) = 3;
break;
}
case 0xB:
func_8017A0F4();
(*(s16*)&D_801EFD34) = 3;
break;
case 0xC:
func_8017A11C();
(*(s16*)&D_801EFD34) = 3;
break;
case 0xD:
func_8017A180();
(*(s16*)&D_801EFD34) = 3;
break;
case 0xE:
func_8017A1A8();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x10:
func_8017A1D0();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x46:
func_8017A1F8();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x59:
func_8017A220();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x5A:
func_8017A248();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x49:
func_8017A144(((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x47:
func_8017A270();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x17:
func_80179EE8(((Cmd_80178D40 *)arg1)->a.h[0]);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x18:
func_80179F14(((Cmd_80178D40 *)arg1)->a.h[0], ((Cmd_80178D40 *)arg1)->a.h[1]);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x19:
func_80179F6C(((Cmd_80178D40 *)arg1)->a.h[0]);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x1A:
func_80179F98(((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x51:
func_8017A040(((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x1B:
D_801EF708 = ((Cmd_80178D40 *)arg1)->a.w;
func_80179F44();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x1C:
func_8017A338();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x52:
func_8017A360();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x1D:
func_8017A388();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x3B:
func_8017A094(((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x3C:
func_8017A0C4(((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801EFD34) = 3;
break;
case 0xF:
case 0x3F:
(*(s16*)&D_801EFD34) = 4;
D_801EF2BC = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x3E:
(*(s16*)&D_801EFD34) = 5;
D_801EF6FC = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x40:
D_801EF6FC = (s32)func_8017A3B0;
(*(s16*)&D_801EFD34) = 5;
break;
case 0x23:
func_8012A828(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x31:
func_8012A828(((Actor_80178D40 *)arg0), ((Actor_80178D40 *)arg0)->unkDC[((Cmd_80178D40 *)arg1)->a.w]);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x24:
(*(s16*)&D_801EFD34) = 3;
((Actor_80178D40 *)arg0)->unk20->unk12 = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x25:
g[0] = 1;
g[2] = ((Actor_80178D40 *)arg0)->unk20->unk12 + ((Cmd_80178D40 *)arg1)->a.uh[0];
g[1] = 0x1E;
(*(s16*)&D_801EFD34) = 3;
g[3] = ((Cmd_80178D40 *)arg1)->a.uh[1];
break;
case 0x48:
g[0] = 1;
g[2] = ((Cmd_80178D40 *)arg1)->a.uh[0];
g[1] = 0x1E;
(*(s16*)&D_801EFD34) = 3;
g[3] = ((Cmd_80178D40 *)arg1)->a.uh[1];
break;
case 0x26:
g[0] = 1;
g[2] = func_8012B8A4(((Actor_80178D40 *)arg0));
g[1] = 0x1E;
(*(s16*)&D_801EFD34) = 3;
g[3] = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x3D:
((void(*)(void *, s32))func_8012E8E0)(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x27:
g[0] = 2;
g[4] = ((Cmd_80178D40 *)arg1)->a.uh[0];
(*(s16*)&D_801EFD34) = 3;
g[1] = ((Cmd_80178D40 *)arg1)->a.uh[1];
break;
case 0x4F:
g[5] = 1;
g[0] = 3;
g[6] = ((Cmd_80178D40 *)arg1)->a.uh[0];
(*(s16*)&D_801EFD34) = 3;
g[7] = ((Actor_80178D40 *)arg0)->unkA;
g[8] = ((Cmd_80178D40 *)arg1)->a.uh[1];
g[1] = 0x10;
g[3] = 4;
/* fallthrough */
case 0x28:
g[5] = 0;
g[0] = 3;
g[6] = ((Cmd_80178D40 *)arg1)->a.uh[0];
(*(s16*)&D_801EFD34) = 3;
g[7] = ((Actor_80178D40 *)arg0)->unkA;
g[8] = ((Cmd_80178D40 *)arg1)->a.uh[1];
g[1] = 0x10;
g[3] = 4;
break;
case 0x29:
v20.vx = ((Cmd_80178D40 *)arg1)->a.uh[0];
v20.vy = ((Actor_80178D40 *)arg0)->unkA;
v20.vz = ((Cmd_80178D40 *)arg1)->a.uh[1];
func_8012F214(((Actor_80178D40 *)arg0), &v20, &v28);
g[5] = 0;
g[0] = 3;
*(SV3_80178D40 *)(g + 6) = v28;
g[1] = 0x10;
g[3] = 4;
(*(s16*)&D_801EFD34) = 3;
break;
case 0x50:
v30.vx = ((Cmd_80178D40 *)arg1)->a.uh[0];
v30.vy = ((Actor_80178D40 *)arg0)->unkA;
v30.vz = ((Cmd_80178D40 *)arg1)->a.uh[1];
func_8012F214(((Actor_80178D40 *)arg0), &v30, &v38);
g[5] = 1;
g[0] = 3;
*(SV3_80178D40 *)(g + 6) = v38;
g[1] = 0x10;
g[3] = 4;
(*(s16*)&D_801EFD34) = 3;
break;
case 0x2A:
g[0] = 4;
(*(s16*)&D_801EFD34) = 3;
g[1] = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x1E:
func_8017B238(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x21:
func_8017BA3C(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
func_8017B238(((Actor_80178D40 *)arg0), (s32)&D_801EF6EC);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x54:
func_8017BB34(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
func_8017B238(((Actor_80178D40 *)arg0), (s32)&D_801EF6EC);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x1F:
func_8017B614(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x22:
func_8017BA3C(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
func_8017B614(((Actor_80178D40 *)arg0), (s32)&D_801EF6EC);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x55:
func_8017BB34(((Actor_80178D40 *)arg0), ((Cmd_80178D40 *)arg1)->a.w);
func_8017B614(((Actor_80178D40 *)arg0), (s32)&D_801EF6EC);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x20:
func_8017B7A8(((Actor_80178D40 *)arg0));
(*(s16*)&D_801EFD34) = 3;
break;
case 0x4E:
D_801EF710 = ((Cmd_80178D40 *)arg1)->a.w;
func_8017B940(((Actor_80178D40 *)arg0));
(*(s16*)&D_801EFD34) = 3;
break;
case 0x57:
func_8017B824();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x58:
func_8017B880();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x2B:
(*(s16*)&D_801EFD34) = 3;
((Actor_80178D40 *)arg0)->unk2 = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x2C:
(*(s16*)&D_801EFD34) = 3;
((Actor_80178D40 *)arg0)->unk34 = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x2D:
(*(s16*)&D_801EFD34) = 3;
((Actor_80178D40 *)arg0)->unkD8 = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x2F:
(*(s16*)&D_801EFD34) = 3;
((Actor_80178D40 *)arg0)->unk10A = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x2E:
(*(s16*)&D_801EFD34) = 3;
((Actor_80178D40 *)arg0)->unkF8 = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x11:
func_8017A298();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x12:
func_8017A2C0();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x13:
func_8017A2E8();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x14:
func_8017A310();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x33: {
void (*f)(Actor_80178D40 *) = (void (*)(Actor_80178D40 *))((Cmd_80178D40 *)arg1)->a.w;
D_801EFCBC = (s32)&((Cmd_80178D40 *)arg1)[1];
f(((Actor_80178D40 *)arg0));
(*(s16*)&D_801EFD34) = 3;
break;
}
case 0x30:
if (((Cmd_80178D40 *)arg1)->a.w == 0) {
func_8012E8A8(((Actor_80178D40 *)arg0));
(*(s16*)&D_801EFD34) = 3;
} else {
func_8012E88C(((Actor_80178D40 *)arg0));
(*(s16*)&D_801EFD34) = 3;
}
break;
case 0x4A:
((void(*)())func_80175414)();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x4B:
func_80175454();
(*(s16*)&D_801EFD34) = 3;
break;
case 0x34:
(*(s16*)&D_801EFD34) = 3;
D_801EF2B8 = ((Cmd_80178D40 *)arg1)->a.w;
return;
case 0x35:
D_801EF6E8 = (s32)&((Cmd_80178D40 *)arg1)[1];
(*(s16*)&D_801EFD34) = 3;
D_801EF2B8 = ((Cmd_80178D40 *)arg1)->a.w;
return;
case 0x36:
(*(s16*)&D_801EFD34) = 3;
D_801EF2B8 += 8;
if (((s32 (*)(s32))((Cmd_80178D40 *)arg1)->a.w)(((Actor_80178D40 *)arg0)) == 0) {
break;
}
D_801EF2B8 = *(s32 *)(D_801EF2B8 + 4);
return;
case 0x37:
(*(s16*)&D_801EFD34) = 3;
D_801EF6D4 = ((Cmd_80178D40 *)arg1)->a.uh[0];
D_801EF6D8 = ((Cmd_80178D40 *)arg1)->a.uh[1];
break;
case 0x38:
(*(s16*)&D_801EFD34) = 3;
D_801EF6DC = ((Cmd_80178D40 *)arg1)->a.uh[0];
D_801EF6E0 = ((Cmd_80178D40 *)arg1)->a.uh[1];
break;
case 0x39: {
s32 w1, w2;
v40.vx = ((Actor_80178D40 *)arg0)->unk6;
v40.vy = ((Actor_80178D40 *)arg0)->unkA;
v40.vz = ((Actor_80178D40 *)arg0)->unkE;
v48.vx = pv->unk6;
v48.vy = pv->unkA;
v48.vz = pv->unkE;
func_8012F40C(out50, &v40);
w1 = out50[0];
func_8012F40C(out50, &v48);
w2 = out50[0];
(*(s16*)&D_801EFD34) = 3;
D_801EF6D4 = w1;
D_801EF6D8 = (s16)w1 >= (s16)w2;
break;
}
case 0x3A: {
s32 w1, w2;
v58.vx = ((Actor_80178D40 *)arg0)->unk6;
v58.vy = ((Actor_80178D40 *)arg0)->unkA;
v58.vz = ((Actor_80178D40 *)arg0)->unkE;
v60.vx = pv->unk6;
v60.vy = pv->unkA;
v60.vz = pv->unkE;
func_8012F40C(out50, &v58);
w1 = out50[0];
func_8012F40C(out50, &v60);
w2 = out50[0];
(*(s16*)&D_801EFD34) = 3;
D_801EF6DC = w2;
D_801EF6E0 = (s16)w1 < (s16)w2;
break;
}
case 0x41:
((void(*)(s32, s32))func_8002D4C8)(((Cmd_80178D40 *)arg1)->a.uh[0], ((Cmd_80178D40 *)arg1)->a.uh[1]);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x42:
func_8017AD0C(((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x43:
D_801EF6FC = (s32)func_8017A3D8;
D_801EF704 = 0;
(*(s16*)&D_801EFD34) = 5;
D_801EF700 = ((Cmd_80178D40 *)arg1)->a.w;
break;
case 0x44:
func_8001AAD0(((Cmd_80178D40 *)arg1)->a.h[0], ((Cmd_80178D40 *)arg1)->a.h[1]);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x53:
func_80179E48(((Cmd_80178D40 *)arg1)->a.h[0]);
(*(s16*)&D_801EFD34) = 3;
break;
case 0x56:
func_80179FEC(((Cmd_80178D40 *)arg1)->a.w);
(*(s16*)&D_801EFD34) = 3;
break;
L5B_found:
fp5b = ((Cmd_80178D40 *)arg1)->a.w;
*q5b = fp5b;
((void (*)(Actor_80178D40 *))fp5b)(((Actor_80178D40 *)arg0));
(*(s16*)&D_801EFD34) = 3;
break;
case 0x5B:
i5b = 0;
q5b = D_801EF714;
do {
i5b++;
if (*q5b == 0) {
goto L5B_found;
}
q5b++;
} while (i5b < 10);
(*(s16*)&D_801EFD34) = 3;
break;
L5C_found1:
*q5c = 0;
goto L5C_join;
case 0x5C:
i5c = 0;
if (((Cmd_80178D40 *)arg1)->a.w != 0) {
fp5c = ((Cmd_80178D40 *)arg1)->a.w;
q5c = D_801EF714;
do {
if (*q5c == fp5c) {
goto L5C_found1;
}
i5c++;
q5c++;
} while (i5c < 10);
L5C_join:
if (i5c != 10) {
(*(s16*)&D_801EFD34) = 3;
break;
}
i5c = 0;
do {
p5c = &D_801EF714[i5c];
if (*p5c != 0) {
goto L5C_found2;
}
i5c++;
} while (i5c < 10);
(*(s16*)&D_801EFD34) = 3;
break;
L5C_found2:
*p5c = 0;
goto L5D;
}
r5c = D_801EF714;
do {
i5c++;
if (*r5c != 0) {
*r5c = 0;
goto L5D;
}
r5c++;
} while (i5c < 10);
/* fallthrough */
case 0x5D:
L5D:
(*(s16*)&D_801EFD34) = 3;
break;
default:
break;
}
Lend:
D_801EF2B8 += 8;
}
@@ -0,0 +1,18 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:func_80181E98: score 11 (COUNT; mine 124 ins, target 129) — not yet
replace mine[41:42] target[41:42]
41 bnez v0,4140 <func_80181E98+0x1dc> | bnez v0,4154 <func_80181E98+0x1f0>
replace mine[58:59] target[58:59]
58 j 410c <func_80181E98+0x1a8> | j 4120 <func_80181E98+0x1bc>
replace mine[62:63] target[62:63]
62 bnez v0,410c <func_80181E98+0x1a8> | bnez v0,4120 <func_80181E98+0x1bc>
replace mine[88:89] target[88:89]
88 bnez v0,4140 <func_80181E98+0x1dc> | bnez v0,4154 <func_80181E98+0x1f0>
replace mine[96:97] target[96:97]
96 beqz v0,4140 <func_80181E98+0x1dc> | beqz v0,4154 <func_80181E98+0x1f0>
replace mine[100:101] target[100:106]
100 bgez v0,4100 <func_80181E98+0x19c> | bltz v0,4110 <func_80181E98+0x1ac>
101 -- | nop
102 -- | slti v0,v0,141
103 -- | beqz v0,4154 <func_80181E98+0x1f0>
104 -- | move v0,zero
105 -- | j 4120 <func_80181E98+0x1bc>
@@ -0,0 +1 @@
NEEDED barrier line 5502
@@ -0,0 +1,2 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
func_80181E98
@@ -0,0 +1,41 @@
void func_801831FC(s32 arg0) {
s32 s0 = arg0;
s32 v0;
s16 buf[4];
s32 base;
s32 s1;
s16 v1;
s16 a1;
base = (s32)&D_80126B58;
s1 = (s32)D_8018E8EC + (*(s16 *)(s0 + 0xFC)) * 8;
if (*(s16 *)(s1 + 0x6) == 0) {
return;
}
func_80015978(base + 4, (s32 *)buf);
if (*(s16 *)(s0 + 0xFC) == 3) {
if (buf[1] < -0xB00) {
return;
}
buf[1] = *(u16 *)(s1 + 0x2);
}
v0 = func_80013294((void *)buf, (void *)s1);
v1 = (s16)v0;
if (v1 >= 0x800) {
return;
}
v0 = (0x800 - v1) * 127;
if (v0 < 0) {
v0 += 0x7FF;
}
v0 = v0 >> 11;
if (v0 < 0) {
a1 = 0;
} else {
a1 = v0;
}
if (a1 >= 0x80) {
a1 = 0x7F;
}
func_8002D4C8(*(u16 *)(s1 + 0x6), (u16)(a1 | 0x1000));
}
@@ -0,0 +1,41 @@
void func_801831FC(s32 arg0) {
s32 s0 = arg0;
register s32 v0 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus8)
s16 buf[4];
s32 base;
s32 s1;
s16 v1;
s16 a1;
base = (s32)&D_80126B58;
s1 = (s32)D_8018E8EC + (*(s16 *)(s0 + 0xFC)) * 8;
if (*(s16 *)(s1 + 0x6) == 0) {
return;
}
func_80015978(base + 4, (s32 *)buf);
if (*(s16 *)(s0 + 0xFC) == 3) {
if (buf[1] < -0xB00) {
return;
}
buf[1] = *(u16 *)(s1 + 0x2);
}
v0 = func_80013294((void *)buf, (void *)s1);
v1 = (s16)v0;
if (v1 >= 0x800) {
return;
}
v0 = (0x800 - v1) * 127;
if (v0 < 0) {
v0 += 0x7FF;
}
v0 = v0 >> 11;
if (v0 < 0) {
a1 = 0;
} else {
a1 = v0;
}
if (a1 >= 0x80) {
a1 = 0x7F;
}
func_8002D4C8(*(u16 *)(s1 + 0x6), (u16)(a1 | 0x1000));
}
@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 6 best 6 compiles 189 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R6 inline v0 @6085 -> 6 [REG] (from 6)
R8 hoist tmp0 @6090 -> 6 [REG] (from 6)
R7 block @6092 -> 6 [REG] (from 6)
R4 decl-move v0 1->0 -> 6 [REG] (from 6)
R8 temp tmp0 @6083 -> 6 [REG] (from 6)
R7 do-while @6092 -> 6 [REG] (from 6)
R9 swap-stmts @6073 -> 6 [REG] (from 6)
R4 decl-move v0 1->2 -> 6 [REG] (from 6)
R8 base tmp0 @6083 -> 6 [REG] (from 6)
R7 block @6090 -> 6 [REG] (from 6)
R4 decl-move v0 1->3 -> 6 [REG] (from 6)
R8 temp tmp0 @6103 -> 6 [REG] (from 6)
@@ -0,0 +1,15 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: straight-derive
// @stuck: none — MATCH (52 ins) on iteration 1, confirmed by rtu_match.
// @class: structural (STRENGTH/mflo!=lw -> MATCH)
// @stuck: none - MATCH (41 ins), match_one + rtu_match.
// @class: regalloc (WIDTH/li!=addu -> MATCH)
// @stuck: none — MATCH (58 ins), match_one + rtu_match. PIN-FREE (no register __asm__).
// @class: plumbing
// @stuck: none — MATCH (52 ins), iteration 1. Keys: (1) §3-T4 — Ghidra inverted the arms; the
@@ -0,0 +1,273 @@
=== lever-free bodies in ov_SC02_017 sharing a callee or global with func_801831FC (120 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80147364 (src/shared/ov/func_80147364.h:9) shares 3: D_80126B58 func_80015978 func_8002D4C8 ---
void aF80147364(u16 param_1, u16 param_2) {
s32 sp10[2];
s32 *p = &D_80126B58;
if (currentLocationId == 0x308d) {
((void (*)(void *, void *))func_80015978)(p + 1, sp10);
((void (*)(void *, s32, s32))aF8012E5CC)(sp10, param_1, param_2);
} else {
func_8002D4C8(param_1, param_2);
}
}
--- func_8018347C (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:6153) shares 3: D_80126B58 func_80013294 func_80015978 ---
s32 func_8018347C(s32 *arg0, s32 arg1, s32 arg2) {
s16 buf[4];
s32 base;
s32 t;
s16 ret;
base = (s32)&D_80126B58;
if (*(u16 *)base == 0x19) {
return 0;
}
func_80015978(base + 4, (s32 *)buf);
buf[1] = 0;
t = func_80013294((void *)&D_8018E920, (void *)buf);
ret = t;
if (((s16)arg1 != 0) && ((s16)t < (s16)arg1)) {
func_800139C8((s16)func_8012B8A4((s16 *)arg0), (void *)D_8018E928, (void *)buf);
D_80126B5E = buf[0];
D_80126B66 = buf[2];
}
if ((*(s16 *)(base + 0xA) < -0xD00) && (*(s16 *)(base + 0xE) < 0)) {
if (*(s16 *)(base + 6) >= 0) {
if (*(s16 *)(base + 6) < 0x160) {
*(s16 *)(base + 6) = 0x160;
}
} else if (*(s16 *)(base + 6) >= -0x15F) {
*(s16 *)(base + 6) = -0x160;
}
}
if ((s16)arg2 != 0) {
if (ret < (s16)arg2) {
if (func_8016F1AC() == 0) {
return 1;
}
}
}
return 0;
}
--- func_80144B9C (src/shared/ov/func_80144B9C.h:159) shares 3: D_80126B58 func_80015978 func_8002D4C8 ---
void func_80144B9C(void) {
P10 *p10 = (P10 *)D_80126B58;
P14 *p14 = (P14 *)D_80078E78;
register u8 *p = D_800AF630;
P18 *p18 = (P18 *)D_800AE6A8;
P1C *p1C = (P1C *)D_80126948;
HDR *hdr;
ENT *ent;
s32 tbl;
s16 i;
void (*calltmp)(void);
s32 flag;
func_80019018();
func_80018E78();
if (p18->f8 == 0) {
hdr = (HDR *)func_801457A4(*(s16 *)(p + 0xA3D8));
p18->f16 = 0;
flag = 1;
D_8011DB14 = p14->f3A;
D_8011DB1C = p14->f3E;
D_80128150 = 100;
func_8002AB64();
} else {
hdr = (HDR *)func_801457A4(*(s16 *)(p + 0xA3D8));
flag = 0;
}
p18->f1C = hdr->fC8;
tbl = hdr->fC8;
if (p18->f16 == 0xFF) {
ent = &D_80078E50;
} else {
ent = (ENT *)*(s32 *)(p18->f16 * 4 + tbl);
}
p18->fC = ent->f8;
p18->f14 = 0;
p10->f4D = 0;
if (ent->fC != (s32)D_8010F5C8) {
p10->f198 = ent->fC;
}
if (*(s16 *)(p + 0xA3DA) == 0x1000 && *(s16 *)(p + 0xA3DC) == 0x1000) {
p10->f6 = p10->f88 = p10->f90 = p18->f20;
p10->fA = p10->f8A = p10->f92 = p18->f22;
p10->fE = p10->f8C = p10->f94 = p18->f24;
p10->f20->f12 = p18->f26;
p18->f18 = 0;
} else {
p10->f6 = p10->f88 = p10->f90 = ent->f10;
p10->fA = p10->f8A = p10->f92 = ent->f12;
p10->fE = p10->f8C = p10->f94 = ent->f14;
p10->f20->f12 = ent->f16;
}
p10->f154 = p10->f15C = p10->f6;
p10->f156 = p10->f15E = p10->fA;
p10->f158 = p10->f160 = p10->fE;
func_80015978((void *)((s32)p10 + 4), D_80126DB0);
D_80126DB6 = p10->f20->f12;
if (*(s16 *)(p + 0xA3DA) == 0x1000 &&
(*(s16 *)(p + 0xA3DC) == 0x1000 || *(s16 *)(p + 0xA3DC) == 0x2000) && flag == 0) {
ent->f18();
func_8012A1BC();
} else {
if (*(s16 *)(p + 0xA3DA) == 0x1000 && *(s16 *)(p + 0xA3DC) == 0x3000) {
p1C->fA0 = ent->f3;
} else {
p1C->fA0 = 0;
}
ent->f18();
}
if (*(s16 *)(p + 0xA3D8) == 0x3069) {
p1C->fA0 = ent->f3;
}
D_801151D4 = (s32)p1C;
func_8002850C(hdr->f0, hdr->f2, hdr->f4);
D_800A5E88 = hdr->f6;
D_800A5E8C = hdr->f8;
D_800A5E90 = hdr->fA;
D_800A5E94 = hdr->fC;
D_800A5E95 = hdr->fD;
D_800A5E96 = hdr->fE;
func_80028620(0, &D_800A5E88);
D_800A5E98 = hdr->f10;
D_800A5E9C = hdr->f12;
D_800A5EA0 = hdr->f14;
D_800A5EA4 = hdr->f16;
D_800A5EA5 = hdr->f17;
D_800A5EA6 = hdr->f18;
func_80028620(1, &D_800A5E98);
D_800A5EA8 = hdr->f1A;
D_800A5EAC = hdr->f1C;
D_800A5EB0 = hdr->f1E;
D_800A5EB4 = hdr->f20;
D_800A5EB5 = hdr->f21;
D_800A5EB6 = hdr->f22;
func_80028620(2, &D_800A5EA8);
func_80129398();
D_800B9AAC = hdr->f24;
D_800B9B00 = hdr->f26;
D_800B9AC4 = hdr->f28;
D_800B9B18 = hdr->f2C;
D_800B9AC8 = hdr->f30;
D_800B9B1C = hdr->f34;
D_800B9AB2 = hdr->f38;
D_800B9B06 = hdr->f3A;
D_800B9AB6 = hdr->f3C;
D_800B9B0A = hdr->f3E;
D_800B9ABC = hdr->f40[0];
D_800B9ABD = hdr->f40[1];
D_800B9ABE = hdr->f40[2];
D_800B9B10 = hdr->f40[3];
D_800B9B11 = hdr->f40[4];
D_800B9B12 = hdr->f40[5];
D_800B9ABF = hdr->f40[6];
D_800B9AC0 = hdr->f40[7];
D_800B9AC1 = hdr->f40[8];
D_800B9B13 = hdr->f40[9];
D_800B9B14 = hdr->f40[10];
D_800B9B15 = hdr->f40[11];
func_8012944C();
p10->fB0 = hdr->f4C;
p10->fCC = hdr->f50;
p10->f1E8 = hdr->f54;
p10->f1F0 = hdr->f58;
D_80126728 = hdr->f5C;
D_8011DB08 = hdr->f60;
D_80126AEC = hdr->f64;
p10->f19C = (s32)hdr + 0x68;
func_801336E8(hdr->f88, hdr->f8C, hdr->f90);
func_8013B83C(hdr->f94, hdr->f98, hdr->f9C);
func_8013B568(hdr->fA8);
func_800D02C0(hdr->fD4);
func_80011E84(hdr->fD8);
for (i = 0; i < 8; i++) {
D_801151F0[i] = *(u8 *)((s32)hdr + i + 0xAC);
}
D_801274C8 = hdr->fB4;
D_801274CC = hdr->fB8;
D_801274D0 = hdr->fBC;
D_801274D4 = hdr->fC0;
D_801270B8 = hdr->fC4;
D_80127520 = hdr->fC4;
D_801151D8 = 0;
D_8011DB28 = 0;
calltmp = ent->f20;
calltmp();
func_8013D3D4(hdr->fA0, hdr->fA4);
func_8002D4C8(0x1E, 0);
if (p18->f8 == 0) {
D_80078E50 = *ent;
}
p18->f4 = (s32)&D_80078E50;
p18->f8 = p18->f8 & 0x7F000000;
if (func_800CF854() != 0) {
func_8001C14C();
func_8012A110();
}
}
--- func_8017CCCC (src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:3938) shares 2: D_80126B58 func_8002D4C8 ---
void func_8017CCCC(void) {
extern s32 D_80126B58;
func_8014BCEC((s32)&D_80126B58, 0x5);
func_8014BD24((s32)&D_80126B58, 0x270F);
func_8002D4C8(0xBFE, 0);
}
--- func_8014BDE8 (src/shared/ov/func_8014BDE8.h:8) shares 2: func_80013294 func_80015978 ---
void func_8014BDE8(s32 a0) {
s32 s0 = a0;
struct B8014 sp10;
s16 sp18[4];
if (func_8016F1AC() != 0) {
return;
}
if (func_8017267C((s32 *)s0) != 0) {
return;
}
sp10 = *(struct B8014 *)(s0 + 0x98);
func_80015978(s0 + 4, (s32 *)sp18);
sp18[1] = 0;
*(s16 *)((s32)&sp10 + 0x2) = 0;
func_80029ED4((func_80013294(&sp10, sp18) << 16) >> 16);
}
--- func_80149954 (src/shared/ov/func_80149954.h:12) shares 2: func_80015978 func_8002D4C8 ---
s32 func_80149954(s32 s0) {
s32 sp10[2];
s16 buf[10];
if (*(s32 *)(s0 + 0x44) & 0x404) {
return 0;
}
if ((*(u16 *)(s0 + 0xAA) & 0x90) == 0) {
if (currentLocationId == 0x308D) {
func_80015978((s32)&D_80126B5C, sp10);
func_8012E5CC((s32)sp10, 0x4, 0x8E0);
return 0;
}
func_8002D4C8(0x4, 0x8E0);
return 0;
}
if (*(u16 *)(s0 + 0xAC) & 0x90) {
if ((s32)D_8012707C == 0x8E0) {
D_8012707C = 0;
} else {
func_80147364(0x8E0, 0);
}
}
func_800CCF28(s0);
*(s16 *)((s32)buf + 0x0) = 0x12;
*(s32 *)((s32)buf + 0x8) = s0;
*(s16 *)((s32)buf + 0x2) = 0;
*(s16 *)((s32)buf + 0x4) = -0x1E;
*(s16 *)((s32)buf + 0x6) = 0;
*(s32 *)((s32)buf + 0xC) = 0;
*(s32 *)((s32)buf + 0x10) = 0;
func_80146750(buf);
return 1;
}
@@ -0,0 +1,10 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:func_801831FC: score 6 (REG-caller; mine 62 ins, target 62) — not yet
register pairs (mine -> target, count): v1->v0 x8
replace mine[38:40] target[38:40]
38 subu v1,v1,v0 | subu v0,v1,v0
39 bgez v1,5370 <func_801831FC+0xa8> | bgez v0,5370 <func_801831FC+0xa8>
replace mine[41:45] target[41:45]
41 addiu v1,v1,2047 | addiu v0,v0,2047
42 sra v1,v1,0xb | sra v0,v0,0xb
43 bgez v1,5380 <func_801831FC+0xb8> | bgez v0,5380 <func_801831FC+0xb8>
44 move a1,v1 | move a1,v0
@@ -0,0 +1,2 @@
REMOVED pin $16 line 6261
NEEDED pin $2 line 6262
@@ -0,0 +1,2 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
func_801831FC
+37 -37
View File
@@ -53,7 +53,7 @@
},
"kinds": {
"asm-body/direct": 13,
"barrier/direct": 329,
"barrier/direct": 328,
"barrier/via-macro": 2,
"gte-lever/direct": 362,
"gte-lever/via-macro": 94,
@@ -63,7 +63,7 @@
"instruction/direct": 210,
"instruction/via-macro": 22,
"keepalive/direct": 346,
"launder/direct": 664,
"launder/direct": 663,
"launder/via-macro": 42,
"verbatim-body/direct": 2682
}
@@ -72,11 +72,9 @@
"cfake_markers": {
"count": 33,
"sample": [
"src/md_SC07_004/md_SC07_004.c:280",
"src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c:4815",
"src/ov_SC05_005/ov_SC05_005_jr_8017D898.c:4026",
"src/800.c:12748",
"src/md_SC07_003/md_SC07_003.c:3577",
"src/md_SC07_004/md_SC07_004.c:280",
"src/ov_SC01_000/ov_SC01_000_jr_8017BEBC.c:3570",
"src/ov_SC01_009/ov_SC01_009_jr_8017E590.c:4271",
"src/ov_SC01_077/ov_SC01_077_jr_80183CF4.c:3979",
@@ -98,6 +96,8 @@
"src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:7487",
"src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:10290",
"src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c:5814",
"src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c:4815",
"src/ov_SC05_005/ov_SC05_005_jr_8017D898.c:4026",
"src/ov_SC05_007/ov_SC05_007_jr_8017BEBC.c:3335",
"src/ov_SC05_018/ov_SC05_018_jr_8017D604.c:4942",
"src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:8485",
@@ -109,36 +109,36 @@
},
"classes": {
"A": {
"bodies": 1520,
"distinct_bodies": 681,
"bodies": 1519,
"distinct_bodies": 680,
"file_scope": 0,
"in_bodies": 2424,
"in_bodies": 2423,
"kinds": {
"pin": 2424
"pin": 2423
},
"marked": 2424,
"sites": 2424,
"marked": 2423,
"sites": 2423,
"tus": 1091,
"unmarked": 0
},
"B": {
"bodies": 4720,
"distinct_bodies": 779,
"bodies": 4718,
"distinct_bodies": 777,
"file_scope": 13,
"in_bodies": 11352,
"in_bodies": 11350,
"kinds": {
"asm-body": 13,
"barrier": 331,
"barrier": 330,
"gte": 6328,
"gte-lever": 456,
"gte-unsigned": 271,
"instruction": 232,
"keepalive": 346,
"launder": 706,
"launder": 705,
"verbatim-body": 2682
},
"marked": 2574,
"sites": 11365,
"marked": 2572,
"sites": 11363,
"tus": 1428,
"unmarked": 8791
},
@@ -244,9 +244,9 @@
"coverage": {
"asm": {
"comment_dead": 6782,
"live": 15450,
"live": 15447,
"macro_block": 194,
"raw": 22426
"raw": 22423
},
"attribute": {
"comment_dead": 0,
@@ -262,9 +262,9 @@
},
"register": {
"comment_dead": 8576,
"live": 2474,
"live": 2473,
"macro_block": 18,
"raw": 11068
"raw": 11067
},
"volatile": {
"comment_dead": 2606,
@@ -274,7 +274,7 @@
}
},
"coverage_ok": true,
"elapsed_s": 35.3,
"elapsed_s": 37.3,
"generated": "2026-09-11",
"gte_levers": {
"direct": 362,
@@ -285,15 +285,15 @@
"via_macro": 94,
"what": "GTE ops whose clobbers exceed the canonical macro's (a scheduling steer): class-B levers INSIDE the headline number since T5 (2026-09-09), marked, 0 at the close"
},
"head": "2e7bc0947",
"head": "577b2592d",
"headers": 3181,
"levers_AB": {
"asm": 2084,
"bodies": 2238,
"distinct_bodies": 921,
"marked": 4508,
"pins": 2424,
"sites": 4508,
"asm": 2082,
"bodies": 2235,
"distinct_bodies": 918,
"marked": 4505,
"pins": 2423,
"sites": 4505,
"unmarked": 0,
"what": "register pins + asm statements excluding GTE ops: the classes the phase drives to 0"
},
@@ -450,7 +450,7 @@
"$3": 199,
"$4": 507,
"$5": 387,
"$6": 63,
"$6": 62,
"$7": 27,
"$8": 25,
"$9": 22,
@@ -460,29 +460,29 @@
"v0": 2,
"v1": 3
},
"sites": 2424,
"sites": 2423,
"sp": 13,
"spelling": {
"__asm__": 2394,
"__asm__": 2393,
"asm": 30
},
"volatile_qualified": 0,
"zero": 70
},
"src_stamp": "16c906a24b01d57d",
"src_stamp": "2eae723786136464",
"tus": 4121,
"unclassified": 0,
"union_AD": {
"bodies": 5982,
"bodies": 5979,
"by_kind": {
"main": 161,
"md": 119,
"ov": 5530,
"ov": 5527,
"resident": 10,
"shared": 162
},
"copies_in_multi": 4871,
"distinct_bodies": 1232,
"distinct_bodies": 1229,
"multi_copy_classes": 121
},
"verbatim_excluded": {
+9 -9
View File
@@ -1,26 +1,26 @@
lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13)
coverage asm raw 22426 = live 15450 + macro-block 194 + comment/dead 6782
coverage register raw 11068 = live 2474 + macro-block 18 + comment/dead 8576
coverage asm raw 22423 = live 15447 + macro-block 194 + comment/dead 6782
coverage register raw 11067 = live 2473 + macro-block 18 + comment/dead 8576
coverage volatile raw 4387 = live 1699 + macro-block 82 + comment/dead 2606
coverage builtin raw 599 = live 445 + macro-block 0 + comment/dead 154
coverage attribute raw 76 = live 76 + macro-block 0 + comment/dead 0
class sites in-bodies file-scope bodies distinct TUs marked unmarked kinds
A pins 2424 2424 0 1520 681 1091 2424 0 {'pin': 2424}
B asm 11365 11352 13 4720 779 1428 2574 8791 {'barrier': 331, 'keepalive': 346, 'instruction': 232, 'gte-lever': 456, 'launder': 706, 'gte': 6328, 'gte-unsigned': 271, 'asm-body': 13, 'verbatim-body': 2682}
A pins 2423 2423 0 1519 680 1091 2423 0 {'pin': 2423}
B asm 11363 11350 13 4718 777 1428 2572 8791 {'launder': 705, 'barrier': 330, 'gte-lever': 456, 'keepalive': 346, 'gte-unsigned': 271, 'gte': 6328, 'instruction': 232, 'asm-body': 13, 'verbatim-body': 2682}
C volatile 1590 1438 152 496 95 610 14 1576 {'cast': 1378, 'decl-body': 58, 'decl-file': 152, 'param': 2}
D register 50 50 0 47 47 6 0 50 {'register': 50}
E asm-label 7787 1364 6423 1096 157 2090 0 7787 {'asm-label': 7787}
F builtin 445 445 0 428 27 302 0 445 {'builtin': 445}
G attribute 76 1 75 1 1 40 0 76 {'attribute': 76}
UNION A–D: 5,982 bodies · 1,232 distinct (addresses normalized) · 121 multi-copy classes holding 4,871 bodies · by kind {'ov': 5530, 'main': 161, 'md': 119, 'shared': 162, 'resident': 10}
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 4,508 sites in 2,238 bodies (921 distinct) · marked !FAKE 4,508 · UNMARKED 0
UNION A–D: 5,979 bodies · 1,229 distinct (addresses normalized) · 121 multi-copy classes holding 4,871 bodies · by kind {'ov': 5527, 'md': 119, 'main': 161, 'shared': 162, 'resident': 10}
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 4,505 sites in 2,235 bodies (918 distinct) · marked !FAKE 4,505 · UNMARKED 0
orphan !FAKE markers (no pin/asm site on the line nor below): 0
marked ordinary-C fakes kept by Drew's S104 ruling (a) (`do { } while (0)`, dead initialisers; NOT levers): 33
GTE levers (clobbers beyond the canonical macro's): 456 sites (94 via a variant macro, 362 direct) · marked 456 · UNMARKED 0 · unsigned GTE statements 271
per-TU asm macro definitions outside the GTE header: 314 {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1} (GTE variants 64)
pins: 2,424 · $0 70 · $sp 13 · with initializer 221 · volatile-qualified 0 · bare-name 15 · spellings {'__asm__': 2394, 'asm': 30}
pins: 2,423 · $0 70 · $sp 13 · with initializer 221 · volatile-qualified 0 · bare-name 15 · spellings {'__asm__': 2393, 'asm': 30}
whole-body asm routines in C shells, manifest PERMANENT (hand asm, NOT levers): 22 routines · 2,682 sites (2,660 private copies + 22 shared headers); asm-bodies NOT permanent (levers): 13 site(s) ['func_8001E378:DECOMPILE-NOW', 'func_80020F34:DECOMPILE-NOW', 'func_800249F0:DECOMPILE-NOW', 'func_80025CBC:DECOMPILE-NOW', 'func_80026514:UNCERTAIN', 'func_800268D0:UNCERTAIN', 'func_80027058:DECOMPILE-NOW', 'func_80027200:DECOMPILE-NOW', 'func_800CBA44:DECOMPILE-NOW', 'func_8017D810:DECOMPILE-NOW', 'func_8017E26C:UNCERTAIN', 'func_80184440:DECOMPILE-NOW', 'func_801A3BCC:DECOMPILE-NOW']
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 329, 'barrier/via-macro': 2, 'gte/direct': 200, 'gte/via-macro': 6128, 'gte-lever/direct': 362, 'gte-lever/via-macro': 94, 'gte-unsigned/direct': 271, 'instruction/direct': 210, 'instruction/via-macro': 22, 'keepalive/direct': 346, 'launder/direct': 664, 'launder/via-macro': 42, 'verbatim-body/direct': 2682}
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 328, 'barrier/via-macro': 2, 'gte/direct': 200, 'gte/via-macro': 6128, 'gte-lever/direct': 362, 'gte-lever/via-macro': 94, 'gte-unsigned/direct': 271, 'instruction/direct': 210, 'instruction/via-macro': 22, 'keepalive/direct': 346, 'launder/direct': 663, 'launder/via-macro': 42, 'verbatim-body/direct': 2682}
instruction mnemonics: {'la': 142, 'addu': 23, 'addiu': 22, 'RTP_SND': 22, '.section': 7, 'lui': 4, 'lh': 3, 'and': 2, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
gte mnemonics: {'gte_ldv0': 757, 'gte_stlvnl': 593, 'gte_stsxy': 447, 'gte_rtps': 437, 'gte_stflg': 415, 'gte_rtpt': 352, 'gte_SetRotMatrix': 249, 'gte_stsxy3': 236, 'gte_SetTransMatrix': 229, 'gte_rtv0tr': 228, 'gte_ldv3c': 184, 'gte_ldv3': 177, 'gte_stsv': 161, 'lwc2': 159, 'gte_stsz4': 149, 'gte_stsz3': 147, 'gte_stszotz': 134, 'gte_dpcl': 134, 'gte_stsxy3_f3': 111, 'gte_nclip': 108, 'gte_stopz': 108, 'gte_stsxy3c': 108, 'gte_stclmv': 108, 'gte_stsxy3_ft3': 79, 'gte_rtir': 75, 'gte_ldclmv': 72, 'gte_avsz4': 56, 'gte_stotz': 52, 'gte_ldrgb': 30, 'gte_nccs': 25}
asm-bearing macro definitions: 314 (20 names, 3 with >1 text) kinds {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1}
@@ -29,4 +29,4 @@ lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclas
src/shared/ov/func_80178004.h pins got 8 expected 26 N-A
ov_SC03_006 func_80184034 bare-name pins got 0 expected 3 N-A
engine_prelude.h asm sites (a macro definition only) got 0 expected 0 OK
elapsed 35.3 s
elapsed 37.3 s