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feat(decomp): worker gate — +1 fns x0 propagated (fleet 99.1%)

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Drew T
2026-08-30 21:51:18 -06:00
parent 6425a810f3
commit ccc7f64401
3 changed files with 55 additions and 2 deletions
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config/overlays.mk
+1
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@@ -2527,6 +2527,7 @@ build/src/ov_SC03_110/ov_SC03_110_jr_8015AE2C.o: JTBL_PADS := 0,4 # §8e pads (
build/src/ov_SC03_110/ov_SC03_110_jr_8016AB6C.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
build/src/ov_SC03_110/ov_SC03_110_jr_80178D40.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x178
build/src/ov_SC03_110/ov_SC03_110_jr_8017D898.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
build/src/ov_SC03_110/ov_SC03_110_jr_8017FBC8.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
build/src/ov_SC03_110/ov_SC03_110_o0c.o: JTBL_PADS := 0,4,4,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x38,+0xa8,+0x118
ov_SC03_110_CHECK_SHA := config/check.ov_SC03_110.sha
ov_SC03_110_SYMBOLS := config/symbols.ov_SC03_110.txt
config/splat.ov_SC03_110.yaml
+1 -1
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@@ -165,7 +165,7 @@ segments:
- [0x78b10, .rodata, ov_SC03_110_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x78b24, .rodata, ov_SC03_110_jr_8017D898] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x78b58, .rodata, ov_SC03_110_jr_8017FBC8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0x78b6c, data, tail18]
- [0x78c38, data, tail18]
- [0x7A384, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
- [0x7A387] # EOF marker = the 0.4.dec byte length
# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
src/ov_SC03_110/ov_SC03_110_jr_8017FBC8.c
+53 -1
View File
@@ -3039,7 +3039,59 @@ TAIL:
}
INCLUDE_ASM("asm/ov_SC03_110/nonmatchings/ov_SC03_110_jr_8017FBC8", func_80180270);
extern void func_80180AF0();
extern void func_80131E00(s32 a0, s32 a1);
extern void func_8012E9C0(s32 a0);
extern void func_8012B14C(s32 a0, s32 a1);
extern void func_8012A828(s32 *a0, s32 a1);
extern void func_80180D2C();
extern s32 D_8019BFAC;
extern u8 D_8019C0D4[];
extern u8 D_8019C0E4[];
extern u8 D_8019C0F4[];
void func_80180270(s32 param_1) {
s16 hp;
s16 val;
s32 arg1;
func_80180AF0();
switch (*(u16 *)(param_1 + 0x5E)) {
case 1:
hp = *(s16 *)(param_1 + 0x60);
if (hp != 0) {
goto DEFAULT_CASE;
}
val = *(u16 *)(param_1 + 0x76) - hp;
*(u16 *)(param_1 + 0x76) = val;
if (val <= 0) {
func_80131E00(param_1, 0xE);
}
func_8012E9C0(param_1);
*(s16 *)(param_1 + 0x34) = 3;
return;
case 8:
arg1 = (s32)&D_8019C0E4;
break;
case 5:
case 29:
case 32:
arg1 = (s32)&D_8019C0F4;
break;
case 50:
DEFAULT_CASE:
default:
arg1 = (s32)&D_8019C0D4;
break;
}
func_8012B14C(param_1, arg1);
((void (*)(s32, void *))func_8012A828)((s32)param_1, &D_8019BFAC);
*(s16 *)(param_1 + 0x34) = 0;
((void (*)(s32))func_80180D2C)(param_1);
}
INCLUDE_ASM("asm/ov_SC03_110/nonmatchings/ov_SC03_110_jr_8017FBC8", func_8018035C);