src(phase-36): T3 batch t3_tus1 — | R22 check-all: 218 passed, 0 failed of 218 | census: lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13) (delever_cycle)

2026-09-26 13:33:34 -04:00 · 2026-09-09 02:50:39 -06:00
parent 39e3e1851f
commit cd24727ddb
29 changed files with 1936 additions and 810 deletions
@@ -0,0 +1,476 @@
+clean: removed build/, expected/, and the regenerated splat tree (asm/, assets/, undefined_*_auto.txt).
+disc-extract: up to date — extracted/retail/ matches the committed manifest (sha1 e5c6019249dec3c71bb2cf40658a78439dddb037)
+splat 0.41.0 (powered by spimdisasm 1.41.0)
+
+  0%|          | 0/1096 [00:00<?, ?it/s]
+Loading symbols (symbols.us):   0%|          | 0/1096 [00:00<?, ?it/s]
+Loading symbols (symbols.us): 100%|██████████| 1096/1096 [00:00<00:00, 150962.44it/s]
+
+  0%|          | 0/47 [00:00<?, ?it/s]
+Loading symbols (symbols.us.ram):   0%|          | 0/47 [00:00<?, ?it/s]
+Loading symbols (symbols.us.ram): 100%|██████████| 47/47 [00:00<00:00, 463840.68it/s]
+
+  0%|          | 0/2 [00:00<?, ?it/s]
+Scanning header:   0%|          | 0/2 [00:00<?, ?it/s]
+Scanning main:   0%|          | 0/2 [00:00<?, ?it/s]  
+Rodata segment '800' may belong to the text segment '800'
+    Based on the usage from the function LzssDecodeSector to the symbol jtbl_80072A38
+
+The rodata segment '800' has jumptables that are not aligned properly file-wise, indicating one or more likely file split.
+File split suggestions for this segment will follow in config yaml format:
+      - [0x6324C, .rodata]
+      - [0x63388, .rodata]
+      - [0x633FC, .rodata]
+
+
+Rodata segment '800_b' may belong to the text segment '800_b'
+    Based on the usage from the function func_8002B0B4 to the symbol jtbl_80072E44
+
+Rodata segment '800_b_2' may belong to the text segment '800_b_2'
+    Based on the usage from the function func_8002DC68 to the symbol jtbl_80072F3C
+
+The rodata segment '800_b_2' has jumptables that are not aligned properly file-wise, indicating one or more likely file split.
+File split suggestions for this segment will follow in config yaml format:
+      - [0x63920, .rodata]
+
+
+Rodata segment '800_c' may belong to the text segment '800_c'
+    Based on the usage from the function func_80035270 to the symbol jtbl_800732A0
+
+Scanning main: 100%|██████████| 2/2 [00:01<00:00,  1.44it/s]
+Scanning main: 100%|██████████| 2/2 [00:01<00:00,  1.44it/s]
+
+  0%|          | 0/2 [00:00<?, ?it/s]
+Splitting header:   0%|          | 0/2 [00:00<?, ?it/s]
+Splitting main:   0%|          | 0/2 [00:00<?, ?it/s]  
+Splitting main: 100%|██████████| 2/2 [00:01<00:00,  1.49it/s]
+Splitting main: 100%|██████████| 2/2 [00:01<00:00,  1.49it/s]
+
+  0%|          | 0/2 [00:00<?, ?it/s]
+Linker script header:   0%|          | 0/2 [00:00<?, ?it/s]
+Linker script main:   0%|          | 0/2 [00:00<?, ?it/s]  
+Linker script main: 100%|██████████| 2/2 [00:00<00:00, 88.72it/s]
+Split 340 KB (82.28%) in defined segments
+              header:     2 KB (0.50%) 1 split, 0 cached
+                   c:   338 KB (81.78%) 85 split, 0 cached
+             unknown:      0 B (0.00%) from unknown bin files
+ld_interleave --order: .main island = 8 pieces [53198.data.o, 800.o, 63470.data.o, 800_b.o, 800_b_2.o, 63940.data.o, 800_c.o, 63C4C.data.o]; pre=0 text=85 empties=166 bss=85
+[ OK ] ov_SC05_000
+[ OK ] resident
+[ OK ] ov_SC06_000
+[ OK ] ov_SC01_000
+[ OK ] ov_SC04_000
+[ OK ] ov_SC01_006
+[ OK ] ov_SC03_002
+[ OK ] ov_SC01_005
+[ OK ] ov_SC02_003
+[ OK ] ov_SC01_077
+[ OK ] ov_SC03_001
+[ OK ] ov_SC04_018
+[ OK ] ov_SC02_000
+[ OK ] ov_SC04_019
+[ OK ] ov_SC01_004
+[ OK ] ov_SC03_006
+[ OK ] ov_SC01_001
+[ OK ] ov_SC01_008
+[ OK ] ov_SC01_074
+[ OK ] ov_SC07_000
+[ OK ] ov_SC02_004
+[ OK ] ov_SC02_015
+[ OK ] ov_SC01_080
+[ OK ] ov_SC02_021
+[ OK ] ov_SC01_084
+[ OK ] ov_SC02_016
+[ OK ] ov_SC01_009
+[ OK ] ov_SC02_005
+[ OK ] ov_SC02_039
+[ OK ] ov_SC02_026
+[ OK ] ov_SC02_031
+[ OK ] ov_SC02_011
+[ OK ] ov_SC03_003
+[ OK ] ov_SC02_028
+[ OK ] ov_SC02_017
+[ OK ] ov_SC02_027
+[ OK ] ov_SC02_035
+[ OK ] ov_SC02_041
+[ OK ] ov_SC03_012
+[ OK ] ov_SC03_010
+[ OK ] ov_SC03_011
+[ OK ] ov_SC03_023
+[ OK ] ov_SC03_013
+[ OK ] ov_SC03_007
+[ OK ] ov_SC03_024
+[ OK ] ov_SC03_014
+[ OK ] ov_SC03_092
+[ OK ] ov_SC03_031
+[ OK ] ov_SC03_089
+[ OK ] ov_SC03_090
+[ OK ] ov_SC03_029
+[ OK ] ov_SC03_015
+[ OK ] ov_SC03_091
+[ OK ] ov_SC03_028
+[ OK ] ov_SC03_095
+[ OK ] ov_SC03_030
+[ OK ] ov_SC03_096
+[ OK ] ov_SC03_093
+[ OK ] ov_SC03_094
+[ OK ] ov_SC03_097
+[ OK ] ov_SC03_098
+[ OK ] ov_SC03_101
+[ OK ] ov_SC03_099
+[ OK ] ov_SC03_109
+[ OK ] ov_SC03_110
+[ OK ] ov_SC03_108
+[ OK ] ov_SC03_100
+[ OK ] ov_SC03_115
+[ OK ] ov_SC03_113
+[ OK ] ov_SC03_105
+[ OK ] ov_SC03_114
+[ OK ] ov_SC03_112
+[ OK ] ov_SC03_103
+[ OK ] ov_SC03_102
+[ OK ] ov_SC03_104
+[ OK ] ov_SC03_111
+[ OK ] ov_SC03_116
+[ OK ] ov_SC03_126
+[ OK ] ov_SC03_121
+[ OK ] ov_SC04_003
+[ OK ] ov_SC04_008
+[ OK ] ov_SC03_117
+[ OK ] ov_SC03_125
+[ OK ] ov_SC04_006
+[ OK ] ov_SC03_119
+[ OK ] ov_SC03_118
+[ OK ] ov_SC04_010
+[ OK ] ov_SC04_009
+[ OK ] ov_SC04_004
+[ OK ] ov_SC04_002
+[ OK ] ov_SC04_007
+[ OK ] ov_SC04_005
+[ OK ] ov_SC03_124
+[ OK ] ov_SC04_012
+[ OK ] ov_SC04_021
+[ OK ] ov_SC05_002
+[ OK ] ov_SC04_016
+[ OK ] ov_SC05_006
+[ OK ] ov_SC05_004
+[ OK ] ov_SC05_007
+[ OK ] ov_SC05_003
+[ OK ] ov_SC05_001
+[ OK ] ov_SC04_020
+[ OK ] ov_SC05_009
+[ OK ] ov_SC04_015
+[ OK ] ov_SC05_005
+[ OK ] ov_SC05_008
+[ OK ] ov_SC04_011
+[ OK ] ov_SC05_011
+[ OK ] ov_SC05_010
+[ OK ] ov_SC05_019
+[ OK ] ov_SC06_013
+[ OK ] ov_SC06_010
+[ OK ] ov_SC06_011
+[ OK ] ov_SC06_014
+[ OK ] ov_SC06_008
+[ OK ] ov_SC06_015
+[ OK ] ov_SC06_016
+[ OK ] ov_SC05_017
+[ OK ] ov_SC06_020
+[ OK ] ov_SC05_018
+[ OK ] ov_SC06_027
+[ OK ] ov_SC06_024
+[ OK ] ov_SC06_006
+[ OK ] ov_SC06_025
+[ OK ] ov_SC06_018
+[ OK ] ov_SC06_022
+[ OK ] md_MAIN_013
+[ OK ] ov_SC07_008
+[ OK ] md_MAIN_014
+[ OK ] ov_SC07_002
+[ OK ] md_MAIN_015
+[ OK ] ov_SC07_001
+[ OK ] md_MAIN_016
+[ OK ] md_MAIN_017
+[ OK ] md_MAIN_018
+[ OK ] md_MAIN_019
+[ OK ] md_MAIN_020
+[ OK ] md_MAIN_021
+[ OK ] ov_SC06_029
+[ OK ] md_MAIN_022
+[ OK ] md_MAIN_023
+[ OK ] md_MAIN_024
+[ OK ] ov_SC06_030
+[ OK ] md_MAIN_025
+[ OK ] ov_SC06_032
+[ OK ] md_MAIN_026
+[ OK ] md_MAIN_028
+[ OK ] md_MAIN_027
+[ OK ] ov_SC06_033
+[ OK ] md_MAIN_030
+[ OK ] md_MAIN_029
+[ OK ] ov_SC07_009
+[ OK ] md_MAIN_031
+[ OK ] md_MAIN_033
+[ OK ] md_MAIN_032
+[ OK ] md_MAIN_035
+[ OK ] ov_MAIN_012
+[ OK ] md_MAIN_034
+[ OK ] md_MAIN_037
+[ OK ] ov_SC07_011
+[ OK ] md_MAIN_036
+[ OK ] md_MAIN_039
+[ OK ] md_MAIN_040
+[ OK ] md_MAIN_038
+[ OK ] md_MAIN_042
+[ OK ] md_MAIN_041
+[ OK ] md_MAIN_043
+[ OK ] md_MAIN_044
+[ OK ] md_MAIN_045
+[ OK ] md_MAIN_008
+[ OK ] md_MAIN_046
+[ OK ] md_MAIN_047
+[ OK ] ov_SC07_010
+[ OK ] md_MAIN_001
+[ OK ] md_MAIN_011
+[ OK ] md_SC03_073
+[ OK ] md_SC03_078
+[ OK ] md_SC03_075
+[ OK ] ov_SC03_107
+[ OK ] md_SC03_074
+[ OK ] md_SC03_077
+[ OK ] md_SC03_132
+[ OK ] md_SC03_076
+[ OK ] md_SC03_079
+[ OK ] md_SC03_133
+[ OK ] md_SC03_137
+[ OK ] ov_SC07_007
+[ OK ] md_SC03_134
+[ OK ] md_SC03_136
+[ OK ] md_SC04_024
+[ OK ] md_SC03_135
+[ OK ] md_SC03_138
+[ OK ] md_MAIN_003
+[ OK ] md_SC04_025
+[ OK ] md_SC04_029
+[ OK ] md_SC04_026
+[ OK ] md_SC04_028
+[ OK ] md_SC04_027
+[ OK ] md_SC04_030
+[ OK ] md_SC05_023
+[ OK ] md_SC05_028
+[ OK ] md_SC05_025
+[ OK ] md_SC05_024
+[ OK ] md_MAIN_007
+[ OK ] md_SC05_027
+[ OK ] md_SC05_026
+[ OK ] md_MAIN_009
+[ OK ] md_SC03_053
+[ OK ] md_SC05_029
+[ OK ] md_SC03_056
+[ OK ] md_SC03_054
+[ OK ] ov_SC02_037
+[ OK ] md_SC02_009
+[ OK ] ov_SC07_006
+[ OK ] md_SC07_004
+[ OK ] md_SC07_003
+extract-all: 217 extracted, 0 failed of 217 (+ main, serial)
+[ OK ] resident
+[ OK ] ov_SC05_000
+[ OK ] ov_SC01_000
+[ OK ] ov_SC04_000
+[ OK ] ov_SC01_005
+[ OK ] ov_SC01_001
+[ OK ] ov_SC01_006
+[ OK ] ov_SC03_002
+[ OK ] ov_SC03_006
+[ OK ] ov_SC06_000
+[ OK ] ov_SC01_077
+[ OK ] ov_SC04_018
+[ OK ] ov_SC03_001
+[ OK ] ov_SC04_019
+[ OK ] ov_SC02_000
+[ OK ] ov_SC02_003
+[ OK ] ov_SC07_000
+[ OK ] ov_SC01_004
+[ OK ] ov_SC01_074
+[ OK ] ov_SC01_008
+[ OK ] ov_SC01_080
+[ OK ] ov_SC02_004
+[ OK ] ov_SC01_009
+[ OK ] ov_SC02_015
+[ OK ] ov_SC01_084
+[ OK ] ov_SC02_016
+[ OK ] ov_SC02_021
+[ OK ] ov_SC02_026
+[ OK ] ov_SC02_017
+[ OK ] ov_SC02_011
+[ OK ] ov_SC02_005
+[ OK ] ov_SC02_031
+[ OK ] ov_SC02_039
+[ OK ] ov_SC02_041
+[ OK ] ov_SC03_003
+[ OK ] ov_SC02_027
+[ OK ] ov_SC02_028
+[ OK ] ov_SC02_035
+[ OK ] ov_SC03_010
+[ OK ] ov_SC03_012
+[ OK ] ov_SC03_007
+[ OK ] ov_SC03_011
+[ OK ] ov_SC03_023
+[ OK ] ov_SC03_013
+[ OK ] ov_SC03_014
+[ OK ] ov_SC03_015
+[ OK ] ov_SC03_031
+[ OK ] ov_SC03_024
+[ OK ] ov_SC03_030
+[ OK ] ov_SC03_029
+[ OK ] ov_SC03_089
+[ OK ] ov_SC03_090
+[ OK ] ov_SC03_028
+[ OK ] ov_SC03_092
+[ OK ] ov_SC03_093
+[ OK ] ov_SC03_095
+[ OK ] ov_SC03_094
+[ OK ] ov_SC03_096
+[ OK ] ov_SC03_091
+[ OK ] main
+[ OK ] ov_SC03_097
+[ OK ] ov_SC03_098
+[ OK ] ov_SC03_099
+[ OK ] ov_SC03_101
+[ OK ] ov_SC03_100
+[ OK ] ov_SC03_102
+[ OK ] ov_SC03_108
+[ OK ] ov_SC03_103
+[ OK ] ov_SC03_109
+[ OK ] ov_SC03_110
+[ OK ] ov_SC03_104
+[ OK ] ov_SC03_111
+[ OK ] ov_SC03_113
+[ OK ] ov_SC03_105
+[ OK ] ov_SC03_112
+[ OK ] ov_SC03_114
+[ OK ] ov_SC03_115
+[ OK ] ov_SC03_116
+[ OK ] ov_SC03_117
+[ OK ] ov_SC03_121
+[ OK ] ov_SC03_126
+[ OK ] ov_SC03_125
+[ OK ] ov_SC03_118
+[ OK ] ov_SC03_119
+[ OK ] ov_SC04_003
+[ OK ] ov_SC04_006
+[ OK ] ov_SC04_004
+[ OK ] ov_SC04_002
+[ OK ] ov_SC04_005
+[ OK ] ov_SC04_008
+[ OK ] ov_SC03_124
+[ OK ] ov_SC04_007
+[ OK ] ov_SC04_009
+[ OK ] ov_SC04_010
+[ OK ] ov_SC04_012
+[ OK ] ov_SC04_016
+[ OK ] ov_SC04_021
+[ OK ] ov_SC04_015
+[ OK ] ov_SC04_020
+[ OK ] ov_SC04_011
+[ OK ] ov_SC05_001
+[ OK ] ov_SC05_002
+[ OK ] ov_SC05_004
+[ OK ] ov_SC05_006
+[ OK ] ov_SC05_005
+[ OK ] ov_SC05_003
+[ OK ] ov_SC05_009
+[ OK ] ov_SC05_007
+[ OK ] ov_SC05_008
+[ OK ] ov_SC05_010
+[ OK ] ov_SC05_011
+[ OK ] ov_SC05_019
+[ OK ] ov_SC05_018
+[ OK ] ov_SC06_008
+[ OK ] ov_SC06_010
+[ OK ] ov_SC06_006
+[ OK ] ov_SC06_013
+[ OK ] ov_SC06_011
+[ OK ] ov_SC06_015
+[ OK ] ov_SC06_014
+[ OK ] ov_SC05_017
+[ OK ] ov_SC06_016
+[ OK ] ov_SC06_020
+[ OK ] ov_SC06_022
+[ OK ] ov_SC06_018
+[ OK ] ov_SC06_024
+[ OK ] ov_SC06_025
+[ OK ] ov_SC06_027
+[ OK ] md_MAIN_013
+[ OK ] md_MAIN_014
+[ OK ] ov_SC07_008
+[ OK ] ov_SC07_009
+[ OK ] md_MAIN_015
+[ OK ] ov_SC07_001
+[ OK ] md_MAIN_016
+[ OK ] ov_SC06_030
+[ OK ] md_MAIN_017
+[ OK ] md_MAIN_018
+[ OK ] md_MAIN_019
+[ OK ] md_MAIN_020
+[ OK ] ov_SC07_002
+[ OK ] md_MAIN_021
+[ OK ] md_MAIN_024
+[ OK ] md_MAIN_023
+[ OK ] md_MAIN_022
+[ OK ] md_MAIN_025
+[ OK ] md_MAIN_026
+[ OK ] md_MAIN_027
+[ OK ] md_MAIN_029
+[ OK ] md_MAIN_028
+[ OK ] md_MAIN_030
+[ OK ] ov_SC07_010
+[ OK ] ov_SC06_029
+[ OK ] md_MAIN_031
+[ OK ] md_MAIN_033
+[ OK ] md_MAIN_032
+[ OK ] md_MAIN_035
+[ OK ] md_MAIN_034
+[ OK ] md_MAIN_036
+[ OK ] md_MAIN_037
+[ OK ] md_MAIN_038
+[ OK ] ov_SC07_007
+[ OK ] md_MAIN_039
+[ OK ] md_MAIN_042
+[ OK ] md_MAIN_040
+[ OK ] md_MAIN_043
+[ OK ] md_MAIN_041
+[ OK ] md_MAIN_045
+[ OK ] md_MAIN_044
+[ OK ] md_MAIN_046
+[ OK ] md_MAIN_047
+[ OK ] md_MAIN_001
+[ OK ] ov_SC07_006
+[ OK ] md_MAIN_008
+[ OK ] ov_MAIN_012
+[ OK ] md_MAIN_011
+[ OK ] md_SC03_073
+[ OK ] md_SC03_074
+[ OK ] md_SC03_075
+[ OK ] ov_SC06_033
+[ OK ] ov_SC06_032
+[ OK ] md_SC03_078
+[ OK ] md_SC03_079
+[ OK ] ov_SC07_011
+[ OK ] md_SC03_132
+[ OK ] md_SC03_133
+[ OK ] md_SC03_077
+[ OK ] md_SC03_134
+[ OK ] md_SC03_076
+[ OK ] md_SC07_003
+[ OK ] md_SC03_137
+[ OK ] md_SC03_138
+[ OK ] md_SC04_024
+[ OK ] md_SC04_026
+[ OK ] md_SC04_025
+[ OK ] md_SC03_136
+[ OK ] md_SC03_135
+[ OK ] md_MAIN_003
+[ OK ] md_SC04_029
+[ OK ] md_SC04_030
+[ OK ] md_SC04_028
@@ -24,6 +24,7 @@
   "gte_stsv": 145,
   "gte_stsxy": 361,
   "gte_stsxy3": 191,
+   "gte_stsxy3_f3": 61,
   "gte_stsxy3c": 94,
   "gte_stsz3": 123,
   "gte_stsz4": 126,
@@ -31,14 +32,13 @@
   "lhu": 70,
   "lw": 80,
   "lwc2": 435,
-   "mfc2": 61,
   "swc2": 449
  },
  "instruction_mnemonics": {
   ".section": 7,
   "RTP_SND": 22,
   "addiu": 24,
-   "addu": 1103,
+   "addu": 1100,
   "and": 2,
   "andi": 1,
   "la": 145,
@@ -55,14 +55,14 @@
  },
  "kinds": {
   "asm-body/direct": 13,
-   "barrier/direct": 5833,
+   "barrier/direct": 5824,
   "barrier/via-macro": 2,
   "gte/direct": 1140,
   "gte/via-macro": 5751,
-   "instruction/direct": 1835,
+   "instruction/direct": 1832,
   "instruction/via-macro": 22,
-   "keepalive/direct": 2576,
-   "launder/direct": 4793,
+   "keepalive/direct": 2571,
+   "launder/direct": 4790,
   "launder/via-macro": 440,
   "verbatim-body/direct": 2682
  }
@@ -70,52 +70,52 @@
 "binaries": 218,
 "classes": {
  "A": {
-   "bodies": 13279,
-   "distinct_bodies": 1833,
+   "bodies": 13239,
+   "distinct_bodies": 1850,
   "file_scope": 0,
-   "in_bodies": 37720,
+   "in_bodies": 37541,
   "kinds": {
-    "pin": 37720
+    "pin": 37541
   },
-   "marked": 0,
-   "sites": 37720,
+   "marked": 196,
+   "sites": 37541,
   "tus": 2676,
-   "unmarked": 37720
+   "unmarked": 37345
  },
  "B": {
-   "bodies": 10750,
-   "distinct_bodies": 1188,
+   "bodies": 10742,
+   "distinct_bodies": 1209,
   "file_scope": 13,
-   "in_bodies": 25074,
+   "in_bodies": 25054,
   "kinds": {
    "asm-body": 13,
-    "barrier": 5835,
+    "barrier": 5826,
    "gte": 6891,
-    "instruction": 1857,
-    "keepalive": 2576,
-    "launder": 5233,
+    "instruction": 1854,
+    "keepalive": 2571,
+    "launder": 5230,
    "verbatim-body": 2682
   },
-   "marked": 0,
-   "sites": 25087,
-   "tus": 2453,
-   "unmarked": 25087
+   "marked": 118,
+   "sites": 25067,
+   "tus": 2452,
+   "unmarked": 24949
  },
  "C": {
-   "bodies": 815,
+   "bodies": 810,
   "distinct_bodies": 145,
-   "file_scope": 517,
-   "in_bodies": 2621,
+   "file_scope": 516,
+   "in_bodies": 2606,
   "kinds": {
-    "cast": 2385,
-    "decl-body": 234,
-    "decl-file": 517,
+    "cast": 2373,
+    "decl-body": 231,
+    "decl-file": 516,
    "param": 2
   },
-   "marked": 0,
-   "sites": 3138,
-   "tus": 880,
-   "unmarked": 3138
+   "marked": 1,
+   "sites": 3122,
+   "tus": 879,
+   "unmarked": 3121
  },
  "D": {
   "bodies": 69,
@@ -145,7 +145,7 @@
  },
  "F": {
   "bodies": 428,
-   "distinct_bodies": 27,
+   "distinct_bodies": 29,
   "file_scope": 0,
   "in_bodies": 445,
   "kinds": {
@@ -199,9 +199,9 @@
 "coverage": {
  "asm": {
   "comment_dead": 6792,
-   "live": 66415,
+   "live": 66216,
   "macro_block": 7189,
-   "raw": 80396
+   "raw": 80197
  },
  "attribute": {
   "comment_dead": 0,
@@ -217,30 +217,30 @@
  },
  "register": {
   "comment_dead": 8584,
-   "live": 37806,
+   "live": 37627,
   "macro_block": 18,
-   "raw": 46408
+   "raw": 46229
  },
  "volatile": {
   "comment_dead": 2607,
-   "live": 4883,
+   "live": 4865,
   "macro_block": 6510,
-   "raw": 14000
+   "raw": 13982
  }
 },
 "coverage_ok": true,
- "elapsed_s": 36.0,
+ "elapsed_s": 29.8,
 "generated": "2026-09-09",
- "head": "89676f096",
+ "head": "39e3e1851",
 "headers": 3181,
 "levers_AB": {
-  "asm": 15514,
-  "bodies": 15679,
-  "distinct_bodies": 2227,
-  "marked": 0,
-  "pins": 37720,
-  "sites": 53234,
-  "unmarked": 53234,
+  "asm": 15494,
+  "bodies": 15638,
+  "distinct_bodies": 2246,
+  "marked": 312,
+  "pins": 37541,
+  "sites": 53035,
+  "unmarked": 52723,
  "what": "register pins + asm statements excluding GTE ops: the classes the phase drives to 0"
 },
 "macro_definitions": {
@@ -382,36 +382,36 @@
  "total": 9540
 },
 "pins": {
-  "bare_name": 76,
-  "init": 5140,
+  "bare_name": 75,
+  "init": 5110,
  "registers": {
   "$0": 1337,
   "$1": 2,
-   "$10": 297,
-   "$11": 423,
+   "$10": 296,
+   "$11": 420,
   "$12": 420,
-   "$13": 288,
-   "$14": 283,
+   "$13": 286,
+   "$14": 282,
   "$15": 8,
-   "$16": 3877,
-   "$17": 3791,
-   "$18": 2221,
-   "$19": 1346,
-   "$2": 5708,
-   "$20": 879,
-   "$21": 834,
-   "$22": 288,
-   "$23": 419,
+   "$16": 3848,
+   "$17": 3768,
+   "$18": 2203,
+   "$19": 1338,
+   "$2": 5688,
+   "$20": 873,
+   "$21": 831,
+   "$22": 285,
+   "$23": 417,
   "$24": 4,
-   "$25": 137,
+   "$25": 136,
   "$29": 13,
-   "$3": 3536,
-   "$4": 4245,
-   "$5": 2985,
-   "$6": 1405,
-   "$7": 1042,
-   "$8": 1007,
-   "$9": 849,
+   "$3": 3518,
+   "$4": 4233,
+   "$5": 2981,
+   "$6": 1396,
+   "$7": 1040,
+   "$8": 1000,
+   "$9": 843,
   "3": 1,
   "4": 1,
   "5": 2,
@@ -420,35 +420,35 @@
   "9": 4,
   "a0": 17,
   "a1": 3,
-   "s0": 4,
+   "s0": 3,
   "s1": 1,
   "s2": 1,
   "v0": 16,
   "v1": 15
  },
-  "sites": 37720,
+  "sites": 37541,
  "sp": 13,
  "spelling": {
-   "__asm__": 37510,
-   "asm": 210
+   "__asm__": 37334,
+   "asm": 207
  },
  "volatile_qualified": 136,
  "zero": 1337
 },
- "src_stamp": "8be8c2a58e0ebac7",
+ "src_stamp": "a81cbed40b82d65e",
 "tus": 4121,
 "unclassified": 0,
 "union_AD": {
-  "bodies": 19156,
+  "bodies": 19113,
  "by_kind": {
   "main": 204,
   "md": 213,
-   "ov": 18330,
+   "ov": 18287,
   "resident": 16,
   "shared": 393
  },
-  "copies_in_multi": 17107,
-  "distinct_bodies": 2537,
+  "copies_in_multi": 17044,
+  "distinct_bodies": 2557,
  "multi_copy_classes": 488
 },
 "verbatim_excluded": {
@@ -485,9 +485,9 @@
 },
 "volatile": {
  "kinds": {
-   "cast": 2385,
-   "decl-body": 234,
-   "decl-file": 517,
+   "cast": 2373,
+   "decl-body": 231,
+   "decl-file": 516,
   "param": 2
  }
 }
@@ -1,28 +1,28 @@
 lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13)
-  coverage asm       raw  80396 = live  66415 + macro-block  7189 + comment/dead  6792
-  coverage register  raw  46408 = live  37806 + macro-block    18 + comment/dead  8584
-  coverage volatile  raw  14000 = live   4883 + macro-block  6510 + comment/dead  2607
+  coverage asm       raw  80197 = live  66216 + macro-block  7189 + comment/dead  6792
+  coverage register  raw  46229 = live  37627 + macro-block    18 + comment/dead  8584
+  coverage volatile  raw  13982 = live   4865 + macro-block  6510 + comment/dead  2607
  coverage builtin   raw    599 = live    445 + macro-block     0 + comment/dead   154
  coverage attribute raw     76 = live     76 + macro-block     0 + comment/dead     0
  class  sites  in-bodies  file-scope  bodies  distinct  TUs  marked  unmarked   kinds
-  A pins        37720     37720          0   13279      1833  2676       0     37720   {'pin': 37720}
-  B asm         25087     25074         13   10750      1188  2453       0     25087   {'gte': 6891, 'barrier': 5835, 'instruction': 1857, 'launder': 5233, 'keepalive': 2576, 'asm-body': 13, 'verbatim-body': 2682}
-  C volatile     3138      2621        517     815       145   880       0      3138   {'decl-body': 234, 'decl-file': 517, 'cast': 2385, 'param': 2}
+  A pins        37541     37541          0   13239      1850  2676     196     37345   {'pin': 37541}
+  B asm         25067     25054         13   10742      1209  2452     118     24949   {'verbatim-body': 2682, 'barrier': 5826, 'launder': 5230, 'keepalive': 2571, 'instruction': 1854, 'gte': 6891, 'asm-body': 13}
+  C volatile     3122      2606        516     810       145   879       1      3121   {'cast': 2373, 'decl-file': 516, 'decl-body': 231, 'param': 2}
  D register       86        86          0      69        69    19       0        86   {'register': 86}
  E asm-label    7428      1005       6423     737       117  2080       0      7428   {'asm-label': 7428}
-  F builtin       445       445          0     428        27   302       0       445   {'builtin': 445}
+  F builtin       445       445          0     428        29   302       0       445   {'builtin': 445}
  G attribute      76         1         75       1         1    40       0        76   {'attribute': 76}
-  UNION A–D: 19,156 bodies · 2,537 distinct (addresses normalized) · 488 multi-copy classes holding 17,107 bodies · by kind {'ov': 18330, 'md': 213, 'shared': 393, 'main': 204, 'resident': 16}
-  THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 53,234 sites in 15,679 bodies (2,227 distinct) · marked !FAKE 0 · UNMARKED 53,234
-  pins: 37,720 · $0 1,337 · $sp 13 · with initializer 5,140 · volatile-qualified 136 · bare-name 76 · spellings {'__asm__': 37510, 'asm': 210}
+  UNION A–D: 19,113 bodies · 2,557 distinct (addresses normalized) · 488 multi-copy classes holding 17,044 bodies · by kind {'ov': 18287, 'main': 204, 'md': 213, 'shared': 393, 'resident': 16}
+  THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 53,035 sites in 15,638 bodies (2,246 distinct) · marked !FAKE 312 · UNMARKED 52,723
+  pins: 37,541 · $0 1,337 · $sp 13 · with initializer 5,110 · volatile-qualified 136 · bare-name 75 · spellings {'__asm__': 37334, 'asm': 207}
  whole-body asm routines in C shells, manifest PERMANENT (hand asm, NOT levers): 22 routines · 2,682 sites (2,660 private copies + 22 shared headers); asm-bodies NOT permanent (levers): 13 site(s) ['func_8001E378:DECOMPILE-NOW', 'func_80020F34:DECOMPILE-NOW', 'func_800249F0:DECOMPILE-NOW', 'func_80025CBC:DECOMPILE-NOW', 'func_80026514:UNCERTAIN', 'func_800268D0:UNCERTAIN', 'func_80027058:DECOMPILE-NOW', 'func_80027200:DECOMPILE-NOW', 'func_800CBA44:DECOMPILE-NOW', 'func_8017D810:DECOMPILE-NOW', 'func_8017E26C:UNCERTAIN', 'func_80184440:DECOMPILE-NOW', 'func_801A3BCC:DECOMPILE-NOW']
-  asm kinds: {'asm-body/direct': 13, 'barrier/direct': 5833, 'barrier/via-macro': 2, 'gte/direct': 1140, 'gte/via-macro': 5751, 'instruction/direct': 1835, 'instruction/via-macro': 22, 'keepalive/direct': 2576, 'launder/direct': 4793, 'launder/via-macro': 440, 'verbatim-body/direct': 2682}
-  instruction mnemonics: {'addu': 1103, 'move': 407, 'la': 145, 'lh': 134, 'addiu': 24, 'RTP_SND': 22, '.section': 7, 'lui': 5, 'and': 2, 'andi': 1, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
-  gte mnemonics: {'gte_ldv0': 653, 'swc2': 449, 'lwc2': 435, 'gte_stsxy': 361, 'gte_rtps': 356, 'gte_stflg': 319, 'gte_rtpt': 289, 'gte_stsxy3': 191, 'gte_ldrgb': 162, 'gte_ldv3c': 159, 'gte_rt': 155, 'gte_SetRotMatrix': 150, 'gte_SetTransMatrix': 145, 'gte_stsv': 145, 'gte_stlvnl': 143, 'gte_ldv3': 140, 'gte_ldIR0z': 133, 'gte_ldIRGB': 133, 'gte_dpcl': 133, 'gte_stORGB': 133, 'gte_mvmva0': 131, 'gte_stsz4': 126, 'gte_stsz3': 123, 'gte_stszotz': 113, 'gte_nclip': 96, 'gte_stopz': 96, 'gte_stsxy3c': 94, 'lw': 80, 'lhu': 70, 'mfc2': 61}
+  asm kinds: {'asm-body/direct': 13, 'barrier/direct': 5824, 'barrier/via-macro': 2, 'gte/direct': 1140, 'gte/via-macro': 5751, 'instruction/direct': 1832, 'instruction/via-macro': 22, 'keepalive/direct': 2571, 'launder/direct': 4790, 'launder/via-macro': 440, 'verbatim-body/direct': 2682}
+  instruction mnemonics: {'addu': 1100, 'move': 407, 'la': 145, 'lh': 134, 'addiu': 24, 'RTP_SND': 22, '.section': 7, 'lui': 5, 'and': 2, 'andi': 1, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
+  gte mnemonics: {'gte_ldv0': 653, 'swc2': 449, 'lwc2': 435, 'gte_stsxy': 361, 'gte_rtps': 356, 'gte_stflg': 319, 'gte_rtpt': 289, 'gte_stsxy3': 191, 'gte_ldrgb': 162, 'gte_ldv3c': 159, 'gte_rt': 155, 'gte_SetRotMatrix': 150, 'gte_SetTransMatrix': 145, 'gte_stsv': 145, 'gte_stlvnl': 143, 'gte_ldv3': 140, 'gte_ldIR0z': 133, 'gte_ldIRGB': 133, 'gte_dpcl': 133, 'gte_stORGB': 133, 'gte_mvmva0': 131, 'gte_stsz4': 126, 'gte_stsz3': 123, 'gte_stszotz': 113, 'gte_nclip': 96, 'gte_stopz': 96, 'gte_stsxy3c': 94, 'lw': 80, 'lhu': 70, 'gte_stsxy3_f3': 61}
  asm-bearing macro definitions: 9,540 (338 names, 32 with >1 text) kinds {'gte': 9102, 'launder': 428, 'instruction': 9, 'barrier': 1}
  controls (R39):
    src/800.c func_800226C0 pins                         got 45     expected 45  OK
    src/shared/ov/func_80178004.h pins                   got 26     expected 26  OK
    ov_SC03_006 func_80184034 bare-name pins             got 3      expected 3  OK
    engine_prelude.h asm sites (a macro definition only) got 0      expected 0  OK
-  elapsed 36.0 s
+  elapsed 29.8 s
@@ -0,0 +1,133 @@
+02:46:26 apply t3_tus1: 18 files, control src/ov_SC04_011/ov_SC04_011_jr_80140608.c IDENTICAL (0.13 s), calibration 39e3e1851, census 8be8c2a58e0ebac7
+02:46:26 apply t3_tus1: phase 1 (exemplar files) 18, phase 2 (copies replay) 0
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_80135A4C.c:func_80135A4C A=DIFFERS B: removed 0 needed 3 compiles 4
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013CF68 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_80135D20.c:func_80135D20 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_8013F350.c:func_8013F350 A=DIFFERS B: removed 1 needed 3 compiles 5
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_80135888.c:func_80135888 A=DIFFERS B: removed 2 needed 5 compiles 8
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013D178 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_801380E0.c:func_801397B0 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_80154C24.c:func_80156044 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_8013F350.c:func_8013FAF8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:27   src/ov_SC04_011/ov_SC04_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_801380E0.c:func_80139BE0 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013D53C A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:28   src/ov_SC04_011/ov_SC04_011_after.c:func_80145934 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_80154C24.c:func_80157D20 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_80135D20.c:func_80135EB0 A=DIFFERS B: removed 0 needed 6 compiles 7
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_801734BC.c:func_80175AB8 A=DIFFERS B: removed 0 needed 5 compiles 6
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013D8FC A=DIFFERS B: removed 3 needed 1 compiles 5
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_8015D01C A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_8012C890 A=DIFFERS B: removed 2 needed 1 compiles 4
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_801734BC.c:func_80175DA8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_80178D40.c:func_8017A3D8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:29   src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.c:func_8016B234 A=DIFFERS B: removed 3 needed 2 compiles 6
+02:46:29   src/ov_SC04_011/ov_SC04_011_after.c:func_80145A2C A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:29   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:func_80140958 A=DIFFERS B: removed 7 needed 4 compiles 12
+02:46:29   src/ov_SC04_011/ov_SC04_011.c:func_8012956C A=DIFFERS B: removed 6 needed 4 compiles 11
+02:46:29   src/ov_SC04_011/ov_SC04_011_jr_80135D20.c:func_80136334 A=DIFFERS B: removed 4 needed 4 compiles 9
+02:46:29   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:func_80141874 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:29   src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.c:func_8017D000 A=DIFFERS B: removed 2 needed 3 compiles 6
+02:46:29   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_8015D738 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:30   src/ov_SC04_011/ov_SC04_011_jr_801380E0.c:func_8013B274 A=DIFFERS B: removed 4 needed 8 compiles 13
+02:46:30   src/ov_SC04_011/ov_SC04_011_jr_80135D20.c:func_801365B8 A=DIFFERS B: removed 2 needed 2 compiles 5
+02:46:30   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8017D494 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:30   src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.c:func_8016C188 A=DIFFERS B: removed 2 needed 1 compiles 4
+02:46:30   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:func_801424E4 A=DIFFERS B: removed 2 needed 2 compiles 5
+02:46:30   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_8012E364 A=DIFFERS B: removed 1 needed 3 compiles 5
+02:46:30   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_8015FBE0 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:31   src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:31   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:func_80142EC0 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:31   src/ov_SC04_011/ov_SC04_011_jr_80135D20.c:func_80136824 A=DIFFERS B: removed 4 needed 6 compiles 11
+02:46:31   src/ov_SC04_011/ov_SC04_011_jr_801734BC.c:func_80176734 A=DIFFERS B: removed 1 needed 11 compiles 13
+02:46:31   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:func_8014305C A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:31   src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:31   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:func_801431E8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:32   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8017E558 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:32   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013D9B0 A=DIFFERS B: removed 9 needed 25 compiles 35
+02:46:32   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:func_80143D28 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:32   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80161E08 A=DIFFERS B: removed 0 needed 3 compiles 4
+02:46:32   src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.c:func_8016DF5C A=DIFFERS B: removed 1 needed 2 compiles 4
+02:46:32   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013DD68 A=DIFFERS B: removed 1 needed 2 compiles 4
+02:46:32   src/ov_SC04_011/ov_SC04_011_after.c:func_80148AFC A=DIFFERS B: removed 1 needed 6 compiles 8
+02:46:32   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013E5E8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:33   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:<file-scope> A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:33   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013EB7C A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:33   src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:33   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80130D48 A=DIFFERS B: removed 5 needed 4 compiles 10
+02:46:34   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_801621CC A=DIFFERS B: removed 2 needed 1 compiles 4
+02:46:34   src/ov_SC04_011/ov_SC04_011_after.c:func_80148D44 A=DIFFERS B: removed 2 needed 2 compiles 5
+02:46:35   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8017F8E0 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:35   src/ov_SC04_011/ov_SC04_011_jr_801734BC.c:func_80177B5C A=DIFFERS B: removed 8 needed 15 compiles 24
+02:46:36   src/ov_SC04_011/ov_SC04_011_jr_801734BC.c:func_80178840 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:36   src/ov_SC04_011/ov_SC04_011_after.c:func_80148E54 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:36   src/ov_SC04_011/ov_SC04_011_jr_801734BC.c:func_80178970 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:36   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80162438 A=DIFFERS B: removed 2 needed 3 compiles 6
+02:46:37   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_801627E8 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:37   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80133784 A=DIFFERS B: removed 3 needed 7 compiles 11
+02:46:37   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80180B24 A=DIFFERS B: removed 0 needed 3 compiles 4
+02:46:38   src/ov_SC04_011/ov_SC04_011_after.c:func_8014D820 A=DIFFERS B: removed 1 needed 2 compiles 4
+02:46:38   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80163EC8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:39   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80133AB0 A=DIFFERS B: removed 0 needed 4 compiles 5
+02:46:39   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80133CD4 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:39   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80164BDC A=DIFFERS B: removed 2 needed 1 compiles 4
+02:46:40   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018214C A=DIFFERS B: removed 2 needed 2 compiles 5
+02:46:41   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_801345F8 A=DIFFERS B: removed 0 needed 3 compiles 4
+02:46:41   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_801651B8 A=DIFFERS B: removed 2 needed 2 compiles 5
+02:46:42   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80166690 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:42   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80182BBC A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:44   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80134A74 A=DIFFERS B: removed 3 needed 5 compiles 9
+02:46:45   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80134C20 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:45   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80166F58 A=DIFFERS B: removed 2 needed 5 compiles 8
+02:46:46   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80183058 A=DIFFERS B: removed 2 needed 4 compiles 7
+02:46:47   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80135004 A=DIFFERS B: removed 4 needed 4 compiles 9
+02:46:48   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018315C A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:49   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_801833D4 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:49   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80135168 A=DIFFERS B: removed 0 needed 5 compiles 6
+02:46:49   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_801670E4 A=DIFFERS B: removed 3 needed 7 compiles 11
+02:46:50   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80167AE0 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:50   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_801835B0 A=DIFFERS B: removed 0 needed 3 compiles 4
+02:46:51   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80168828 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:52   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_8016A290 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:53   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_801836D4 A=DIFFERS B: removed 2 needed 2 compiles 5
+02:46:54   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80183E20 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:58   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80183F10 A=DIFFERS B: removed 6 needed 1 compiles 8
+02:47:01   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018489C A=DIFFERS B: removed 1 needed 2 compiles 4
+02:47:04   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80184978 A=DIFFERS B: removed 0 needed 6 compiles 7
+02:47:06   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80184BAC A=DIFFERS B: removed 1 needed 1 compiles 3
+02:47:08   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80184DB8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:10   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185214 A=DIFFERS B: removed 2 needed 1 compiles 4
+02:47:15   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185648 A=DIFFERS B: removed 7 needed 2 compiles 10
+02:47:16   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185960 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:17   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80186020 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:18   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80186300 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:19   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_801863D4 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:22   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80186F44 A=DIFFERS B: removed 1 needed 2 compiles 4
+02:47:24   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_801873F8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:25   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80187B40 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:26   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80188A30 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:27   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80189D38 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:28   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018A8EC A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:30   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018B2F8 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:47:31   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018B744 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:35   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018BAC4 A=DIFFERS B: removed 5 needed 2 compiles 8
+02:47:37   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018C440 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:39   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018C94C A=DIFFERS B: removed 2 needed 1 compiles 4
+02:47:41   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018CA04 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:47:42   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018CAF0 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:47:44   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018CB68 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:47:45   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018CC24 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:47:47   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018CCB8 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:47:48   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018D3FC A=DIFFERS B: removed 1 needed 1 compiles 3
+02:47:53   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018DBF0 A=DIFFERS B: removed 2 needed 6 compiles 9
+02:47:54   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018DE0C A=DIFFERS B: removed 0 needed 2 compiles 3
+02:47:58   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018E428 A=DIFFERS B: removed 1 needed 4 compiles 6
+02:48:00   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018EBCC A=DIFFERS B: removed 0 needed 3 compiles 4
+02:48:01   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018EFB0 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:48:02   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018F02C A=DIFFERS B: removed 0 needed 2 compiles 3
+02:48:03   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018F734 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:48:05   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018F9C0 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:48:06   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018FD38 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:48:07 delever: batch t3_tus1 — 18 files (TUs; 18 drawable) · 176 bodies: 44 lever-free, 130 residue, 2 refused · sites removed 215 / needed 320 / refused 5 / deferred 0 · replays 0 (0 disagreed) · compiles 657 in 101 s wall · final 18/18 identical · written 18 files
@@ -0,0 +1,213 @@
+{
+ "label": "t3_tus1",
+ "generated": "2026-09-09 02:48",
+ "headers": false,
+ "batch": 300,
+ "only": [
+  "ov_SC04_011"
+ ],
+ "files": 18,
+ "drawable_files": 18,
+ "wall_s": 100.9,
+ "calib": {
+  "head": "39e3e1851",
+  "stamp": "b44c5a8a3423"
+ },
+ "bodies": 176,
+ "compiles": 657,
+ "sites_removed": 215,
+ "sites_needed": 320,
+ "sites_refused": 5,
+ "sites_deferred": 0,
+ "lever_free": 44,
+ "residue": 130,
+ "refused_bodies": 2,
+ "replays": 0,
+ "disagreed": 0,
+ "written": 18,
+ "seconds": 201.76245760917664,
+ "final_ok": 18,
+ "final_bad": 0,
+ "per_file": [
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_80140608.c",
+   "bodies": 11,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 16,
+   "needed": 14,
+   "refused": 0,
+   "compiles": 36
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c",
+   "bodies": 14,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 21,
+   "needed": 39,
+   "refused": 0,
+   "compiles": 72
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_80135888.c",
+   "bodies": 1,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 2,
+   "needed": 5,
+   "refused": 0,
+   "compiles": 9
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_80135A4C.c",
+   "bodies": 1,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 0,
+   "needed": 3,
+   "refused": 0,
+   "compiles": 5
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_80135D20.c",
+   "bodies": 5,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 11,
+   "needed": 19,
+   "refused": 0,
+   "compiles": 36
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c",
+   "bodies": 9,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 16,
+   "needed": 34,
+   "refused": 0,
+   "compiles": 57
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c",
+   "bodies": 17,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 19,
+   "needed": 33,
+   "refused": 0,
+   "compiles": 68
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_after.c",
+   "bodies": 11,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 10,
+   "needed": 14,
+   "refused": 0,
+   "compiles": 30
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_80154C24.c",
+   "bodies": 2,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 0,
+   "needed": 4,
+   "refused": 0,
+   "compiles": 7
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_801734BC.c",
+   "bodies": 6,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 10,
+   "needed": 34,
+   "refused": 0,
+   "compiles": 51
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_8013F350.c",
+   "bodies": 2,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 1,
+   "needed": 4,
+   "refused": 0,
+   "compiles": 8
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_801380E0.c",
+   "bodies": 3,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 5,
+   "needed": 10,
+   "refused": 0,
+   "compiles": 19
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.c",
+   "bodies": 9,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 10,
+   "needed": 8,
+   "refused": 0,
+   "compiles": 24
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011.c",
+   "bodies": 2,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 6,
+   "needed": 5,
+   "refused": 0,
+   "compiles": 14
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.c",
+   "bodies": 5,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 6,
+   "needed": 8,
+   "refused": 0,
+   "compiles": 16
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_801588CC.c",
+   "bodies": 1,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 1,
+   "needed": 0,
+   "refused": 0,
+   "compiles": 2
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_80178D40.c",
+   "bodies": 1,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 0,
+   "needed": 1,
+   "refused": 0,
+   "compiles": 3
+  },
+  {
+   "tu": "src/ov_SC04_011/ov_SC04_011_jr_8017D494.c",
+   "bodies": 76,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 81,
+   "needed": 85,
+   "refused": 5,
+   "compiles": 200
+  }
+ ]
+}
@@ -0,0 +1,5 @@
+delever_oracle --calibrate main ov_SC03_014 ov_SC03_015 ov_SC04_011: 177/177 objects byte-identical untouched; twin checks 32 (0 mismatch); positive control DIFFERS on build/src/800.o; 3.2 s — OK
+   main           85/85 identical, mean 0.121 s per object
+   ov_SC03_014    32/32 identical, mean 0.219 s per object
+   ov_SC03_015    32/32 identical, mean 0.197 s per object
+   ov_SC04_011    28/28 identical, mean 0.222 s per object
@@ -1,7 +1,7 @@
 {
- "head": "89676f096",
+ "head": "39e3e1851",
 "stamp": "b44c5a8a3423",
- "generated": "2026-09-09 02:38",
+ "generated": "2026-09-09 02:46",
 "aliases": [
  "main",
  "ov_SC03_014",
@@ -21,207 +21,207 @@
  "main": {
   "objects": 85,
   "identical": 85,
-   "seconds": 7.229000000000001,
-   "mean_s": 0.085
+   "seconds": 10.245000000000003,
+   "mean_s": 0.121
  },
  "ov_SC03_014": {
   "objects": 32,
   "identical": 32,
-   "seconds": 5.186000000000002,
-   "mean_s": 0.162
+   "seconds": 7.0180000000000025,
+   "mean_s": 0.219
  },
  "ov_SC03_015": {
   "objects": 32,
   "identical": 32,
-   "seconds": 4.574999999999999,
-   "mean_s": 0.143
+   "seconds": 6.296,
+   "mean_s": 0.197
  },
  "ov_SC04_011": {
   "objects": 28,
   "identical": 28,
-   "seconds": 3.9430000000000005,
-   "mean_s": 0.141
+   "seconds": 6.208,
+   "mean_s": 0.222
  }
 },
 "per_object_seconds": {
-  "build/src/800.o": 0.785,
-  "build/src/800_b.o": 0.072,
-  "build/src/800_b_2.o": 0.317,
-  "build/src/800_b_o0a.o": 0.077,
-  "build/src/800_c.o": 0.206,
-  "build/src/800b2.o": 0.075,
-  "build/src/apicard1.o": 0.087,
-  "build/src/apicard2.o": 0.074,
-  "build/src/apicard3.o": 0.092,
-  "build/src/apicard4.o": 0.075,
-  "build/src/apicard5.o": 0.096,
-  "build/src/apicard6.o": 0.071,
-  "build/src/apicard7.o": 0.083,
-  "build/src/boot.o": 0.113,
-  "build/src/gap.o": 0.093,
-  "build/src/libapi1.o": 0.092,
-  "build/src/libapi2.o": 0.064,
-  "build/src/libc2_1.o": 0.071,
-  "build/src/libc2_2.o": 0.063,
-  "build/src/libcd1.o": 0.081,
-  "build/src/libcd2.o": 0.07,
-  "build/src/libetc.o": 0.073,
-  "build/src/libgpu.o": 0.076,
-  "build/src/libgpu2.o": 0.088,
-  "build/src/libgs1.o": 0.066,
-  "build/src/libgs2.o": 0.066,
-  "build/src/libgs3.o": 0.063,
-  "build/src/libgs4.o": 0.066,
-  "build/src/libgs5.o": 0.063,
-  "build/src/libgs6.o": 0.088,
-  "build/src/libgs7.o": 0.072,
-  "build/src/libgs8.o": 0.063,
-  "build/src/libgte1.o": 0.061,
-  "build/src/libgte10.o": 0.06,
-  "build/src/libgte11.o": 0.067,
-  "build/src/libgte12.o": 0.062,
-  "build/src/libgte13.o": 0.066,
-  "build/src/libgte14.o": 0.068,
-  "build/src/libgte15.o": 0.061,
-  "build/src/libgte16.o": 0.064,
-  "build/src/libgte17.o": 0.064,
-  "build/src/libgte18.o": 0.065,
-  "build/src/libgte19.o": 0.065,
-  "build/src/libgte2.o": 0.063,
-  "build/src/libgte20.o": 0.063,
-  "build/src/libgte21.o": 0.071,
-  "build/src/libgte22.o": 0.068,
-  "build/src/libgte23.o": 0.057,
-  "build/src/libgte24.o": 0.069,
-  "build/src/libgte25.o": 0.062,
-  "build/src/libgte26.o": 0.071,
+  "build/src/800.o": 1.05,
+  "build/src/800_b.o": 0.105,
+  "build/src/800_b_2.o": 0.413,
+  "build/src/800_b_o0a.o": 0.104,
+  "build/src/800_c.o": 0.276,
+  "build/src/800b2.o": 0.122,
+  "build/src/apicard1.o": 0.129,
+  "build/src/apicard2.o": 0.082,
+  "build/src/apicard3.o": 0.126,
+  "build/src/apicard4.o": 0.136,
+  "build/src/apicard5.o": 0.088,
+  "build/src/apicard6.o": 0.098,
+  "build/src/apicard7.o": 0.11,
+  "build/src/boot.o": 0.133,
+  "build/src/gap.o": 0.113,
+  "build/src/libapi1.o": 0.115,
+  "build/src/libapi2.o": 0.073,
+  "build/src/libc2_1.o": 0.102,
+  "build/src/libc2_2.o": 0.116,
+  "build/src/libcd1.o": 0.108,
+  "build/src/libcd2.o": 0.158,
+  "build/src/libetc.o": 0.107,
+  "build/src/libgpu.o": 0.082,
+  "build/src/libgpu2.o": 0.104,
+  "build/src/libgs1.o": 0.091,
+  "build/src/libgs2.o": 0.077,
+  "build/src/libgs3.o": 0.088,
+  "build/src/libgs4.o": 0.094,
+  "build/src/libgs5.o": 0.089,
+  "build/src/libgs6.o": 0.099,
+  "build/src/libgs7.o": 0.094,
+  "build/src/libgs8.o": 0.123,
+  "build/src/libgte1.o": 0.113,
+  "build/src/libgte10.o": 0.083,
+  "build/src/libgte11.o": 0.085,
+  "build/src/libgte12.o": 0.109,
+  "build/src/libgte13.o": 0.098,
+  "build/src/libgte14.o": 0.114,
+  "build/src/libgte15.o": 0.1,
+  "build/src/libgte16.o": 0.104,
+  "build/src/libgte17.o": 0.088,
+  "build/src/libgte18.o": 0.088,
+  "build/src/libgte19.o": 0.094,
+  "build/src/libgte2.o": 0.139,
+  "build/src/libgte20.o": 0.089,
+  "build/src/libgte21.o": 0.103,
+  "build/src/libgte22.o": 0.152,
+  "build/src/libgte23.o": 0.136,
+  "build/src/libgte24.o": 0.109,
+  "build/src/libgte25.o": 0.077,
+  "build/src/libgte26.o": 0.074,
  "build/src/libgte27.o": 0.068,
-  "build/src/libgte28.o": 0.071,
-  "build/src/libgte29.o": 0.068,
-  "build/src/libgte3.o": 0.067,
-  "build/src/libgte30.o": 0.081,
-  "build/src/libgte4.o": 0.07,
-  "build/src/libgte5.o": 0.07,
-  "build/src/libgte6.o": 0.07,
-  "build/src/libgte7.o": 0.064,
-  "build/src/libgte8.o": 0.062,
-  "build/src/libgte9.o": 0.074,
-  "build/src/libmcrd1.o": 0.088,
-  "build/src/libmcrd2.o": 0.064,
-  "build/src/libpad1.o": 0.076,
-  "build/src/libpad2.o": 0.078,
-  "build/src/sgap.o": 0.07,
-  "build/src/sgap_2.o": 0.067,
-  "build/src/sgap_3.o": 0.065,
-  "build/src/sgap_4.o": 0.076,
-  "build/src/sgap_5.o": 0.07,
-  "build/src/sgap_6.o": 0.071,
-  "build/src/sgap_8.o": 0.081,
-  "build/src/snd1.o": 0.079,
-  "build/src/snd10.o": 0.076,
-  "build/src/snd11.o": 0.076,
-  "build/src/snd12.o": 0.071,
-  "build/src/snd2.o": 0.074,
-  "build/src/snd3.o": 0.071,
-  "build/src/snd4.o": 0.073,
-  "build/src/snd5.o": 0.071,
-  "build/src/snd6.o": 0.083,
-  "build/src/snd7.o": 0.072,
-  "build/src/snd8.o": 0.067,
-  "build/src/snd9.o": 0.077,
-  "build/src/ov_SC03_014/ov_SC03_014.o": 0.157,
-  "build/src/ov_SC03_014/ov_SC03_014_after.o": 0.569,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.432,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.086,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.068,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.131,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.188,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.133,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.102,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.085,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.213,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.098,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.197,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.112,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.105,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.079,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.121,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.474,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.28,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.119,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.208,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.075,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.107,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.082,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.179,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.199,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.057,
-  "build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.28,
-  "build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.064,
-  "build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.061,
-  "build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.056,
-  "build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.069,
-  "build/src/ov_SC03_015/ov_SC03_015.o": 0.127,
-  "build/src/ov_SC03_015/ov_SC03_015_after.o": 0.516,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.388,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.051,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.055,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.117,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.153,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.118,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.074,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.063,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.183,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.071,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.158,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.085,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.061,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.071,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.092,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.446,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.269,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.096,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.21,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.056,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.097,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.067,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.165,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.21,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.052,
-  "build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.284,
-  "build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.06,
-  "build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.06,
-  "build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.05,
-  "build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.07,
-  "build/src/ov_SC04_011/ov_SC04_011.o": 0.12,
-  "build/src/ov_SC04_011/ov_SC04_011_after.o": 0.428,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.348,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.054,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.056,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.115,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.153,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.112,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.072,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.059,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.18,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.073,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.162,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.087,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.066,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.075,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.096,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.357,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.222,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_80171B4C.o": 0.097,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.168,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.057,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.088,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.06,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.095,
-  "build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.444,
-  "build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.046,
-  "build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.053
+  "build/src/libgte28.o": 0.102,
+  "build/src/libgte29.o": 0.097,
+  "build/src/libgte3.o": 0.092,
+  "build/src/libgte30.o": 0.112,
+  "build/src/libgte4.o": 0.129,
+  "build/src/libgte5.o": 0.09,
+  "build/src/libgte6.o": 0.083,
+  "build/src/libgte7.o": 0.08,
+  "build/src/libgte8.o": 0.08,
+  "build/src/libgte9.o": 0.086,
+  "build/src/libmcrd1.o": 0.093,
+  "build/src/libmcrd2.o": 0.074,
+  "build/src/libpad1.o": 0.103,
+  "build/src/libpad2.o": 0.138,
+  "build/src/sgap.o": 0.082,
+  "build/src/sgap_2.o": 0.086,
+  "build/src/sgap_3.o": 0.128,
+  "build/src/sgap_4.o": 0.155,
+  "build/src/sgap_5.o": 0.088,
+  "build/src/sgap_6.o": 0.075,
+  "build/src/sgap_8.o": 0.099,
+  "build/src/snd1.o": 0.124,
+  "build/src/snd10.o": 0.141,
+  "build/src/snd11.o": 0.106,
+  "build/src/snd12.o": 0.085,
+  "build/src/snd2.o": 0.082,
+  "build/src/snd3.o": 0.081,
+  "build/src/snd4.o": 0.091,
+  "build/src/snd5.o": 0.123,
+  "build/src/snd6.o": 0.168,
+  "build/src/snd7.o": 0.127,
+  "build/src/snd8.o": 0.086,
+  "build/src/snd9.o": 0.131,
+  "build/src/ov_SC03_014/ov_SC03_014.o": 0.229,
+  "build/src/ov_SC03_014/ov_SC03_014_after.o": 0.731,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.634,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.121,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.088,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.212,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.199,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.207,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.151,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.108,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.236,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.093,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.24,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.19,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.091,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.087,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.157,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.67,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.331,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.139,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.283,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.099,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.187,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.129,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.222,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.287,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.089,
+  "build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.431,
+  "build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.092,
+  "build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.089,
+  "build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.088,
+  "build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.108,
+  "build/src/ov_SC03_015/ov_SC03_015.o": 0.166,
+  "build/src/ov_SC03_015/ov_SC03_015_after.o": 0.77,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.561,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.065,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.07,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.137,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.197,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.147,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.098,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.086,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.222,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.094,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.214,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.105,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.099,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.084,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.121,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.723,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.325,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.122,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.266,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.082,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.135,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.109,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.23,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.261,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.077,
+  "build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.394,
+  "build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.081,
+  "build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.082,
+  "build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.079,
+  "build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.094,
+  "build/src/ov_SC04_011/ov_SC04_011.o": 0.201,
+  "build/src/ov_SC04_011/ov_SC04_011_after.o": 0.621,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.555,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.068,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.071,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.155,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.209,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.217,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.142,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.124,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.237,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.1,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.306,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.245,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.126,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.114,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.142,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.555,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.322,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_80171B4C.o": 0.159,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.26,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.089,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.146,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.082,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.151,
+  "build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.552,
+  "build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.134,
+  "build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.125
 },
 "ok": true,
- "seconds": 2.4
+ "seconds": 3.2
 }
@@ -0,0 +1 @@
+log: t3_tus1 lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13)
@@ -0,0 +1,136 @@
+delever --plan: 18 of 18 drawable files · 176 bodies (109 in multi-copy classes) · 540 removable sites · 0 deferred asm-bodies
+02:46:26 apply t3_tus1: 18 files, control src/ov_SC04_011/ov_SC04_011_jr_80140608.c IDENTICAL (0.13 s), calibration 39e3e1851, census 8be8c2a58e0ebac7
+02:46:26 apply t3_tus1: phase 1 (exemplar files) 18, phase 2 (copies replay) 0
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_80135A4C.c:func_80135A4C A=DIFFERS B: removed 0 needed 3 compiles 4
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013CF68 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_80135D20.c:func_80135D20 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_8013F350.c:func_8013F350 A=DIFFERS B: removed 1 needed 3 compiles 5
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_80135888.c:func_80135888 A=DIFFERS B: removed 2 needed 5 compiles 8
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013D178 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_801380E0.c:func_801397B0 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_80154C24.c:func_80156044 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_8013F350.c:func_8013FAF8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:27   src/ov_SC04_011/ov_SC04_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_801380E0.c:func_80139BE0 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:27   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013D53C A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:28   src/ov_SC04_011/ov_SC04_011_after.c:func_80145934 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_80154C24.c:func_80157D20 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_80135D20.c:func_80135EB0 A=DIFFERS B: removed 0 needed 6 compiles 7
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_801734BC.c:func_80175AB8 A=DIFFERS B: removed 0 needed 5 compiles 6
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013D8FC A=DIFFERS B: removed 3 needed 1 compiles 5
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_8015D01C A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_8012C890 A=DIFFERS B: removed 2 needed 1 compiles 4
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_801734BC.c:func_80175DA8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:28   src/ov_SC04_011/ov_SC04_011_jr_80178D40.c:func_8017A3D8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:29   src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.c:func_8016B234 A=DIFFERS B: removed 3 needed 2 compiles 6
+02:46:29   src/ov_SC04_011/ov_SC04_011_after.c:func_80145A2C A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:29   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:func_80140958 A=DIFFERS B: removed 7 needed 4 compiles 12
+02:46:29   src/ov_SC04_011/ov_SC04_011.c:func_8012956C A=DIFFERS B: removed 6 needed 4 compiles 11
+02:46:29   src/ov_SC04_011/ov_SC04_011_jr_80135D20.c:func_80136334 A=DIFFERS B: removed 4 needed 4 compiles 9
+02:46:29   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:func_80141874 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:29   src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.c:func_8017D000 A=DIFFERS B: removed 2 needed 3 compiles 6
+02:46:29   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_8015D738 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:30   src/ov_SC04_011/ov_SC04_011_jr_801380E0.c:func_8013B274 A=DIFFERS B: removed 4 needed 8 compiles 13
+02:46:30   src/ov_SC04_011/ov_SC04_011_jr_80135D20.c:func_801365B8 A=DIFFERS B: removed 2 needed 2 compiles 5
+02:46:30   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8017D494 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:30   src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.c:func_8016C188 A=DIFFERS B: removed 2 needed 1 compiles 4
+02:46:30   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:func_801424E4 A=DIFFERS B: removed 2 needed 2 compiles 5
+02:46:30   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_8012E364 A=DIFFERS B: removed 1 needed 3 compiles 5
+02:46:30   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_8015FBE0 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:31   src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:31   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:func_80142EC0 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:31   src/ov_SC04_011/ov_SC04_011_jr_80135D20.c:func_80136824 A=DIFFERS B: removed 4 needed 6 compiles 11
+02:46:31   src/ov_SC04_011/ov_SC04_011_jr_801734BC.c:func_80176734 A=DIFFERS B: removed 1 needed 11 compiles 13
+02:46:31   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:func_8014305C A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:31   src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:31   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:func_801431E8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:32   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8017E558 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:32   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013D9B0 A=DIFFERS B: removed 9 needed 25 compiles 35
+02:46:32   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:func_80143D28 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:32   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80161E08 A=DIFFERS B: removed 0 needed 3 compiles 4
+02:46:32   src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.c:func_8016DF5C A=DIFFERS B: removed 1 needed 2 compiles 4
+02:46:32   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013DD68 A=DIFFERS B: removed 1 needed 2 compiles 4
+02:46:32   src/ov_SC04_011/ov_SC04_011_after.c:func_80148AFC A=DIFFERS B: removed 1 needed 6 compiles 8
+02:46:32   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013E5E8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:33   src/ov_SC04_011/ov_SC04_011_jr_80140608.c:<file-scope> A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:33   src/ov_SC04_011/ov_SC04_011_jr_8013C98C.c:func_8013EB7C A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:33   src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:33   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80130D48 A=DIFFERS B: removed 5 needed 4 compiles 10
+02:46:34   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_801621CC A=DIFFERS B: removed 2 needed 1 compiles 4
+02:46:34   src/ov_SC04_011/ov_SC04_011_after.c:func_80148D44 A=DIFFERS B: removed 2 needed 2 compiles 5
+02:46:35   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8017F8E0 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:35   src/ov_SC04_011/ov_SC04_011_jr_801734BC.c:func_80177B5C A=DIFFERS B: removed 8 needed 15 compiles 24
+02:46:36   src/ov_SC04_011/ov_SC04_011_jr_801734BC.c:func_80178840 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:36   src/ov_SC04_011/ov_SC04_011_after.c:func_80148E54 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:36   src/ov_SC04_011/ov_SC04_011_jr_801734BC.c:func_80178970 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:36   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80162438 A=DIFFERS B: removed 2 needed 3 compiles 6
+02:46:37   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_801627E8 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:37   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80133784 A=DIFFERS B: removed 3 needed 7 compiles 11
+02:46:37   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80180B24 A=DIFFERS B: removed 0 needed 3 compiles 4
+02:46:38   src/ov_SC04_011/ov_SC04_011_after.c:func_8014D820 A=DIFFERS B: removed 1 needed 2 compiles 4
+02:46:38   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80163EC8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:39   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80133AB0 A=DIFFERS B: removed 0 needed 4 compiles 5
+02:46:39   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80133CD4 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:39   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80164BDC A=DIFFERS B: removed 2 needed 1 compiles 4
+02:46:40   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018214C A=DIFFERS B: removed 2 needed 2 compiles 5
+02:46:41   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_801345F8 A=DIFFERS B: removed 0 needed 3 compiles 4
+02:46:41   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_801651B8 A=DIFFERS B: removed 2 needed 2 compiles 5
+02:46:42   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80166690 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:42   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80182BBC A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:44   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80134A74 A=DIFFERS B: removed 3 needed 5 compiles 9
+02:46:45   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80134C20 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:45   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80166F58 A=DIFFERS B: removed 2 needed 5 compiles 8
+02:46:46   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80183058 A=DIFFERS B: removed 2 needed 4 compiles 7
+02:46:47   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80135004 A=DIFFERS B: removed 4 needed 4 compiles 9
+02:46:48   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018315C A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:49   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_801833D4 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:49   src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.c:func_80135168 A=DIFFERS B: removed 0 needed 5 compiles 6
+02:46:49   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_801670E4 A=DIFFERS B: removed 3 needed 7 compiles 11
+02:46:50   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80167AE0 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:50   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_801835B0 A=DIFFERS B: removed 0 needed 3 compiles 4
+02:46:51   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_80168828 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:46:52   src/ov_SC04_011/ov_SC04_011_jr_8015C32C.c:func_8016A290 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:46:53   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_801836D4 A=DIFFERS B: removed 2 needed 2 compiles 5
+02:46:54   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80183E20 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:46:58   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80183F10 A=DIFFERS B: removed 6 needed 1 compiles 8
+02:47:01   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018489C A=DIFFERS B: removed 1 needed 2 compiles 4
+02:47:04   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80184978 A=DIFFERS B: removed 0 needed 6 compiles 7
+02:47:06   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80184BAC A=DIFFERS B: removed 1 needed 1 compiles 3
+02:47:08   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80184DB8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:10   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185214 A=DIFFERS B: removed 2 needed 1 compiles 4
+02:47:15   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185648 A=DIFFERS B: removed 7 needed 2 compiles 10
+02:47:16   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185960 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:17   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80186020 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:18   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80186300 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:19   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_801863D4 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:22   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80186F44 A=DIFFERS B: removed 1 needed 2 compiles 4
+02:47:24   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_801873F8 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:25   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80187B40 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:26   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80188A30 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:27   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80189D38 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:28   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018A8EC A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:30   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018B2F8 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:47:31   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018B744 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:35   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018BAC4 A=DIFFERS B: removed 5 needed 2 compiles 8
+02:47:37   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018C440 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:47:39   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018C94C A=DIFFERS B: removed 2 needed 1 compiles 4
+02:47:41   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018CA04 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:47:42   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018CAF0 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:47:44   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018CB68 A=DIFFERS B: removed 0 needed 2 compiles 3
+02:47:45   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018CC24 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:47:47   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018CCB8 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:47:48   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018D3FC A=DIFFERS B: removed 1 needed 1 compiles 3
+02:47:53   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018DBF0 A=DIFFERS B: removed 2 needed 6 compiles 9
+02:47:54   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018DE0C A=DIFFERS B: removed 0 needed 2 compiles 3
+02:47:58   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018E428 A=DIFFERS B: removed 1 needed 4 compiles 6
+02:48:00   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018EBCC A=DIFFERS B: removed 0 needed 3 compiles 4
+02:48:01   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018EFB0 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:48:02   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018F02C A=DIFFERS B: removed 0 needed 2 compiles 3
+02:48:03   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018F734 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:48:05   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018F9C0 A=DIFFERS B: removed 1 needed 1 compiles 3
+02:48:06   src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_8018FD38 A=DIFFERS B: removed 0 needed 1 compiles 2
+02:48:07 delever: batch t3_tus1 — 18 files (TUs; 18 drawable) · 176 bodies: 44 lever-free, 130 residue, 2 refused · sites removed 215 / needed 320 / refused 5 / deferred 0 · replays 0 (0 disagreed) · compiles 657 in 101 s wall · final 18/18 identical · written 18 files
+t3_tus1 wall=113.84 s
+exit=0
@@ -293,7 +293,7 @@ accumulate here as the phase produces them.**
  134); headers: 371 drawable files. **Next in this task:** the end-to-end batch `LABEL_PREFIX=t3_ TASK=T3 tools/delever_cycle.sh 1 1 300 tus
  ov_SC04_011` (apply → R22 → census → log → commit), then the checkpoint refresh.

-## 🛑 SESSION CHECKPOINT — S98 in progress (2026-09-09): T0 ☑ T1 ☑ T1b ☑ T2 ☑ — T3 tools BUILT + selftest OK + calibration OK (this commit); NEXT = the T3 end-to-end batch on ov_SC04_011 via `tools/delever_cycle.sh` (then the checkpoint refresh, then T4). The §0–§4 below are the S97-close text and stay valid except: `tools/delever.py` now has the campaign commands (see the T3 log entry) and T7 needs Drew's direct approval (decisions).
+## 🛑 SESSION CHECKPOINT — S98 in progress (2026-09-09): T0 ☑ T1 ☑ T1b ☑ T2 ☑ — T3 tools BUILT + selftest OK + calibration OK (this commit); NEXT = the T3 end-to-end batch on ov_SC04_011 via `tools/delever_cycle.sh` (then the checkpoint refresh, then T4). The §0–§4 below are the S97-close text and stay valid except: `tools/delever.py` now has the campaign commands (see the T3 log entry) and T7 needs Drew's direct approval (decisions). | last batch `t3_tus1` on 39e3e1851: lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13)

 ### 0. How to use this block
 A fresh session (S98) reads CLAUDE.md's load order, replays this block verbatim, asks Drew for `/effort max` (T3's design is Max; its
@@ -356,6 +356,8 @@ differently per binary — greedy on all includers; `SHB` may be used by an incl
 never `git checkout` to restore (R102); `tool_census --check` refuses an UNTRACKED tool — `git add` a new tool before `make kit-corpus`;
 `make report BINARY=main` rewrites `docs/story-timeline.md` too — commit it with the rest.

+- **2026-09-09 — T3 batch `t3_tus1`** (`.run/P36/delever/run_t3_tus1.log`, `batch_t3_tus1.json`): `` → R22 (`.run/P36/baseline/r22_t3_tus1.log`) **`check-all: 218 passed, 0 failed of 218`** (`wall=117.23 s`) → census `lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13)`.
+
 ## Approved plan (verbatim, gate 1 — 2026-09-09)

 # Phase 36 — levers off: every compiler-forcing construct out of the matched C (v2.1.0 → v2.2.0) — gate-1 plan
@@ -219,7 +219,7 @@ void func_801287B8(void) {
    {
        /* D_801F1640 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
         * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801F1640;
+        register volatile s32 *p __asm__("$4") = &D_801F1640;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
        if (*p == 0) {
            func_8013BC7C();
        }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
    extern u8 D_801F1620;
    extern u8 D_800AF630[];
    extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
    Ent_956C *base;
    s32 i;
    s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    u32 t6;
    s32 code;

    sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
        return;
    }
    base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
    i = 0;
    do {
        s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                      D_801ED9C8[idx], D_801ED9C9[idx], D_801ED9CA[idx]);
        goto next;
    do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
        arg0 = D_801F1620;
        s = base->f40;
        temp_a3 = base->f38;
@@ -34,7 +34,7 @@ void func_80145934(void) {
        p = &D_80192964;
        /* §5a cross-jump barrier — LOAD-BEARING: keeps this D_80192964 load from being
         * tail-merged with the v>=0x384 D_80192964 load below (emits zero machine code). */
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
    } else if (v >= 0x5DC) {
        p = &D_801928D4;
    } else if (v >= 0x578) {
@@ -84,7 +84,7 @@ void func_80145A2C(void) {
        p = &D_801929F4;
        /* §5a cross-jump barrier — LOAD-BEARING: keeps this D_801929F4 load from being
         * tail-merged with the v>=0x384 D_801929F4 load below (emits zero machine code). */
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
    } else if (v >= 0x5DC) {
        p = &D_801928D4;
    } else if (v >= 0x578) {
@@ -639,11 +639,11 @@ int func_80148AFC(void *a0) {
    extern ActorFn D_80191F24[];
    s32 p = (s32)a0;
    s32 iVar5 = *(s32 *)(p + 0x20);
-    register s32 tmp __asm__("$5") = (ratan2(*(s32 *)(D_801151D4 + 0x44) - *(s32 *)(D_801151D4 + 0x50),
+    register s32 tmp __asm__("$5") = (ratan2(*(s32 *)(D_801151D4 + 0x44) - *(s32 *)(D_801151D4 + 0x50),  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
                        *(s32 *)(D_801151D4 + 0x48) - *(s32 *)(D_801151D4 + 0x3C)) - 0x400) & 0xFFF;
    s32 sVar3;
    u8 bVar1;
-    __asm__("" : "=r"(tmp) : "0"(tmp));
+    __asm__("" : "=r"(tmp) : "0"(tmp));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
    sVar3 = tmp;
    bVar1 = *(u8 *)(p + 0xA9);

@@ -653,15 +653,15 @@ int func_80148AFC(void *a0) {
    case 0x53:
    case 0x73:
        {
-            register u32 bb __asm__("$3");
-            register s32 c80 __asm__("$2") = 0x80;
-            register s32 lo __asm__("$4");
-            register s32 hi __asm__("$2");
+            register u32 bb __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
+            register s32 c80 __asm__("$2") = 0x80;  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+            s32 lo;
+            register s32 hi __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
            bb = *(u16 *)(p + 0xAE);
            lo = bb & 0xFF;
            if (lo != c80 || (hi = bb >> 8) != 0x80) {
                s32 sVar4;
-                __asm__ __volatile__("" : : : "memory");
+                __asm__ __volatile__("" : : : "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
                sVar4 = ratan2((*(u16 *)(p + 0xAE) & 0xFF) - 0x80, 0x80 - (*(u16 *)(p + 0xAE) >> 8));
                *(u16 *)(iVar5 + 0x12) = (sVar3 + sVar4) & 0xFFF;
                return 1;
@@ -716,8 +716,8 @@ s32 func_80148D44(void) {
    extern u16 D_80126C02;
    extern u16 D_80126C06;
    extern s32 D_80191F64[];
-    register s32 ang __asm__("$16");
-    register s32 a __asm__("$4");
+    s32 ang;
+    register s32 a __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 p;
    s32 res;
    s32 d;
@@ -726,7 +726,7 @@ s32 func_80148D44(void) {
    a = (ratan2(*(s32 *)(p + 0x44) - *(s32 *)(p + 0x50),
                  *(s32 *)(p + 0x48) - *(s32 *)(p + 0x3c)) - 0x400) & 0xFFF;
    d = (s32)D_80126C01;
-    __asm__ __volatile__("" : : "r"(a));
+    __asm__ __volatile__("" : : "r"(a));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B t3_tus1)
    ang = a;
    if (d == 0x53) {
        goto final;
@@ -749,7 +749,6 @@ final:
        if (((e & 0xff) == 0x80) && ((e >> 8) == (e & 0xff))) {
            return -1;
        }
-        __asm__ __volatile__("" : : : "memory");
        res = (ang + ratan2((D_80126C06 & 0xff) - 0x80, 0x80 - (D_80126C06 >> 8))) & 0xFFF;
    }
    return res;
@@ -765,10 +764,10 @@ s32 func_80148E54(s32 arg0) {

    extern s32 D_801151D4;
    extern s16 (*D_80191FA4[])();
-    register s32 tmp __asm__("$4") = (ratan2(*(s32 *)(D_801151D4 + 0x44) - *(s32 *)(D_801151D4 + 0x50),
+    register s32 tmp __asm__("$4") = (ratan2(*(s32 *)(D_801151D4 + 0x44) - *(s32 *)(D_801151D4 + 0x50),  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
                                             *(s32 *)(D_801151D4 + 0x48) - *(s32 *)(D_801151D4 + 0x3C)) - 0x400) & 0xFFF;
    s32 ang;
-    __asm__("" : "=r"(tmp) : "0"(tmp));
+    __asm__("" : "=r"(tmp) : "0"(tmp));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
    ang = tmp;

    switch (*(u8 *)(arg0 + 0xA9)) {
@@ -949,7 +948,7 @@ extern s16 currentLocationId;

 s32 func_80149FB0(s32 a0) {
    s32 *p = &D_80191FE4[0];
-    register s32 v __asm__("$3") = *p;
+    s32 v = *p;
    u8 *q = &D_80078E78[0];
    s32 loc;

@@ -1615,7 +1614,7 @@ s32 func_8014D820(s32 a0, u16 *a1, u16 *a2x)
  } Ent;
  int new_var2;
  s16 new_var3;
-register u16 *a2 __asm__("$7");
+register u16 *a2 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B t3_tus1)
  V4 out[3];
  V4 pos;
  Desc desc;
@@ -1639,11 +1638,11 @@ register u16 *a2 __asm__("$7");
  s32 t;
  s32 u;
  s32 a0v;
-__asm__ __volatile__("" : "=r"(a2) : "0"(a2x));
+__asm__ __volatile__("" : "=r"(a2) : "0"(a2x));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
  t = a2[0];
  u = a1[0];
  dx = t - u;
-__asm__ __volatile__("" : "=r"(a0v) : "0"(a0));
+a0v = a0;
  new_var3 = (s16) dx;
  t = a2[2];
  u = a1[2];
@@ -2362,7 +2361,7 @@ s32 func_8015094C(s32 param_1) {
    struct { s32 x, mid, y; s32 _pad[9]; } arg;   /* 0x30 @ 0x10 */
    S16 local;                                     /* 0x10 @ 0x40 */
    s32 pad1[4];                                    /* 0x10 @ 0x50 */
-    register u8 *cam __asm__("$17") = D_80126948;
+    u8 *cam = D_80126948;
    s32 ret;

    local = D_801ED01C;
@@ -2465,7 +2464,7 @@ void func_80150B28(int param_1) {
    extern s32 D_800AE6B0;
    extern void (*D_801920A8[])(void);
    u32 idx;
-    register u32 sub __asm__("$2");
+    u32 sub;

    if ((D_800AE6B0 & 0x80FFFFFF) == 0) {
        idx = *(u16 *)(param_1 + 0x16C);
@@ -2733,8 +2732,8 @@ void func_801523F4(s32 arg0)
 {
    s32 pad[4];
    s32 buf[4];
-    register s32 s0a __asm__("$16");                    /* $s0 = buf */
-    register s32 s2a __asm__("$18") = (s32)&D_80192190; /* $s2 = &D_80192190 */
+    s32 s0a;                    /* $s0 = buf */
+    s32 s2a = (s32)&D_80192190; /* $s2 = &D_80192190 */

    ((void (*)(s32, s32))func_80146E90)(arg0, 0);
    func_80019064(&D_80062C04);
@@ -3006,7 +3005,6 @@ void func_80153D7C(s32 param_1)
    if (currentLocationId == 0x3075) *(u8 *)(param_1 + 0xde) = 0x14;
    else *(u8 *)(param_1 + 0xde) = 10;
    *(u8 *)(param_1 + 0xdf) = 0;
-    __asm__ __volatile__("" ::: "memory");
    func_80146CA0((void *)param_1);
 }

@@ -439,9 +439,9 @@ s32 func_8012C890(s32 a0, s32 a1, s32 a2) {
    *(s32 *)(dst + 0xDC) = v10;

    {
-        register u16 *pc __asm__("$3");
+        u16 *pc;
        pc = &(*(u16 *)&D_801270C4);
-        *(u16 *)(dst + 0x36) = *(volatile u16 *)pc;
+        *(u16 *)(dst + 0x36) = *(u16 *)pc;
        count = *(volatile u16 *)pc + 1;
        *pc = count;
        if (count == 0) {
@@ -752,13 +752,13 @@ void func_8012E364(s32 arg0_)
    extern s16 D_80126CE0;
    extern s32 D_801ED9D8;
    extern s32 D_801ED9DC;
-    register s32 arg0 __asm__("$6");
-    register s32 prev __asm__("$5");
-    register u16 flags __asm__("$2");
+    s32 arg0;
+    register s32 prev __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register u16 flags __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 a;
    s32 diff;
    s32 v;
-    register s32 d __asm__("$2");
+    register s32 d __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 spd;
    s32 e1;
    s32 e2;
@@ -1271,9 +1271,9 @@ extern s16 D_801908C4[];

 void func_80130D48(s32 arg0)
 {
-    register s16 *tbl __asm__("$16");
-    register s32 pa __asm__("$18") = arg0;
-    register u8 *p  __asm__("$19") = D_80078E78;
+    s16 *tbl;
+    s32 pa = arg0;
+    register u8 *p  __asm__("$19") = D_80078E78;  // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 s1v;
    s32 call_a0;
    s32 call_a1;
@@ -1313,7 +1313,7 @@ void func_80130D48(s32 arg0)
        } else if ((a >> 1) >= b) {
            s1v += 6;
        }
-        { register s32 v1 __asm__("$3"); register s8 *bp __asm__("$2"); v1 = s1v * 2; bp = (s8 *)D_8019083C; tbl = (s16 *)(bp + v1); }
+        { register s32 v1 __asm__("$3"); s8 *bp; v1 = s1v * 2; bp = (s8 *)D_8019083C; tbl = (s16 *)(bp + v1); }  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)

        r = rand() % 100;
        cnt = 0;
@@ -1344,7 +1344,7 @@ void func_80130D48(s32 arg0)
                    }
                }
            }
-            { register s32 v1 __asm__("$3"); register s8 *bp __asm__("$2"); v1 = s1v * 2; bp = (s8 *)D_801908A4; tbl = (s16 *)(bp + v1); }
+            { register s32 v1 __asm__("$3"); s8 *bp; v1 = s1v * 2; bp = (s8 *)D_801908A4; tbl = (s16 *)(bp + v1); }  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
            s1v = 0x32;
            break;
        }
@@ -1360,7 +1360,7 @@ void func_80130D48(s32 arg0)
                    }
                }
            }
-            { register s32 v1 __asm__("$3"); register s8 *bp __asm__("$2"); v1 = s1v * 2; bp = (s8 *)D_801908C4; tbl = (s16 *)(bp + v1); }
+            { register s32 v1 __asm__("$3"); s8 *bp; v1 = s1v * 2; bp = (s8 *)D_801908C4; tbl = (s16 *)(bp + v1); }  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
            s1v = 0x33;
            break;
        }
@@ -1863,7 +1863,7 @@ void func_80131B14() {
    extern void func_8002A790(void *);
    extern u8 D_801908EC;

-    register u8 *a0v __asm__("$4");
+    u8 *a0v;
    u8 *p = a0v;


@@ -2412,12 +2412,12 @@ s32 func_80133784(s32 arg0, void *arg1, s32 arg2) {
    extern s16 D_801EDA3C;
    extern u16 D_801EDA40;

-    register s32 s1 __asm__("$17");
+    s32 s1;
    s32 s2;
-    register s16 s3 __asm__("$19");
-    register s32 s4 __asm__("$20");
-    register s16 a0v __asm__("$4");
-    register s16 arg0s __asm__("$21");
+    register s16 s3 __asm__("$19");  // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s32 s4 __asm__("$20");  // !FAKE: pin $20 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s16 a0v;
+    register s16 arg0s __asm__("$21");  // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 dx, dy, dz;
    s32 r, ret;

@@ -2442,7 +2442,7 @@ s32 func_80133784(s32 arg0, void *arg1, s32 arg2) {
        s16 sz = ((Box_80133784 *)arg2)->f4 - ((Box_80133784 *)arg1)->f4;
        if (sx == 0 && sy == 0) {
            s32 zt = (sz == 0);
-            __asm__("addu %0,%1,$zero" : "=r"(s2) : "r"(zt));
+            __asm__("addu %0,%1,$zero" : "=r"(s2) : "r"(zt));  // !FAKE: instruction addu — NEEDED DIFFERS (P36 rung B t3_tus1)
        }
        D_801909BC->f2 = ((Box_80133784 *)arg1)->f2 - 4;
        r = func_80047D3C(sx * sx + sz * sz);
@@ -2466,10 +2466,9 @@ s32 func_80133784(s32 arg0, void *arg1, s32 arg2) {

    while (1) {
        s32 ret0;
-        register s32 retc __asm__("$3");
-        __asm__ __volatile__("");
+        register s32 retc __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
        ret0 = func_80133AB0(arg0s, (s16)D_801909BC->f0, (s16)D_801909BC->f4, (*(s32*)&D_801EDA30));
-        __asm__("addu %0,%1,$zero" : "=r"(retc) : "r"(ret0));
+        __asm__("addu %0,%1,$zero" : "=r"(retc) : "r"(ret0));  // !FAKE: instruction addu — NEEDED DIFFERS (P36 rung B t3_tus1)
        ret = retc;
        if (ret == 0) goto after;
        s4 |= ret;
@@ -2490,7 +2489,7 @@ s32 func_80133784(s32 arg0, void *arg1, s32 arg2) {
 after:
    if ((s16)s4 != 0 || D_801EDA3C != 0) {
        s16 t;
-        __asm__ __volatile__("" :: "r"(s4));
+        __asm__ __volatile__("" :: "r"(s4));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B t3_tus1)
        t = D_801909BC->f6;
        if (t >= -0xBCB) {
            if (t < -0x578) {
@@ -2530,7 +2529,7 @@ s32 func_80133AB0(s16 flag, s16 x, s16 y, s32 arg3)
    u16 *pA = (*(u16 * *)&D_801909C0);
    u16 *pB = (*(u16 * *)&D_801909BC);
    u16 *pC = (*(u16 * *)&D_801909C8);
-    register int zr __asm__("$0");
+    register int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u32 X, Y, cell, Xc, Yc;
    u16 k, off;
    int cnt;
@@ -2538,7 +2537,7 @@ s32 func_80133AB0(s16 flag, s16 x, s16 y, s32 arg3)
    u8 *s0;
    u16 raw;
    u32 hib;
-    register int harg __asm__("$4");
+    register int harg __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 ret;
    void *p0C, *p10;
    u8 *p14, *p18, *p1C;
@@ -2549,11 +2548,11 @@ s32 func_80133AB0(s16 flag, s16 x, s16 y, s32 arg3)
    pC[2] = pA[2] - pB[2];

    X = ((((u16)x + 0x8000) >> 7) & 0x1ff) - map->ox;
-    __asm__("addu %0,%1,$zero" : "=r"(Xc) : "r"(X));
+    __asm__("addu %0,%1,$zero" : "=r"(Xc) : "r"(X));  // !FAKE: instruction addu — NEEDED DIFFERS (P36 rung B t3_tus1)
    if (!((X & 0xffff) < map->w))
        return 0;
    Y = ((((u16)y + 0x8000) >> 7) & 0x1ff) - map->oy;
-    __asm__("addu %0,%1,$zero" : "=r"(Yc) : "r"(Y));
+    __asm__("addu %0,%1,$zero" : "=r"(Yc) : "r"(Y));  // !FAKE: instruction addu — NEEDED DIFFERS (P36 rung B t3_tus1)
    if (!((Y & 0xffff) < map->h))
        return 0;

@@ -2702,7 +2701,7 @@ s32 func_80133CD4(arg0, cmd, base, arr)
            s32 h;
            h = ((s16 *)pb0)[0];
            s1var = h << 16;
-            __asm__("lh %0, 2(%2)" : "=r"(h) : "0"(h), "r"(pb0) : "memory");
+            __asm__("lh %0, 2(%2)" : "=r"(h) : "0"(h), "r"(pb0) : "memory");  // !FAKE: instruction lh — NEEDED DIFFERS (P36 rung B t3_tus1)
            s0var = h << 16;
        }
        pb0[2] += q3v;
@@ -2802,7 +2801,6 @@ s32 func_801343C4(s32 angle, s32 p1, s32 p2)
    pb0[2] = ((u16 *)p2)[2];

    a1v = pac[0]; a2v = pac[2];
-    __asm__ __volatile__("" ::: "memory");
    D_801EDA40 = 0;
    D_801EDA3C = 0;
    if (((int (*)(int, s16, s16, int))func_80133AB0)(sangle, a1v, a2v, d94)) {
@@ -2887,10 +2885,10 @@ s32 func_801345F8(s32 arg)
    extern u16 * D_801909BC;
    extern u16 D_801EDA40;

-    register u16 *param_1 __asm__("$5") = ((u16 *)arg);
-    register u16 *cc __asm__("$4") = D_801909BC;
+    register u16 *param_1 __asm__("$5") = ((u16 *)arg);  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register u16 *cc __asm__("$4") = D_801909BC;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
    int c8000 = 0x8000;
-    register int zr __asm__("$0");
+    register int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u32 c1, c2, uVar6, uVar2, cnt, v14;
    u16 *ptmp, *puVar4, *puVar7, uVar1;
    int hi, harg, iVar9, iVar8, uVar3, uVar10, tbl;
@@ -2951,7 +2949,7 @@ s32 func_801347A0(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {

    Elem_801347A0 *pElem;
    s32 val;
-    register s32 iv __asm__("$4");
+    s32 iv;
    s32 q;
    s32 dvsr;

@@ -3005,13 +3003,13 @@ int func_80134A74(int param_1, s16 param_2, s16 param_3, int param_4)
    extern s32 func_80134C20(s32, s32, s32, s32);

    u16 *param_4p = (u16 *)param_4;
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u32 uVar6, uVar2, uVar2c;
-    register u32 uVar6c __asm__("$9");
+    u32 uVar6c;
    u16 *puVar4, *ptmp;
-    register u32 n __asm__("$18");
-    register u32 p0 __asm__("$4");
-    register int v14 __asm__("$3");
+    register u32 n __asm__("$18");  // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register u32 p0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    int v14;
    u16 *puVar7, uVar1;
    u32 hi, hic;
    int iVar5, iVar9, iVar8, uVar3, uVar10;
@@ -3020,7 +3018,7 @@ int func_80134A74(int param_1, s16 param_2, s16 param_3, int param_4)
    uVar6c = uVar6 + zr;
    if ((uVar6 & 0xffff) < (u32)param_4p[2]) {
        uVar2 = ((int)((param_3 & 0xffff) + 0x8000) >> 7 & 0x1ff) - (u32)param_4p[1];
-        __asm__("addu %0,%1,$zero" : "=r"(uVar2c) : "r"(uVar2));
+        __asm__("addu %0,%1,$zero" : "=r"(uVar2c) : "r"(uVar2));  // !FAKE: instruction addu — NEEDED DIFFERS (P36 rung B t3_tus1)
        if ((uVar2 & 0xffff) < (u32)param_4p[3]) goto work;
        return 0;
    found:
@@ -3033,7 +3031,7 @@ int func_80134A74(int param_1, s16 param_2, s16 param_3, int param_4)
        iVar8 = *(int *)(param_4p + 0xe);
        ptmp = (u16 *)((((uVar2c & 0xffff) * (u32)param_4p[2] + (uVar6c & 0xffff)) * 2 & 0xffff) * 2 + *(int *)(param_4p + 4));
        v14 = *(int *)(param_4p + 10);
-        __asm__ __volatile__("" :: "r"(uVar6c));
+        __asm__ __volatile__("" :: "r"(uVar6c));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B t3_tus1)
        p0 = (u32)*ptmp;
        n = (u32)ptmp[1];
        puVar4 = (u16 *)(v14 + p0 + n * 2) - 1;
@@ -3052,7 +3050,7 @@ int func_80134A74(int param_1, s16 param_2, s16 param_3, int param_4)
    test:
        {
            u32 m;
-            __asm__("addu %0,%1,$zero" : "=r"(m) : "r"(n));
+            m = n;
            n--;
            if ((m & 0xffff) != 0) goto body;
        }
@@ -3081,8 +3079,8 @@ s32 func_80134C20(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
    u16 temp_a1;
    s32 temp_s4;
    s32 c = arg0;
-    __asm__ __volatile__("" : "=r"(c) : "0"(c));
-    __asm__ __volatile__("" : : "r"(arg0));
+    __asm__ __volatile__("" : "=r"(c) : "0"(c));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
+    __asm__ __volatile__("" : : "r"(arg0));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B t3_tus1)

    temp_s4 = arg2 + (M2C_FIELD(((void *)arg1), s16 *, 2) * 8);
    temp_s1 = *(s32 *)(arg3 + (M2C_FIELD(((void *)arg1), s16 *, 4) * 4));
@@ -3168,16 +3166,16 @@ s32 func_80135004(s32 arg0, s32 p1, s32 p2)
    extern s16 *D_801909C4;
    extern u16 D_801EDA40;

-    register s16 *pb0 __asm__("$9");   /* D_801909C0 -> $t1 */
-    register s16 *pac __asm__("$6");   /* D_801909BC -> $a2 */
-    register s16 *pb8 __asm__("$8");   /* D_801909C8 -> $t0 */
+    register s16 *pb0 __asm__("$9");   /* D_801909C0 -> $t1 */  // !FAKE: pin $9 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s16 *pac __asm__("$6");   /* D_801909BC -> $a2 */  // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s16 *pb8 __asm__("$8");   /* D_801909C8 -> $t0 */  // !FAKE: pin $8 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u16 *pb4;
    u16 a, b;
    int id;
    int a1v, a2v, d94;

    pb0 = D_801909C0;
-    __asm__ __volatile__("" : : "r"(pb0));
+    __asm__ __volatile__("" : : "r"(pb0));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B t3_tus1)

    a = ((u16 *)p2)[0]; pac = D_801909BC; pb0[0] = a; b = ((u16 *)p1)[0]; pb8 = (*(s16 * *)&D_801909C8); pac[0] = b; pb8[0] = a - b;
    a = ((u16 *)p2)[1]; pb0[1] = a; b = ((u16 *)p1)[1]; pac[1] = b; pb8[1] = a - b;
@@ -3185,7 +3183,6 @@ s32 func_80135004(s32 arg0, s32 p1, s32 p2)

    id = ((int)arg0) & 0xFFFF;
    a1v = pac[0]; a2v = pac[2]; d94 = D_801EDA30;
-    __asm__ __volatile__("" ::: "memory");
    D_801EDA40 = 0;

    if (func_80134A74(id, a1v, a2v, d94)) {
@@ -3198,9 +3195,9 @@ s32 func_80135004(s32 arg0, s32 p1, s32 p2)
        return 1;
    }
    {
-        register u16 *qb __asm__("$4");   /* D_801909BC -> $a0 (reloaded) */
-        register int qa0 __asm__("$5");   /* D_801909C0[0], kept in $a1 for the 2nd-call arg */
-        register u16 *qa __asm__("$6");   /* D_801909C0 -> $a2 (reloaded) */
+        u16 *qb;   /* D_801909BC -> $a0 (reloaded) */
+        int qa0;   /* D_801909C0[0], kept in $a1 for the 2nd-call arg */
+        u16 *qa;   /* D_801909C0 -> $a2 (reloaded) */
        qb = (u16 *)D_801909BC;
        qa = (u16 *)D_801909C0;
        qa0 = qa[0];
@@ -3234,22 +3231,22 @@ int func_80135168(u16 arg0, u16 *p1, u16 *p2)
    extern u8 D_801909BC;
    extern u8 D_801909C0;
    extern u8 D_801909C8;
-    register s16 *pb0 __asm__("$8");
-    register s16 *pac __asm__("$6");
-    register s16 *pb8 __asm__("$7");
+    register s16 *pb0 __asm__("$8");  // !FAKE: pin $8 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s16 *pac __asm__("$6");  // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s16 *pb8 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u16 *pb4;
    u16 a, b;
    int a1v, a2v, d94;

    pb0 = (*(s16 * *)&D_801909C0);
-    __asm__ __volatile__("" : : "r"(pb0));
+    __asm__ __volatile__("" : : "r"(pb0));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B t3_tus1)

    a = p2[0]; pac = (*(s16 * *)&D_801909BC); pb0[0] = a; b = p1[0]; pb8 = (*(s16 * *)&D_801909C8); pac[0] = b; pb8[0] = a - b;
    a = p2[1]; pb0[1] = a; b = p1[1]; pac[1] = b; pb8[1] = a - b;
    a = p2[2]; pb0[2] = a; b = p1[2]; pac[2] = b; pb8[2] = a - b;

    a1v = pac[0]; a2v = pac[2]; d94 = D_801EDA30;
-    __asm__ __volatile__("" ::: "memory");
+    __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
    D_801EDA40 = 0;
    if (func_80134A74(arg0, a1v, a2v, d94)) {
        pb4 = (*(u16 * *)&D_801909C4);
@@ -635,13 +635,13 @@ extern s32 D_801EDA64;

 s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
    s32 pad_[8];
-    register s32 m __asm__("$2");
+    register s32 m __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 sp;
-    register s32 p1   __asm__("$17");
-    register s32 mode __asm__("$18");
-    register s32 p0   __asm__("$19");
-    register s32 base __asm__("$20");
-    register s32 p3   __asm__("$21");
+    register s32 p1   __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 mode;
+    register s32 p0   __asm__("$19");  // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 base;
+    register s32 p3   __asm__("$21");  // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung B t3_tus1)

    p0 = arg0;
    p1 = arg1;
@@ -680,7 +680,7 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
            return 1;
        }
        sp = *(s32 *)sp;
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
        while (sp != 0) {
            if (func_80135EB0(sp, 0) != 0) {
 hit:
@@ -638,7 +638,7 @@ s32 func_80135A4C(s32 a0, s32 a1, s32 *a2, s32 a3) {
    extern u8 D_801152B0;

    s32 *p;
-    register s32 s7 __asm__("$23");
+    register s32 s7 __asm__("$23");  // !FAKE: pin $23 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 flag;
    s32 acc;
    s16 i;
@@ -685,7 +685,7 @@ s32 func_80135A4C(s32 a0, s32 a1, s32 *a2, s32 a3) {
        return 1;
    next:
        p = (s32 *)*p;
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
        if (p != 0) goto loop;
        return 0;
    }
@@ -699,7 +699,7 @@ s32 func_80135A4C(s32 a0, s32 a1, s32 *a2, s32 a3) {
        s32 t = 0;
        if (((V3 *)a2)->x == ((V3 *)a3)->x && ((V3 *)a2)->y == ((V3 *)a3)->y) {
            s32 zt = (((V3 *)a2)->z == ((V3 *)a3)->z);
-            __asm__("addu %0,%1,$zero" : "=r"(t) : "r"(zt));
+            __asm__("addu %0,%1,$zero" : "=r"(t) : "r"(zt));  // !FAKE: instruction addu — NEEDED DIFFERS (P36 rung B t3_tus1)
        }
        eq = t;
    }
@@ -667,7 +667,7 @@ s32 func_80135D20(s32 arg0, s32 arg1, u16 *arg2)
    u8 dead[96];
    u16 sp[3];
    s32 *p;
-    register s32 flag __asm__("$17");
+    register s32 flag __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 q;

    sp[0] = arg2[0];
@@ -707,7 +707,6 @@ s32 func_80135D20(s32 arg0, s32 arg1, u16 *arg2)
    if (p == NULL) {
        return 0;
    }
-    __asm__ __volatile__("");
 loop:
    if (func_80135EB0(p, 0) == 0) {
        goto body;
@@ -771,7 +770,7 @@ s32 func_80135EB0(void *arg0, s32 arg1_) {
    extern s16 D_801152AC;
    extern s16 D_80126722;
    extern s16 D_80126724;
-    register s32 arg1 __asm__("$19") = arg1_;
+    register s32 arg1 __asm__("$19") = arg1_;  // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 t1;
    s32 t2;
    s32 t3;
@@ -784,7 +783,7 @@ s32 func_80135EB0(void *arg0, s32 arg1_) {
    s32 n2;
    s32 r;
    s32 sv;
-    register s32 w __asm__("$5");
+    register s32 w __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
    void *q;

    t1 = (*(s16 **)&D_801909BC)[0];
@@ -821,13 +820,13 @@ s32 func_80135EB0(void *arg0, s32 arg1_) {
        D_801152AA = 0;
        (*(s16 *)D_80126720) = h0;
        (*(s16 *)D_801152A8) = c0 - h0;
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
        c1 = ac[2];
        b4[2] = c1;
        h1 = (M2C_FIELD(arg0, s16 *, 0xC) + M2C_FIELD(arg0, s16 *, 0xE)) >> 1;
        D_80126724 = h1;
        D_801152AC = c1 - h1;
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
        b4[1] = ac[1];
        D_80126722 = (M2C_FIELD(arg0, s16 *, 8) + M2C_FIELD(arg0, s16 *, 0xA)) >> 1;
        VectorNormalSS(D_801152A8, D_801152A8);
@@ -874,11 +873,11 @@ s32 func_80135EB0(void *arg0, s32 arg1_) {
        goto L288;
    case 1:
        r = func_801365B8(arg0, (s16) arg1, M2C_FIELD(arg0, s16 *, 4));
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
        goto done;
    case 2:
        r = func_801365B8(arg0, (s16) (arg1 | 1), M2C_FIELD(arg0, s16 *, 6));
-        __asm__ __volatile__(" ");
+        __asm__ __volatile__(" ");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
        goto done;
    case 5:
        if (func_80136334(arg0, (s16) arg1, M2C_FIELD(arg0, s16 *, 0xC)) != 0) {
@@ -940,17 +939,17 @@ s32 func_80136334(void *arg0, s32 arg1, s32 arg2) {
    extern s16 D_801152AC;
    extern s16 D_80126722;
    extern s16 D_80126724;
-    register s32 a1v __asm__("$11");
-    register s32 a2v __asm__("$12");
-    register s32 n __asm__("$5");
-    register s16 *b4 __asm__("$7");
+    s32 a1v;
+    register s32 a2v __asm__("$12");  // !FAKE: pin $12 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 n;
+    s16 *b4;
    s32 d;
    s32 dx;
    s32 denom;
    s32 result;
    s32 frame_pad[2];
    (void)&frame_pad;
-    __asm__("" : "=r"(a1v) : "0"(arg1));
+    __asm__("" : "=r"(a1v) : "0"(arg1));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
    a2v = arg2;

    if (!(arg1 & 1)) {
@@ -964,7 +963,7 @@ s32 func_80136334(void *arg0, s32 arg1, s32 arg2) {
    }
    n = -d;
    {
-        register s16 *b8 __asm__("$6") = *(s16 **)&D_801909C8;
+        s16 *b8 = *(s16 **)&D_801909C8;
        u16 *ac = *(u16 **)&D_801909BC;
        b4 = D_801909C4;
        b4[0] = ac[0] + n * b8[0] / denom;
@@ -985,13 +984,13 @@ s32 func_80136334(void *arg0, s32 arg1, s32 arg2) {
    (*(s16 *)D_801152A8) = 0;
    if (a1v & 1) {
        D_801909C4[2] = a2v + 2;
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
        D_801152AC = 0xFFF;
    } else {
        D_801152AC = -0xFFF;
        D_801909C4[2] = a2v - 2;
    }
-    __asm__ __volatile__("" :: "r"(a1v), "r"(a2v));
+    __asm__ __volatile__("" :: "r"(a1v), "r"(a2v));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B t3_tus1)
    (*(s16 *)D_80126720) = (M2C_FIELD(arg0, s16 *, 4) + M2C_FIELD(arg0, s16 *, 6)) >> 1;
    D_80126722 = (M2C_FIELD(arg0, s16 *, 8) + M2C_FIELD(arg0, s16 *, 0xA)) >> 1;
    result = 1;
@@ -1034,9 +1033,9 @@ s32 func_801365B8(void *arg0, s32 arg1, s32 arg2) {
    s32 a1c;
    s32 a2c;
    s32 cond;
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B t3_tus1)

-    __asm__("addu %0,%1,$zero" : "=r"(a1c) : "r"(arg1));
+    __asm__("addu %0,%1,$zero" : "=r"(a1c) : "r"(arg1));  // !FAKE: instruction addu — NEEDED DIFFERS (P36 rung B t3_tus1)
    cond = arg1 & 1;
    a2c = arg2 + zr;
    if (!cond) {
@@ -1070,8 +1069,6 @@ s32 func_801365B8(void *arg0, s32 arg1, s32 arg2) {
    if (M2C_FIELD(arg0, s16 *, 0xA) < temp_v1) {
        return var_v0;
    }
-    __asm__("" :: "r"(a1c));
-    __asm__("" :: "r"(a1c));
    if (a1c & 0x8000) {
        b4[1] = (s16) (*(u16 **)&D_801909C0)[1];
        b4[2] = (s16) (*(u16 **)&D_801909C0)[2];
@@ -1109,12 +1106,12 @@ s32 func_80136824(s32 arg0, s32 arg1, s32 arg2) {
    extern s16 D_80126722;
    extern s16 D_80126724;

-    register u16 *ac __asm__("$4");
-    register s16 *b8 __asm__("$6");
-    register s16 *b4 __asm__("$9");
-    register s32 r __asm__("$3");
-    register s32 pos __asm__("$12");
-    register s32 a1v __asm__("$5");
+    u16 *ac;
+    s16 *b8;
+    s16 *b4;
+    s32 r;
+    register s32 pos __asm__("$12");  // !FAKE: pin $12 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s32 a1v __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s16 temp_v0;
    s16 temp_v1;
    s32 var_a3;
@@ -1125,7 +1122,7 @@ s32 func_80136824(s32 arg0, s32 arg1, s32 arg2) {
    s16 *b4b;
    u16 *p;

-    __asm__ ("" : "=r"(a1v) : "0"(arg1));
+    __asm__ ("" : "=r"(a1v) : "0"(arg1));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
    pos = arg2;
    if (!(a1v & 1)) {
        var_t0 = (s16) arg2 - (*(s16 **)&D_801909BC)[1];
@@ -1169,16 +1166,16 @@ s32 func_80136824(s32 arg0, s32 arg1, s32 arg2) {
    if (arg1 & 1) {
        b4b = D_801909C4;
        D_801152AA = 0xFFF;
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
        var_v0_3 = pos + 2;
    } else {
        b4b = D_801909C4;
        D_801152AA = -0xFFF;
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
        var_v0_3 = pos - 2;
    }
    b4b[1] = var_v0_3;
-    __asm__ __volatile__("" :: "r"(pos));
+    __asm__ __volatile__("" :: "r"(pos));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B t3_tus1)
    (*(s16 *)D_80126720) = (s16) ((s32) (M2C_FIELD(((void *)arg0), s16 *, 4) + M2C_FIELD(((void *)arg0), s16 *, 6)) >> 1);
    D_80126722 = (s16) ((s32) (M2C_FIELD(((void *)arg0), s16 *, 8) + M2C_FIELD(((void *)arg0), s16 *, 0xA)) >> 1);
    D_80126724 = (s16) ((s32) (M2C_FIELD(((void *)arg0), s16 *, 0xC) + M2C_FIELD(((void *)arg0), s16 *, 0xE)) >> 1);
@@ -814,8 +814,8 @@ extern void GsSortSprite(void *a0, u8 *a1, s32 a2);

 void func_801397B0(s32 arg0)
 {
-    register u8 *e __asm__("$7");
-    register s32 off __asm__("$4");
+    u8 *e;
+    register s32 off __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 buf[12];
    u8 *b164;
    u8 *b1A8;
@@ -920,7 +920,7 @@ s32 func_80139BE0(int param_1)
        int h = *(unsigned short *)(param_1 + 0x18);
        unsigned int idx;

-        __asm__("" : "=r"(t) : "0"(t));
+        __asm__("" : "=r"(t) : "0"(t));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
        idx = (unsigned char)t;
        if (h < 7) {
            if (h >= 2) {
@@ -1148,12 +1148,12 @@ void func_8013B274(s32 a0, s32 a1, void *a2)
        "swc2 $27, 8(%0)\n"
        : : "r"((u8 *)L + 0x18) : "memory");

-    *(s16 *)(p + 8) = *(volatile s32 *)((u8 *)L + 8);
-    *(s16 *)(p + 0xA) = *(volatile s32 *)((u8 *)L + 0xC);
-    *(s16 *)(p + 0x10) = *(volatile s32 *)((u8 *)L + 8) + *(volatile s32 *)((u8 *)L + 0x18);
+    *(s16 *)(p + 8) = *(s32 *)((u8 *)L + 8);
+    *(s16 *)(p + 0xA) = *(s32 *)((u8 *)L + 0xC);
+    *(s16 *)(p + 0x10) = *(volatile s32 *)((u8 *)L + 8) + *(s32 *)((u8 *)L + 0x18);
    *(s16 *)(p + 0x12) = *(volatile s32 *)((u8 *)L + 0xC);
    *(s16 *)(p + 0x18) = *(volatile s32 *)((u8 *)L + 8);
-    *(s16 *)(p + 0x1A) = *(volatile s32 *)((u8 *)L + 0xC) + *(volatile s32 *)((u8 *)L + 0x1C);
+    *(s16 *)(p + 0x1A) = *(volatile s32 *)((u8 *)L + 0xC) + *(s32 *)((u8 *)L + 0x1C);
    *(s16 *)(p + 0x20) = *(volatile s32 *)((u8 *)L + 8) + *(volatile s32 *)((u8 *)L + 0x18);
    *(s16 *)(p + 0x22) = *(volatile s32 *)((u8 *)L + 0xC) + *(volatile s32 *)((u8 *)L + 0x1C);

@@ -1056,7 +1056,7 @@ void func_8013CF68()

    u8 t0, t1, t2;
    u8 *base;
-    __asm__("la %0, D_800A5E94" : "=r"(base));
+    __asm__("la %0, D_800A5E94" : "=r"(base));  // !FAKE: instruction la — NEEDED DIFFERS (P36 rung B t3_tus1)

    *(s32 *)(base - 0xC) = 0;
    t0 = D_801F1558; t1 = D_801F1559; t2 = D_801F155A;
@@ -1156,7 +1156,7 @@ void func_8013D178(void) {
    extern unsigned char D_801F15F8, D_801F15F9, D_801F15FA, D_801F15FB, D_801F15FC, D_801F15FD, D_801F15FE, D_801F15FF, D_801F1600;
    extern unsigned char D_801F15F8, D_801F15F9, D_801F15FA, D_801F15FB, D_801F15FC, D_801F15FD, D_801F15FE, D_801F15FF, D_801F1600;
    unsigned char v, t;
-    register unsigned char *p __asm__("$5");
+    register unsigned char *p __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)

    p = &D_801F1558; v = *p; t = D_801F15F8;
    if (v != t) { if (v < t) *p = v + 8; else *p = v - 8; }
@@ -1376,13 +1376,13 @@ void func_8013D53C(void *arg0v) {
                    n = arg0->w * arg0->h;
                    i = 0;
                    src = arg0->data;
-                    __asm__("" :: "r"(src));  /* +2 refs on src (depth-2): keeps src above i, below the mfhi temp */
+                    __asm__("" :: "r"(src));  /* +2 refs on src (depth-2): keeps src above i, below the mfhi temp */  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B t3_tus1)
                    dst = src + n;
                    if (n > 0) {
                        do {
                            u16 px;
                            s32 r, g, b, out;
-                            __asm__("" :: "r"(i));  /* +3 refs on i (depth-3): lifts i over dst in the $t2 race */
+                            __asm__("" :: "r"(i));  /* +3 refs on i (depth-3): lifts i over dst in the $t2 race */  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B t3_tus1)
                            px = *src;
                            r = ((px & 0x1F) * s0v) / 2560;
                            g = (((px & 0x3E0) * t9v) / 2560) & 0x3E0;
@@ -1417,10 +1417,10 @@ void func_8013D8FC(void)
 {

    extern s16 *D_801EDABC;
-    register s16 *psVar3 __asm__("$17");
-    register s16 *psVar2 __asm__("$16");
-    register s32 c9 __asm__("$19");
-    register s32 cff __asm__("$18");
+    s16 *psVar3;
+    register s16 *psVar2 __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 c9;
+    s32 cff;
    u16 sVar1;
    s16 buf[4];

@@ -1461,22 +1461,22 @@ void func_8013D9B0(int param_1)
    extern s16 *D_801EDABC;
    extern s32 D_801EDAD4;
    u8 buf[0x20];
-    register s32 uVar13 __asm__("$16");
-    register u16 *psVar14 __asm__("$17");
-    register u16 *psVar15 __asm__("$18");
-    register s32 uVar16 __asm__("$19");
-    register void *r0 __asm__("$20");
-    register u16 *puVar10 __asm__("$11");
-    register u16 *puVar9 __asm__("$10");
-    register s32 iVar11 __asm__("$13");
-    register s32 iVar12 __asm__("$14");
+    s32 uVar13;
+    register u16 *psVar14 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    u16 *psVar15;
+    s32 uVar16;
+    void *r0;
+    u16 *puVar10;
+    register u16 *puVar9 __asm__("$10");  // !FAKE: pin $10 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 iVar11;
+    register s32 iVar12 __asm__("$14");  // !FAKE: pin $14 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u16 sVar4;
-    register u32 uVar5 __asm__("$3");
-    register u32 uVar7 __asm__("$6");
-    register u32 uVar1 __asm__("$7");
-    register u32 uVar6 __asm__("$4");
-    register u32 uVar8 __asm__("$8");
-    register u32 uVar3 __asm__("$9");
+    register u32 uVar5 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register u32 uVar7 __asm__("$6");  // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register u32 uVar1 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    u32 uVar6;
+    register u32 uVar8 __asm__("$8");  // !FAKE: pin $8 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register u32 uVar3 __asm__("$9");  // !FAKE: pin $9 — NEEDED DIFFERS (P36 rung B t3_tus1)

    psVar15 = (*(u16 * *)&D_801EDABC);
    if (psVar15 != 0) {
@@ -1491,31 +1491,31 @@ void func_8013D9B0(int param_1)
                iVar11 = 0;
                if (sVar4 == 9) {
                    *(s16 *)(buf + 0) = psVar14[-4];
-                    __asm__ __volatile__("" ::: "memory");
+                    __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
                    *(s16 *)(buf + 2) = psVar14[-3];
-                    __asm__ __volatile__("" ::: "memory");
+                    __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
                    *(s16 *)(buf + 4) = psVar14[-2];
-                    __asm__ __volatile__("" ::: "memory");
+                    __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
                    *(s16 *)(buf + 6) = psVar14[-1];
-                    __asm__ __volatile__("" ::: "memory");
+                    __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
                    {
-                        register s32 mw __asm__("$3") = (s32)((s16 *)psVar14)[-2];
-                        register s32 mh __asm__("$2") = (s32)((s16 *)psVar14)[-1];
+                        register s32 mw __asm__("$3") = (s32)((s16 *)psVar14)[-2];  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
+                        s32 mh = (s32)((s16 *)psVar14)[-1];
                        iVar12 = mw * mh;
                    }
                    uVar13 = 0;
                    puVar10 = *(u16 **)psVar14;
                    {
-                        register s32 boff __asm__("$2") = iVar12 * 2;
-                        register u16 *pi __asm__("$5");
+                        register s32 boff __asm__("$2") = iVar12 * 2;  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+                        register u16 *pi __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
                        pi = (u16 *)((s32)puVar10 + boff);
-                        __asm__ __volatile__("" : "=r"(pi) : "0"(pi));
+                        __asm__ __volatile__("" : "=r"(pi) : "0"(pi));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
                        puVar9 = pi;
                    }
                    if (0 < iVar12) {
                        do {
-                            register u32 pix __asm__("$2");
-                            register u32 out __asm__("$2");
+                            register u32 pix __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+                            register u32 out __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
                            u32 result;
                            *(u32 *)(buf + 0xc) = (u32)*puVar10;
                            pix = (u32)*puVar9;
@@ -1524,17 +1524,17 @@ void func_8013D9B0(int param_1)
                            uVar1 = pix & 0x7c00;
                            {
                                void *p1;
-                                register void *pa __asm__("$2");
-                                register void *pb __asm__("$12");
-                                __asm__ __volatile__("");
+                                register void *pa __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+                                register void *pb __asm__("$12");  // !FAKE: pin $12 — NEEDED DIFFERS (P36 rung B t3_tus1)
+                                __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
                                p1 = buf + 0xc;
-                                __asm__ __volatile__("" : "=r"(p1) : "0"(p1));
+                                __asm__ __volatile__("" : "=r"(p1) : "0"(p1));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
                                gte_ldIR0z();
                                gte_ldrgb(r0);
                                gte_ldIRGB(p1);
                                gte_dpcl();
                                pa = buf + 0x10;
-                                __asm__ __volatile__("" : "=r"(pa) : "0"(pa));
+                                __asm__ __volatile__("" : "=r"(pa) : "0"(pa));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
                                pb = pa;
                                gte_stORGB(pb);
                            }
@@ -1543,21 +1543,21 @@ void func_8013D9B0(int param_1)
                            uVar8 = out & 0x3e0;
                            uVar3 = out & 0x7c00;
                            if (uVar5 != uVar6) {
-                                register s32 c __asm__("$2");
+                                s32 c;
                                uVar13 = 1;
                                if ((s32)uVar5 < (s32)uVar6) uVar5 = uVar5 + 1;
                                c = (s32)uVar6 < (s32)uVar5;
                                if (c) uVar5 = uVar5 - 1;
                            }
                            if (uVar7 != uVar8) {
-                                register s32 c __asm__("$2");
+                                register s32 c __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
                                uVar13 = 1;
                                if ((s32)uVar7 < (s32)uVar8) uVar7 = uVar7 + 0x20;
                                c = (s32)uVar8 < (s32)uVar7;
                                if (c) uVar7 = uVar7 - 0x20;
                            }
                            if (uVar1 != uVar3) {
-                                register s32 c __asm__("$2");
+                                register s32 c __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
                                uVar13 = 1;
                                if ((s32)uVar1 < (s32)uVar3) uVar1 = uVar1 + 0x400;
                                c = (s32)uVar3 < (s32)uVar1;
@@ -1698,9 +1698,9 @@ void func_8013DD68() {
    u16 *puVar16;
    u16 *q;
    u16 *puVar10;
-    register u16 uVar2 __asm__("$3");
+    register u16 uVar2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
    int uVar5;
-    register int iVar14 __asm__("$7");
+    register int iVar14 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B t3_tus1)
    Buf_8013DD68 buf;
    u8 *pbase;
    u8 *base;
@@ -1719,7 +1719,7 @@ void func_8013DD68() {
    p = p + 0x10;
    iVar14 = 0;
    if (uVar1 != 0) {
-        register int c5 __asm__("$11") = 5;
+        int c5 = 5;
        puVar10 = (u16 *)((int)p + 0x18);
        q = puVar16 + 8;
        do {
@@ -1807,7 +1807,7 @@ void func_8013E5E8(void)
    extern unsigned short D_80115112;
    extern u16 D_80115116;
    extern void (*D_801917E0[])(void);
-    register void (*fp)(void) __asm__("$2"); /* pin fn-ptr to $v0 -> store retires early */
+    register void (*fp)(void) __asm__("$2"); /* pin fn-ptr to $v0 -> store retires early */  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
    func_80029444();
    func_801754A8();
    D_8011511E = func_80014ED4(0);
@@ -1853,12 +1853,12 @@ void func_8013E6AC(void) {
        D_80115140[i] = 0;
    }
    if (!((u32)func_80029504() < 5 || currentLocationId == 0x302A || currentLocationId == 0x3073)) {
-        register s32 *ep __asm__("$8");
-        register s32 *fp __asm__("$9");
+        s32 *ep;
+        s32 *fp;
        fp = (s32 *)&D_80115110;
        ep = (s32 *)&D_801917CC;
        for (i = 0; i < 5; i++) {
-            register s32 *fa __asm__("$6");
+            s32 *fa;
            s32 v;
            fa = (s32 *)(i * 4 + (s32)fp);
            v = ep[i] * 3 >> 2;
@@ -2015,7 +2015,7 @@ extern unsigned char D_801917A8;
 void func_8013EB7C(void) {
    s32 sp10[2];
    short sVar1;
-    register short sVar2 __asm__("$2");
+    register short sVar2 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 a0v;
    s32 iVar4;

@@ -976,7 +976,7 @@ extern void func_801407F4(void);
 extern s32 func_801416D4(s16);  /* macro-canonical (§8e) */

 s32 func_8013F350(void) {
-    register u16 *pd __asm__("$5") = &D_8011511C;
+    register u16 *pd __asm__("$5") = &D_8011511C;  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u16 *ps;
    u16 *pf;
    u16 *pg;
@@ -986,17 +986,17 @@ s32 func_8013F350(void) {
    u8 *pmax;
    u8 *p2e;
    u8 *p3e;
-    register s32 off __asm__("$4");
+    register s32 off __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s16 i;
    s32 r;
    s16 rs;
    s16 d;
    u8 b;
-    register u8 bb __asm__("$4");
+    u8 bb;
    u8 m;
    s32 chg;

-    __asm__ __volatile__("" : "=r"(pd) : "0"(pd));
+    __asm__ __volatile__("" : "=r"(pd) : "0"(pd));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
    pad = *pd;
    chg = 0;
    if (pad != 0) {
@@ -1274,7 +1274,7 @@ void func_8013FAF8(s16 arg0, s16 arg1) {
    s32 t;
    s16 *pp;
    s32 flag2;
-    register s32 flag3 __asm__("$18");
+    register s32 flag3 __asm__("$18");  // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B t3_tus1)

    func_80140E6C();
    func_80140F00();
@@ -1039,14 +1039,14 @@ s16 n;
  Prim4 *p;
  s16 t;
  s32 c3;
-register u16 *a __asm__("$20");
-register u16 *b __asm__("$21");
-register u16 *c __asm__("$23");
-register u16 *e __asm__("$22");
-register u16 *pb __asm__("$10");
-register u32 m24 __asm__("$8");
-register u32 mhi __asm__("$9");
-register s32 eight __asm__("$2");
+u16 *a;
+u16 *b;
+u16 *c;
+u16 *e;
+u16 *pb;
+u32 m24;
+u32 mhi;
+register s32 eight __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
  if (i < n)
  {
    c3 = 3;
@@ -1126,7 +1126,7 @@ register s32 eight __asm__("$2");
              y = (*e) + 3;
            }
            *((s16 *) (q - 10)) = y;
-__asm__("" ::: "memory");
+__asm__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
            *((u32 *) ot) = 0x4000000;
            q[-8] = 0x78;
            *((u32 *) (q - 0x10)) = 0x64808080;
@@ -1137,13 +1137,13 @@ __asm__("" ::: "memory");
            *((s16 *) (q - 4)) = eight;
            *((u32 *) ot) = ((*((u32 *) ot)) & mhi) | (D_800AE7BC[*pb].ot[2] & m24);
            {
-register u32 *op __asm__("$4");
+register u32 *op __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
              op = D_800AE7BC[*pb].ot;
              op[2] = (op[2] & mhi) | (((u32) ot) & m24);
            }
            q += 0x14;
            ot += 5;
-            __asm__ volatile("" :: "r"(j));   /* [L2] zero code, +1 ref on j */
+            __asm__ volatile("" :: "r"(j));   /* [L2] zero code, +1 ref on j */  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B t3_tus1)
          }

        }
@@ -1350,7 +1350,7 @@ void func_80141874(void) {
    extern u16 D_8011511C;
    extern u16 D_80115116;
    extern void (*D_8019182C[])(void);
-    register void (*fp)(void) __asm__("$2"); /* pin fn-ptr to $v0 → store retires early */
+    register void (*fp)(void) __asm__("$2"); /* pin fn-ptr to $v0 → store retires early */  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
    func_801754A8();
    D_8011511E = func_80014ED4(0);
    D_8011511C = func_80015018(0);
@@ -1536,7 +1536,7 @@ void func_801424E4(short *param_1) {
    extern void (*D_80191850[])(void);
    short sVar1;
    int iVar2;
-    register unsigned short t __asm__("$3");
+    unsigned short t;

    (*D_80191850[(unsigned short)param_1[1]])();
    if (*(unsigned short *)param_1 != 0) {
@@ -1555,8 +1555,8 @@ void func_801424E4(short *param_1) {
            iVar2 = *(int *)(param_1 + 0x32);
            if ((iVar2 != 0) && (*(short *)(iVar2 + 0x36) == param_1[0x7f])) {
                *(int *)(param_1 + 2) = *(int *)(iVar2 + 4);
-                a = *(unsigned short *)(*(volatile int *)(param_1 + 0x32) + 10);
-                __asm__ __volatile__("" : : "r"(a));
+                a = *(unsigned short *)(*(int *)(param_1 + 0x32) + 10);
+                __asm__ __volatile__("" : : "r"(a));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B t3_tus1)
                t = (unsigned short)param_1[0x7e];
                sVar1 = a + t;
                iVar2 = *(volatile int *)(param_1 + 0x32);
@@ -1592,7 +1592,7 @@ extern s32 D_80191844;

 void func_80142608(s32 param_1)
 {
-    register s32 iVar1 __asm__("$16");
+    s32 iVar1;

    if (*(short *)(param_1 + 0x70) != 0) {
        iVar1 = ((s32 (*)(void))func_8012C1B8)();
@@ -1838,8 +1838,8 @@ extern void func_80142B2C(void *arg0);
 void func_80142EC0(s32 param_1) {

    extern s32 D_80191A50[];
-    register s32 d   __asm__("$16") = param_1;   /* $s0 */
-    register s32 obj __asm__("$17");             /* $s1 */
+    register s32 d   __asm__("$16") = param_1;   /* $s0 */  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s32 obj __asm__("$17");             /* $s1 */  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 ret;
    s16 sVar2;

@@ -1881,8 +1881,8 @@ extern unsigned char D_80191AD0[];

 void func_8014305C(int param_1)
 {
-    register int s0_param __asm__("$16") = param_1;
-    register int s1_copy __asm__("$17");
+    register int s0_param __asm__("$16") = param_1;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register int s1_copy __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B t3_tus1)
    int iVar2;
    short sVar1;

@@ -1931,7 +1931,7 @@ void func_801431E8(s32 param_1) {
    u16 uVar2;
    s16 sVar4;

-    register s32 d __asm__("$16");
+    register s32 d __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
    memcpy(buf, &D_801ED014, 4);
    iVar5 = ((s32 (*)(void))func_8012C1B8)();
    *(s32 *)(param_1 + 0x20) = iVar5;
@@ -2100,8 +2100,8 @@ extern void func_8012C218(void *a0);
 void func_80143D28(s32 param_1) {

    extern MatEntry D_80191D88[];
-    register s32 iVar3 __asm__("$18") = *(s32 *)(param_1 + 0x20); /* $s2 */
-    register s32 iVar2 __asm__("$17") = *(s32 *)(param_1 + 0x64); /* $s1 */
+    register s32 iVar3 __asm__("$18") = *(s32 *)(param_1 + 0x20); /* $s2 */  // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 iVar2 = *(s32 *)(param_1 + 0x64); /* $s1 */
    MatEntry *p = &D_80191D88[*(s16 *)(param_1 + 0x70)];
    s32 sVar4;
    s32 iVar1;
@@ -2281,8 +2281,8 @@ extern u8 D_80191D78;
 void func_8014477C(void *param_1) {
    s32 v0;
    s32 v1;
-    register s32 uVar2 __asm__("$2");
-    register s32 addr __asm__("$3");
+    s32 uVar2;
+    s32 addr;
    s32 gv;
    s32 fv;

@@ -2323,9 +2323,9 @@ extern u8 D_80191DB4;

 void func_80144880(s32 param_1)
 {
-    register s32 obj  __asm__("$16");   /* $s0 */
-    register s32 self __asm__("$17") = param_1;  /* $s1 */
-    register s32 b    __asm__("$2");    /* $v0 */
+    s32 obj;   /* $s0 */
+    s32 self = param_1;  /* $s1 */
+    s32 b;    /* $v0 */
    s32 e;

    obj = ((s32 (*)(void))func_8012C194)();
@@ -1024,8 +1024,8 @@ void func_80156044(int param_1, int param_2) {
    extern u8 D_80192468;
    extern u8 D_801922EC;

-    register s32 puVar2 __asm__("$2");
-    register s32 iVar3 __asm__("$3");
+    register s32 puVar2 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s32 iVar3 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u8 *puVar4;
    s32 uVar1;

@@ -1367,8 +1367,8 @@ void func_80157D20(void)
 {

    extern u16 D_80192768[];
-    register void *a0v __asm__("$4");
-    register s32 a1v __asm__("$5");
+    register void *a0v __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s32 a1v __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
    void *param_1 = a0v;
    s32 param_2 = a1v;

@@ -1401,7 +1401,6 @@ s32 func_801596F0(s32 param_1) {
        (*(s16 *)&D_800B9AAC) = 0x7fff;
        D_800B9B00 = 0x7fff;

-        __asm__ __volatile__("" ::: "memory");

        for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
            p[1] |= 0x80000000;
@@ -1642,8 +1642,8 @@ void func_8015D01C(int param_1) {
    extern int D_80192C8C;

    int iVar4;
-    register unsigned short uVar1 __asm__("$19");
-    register unsigned short uVar5 __asm__("$17");
+    unsigned short uVar1;
+    register unsigned short uVar5 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B t3_tus1)
    short sVar2;
    short sVar3;

@@ -1795,8 +1795,8 @@ extern s32 D_80192CF8;
 void func_8015D380(s32 a0) {
    s16 out[4];
    s32 buf[8];
-    register s32 s1 __asm__("$17") = a0;
-    register s32 *s0 __asm__("$16") = buf;
+    s32 s1 = a0;
+    s32 *s0 = buf;
    ((void (*)(void *))func_80013F3C)((void *)s0);
    ((void (*)(void *, s32))func_80012558)((void *)s0, *(s16 *)(*(s32 *)(s1 + 0x20) + 0x12));
    ((void (*)(void *, s32))func_800126C4)((void *)s0, *(s16 *)(*(s32 *)(s1 + 0x20) + 0x10));
@@ -1947,7 +1947,7 @@ void func_8015D738(void *arg0) {
    if (s1 != 0) {
        if (*(u16 *)s1 == 0x360) goto block_808;
    }
-    __asm__ __volatile__("");
+    __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
    if (s1 != 0) {
        if (*(u16 *)s1 != 0) goto block_7F4;
    }
@@ -2802,7 +2802,7 @@ void func_8015FBE0(s32 *param_1)
        ((void (*)(s32 *, s16))func_80147078)(param_1, 0);
        ((void (*)(s32 *))func_80159B70)(param_1);
    } else {
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
        D_80078EC1 = 0;
        ((void (*)(s32 *, s32))func_80154150)(param_1, 0x20);
        ((void (*)(s32 *, s32))func_80154A74)(param_1, 0x18);
@@ -3610,7 +3610,7 @@ void func_80161E08(s32 param_1) {
        ((a2 = func_800291DC(8)) & 0x8000) != 0) {

        if (D_800B5BD8 == 0) {
-            __asm__("move %0,%1" : "=r"(p) : "r"(base + 0x65A8));
+            __asm__("move %0,%1" : "=r"(p) : "r"(base + 0x65A8));  // !FAKE: instruction move — NEEDED DIFFERS (P36 rung B t3_tus1)
            D_801EDBB0[0] = p;
            func_80024054(&D_80192F34, &D_801EDBBC);
            func_8001CE28(p, &D_801EDBBC);
@@ -3621,7 +3621,7 @@ void func_80161E08(s32 param_1) {
        }

        if (D_800B5C10 == 0) {
-            __asm__("move %0,%1" : "=r"(p) : "r"(base + 0x65E0));
+            __asm__("move %0,%1" : "=r"(p) : "r"(base + 0x65E0));  // !FAKE: instruction move — NEEDED DIFFERS (P36 rung B t3_tus1)
            D_801EDBB0[1] = p;
            func_80024054(&D_80192F54, &D_801EDBE4);
            func_8001CE28(p, &D_801EDBE4);
@@ -3632,7 +3632,7 @@ void func_80161E08(s32 param_1) {
        }

        if (D_800B5C48 == 0) {
-            __asm__("move %0,%1" : "=r"(p) : "r"(base + 0x6618));
+            __asm__("move %0,%1" : "=r"(p) : "r"(base + 0x6618));  // !FAKE: instruction move — NEEDED DIFFERS (P36 rung B t3_tus1)
            D_801EDBB0[2] = p;
            func_800242D0((s16)func_801620C4(), &D_801EDBFC, 0x84);
            func_8001CE68(p, &D_801EDBFC);
@@ -3688,9 +3688,9 @@ extern u8 D_80078EB1;
 extern s32 D_80192F68;

 s32 func_801621CC(s32 arg0) {
-    register s32 s0 __asm__("$16") = arg0;       /* $s0: arg0, crosses the call */
-    register u8 *s1 __asm__("$17") = D_80078E78; /* $s1: base, hoisted for the loop */
-    register s32 i __asm__("$5");                /* $a1: counter (pin fixes the i/d swap) */
+    s32 s0 = arg0;       /* $s0: arg0, crosses the call */
+    u8 *s1 = D_80078E78; /* $s1: base, hoisted for the loop */
+    register s32 i __asm__("$5");                /* $a1: counter (pin fixes the i/d swap) */  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u32 a2;
    s32 d;                                       /* $a0: natural alloc; load via $v0 temp */
    s32 v, last, hi, lo;
@@ -3826,14 +3826,14 @@ s32 func_80162438(s32 _unused0) {
    extern s16 D_800B5C74;

    u32 uVar2;
-    register u8 *base __asm__("$18");
-    register u8 *item __asm__("$17");
+    u8 *base;
+    u8 *item;

    base = &(*(u8 *)&D_800AF630);
    uVar2 = func_800291DC(0x12);
    if ((uVar2 & 0x8000) != 0) {
        if (D_800B5BD8 == 0) {
-            register u8 *t __asm__("$2") = base + 0x65A8;
+            register u8 *t __asm__("$2") = base + 0x65A8;  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
            item = t;
            D_801EDC08[0] = (s32)item;
            func_80024054(D_80192F98, D_801EDC14);
@@ -3844,7 +3844,7 @@ s32 func_80162438(s32 _unused0) {
            D_800B5BE2 = -D_800AF7BE / 2 + 0x28;
        }
        if (D_800B5C10 == 0) {
-            register u8 *t __asm__("$2") = base + 0x65E0;
+            register u8 *t __asm__("$2") = base + 0x65E0;  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
            item = t;
            D_801EDC08[1] = (s32)item;
            func_80024054(((u8 *)&D_80192FB0), D_801EDC3C);
@@ -3855,7 +3855,7 @@ s32 func_80162438(s32 _unused0) {
            D_800B5C1A = -D_800AF7BE / 2 + 0x30;
        }
        if (D_800B5C48 == 0) {
-            register u8 *t __asm__("$2") = base + 0x6618;
+            register u8 *t __asm__("$2") = base + 0x6618;  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
            item = t;
            D_801EDC08[2] = (s32)item;
            func_800242D0((s16)func_801626B8(), D_801EDC58, 0x84);
@@ -3930,10 +3930,10 @@ void func_801627E8(void)

    extern s32 D_8011F750;               /* canonical: engine_core.h `extern s32 D_8011F750;` (read here as a byte) */
    extern void (*D_80192FD0[])(void);   /* word-stride table of dispatch fn pointers */
-    register u8 *p __asm__("$4") = (u8 *)&D_8011F750;
+    register u8 *p __asm__("$4") = (u8 *)&D_8011F750;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 idx;

-    __asm__ __volatile__("" : "=r"(p) : "0"(p));   /* materialize &D_8011F750 into $a0 (defeat %lo-fold of the lbu) */
+    __asm__ __volatile__("" : "=r"(p) : "0"(p));   /* materialize &D_8011F750 into $a0 (defeat %lo-fold of the lbu) */  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
    idx = *p;
    if (idx != 0) {
        idx = idx - 1;
@@ -4113,7 +4113,7 @@ void func_80163EC8(s32 param_1) {
    s32 psVar6;
    s32 iVar8;
    s32 iVar7;
-    register s32 uVar5 __asm__("$2");   /* PIN (flagged): uVar5 -> $v0 */
+    register s32 uVar5 __asm__("$2");   /* PIN (flagged): uVar5 -> $v0 */  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u16 uVar4;
    u8 uVar3;

@@ -4379,9 +4379,9 @@ extern u8 D_801EDC6F;

 void func_80164BDC(s32 param_1)
 {
-    register s32 p1   __asm__("$17");  /* $s1 */
-    register s32 iVar1 __asm__("$16");  /* $s0 */
-    register s32 base __asm__("$18");  /* $s2 */
+    register s32 p1   __asm__("$17");  /* $s1 */  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 iVar1;  /* $s0 */
+    s32 base;  /* $s2 */

    p1 = param_1;
    iVar1 = ((s32 (*)(void))func_80146578)();
@@ -4527,9 +4527,9 @@ extern s32 D_801EDCA8;

 void func_801651B8(void * param_1)
 {
-    register s32 *puVar1 __asm__("$16"); /* $s0 */
-    register s32 iVar2 __asm__("$17");   /* $s1 */
-    register s32 p __asm__("$18");        /* $s2 */
+    register s32 *puVar1 __asm__("$16"); /* $s0 */  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 iVar2;   /* $s1 */
+    s32 p;        /* $s2 */

    p = param_1;
    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
@@ -4538,7 +4538,7 @@ void func_801651B8(void * param_1)
    do {
        if (puVar1[3] != 0) {
            s32 a0v = p;
-            __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
+            __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
            puVar1[3] = puVar1[3] + -1;
        }
@@ -4869,7 +4869,7 @@ s32 func_80166690(s32 param_1, s32 param_2)
    unsigned int w9, w7, w, t, w3b;
    int w3;
    short sVar10;
-    register unsigned int zr __asm__("$0");
+    register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B t3_tus1)

    blk = D_800AE620;
    i6 = (short)param_1;
@@ -4955,7 +4955,6 @@ s32 func_80166690(s32 param_1, s32 param_2)
                c.c32 = t; c.c22 = t; c.c31 = t; c.c21 = t;
            }

-            __asm__ __volatile__("" :: "r"(iVar3));
            func_80017758(&c, &blk);
            w3b = iVar3 - 1;
            iVar3 = w3b + zr;
@@ -5109,18 +5108,18 @@ s32 func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)
    extern s32 D_8011D030;
    extern unsigned char D_801EDD28[];

-    register int p2 __asm__("$20");             /* $s4 */
-    register int p3 __asm__("$17");             /* $s1 */
-    register int t2 __asm__("$5");              /* a1 */
-    register int t3 __asm__("$6");              /* a2 */
+    register int p2 __asm__("$20");             /* $s4 */  // !FAKE: pin $20 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    int p3;             /* $s1 */
+    register int t2 __asm__("$5");              /* a1 */  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    int t3;              /* a2 */
    unsigned short *puVar1;
    short iVar2;
    int eq;

    iVar2 = 0;
    puVar1 = ((unsigned short *)&D_8011D030);
-    t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2);
-    t3 = ((short)param_3); SHB(t3); p3 = t3;
+    t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2);  // !FAKE: launder via SHB — NEEDED DIFFERS; launder via SHB — NEEDED DIFFERS (P36 rung B t3_tus1)
+    t3 = ((short)param_3); SHB(t3); p3 = t3;  // !FAKE: launder via SHB — NEEDED DIFFERS (P36 rung B t3_tus1)
    eq = (p2 == p3);
    do {
        if ((puVar1 != ((unsigned short *)param_1)) &&
@@ -5169,17 +5168,17 @@ s32 func_801670E4(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
    extern s32 D_801269AC;
    extern u16 D_80126CE0;
    Fr_801670E4 f;
-    register u8 *p   __asm__("$18");   /* $s2 */
-    register s32 ent __asm__("$19");   /* $s3 */
+    u8 *p;   /* $s2 */
+    s32 ent;   /* $s3 */
    s16 i;
    s32 d;
    s32 node;
    u16 c;
    u8 cv;
    u8 cv2;
-    register s32 gA __asm__("$2");
-    register s32 cxv __asm__("$4");
-    register s32 czv __asm__("$5");
+    register s32 gA __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s32 cxv __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 czv;
    u8 *vc;
    u8 *ap;
    u8 *mp;
@@ -5197,12 +5196,12 @@ s32 func_801670E4(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
    f.col[1].b = 0x70;
    cv = *(u8 *)(ent + 0x12);
    f.cx = arg1;
-    __asm__ __volatile__("");
+    __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
    va = (u8 *)&f.cx;
-    __asm__ __volatile__("" : "=r"(va) : "0"(va));
+    __asm__ __volatile__("" : "=r"(va) : "0"(va));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
    f.cy = arg2;
    vb = va;
-    __asm__ __volatile__("" : "=r"(vb) : "0"(vb));
+    __asm__ __volatile__("" : "=r"(vb) : "0"(vb));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
    p = D_80193330;
    i = 0;
    f.col[0].b = 0;
@@ -5272,10 +5271,10 @@ s32 func_801670E4(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {

    if (*(s32 *)(ent + 0x30) > 0) {
        vc = (u8 *)&f.cx;
-        __asm__ __volatile__("" : "=r"(vc) : "0"(vc));
+        __asm__ __volatile__("" : "=r"(vc) : "0"(vc));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
        mp = f.m1;
        ap = mp;
-        __asm__ __volatile__("" : "=r"(ap) : "0"(ap));
+        __asm__ __volatile__("" : "=r"(ap) : "0"(ap));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
        p = D_80193344;
        i = 0;
        d = (s16)f.a8[0] >> 6;
@@ -5369,8 +5368,8 @@ s32 func_80167AE0(s32 param_1, s32 param_2, s32 param_3) {
    struct Fr_80167AE0 fr;
    u8 *p;
    s32 i;
-    register s32 t __asm__("$2");
-    register s32 zr __asm__("$0");
+    s32 t;
+    register s32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 flags;

    func_80168070(param_1, ((s16 *)param_2), ((s16 *)param_3), fr.matrix);
@@ -5649,7 +5648,7 @@ void func_80168828()
    extern u16 D_80193410[];


-    register s32 a0v __asm__("$4");
+    register s32 a0v __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 param_1 = a0v;
    Thing_80168828_80168828 thing;
    s16 matA[16];
@@ -5657,7 +5656,7 @@ void func_80168828()
    s16 svec[4];
    u16 *p;
    short i;
-    register s32 c40 __asm__("$3");   /* $v1: hold the CSE'd 0x40 (else gcc folds to $v0 immediate) */
+    register s32 c40 __asm__("$3");   /* $v1: hold the CSE'd 0x40 (else gcc folds to $v0 immediate) */  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)

    c40 = 0x40;
    thing.f04 = 2;
@@ -5962,8 +5961,8 @@ void func_8016A290(s32 param_1, void *param_2, void *param_3) {
    struct Fr_8016A290 fr;
    u8 *p;
    s32 i;
-    register s32 t __asm__("$2");
-    register s32 zr __asm__("$0");
+    s32 t;
+    register s32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 flags;
    s32 iVar3;

@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
    u32 uVar1;
    s16 iVar2;
    s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)

    dp = &D_800AF648;
    func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
        prim.v2 = prim.v3 = 0x1d8;
        sxy = sy + sxy;
        prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
        prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
        prim.code = (&D_80193590)[*(s32 *)(param_1 + 0x2c)];
        if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                func_80016ED4(&prim);
                uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                xtmp = prim.ax;
                prim.cx = prim.ax = xtmp - 8;
                prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
    int iVar1;
    int uVar2;
-    volatile int buf[2];
+    int buf[2];

    ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801EDFC8);
    if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);

 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 s2;
+    u8 *s0;
    u16 buf[3];
    s16 *pBCC;
    s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801EE0C4[];

 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
    u16 buf[3];
    s16 v;
    s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
    extern u8 D_801EE120[];
    extern u8 D_801EE1E0;

-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B t3_tus1)
    int iVar5;
    int iVar6;
    u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
  unsigned int w3b;
  short count;
  short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B t3_tus1)
  mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
  count = 0;
  p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
    if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
        unsigned short uVar7 = 0;
        u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
        s32 base;
        do {
            if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
        *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
        func_8016E3CC(((void *)param_1));
        {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
            t10 = 0x10;
            *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
            *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
        *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
        *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
        *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
        sVar1 = 4;
    }
    *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
    Prim_8016E7C8 prim;
    MATRIX_8016E7C8 m;
    SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */

    ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
    m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
    extern u8 *D_801937C8[];
    extern u8 D_801937E0[];
    extern u16 D_801937E4[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B t3_tus1)
    int i;
    int c;
    u8 *buf;
@@ -2815,19 +2815,19 @@ void func_80175AB8(param_1)
    u8 *arr;
    u32 *slot;
    u32 *p;
-    register u32 *a0v __asm__("$4");
+    register u32 *a0v __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u32 uv;
    s32 k;
    s16 q;
    s32 r1;
    s32 a2v;
-    register s32 sum __asm__("$5");
+    register s32 sum __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 r2;
    s32 idx;
    s16 sv;

    p = (u32 *)(D_800AF638[param_1].g0 + D_800AF634[param_1].g0 * 4);
-    __asm__("" : "=r"(base) : "0"(&D_8011F7F0));               /* L1 */
+    __asm__("" : "=r"(base) : "0"(&D_8011F7F0));               /* L1 */  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
    arr = base - 0x48;
    slot = (u32 *)(param_1 * 4 + (s32)arr);
    *(volatile u32 *)&slot[6] = (u32)p;                        /* L2 */
@@ -2856,7 +2856,7 @@ void func_80175AB8(param_1)
            (s16)(*(u16 *)(base - 0x32) + 0x65));
    idx = D_8011F83A & 0x7F;
    D_8011F83A = idx;
-    __asm__ __volatile__("" ::: "memory");
+    __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
    ((void (*)(s32, u8 *))func_80024054)(((s32 *)D_80193B4C)[idx], local);
    p = func_80178298(p, local,
                      (s16)(*(u16 *)(base - 0x34) + 0x39),
@@ -2993,7 +2993,7 @@ void func_80175DA8(param_1)
    fl = *(s16 *)(base + 0x1E) & 0x8000;
    /* §5a zero-byte sched fence: without it sched1 hoists the `la D_800D43D4`
       into the lh's load-delay slot, dropping the target's nop (-1 ins). */
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
    arg = (s32)&D_800D43D4;
    if (fl != 0) {
        arg = (s32)&D_800D4414;
@@ -3314,10 +3314,10 @@ void func_80176734(s32 param_1)
    extern void func_801775E0(s32 param_1, s32 param_2);

    s32 st, cach, flag, cur;
-    register s32 chg  __asm__("$21");        /* L7 */
-    register s32 chg2 __asm__("$16");        /* L7 */
+    s32 chg;        /* L7 */
+    register s32 chg2 __asm__("$16");        /* L7 */  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 amp;                                 /* $s0, disjoint from chg2 */
-    register u16 tgt __asm__("$5");          /* L7 */
+    register u16 tgt __asm__("$5");          /* L7 */  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 pv;                                  /* L6: the param copy that owns $s6 */
    s32 ix;                                  /* L6: block A's index, hoisted out of the block */
    u8  dum[8];                              /* L5: dead frame slot (target .frame vars=8) */
@@ -3331,7 +3331,7 @@ void func_80176734(s32 param_1)

    /* ---- block A: pulse byte ---- */
    {
-        register s32 p __asm__("$5");        /* L7 */
+        register s32 p __asm__("$5");        /* L7 */  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
        u8 *q;
        p = *(s32 *)(ix + 0x28);
        q = (u8 *)(p + 0x3C);                /* L2: must live in the entry BB */
@@ -3351,7 +3351,7 @@ void func_80176734(s32 param_1)

    /* ---- block B: 0x48 animation already running ---- */
    if (*(u8 *)(flag + 0x48) != 0) {
-        register s32 pp __asm__("$5");       /* L7 */
+        register s32 pp __asm__("$5");       /* L7 */  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
        pp = *(s32 *)(((pv << 16) >> 14) + st + 0x28);
        *(u8 *)(pp + 0xD) = D_80193BE8[*(u8 *)(flag + 0x48)];
        if (*(u8 *)(flag + 0x48) < 4) {
@@ -3382,7 +3382,7 @@ void func_80176734(s32 param_1)
        }
    /* ---- block C: 0x48 changed -> start the animation ---- */
    } else if (*(u8 *)(cach + 0x48) != *(u8 *)(cur + 0x48)) {
-        register s32 pp __asm__("$5");       /* L7 */
+        register s32 pp __asm__("$5");       /* L7 */  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
        u8 k;                                /* L1: gives the `andi $v1,$v1,0xFF` index mask */
        if (*(u8 *)(cach + 0x48) == 0 && *(u8 *)(cur + 0x48) != 0)
            *(u8 *)(flag + 0x48) = 5;
@@ -3432,7 +3432,7 @@ L9C0:
    {
        u8 m = D_800B9A13;                   /* L1 */
        if (m != 3) {                        /* inverted: `chg = 0` belongs out of line */
-            register s32 t __asm__("$2");    /* L3a: pin + 2 uses keeps `chg = t` alive */
+            register s32 t __asm__("$2");    /* L3a: pin + 2 uses keeps `chg = t` alive */  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
            t = (*(u8 *)(st + 7) != m);
            chg = t;
            if (t != 0) *(u8 *)(st + 7) = m;
@@ -3462,7 +3462,7 @@ L9C0:
    {
        s32 av;
        av = amp;
-        __asm__("" : "=r"(av) : "0"(av));    /* L3b: keeps the `move $v0,$s0` at the merge */
+        __asm__("" : "=r"(av) : "0"(av));    /* L3b: keeps the `move $v0,$s0` at the merge */  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
        if (av != 0) {
            *(u8 *)(flag + 0x47) = 1;
            *(u8 *)(cach + 0x4B) = *(u8 *)(cur + 0x48) | 0xF0;
@@ -3478,11 +3478,11 @@ L9C0:
    tgt = *(u16 *)&D_80126CE0;
    if (D_80126CE0 != 0) {
        u16 v;                               /* dies at the mask -> destructive `andi $v1,$v1` */
-        register s32 t __asm__("$2");
+        register s32 t __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
        v = tgt;
        *(u8 *)(cach + 0x4B) = v;
        t = (*(u8 *)(cach + 0x47) != (v & 0xFF));
-        __asm__("" : "=r"(t) : "0"(t));      /* L3b */
+        __asm__("" : "=r"(t) : "0"(t));      /* L3b */  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
        chg2 = t;
    } else {
        u32 cv = *(u8 *)(cach + 0x47);       /* L8: one load, two compares, no re-mask */
@@ -3498,12 +3498,12 @@ L9C0:
    /* ---- block J: nothing-changed fast path.  The target re-tests chg after the flag load;
       the fence below is what stops cse from folding that second test away. ---- */
    {
-    register s32 c __asm__("$3");
+    register s32 c __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
    c = chg;
    if (chg2 != 0) goto Lbig;
    if (c != 0) goto Lbig;
    if (*(u8 *)(flag + 0x47) == 0) goto Ltail;
-    __asm__("" : "=r"(c) : "0"(c));          /* L3b */
+    __asm__("" : "=r"(c) : "0"(c));          /* L3b */  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
    if (c == 0) goto Lzero;
    }
 Lbig:
@@ -3638,19 +3638,19 @@ s32 y;
 {

    extern u8 D_80193C10[];
-register u32 bb __asm__("$14");
+u32 bb;
  u32 *q;
-register u32 v __asm__("$25");
-register u32 cl __asm__("$3");
-register u32 cs __asm__("$5");
-register u32 ca __asm__("$8");
+u32 v;
+register u32 cl __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
+register u32 cs __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
+u32 ca;
  s16 i;
  u32 mk1;
  u32 cc1;
  u32 flag;
-register u32 nn __asm__("$2");
+register u32 nn __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
  u32 n;
-register u32 t __asm__("$13");
+u32 t;
  u32 col;
  u32 uv;
  u32 tt;
@@ -3661,18 +3661,18 @@ register u32 t __asm__("$13");
  u32 g;
  u32 gg;
  u32 w3;
-register u32 yr __asm__("$16");
-register u32 yt __asm__("$4");
-register u32 tr __asm__("$21");
-register u32 xr __asm__("$17");
-register u32 c3 __asm__("$18");
-register s32 ff __asm__("$19");
-register s32 two __asm__("$20");
+register u32 yr __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
+register u32 yt __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
+register u32 tr __asm__("$21");  // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung B t3_tus1)
+register u32 xr __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B t3_tus1)
+u32 c3;
+s32 ff;
+s32 two;
  yt = y;
  tr = tbli;
-__asm__("" : "=r"(tr) : "0"(tr));
+__asm__("" : "=r"(tr) : "0"(tr));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
  xr = x;
-__asm__("" : "=r"(xr) : "0"(xr));
+__asm__("" : "=r"(xr) : "0"(xr));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
  mk1 = 0xFFFFFF;
  cc1 = 0x74808080;
  bb = bits;
@@ -3690,11 +3690,11 @@ __asm__("" : "=r"(xr) : "0"(xr));
  x2 = (x + 5) & 0xFFFF;
  p[1] = cc1;
  yr = yt;
-__asm__("" : "=r"(yr) : "0"(yr));
+__asm__("" : "=r"(yr) : "0"(yr));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
  yt = (s16) yt;
  cs = (yt + 1) << 16;
  w = cs | x1;
-__asm__("" : "=r"(w) : "0"(w));
+__asm__("" : "=r"(w) : "0"(w));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
  cl = ((v << 6) | 0x4016) << 16;
  p[2] = w;
  p[3] = cl | 0x1800;
@@ -3728,13 +3728,12 @@ __asm__("" : "=r"(w) : "0"(w));

  }
  p = q;
-__asm__("" : "=r"(v) : "0"(v));
  g = (((u32) (p - 5)) & 0xFFFFFF) | 0x3000000;
-__asm__ __volatile__("");
+__asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
  cs = yr << 16;
  p[0] = g;
  w3 = cs | ((xr + 0x2A) & 0xFFFF);
-__asm__ __volatile__("");
+__asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
  cl = ((v << 6) | 0x4016) << 16;
  uv = ((s16) tr) << 4;
  p[2] = w3;
@@ -3743,7 +3742,7 @@ __asm__ __volatile__("");
  p[3] = cl | tt;
  p += 5;
  p[0] = (((u32) (p - 5)) & 0xFFFFFF) | 0x3000000;
-__asm__ __volatile__("");
+__asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
  cs = cs | ((xr + 0x32) & 0xFFFF);
  uv = uv | 0x1008;
  cl = cl | uv;
@@ -3751,7 +3750,7 @@ __asm__ __volatile__("");
  p[2] = cs;
  p[3] = cl;
  p += 5;
-__asm__("" :: "r"(tr), "r"(xr));
+__asm__("" :: "r"(tr), "r"(xr));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B t3_tus1)
  return p;
 }

@@ -3861,8 +3860,8 @@ void func_80178840(int param_1) {

    extern int D_80193C70;
    extern int D_80193C7C[];
-    register int p __asm__("$16");
-    register int s1byte __asm__("$17");
+    register int p __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    int s1byte;
    p = param_1;
    if ((*(unsigned short *)(p + 0x5c) & 1) != 0) {
        s1byte = *(unsigned char *)(p + 0x5e);
@@ -3885,7 +3884,7 @@ extern s16 D_801F1638;

 int func_80178970(void)
 {
-    register int r __asm__("$2");
+    register int r __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
    int v;

    v = ((s32 (*)(void))func_801789AC)();
@@ -3504,7 +3504,7 @@ int func_8017A3D8(void)
        return 0;
    case 100:
    {
-        register int a __asm__("$4");
+        register int a __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
        a = D_801EEC90;
        if (a != -1) {
            return func_8001AAA0() != 0;
@@ -2626,8 +2626,8 @@ extern s16 D_801F160A;
 extern s16 D_801F1614;

 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801F1608;
+    s32 pv = param_1;
+    s16 *g = &D_801F1608;

    switch (g[0]) {
    case 0:
@@ -2772,8 +2772,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
    u8 buf[16];

    if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
        *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
        *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
    } else {
@@ -2918,8 +2918,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
    u8 buf[16];

    if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
        *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
        *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
    } else {
@@ -2943,7 +2943,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
            v78C = *p78C;
            v78E = D_801EECCE;
            v790 = D_801EECD0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
            D_801F1638 = 1;
            D_801EEC5C = 0x1E;
            D_80126990 = v794;
@@ -3203,8 +3203,8 @@ extern void (*D_801EECA4[10])(int);

 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);

    i = 0;
    p = D_801EECA4;
@@ -3995,7 +3995,7 @@ void func_8017D000(void *a0) {
    if (*(s16 *)((s32)a0 + 0xFC) == 0xB) {
        s32 f = *(s32 *)((s32)a0 + 0x1C);
        s32 v = -(f & 1) & 0xC0;
-        __asm__("" : "=r"(v) : "0"(v));
+        __asm__("" : "=r"(v) : "0"(v));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
        f = f + 1;
        *(s32 *)((s32)a0 + 0x1C) = f;
        D_801EED51 = v;
@@ -4019,16 +4019,15 @@ void func_8017D000(void *a0) {
        D_801EED55 = c * 255 / h;
        D_801EED4D = c * 255 / h;
    } else {
-        register u8 *q __asm__("$6");
+        u8 *q;
        u16 bs;
        s32 x;
        s16 y;
        t = (c - h) * 255 / h;
        q = &D_801EED4D;
-        __asm__("" : "=r"(q) : "0"(q));
+        __asm__("" : "=r"(q) : "0"(q));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
        bs = (u16)D_801EED28;
        x = bs + hw;
-        __asm__("" :: "r"(hw));
        y = x - 4;
        D_801EED55 = 0xFF;
        *q = 0xFF;
@@ -4044,7 +4043,7 @@ void func_8017D000(void *a0) {
    }

    p = &D_801EEDA8;
-    __asm__("" : "=r"(p) : "0"(p));
+    __asm__("" : "=r"(p) : "0"(p));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
    D_801EED98 = *(u16 *)((s32)p - 0x18) + (u16)D_80193E88;
    *p = D_801EED98 - 4;
    w = (void *)((s32)p - 0x80);
@@ -2888,7 +2888,7 @@ void func_8017D494(s32 arg0)
        gte_rtps();
        gte_stsxy(&sxy[3]);
        gte_ldv3c(&box[4]);
-        __asm__ volatile ("");   /* §45-B live-length slider: +1 static insn splits the 228/230 allocno-priority tie (498/498 -> 497/498) */
+        __asm__ volatile ("");   /* §45-B live-length slider: +1 static insn splits the 228/230 allocno-priority tie (498/498 -> 497/498) */  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
        gte_rtpt();
        gte_stsxy3(&sxy[4], &sxy[5], &sxy[6]);
        gte_ldv0(&box[7]);
@@ -3262,7 +3262,7 @@ void func_8017E558(void *arg0) {
    s32 cnt2;
    s32 i;
    s32 j;
-    register s32 base __asm__("$5");
+    register s32 base __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 p;
    s32 vel;
    s32 pos;
@@ -3272,7 +3272,7 @@ void func_8017E558(void *arg0) {
    cnt2 = 0;
    for (i = 0; i < 8; i++) {
        {
-            register s32 sym __asm__("$2") = (s32)((u8 *)D_801EEDC8);
+            register s32 sym __asm__("$2") = (s32)((u8 *)D_801EEDC8);  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
            base = sym + i * 0x1D0;
        }
        if (*(s16 *)(base) == 0) {
@@ -3451,7 +3451,7 @@ extern s32 D_80193F00;

 void func_8017EA44(s32 a0)
 {
-    register s32 s0 asm("$16") = a0;
+    s32 s0 = a0;
    s32 a2, a3;
    s32 temp;

@@ -3566,7 +3566,7 @@ extern s32 D_80193F30;

 void func_8017ECD8(s32 a0)
 {
-    register s32 s0 asm("$16") = a0;
+    s32 s0 = a0;
    s32 a2, a3;

    func_80149020((s32 *)s0);
@@ -3640,7 +3640,7 @@ extern s32 D_80193F58;

 void func_8017EE50(s32 a0) {
    s32 a1;
-    volatile s32 pad[12];
+    s32 pad[12];

    a1 = func_800D21C4(a0, (s32)&D_80193F58, 0x2B);
    *(s32 *)(a0 + 0x20) = a1;
@@ -3997,7 +3997,7 @@ s32 func_8017F8E0(void *a0) {
    u16 global;
    s32 result;
    s32 cmp;
-    register s32 zr __asm__("$0");
+    register s32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B t3_tus1)

    val = *(u8 *)((s32)a0 + 3) - 2;
    *(u8 *)((s32)a0 + 3) = val;
@@ -4006,7 +4006,7 @@ s32 func_8017F8E0(void *a0) {
        goto ret1;
    }

-    __asm__ __volatile__("" : "=r"(val) : "0"(val));
+    __asm__ __volatile__("" : "=r"(val) : "0"(val));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)

    global = D_800B99DA;

@@ -4797,8 +4797,8 @@ void func_80180970(void *a0)
    D_801EFD40 &= 0xFFFB;
    func_801863D4(s0);
    {
-        register void *t __asm__("$4");
-        __asm__ volatile("addu %0, %1, $0" : "=&r"(t) : "r"(s0));
+        void *t;
+        t = s0;
        *(s16 *)((u8 *)t + 0x6) = -0x40;
        *(s16 *)((u8 *)t + 0xE) = 0x40;
        *(s16 *)((u8 *)t + 0xA) = -0x200;
@@ -4959,8 +4959,8 @@ void func_80180B24(s32 s0)
             * yields the target's load*3 / add*3 / store*3 order. */
            ta = *(u16 *)(s0 + 0xF4) + 1;
            tb = *(u16 *)(s0 + 0xF2) + 1;
-            __asm__("" : "=r"(ta) : "0"(ta));
-            __asm__("" : "=r"(tb) : "0"(tb));
+            __asm__("" : "=r"(ta) : "0"(ta));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
+            __asm__("" : "=r"(tb) : "0"(tb));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
            *(u16 *)(s0 + 0xF4) = ta;
            *(u16 *)(s0 + 0xF2) = tb;
            *(u16 *)(s0 + 0x34) = *(u16 *)(s0 + 0x34) + 1;
@@ -4973,7 +4973,7 @@ void func_80180B24(s32 s0)
            a = p->unkF4 + 1;
            p->unkF4 = a + (p->unkF2 & 1);
            tc = p->unk34 + 1;
-            __asm__("" : "=r"(tc) : "0"(tc));
+            __asm__("" : "=r"(tc) : "0"(tc));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
            p->unk34 = tc;
            break;
        case 2:
@@ -5912,9 +5912,9 @@ void func_8018214C(s32 a0, s32 a1) {
    extern void func_80132EC4(s32 a0, s32 a1);
    extern struct { s32 f0; s32 f1; s32 f2; } D_801944E8[];

-    register s32 s0 __asm__("$16") = a0;
-    register s32 v0 __asm__("$2");
-    register s32 v1 __asm__("$3");
+    s32 s0 = a0;
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 v1;

    if (a1 < 0) {
        v0 = rand() & 1;
@@ -5922,7 +5922,7 @@ void func_8018214C(s32 a0, s32 a1) {
        v0 = a1 & 1;
    }
    *(s16 *)(s0 + 0xE2) = v0;
-    __asm__("" ::: "memory");
+    __asm__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)

    v0 = (s32)(*(s16 *)(s0 + 0xE2));
    func_80132EC4(D_801944E8[v0].f0, 0x2);
@@ -6065,7 +6065,7 @@ void func_801823C0(void *a0)
    extern void func_8012AD44(s32 *a0, s16 a1);
    extern struct { s32 f0; s32 f1; s32 f2; } D_801944EC[];

-    register s32 s0 __asm__("$16") = (s32)a0;
+    s32 s0 = (s32)a0;

    func_8018637C((s32)a0, D_801944EC[*(s16 *)(s0 + 0xE2)].f0);
    func_80186BF8();
@@ -6399,7 +6399,7 @@ void func_80182AF8(s32 a0) {
    extern void func_8012AD44(s32 *a0, s16 a1);
    extern s32 D_80194530[];

-    register s32 s0 __asm__("$16") = a0;
+    s32 s0 = a0;
    s32 idx;

    func_80186EBC(a0);
@@ -6472,8 +6472,8 @@ L_BF8:
    if (((s32 (*)(int, int))func_801833D4)((int)self, 0) == 0) {
        goto L_D14;
    } else {
-        register u16 f __asm__("$3") = *(u16 *)(self + 0xF4);
-        register s32 off __asm__("$5");
+        register u16 f __asm__("$3") = *(u16 *)(self + 0xF4);  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
+        register s32 off __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
        u8 *addr;
        f = f + 1;
        off = (s16)f * 8;
@@ -6533,7 +6533,7 @@ extern s32 D_80194554;
 extern s32 D_80194550;

 void func_80182D34(s32 a0) {
-    register s32 s0 __asm__("$16") = a0;
+    s32 s0 = a0;
    s32 v0;
    s32 v1;

@@ -6709,9 +6709,9 @@ s32 func_80183058(s32 *a0) {
    s32 s1 = (s32)a0;
    void *s0;
    s32 frame_pad[2];
-    register s32 v0 __asm__("$2");
-    register s32 v1 __asm__("$3");
-    register s32 t4 __asm__("$4");
+    s32 v0;
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s32 t4 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
    (void)&frame_pad;

    s0 = (void *)aFC4C;
@@ -6720,14 +6720,14 @@ s32 func_80183058(s32 *a0) {

    v0 = *(s16 *)(s1 + 0xF2);
    v1 = v0;
-    __asm__("" : "=r"(v0) : "0"(v0));
+    __asm__("" : "=r"(v0) : "0"(v0));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
    if (v0 < 0x60) {
        v0 = v1 + 1;
    } else {
        v0 = v1 + 8;
    }
    *(s16 *)(s1 + 0xF2) = v0;
-    __asm__("" ::: "memory");
+    __asm__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)

    v0 = *(s16 *)(s1 + 0xF2);
    if (v0 >= 0x100) {
@@ -6752,7 +6752,6 @@ s32 func_80183058(s32 *a0) {
    return 1;

 ret0:
-    __asm__ __volatile__("" ::: "memory");
    return 0;
 }

@@ -6807,7 +6806,7 @@ extern void *D_801EFD1C;
 s32 func_8018315C(s32 *a0) {
    s32 s0;
    s32 v0;
-    register s32 v1 __asm__("$3");
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 frame_pad[2];
    extern int func_8001AAA0(void);
    (void)&frame_pad;
@@ -6852,7 +6851,7 @@ s32 func_8018315C(s32 *a0) {

    v0 = *(s16 *)(s0 + 0xF2);
    if (v0 != 0) {
-        register s32 zr __asm__("$0");
+        register s32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B t3_tus1)
        v1 = v0 + zr;
        v0 = v1 - 2;
        *(s16 *)(s0 + 0xF2) = v0;
@@ -6995,7 +6994,7 @@ s32 impl_801833D4(s32 a0, s32 a1)
       far below; gcc puts its param->hardreg move in the branch's delay slot rather than up
       front. A plain local didn't reproduce that ordering vs. the s4=0 init -- pin it to $19
       ($s3, its natural hardreg) so the mid-fn scheduling matches (cookbook lever B/pin). */
-    register s32 r1 __asm__("$19") = a1;
+    register s32 r1 __asm__("$19") = a1;  // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u16 s0;
    s32 obj;
    s32 s4;
@@ -7106,7 +7105,7 @@ void func_801835B0(s32 a0)
    t = p[0];
    u = t;
    if (t < 0) {
-        __asm__("" : "=r"(u) : "0"(u));
+        __asm__("" : "=r"(u) : "0"(u));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
        m = -u;
    } else {
        m = u;
@@ -7116,7 +7115,7 @@ void func_801835B0(s32 a0)
    t = p[1];
    u = t;
    if (t < 0) {
-        __asm__("" : "=r"(u) : "0"(u));
+        __asm__("" : "=r"(u) : "0"(u));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
        c = -u;
    } else {
        c = u;
@@ -7129,7 +7128,7 @@ void func_801835B0(s32 a0)
    t = p[2];
    u = t;
    if (t < 0) {
-        __asm__("" : "=r"(u) : "0"(u));
+        __asm__("" : "=r"(u) : "0"(u));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
        c = -u;
    } else {
        c = u;
@@ -7161,13 +7160,13 @@ void func_801835B0(s32 a0)
 */
 s32 func_801836D4(void *a0, void *a1) {
    s16 buf[16];                        /* dead-store scratch: forces frame 0x28 */
-    register u16 b __asm__("$3");
+    register u16 b __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u16 a;
    s16 diff;
    s16 v1;
-    register s32 tw __asm__("$2");      /* SImode -> lh */
-    register s16 t16 __asm__("$5");     /* HImode copy of tw -> addu $a1,$v0,$0 */
-    register s16 xr __asm__("$2");      /* xor result back in $v0 */
+    register s32 tw __asm__("$2");      /* SImode -> lh */  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s16 t16;     /* HImode copy of tw -> addu $a1,$v0,$0 */
+    s16 xr;      /* xor result back in $v0 */

    if (*(s16 *)((s32)a0 + 0xEA) != 0) {
        *(s16 *)((s32)a0 + 0xEA) = *(s16 *)((s32)a0 + 0xEA) - 1;
@@ -7513,7 +7512,7 @@ void aF80183E20(void *a0) {
        *(u16 *)((u8 *)a0 + 0x60) = 0;
        v0 = v0 - v1;
        *(u16 *)((u8 *)a0 + 0x76) = v0;
-        __asm__("":::"memory");
+        __asm__("":::"memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
        v1b = *(s16 *)((u8 *)a0 + 0x76);
        D_801EFD40 = flags & 0xFF7F;
        if (v1b < 0) {
@@ -7568,13 +7567,13 @@ void func_80183F10(void)
    Blk32_80183F10 m;
    s32 vecB[4];
    s32 out[4];
-    register void *mp __asm__("$18");
-    register void *op __asm__("$17");
-    register void *mp2 __asm__("$19");
-    register void *op2 __asm__("$18");
-    register s32 obj __asm__("$20");
-    register s32 i __asm__("$16");
-    register s32 ang __asm__("$17");
+    register void *mp __asm__("$18");  // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    void *op;
+    void *mp2;
+    void *op2;
+    s32 obj;
+    s32 i;
+    s32 ang;

    i = 0;
    mp = &m;
@@ -7758,8 +7757,8 @@ extern void *D_801947D8[];
 extern u16 D_801EFD40;

 void func_8018445C(s32 a0) {
-    register s32 *s0 __asm__("$16") = (s32 *)a0;
-    register s32 v0_idx __asm__("$2");
+    s32 *s0 = (s32 *)a0;
+    s32 v0_idx;

    // Load u16 from offset 0x2, multiply by 4 for array index
    v0_idx = *(u16 *)((u8 *)s0 + 0x2);
@@ -7959,7 +7958,7 @@ void func_80184840(void) {
    extern s32 D_801EFC48;
    extern s32 D_801EFC4C;
    extern s32 D_801EFC54;
-    register s32 p __asm__("$4");
+    s32 p;
    s32 obj;

    p = D_801EFC4C;
@@ -8020,9 +8019,9 @@ void func_8018489C(s32 arg0, s32 arg1, s32 arg2)
 {
    extern u16 aEFD24 __asm__("D_801EFD24");

-    register s32 z __asm__("$8");        /* arg2, kept in the caller-saved $t0 */
-    register s32 a1v __asm__("$5");      /* the INCOMING $a1, i.e. arg1 pre-copy — lever 1 */
-    register u8 *base __asm__("$2");     /* multi-set home for the symbol — lever 2 */
+    s32 z;        /* arg2, kept in the caller-saved $t0 */
+    register s32 a1v __asm__("$5");      /* the INCOMING $a1, i.e. arg1 pre-copy — lever 1 */  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register u8 *base __asm__("$2");     /* multi-set home for the symbol — lever 2 */  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s16 sp10[3];
    s16 sp18[3];
    u8 *p;
@@ -8129,12 +8128,12 @@ s32 func_80184978(s32 arg0, s32 arg1, s32 arg2)
        }

        if (D_801EFD40 & 0x200) {
-            register s32 m0 __asm__("$4");  /* lever 2: materialise the arg constants */
-            register s32 m1 __asm__("$5");  /* above the fence, see header */
+            register s32 m0 __asm__("$4");  /* lever 2: materialise the arg constants */  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
+            register s32 m1 __asm__("$5");  /* above the fence, see header */  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
            s16 fld;
            m0 = 1;
            m1 = 0x4017;
-            __asm__ __volatile__("" ::: "memory");
+            __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
            fld = *(s16 *)(*(s32 *)(arg0 + 0x20) + 0x12);
            func_8012F568(m0, m1, fld, code, &b, D_801152A8);
            v0 = func_8012B8A4((s16 *)arg0);
@@ -8145,12 +8144,12 @@ s32 func_80184978(s32 arg0, s32 arg1, s32 arg2)
                *(s16 *)(outp + 0x42) = 0xA00;
            }
        } else {
-            register s32 m0 __asm__("$4");
-            register s32 m1 __asm__("$5");
+            register s32 m0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
+            register s32 m1 __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
            s16 fld;
            m0 = 1;
            m1 = 0x4013;
-            __asm__ __volatile__("" ::: "memory");
+            __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
            fld = *(s16 *)(*(s32 *)(arg0 + 0x20) + 0x12);
            func_8012F568(m0, m1, fld, code, &b, D_801152A8);
        }
@@ -8172,7 +8171,7 @@ void func_80184ABC(s32 a0)
    if ((u32)a0 < 0x14) {
        i = a0 + 1;
        if (i < 0x15) {
-            register s32 base __asm__("$3");
+            s32 base;

            base = (s32)((s32 *)&D_801EFC4C);
            p = (s32 *)(base + i * 4);
@@ -8216,8 +8215,8 @@ void func_80184BAC(void *a0, void *a1)
    s16 *wp;
    u16 step;
    s32 mask;
-    register s32 off __asm__("$2");
-    register u16 flag __asm__("$3");
+    register s32 off __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    u16 flag;

    idx = *(u8 *)((s32)a0 + 0x10B);
    flag = D_801EFD40;
@@ -8260,10 +8259,10 @@ extern void func_80185FAC(void);
 extern void func_801859E4(s32, u16*);

 void func_80184CCC(s32 a0, s32 a1) {
-    register s32 s0 __asm__("$16");
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register s32 s3 __asm__("$19");
+    s32 s0;
+    s32 s1;
+    s32 s2;
+    s32 s3;

    s2 = a1;

@@ -8323,7 +8322,7 @@ extern void func_80185648();
   so the definition adopts s32. */
 void func_80184DB8(s32 a0) {
    s32 i;
-    register s32 obj __asm__("$4");
+    register s32 obj __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u16 buf[3];

    for (i = 0; i < D_801EFD3C; i++) {
@@ -8393,8 +8392,8 @@ void func_80185020(s32 start, s32 end)
    extern s32 D_801EFC4C[];
    u32 i;
    s32 n;
-    register s32 ep __asm__("$6");
-    register s32 sp __asm__("$9");
+    s32 ep;
+    s32 sp;
    s32 d;
    s32 x, y, z;
    s32 dx, dy, dz;
@@ -8456,9 +8455,9 @@ void func_80185214(s32 a0)
    extern s32 D_801EFC48;
    extern u8 D_80194724[];
    extern void func_80185A18(s32 idx, s32 val);
-    register s32 s0 __asm__("$16");
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
+    register s32 s0 __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 s1;
+    s32 s2;
    s32 c;

    s2 = a0;
@@ -8672,19 +8671,19 @@ void func_80185648(u32 a0)
    extern void func_80184BAC(void *, void *);
    extern void func_801858DC(void *);

-    volatile s32 pad[8];   /* dead 0x20 slot — reproduces the target's frame gap */
+    s32 pad[8];   /* dead 0x20 slot — reproduces the target's frame gap */
    MTX8_80185648 m;
    s32 r[3];
    s32 flag;
    s32 w0, w1, w2, sh, c;
-    register s32 t __asm__("$2");
-    register s32 s0 __asm__("$16");
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register s32 s3 __asm__("$19");
-    register s32 s4 __asm__("$20");
-    register s32 s5 __asm__("$21");
-    register s32 s6 __asm__("$22");
+    register s32 t __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 s0;
+    s32 s1;
+    s32 s2;
+    s32 s3;
+    s32 s4;
+    register s32 s5 __asm__("$21");  // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 s6;

    if (a0 >= 0x14) return;
    s2 = a0 + 1;
@@ -8799,7 +8798,7 @@ void func_80185960(s32 target, u16 *cur, s32 step)
    if ((s16)diff < 0) {
        mag = -diff;
    }
-    __asm__ __volatile__("" : "=r"(diff) : "0"(diff) : "memory");
+    __asm__ __volatile__("" : "=r"(diff) : "0"(diff) : "memory");  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
    if ((s16)mag > (u16)step) {
        if ((s16)diff < 0) {
            *cur = *cur - step;
@@ -8839,8 +8838,8 @@ s16 func_80185A30(s32 param_1) {
    s32 iVar5;
    s32 iVar2;
    s32 uVar3;
-    register s16 *p58 __asm__("$17");
-    register s16 *pE4 __asm__("$18");
+    s16 *p58;
+    s16 *pE4;

    iVar5 = aFC4C[param_1];
    p58 = (s16 *)aB58;
@@ -9090,7 +9089,7 @@ void func_80186020(void *a0) {
    u16 x;
    /* $v0 pin (cookbook "register pin" lever): without it sched1's birthing boost
       hands $v0 to the wrong temp and the two lhu's swap registers (residual 12). */
-    register u16 y __asm__("$2");
+    register u16 y __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)

    if ((D_801EFD40 & 2) != 0) {
        if ((s16)D_801EFD48 >= 0x120) {
@@ -9210,7 +9209,7 @@ extern void func_80186470(void *a0);
 extern void func_8018637C(s32 arg0, s32 arg1);

 void func_80186300(s32 a0, void *a1, s32 a2) {
-    register s32 s1 __asm__("$17") = a2;
+    register s32 s1 __asm__("$17") = a2;  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B t3_tus1)

    D_801EFD40 = D_801EFD40 & 0xFFFB;
    func_80186470((void *)a0);
@@ -9268,7 +9267,7 @@ void func_801863D4(void *a0) {
            func_801866C4(ent);
        }
        *(u16 *)((u8 *)ent + 0x86) &= ~0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
        i++;
        p++;
    } while (i < 0x15);
@@ -9320,7 +9319,7 @@ extern void *D_801DEC8C;
 extern void func_8001C1E4(void *a0, s32 a1);

 void func_80186518(void *a0, void *a1, s32 a2) {
-    register void *self0 __asm__("$8");
+    void *self0;
    s32 flag;
    void *tbl;
    s32 base;
@@ -9398,7 +9397,7 @@ extern void func_8018681C(s32 a0, void *a1);

 s32 func_80186710(void) {
    u16 buf[3];
-    register s32 s0 __asm__("$16");
+    s32 s0;
    s32 obj;

    s0 = D_801EFD20;
@@ -9670,7 +9669,7 @@ void func_80186CD8(s32 a0)
    ((void (*)(s32, void *))func_8001C924)(v0, (void *)D_801AA158);

    /* Force addu $a0, $s0, $zero to preserve s0 in a0 for func_8018BA44 */
-    asm volatile("addu $a0, $s0, $zero");
+    asm volatile("addu $a0, $s0, $zero");  // !FAKE: instruction addu — REFUSED instruction `addu` has no C spelling in the table (P36 rung B t3_tus1)

    /* Load pointer from s0 + 0x20 again */
    v1 = *(s32 *)(s0 + 0x20);
@@ -9810,7 +9809,7 @@ extern void func_801805D8(void);

 void func_80186F44(void *a0)
 {
-    register void *s0 __asm__("$16") = a0;
+    register void *s0 __asm__("$16") = a0;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 v0;

    v0 = func_8012C1B8();
@@ -9829,8 +9828,8 @@ void func_80186F44(void *a0)
    func_8018637C(s0, &D_801DEC6C);
    func_801862A4(s0);
    {
-        register void *t __asm__("$4");
-        __asm__ volatile("addu %0, %1, $0" : "=&r"(t) : "r"(s0));
+        register void *t __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
+        t = s0;
        *(s16 *)((u8 *)t + 0x76) = 0x40;
        *(s16 *)((u8 *)t + 0xF6) = 3;
    }
@@ -9939,7 +9938,7 @@ void func_80187178(void *a0)
        if (v0 == 0) {
            func_80184CCC((s32)s0, (s32)D_80194C14);
            {
-                register u16 pinst __asm__("$3");
+                u16 pinst;
                u16 flags = D_801EFD40 | 0x20;
                pinst = *(u16 *)((s32)s0 + 0x34);
                D_801EFD40 = flags;
@@ -10069,7 +10068,7 @@ void func_801873F8(void *a0)
            *(s16 *)((s32)s3 + 0x1A) = val;
        }
        for (i = 0; i < 4; i++) {
-            register void *entry __asm__("$4") = D_801EFD70[i];
+            register void *entry __asm__("$4") = D_801EFD70[i];  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
            if (entry != NULL) {
                *(s16 *)((s32)entry + 0x18) = val;
                *(s16 *)((s32)entry + 0x1A) = val;
@@ -10458,7 +10457,7 @@ void func_80187B40(void *a0)
    extern Blk4_80187B40 D_801ED994;
    extern Blk4_80187B40 D_801ED998;

-    register void *s4 __asm__("$20") = a0;
+    register void *s4 __asm__("$20") = a0;  // !FAKE: pin $20 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 obj;
    s32 i;
    s32 sz;
@@ -10929,7 +10928,7 @@ extern s32 D_801E8A1C;
 extern s32 D_80194818;

 void func_801886C4(s32 *a0) {
-    register s32 *s0 __asm__("s0") = a0;
+    s32 *s0 = a0;
    s32 value;

    func_8001C924((void *)s0[0x08], (void *)&D_801E8A1C);
@@ -11062,7 +11061,7 @@ void func_80188A30(s32 a0) {
    in[2] = D_80194814;
    out[2] = D_80194816;
    if (func_8012DEB8((s32)a0, (s32)in, (s32)out) != 0) {
-        __asm__("" ::: "memory");
+        __asm__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B t3_tus1)
        D_80126B98 = 0x18;
        if (*(s16 *)((s32)a0 + 0x106) == 0) {
            u16 cnt = D_801F161E;
@@ -11386,7 +11385,7 @@ void func_8018914C(void *a0) {

 extern s32 D_801E6898;
 extern s32 D_801EFEE0[];
-extern volatile s32 D_801EFEE4;
+extern s32 D_801EFEE4;
 extern u8 D_801E795C[];
 extern void func_8001C924(void *a0, void *a1);
 extern void func_8018A42C(void *a0, void *a1);
@@ -11808,8 +11807,8 @@ void func_80189AEC(void *a0) {
        func_8018A42C(a0, &D_801E5888[*(s16 *)((s32)a0 + 0x70) * 12]);

        if (*(s16 *)((s32)a0 + 0x70) == 0xF) {
-            register s32 t0 __asm__("$2");
-            register s32 t1 __asm__("$3");
+            s32 t0;
+            s32 t1;

            t1 = D_801949F0;
            t0 = (s32)&D_801949DC;
@@ -11844,8 +11843,8 @@ void func_80189AEC(void *a0) {
        *(s32 *)((s32)a0 + 0x48) = *(s32 *)((s32)a0 + 0x48) >> 1;

        if (*(s16 *)((s32)a0 + 0x70) == 0x10) {
-            register s32 t0 __asm__("$2");
-            register s32 t1 __asm__("$3");
+            s32 t0;
+            s32 t1;

            t1 = 0x10000000;
            t0 = (s32)&D_801949E0[0];
@@ -11877,7 +11876,7 @@ extern u8 D_801949C0[];

 void func_80189D38(void *a0)
 {
-    register s32 mode __asm__("$5") = 2;
+    register s32 mode __asm__("$5") = 2;  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)

    if (*(s16 *)((s32)a0 + 0xFE) != 0) {
        ((void (*)())func_80189EAC)(a0, mode);
@@ -12389,7 +12388,7 @@ extern s32 rand(void);

 void func_8018A8EC(void *a0)
 {
-    register void *ent __asm__("$17") = a0;
+    register void *ent __asm__("$17") = a0;  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 v0;
    s32 s2;
    TableRec_80194A10 *tbl;
@@ -12940,8 +12939,8 @@ void func_8018B2F8(s32 *arg0, s32 arg1)
    s32 j;
    s32 n;
    s32 r;
-    register s32 t __asm__("$2");
-    register s32 u __asm__("$3");
+    register s32 t __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 u;

    n = D_801F01C0;
    q = (u8 *)&D_801F00C0;
@@ -13116,7 +13115,7 @@ void func_8018B744(s32 *a0) {
    if (v1 < 0x50) {
        tag = v1 + 3;
        v1 = tag;
-        __asm__ __volatile__("" : "=r"(v1) : "0"(v1));
+        __asm__ __volatile__("" : "=r"(v1) : "0"(v1));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1)
        if (tag >= 0x51) {
            v1 = 0x50;
        }
@@ -13245,8 +13244,8 @@ void func_8018B9D4(void *a0, void *a1)
 {
    s32 sp10;
    s32 sp14;
-    register void *s0 __asm__("$16");
-    register void *s1 __asm__("$17");
+    void *s0;
+    void *s1;

    s0 = a0;
    s1 = a1;
@@ -13283,13 +13282,13 @@ extern u8 D_801EFEA1;
 extern u8 D_801EFEA2;

 void func_8018BAC4(void) {
-    register u8 *pa __asm__("$4");
-    register s32 t __asm__("$2");
-    register s32 r __asm__("$3");
-    register s32 x __asm__("$3");
+    u8 *pa;
+    s32 t;
+    register s32 r __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s32 x __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)

    pa = &D_801EFEA0[0];
-    x = *(volatile u8 *)pa;
+    x = *(u8 *)pa;
    if (x != 0) {
        t = x - 0x18;
        r = t;
@@ -13300,7 +13299,7 @@ void func_8018BAC4(void) {
    }

    pa = &D_801EFEA1;
-    x = *(volatile u8 *)pa;
+    x = *(u8 *)pa;
    if (x != 0) {
        t = x - 0x18;
        r = t;
@@ -13311,7 +13310,7 @@ void func_8018BAC4(void) {
    }

    pa = &D_801EFEA2;
-    x = *(volatile u8 *)pa;
+    x = *(u8 *)pa;
    if (x != 0) {
        t = x - 0xD;
        r = t;
@@ -13631,17 +13630,17 @@ void func_8018C14C(void *a0)

    *(s16 *)((s32)a0 + 0x6) = v[0];
    {
-        register s32 zr __asm__("$0");
-        register s32 ent __asm__("$4") = (s32)a0 + zr;
+        register s32 zr __asm__("$0");  // !FAKE: pin $0 — REFUSED body: overlapping edits at 423200..423246 / 423243..423245 (P36 rung B t3_tus1)
+        register s32 ent __asm__("$4") = (s32)a0 + zr;  // !FAKE: pin $4 — REFUSED body: overlapping edits at 423200..423246 / 423243..423245 (P36 rung B t3_tus1)
        s32 v2;
        s32 t1;
        s32 one;

        *(s16 *)(ent + 0xA) = v[1];
        t1 = *(u32 *)(ent + 0xC4);
-        __asm__ volatile("");
+        __asm__ volatile("");  // !FAKE: barrier — REFUSED body: overlapping edits at 423200..423246 / 423243..423245 (P36 rung B t3_tus1)
        one = 1;
-        __asm__ volatile("");
+        __asm__ volatile("");  // !FAKE: barrier — REFUSED body: overlapping edits at 423200..423246 / 423243..423245 (P36 rung B t3_tus1)
        t1 |= 2;
        v2 = v[2];
        *(u8 *)(ent + 0xC0) = one;
@@ -13703,7 +13702,7 @@ extern s32 D_80194818;

 void func_8018C310(void *a0)
 {
-    register void *s0 __asm__("$16") = a0;
+    void *s0 = a0;
    s32 obj = *(s32 *)((s32)s0 + 0x20);

    *(u16 *)(obj + 0x1A) += 0x800;
@@ -13728,9 +13727,9 @@ void func_8018C378(void *arg0)
        func_8012C218(arg0);
        return;
    }
-    if (*(volatile s32 *)((s32)arg0 + 0x1C) < 0x18) {
+    if (*(s32 *)((s32)arg0 + 0x1C) < 0x18) {
        *(s16 *)((s32)arg0 + 0x5C) = 0;
-        if (*(volatile s32 *)((s32)arg0 + 0x1C) & 1) {
+        if (*(s32 *)((s32)arg0 + 0x1C) & 1) {
            *(s32 *)(*(s32 *)((s32)arg0 + 0x20) + 4) |= 0x80000000;
        } else {
            *(s32 *)(*(s32 *)((s32)arg0 + 0x20) + 4) &= 0x7FFFFFFF;
@@ -13754,7 +13753,7 @@ extern s32 func_8012AD50(void*);

 void func_8018C440(void *a0)
 {
-    register void *s0 __asm__("$16") = a0;
+    register void *s0 __asm__("$16") = a0;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 v0 = func_8012C1B8();

    *(s32 *)((u8 *)s0 + 0x20) = v0;
@@ -13819,8 +13818,8 @@ extern s32 func_80189478(s32 a0);
 void func_8018C58C(s32 a0) {
    s32 s0;
    s32 ptr;
-    register s32 v0 __asm__("$2");
-    register s32 v1 __asm__("$3");
+    s32 v0;
+    s32 v1;

    s0 = a0;

@@ -13987,9 +13986,9 @@ extern u8 D_801E57F8[];
 extern u8 D_80194A50[];

 void func_8018C94C(void *a0) {
-    register s32 v0 __asm__("$2");
-    register s32 t0 __asm__("$2");
-    register s32 t1 __asm__("$3");
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 t0;
+    s32 t1;

    *(s32 *)(a0 + 0x20) = v0 = func_8012C1B8();

@@ -14031,8 +14030,8 @@ extern void func_8012C218(void *a0);
 extern void func_8018A7E8(s32 a0);

 void func_8018CA04(s32 arg0) {
-    register s32 a0 __asm__("$4");
-    register s32 a1 __asm__("$5");
+    register s32 a0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s32 a1 __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u16 val;

    // First update
@@ -14089,8 +14088,8 @@ extern void func_8002D4C8(s32 a0, s32 a1);
 extern void func_8018A784();

 void func_8018CAF0(void *a0) {
-    register s32 s0 __asm__("$16") = (s32)a0;
-    register s32 mask __asm__("$3");
+    s32 s0 = (s32)a0;
+    register s32 mask __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u16 v0;
    s16 h;
    s32 p;
@@ -14121,8 +14120,8 @@ extern void func_8012C218(void *a0);
 extern void func_8018A7E8(s32 a0);

 void func_8018CB68(s32 arg0) {
-    register s32 a0 __asm__("$4");
-    register s32 a1 __asm__("$5");
+    register s32 a0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s32 a1 __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u16 val;

    a0 = *(s32 *)(arg0 + 0x20);
@@ -14161,8 +14160,8 @@ extern void func_8018A7E8(s32);
 void func_8018CC24(s32 a0) {
    s32 s0;
    s32 a0_ptr;
-    register s32 v0 __asm__("$2");
-    register s32 v1 __asm__("$3");
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 v1;
    s32 v1_sign;

    s0 = a0;
@@ -14210,8 +14209,8 @@ extern Blk8 D_801ED9AC[];
 void func_8018CCB8(s32 arg0) {
    s32 s0;
    s32 ptr;
-    register s32 v0 __asm__("$2");
-    register s32 v1 __asm__("$3");
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 v1;
    s32 v1_sign;
    Blk8 sp10;

@@ -14552,8 +14551,8 @@ extern s32 func_80146E98(s32 a0);

 void func_8018D3FC(s32 *a0) {
    s32 *s1 = *(s32 **)((s32)a0 + 0x20);
-    register s32 v0 asm("$2");
-    register s32 v1 asm("$3");
+    s32 v0;
+    register s32 v1 asm("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)

    if (func_80146E98((s32)a0) != 0) {
        v1 = 0x7FFFFFFF;
@@ -14893,10 +14892,10 @@ void func_8018DA64(void *a0, void *a1, SVECTOR_8018DA64 *a2, s32 *a3, SVECTOR_80
    prim.v[3] = D_80194DE8;

    {
-        register s32 rK30 __asm__("$9") = 0x010009C0;   /* $t1 */
-        register s32 rK34 __asm__("$8") = 0x010009DF;   /* $t0 */
-        register s32 rK38 __asm__("$6") = 0x011F09C0;   /* $a2 */
-        register s32 rK3c __asm__("$3") = 0x011F09DF;   /* $v1 */
+        s32 rK30 = 0x010009C0;   /* $t1 */
+        s32 rK34 = 0x010009DF;   /* $t0 */
+        s32 rK38 = 0x011F09C0;   /* $a2 */
+        s32 rK3c = 0x011F09DF;   /* $v1 */

        prim.bcast = *(u32 *)a3;

@@ -14932,16 +14931,16 @@ extern s32 D_801F12C8;
 extern s32 D_801F12CC;

 void func_8018DBF0(s32 a0) {
-    register s32 s1 __asm__("$17") = a0;
-    register s32 s0 __asm__("$16");
-    register s32 s2 __asm__("$18");
-    register s32 v0 __asm__("$2");
-    register s32 a0r __asm__("$4");
-    register s32 a1r __asm__("$5");
+    register s32 s1 __asm__("$17") = a0;  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    s32 s0;
+    s32 s2;
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s32 a0r __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register s32 a1r __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B t3_tus1)

    v0 = func_8012C194();
    s2 = (s32)&D_801F12C8;
-    __asm__ volatile("addu %0,%1,$0" : "=r"(s0) : "r"(v0));
+    __asm__ volatile("addu %0,%1,$0" : "=r"(s0) : "r"(v0));  // !FAKE: instruction addu — NEEDED DIFFERS (P36 rung B t3_tus1)
    *(s32 *)(s1 + 0x20) = v0;

    if (v0 == 0) {
@@ -14951,7 +14950,7 @@ void func_8018DBF0(s32 a0) {

        a0r = s2;
        a1r = 0x80;
-        __asm__ volatile("addiu %0,$0,3" : "=r"(v0));
+        __asm__ volatile("addiu %0,$0,3" : "=r"(v0));  // !FAKE: instruction addiu — NEEDED DIFFERS (P36 rung B t3_tus1)
        *(s16 *)(s0 + 0x2C) = v0;
        v0 = *(s32 *)(s0 + 4);
        *(s16 *)(s0 + 0x1A) = 0;
@@ -15055,7 +15054,7 @@ extern void func_8018DFDC(void);

 void func_8018DE0C(s32 a0) {
    extern s32 D_80126B58;
-    register s32 s0 __asm__("$16") = a0;
+    register s32 s0 __asm__("$16") = a0;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
    s32 s1;
    s32 v0;

@@ -15063,7 +15062,7 @@ void func_8018DE0C(s32 a0) {

    v0 = func_80016978(4);
    s1 = (s32)&D_80126B58;
-    __asm__ __volatile__ ("");
+    __asm__ __volatile__ ("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
    v0 &= 0xFFFF;

    if (v0 != 0) {
@@ -15092,7 +15091,7 @@ extern void func_8018DFDC(void);
 extern s32 func_8012AD50(void *a0);

 void func_8018DEB0(s32 a0) {
-    register s32 s0 __asm__("$16") = a0;
+    s32 s0 = a0;
    s32 v0;

    func_8018DFDC();
@@ -15603,10 +15602,10 @@ void func_8018E428(s32 arg0)
    s32 ot;
    u16 bx;
    u16 by;
-    register s32 ang __asm__("$4");      /* §17 pin — see residual (a) */
+    register s32 ang __asm__("$4");      /* §17 pin — see residual (a) */  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
    volatile u16 *bidx;
    s32 t;
-    register u32 pv __asm__("$3");       /* §17 pin — see residual (b) */
+    register u32 pv __asm__("$3");       /* §17 pin — see residual (b) */  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)

    m = D_800AE620;
    mp = &m;
@@ -15657,7 +15656,7 @@ void func_8018E428(s32 arg0)
    *(s16 *)(p + 0x1A) = by;

    /* addPrim(otp, p) == setaddr(p, getaddr(otp)), setaddr(otp, p) */
-    bidx = (volatile u16 *)&D_800B9A02;
+    bidx = (u16 *)&D_800B9A02;
    pv = *(u32 *)p;
    *(u32 *)p = (pv & 0xFF000000) |
                (*(u32 *)(*(s32 *)((u8 *)&D_800A651C +
@@ -15665,7 +15664,7 @@ void func_8018E428(s32 arg0)
    ot = *(s32 *)((u8 *)&D_800A651C + (*bidx * 20));
    *(u32 *)(ot + 0x40) = (*(u32 *)(ot + 0x40) & 0xFF000000) | ((u32)p & 0xFFFFFF);
    func_80016638(&D_800A6518[*bidx * 20], 0x10, 1);
-    __asm__ __volatile__("" : "=r"(pv));   /* zero-byte 2nd SET: kills the sched1 birthing boost */
+    __asm__ __volatile__("" : "=r"(pv));   /* zero-byte 2nd SET: kills the sched1 birthing boost */  // !FAKE: launder out-only — NEEDED DIFFERS (P36 rung B t3_tus1)
 }


@@ -16085,8 +16084,8 @@ void func_8018EBCC(s32 a0) {
        void *svp = sv;
        void *outp = out;
        ApplyMatrixSV(m, svp, outp);
-        __asm__ __volatile__("" : "=r"(svp));
-        __asm__ __volatile__("" : "=r"(outp));
+        __asm__ __volatile__("" : "=r"(svp));  // !FAKE: launder out-only — NEEDED DIFFERS (P36 rung B t3_tus1)
+        __asm__ __volatile__("" : "=r"(outp));  // !FAKE: launder out-only — NEEDED DIFFERS (P36 rung B t3_tus1)
    }

    *(s16 *)(q + 0x8) = x + ((s16)out[0] >> 1) * 3;
@@ -16107,7 +16106,7 @@ void func_8018EBCC(s32 a0) {
    *(s16 *)(sv + 0) = 2;
    {
        /* lever C: sp+0x10 IS &m, but spelled so cse cannot fold it to $s4 */
-        register u8 *spr __asm__("$29");
+        register u8 *spr __asm__("$29");  // !FAKE: pin $29 — NEEDED DIFFERS (P36 rung B t3_tus1)
        ApplyMatrixSV(spr + 0x10, sv, out);
    }

@@ -16176,7 +16175,7 @@ void func_8018EFB0(void *a0) {

    s1 = (s32 *)a0;
    v0_const = 0x0B;
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
    s0 = *(s32 **)((u8 *)s1 + 0x20);

    // Store 0x0B as halfword at offset 0x2
@@ -16305,8 +16304,8 @@ void func_8018F02C(void *a0)
    u8 *pkb;
    s32 d;
    u32 *otp;
-    register u32 tv __asm__("$3");       /* §137 pin — see header */
-    register u32 tv2 __asm__("$4");      /* §137 pin — see header */
+    register u32 tv __asm__("$3");       /* §137 pin — see header */  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    register u32 tv2 __asm__("$4");      /* §137 pin — see header */  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)

    u8 *rotm;

@@ -16613,7 +16612,7 @@ void func_8018F734(s16 *arg0)
    void *mp;
    u16 len;
    u32 otz;
-    register u32 qt __asm__("$4");   /* §17 pin — kills the birthing boost AND
+    register u32 qt __asm__("$4");   /* §17 pin — kills the birthing boost AND  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B t3_tus1)
                                        keeps the $a0/$a1 pair in target order */

    ot = (u32 *)&D_800A6610[(*(u16 *)&D_800B9A02) << 14];
@@ -16715,8 +16714,8 @@ void func_8018F9C0(void *a0) {
    extern EffectSlot4_8018F9C0 D_801EBDF4;
    extern EffectSlot4_8018F9C0 D_801EBE24;
    extern EffectSlot4_8018F9C0 D_801EBE28;
-    register void *s0 __asm__("$16");
-    register void *s1 __asm__("$17");
+    register void *s0 __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B t3_tus1)
+    void *s1;

    s0 = a0;
    s1 = ((void *(*)(void))func_801465C0)();
@@ -16848,7 +16847,7 @@ extern void func_8018FE20(s32 a0, void *a1, void *a2, s32 a3);
 extern void func_8012C098(void *a0);

 void func_8018FD38(s32 arg0) {
-    register s32 s2 __asm__("$18") = arg0;
+    register s32 s2 __asm__("$18") = arg0;  // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B t3_tus1)
    u8 *s0;
    u8 *s1;
				`@@ -0,0 +1 @@`
				`log: t3_tus1 lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13)`