mirror of
https://github.com/Druthulu/BFM-decomp
synced 2026-09-29 07:10:32 -04:00
feat(decomp): main lane m05abab — 3 banked
One clean whole-EXE rebuild verified the batch (gate_main), and main re-checked BYTE-IDENTICAL against config/check.us.sha before anything was credited. SYS_OBJ_F58 func_80059CF4 func_8005AD34
This commit is contained in:
Drew T
+128
-3
@@ -480,7 +480,29 @@ void func_80059BFC(s32 a0, s32 a1) {
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INCLUDE_ASM("asm/nonmatchings/800c", DrawPrim);
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INCLUDE_ASM("asm/nonmatchings/800c", func_80059CF4);
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extern u8 D_8007278A;
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extern u32 D_80072784;
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extern void *D_80072780;
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extern u8 D_800741D8;
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/* PsyQ DrawOTag: guard call passes the "DrawOTag(%08x)...\n" debug string
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* (D_800741D8), then dispatches through GPU fn-table slot +0x8 with the draw
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* env pointer at +0x18, the OT, and two zero args. Canonical signature per
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* src/resident/resident.c (`extern s32 func_80059CF4(s32);`) -- the tail GPU-fn
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* call's result is left in $v0 and becomes this function's return value.
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*
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* Integration: replace the INCLUDE_ASM("asm/nonmatchings/800c", func_80059CF4)
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* stub at line 483 of src/800c.c. D_8007278A/D_80072784/D_80072780 are already
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* declared at lines 134-137 of that TU with identical types -- keep those, add
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* only `extern u8 D_800741D8;`.
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*/
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s32 func_80059CF4(s32 a0) {
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if (D_8007278A >= 2) {
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((void (*)(void *, s32))D_80072784)(&D_800741D8, a0);
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}
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return (*(s32 (**)(void *, void *, s32, s32))((u8 *)D_80072780 + 0x8))(
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*(void **)((u8 *)D_80072780 + 0x18), (void *)a0, 0, 0);
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}
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INCLUDE_ASM("asm/nonmatchings/800c", func_80059D68);
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@@ -682,7 +704,70 @@ INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_F00);
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INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_F24);
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INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_F58);
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/* SYS_OBJ_F58 reads $s0/$s1/$s2 as live globals (same frame shape as its sibling
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* SYS_OBJ_FD8), so plain C cannot carry the register allocation: emit the whole
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* function as FILE-SCOPE inline asm, transcribed 1:1 from
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* asm/nonmatchings/800c/SYS_OBJ_F58.s (cookbook 179-C: no epilogue of its own --
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* every exit is a raw unlinked j/beqz into SYS_OBJ_FD8, and .L8005A208 falls
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* through into the sibling's entry, so a normal C body would gain a phantom
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* jr/nop pair).
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* Real ".ent"/".end" text (not glabel/endlabel) so maspsx emits the fresh
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* ".set noreorder" and our hand-placed delay slots survive (179-B rules 1-2).
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* NOTE: maspsx parses ALL displacements AND immediates with bare int() -- every
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* number below must be DECIMAL (179-B rule 3 / 265): 0x50=80, 0x10=16,
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* 0xCDB=3291, 0xCDA=3290, 0x12=18, 0x137=311, 0x101=257, 0x100=256, 0x136=310.
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* Load-delay nops after the two lbu are already in the target and stay (maspsx
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* only splices its own when a consumer follows the load).
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* PLACEMENT: this block REPLACES the INCLUDE_ASM("asm/nonmatchings/800c",
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* SYS_OBJ_F58) stub at src/800c.c:634 -- do not keep both (duplicate symbol). */
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__asm__(
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".text\n"
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".align\t2\n"
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".globl\tSYS_OBJ_F58\n"
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".ent\tSYS_OBJ_F58\n"
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"SYS_OBJ_F58:\n"
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".set\tnoreorder\n"
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"addu $v1, $a1, $zero\n"
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"addiu $a1, $v1, 80\n"
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"slt $v0, $a2, $a1\n"
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"bnez $v0, .L8005A1B4\n"
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"slti $v0, $s1, 16\n"
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"slti $v0, $a2, 3291\n"
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"beqz $v0, .L8005A1B0\n"
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"addiu $a1, $zero, 3290\n"
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"addu $a1, $a2, $zero\n"
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".L8005A1B0:\n"
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"slti $v0, $s1, 16\n"
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".L8005A1B4:\n"
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"bnez $v0, .L8005A208\n"
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"addu $a2, $a1, $zero\n"
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"lbu $v0, 18($s0)\n"
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"nop\n"
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"beqz $v0, .L8005A1DC\n"
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"slti $v0, $s1, 311\n"
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"beqz $v0, .L8005A1E8\n"
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"nop\n"
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"j SYS_OBJ_FD8\n"
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"addu $a0, $s1, $zero\n"
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".L8005A1DC:\n"
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"slti $v0, $s1, 257\n"
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"bnez $v0, .L8005A200\n"
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"nop\n"
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".L8005A1E8:\n"
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"lbu $v0, 18($s0)\n"
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"nop\n"
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"beqz $v0, SYS_OBJ_FD8\n"
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"addiu $a0, $zero, 256\n"
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"j SYS_OBJ_FD8\n"
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"addiu $a0, $zero, 310\n"
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".L8005A200:\n"
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"j SYS_OBJ_FD8\n"
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"addu $a0, $s1, $zero\n"
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".L8005A208:\n"
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"addiu $a0, $zero, 16\n"
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".set\treorder\n"
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".end\tSYS_OBJ_F58\n"
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);
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INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_FD8);
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@@ -738,7 +823,47 @@ INCLUDE_ASM("asm/nonmatchings/800c", func_8005ACF0);
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INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_1AF0);
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INCLUDE_ASM("asm/nonmatchings/800c", func_8005AD34);
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__asm__(
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".text\n"
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".align\t2\n"
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".globl\tfunc_8005AD34\n"
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".ent\tfunc_8005AD34\n"
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"func_8005AD34:\n"
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" .set\tnoreorder\n"
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" bnez $a0, .L8005AD44\n"
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" addiu $sp, $sp, -16\n"
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" j SYS_OBJ_1B78\n"
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" addu $v0, $zero, $zero\n"
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".L8005AD44:\n"
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" lbu $a1, 0($a0)\n"
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" nop\n"
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" srl $a1, $a1, 3\n"
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" sw $a1, 0($sp)\n"
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" lh $a2, 4($a0)\n"
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" nop\n"
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" negu $a2, $a2\n"
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" andi $a2, $a2, 0xFF\n"
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" sra $a2, $a2, 3\n"
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" sw $a2, 8($sp)\n"
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" lbu $v0, 2($a0)\n"
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" sll $a1, $a1, 10\n"
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" srl $v0, $v0, 3\n"
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" sw $v0, 4($sp)\n"
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" sll $v0, $v0, 15\n"
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" lh $v1, 6($a0)\n"
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" lui $a0, 0xe200\n"
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" or $a1, $a1, $a0\n"
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" or $v0, $v0, $a1\n"
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" negu $v1, $v1\n"
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" andi $v1, $v1, 0xFF\n"
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" sra $v1, $v1, 3\n"
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" sll $a0, $v1, 5\n"
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" or $v0, $v0, $a0\n"
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" or $v0, $v0, $a2\n"
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" sw $v1, 12($sp)\n"
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".set\treorder\n"
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".end\tfunc_8005AD34\n"
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);
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INCLUDE_ASM("asm/nonmatchings/800c", SYS_OBJ_1B78);
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