phase-36: T7 agent b8 — func_80135888, the largest class left, closed with all five levers gone (134 bodies; 24,789 → 24,119 sites, R22 218/218)

check-all: 218 passed, 0 failed of 218
  lever_census --check: 24,119 pin/asm sites, 24,119 marked !FAKE, 0 UNMARKED — OK

Three moves, each predicted from a dump before it was compiled:
- while -> a guarded do-while (29 to 22). Cross-jump (jump.c:1969 -> find_cross_jump :2371, from toplev.c:3142) had
  matched the load in front of the jump against the one in front of the bottom test and deleted three instructions; the
  guarded form makes the two tails differ.
- the duplicated pre-loop call block -> goto (22 to 6). This is an allocno_compare rank move (global.c:585-611): the
  priority is floor_log2(refs)*refs/live, reg_n_refs is loop-weighted (flow.c:2067), the in-loop copy of that call is
  worth two references, and deleting the out-of-loop copy takes exactly one off — 8 to 7 crosses a floor_log2 step and
  drops the pointer's priority from 3157.9 to 1891.9. The predicted allocation order matched the dump exactly. The
  rewrite is byte-neutral on its own: reorg steals the target's first insn into the delay slot and retargets.
- the two-arm mask temp inlined (6 to 0): set in two arms it has two deaths, fails local-alloc.c:472, and combine_regs
  bails at :1774, so it went to global allocation and took its copy preference.

Harvested as R21 second_consumer, from agents b2 and b6 together: give a computed value a second consumer before its
copy, either by chaining (v = slot = E) or by hoisting the store above it. cse deletes such a copy only when the
producer sits immediately before it (cse.c:7440-7501, guard :7454-7460), and flow links only the FIRST following use
(flow.c:2076-2091), so a store in between defeats both. R9 can never produce it — the two statements share the
identifier, so its independence guard refuses the swap. Known-true: the joint form scores 0 on b6's pre-bank text, and
the single-site forms do not, which is the third measured case this session of a joint edit no hill-climb can reach.

Also recorded from b8, worth a pre-check later: declaration-order moves are PROVABLY DEAD on a register residual whose
allocnos have distinct priorities, because global.c:604-610 compares priority first and only ties by allocno number —
4,811 compiles of those candidates sat flat because of it.
This commit is contained in:
Drew T
2026-09-10 13:31:47 -06:00
parent 0d92d10299
commit d30ccc9a72
149 changed files with 2419 additions and 2001 deletions
@@ -7,13 +7,13 @@ s32 func_80133784(s32 arg0, void *arg1, s32 arg2) {
extern u16 D_801EDA40;
s32 s1;
s32 s2;
u16 s2;
s16 s3;
s32 s4;
s16 a0v;
s16 arg0s;
s32 dx, dy, dz;
s32 r, ret;
s32 r;
a0v = ((s16)arg0);
s1 = 0;
@@ -60,13 +60,9 @@ s32 func_80133784(s32 arg0, void *arg1, s32 arg2) {
loop:
{
s32 ret0;
s32 retc;
ret0 = func_80133AB0(arg0s, (s16)D_801909BC->f0, (s16)D_801909BC->f4, (*(s32*)&D_801EDA30));
retc = ret0;
ret = retc;
if (ret == 0) goto after;
s4 |= ret;
r = func_80133AB0(arg0s, (s16)D_801909BC->f0, (s16)D_801909BC->f4, (*(s32*)&D_801EDA30));
if (r == 0) goto after;
s4 |= r;
if (s2 != 0) goto after;
{
s16 oldc = s3;
@@ -1,6 +1,5 @@
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
s32 m;
s32 sp;
s32 p1;
s32 mode;
@@ -17,14 +16,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -41,18 +38,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
@@ -0,0 +1,118 @@
# func_80135888 (ov_SC04_011_jr_80135888.c) — score 0, all 5 NEEDED levers removed
Start 29 (COUNT, mine 110 / target 113). Mechanical best over 7 runs and 4,811+ compiles: 16.
**Final: 0 (byte-identical, 113/113).** Three source moves, each proven on bytes and each predicted from a dump
BEFORE it was compiled.
Levers removed: pins `$2` (m), `$17` (p1), `$19` (p0), `$21` (p3) and the `__asm__ __volatile__("")` barrier @683.
No `register`, no `asm`, no added `volatile`, no `__builtin_*` in the answer.
## (a) The residual in one sentence
Three instructions MISSING (the loop's entry test, which the target duplicates and mine reached by a `j` into the
loop's bottom test), a 3-cycle on the callee-saved bank (mine `p0=s1 p1=s2 mode=s3`, target `p1=s1 mode=s2 p0=s3`),
and the `p1 & 0x0FFFFFFF` result in `a0` instead of `v0` (pushing the `lui 0x8000` temp from `v1` to `v0`).
## (b) The passes and the decisions
**1. COUNT — `jump.c` cross-jump, run from `toplev.c:3142` (`jump_optimize(…, cross_jump=1, noop_moves=1)`).**
`while (sp)` is rotated to `goto test; loop: … test: if (sp) goto loop;`, so my `sp = *(s32 *)sp;` before the loop was
followed by a simple jump to the bottom test. `jump.c:1969` (`if (cross_jump && simplejump_p (insn))`) calls
`find_cross_jump (insn, JUMP_LABEL (insn), 1, …)` (`jump.c:1978`, body at `jump.c:2371`), which walks backwards from
the jump and from its label in lockstep; the `lw s0,0(s0)` in front of the jump matched the `lw s0,0(s0)` in front of
the label, so `do_cross_jump` (`jump.c:1998`) retargeted the jump *before* that load and deleted my copy — 3 fewer
instructions and no entry test. The `__asm__ __volatile__("")` in the tree was hired to break that backwards match.
**2. REG (the callee-saved 3-cycle) — `allocno_compare`, `global.c:585-611`.**
All six callee-saved values conflict pairwise, so the whole bank is decided by rank alone: rank *n* takes `$s(n-1)`.
Priority is `floor_log2(refs) * refs / live_length * 10000`, ties by allocno number (= declaration order,
`global.c:609-610`). The `.greg` table for the lever-free body (`tools/alloc_table.py`) read:
| allocno | var | refs | live | priority |
|---|---|---|---|---|
| r78 | p1 | 5 | 37 | 2702.7 |
| r79 | mode | 7 | 54 | 2592.6 |
| **r80** | **p0** | **8** | **76** | **3157.9** ← outranks both |
| r81 | base | 7 | 76 | 1842.1 |
| r82 | p3 | 5 | 73 | 1369.9 |
Order `76 77 87 **80 78 79** 81 82` → `p0=s1 p1=s2 mode=s3`. The target's order is plain declaration order, so p0 had
to fall below `mode`. `floor_log2` is the whole lever: **8 refs → 3, 7 refs → 2**, so dropping ONE reference from p0
divides its priority by 1.7. Note `reg_n_refs` is loop-depth weighted (`flow.c:2067/2315/2501`), and the second
`func_80136A94(mode, p0, p3, base)` sits inside the loop, i.e. it is worth 2 refs; the first copy of that same call
(before the loop) is worth 1. Deleting the duplicated call — writing `goto hit;` instead — takes exactly one ref off
p0, mode, p3 and base. Predicted new order: p1 > mode > p0 > base > p3. Measured on the c2 dump:
`;; 8 regs to allocate: 76 77 87 **78 79 80** 81 82`, priorities 2702.7 / 2264.2 / 1891.9 / 1666.7 / 1142.9 — the
prediction was exact, and the score went 22 → 6 with all three pairs closed.
**That rewrite is byte-neutral by itself.** `if (…) goto hit;` compiles to `bnez v0,<hit>`; `fill_simple_delay_slots`
steals the branch target's first insn into the delay slot and retargets the branch past it
(`reorg.c:3095-3135`, `reorg_redirect_jump (insn, new_label)` at `:3135`) — producing `bnez v0,0x100` /
`move a0,s2`, which is exactly what cross-jump had left of the duplicated call. So the move changes only `reg_n_refs`.
**3. REG (`m` in a0) — `local-alloc.c:470-477` + the `combine_regs` bail at `local-alloc.c:1774`.**
`m` is assigned in two switch arms, so `reg_n_deaths[m] == 2` and it fails the gate at `local-alloc.c:472`
(`reg_basic_block[i] >= 0 && reg_n_deaths[i] == 1`): `reg_qty[m] = -1`, never a local quantity. `block_alloc` then
cannot tie the `and`'s destination to the dying `0x0FFFFFFF` pseudo, because `combine_regs` bails at
`local-alloc.c:1773-1774` — *"Can't combine if SREG is not a register we can allocate"*,
`(sreg >= FIRST_PSEUDO_REGISTER && reg_qty[sreg] == -1)`. `m` therefore fell through to `global.c` and took its copy
preference (`;; 76 preferences: 4 7` = `a0`, `a3`), leaving `v0` free for the `lui 0x8000` temp. Inlining the
expression gives each arm its own single-death, single-block temp, which `block_alloc` ties to the dying mask pseudo
in `v0`, so the `and` writes `v0` in place and `lui` first-fits `v1`. Proven: after the change the `.greg` order line
has only 7 allocnos and `m` is gone from it entirely (`76 88 77 78 79 80 81`, r76 is now `sp`). Score 6 → 0.
## (c) The moves (one line each)
1. `while (sp != 0) {…}` → `if (sp == 0) { return 0; } do {…} while (sp != 0);` — 29 → **22**, COUNT closed (113/113).
2. The duplicated `func_80136A94(mode, p0, p3, base); return 1;` before the loop → `goto hit;` — 22 → **6**.
3. `m = p1 & 0xFFFFFFF; sp = m | 0x80000000;` → `sp = (p1 & 0xFFFFFFF) | 0x80000000;` — 6 → **0**.
`PACK/body.c` is move 3 as written above. `PACK/scratch/c4.c` also scores 0 and keeps the name — it scopes the temp
instead (`{ s32 m = p1 & 0xFFFFFFF; sp = m | 0x80000000; }`); same mechanism, one brace-block per arm. Pick whichever
reads better in the tree; the inlined form is shipped because it is one line shorter and needs no synthetic block.
## (d) GENERATOR PROPOSALS
**G1 — `goto_merges` (the important one; a REF-COUNT lever that costs zero bytes).**
When the residual is register-only and the callee-saved colours are a permutation, find any statement block in the
body that is textually identical to another block which carries (or can be given) a label, and replace the duplicate
with `goto <label>;` — and the converse, re-expanding a `goto` back into the block it targets. Cross-jump and reorg
emit the same instructions either way, so this move can only change `reg_n_refs`, and one reference is often the whole
answer because `allocno_compare`'s `floor_log2(refs)` steps at every power of two. Rank the candidates by arithmetic,
not by search: for each variable the block reads, recompute `floor_log2(r∓w)*(r∓w)/live` (with `w = 2` inside a loop,
`1` outside) from `tools/alloc_table.py` and try only the rewrites that reorder the `.greg` line toward the target.
**G2 — `loop_entry_tests`.** When the count residual is `mine: j <into the loop>` against `target: <the loop's last
statement>; <exit test>` (mine short by the entry test), rewrite `stmt; while (c) {…}` as
`stmt; if (!c) { <the loop's else-exit> } do {…} while (c);`, which makes the entry block's tail differ from the
loop's tail so `find_cross_jump` (`jump.c:2371`) cannot merge them. This is the plain-C replacement for a
`__asm__ __volatile__("")` barrier sitting between a statement and a `while`, and it should be tried automatically
whenever a NEEDED barrier lever is in that position.
## (e) What did NOT work, and why
- Nothing was wasted on the paths the trace had already spent: `history.txt` shows R2 declaration-order and R4
declaration-move candidates all flat at 20 across 4,811 compiles. The table says why, and the reason generalises:
`allocno_compare` compares priority FIRST and only breaks ties by allocno number (`global.c:604-610`), so while p0's
priority is strictly higher than mode's, **no permutation of declarations can reorder the bank**. A decl-order
generator is provably dead on any REG residual whose allocnos have distinct priorities — worth a cheap pre-check in
the engine before it spends a beam on them.
- `R6 inline m` alone (the trace's 20 → 16) is move 3 without moves 1 and 2: it fixes `a0→v0` but leaves the count and
the 3-cycle, which is exactly the 16 the search plateaued at. The three moves are independent and additive here; the
order I applied them in (count first, then rank, then tie) was also the order in which each next residual became
readable.
## (f) Where the method fell short
- **`neighbours.txt` was empty** and the TU is a single-function `jr_` isolate, so step 0 had nothing to give. The
substitute that worked was step 1 done properly: `objdump -drz` on BOTH objects (the tree's own
`build/…_jr_80135888.o` for the target, and the `--try` scratch `cand.o`, which the tool leaves at
`.run/P36/engine/score/<alias>__<fn>/cand.o` — worth documenting, it is the only way to see one's own whole
function). The hunk view had scrambled the loop into two unrelated-looking edits; side by side it was one shape.
- **`tools/cc1_dumps_tu.sh` needs a directory trick that is not in its usage line.** It globs `$wd/*/t.c`, but these
TUs `#include "../shared/engine_prelude.h"`, so `t.c` must sit at `$wd/<anything>/t.c` *with* `$wd/shared`
symlinked to `src/shared`, or cpp emits 44 lines and the script's CPP-EMPTY guard fires with a misleading message
about the include path. Two minutes lost; a one-line note in the script's header would remove it for everyone.
- Feeding it is easy and should be automatic: the spliced TU `--try` just compiled is sitting next to `cand.o`, so
`--try --dumps` could produce the allocation table for the candidate in the same 0.3 s. Every one of the three moves
above was chosen by reading that table and none by searching.
@@ -0,0 +1,238 @@
s32 func_8013F350(void) {
u16 *pd = &D_8011511C;
u16 *ps;
u16 *pf;
u16 *pg;
u16 pad;
u16 st;
u8 *pcur;
u8 *pmax;
u8 *p2e;
u8 *p3e;
s32 off;
s16 i;
s32 r;
s16 rs;
s16 d;
u8 b;
u8 bb;
u8 m;
s32 chg;
pad = *pd;
chg = 0;
if (pad != 0) {
if (pad == pd[2]) {
D_80115122 = D_80115122 - 1;
if (D_80115122 == 0) {
D_8011511E = pad & 0xF000;
D_80115122 = 3;
}
} else {
pd[2] = pad;
D_80115122 = 6;
}
} else {
D_80115120 = 0;
D_80115122 = 0xC;
}
i = 0;
do {
if ((func_80029178(D_801914C8[i]) & 0xFF) == 0) {
break;
}
i = i + 1;
} while (i < 6);
*(u16 *)D_80115158 = i | 0x100;
switch (D_8011511A) { /* jtbl_801D8860 */
case 0:
r = ((s32 (*)(s32))func_8014168C)(0);
rs = (s16)r;
if ((func_80029178(D_801914C8[rs]) & 0xFF) != 0 && (D_8011511E & 0x40) != 0) {
func_8014AA04((r + 1) & 0xFF);
if (rs != 0) {
func_8002D4C8(0x461, 0);
} else {
func_8002D4C8(0x460, 0);
}
}
break;
case 1:
if ((D_8011511E & 0x40) != 0) {
D_80115128 = ((s32 (*)(s32))func_8014168C)(1) + 1;
D_8011511A = 2;
func_80141C0C(3);
return 1;
}
if (D_80115128 != 4) {
break;
}
goto tail7;
case 2:
switch (D_80115128) { /* jtbl_801D8880 */
case 0:
break;
case 1:
r = ((s32 (*)(s32))func_8014168C)(2);
pf = &D_8011511E;
if ((*pf & 0x40) != 0) {
if ((*(s16 *)&D_8011512E) == 0) {
if ((func_800291B4(D_801914E0[(s16)r]) & 0xFF) != 0 && (*pf & 0x40) != 0) {
D_8011511A = 5;
*(s16 *)&D_80115152 = 0;
func_80141C0C(3);
return 1;
}
func_80141C0C(5);
} else {
func_801415C0((s16)r, (*(s16 *)&D_8011512E) & 0xF);
D_8011512E = 0;
func_80141C0C(3);
return 1;
}
} else if ((*pf & 0x20) != 0) {
if ((*(s16 *)&D_8011512E) == 0) {
D_8011512E = r | 0x8000;
} else {
func_801415C0((s16)r, (*(s16 *)&D_8011512E) & 0xF);
D_8011512E = 0;
}
func_80141C0C(3);
}
break;
case 4:
if ((D_8011511E & 0xA000) != 0) {
chg = func_80140608(2);
}
func_801407F4();
break;
case 2:
break;
case 3:
break;
}
if (D_80115128 != 0 && (D_8011511E & 0x10) != 0 && D_80115110 != 1) {
D_8011511E = D_8011511E & 0xFFEF;
D_8011511A = 1;
D_8011512E = 0;
func_80141C0C(6);
}
break;
case 3:
if (D_8011514E == 0 && (D_8011511E & 0x40) != 0) {
D_8011511A = D_8011511A + 3;
func_80141C0C(3);
return 1;
}
break;
case 5:
if ((D_8011511E & 0x40) != 0) {
rs = (s16)((s32 (*)(s32))func_801416D4)(D_80115152);
if (rs != 0) {
if (rs < 0) {
D_8011512A = 1;
} else {
D_8011511A = D_8011511A - 3;
func_80141C0C(4);
return 1;
}
}
break;
}
if ((D_8011511E & 0x10) != 0) {
goto tail6;
}
break;
case 6:
if ((D_8011511E & 0x10) == 0) {
break;
}
tail6:
pg = &D_8011511E;
*pg = *pg & 0xFFEF;
D_8011511A = D_8011511A - 3;
func_80141C0C(6);
return 1;
case 7:
if ((D_8011511E & 0xA000) != 0) {
chg = func_80140608(7);
}
tail7:
func_801407F4();
break;
}
ps = &D_8011511A;
st = *ps;
p2e = (u8 *)ps + 0x2E;
p3e = (u8 *)ps + 0x3E;
off = st << 1;
pcur = p2e + off;
pmax = p3e + off;
if (st == 2 || 1 < pmax[0]) {
if ((D_8011511E & 0x1000) != 0) {
pcur[0] = pcur[0] - 1;
chg = 1;
if (0x7F < pcur[0]) {
if (D_8011511A != 3) {
pcur[0] = pmax[0] - 1;
} else {
pcur[0] = 0;
chg = 0;
}
}
}
if ((D_8011511E & 0x4000) != 0) {
b = pcur[0];
pcur[0] = b + 1;
chg = 1;
if (pmax[0] <= (u8)(b + 1)) {
if (D_8011511A != 3) {
pcur[0] = 0;
} else {
pcur[0] = b;
chg = 0;
}
}
}
if (D_8011511A == 2 && D_80115128 == 1) {
if ((D_8011511E & 0x8000) != 0) {
pcur[1] = pcur[1] - 1;
chg = 1;
if (0x7F < pcur[1]) {
pcur[1] = pmax[1] - 1;
}
}
if ((D_8011511E & 0x2000) != 0) {
pcur[1] = pcur[1] + 1;
chg = 1;
if (pmax[1] <= pcur[1]) {
pcur[1] = 0;
}
}
} else {
bb = pcur[0];
m = D_80115140[D_8011511A];
d = (s8)bb - (s8)m;
if (d > 0) {
D_80115140[D_8011511A] = bb;
} else if (d < 0) {
D_80115140[D_8011511A] = bb;
}
}
if (D_8011511A == 1) {
D_80115128 = ((s32 (*)(s32))func_8014168C)(1) + 1;
if ((D_8011511E & 0x5000) != 0) {
D_8011514C = 0;
}
}
*(u16 *)&D_8011515C = D_801913E4[D_80115128];
if ((chg << 0x10) != 0) {
func_80141C0C(1);
}
}
return 0;
}
+40 -40
View File
@@ -54,7 +54,7 @@
},
"kinds": {
"asm-body/direct": 13,
"barrier/direct": 3695,
"barrier/direct": 3561,
"barrier/via-macro": 2,
"gte-lever/direct": 362,
"gte-lever/via-macro": 100,
@@ -72,26 +72,26 @@
"binaries": 218,
"classes": {
"A": {
"bodies": 5410,
"distinct_bodies": 954,
"bodies": 5276,
"distinct_bodies": 953,
"file_scope": 0,
"in_bodies": 14415,
"in_bodies": 13879,
"kinds": {
"pin": 14415
"pin": 13879
},
"marked": 14415,
"sites": 14415,
"tus": 2211,
"marked": 13879,
"sites": 13879,
"tus": 2080,
"unmarked": 0
},
"B": {
"bodies": 7486,
"distinct_bodies": 905,
"bodies": 7352,
"distinct_bodies": 904,
"file_scope": 13,
"in_bodies": 19904,
"in_bodies": 19770,
"kinds": {
"asm-body": 13,
"barrier": 3697,
"barrier": 3563,
"gte": 6858,
"gte-lever": 462,
"gte-unsigned": 3,
@@ -100,9 +100,9 @@
"launder": 3686,
"verbatim-body": 2682
},
"marked": 10640,
"sites": 19917,
"tus": 2111,
"marked": 10506,
"sites": 19783,
"tus": 1980,
"unmarked": 9277
},
"C": {
@@ -207,9 +207,9 @@
"coverage": {
"asm": {
"comment_dead": 6792,
"live": 34948,
"live": 34278,
"macro_block": 194,
"raw": 41934
"raw": 41264
},
"attribute": {
"comment_dead": 0,
@@ -225,9 +225,9 @@
},
"register": {
"comment_dead": 8587,
"live": 14465,
"live": 13929,
"macro_block": 18,
"raw": 23070
"raw": 22534
},
"volatile": {
"comment_dead": 2480,
@@ -237,7 +237,7 @@
}
},
"coverage_ok": true,
"elapsed_s": 24.2,
"elapsed_s": 23.5,
"generated": "2026-09-10",
"gte_levers": {
"direct": 362,
@@ -248,15 +248,15 @@
"via_macro": 100,
"what": "GTE ops whose clobbers exceed the canonical macro's (a scheduling steer): class-B levers INSIDE the headline number since T5 (2026-09-09), marked, 0 at the close"
},
"head": "17d192d24",
"head": "0d92d1029",
"headers": 3181,
"levers_AB": {
"asm": 10374,
"bodies": 6451,
"distinct_bodies": 1258,
"marked": 24789,
"pins": 14415,
"sites": 24789,
"asm": 10240,
"bodies": 6317,
"distinct_bodies": 1257,
"marked": 24119,
"pins": 13879,
"sites": 24119,
"unmarked": 0,
"what": "register pins + asm statements excluding GTE ops: the classes the phase drives to 0"
},
@@ -400,12 +400,12 @@
"$14": 139,
"$15": 1,
"$16": 707,
"$17": 497,
"$17": 363,
"$18": 180,
"$19": 572,
"$2": 2748,
"$19": 438,
"$2": 2614,
"$20": 284,
"$21": 407,
"$21": 273,
"$22": 7,
"$23": 144,
"$25": 1,
@@ -423,30 +423,30 @@
"v0": 2,
"v1": 3
},
"sites": 14415,
"sites": 13879,
"sp": 13,
"spelling": {
"__asm__": 14337,
"__asm__": 13801,
"asm": 78
},
"volatile_qualified": 7,
"zero": 385
},
"src_stamp": "592dd59144776f8d",
"src_stamp": "7acc05a78e4a19dc",
"tus": 4121,
"unclassified": 0,
"union_AD": {
"bodies": 9714,
"bodies": 9580,
"by_kind": {
"main": 165,
"md": 135,
"ov": 9185,
"ov": 9052,
"resident": 10,
"shared": 219
"shared": 218
},
"copies_in_multi": 8451,
"distinct_bodies": 1543,
"multi_copy_classes": 280
"copies_in_multi": 8317,
"distinct_bodies": 1542,
"multi_copy_classes": 279
},
"verbatim_excluded": {
"functions": 13,
+11 -11
View File
@@ -1,31 +1,31 @@
lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13)
coverage asm raw 41934 = live 34948 + macro-block 194 + comment/dead 6792
coverage register raw 23070 = live 14465 + macro-block 18 + comment/dead 8587
coverage asm raw 41264 = live 34278 + macro-block 194 + comment/dead 6792
coverage register raw 22534 = live 13929 + macro-block 18 + comment/dead 8587
coverage volatile raw 4456 = live 1894 + macro-block 82 + comment/dead 2480
coverage builtin raw 599 = live 445 + macro-block 0 + comment/dead 154
coverage attribute raw 76 = live 76 + macro-block 0 + comment/dead 0
class sites in-bodies file-scope bodies distinct TUs marked unmarked kinds
A pins 14415 14415 0 5410 954 2211 14415 0 {'pin': 14415}
B asm 19917 19904 13 7486 905 2111 10640 9277 {'barrier': 3697, 'launder': 3686, 'gte': 6858, 'gte-lever': 462, 'gte-unsigned': 3, 'instruction': 1199, 'asm-body': 13, 'keepalive': 1317, 'verbatim-body': 2682}
A pins 13879 13879 0 5276 953 2080 13879 0 {'pin': 13879}
B asm 19783 19770 13 7352 904 1980 10506 9277 {'instruction': 1199, 'keepalive': 1317, 'gte': 6858, 'barrier': 3563, 'gte-lever': 462, 'gte-unsigned': 3, 'launder': 3686, 'asm-body': 13, 'verbatim-body': 2682}
C volatile 1590 1438 152 496 96 610 14 1576 {'decl-body': 58, 'decl-file': 152, 'cast': 1378, 'param': 2}
D register 50 50 0 47 47 6 0 50 {'register': 50}
E asm-label 7680 1257 6423 989 119 2084 0 7680 {'asm-label': 7680}
F builtin 445 445 0 428 28 302 0 445 {'builtin': 445}
G attribute 76 1 75 1 1 40 0 76 {'attribute': 76}
UNION A–D: 9,714 bodies · 1,543 distinct (addresses normalized) · 280 multi-copy classes holding 8,451 bodies · by kind {'ov': 9185, 'md': 135, 'main': 165, 'shared': 219, 'resident': 10}
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 24,789 sites in 6,451 bodies (1,258 distinct) · marked !FAKE 24,789 · UNMARKED 0
UNION A–D: 9,580 bodies · 1,542 distinct (addresses normalized) · 279 multi-copy classes holding 8,317 bodies · by kind {'ov': 9052, 'md': 135, 'main': 165, 'shared': 218, 'resident': 10}
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 24,119 sites in 6,317 bodies (1,257 distinct) · marked !FAKE 24,119 · UNMARKED 0
orphan !FAKE markers (no pin/asm site on the line nor below): 0
GTE levers (clobbers beyond the canonical macro's): 462 sites (100 via a variant macro, 362 direct) · marked 462 · UNMARKED 0 · unsigned GTE statements 3
per-TU asm macro definitions outside the GTE header: 314 {'launder': 154, 'gte': 150, 'instruction': 9, 'barrier': 1} (GTE variants 64)
pins: 14,415 · $0 385 · $sp 13 · with initializer 1,243 · volatile-qualified 7 · bare-name 15 · spellings {'__asm__': 14337, 'asm': 78}
per-TU asm macro definitions outside the GTE header: 314 {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1} (GTE variants 64)
pins: 13,879 · $0 385 · $sp 13 · with initializer 1,243 · volatile-qualified 7 · bare-name 15 · spellings {'__asm__': 13801, 'asm': 78}
whole-body asm routines in C shells, manifest PERMANENT (hand asm, NOT levers): 22 routines · 2,682 sites (2,660 private copies + 22 shared headers); asm-bodies NOT permanent (levers): 13 site(s) ['func_8001E378:DECOMPILE-NOW', 'func_80020F34:DECOMPILE-NOW', 'func_800249F0:DECOMPILE-NOW', 'func_80025CBC:DECOMPILE-NOW', 'func_80026514:UNCERTAIN', 'func_800268D0:UNCERTAIN', 'func_80027058:DECOMPILE-NOW', 'func_80027200:DECOMPILE-NOW', 'func_800CBA44:DECOMPILE-NOW', 'func_8017D810:DECOMPILE-NOW', 'func_8017E26C:UNCERTAIN', 'func_80184440:DECOMPILE-NOW', 'func_801A3BCC:DECOMPILE-NOW']
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 3695, 'barrier/via-macro': 2, 'gte/direct': 200, 'gte/via-macro': 6658, 'gte-lever/direct': 362, 'gte-lever/via-macro': 100, 'gte-unsigned/direct': 3, 'instruction/direct': 1177, 'instruction/via-macro': 22, 'keepalive/direct': 1317, 'launder/direct': 3242, 'launder/via-macro': 444, 'verbatim-body/direct': 2682}
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 3561, 'barrier/via-macro': 2, 'gte/direct': 200, 'gte/via-macro': 6658, 'gte-lever/direct': 362, 'gte-lever/via-macro': 100, 'gte-unsigned/direct': 3, 'instruction/direct': 1177, 'instruction/via-macro': 22, 'keepalive/direct': 1317, 'launder/direct': 3242, 'launder/via-macro': 444, 'verbatim-body/direct': 2682}
instruction mnemonics: {'addu': 834, 'la': 142, 'lh': 134, 'move': 25, 'addiu': 22, 'RTP_SND': 22, '.section': 7, 'lui': 4, 'and': 2, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
gte mnemonics: {'gte_ldv0': 757, 'gte_stlvnl': 593, 'gte_stsxy': 447, 'gte_rtps': 437, 'gte_stflg': 415, 'gte_rtpt': 352, 'gte_SetRotMatrix': 246, 'gte_stsxy3': 236, 'gte_rtv0tr': 228, 'gte_SetTransMatrix': 226, 'gte_ldv3c': 184, 'gte_ldv3': 177, 'gte_ldrgb': 164, 'gte_stsv': 161, 'lwc2': 159, 'gte_stsz4': 149, 'gte_stsz3': 147, 'gte_stszotz': 134, 'gte_ldIR0z': 134, 'gte_ldIRGB': 134, 'gte_dpcl': 134, 'gte_stORGB': 134, 'gte_stsxy3_f3': 111, 'gte_stclmv': 108, 'gte_nclip': 108, 'gte_stopz': 108, 'gte_stsxy3c': 108, 'gte_stsxy3_ft3': 79, 'gte_rtir': 75, 'gte_ldclmv': 72}
asm-bearing macro definitions: 314 (20 names, 3 with >1 text) kinds {'launder': 154, 'gte': 150, 'instruction': 9, 'barrier': 1}
asm-bearing macro definitions: 314 (20 names, 3 with >1 text) kinds {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1}
controls (R39):
src/800.c func_800226C0 pins got 14 expected 45 N-A
src/shared/ov/func_80178004.h pins got 8 expected 26 N-A
ov_SC03_006 func_80184034 bare-name pins got 0 expected 3 N-A
engine_prelude.h asm sites (a macro definition only) got 0 expected 0 OK
elapsed 24.2 s
elapsed 23.5 s
+173 -173
View File
@@ -1,7 +1,7 @@
{
"head": "17d192d24",
"head": "0d92d1029",
"stamp": "b44c5a8a3423",
"generated": "2026-09-10 13:14",
"generated": "2026-09-10 13:26",
"aliases": [
"main",
"ov_SC03_014",
@@ -21,207 +21,207 @@
"main": {
"objects": 85,
"identical": 85,
"seconds": 5.466999999999998,
"seconds": 5.441999999999999,
"mean_s": 0.064
},
"ov_SC03_014": {
"objects": 32,
"identical": 32,
"seconds": 3.8589999999999995,
"mean_s": 0.121
"seconds": 4.081,
"mean_s": 0.128
},
"ov_SC03_015": {
"objects": 32,
"identical": 32,
"seconds": 3.79,
"mean_s": 0.118
"seconds": 3.869,
"mean_s": 0.121
},
"ov_SC04_011": {
"objects": 28,
"identical": 28,
"seconds": 3.475,
"mean_s": 0.124
"seconds": 3.549,
"mean_s": 0.127
}
},
"per_object_seconds": {
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"build/src/800_c.o": 0.154,
"build/src/800b2.o": 0.054,
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"seconds": 2.5
}
File diff suppressed because one or more lines are too long
+97 -1
View File
@@ -2604,7 +2604,69 @@ def narrow_chains(text, tu, fn, d_, cap=24):
return out
ALL_FAMILIES = ("R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10", "R12", "R13", "R14", "R15", "R16", "R17", "R18", "R19", "R20")
def second_consumer(text, tu, fn, d_):
"""[(description, candidate text)] — R21: give a computed value a SECOND CONSUMER before its copy, so the compiler
stops deleting the copy. Two spellings, both byte-proven by T7 agents on the same day (P36 S102):
* CHAIN (agent b6, func_80161E08, 127 bodies): `v = E; slot = v;` -> `v = slot = E;`
* HOIST (agent b2, func_80162438, 127 bodies): `v = E; slot = v;` -> `slot = E; v = E;`
The residual both closed was COUNT-short by exactly one `move <callee-saved>,<caller-saved>` per site — the copy the
original keeps and our C let the compiler delete. Two gates decide it and the move defeats both. cse's
"(set REG0 REG1) where REG0 is the cheapest" rewrite (`cse.c:7440-7501`, guarded at `:7454-7460`) deletes the copy
only when the insn IMMEDIATELY BEFORE it set the source; and `flow` builds a LOG_LINK only to the FIRST following use
(`flow.c:2076-2091`), so once the store sits between the compute and the copy, combine is never even offered the
pair. The chained form reaches the same place differently: `expand_assignment` materialises the value in a compiler
temp with two consumers, and the single link goes to the store.
`R9 swap-stmts` can never produce either, because the two statements share the identifier `v` and its independence
guard refuses the exchange — which is why ~2,000 compiles per body sat flat on both."""
lines = text.split("\n")
masked = [sc.mask_text(l) for l in lines]
lo, hi = d_["line"], d_["end"] - 1
ASSIGN = re.compile(r"^\s*([A-Za-z_]\w*)\s*=\s*(.+);\s*$")
out, sites = [], []
for i in range(lo, hi - 1):
if not simple_stmt(masked[i]) or not simple_stmt(masked[i + 1]):
continue
a = ASSIGN.match(masked[i])
if not a:
continue
v, expr = a.group(1), a.group(2).strip()
b = re.match(r"^\s*(.+?)\s*=\s*" + re.escape(v) + r"\s*;\s*$", masked[i + 1])
if not b:
continue
slot = lines[i + 1][:lines[i + 1].rindex("=")].strip()
if not slot or slot == v:
continue
raw_expr = lines[i][lines[i].index("=") + 1:].rsplit(";", 1)[0].strip()
ind = lines[i][:len(lines[i]) - len(lines[i].lstrip())]
chain = list(lines)
chain[i] = f"{ind}{v} = {slot} = {raw_expr};"
chain[i + 1] = None
out.append((f"chain {v}={slot} @{i + 1}", "\n".join(l for l in chain if l is not None)))
hoist = list(lines)
hoist[i] = f"{ind}{slot} = {raw_expr};"
hoist[i + 1] = f"{ind}{v} = {raw_expr};"
out.append((f"consumer-first {slot} before {v} @{i + 1}", "\n".join(hoist)))
sites.append((i, ind, v, slot, raw_expr))
# THE JOINT FORM: agent b6's body needed all THREE of its sites rewritten at once, and one site alone is worse than
# the start. The same lesson R20 measured — a hill-climb over single sites walks away from the answer.
if len(sites) > 1:
for tag, mk in (("chain", lambda ind, v, slot, e: [f"{ind}{v} = {slot} = {e};"]),
("consumer-first", lambda ind, v, slot, e: [f"{ind}{slot} = {e};", f"{ind}{v} = {e};"])):
cand, drop = list(lines), set()
for i, ind, v, slot, e in sites:
repl = mk(ind, v, slot, e)
cand[i] = "\n".join(repl)
if len(repl) == 1:
drop.add(i + 1)
out.append((f"{tag} ALL {len(sites)} sites",
"\n".join(l for k, l in enumerate(cand) if k not in drop)))
return out
ALL_FAMILIES = ("R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10", "R12", "R13", "R14", "R15", "R16", "R17", "R18", "R19", "R20", "R21")
RUNG_R_FAMILIES = ("R2", "R3", "R4", "R5", "R6", "R7") # the free sweep's set (R8/R9 are the search engine's until measured)
@@ -2727,6 +2789,9 @@ def recipe_candidates(text, tu, fn, names, limit=24, rng=None, cap=40, blocks=Tr
if "R20" in fam:
for desc, cand in narrow_chains(text, tu, fn, d_):
out.append(("R20", desc, cand))
if "R21" in fam:
for desc, cand in second_consumer(text, tu, fn, d_):
out.append(("R21", desc, cand))
if blocks and "R7" in fam: # last: one candidate per statement, so the targeted recipes go first
for desc, cand in block_wraps(text, tu, fn, d_):
out.append(("R7", desc, cand))
@@ -3649,6 +3714,37 @@ def selftest():
"src/fx/n.c", shared_defs=None) if r["form"] == "def")):
fail("R20 must offer nothing when no two locals are linked by an assignment")
# R21, the second consumer (T7 agents b2 and b6, P36 S102 — the same idea in two spellings, 127 bodies each).
SFIX = ("void func_80100000(u8 *base) {\n"
" u8 *p;\n"
"\n"
" p = base + 0x10;\n"
" D_80000000[0] = p;\n"
" p = base + 0x20;\n"
" D_80000000[1] = p;\n"
"}")
dS = next(r for r in sc.scan_text(SFIX, "src/fx/s2.c", shared_defs=None)
if r["form"] == "def" and r["name"] == "func_80100000")
s21 = second_consumer(SFIX, "src/fx/s2.c", "func_80100000", dS)
ds = [d for d, _ in s21]
if not any(d.startswith("chain p=D_80000000[0]") for d in ds) or not any("ALL 2 sites" in d for d in ds):
fail(f"R21 must offer each site and the joint form, got {ds}")
else:
one = next(c for d, c in s21 if d.startswith("chain p=D_80000000[0]"))
allc = next(c for d, c in s21 if d == "chain ALL 2 sites")
if "p = D_80000000[0] = base + 0x10;" not in one or one.count("D_80000000[0]") != 1:
fail(f"R21's chain must fold the two statements into one: {one!r}")
if allc.count(" = base + 0x") != 2 or "D_80000000[1] = p;" in allc:
fail(f"R21's joint form must rewrite every site: {allc!r}")
hoist = next(c for d, c in s21 if d.startswith("consumer-first"))
if "D_80000000[0] = base + 0x10;" not in hoist or "p = base + 0x10;" not in hoist:
fail(f"R21's hoist must put the store first and repeat the expression: {hoist!r}")
# control: a pair that does not feed a store offers nothing
NO = "void func_80100000(void) {\n int a;\n a = f();\n g(a);\n}"
if second_consumer(NO, "src/fx/s2.c", "func_80100000",
next(r for r in sc.scan_text(NO, "src/fx/s2.c", shared_defs=None) if r["form"] == "def")):
fail("R21 must offer nothing when the next statement is not an assignment OF the value")
# the oracle's crash classification on its real message forms (R103)
if not oracle.SIGNAL_LINE.search("bash: line 1: 3845091 Done mipsel-linux-gnu-cpp ...\n 3845092 Aborted (core dumped) | tools/bin/gcc-2.7.2-psx/cc1 -quiet\n"):
fail("SIGNAL_LINE must match bash's job-status block")
@@ -15,6 +15,7 @@ while a run is going. Per exemplar:
ORDER.tsv ranks the exemplars: best distance reached so far ascending, then copies descending — the cheapest readings first.
"""
import argparse
import re
import collections
import json
import os
@@ -88,17 +88,17 @@ FAMILIES = {
# R15 (the sink) is the arm-scoped form of the same tie: a value set in every arm of an if/else chain is a CROSS-BLOCK
# pseudo local-alloc never gives a quantity, so the arm holds two quantities and takes block_alloc's unrolled case 2;
# sinking makes it three, and case 3 falls through into case 2 and undoes its own exchange (T7 agent a1, func_80156044).
"REG-caller": ("R19", "R6", "R20", "R16", "R8", "R15", "R17", "R5", "R18", "R10", "R12", "R14", "R13", "R3", "R7", "R9", "R2", "R4"),
"REG-caller": ("R19", "R21", "R6", "R20", "R16", "R8", "R15", "R17", "R5", "R18", "R10", "R12", "R14", "R13", "R3", "R7", "R9", "R2", "R4"),
# the s-bank order is global.c's allocno_compare (ref weight x live length), declaration order only on an exact tie
"REG-callee": ("R19", "R20", "R2", "R4", "R3", "R6", "R16", "R8", "R15", "R18", "R12", "R7", "R9", "R17", "R10", "R14", "R13", "R5"),
"REG-mixed": ("R19", "R6", "R20", "R16", "R2", "R15", "R17", "R18", "R5", "R10", "R4", "R3", "R8", "R12", "R13", "R14", "R7", "R9"),
"REG-callee": ("R19", "R21", "R20", "R2", "R4", "R3", "R6", "R16", "R8", "R15", "R18", "R12", "R7", "R9", "R17", "R10", "R14", "R13", "R5"),
"REG-mixed": ("R19", "R21", "R6", "R20", "R16", "R2", "R15", "R17", "R18", "R5", "R10", "R4", "R3", "R8", "R12", "R13", "R14", "R7", "R9"),
# a copy dies to cse's canon_reg or the local-alloc tie unless its destination changes MODE (the width); an address
# pseudo lives when a pointer local is used twice; a value named once is computed once; a short PARAMETER is extended in place
"COUNT": ("R19", "R20", "R12", "R16", "R14", "R15", "R6", "R8", "R3", "R18", "R7", "R17", "R5", "R13", "R9", "R10", "R2", "R4"),
"COUNT": ("R19", "R21", "R20", "R12", "R16", "R14", "R15", "R6", "R8", "R3", "R18", "R7", "R17", "R5", "R13", "R9", "R10", "R2", "R4"),
# statement order IS the schedule among equal-priority insns (rank_for_schedule's LUID tie-break); do-while is a barrier
# R17 is the DIRECTED form of the run-split R9 reaches only by luck: agent a2 measured 2,271 compiles for R9 to find it
# in func_80168828 and R16+R17 reproduce the same close in ten.
"ORDER": ("R19", "R17", "R18", "R20", "R9", "R7", "R13", "R3", "R16", "R6", "R8", "R5", "R12", "R14", "R10", "R15", "R2", "R4"),
"ORDER": ("R19", "R17", "R18", "R20", "R21", "R9", "R7", "R13", "R3", "R16", "R6", "R8", "R5", "R12", "R14", "R10", "R15", "R2", "R4"),
"MIXED": dl.ALL_FAMILIES,
"OTHER": dl.ALL_FAMILIES,
}
@@ -870,10 +870,12 @@ def selftest():
# leads, and every TARGETED caller-saved lever — R5 the commutative swap, R15 the sink, R16 the constant holder —
# is drawn before the BLIND families that permute declarations or statements wholesale (R9, R2, R4).
caller = FAMILIES["REG-caller"]
# R19 leads (the only family that can change a call's arity, and free when it does not apply), R6 the temp move next,
# R19 leads (the only family that can change a call's arity, and free when it does not apply), R6 the temp move is
# still near the front, and every TARGETED lever precedes every BLIND family. The window is deliberately loose: it
# was widened once per new generator until it stopped expressing anything, so it now states the ORDERING RULE only.
# and every TARGETED lever before every BLIND family that permutes declarations or statements wholesale.
targeted, blind = {"R5", "R15", "R16", "R19"}, {"R9", "R2", "R4"}
if family_key(c) != "REG-caller" or caller[:2] != ("R19", "R6") or not targeted <= set(caller) \
if family_key(c) != "REG-caller" or caller[0] != "R19" or "R6" not in caller[:4] or not targeted <= set(caller) \
or max(caller.index(t) for t in targeted) > min(caller.index(b) for b in blind):
fail(f"REG-caller family wrong: {family_key(c)} {caller}")
# a callee-saved swap: addu s0,a0,zero vs addu s1,a0,zero
+1
View File
@@ -27,3 +27,4 @@ date milestone head sites_AB pins asm bodies_AB distinct_AB marked unmarked gte_
2026-09-10 S102 T7 b3 — func_8016CBC0: two counter chains narrowed TOGETHER (128 bodies); single declarations could never reach it acba5c59d 26074 14938 11136 7228 1265 26074 0 462 314 1590 50 7428 445 76
2026-09-10 S102 T7 wave b — b2/b5/b5s/b6 banked plus R19 and R20's own closes (766 bodies): a chained assignment, a symbol alias defeating cross-jump, and the store hoisted above its copy 9d78fc408 24915 14541 10374 6577 1259 24915 0 462 314 1590 50 7680 445 76
2026-09-10 S102 T7 b7 — func_80166690: four accumulators retyped short in ONE edit, the truncation temps deleted, the colour temp typed to its destination field (126 bodies) 17d192d24 24789 14415 10374 6451 1258 24789 0 462 314 1590 50 7680 445 76
2026-09-10 S102 T7 b8 — func_80135888: a guarded do-while defeating cross-jump, a duplicated block replaced by goto to shed one loop-weighted reference, and a two-arm temp inlined (134 bodies, the largest class) 0d92d1029 24119 13879 10240 6317 1257 24119 0 462 314 1590 50 7680 445 76
1 date milestone head sites_AB pins asm bodies_AB distinct_AB marked unmarked gte_levers per_tu_asm_macros class_C class_D class_E class_F class_G
27 2026-09-10 S102 T7 b3 — func_8016CBC0: two counter chains narrowed TOGETHER (128 bodies); single declarations could never reach it acba5c59d 26074 14938 11136 7228 1265 26074 0 462 314 1590 50 7428 445 76
28 2026-09-10 S102 T7 wave b — b2/b5/b5s/b6 banked plus R19 and R20's own closes (766 bodies): a chained assignment, a symbol alias defeating cross-jump, and the store hoisted above its copy 9d78fc408 24915 14541 10374 6577 1259 24915 0 462 314 1590 50 7680 445 76
29 2026-09-10 S102 T7 b7 — func_80166690: four accumulators retyped short in ONE edit, the truncation temps deleted, the colour temp typed to its destination field (126 bodies) 17d192d24 24789 14415 10374 6451 1258 24789 0 462 314 1590 50 7680 445 76
30 2026-09-10 S102 T7 b8 — func_80135888: a guarded do-while defeating cross-jump, a duplicated block replaced by goto to shed one loop-weighted reference, and a two-arm temp inlined (134 bodies, the largest class) 0d92d1029 24119 13879 10240 6317 1257 24119 0 462 314 1590 50 7680 445 76
+4 -1
View File
@@ -73,6 +73,7 @@ counted, not marked). E, F and G belong to the canonical type layer and are the
| 2026-09-10 | S102 T7 b3 — func_8016CBC0: two counter chains narrowed TOGETHER (128 bodies); single declarations could never reach it | 14938 | 11136 | **26074** | 7228 | 1265 | 462 | 314 | 1590 | 50 | 7428 | 445 | 76 | `acba5c59d` |
| 2026-09-10 | S102 T7 wave b — b2/b5/b5s/b6 banked plus R19 and R20's own closes (766 bodies): a chained assignment, a symbol alias defeating cross-jump, and the store hoisted above its copy | 14541 | 10374 | **24915** | 6577 | 1259 | 462 | 314 | 1590 | 50 | 7680 | 445 | 76 | `9d78fc408` |
| 2026-09-10 | S102 T7 b7 — func_80166690: four accumulators retyped short in ONE edit, the truncation temps deleted, the colour temp typed to its destination field (126 bodies) | 14415 | 10374 | **24789** | 6451 | 1258 | 462 | 314 | 1590 | 50 | 7680 | 445 | 76 | `17d192d24` |
| 2026-09-10 | S102 T7 b8 — func_80135888: a guarded do-while defeating cross-jump, a duplicated block replaced by goto to shed one loop-weighted reference, and a two-arm temp inlined (134 bodies, the largest class) | 13879 | 10240 | **24119** | 6317 | 1257 | 462 | 314 | 1590 | 50 | 7680 | 445 | 76 | `0d92d1029` |
### The campaign — every batch, from the ledger (derived on every render)
@@ -170,7 +171,9 @@ counted, not marked). E, F and G belong to the canonical type layer and are the
| `b5sp` | 2026-09-10 | E | 0 | 0 | 0 | 125 | 125 |
| `b7` | 2026-09-10 | E | 0 | 0 | 0 | 1 | 1 |
| `b7p` | 2026-09-10 | E | 0 | 0 | 0 | 125 | 125 |
| **total** | | | **17,119** | **20,778** | **283** | **9,464** | **6,270** |
| `b8` | 2026-09-10 | E | 0 | 0 | 0 | 5 | 1 |
| `b8p` | 2026-09-10 | E | 0 | 0 | 0 | 665 | 133 |
| **total** | | | **17,119** | **20,778** | **283** | **10,134** | **6,404** |
*Generated by `tools/lever_progress.py --render` from `.run/P36/census/lever_census.json` and `.run/P36/delever/ledger.jsonl`; the series lives in `docs/lever-progress.tsv` (R75: published numbers are generated, never typed).*
+11 -13
View File
@@ -2565,13 +2565,12 @@ extern s32 D_80184154;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung B tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -2582,14 +2581,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -2606,19 +2603,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -638,13 +638,12 @@ extern s32 D_801A447C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -655,14 +654,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -679,19 +676,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801EC70C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_8018EE74;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801CC5D4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801A2084;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801F1EE4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_8019A964;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -686,13 +686,12 @@ extern s32 D_801D9524;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -703,14 +702,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -727,19 +724,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801C4794;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801C623C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801E6D6C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_80194FBC;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801E3034;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801E9F14;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_8018F094;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801B2CAC;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801EE4D4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_80191A44;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801CEE84;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801D8BF4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801D1B94;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801B630C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801BD63C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -2566,13 +2566,12 @@ extern s32 D_801C844C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung B tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -2583,14 +2582,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -2607,19 +2604,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_8019F9EC;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801B7D64;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801ED3E4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801CA464;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_8018E76C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801F60E4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801E8A3C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_8019EC9C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801A0F34;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_80193D54;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801AC024;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801E95A4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_8019797C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801BFF14;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801EA24C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801D8224;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801E081C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801C4C1C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801C54D4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801CA93C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801D100C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801B1BD4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801CB044;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801D1E84;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_8019AA7C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_80199534;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801A95BC;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801C422C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801BDEFC;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801C7184;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_8019CA4C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801B86C4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801C387C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801BEE14;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801B83A4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -2567,13 +2567,12 @@ extern s32 D_8019A7AC;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung B tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -2584,14 +2583,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -2608,19 +2605,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801A0694;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801990A4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801A0E4C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801B8354;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801ABBB4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801A4744;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801A83DC;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_80193D34;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801968C4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801CD03C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801D2F8C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801ADA34;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801E055C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801C2E54;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -637,13 +637,12 @@ extern s32 D_801A87CC;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -654,14 +653,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -678,19 +675,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801BFADC;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_8019A744;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801B2544;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801C071C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_8019C9C4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801B3F7C;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_80190C54;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_80196E64;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_8018E2FC;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801EDA64;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B t3_tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B t3_tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B t3_tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung B t3_tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B t3_tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{
+11 -13
View File
@@ -635,13 +635,12 @@ extern s32 D_801909D4;
s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 pad_[8];
register s32 m __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung A tus1)
s32 sp;
register s32 p1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung A tus1)
s32 p1;
s32 mode;
register s32 p0 __asm__("$19"); // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung A tus1)
s32 p0;
s32 base;
register s32 p3 __asm__("$21"); // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung A tus1)
s32 p3;
p0 = arg0;
p1 = arg1;
@@ -652,14 +651,12 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
return 0;
case 1:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 0;
break;
case 2:
base = p0 + 0x34;
m = p1 & 0xFFFFFFF;
sp = m | 0x80000000;
sp = (p1 & 0xFFFFFFF) | 0x80000000;
mode = 1;
break;
case 3:
@@ -676,19 +673,20 @@ s32 func_80135888(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
if (p1 < 0) {
if (func_80135EB0(sp, 0) != 0) {
func_80136A94(mode, p0, p3, base);
return 1;
goto hit;
}
sp = *(s32 *)sp;
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung A tus1)
while (sp != 0) {
if (sp == 0) {
return 0;
}
do {
if (func_80135EB0(sp, 0) != 0) {
hit:
func_80136A94(mode, p0, p3, base);
return 1;
}
sp = *(s32 *)sp;
}
} while (sp != 0);
return 0;
}
{

Some files were not shown because too many files have changed in this diff Show More