mirror of
https://github.com/Druthulu/BFM-decomp
synced 2026-10-02 07:59:52 -04:00
refactor(fleet): convert 26 DECOMPILE-NOW verbatim bodies to stubs
Every remaining DECOMPILE-NOW row in config/verbatim_manifest.json that was still a §265 verbatim __asm__ body: main 13 (incl. `main` itself, 509 ins, in src/boot.c), md_MAIN_003 11, md_MAIN_020 1, ov_SC06_010 1. They were byte-identical by construction and completely undecompiled, and no gate or draw could see them — draw_waves reported only 26 drawable stubs fleet-wide while 27 more sat locked in this form. Byte-neutral, verified per binary: main 143dbb89, md_MAIN_003 dd1b32ec, md_MAIN_020 0990e041, ov_SC06_010 05c2d8c4. SKIPPED ov_SC03_107:func_8017D878. The manifest marks it DECOMPILE-NOW but the cookbook's §265 addendum documents it as a DELIBERATE verbatim bank: its only use in the TU is address-taken, forcing a `void f(void)` declaration the real body contradicts, and no C spelling reconciles them. Two sources disagree; the one with the byte evidence wins. md_MAIN_020 and ov_SC06_010 needed --asm-subdir: both are single-TU overlays with zero INCLUDE_ASM lines left, so there is no prefix in the binary to derive from. Spelling confirmed against a sibling overlay's own stubs.
This commit is contained in:
Drew T
@@ -718,68 +718,7 @@ s16 func_8001311C(s16 a0, s16 a1, s16 a2) {
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* Byte-equivalent to the INCLUDE_ASM stub by construction; the function is NOT
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* decompiled (§265 ACCOUNTING). Immediates/offsets are decimal for maspsx (§383).
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*/
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__asm__(
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".text\n"
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".align\t2\n"
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".globl\tfunc_80013154\n"
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".ent\tfunc_80013154\n"
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"func_80013154:\n"
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".frame\t$sp,0,$31\n"
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".mask\t0x00000000,0\n"
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".fmask\t0,0\n"
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".set\tnoreorder\n"
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"addu $t0,$a2,$zero\n"
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"addu $t2,$a0,$zero\n"
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"sll $v0,$a0,16\n"
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"sra $a3,$v0,16\n"
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"sll $v0,$a1,16\n"
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"sra $v1,$v0,16\n"
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"bne $a3,$v1,.L8001317C\n"
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" addu $t1,$a1,$zero\n"
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"j .L800131F8\n"
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" addu $v0,$zero,$zero\n"
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".L8001317C:\n"
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"slt $a3,$v1,$a3\n"
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"beqz $a3,.L80013190\n"
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" addu $v0,$a0,$t0\n"
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"negu $t0,$a2\n"
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"addu $v0,$a0,$t0\n"
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".L80013190:\n"
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"addu $a2,$v0,$zero\n"
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"sll $v0,$v0,16\n"
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"sra $v0,$v0,16\n"
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"slt $v0,$v0,$v1\n"
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"bnez $v0,.L800131B8\n"
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" nop\n"
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"bnez $a3,.L800131B8\n"
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" subu $v0,$a1,$a0\n"
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"j .L800131F4\n"
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" sll $v0,$v0,16\n"
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".L800131B8:\n"
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"sll $v0,$a2,16\n"
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"sra $v0,$v0,16\n"
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"sll $v1,$t1,16\n"
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"sra $v1,$v1,16\n"
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"slt $v0,$v1,$v0\n"
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"bnez $v0,.L800131F4\n"
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" sll $v0,$t0,16\n"
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"sll $v0,$t2,16\n"
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"sra $v0,$v0,16\n"
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"slt $v0,$v0,$v1\n"
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"bnez $v0,.L800131F0\n"
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" subu $v0,$t1,$t2\n"
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"j .L800131F4\n"
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" sll $v0,$v0,16\n"
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".L800131F0:\n"
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"sll $v0,$t0,16\n"
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".L800131F4:\n"
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"sra $v0,$v0,16\n"
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".L800131F8:\n"
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"jr $ra\n"
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" nop\n"
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".set\treorder\n"
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".end\tfunc_80013154\n"
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);
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INCLUDE_ASM("asm/nonmatchings/800", func_80013154);
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extern s32 func_80013228(s32 *a0, s32 *a1);
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+11
-570
@@ -421,285 +421,23 @@ s32 func_8005D244(s32 arg0, s32 arg1, s32 arg2) {
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}
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__asm__(
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".set\tnoreorder\n"
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".set noreorder\n"
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"\t.globl\tfunc_8005D33C\n"
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"func_8005D33C:\n"
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"lui $v0, %hi(D_80072970)\n"
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"lw $v0, %lo(D_80072970)($v0)\n"
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"addiu $sp, $sp, -32\n"
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"sw $s0, 16($sp)\n"
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"addu $s0, $a1, $zero\n"
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"sw $s1, 20($sp)\n"
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"sw $ra, 24($sp)\n"
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"jalr $v0\n"
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"addu $s1, $a2, $zero\n"
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"bgez $s0, 1f\n"
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"addu $v1, $v0, $zero\n"
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"lbu $v0, 233($v1)\n"
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"j 4f\n"
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"nop\n"
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"1:\n"
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"lbu $v0, 233($v1)\n"
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"nop\n"
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"slt $v0, $s0, $v0\n"
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"beqz $v0, 3f\n"
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"sll $v0, $s0, 2\n"
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"lw $v1, 4($v1)\n"
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"addu $v0, $v0, $s0\n"
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"addiu $a2, $s1, -1\n"
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"addu $v1, $v1, $v0\n"
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"sltiu $v0, $a2, 5\n"
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"beqz $v0, 3f\n"
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"sll $v0, $a2, 2\n"
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"lui $at, %hi(jtbl_800744A0)\n"
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"addu $at, $at, $v0\n"
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"lw $v0, %lo(jtbl_800744A0)($at)\n"
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"nop\n"
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"jr $v0\n"
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"nop\n"
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"lbu $v0, 0($v1)\n"
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"j 4f\n"
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"nop\n"
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"lbu $v0, 1($v1)\n"
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"j 4f\n"
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"nop\n"
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"lbu $v0, 2($v1)\n"
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"j 4f\n"
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"nop\n"
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"lbu $v0, 3($v1)\n"
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"j 4f\n"
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"nop\n"
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"lbu $v0, 4($v1)\n"
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"j 4f\n"
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"nop\n"
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"3:\n"
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"addu $v0, $zero, $zero\n"
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"4:\n"
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"lw $ra, 24($sp)\n"
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"lw $s1, 20($sp)\n"
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"lw $s0, 16($sp)\n"
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"jr $ra\n"
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"addiu $sp, $sp, 32\n"
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".set reorder\n"
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);
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INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D33C);
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extern void* (*D_80072970)(void);
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extern void* (*D_80072970)(void);
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__asm__(
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"\t.set\tnoreorder\n"
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".set noreorder\n"
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"\t.globl\tfunc_8005D410\n"
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"func_8005D410:\n"
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"lui $v0, %hi(D_80072970)\n"
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"lw $v0, %lo(D_80072970)($v0)\n"
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"addiu $sp, $sp, -32\n"
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"sw $s0, 16($sp)\n"
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"addu $s0, $a1, $zero\n"
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"sw $s1, 20($sp)\n"
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"sw $ra, 24($sp)\n"
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"jalr $v0\n"
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"addu $s1, $a2, $zero\n"
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"bgez $s0, 1f\n"
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"addu $v1, $v0, $zero\n"
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"lbu $v0, 234($v1)\n"
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"j 4f\n"
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"nop\n"
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"1:\n"
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"lbu $v0, 234($v1)\n"
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"nop\n"
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"slt $v0, $s0, $v0\n"
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"beq $v0, $zero, 3f\n"
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"sll $v0, $s0, 3\n"
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"lw $v1, 8($v1)\n"
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"bgez $s1, 2f\n"
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"addu $v1, $v1, $v0\n"
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"lbu $v0, 0($v1)\n"
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"j 4f\n"
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"nop\n"
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"2:\n"
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"lbu $v0, 0($v1)\n"
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"nop\n"
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"slt $v0, $s1, $v0\n"
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"beq $v0, $zero, 4f\n"
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"addu $v0, $zero, $zero\n"
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"lw $v0, 4($v1)\n"
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"nop\n"
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"addu $v0, $v0, $s1\n"
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"lbu $v0, 0($v0)\n"
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"j 4f\n"
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"nop\n"
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"3:\n"
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"addu $v0, $zero, $zero\n"
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"4:\n"
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"lw $ra, 24($sp)\n"
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"lw $s1, 20($sp)\n"
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"lw $s0, 16($sp)\n"
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"jr $ra\n"
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"addiu $sp, $sp, 32\n"
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".set reorder\n"
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);
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INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D410);
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__asm__(
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"\t.set\tnoreorder\n"
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".set noreorder\n"
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"\t.globl\tfunc_8005D4B8\n"
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"func_8005D4B8:\n"
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"lui $v0, %hi(D_80072970)\n"
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"lw $v0, %lo(D_80072970)($v0)\n"
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"addiu $sp, $sp, -24\n"
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"sw $s0, 16($sp)\n"
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"sw $ra, 20($sp)\n"
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"jalr $v0\n"
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"addu $s0, $a1, $zero\n"
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"addu $a0, $v0, $zero\n"
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"jal func_8005E79C\n"
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"addu $a1, $s0, $zero\n"
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"lw $ra, 20($sp)\n"
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"lw $s0, 16($sp)\n"
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"jr $ra\n"
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"addiu $sp, $sp, 24\n"
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".set reorder\n"
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);
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INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D4B8);
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__asm__(
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"\t.set\tnoreorder\n"
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".set noreorder\n"
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"\t.globl\tfunc_8005D4F0\n"
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"func_8005D4F0:\n"
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"lui $v0, %hi(D_80072970)\n"
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"lw $v0, %lo(D_80072970)($v0)\n"
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"addiu $sp, $sp, -32\n"
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"sw $s0, 16($sp)\n"
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"addu $s0, $a1, $zero\n"
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"sw $s1, 20($sp)\n"
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"sw $ra, 24($sp)\n"
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"jalr $v0\n"
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"addu $s1, $a2, $zero\n"
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"addu $a0, $v0, $zero\n"
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"andi $a1, $s0, 255\n"
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"jal func_8005E8E8\n"
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"andi $a2, $s1, 255\n"
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"lw $ra, 24($sp)\n"
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"lw $s1, 20($sp)\n"
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"lw $s0, 16($sp)\n"
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"jr $ra\n"
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"addiu $sp, $sp, 32\n"
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".set reorder\n"
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);
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INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D4F0);
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__asm__(
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"\t.set\tnoreorder\n"
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".set noreorder\n"
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"\t.globl\tfunc_8005D538\n"
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"func_8005D538:\n"
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"lui $v0, %hi(D_80072970)\n"
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"lw $v0, %lo(D_80072970)($v0)\n"
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"addiu $sp, $sp, -32\n"
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"sw $s0, 16($sp)\n"
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"addu $s0, $a1, $zero\n"
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"sw $s1, 20($sp)\n"
|
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"sw $ra, 24($sp)\n"
|
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"jalr $v0\n"
|
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"addu $s1, $a2, $zero\n"
|
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"addu $a0, $v0, $zero\n"
|
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"addu $a1, $s0, $zero\n"
|
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"jal func_8005E188\n"
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"addu $a2, $s1, $zero\n"
|
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"lw $ra, 24($sp)\n"
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"lw $s1, 20($sp)\n"
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"lw $s0, 16($sp)\n"
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"jr $ra\n"
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"addiu $sp, $sp, 32\n"
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"nop\n"
|
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"nop\n"
|
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".set reorder\n"
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);
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INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D538);
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|
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|
||||
|
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__asm__(
|
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" .set noat\n"
|
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" .set noreorder\n"
|
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" .section .text\n"
|
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" .globl func_8005D588\n"
|
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"func_8005D588:\n"
|
||||
".word 0x3C038007\n"
|
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".word 0x8C6329B0\n"
|
||||
".word 0x3C028007\n"
|
||||
".word 0x8C4229AC\n"
|
||||
".word 0x27BDFFE0\n"
|
||||
".word 0xAFB00010\n"
|
||||
".word 0x00808021\n"
|
||||
".word 0xAFBF001C\n"
|
||||
".word 0xAFB20018\n"
|
||||
".word 0xAFB10014\n"
|
||||
".word 0x00031840\n"
|
||||
".word 0x2C420001\n"
|
||||
".word 0x00628825\n"
|
||||
".word 0x12300031\n"
|
||||
".word 0x32020001\n"
|
||||
".word 0x3C018007\n"
|
||||
".word 0xAC202994\n"
|
||||
".word 0x10400012\n"
|
||||
".word 0x24020001\n"
|
||||
".word 0x3C128008\n"
|
||||
".word 0x26528998\n"
|
||||
".word 0x8E420000\n"
|
||||
".word 0x3C018007\n"
|
||||
".word 0xAC2029AC\n"
|
||||
".word 0x28420096\n"
|
||||
".word 0x14400008\n"
|
||||
".word 0x00000000\n"
|
||||
".word 0x3C048007\n"
|
||||
".word 0x8C842990\n"
|
||||
".word 0x3C028007\n"
|
||||
".word 0x8C422960\n"
|
||||
".word 0x00000000\n"
|
||||
".word 0x0040F809\n"
|
||||
".word 0x00000000\n"
|
||||
".word 0x08017588\n"
|
||||
".word 0xAE400000\n"
|
||||
".word 0x3C018007\n"
|
||||
".word 0xAC2229AC\n"
|
||||
".word 0x32020002\n"
|
||||
".word 0x10400012\n"
|
||||
".word 0x24030001\n"
|
||||
".word 0x3C108008\n"
|
||||
".word 0x2610899C\n"
|
||||
".word 0x8E020000\n"
|
||||
".word 0x3C018007\n"
|
||||
".word 0xAC2329B0\n"
|
||||
".word 0x28420096\n"
|
||||
".word 0x14400008\n"
|
||||
".word 0x00000000\n"
|
||||
".word 0x3C048007\n"
|
||||
".word 0x8C842990\n"
|
||||
".word 0x3C028007\n"
|
||||
".word 0x8C422960\n"
|
||||
".word 0x00000000\n"
|
||||
".word 0x0040F809\n"
|
||||
".word 0x248400F0\n"
|
||||
".word 0x0801759E\n"
|
||||
".word 0xAE000000\n"
|
||||
".word 0x3C018007\n"
|
||||
".word 0xAC2029B0\n"
|
||||
".word 0x24020001\n"
|
||||
".word 0x3C018007\n"
|
||||
".word 0xAC222994\n"
|
||||
".word 0x02201021\n"
|
||||
".word 0x8FBF001C\n"
|
||||
".word 0x8FB20018\n"
|
||||
".word 0x8FB10014\n"
|
||||
".word 0x8FB00010\n"
|
||||
".word 0x03E00008\n"
|
||||
".word 0x27BD0020\n"
|
||||
" .set reorder\n"
|
||||
" .set at\n"
|
||||
);
|
||||
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D588);
|
||||
|
||||
void func_8005D6A0(void) {
|
||||
extern s32 D_8007898C;
|
||||
@@ -755,66 +493,7 @@ s32 func_8005D8A0(void);
|
||||
|
||||
|
||||
|
||||
__asm__(
|
||||
".globl func_8005D8B4\n"
|
||||
"func_8005D8B4:\n"
|
||||
"addiu $sp,$sp,-24\n"
|
||||
"sw $ra,20($sp)\n"
|
||||
"sw $s0,16($sp)\n"
|
||||
"lui $at,%hi(D_80072994)\n"
|
||||
".reloc ., R_MIPS_26, func_8005CF08\n"
|
||||
".word 0x0c000000\n"
|
||||
"sw $zero,%lo(D_80072994)($at)\n"
|
||||
"addiu $a0,$zero,2\n"
|
||||
"lui $s0,%hi(D_80078988)\n"
|
||||
"addiu $s0,$s0,%lo(D_80078988)\n"
|
||||
".reloc ., R_MIPS_26, SysDeqIntRP\n"
|
||||
".word 0x0c000000\n"
|
||||
"addu $a1,$s0,$zero\n"
|
||||
"addiu $a0,$zero,2\n"
|
||||
".reloc ., R_MIPS_26, SysEnqIntRP\n"
|
||||
".word 0x0c000000\n"
|
||||
"addu $a1,$s0,$zero\n"
|
||||
"addiu $a0,$zero,3\n"
|
||||
"lui $v1,%hi(D_800729BC)\n"
|
||||
"lw $v1,%lo(D_800729BC)($v1)\n"
|
||||
"addiu $v0,$zero,-2\n"
|
||||
"sw $v0,0($v1)\n"
|
||||
"lw $v0,4($v1)\n"
|
||||
"addu $a1,$zero,$zero\n"
|
||||
"ori $v0,$v0,1\n"
|
||||
".reloc ., R_MIPS_26, ChangeClearRCnt\n"
|
||||
".word 0x0c000000\n"
|
||||
"sw $v0,4($v1)\n"
|
||||
".reloc ., R_MIPS_26, func_8005CF18\n"
|
||||
".word 0x0c000000\n"
|
||||
"nop\n"
|
||||
"lui $a0,%hi(D_80072990)\n"
|
||||
"lw $a0,%lo(D_80072990)($a0)\n"
|
||||
"lui $v0,%hi(D_80072960)\n"
|
||||
"lw $v0,%lo(D_80072960)($v0)\n"
|
||||
"nop\n"
|
||||
".word 0x0040f809\n"
|
||||
"nop\n"
|
||||
"lui $a0,%hi(D_80072990)\n"
|
||||
"lw $a0,%lo(D_80072990)($a0)\n"
|
||||
"lui $v0,%hi(D_80072960)\n"
|
||||
"lw $v0,%lo(D_80072960)($v0)\n"
|
||||
"nop\n"
|
||||
".word 0x0040f809\n"
|
||||
"addiu $a0,$a0,240\n"
|
||||
"lui $v0,%hi(D_80078998)\n"
|
||||
"addiu $v0,$v0,%lo(D_80078998)\n"
|
||||
"sw $zero,4($v0)\n"
|
||||
"sw $zero,0($v0)\n"
|
||||
"addiu $v0,$zero,1\n"
|
||||
"lui $at,%hi(D_80072994)\n"
|
||||
"sw $v0,%lo(D_80072994)($at)\n"
|
||||
".word 0x8fbf0014\n"
|
||||
".word 0x8fb00010\n"
|
||||
".word 0x03e00008\n"
|
||||
"addiu $sp,$sp,24\n"
|
||||
);
|
||||
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D8B4);
|
||||
|
||||
extern void func_8005CF08(void);
|
||||
extern void func_8005CF18(void);
|
||||
@@ -1031,105 +710,7 @@ void func_8005E1A4(void *arg0) {
|
||||
}
|
||||
}
|
||||
|
||||
__asm__(
|
||||
"\t.set\tnoreorder\n"
|
||||
".set noreorder\n"
|
||||
"\t.globl\tfunc_8005E228\n"
|
||||
"func_8005E228:\n"
|
||||
"addiu $sp, $sp, -24\n"
|
||||
"sw $s0, 16($sp)\n"
|
||||
"addu $s0, $a0, $zero\n"
|
||||
"sw $ra, 20($sp)\n"
|
||||
"lbu $v1, 70($s0)\n"
|
||||
"addiu $v0, $zero, 3\n"
|
||||
"beq $v1, $v0, .L8005E2B4\n"
|
||||
"slti $v0, $v1, 4\n"
|
||||
"beqz $v0, .L8005E260\n"
|
||||
"addiu $v0, $zero, 2\n"
|
||||
"beq $v1, $v0, .L8005E274\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"j .L8005E364\n"
|
||||
"nop\n"
|
||||
".L8005E260:\n"
|
||||
"addiu $v0, $zero, 4\n"
|
||||
"beq $v1, $v0, .L8005E2D8\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"j .L8005E364\n"
|
||||
"nop\n"
|
||||
".L8005E274:\n"
|
||||
"lw $v0, 60($s0)\n"
|
||||
"lw $v1, 60($s0)\n"
|
||||
"lbu $v0, 3($v0)\n"
|
||||
"nop\n"
|
||||
"sb $v0, 227($s0)\n"
|
||||
"lbu $v0, 4($v1)\n"
|
||||
"lw $v1, 60($s0)\n"
|
||||
"sh $zero, 230($s0)\n"
|
||||
"sb $v0, 228($s0)\n"
|
||||
"lbu $v0, 5($v1)\n"
|
||||
"lw $v1, 60($s0)\n"
|
||||
"sb $v0, 233($s0)\n"
|
||||
"lbu $v0, 6($v1)\n"
|
||||
"sw $zero, 236($s0)\n"
|
||||
"j .L8005E360\n"
|
||||
"sb $v0, 234($s0)\n"
|
||||
".L8005E2B4:\n"
|
||||
"lw $v0, 60($s0)\n"
|
||||
"nop\n"
|
||||
"lbu $v1, 4($v0)\n"
|
||||
"lbu $v0, 5($v0)\n"
|
||||
"sb $zero, 71($s0)\n"
|
||||
"sll $v1, $v1, 8\n"
|
||||
"addu $v0, $v0, $v1\n"
|
||||
"j .L8005E360\n"
|
||||
"sh $v0, 230($s0)\n"
|
||||
".L8005E2D8:\n"
|
||||
"lw $a0, 236($s0)\n"
|
||||
"lbu $v0, 71($s0)\n"
|
||||
"lw $v1, 60($s0)\n"
|
||||
"addiu $v0, $v0, 1\n"
|
||||
"lbu $v1, 4($v1)\n"
|
||||
"addiu $a0, $a0, 8\n"
|
||||
"sb $v0, 71($s0)\n"
|
||||
"addiu $v1, $v1, 3\n"
|
||||
"andi $v1, $v1, 0x1FC\n"
|
||||
"addu $a0, $a0, $v1\n"
|
||||
"lbu $v1, 234($s0)\n"
|
||||
"andi $v0, $v0, 0xFF\n"
|
||||
"sltu $v0,$v0,$v1\n"
|
||||
"beqz $v0, .L8005E31C\n"
|
||||
"sw $a0, 236($s0)\n"
|
||||
".L8005E314:\n"
|
||||
"j .L8005E364\n"
|
||||
"addu $v0, $zero, $zero\n"
|
||||
".L8005E31C:\n"
|
||||
"jal func_8005E374\n"
|
||||
"addu $a0, $s0, $zero\n"
|
||||
"slti $v0, $v0, 0x81\n"
|
||||
"bnez $v0, .L8005E344\n"
|
||||
"addu $a0, $s0, $zero\n"
|
||||
"addiu $v0, $zero, 0xFE\n"
|
||||
"sb $v0, 70($s0)\n"
|
||||
"addiu $v0, $zero, 2\n"
|
||||
"j .L8005E314\n"
|
||||
"sb $v0, 73($s0)\n"
|
||||
".L8005E344:\n"
|
||||
"addiu $v0, $zero, 0xFF\n"
|
||||
"addiu $a1, $s0, 0x63\n"
|
||||
"jal func_8005E3AC\n"
|
||||
"sb $v0, 70($s0)\n"
|
||||
"addiu $v0, $zero, 2\n"
|
||||
"j .L8005E314\n"
|
||||
"sb $v0, 70($s0)\n"
|
||||
".L8005E360:\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
".L8005E364:\n"
|
||||
"lw $ra, 20($sp)\n"
|
||||
"lw $s0, 16($sp)\n"
|
||||
"jr $ra\n"
|
||||
"addiu $sp, $sp, 24\n"
|
||||
".set reorder\n"
|
||||
);
|
||||
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005E228);
|
||||
|
||||
|
||||
s32 func_8005E374(u8 *a0) {
|
||||
@@ -1138,69 +719,7 @@ s32 func_8005E374(u8 *a0) {
|
||||
return t + m + *(u32 *)(a0 + 0xEC);
|
||||
}
|
||||
|
||||
__asm__(
|
||||
"\t.set\tnoreorder\n"
|
||||
".set noreorder\n"
|
||||
"\t.globl\tfunc_8005E3AC\n"
|
||||
"func_8005E3AC:\n"
|
||||
"addiu $sp, $sp, -32\n"
|
||||
"sw $s0, 16($sp)\n"
|
||||
"addu $s0, $a0, $zero\n"
|
||||
"sw $s1, 20($sp)\n"
|
||||
"addu $s1, $a1, $zero\n"
|
||||
"beqz $s1, .L8005E3F4\n"
|
||||
"sw $ra, 24($sp)\n"
|
||||
"lw $v0, 4($s0)\n"
|
||||
"nop\n"
|
||||
"bnez $v0, .L8005E46C\n"
|
||||
"addu $v0, $zero, $zero\n"
|
||||
"lui $v0, %hi(D_80072978)\n"
|
||||
"lw $v0, %lo(D_80072978)($v0)\n"
|
||||
"nop\n"
|
||||
"jalr $v0\n"
|
||||
"nop\n"
|
||||
"beqz $v0, .L8005E3FC\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
".L8005E3F4:\n"
|
||||
"j .L8005E46C\n"
|
||||
"addu $v0, $zero, $zero\n"
|
||||
".L8005E3FC:\n"
|
||||
"addiu $v1, $zero, 4\n"
|
||||
"addiu $a1, $s1, 3\n"
|
||||
"sra $a1, $a1, 2\n"
|
||||
"sb $v1, 73($s0)\n"
|
||||
"addiu $v1, $zero, 1\n"
|
||||
"sb $v1, 70($s0)\n"
|
||||
"lui $v1, %hi(func_8005E480)\n"
|
||||
"addiu $v1, $v1, %lo(func_8005E480)\n"
|
||||
"sw $v1, 20($s0)\n"
|
||||
"lbu $v1, 227($s0)\n"
|
||||
"lui $a0, %hi(func_8005E528)\n"
|
||||
"addiu $a0, $a0, %lo(func_8005E528)\n"
|
||||
"sw $a0, 24($s0)\n"
|
||||
"lbu $a0, 233($s0)\n"
|
||||
"sll $a1, $a1, 2\n"
|
||||
"sw $a1, 0($s0)\n"
|
||||
"sb $zero, 71($s0)\n"
|
||||
"addiu $v1, $v1, 1\n"
|
||||
"sra $v1, $v1, 1\n"
|
||||
"sll $v1, $v1, 2\n"
|
||||
"addu $a1, $a1, $v1\n"
|
||||
"sll $v1, $a0, 2\n"
|
||||
"addu $v1, $v1, $a0\n"
|
||||
"addiu $v1, $v1, 3\n"
|
||||
"andi $v1, $v1, 0xFFC\n"
|
||||
"sw $a1, 4($s0)\n"
|
||||
"addu $a1, $a1, $v1\n"
|
||||
"sw $a1, 8($s0)\n"
|
||||
".L8005E46C:\n"
|
||||
"lw $ra, 24($sp)\n"
|
||||
"lw $s1, 20($sp)\n"
|
||||
"lw $s0, 16($sp)\n"
|
||||
"jr $ra\n"
|
||||
"addiu $sp, $sp, 32\n"
|
||||
".set reorder\n"
|
||||
);
|
||||
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005E3AC);
|
||||
|
||||
extern void func_8005EA68(void *arg0, s32 arg1);
|
||||
extern void func_8005EA88(void *arg0, s32 arg1);
|
||||
@@ -1327,40 +846,7 @@ s32 func_8005E528(Ctx *s) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
__asm__(
|
||||
"\t.set\tnoreorder\n"
|
||||
".set noreorder\n"
|
||||
"\t.globl\tfunc_8005E79C\n"
|
||||
"func_8005E79C:\n"
|
||||
"addiu $sp, $sp, -32\n"
|
||||
"sw $s0, 16($sp)\n"
|
||||
"addu $s0, $a0, $zero\n"
|
||||
"sw $s1, 20($sp)\n"
|
||||
"lui $v0, %hi(D_80072978)\n"
|
||||
"lw $v0, %lo(D_80072978)($v0)\n"
|
||||
"sw $ra, 24($sp)\n"
|
||||
"jalr $v0\n"
|
||||
"addu $s1, $a1, $zero\n"
|
||||
"bnez $v0, 1f\n"
|
||||
"addu $v0, $zero, $zero\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"addiu $v1, $zero, 1\n"
|
||||
"sb $v1, 70($s0)\n"
|
||||
"lui $v1, %hi(func_8005E804)\n"
|
||||
"addiu $v1, $v1, %lo(func_8005E804)\n"
|
||||
"sw $v1, 20($s0)\n"
|
||||
"lui $v1, %hi(func_8005E820)\n"
|
||||
"addiu $v1, $v1, %lo(func_8005E820)\n"
|
||||
"sw $s1, 32($s0)\n"
|
||||
"sw $v1, 24($s0)\n"
|
||||
"1:\n"
|
||||
"lw $ra, 24($sp)\n"
|
||||
"lw $s1, 20($sp)\n"
|
||||
"lw $s0, 16($sp)\n"
|
||||
"jr $ra\n"
|
||||
"addiu $sp, $sp, 32\n"
|
||||
".set reorder\n"
|
||||
);
|
||||
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005E79C);
|
||||
|
||||
void func_8005E804(u8 *arg0) {
|
||||
u32 v1;
|
||||
@@ -1426,52 +912,7 @@ s32 func_8005E820(void *a0)
|
||||
return 0;
|
||||
}
|
||||
|
||||
__asm__(
|
||||
"\t.set\tnoreorder\n"
|
||||
".set noreorder\n"
|
||||
"\t.globl\tfunc_8005E8E8\n"
|
||||
"func_8005E8E8:\n"
|
||||
"addiu $sp, $sp, -40\n"
|
||||
"sw $s0, 16($sp)\n"
|
||||
"addu $s0, $a0, $zero\n"
|
||||
"sw $s1, 20($sp)\n"
|
||||
"addu $s1, $a1, $zero\n"
|
||||
"sw $s2, 24($sp)\n"
|
||||
"addu $s2, $a2, $zero\n"
|
||||
"sw $s3, 28($sp)\n"
|
||||
"lui $v0, %hi(D_80072978)\n"
|
||||
"lw $v0, %lo(D_80072978)($v0)\n"
|
||||
"sw $ra, 32($sp)\n"
|
||||
"jalr $v0\n"
|
||||
"addu $s3, $s1, $zero\n"
|
||||
"bnez $v0, 1f\n"
|
||||
"addu $v0, $zero, $zero\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"lbu $a0, 228($s0)\n"
|
||||
"addiu $v1, $zero, 1\n"
|
||||
"sb $v1, 70($s0)\n"
|
||||
"lui $v1, %hi(func_8005E980)\n"
|
||||
"addiu $v1, $v1, %lo(func_8005E980)\n"
|
||||
"sw $v1, 20($s0)\n"
|
||||
"lui $v1, %hi(func_8005E9D4)\n"
|
||||
"addiu $v1, $v1, %lo(func_8005E9D4)\n"
|
||||
"sw $v1, 24($s0)\n"
|
||||
"andi $v1, $s3, 0xFF\n"
|
||||
"sb $s1, 81($s0)\n"
|
||||
"sb $s2, 82($s0)\n"
|
||||
"xor $v1, $v1, $a0\n"
|
||||
"sltiu $v1, $v1, 1\n"
|
||||
"sb $v1, 83($s0)\n"
|
||||
"1:\n"
|
||||
"lw $ra, 32($sp)\n"
|
||||
"lw $s3, 28($sp)\n"
|
||||
"lw $s2, 24($sp)\n"
|
||||
"lw $s1, 20($sp)\n"
|
||||
"lw $s0, 16($sp)\n"
|
||||
"jr $ra\n"
|
||||
"addiu $sp, $sp, 40\n"
|
||||
".set reorder\n"
|
||||
);
|
||||
INCLUDE_ASM("asm/nonmatchings/800c3", func_8005E8E8);
|
||||
|
||||
void func_8005E980(void)
|
||||
{
|
||||
|
||||
+1
-52
@@ -175,58 +175,7 @@ __asm__(".text\n"
|
||||
".set\treorder\n"
|
||||
".end\t__do_global_dtors\n");
|
||||
|
||||
__asm__(".text\n.align 2\n.globl main\n.ent\tmain\nmain:\n.set\tnoreorder\n"
|
||||
"addiu $sp,$sp,-56\nsw $ra,52($sp)\nsw $fp,48($sp)\nsw $s1,44($sp)\nsw $s0,40($sp)\naddu $fp,$sp,$zero\n"
|
||||
"jal __main\nnop\nlui $s0,%hi(D_800BA118)\naddiu $s0,$s0,%lo(D_800BA118)\nlui $s1,%hi(D_800AF630)\naddiu $s1,$s1,%lo(D_800AF630)\n"
|
||||
"addu $a0,$zero,$zero\njal func_80043060\nnop\naddiu $v0,$zero,992\nlui $at,%hi(D_80074778)\nsw $v0,%lo(D_80074778)($at)\n"
|
||||
"jal func_800141F0\nnop\naddu $a0,$zero,$zero\njal func_8005FC68\nnop\njal func_8005FCB8\nnop\njal func_80018918\nnop\njal func_80043300\nnop\n"
|
||||
"lui $at,%hi(D_800A2B7C)\nsw $v0,%lo(D_800A2B7C)($at)\njal func_8002C8F4\nnop\njal LoaderInitFileTable\nnop\n"
|
||||
".L80010204:\nj .L80010214\nnop\nj .L8001094C\nnop\n.L80010214:\njal func_80014238\nnop\njal func_80014390\nnop\njal func_800191A8\nnop\njal func_80010A98\nnop\n"
|
||||
".L80010234:\nlui $at,1\naddu $at,$s1,$at\nlhu $v0,-23596($at)\nnop\nbeqz $v0,.L80010254\nnop\nj .L80010938\nnop\n"
|
||||
".L80010254:\nlui $v1,%hi(D_800C7C70)\nlw $v1,%lo(D_800C7C70)($v1)\nnop\naddiu $v0,$v1,1\naddu $v1,$v0,$zero\nlui $at,%hi(D_800C7C70)\nsw $v1,%lo(D_800C7C70)($at)\n"
|
||||
"lui $v0,%hi(D_800C7C70)\nlw $v0,%lo(D_800C7C70)($v0)\nlui $v1,%hi(D_800C7C70)\nlw $v1,%lo(D_800C7C70)($v1)\nnop\nbnez $v1,.L80010290\nnop\naddiu $v0,$zero,1\n"
|
||||
".L80010290:\nlui $at,%hi(D_800C7C70)\nsw $v0,%lo(D_800C7C70)($at)\nlui $v0,%hi(D_800C7C74)\nlh $v0,%lo(D_800C7C74)($v0)\nnop\nxori $v1,$v0,0\nsltiu $v0,$v1,1\n"
|
||||
"lui $at,%hi(D_800C7C74)\nsh $v0,%lo(D_800C7C74)($at)\nlui $v0,%hi(D_800C7C74)\nlhu $v0,%lo(D_800C7C74)($v0)\nlui $at,1\naddu $at,$s1,$at\nsh $v0,-23598($at)\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,2\naddu $v1,$v1,$v0\nsll $a0,$v1,3\nsubu $a0,$a0,$v0\nsll $v1,$a0,4\naddu $v1,$v1,$v0\nsll $v0,$v1,7\n"
|
||||
"lui $v1,%hi(D_8007BA70)\naddiu $v1,$v1,%lo(D_8007BA70)\naddu $v0,$v1,$v0\nlui $at,%hi(D_800A5E60)\nsw $v0,%lo(D_800A5E60)($at)\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,1\naddu $v1,$v1,$v0\nsll $a0,$v1,2\naddu $v0,$s1,$a0\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v1,-23598($at)\nnop\naddu $a1,$v1,$zero\nsll $a0,$a1,1\naddu $a0,$a0,$v1\nsll $a1,$a0,3\naddu $a1,$a1,$v1\nsll $v1,$a1,6\n"
|
||||
"lui $a0,%hi(D_800A4F48)\naddiu $a0,$a0,%lo(D_800A4F48)\naddu $v1,$a0,$v1\nsw $v1,8($v0)\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,1\naddu $v1,$v1,$v0\nsll $v0,$v1,2\naddu $v1,$s1,$v0\naddiu $v0,$zero,1600\nsw $v0,0($v1)\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,1\naddu $v1,$v1,$v0\nsll $v0,$v1,2\naddu $v1,$s1,$v0\nsw $zero,4($v1)\n"
|
||||
"jal func_800189A8\nnop\njal func_80015208\nnop\nlui $at,1\naddu $at,$s1,$at\nlbu $v0,-23581($at)\nnop\nbnez $v0,.L80010644\nnop\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23640($at)\nnop\naddiu $v1,$v0,1\naddu $v0,$v1,$zero\nlui $at,1\naddu $at,$s1,$at\nsh $v0,-23640($at)\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23636($at)\nlui $at,1\naddu $at,$s1,$at\nlhu $v1,-23640($at)\nnop\naddu $v0,$v0,$v1\nlui $at,1\naddu $at,$s1,$at\nsh $v0,-23636($at)\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,2\naddu $v1,$v1,$v0\nsll $v0,$v1,2\nlui $at,1\naddu $at,$s1,$at\nlhu $v1,-23598($at)\nnop\naddu $a0,$v1,$zero\nsll $v1,$a0,14\n"
|
||||
"lui $a0,%hi(D_800A6610)\naddiu $a0,$a0,%lo(D_800A6610)\naddu $v1,$a0,$v1\nlui $at,%hi(D_800A651C)\naddu $at,$at,$v0\nsw $v1,%lo(D_800A651C)($at)\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,2\naddu $v1,$v1,$v0\nsll $v0,$v1,2\nlui $at,1\naddu $at,$s1,$at\nlhu $v1,-23598($at)\nnop\naddu $a0,$v1,$zero\nsll $v1,$a0,14\n"
|
||||
"lui $a0,%hi(D_800AA60C)\naddiu $a0,$a0,%lo(D_800AA60C)\naddu $v1,$v1,$a0\nlui $at,%hi(D_800A6528)\naddu $at,$at,$v0\nsw $v1,%lo(D_800A6528)($at)\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,2\naddu $v1,$v1,$v0\nsll $v0,$v1,2\nlui $at,%hi(D_800A651C)\naddu $at,$at,$v0\nlw $a0,%lo(D_800A651C)($at)\naddiu $a1,$zero,4096\njal func_80059BFC\nnop\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,2\naddu $v1,$v1,$v0\nsll $v0,$v1,2\nlui $at,1\naddu $at,$s1,$at\nlhu $v1,-23598($at)\nnop\naddu $a0,$v1,$zero\nsll $v1,$a0,4\n"
|
||||
"lui $a0,%hi(D_800BA0D8)\naddiu $a0,$a0,%lo(D_800BA0D8)\naddu $v1,$a0,$v1\nlui $at,%hi(D_800AE7BC)\naddu $at,$at,$v0\nsw $v1,%lo(D_800AE7BC)($at)\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,2\naddu $v1,$v1,$v0\nsll $v0,$v1,2\nlui $at,1\naddu $at,$s1,$at\nlhu $v1,-23598($at)\nnop\naddu $a0,$v1,$zero\nsll $v1,$a0,4\n"
|
||||
"lui $a0,%hi(D_800BA0E4)\naddiu $a0,$a0,%lo(D_800BA0E4)\naddu $v1,$v1,$a0\nlui $at,%hi(D_800AE7C8)\naddu $at,$at,$v0\nsw $v1,%lo(D_800AE7C8)($at)\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,2\naddu $v1,$v1,$v0\nsll $v0,$v1,2\nlui $at,%hi(D_800AE7BC)\naddu $at,$at,$v0\nlw $a0,%lo(D_800AE7BC)($at)\naddiu $a1,$zero,4\njal func_80059BFC\nnop\n"
|
||||
"jal GameModeDispatch\nnop\nlui $a2,8064\nori $a2,$a2,1020\naddu $t0,$a2,$zero\nsw $sp,0($t0)\naddiu $t0,$t0,-4\naddu $sp,$t0,$zero\njal func_80015498\nnop\naddiu $sp,$sp,4\nlw $sp,0($sp)\n"
|
||||
"lui $a2,8064\nori $a2,$a2,1020\naddu $t0,$a2,$zero\nsw $sp,0($t0)\naddiu $t0,$t0,-4\naddu $sp,$t0,$zero\njal func_8001C00C\nnop\naddiu $sp,$sp,4\nlw $sp,0($sp)\nj .L80010744\nnop\n"
|
||||
".L80010644:\nlui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,2\naddu $v1,$v1,$v0\nsll $v0,$v1,2\nlui $at,1\naddu $at,$s1,$at\nlhu $v1,-23598($at)\nnop\naddu $a0,$v1,$zero\nsll $v1,$a0,4\n"
|
||||
"lui $a0,%hi(D_800BA0D8)\naddiu $a0,$a0,%lo(D_800BA0D8)\naddu $v1,$a0,$v1\nlui $at,%hi(D_800AE7BC)\naddu $at,$at,$v0\nsw $v1,%lo(D_800AE7BC)($at)\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,2\naddu $v1,$v1,$v0\nsll $v0,$v1,2\nlui $at,1\naddu $at,$s1,$at\nlhu $v1,-23598($at)\nnop\naddu $a0,$v1,$zero\nsll $v1,$a0,4\n"
|
||||
"lui $a0,%hi(D_800BA0E4)\naddiu $a0,$a0,%lo(D_800BA0E4)\naddu $v1,$v1,$a0\nlui $at,%hi(D_800AE7C8)\naddu $at,$at,$v0\nsw $v1,%lo(D_800AE7C8)($at)\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,2\naddu $v1,$v1,$v0\nsll $v0,$v1,2\nlui $at,%hi(D_800AE7BC)\naddu $at,$at,$v0\nlw $a0,%lo(D_800AE7BC)($at)\naddiu $a1,$zero,4\njal func_80059BFC\nnop\n"
|
||||
"lui $a2,8064\nori $a2,$a2,1020\naddu $t0,$a2,$zero\nsw $sp,0($t0)\naddiu $t0,$t0,-4\naddu $sp,$t0,$zero\njal func_800D25FC\nnop\naddiu $sp,$sp,4\nlw $sp,0($sp)\n"
|
||||
".L80010744:\njal func_800184F0\nnop\naddu $a0,$zero,$zero\njal func_800596F4\nnop\nlui $at,1\naddu $at,$s1,$at\nlw $a0,-23576($at)\njal VSync\nnop\n"
|
||||
"lhu $v0,394($s1)\nnop\nsh $v0,392($s1)\nlhu $v0,394($s1)\nnop\naddiu $v1,$v0,1\naddu $v0,$v1,$zero\nsh $v0,394($s1)\nlhu $v0,394($s1)\nnop\nsltiu $v1,$v0,2\nbnez $v1,.L800107A4\nnop\nsh $zero,394($s1)\n"
|
||||
".L800107A4:\nlhu $v0,392($s1)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,2\naddu $v1,$v1,$v0\nsll $v0,$v1,2\naddiu $v1,$v0,332\naddu $v0,$s1,$v1\naddu $a0,$v0,$zero\njal func_80059FC0\nnop\n"
|
||||
"lhu $v0,394($s1)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,1\naddu $v1,$v1,$v0\nsll $a0,$v1,3\nsubu $a0,$a0,$v0\nsll $v0,$a0,2\naddiu $v1,$v0,56\naddu $v0,$s1,$v1\naddu $a0,$v0,$zero\njal func_80059D68\nnop\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,2\naddu $v1,$v1,$v0\nsll $v0,$v1,2\nlui $at,%hi(D_800A651C)\naddu $at,$at,$v0\nlw $v1,%lo(D_800A651C)($at)\nnop\naddiu $v0,$v1,16368\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v1,-23598($at)\nnop\naddu $a1,$v1,$zero\nsll $a0,$a1,2\naddu $a0,$a0,$v1\nsll $v1,$a0,2\nlui $a0,%hi(D_80074778)\nlw $a0,%lo(D_80074778)($a0)\nnop\naddu $a1,$a0,$zero\nsll $a0,$a1,2\nlui $at,%hi(D_800A651C)\naddu $at,$at,$v1\nlw $a1,%lo(D_800A651C)($at)\nnop\naddu $v1,$a0,$a1\naddu $a0,$v0,$zero\naddu $a1,$v1,$zero\njal CatPrim\nnop\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,2\naddu $v1,$v1,$v0\nsll $v0,$v1,2\nlui $at,%hi(D_800A651C)\naddu $at,$at,$v0\nlw $v1,%lo(D_800A651C)($at)\nnop\naddiu $v0,$v1,16380\naddu $a0,$v0,$zero\njal func_80059CF4\nnop\n"
|
||||
"lui $at,1\naddu $at,$s1,$at\nlhu $v0,-23598($at)\nnop\naddu $a0,$v0,$zero\nsll $v1,$a0,2\naddu $v1,$v1,$v0\nsll $v0,$v1,2\nlui $at,%hi(D_800AE7BC)\naddu $at,$at,$v0\nlw $v1,%lo(D_800AE7BC)($at)\nnop\naddiu $v0,$v1,12\naddu $a0,$v0,$zero\njal func_80059CF4\nnop\n"
|
||||
"jal func_8003500C\nnop\njal func_8002D034\nnop\njal func_8001AF34\nnop\njal func_8001513C\nnop\nj .L80010234\nnop\n"
|
||||
".L80010938:\naddu $a0,$zero,$zero\njal func_80042610\nnop\nj .L80010204\nnop\n"
|
||||
".L8001094C:\naddu $sp,$fp,$zero\nlw $ra,52($sp)\nlw $fp,48($sp)\nlw $s1,44($sp)\nlw $s0,40($sp)\naddiu $sp,$sp,56\njr $ra\nnop\n"
|
||||
".set\treorder\n.end\tmain\n");
|
||||
INCLUDE_ASM("asm/nonmatchings/boot", main);
|
||||
|
||||
void func_8001096C(void) {
|
||||
extern void func_8002CDD8(void);
|
||||
|
||||
@@ -373,75 +373,5 @@ void func_800D12D0(void) {
|
||||
}
|
||||
|
||||
|
||||
__asm__(".text\n.align 2\n.globl func_800D1D14\n.ent\tfunc_800D1D14\n"
|
||||
"func_800D1D14:\n.frame $sp,32,$31\n.mask 0xC0010000,-16\n.fmask 0,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"addiu $sp, $sp, -32\n"
|
||||
"sw $ra, 28($sp)\n"
|
||||
"sw $fp, 24($sp)\n"
|
||||
"addu $fp, $sp, $zero\n"
|
||||
"sw $a0, 32($fp)\n"
|
||||
"sw $a1, 36($fp)\n"
|
||||
"lw $v0, 36($fp)\n"
|
||||
"nop\n"
|
||||
"bnez $v0, .L800D1D88\n"
|
||||
"nop\n"
|
||||
"lw $v0, 32($fp)\n"
|
||||
"nop\n"
|
||||
"addu $v1, $v0, $zero\n"
|
||||
"sll $v0, $v1, 2\n"
|
||||
"lui $a0, %hi(D_800D3630)\n"
|
||||
"addiu $a0, $a0, %lo(D_800D3630)\n"
|
||||
"addu $v1, $v0, $a0\n"
|
||||
"lh $v0, 0($v1)\n"
|
||||
"sw $zero, 16($sp)\n"
|
||||
"sw $zero, 20($sp)\n"
|
||||
"addu $a0, $v0, $zero\n"
|
||||
"lui $a1, %hi(D_800D3618)\n"
|
||||
"addiu $a1, $a1, %lo(D_800D3618)\n"
|
||||
"addu $a2, $zero, $zero\n"
|
||||
"addu $a3, $zero, $zero\n"
|
||||
"jal func_8001534C\n"
|
||||
"nop\n"
|
||||
"j .L800D1E00\n"
|
||||
"nop\n"
|
||||
".L800D1D88:\n"
|
||||
"lw $v0, 32($fp)\n"
|
||||
"nop\n"
|
||||
"addu $v1, $v0, $zero\n"
|
||||
"sll $v0, $v1, 2\n"
|
||||
"lui $a0, %hi(D_800D3630)\n"
|
||||
"addiu $a0, $a0, %lo(D_800D3630)\n"
|
||||
"addu $v1, $v0, $a0\n"
|
||||
"lh $v0, 0($v1)\n"
|
||||
"lw $v1, 32($fp)\n"
|
||||
"nop\n"
|
||||
"addu $a0, $v1, $zero\n"
|
||||
"sll $v1, $a0, 2\n"
|
||||
"lui $a0, %hi(D_800D3624)\n"
|
||||
"addiu $a0, $a0, %lo(D_800D3624)\n"
|
||||
"addu $v1, $v1, $a0\n"
|
||||
"lw $a0, 32($fp)\n"
|
||||
"lui $a1, %hi(D_800D3620)\n"
|
||||
"addiu $a1, $a1, %lo(D_800D3620)\n"
|
||||
"addu $a0, $a0, $a1\n"
|
||||
"lbu $a1, 0($a0)\n"
|
||||
"nop\n"
|
||||
"sll $a0, $a1, 16\n"
|
||||
"sra $a3, $a0, 16\n"
|
||||
"sw $zero, 16($sp)\n"
|
||||
"sw $zero, 20($sp)\n"
|
||||
"addu $a0, $v0, $zero\n"
|
||||
"lw $a1, 0($v1)\n"
|
||||
"addiu $a2, $zero, 80\n"
|
||||
"jal func_8001534C\n"
|
||||
"nop\n"
|
||||
".L800D1E00:\n"
|
||||
"addu $sp, $fp, $zero\n"
|
||||
"lw $ra, 28($sp)\n"
|
||||
"lw $fp, 24($sp)\n"
|
||||
"addiu $sp, $sp, 32\n"
|
||||
"jr $ra\n"
|
||||
"nop\n"
|
||||
".set\treorder\n.end\tfunc_800D1D14\n");
|
||||
INCLUDE_ASM("asm/md_MAIN_003/nonmatchings/md_MAIN_003_o0d", func_800D1D14);
|
||||
|
||||
|
||||
@@ -96,114 +96,13 @@ extern u8 D_800AF680;
|
||||
* reproduces the target bytes regardless of the TU's compile flags. No C externs
|
||||
* shipped (link-time resolution).
|
||||
*/
|
||||
__asm__(".text\n.align 2\n.globl func_800D0100\n.ent\tfunc_800D0100\n"
|
||||
"func_800D0100:\n.frame $sp,32,$31\n.mask 0xC0030000,-16\n.fmask 0,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"addiu $sp, $sp, -32\n"
|
||||
"sw $ra, 28($sp)\n"
|
||||
"sw $fp, 24($sp)\n"
|
||||
"sw $s1, 20($sp)\n"
|
||||
"sw $s0, 16($sp)\n"
|
||||
"addu $fp, $sp, $zero\n"
|
||||
"lui $s0, %hi(D_800AF630)\n"
|
||||
"addiu $s0, $s0, %lo(D_800AF630)\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"lhu $v0, -23628($at)\n"
|
||||
"nop\n"
|
||||
"addu $v1, $v0, $zero\n"
|
||||
"sll $v0, $v1, 2\n"
|
||||
"lui $v1, %hi(D_800D363C)\n"
|
||||
"addiu $v1, $v1, %lo(D_800D363C)\n"
|
||||
"addu $v0, $v0, $v1\n"
|
||||
"lw $s1, 0($v0)\n"
|
||||
"nop\n"
|
||||
"jalr $s1\n"
|
||||
"nop\n"
|
||||
"addu $sp, $fp, $zero\n"
|
||||
"lw $ra, 28($sp)\n"
|
||||
"lw $fp, 24($sp)\n"
|
||||
"lw $s1, 20($sp)\n"
|
||||
"lw $s0, 16($sp)\n"
|
||||
"addiu $sp, $sp, 32\n"
|
||||
"jr $ra\n"
|
||||
"nop\n"
|
||||
".set\treorder\n.end\tfunc_800D0100\n");
|
||||
INCLUDE_ASM("asm/md_MAIN_003/nonmatchings/md_MAIN_003_o0e", func_800D0100);
|
||||
|
||||
|
||||
__asm__(".text\n.align 2\n.globl func_800D0174\n.ent\tfunc_800D0174\n"
|
||||
"func_800D0174:\n.frame $sp,32,$31\n.mask 0xC0010000,-16\n.fmask 0,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"addiu $sp, $sp, -32\n"
|
||||
"sw $ra, 24($sp)\n"
|
||||
"sw $fp, 20($sp)\n"
|
||||
"sw $s0, 16($sp)\n"
|
||||
"addu $fp, $sp, $zero\n"
|
||||
"lui $s0, %hi(D_800AF630)\n"
|
||||
"addiu $s0, $s0, %lo(D_800AF630)\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sb $v0, -23583($at)\n"
|
||||
"jal func_8001C044\n"
|
||||
"nop\n"
|
||||
"jal func_80015310\n"
|
||||
"nop\n"
|
||||
"jal func_8002D858\n"
|
||||
"nop\n"
|
||||
"lui $a0, %hi(D_800D93FC)\n"
|
||||
"addiu $a0, $a0, %lo(D_800D93FC)\n"
|
||||
"jal func_800183E0\n"
|
||||
"nop\n"
|
||||
"lui $at, %hi(D_800EC894)\n"
|
||||
"sh $zero, %lo(D_800EC894)($at)\n"
|
||||
"jal func_800D1E18\n"
|
||||
"nop\n"
|
||||
"lui $at, %hi(D_800EC8B0)\n"
|
||||
"sw $v0, %lo(D_800EC8B0)($at)\n"
|
||||
"jal func_800118AC\n"
|
||||
"nop\n"
|
||||
"addu $sp, $fp, $zero\n"
|
||||
"lw $ra, 24($sp)\n"
|
||||
"lw $fp, 20($sp)\n"
|
||||
"lw $s0, 16($sp)\n"
|
||||
"addiu $sp, $sp, 32\n"
|
||||
"jr $ra\n"
|
||||
"nop\n"
|
||||
".set\treorder\n.end\tfunc_800D0174\n");
|
||||
INCLUDE_ASM("asm/md_MAIN_003/nonmatchings/md_MAIN_003_o0e", func_800D0174);
|
||||
|
||||
|
||||
__asm__(".text\n.align 2\n.globl func_800D0204\n.ent\tfunc_800D0204\n"
|
||||
"func_800D0204:\n.frame $sp,24,$31\n.mask 0xC0000000,-8\n.fmask 0,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"addiu $sp, $sp, -24\n"
|
||||
"sw $ra, 20($sp)\n"
|
||||
"sw $fp, 16($sp)\n"
|
||||
"addu $fp, $sp, $zero\n"
|
||||
"lui $v0, %hi(D_800EC8B0)\n"
|
||||
"lw $v0, %lo(D_800EC8B0)($v0)\n"
|
||||
"nop\n"
|
||||
"beqz $v0, .L800D0248\n"
|
||||
"nop\n"
|
||||
"jal func_800D1E58\n"
|
||||
"nop\n"
|
||||
"jal func_800D0D6C\n"
|
||||
"nop\n"
|
||||
"jal func_800118AC\n"
|
||||
"nop\n"
|
||||
"j .L800D0250\n"
|
||||
"nop\n"
|
||||
".L800D0248:\n"
|
||||
"jal func_800118AC\n"
|
||||
"nop\n"
|
||||
".L800D0250:\n"
|
||||
"addu $sp, $fp, $zero\n"
|
||||
"lw $ra, 20($sp)\n"
|
||||
"lw $fp, 16($sp)\n"
|
||||
"addiu $sp, $sp, 24\n"
|
||||
"jr $ra\n"
|
||||
"nop\n"
|
||||
".set\treorder\n.end\tfunc_800D0204\n");
|
||||
INCLUDE_ASM("asm/md_MAIN_003/nonmatchings/md_MAIN_003_o0e", func_800D0204);
|
||||
|
||||
|
||||
extern s32 func_800149E0(s32 arg0);
|
||||
@@ -253,110 +152,7 @@ void func_800D0268(void) {
|
||||
}
|
||||
|
||||
|
||||
__asm__(".text\n.align 2\n.globl func_800D0440\n.ent\tfunc_800D0440\n"
|
||||
"func_800D0440:\n.frame $sp,40,$31\n.mask 0xC0010000,-16\n.fmask 0,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"addiu $sp, $sp, -40\n"
|
||||
"sw $ra, 32($sp)\n"
|
||||
"sw $fp, 28($sp)\n"
|
||||
"sw $s0, 24($sp)\n"
|
||||
"addu $fp, $sp, $zero\n"
|
||||
"lui $s0, %hi(D_800AF630)\n"
|
||||
"addiu $s0, $s0, %lo(D_800AF630)\n"
|
||||
"addiu $a0, $zero, 4\n"
|
||||
"jal func_800167F0\n"
|
||||
"nop\n"
|
||||
"andi $v1, $v0, 65535\n"
|
||||
"beqz $v1, .L800D0590\n"
|
||||
"nop\n"
|
||||
"lui $v0, %hi(D_800EC894)\n"
|
||||
"lh $v0, %lo(D_800EC894)($v0)\n"
|
||||
"addiu $v1, $zero, 1\n"
|
||||
"beq $v0, $v1, .L800D04EC\n"
|
||||
"nop\n"
|
||||
"slti $v1, $v0, 2\n"
|
||||
"beqz $v1, .L800D04A4\n"
|
||||
"nop\n"
|
||||
"beqz $v0, .L800D04C4\n"
|
||||
"nop\n"
|
||||
"j .L800D0560\n"
|
||||
"nop\n"
|
||||
".L800D04A4:\n"
|
||||
"addiu $v1, $zero, 2\n"
|
||||
"beq $v0, $v1, .L800D0510\n"
|
||||
"nop\n"
|
||||
"addiu $v1, $zero, 4\n"
|
||||
"beq $v0, $v1, .L800D0538\n"
|
||||
"nop\n"
|
||||
"j .L800D0560\n"
|
||||
"nop\n"
|
||||
".L800D04C4:\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $v0, -23626($at)\n"
|
||||
"addiu $v0, $zero, 2\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $v0, -23624($at)\n"
|
||||
"j .L800D0560\n"
|
||||
"nop\n"
|
||||
".L800D04EC:\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $v0, -23626($at)\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $zero, -23624($at)\n"
|
||||
"j .L800D0560\n"
|
||||
"nop\n"
|
||||
".L800D0510:\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $v0, -23626($at)\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $v0, -23624($at)\n"
|
||||
"j .L800D0560\n"
|
||||
"nop\n"
|
||||
".L800D0538:\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $v0, -23626($at)\n"
|
||||
"addiu $v0, $zero, 4\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $v0, -23624($at)\n"
|
||||
"j .L800D0560\n"
|
||||
"nop\n"
|
||||
".L800D0560:\n"
|
||||
"sh $zero, 16($fp)\n"
|
||||
"sh $zero, 18($fp)\n"
|
||||
"addiu $v0, $zero, 320\n"
|
||||
"sh $v0, 20($fp)\n"
|
||||
"addiu $v0, $zero, 480\n"
|
||||
"sh $v0, 22($fp)\n"
|
||||
"addiu $a0, $fp, 16\n"
|
||||
"addu $a1, $zero, $zero\n"
|
||||
"addu $a2, $zero, $zero\n"
|
||||
"addu $a3, $zero, $zero\n"
|
||||
"jal func_80059888\n"
|
||||
"nop\n"
|
||||
".L800D0590:\n"
|
||||
"jal func_800D0D6C\n"
|
||||
"nop\n"
|
||||
"addu $sp, $fp, $zero\n"
|
||||
"lw $ra, 32($sp)\n"
|
||||
"lw $fp, 28($sp)\n"
|
||||
"lw $s0, 24($sp)\n"
|
||||
"addiu $sp, $sp, 40\n"
|
||||
"jr $ra\n"
|
||||
"nop\n"
|
||||
".set\treorder\n.end\tfunc_800D0440\n");
|
||||
INCLUDE_ASM("asm/md_MAIN_003/nonmatchings/md_MAIN_003_o0e", func_800D0440);
|
||||
|
||||
|
||||
/* func_800D05B4 - VERBATIM-ASM BANK (cookbook sec 265, file-scope form #1).
|
||||
@@ -381,54 +177,7 @@ __asm__(".text\n.align 2\n.globl func_800D0440\n.ent\tfunc_800D0440\n"
|
||||
* used throughout this file's verbatim-asm blocks. No C externs shipped (link-time
|
||||
* resolution).
|
||||
*/
|
||||
__asm__(".text\n.align 2\n.globl func_800D05B4\n.ent\tfunc_800D05B4\n"
|
||||
"func_800D05B4:\n.frame $sp,48,$31\n.mask 0xC0010000,-16\n.fmask 0,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"addiu $sp, $sp, -48\n"
|
||||
"sw $ra, 40($sp)\n"
|
||||
"sw $fp, 36($sp)\n"
|
||||
"sw $s0, 32($sp)\n"
|
||||
"addu $fp, $sp, $zero\n"
|
||||
"lui $s0, %hi(D_800AF630)\n"
|
||||
"addiu $s0, $s0, %lo(D_800AF630)\n"
|
||||
"jal func_8001C044\n"
|
||||
"nop\n"
|
||||
"jal func_80015310\n"
|
||||
"nop\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sb $zero, -23583($at)\n"
|
||||
"lui $at, %hi(D_800EC890)\n"
|
||||
"sw $zero, %lo(D_800EC890)($at)\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"lui $at, %hi(D_800EC8A0)\n"
|
||||
"sw $v0, %lo(D_800EC8A0)($at)\n"
|
||||
"lui $a0, %hi(D_800D4E6C)\n"
|
||||
"addiu $a0, $a0, %lo(D_800D4E6C)\n"
|
||||
"jal func_800183E0\n"
|
||||
"nop\n"
|
||||
"lui $a0, %hi(D_800D52BC)\n"
|
||||
"addiu $a0, $a0, %lo(D_800D52BC)\n"
|
||||
"jal func_800183E0\n"
|
||||
"nop\n"
|
||||
"lui $at, %hi(D_800EC894)\n"
|
||||
"sh $zero, %lo(D_800EC894)($at)\n"
|
||||
"addiu $v0, $zero, -1\n"
|
||||
"lui $at, %hi(D_800EC88C)\n"
|
||||
"sw $v0, %lo(D_800EC88C)($at)\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $zero, -23624($at)\n"
|
||||
"jal func_800118AC\n"
|
||||
"nop\n"
|
||||
"addu $sp, $fp, $zero\n"
|
||||
"lw $ra, 40($sp)\n"
|
||||
"lw $fp, 36($sp)\n"
|
||||
"lw $s0, 32($sp)\n"
|
||||
"addiu $sp, $sp, 48\n"
|
||||
"jr $ra\n"
|
||||
"nop\n"
|
||||
".set\treorder\n.end\tfunc_800D05B4\n");
|
||||
INCLUDE_ASM("asm/md_MAIN_003/nonmatchings/md_MAIN_003_o0e", func_800D05B4);
|
||||
|
||||
|
||||
/* func_800D0664 - VERBATIM-ASM BANK (cookbook sec 265, file-scope form #1).
|
||||
@@ -458,32 +207,7 @@ __asm__(".text\n.align 2\n.globl func_800D05B4\n.ent\tfunc_800D05B4\n"
|
||||
* ra/fp/s0 = 0xC0010000. All immediates decimal (maspsx rejects hex in __asm__
|
||||
* strings). No C externs shipped (link-time resolution, sec 265 / sec 236-1).
|
||||
*/
|
||||
__asm__(".text\n.align 2\n.globl func_800D0664\n.ent\tfunc_800D0664\n"
|
||||
"func_800D0664:\n.frame $sp,40,$31\n.mask 0xC0010000,-16\n.fmask 0,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"addiu $sp, $sp, -40\n"
|
||||
"sw $ra, 32($sp)\n"
|
||||
"sw $fp, 28($sp)\n"
|
||||
"sw $s0, 24($sp)\n"
|
||||
"addu $fp, $sp, $zero\n"
|
||||
"lui $s0, %hi(D_800AF630)\n"
|
||||
"addiu $s0, $s0, %lo(D_800AF630)\n"
|
||||
"jal func_80015310\n"
|
||||
"nop\n"
|
||||
"lui $a0, %hi(D_800D93FC)\n"
|
||||
"addiu $a0, $a0, %lo(D_800D93FC)\n"
|
||||
"jal func_800183E0\n"
|
||||
"nop\n"
|
||||
"jal func_800118AC\n"
|
||||
"nop\n"
|
||||
"addu $sp, $fp, $zero\n"
|
||||
"lw $ra, 32($sp)\n"
|
||||
"lw $fp, 28($sp)\n"
|
||||
"lw $s0, 24($sp)\n"
|
||||
"addiu $sp, $sp, 40\n"
|
||||
"jr $ra\n"
|
||||
"nop\n"
|
||||
".set\treorder\n.end\tfunc_800D0664\n");
|
||||
INCLUDE_ASM("asm/md_MAIN_003/nonmatchings/md_MAIN_003_o0e", func_800D0664);
|
||||
|
||||
|
||||
/* func_800D06BC - VERBATIM-ASM BANK (cookbook sec 265, file-scope form #1).
|
||||
@@ -501,44 +225,7 @@ __asm__(".text\n.align 2\n.globl func_800D0664\n.ent\tfunc_800D0664\n"
|
||||
* way; frame/mask (32/0xC0010000,-16) copied from it. All immediates decimal
|
||||
* (maspsx rejects hex in __asm__ strings). No C externs shipped (link-time resolution).
|
||||
*/
|
||||
__asm__(".text\n.align 2\n.globl func_800D06BC\n.ent\tfunc_800D06BC\n"
|
||||
"func_800D06BC:\n.frame $sp,32,$31\n.mask 0xC0010000,-16\n.fmask 0,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"addiu $sp, $sp, -32\n"
|
||||
"sw $ra, 24($sp)\n"
|
||||
"sw $fp, 20($sp)\n"
|
||||
"sw $s0, 16($sp)\n"
|
||||
"addu $fp, $sp, $zero\n"
|
||||
"lui $s0, %hi(D_800AF630)\n"
|
||||
"addiu $s0, $s0, %lo(D_800AF630)\n"
|
||||
"jal func_800D12D0\n"
|
||||
"nop\n"
|
||||
"lui $v0, %hi(D_800EC890)\n"
|
||||
"lw $v0, %lo(D_800EC890)($v0)\n"
|
||||
"nop\n"
|
||||
"addiu $v1, $v0, 4\n"
|
||||
"lui $at, %hi(D_800EC890)\n"
|
||||
"sw $v1, %lo(D_800EC890)($at)\n"
|
||||
"lui $v0, %hi(D_800EC890)\n"
|
||||
"lw $v0, %lo(D_800EC890)($v0)\n"
|
||||
"nop\n"
|
||||
"slti $v1, $v0, 128\n"
|
||||
"bnez $v1, .L800D0724\n"
|
||||
"nop\n"
|
||||
"addiu $v0, $zero, 128\n"
|
||||
"lui $at, %hi(D_800EC890)\n"
|
||||
"sw $v0, %lo(D_800EC890)($at)\n"
|
||||
"jal func_800118AC\n"
|
||||
"nop\n"
|
||||
".L800D0724:\n"
|
||||
"addu $sp, $fp, $zero\n"
|
||||
"lw $ra, 24($sp)\n"
|
||||
"lw $fp, 20($sp)\n"
|
||||
"lw $s0, 16($sp)\n"
|
||||
"addiu $sp, $sp, 32\n"
|
||||
"jr $ra\n"
|
||||
"nop\n"
|
||||
".set\treorder\n.end\tfunc_800D06BC\n");
|
||||
INCLUDE_ASM("asm/md_MAIN_003/nonmatchings/md_MAIN_003_o0e", func_800D06BC);
|
||||
|
||||
|
||||
/* func_800D0740 - the pad-driven 3-way menu cursor tick.
|
||||
@@ -636,68 +323,7 @@ void func_800D0740(void) {
|
||||
}
|
||||
|
||||
|
||||
__asm__(".text\n.align 2\n.globl func_800D09A0\n.ent\tfunc_800D09A0\n"
|
||||
"func_800D09A0:\n.frame $sp,32,$31\n.mask 0xC0010000,-16\n.fmask 0,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"addiu $sp, $sp, -32\n"
|
||||
"sw $ra, 24($sp)\n"
|
||||
"sw $fp, 20($sp)\n"
|
||||
"sw $s0, 16($sp)\n"
|
||||
"addu $fp, $sp, $zero\n"
|
||||
"lui $s0, %hi(D_800AF630)\n"
|
||||
"addiu $s0, $s0, %lo(D_800AF630)\n"
|
||||
"jal func_800D12D0\n"
|
||||
"nop\n"
|
||||
"lui $v0, %hi(D_800EC898)\n"
|
||||
"lhu $v0, %lo(D_800EC898)($v0)\n"
|
||||
"nop\n"
|
||||
"addiu $v1, $v0, 1\n"
|
||||
"addu $v0, $v1, $zero\n"
|
||||
"lui $at, %hi(D_800EC898)\n"
|
||||
"sh $v0, %lo(D_800EC898)($at)\n"
|
||||
"lui $v0, %hi(D_800EC898)\n"
|
||||
"lhu $v0, %lo(D_800EC898)($v0)\n"
|
||||
"nop\n"
|
||||
"andi $v1, $v0, 4\n"
|
||||
"sll $a0, $v1, 16\n"
|
||||
"sra $v0, $a0, 16\n"
|
||||
"beqz $v0, .L800D0A24\n"
|
||||
"nop\n"
|
||||
"lui $v0, %hi(D_800EC894)\n"
|
||||
"lh $v0, %lo(D_800EC894)($v0)\n"
|
||||
"nop\n"
|
||||
"addu $a0, $v0, $zero\n"
|
||||
"addiu $a1, $zero, 1\n"
|
||||
"jal func_800D1D14\n"
|
||||
"nop\n"
|
||||
"j .L800D0A40\n"
|
||||
"nop\n"
|
||||
".L800D0A24:\n"
|
||||
"lui $v0, %hi(D_800EC894)\n"
|
||||
"lh $v0, %lo(D_800EC894)($v0)\n"
|
||||
"nop\n"
|
||||
"addu $a0, $v0, $zero\n"
|
||||
"addu $a1, $zero, $zero\n"
|
||||
"jal func_800D1D14\n"
|
||||
"nop\n"
|
||||
".L800D0A40:\n"
|
||||
"lui $v0, %hi(D_800EC898)\n"
|
||||
"lh $v0, %lo(D_800EC898)($v0)\n"
|
||||
"nop\n"
|
||||
"slti $v1, $v0, 33\n"
|
||||
"bnez $v1, .L800D0A60\n"
|
||||
"nop\n"
|
||||
"jal func_800118AC\n"
|
||||
"nop\n"
|
||||
".L800D0A60:\n"
|
||||
"addu $sp, $fp, $zero\n"
|
||||
"lw $ra, 24($sp)\n"
|
||||
"lw $fp, 20($sp)\n"
|
||||
"lw $s0, 16($sp)\n"
|
||||
"addiu $sp, $sp, 32\n"
|
||||
"jr $ra\n"
|
||||
"nop\n"
|
||||
".set\treorder\n.end\tfunc_800D09A0\n");
|
||||
INCLUDE_ASM("asm/md_MAIN_003/nonmatchings/md_MAIN_003_o0e", func_800D09A0);
|
||||
|
||||
|
||||
/* func_800D0A7C - VERBATIM-ASM BANK (cookbook sec 265, file-scope form #1).
|
||||
@@ -719,52 +345,7 @@ __asm__(".text\n.align 2\n.globl func_800D09A0\n.ent\tfunc_800D09A0\n"
|
||||
* way; frame/mask (32/0xC0010000,-16) copied from them. All immediates decimal
|
||||
* (maspsx rejects hex in __asm__ strings). No C externs shipped (link-time resolution).
|
||||
*/
|
||||
__asm__(".text\n.align 2\n.globl func_800D0A7C\n.ent\tfunc_800D0A7C\n"
|
||||
"func_800D0A7C:\n.frame $sp,32,$31\n.mask 0xC0010000,-16\n.fmask 0,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"addiu $sp, $sp, -32\n"
|
||||
"sw $ra, 24($sp)\n"
|
||||
"sw $fp, 20($sp)\n"
|
||||
"sw $s0, 16($sp)\n"
|
||||
"addu $fp, $sp, $zero\n"
|
||||
"lui $s0, %hi(D_800AF630)\n"
|
||||
"addiu $s0, $s0, %lo(D_800AF630)\n"
|
||||
"lui $v0, %hi(D_800EC890)\n"
|
||||
"lw $v0, %lo(D_800EC890)($v0)\n"
|
||||
"nop\n"
|
||||
"addiu $v1, $v0, -4\n"
|
||||
"lui $at, %hi(D_800EC890)\n"
|
||||
"sw $v1, %lo(D_800EC890)($at)\n"
|
||||
"lui $v0, %hi(D_800EC890)\n"
|
||||
"lw $v0, %lo(D_800EC890)($v0)\n"
|
||||
"nop\n"
|
||||
"bgez $v0, .L800D0AF8\n"
|
||||
"nop\n"
|
||||
"lui $at, %hi(D_800EC890)\n"
|
||||
"sw $zero, %lo(D_800EC890)($at)\n"
|
||||
"addiu $a0, $zero, 1\n"
|
||||
"jal func_800146B0\n"
|
||||
"nop\n"
|
||||
"addiu $v0, $zero, 2\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sw $v0, -23576($at)\n"
|
||||
"jal func_800118AC\n"
|
||||
"nop\n"
|
||||
"j .L800D0B00\n"
|
||||
"nop\n"
|
||||
".L800D0AF8:\n"
|
||||
"jal func_800D12D0\n"
|
||||
"nop\n"
|
||||
".L800D0B00:\n"
|
||||
"addu $sp, $fp, $zero\n"
|
||||
"lw $ra, 24($sp)\n"
|
||||
"lw $fp, 20($sp)\n"
|
||||
"lw $s0, 16($sp)\n"
|
||||
"addiu $sp, $sp, 32\n"
|
||||
"jr $ra\n"
|
||||
"nop\n"
|
||||
".set\treorder\n.end\tfunc_800D0A7C\n");
|
||||
INCLUDE_ASM("asm/md_MAIN_003/nonmatchings/md_MAIN_003_o0e", func_800D0A7C);
|
||||
|
||||
|
||||
/* func_800D0B1C - VERBATIM-ASM BANK (cookbook sec 265, file-scope form #1).
|
||||
@@ -801,93 +382,7 @@ __asm__(".text\n.align 2\n.globl func_800D0A7C\n.ent\tfunc_800D0A7C\n"
|
||||
* -23626, -0x5C48 = -23624, lui $at,(0x10000>>16) = lui $at,1. No C externs
|
||||
* shipped (link-time resolution, per sec 265 / sec 236-1).
|
||||
*/
|
||||
__asm__(".text\n.align 2\n.globl func_800D0B1C\n.ent\tfunc_800D0B1C\n"
|
||||
"func_800D0B1C:\n.frame $sp,32,$31\n.mask 0xC0010000,-16\n.fmask 0,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"addiu $sp, $sp, -32\n"
|
||||
"sw $ra, 24($sp)\n"
|
||||
"sw $fp, 20($sp)\n"
|
||||
"sw $s0, 16($sp)\n"
|
||||
"addu $fp, $sp, $zero\n"
|
||||
"lui $s0, %hi(D_800AF630)\n"
|
||||
"addiu $s0, $s0, %lo(D_800AF630)\n"
|
||||
"lui $a0, %hi(D_800D4E6C)\n"
|
||||
"addiu $a0, $a0, %lo(D_800D4E6C)\n"
|
||||
"jal func_800183E0\n"
|
||||
"nop\n"
|
||||
"lui $v0, %hi(D_800EC894)\n"
|
||||
"lh $v0, %lo(D_800EC894)($v0)\n"
|
||||
"addiu $v1, $zero, 1\n"
|
||||
"beq $v0, $v1, .L800D0BC0\n"
|
||||
"nop\n"
|
||||
"slti $v1, $v0, 2\n"
|
||||
"beqz $v1, .L800D0B78\n"
|
||||
"nop\n"
|
||||
"beqz $v0, .L800D0B98\n"
|
||||
"nop\n"
|
||||
"j .L800D0C34\n"
|
||||
"nop\n"
|
||||
".L800D0B78:\n"
|
||||
"addiu $v1, $zero, 2\n"
|
||||
"beq $v0, $v1, .L800D0BE4\n"
|
||||
"nop\n"
|
||||
"addiu $v1, $zero, 4\n"
|
||||
"beq $v0, $v1, .L800D0C0C\n"
|
||||
"nop\n"
|
||||
"j .L800D0C34\n"
|
||||
"nop\n"
|
||||
".L800D0B98:\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $v0, -23626($at)\n"
|
||||
"addiu $v0, $zero, 2\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $v0, -23624($at)\n"
|
||||
"j .L800D0C34\n"
|
||||
"nop\n"
|
||||
".L800D0BC0:\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $v0, -23626($at)\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $zero, -23624($at)\n"
|
||||
"j .L800D0C34\n"
|
||||
"nop\n"
|
||||
".L800D0BE4:\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $v0, -23626($at)\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $v0, -23624($at)\n"
|
||||
"j .L800D0C34\n"
|
||||
"nop\n"
|
||||
".L800D0C0C:\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $v0, -23626($at)\n"
|
||||
"addiu $v0, $zero, 4\n"
|
||||
"lui $at, 1\n"
|
||||
"addu $at, $s0, $at\n"
|
||||
"sh $v0, -23624($at)\n"
|
||||
"j .L800D0C34\n"
|
||||
"nop\n"
|
||||
".L800D0C34:\n"
|
||||
"addu $sp, $fp, $zero\n"
|
||||
"lw $ra, 24($sp)\n"
|
||||
"lw $fp, 20($sp)\n"
|
||||
"lw $s0, 16($sp)\n"
|
||||
"addiu $sp, $sp, 32\n"
|
||||
"jr $ra\n"
|
||||
"nop\n"
|
||||
".set\treorder\n.end\tfunc_800D0B1C\n");
|
||||
INCLUDE_ASM("asm/md_MAIN_003/nonmatchings/md_MAIN_003_o0e", func_800D0B1C);
|
||||
|
||||
|
||||
extern s16 D_800EC894;
|
||||
|
||||
@@ -145,39 +145,5 @@ void func_800CB148(s32 a0) {
|
||||
}
|
||||
|
||||
|
||||
__asm__(".text\n.align 2\n.globl func_800CB17C\n.ent\tfunc_800CB17C\n"
|
||||
"func_800CB17C:\n.frame $sp,24,$31\n.mask 0x80010000,-8\n.fmask 0,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"addiu $sp,$sp,-24\n"
|
||||
"sw $s0,16($sp)\n"
|
||||
"addu $s0,$a0,$zero\n"
|
||||
"sw $ra,20($sp)\n"
|
||||
"lh $a0,10($s0)\n"
|
||||
"jal func_8012A304\n"
|
||||
"addiu $a1,$zero,128\n"
|
||||
"addu $a0,$s0,$zero\n"
|
||||
"jal func_801477E8\n"
|
||||
"lui $a1,65512\n"
|
||||
"lui $a1,%hi(D_800CB1F4)\n"
|
||||
"addiu $a1,$a1,%lo(D_800CB1F4)\n"
|
||||
"jal func_80154274\n"
|
||||
"addu $a0,$s0,$zero\n"
|
||||
"jal func_80147324\n"
|
||||
"addiu $a0,$zero,1146\n"
|
||||
"addu $a0,$s0,$zero\n"
|
||||
"jal func_8014C010\n"
|
||||
"addiu $a1,$zero,2\n"
|
||||
"jal func_801483E8\n"
|
||||
"addu $a0,$s0,$zero\n"
|
||||
"lui $a0,%hi(D_80062BD0)\n"
|
||||
"addiu $a0,$a0,%lo(D_80062BD0)\n"
|
||||
"jal func_80019064\n"
|
||||
"nop\n"
|
||||
"lw $ra,20($sp)\n"
|
||||
"lw $s0,16($sp)\n"
|
||||
"addiu $sp,$sp,24\n"
|
||||
"jr $ra\n"
|
||||
"nop\n"
|
||||
".set\treorder\n"
|
||||
".end\tfunc_800CB17C\n");
|
||||
INCLUDE_ASM("asm/md_MAIN_020/nonmatchings/md_MAIN_020", func_800CB17C);
|
||||
|
||||
|
||||
@@ -6522,47 +6522,7 @@ void func_8018098C(s32 a0) {
|
||||
}
|
||||
|
||||
|
||||
__asm__(".text\n.align 2\n.globl func_801809E4\n.ent\tfunc_801809E4\n"
|
||||
"func_801809E4:\n.frame $sp,16,$31\n.mask 0x00000000,0\n.fmask 0,0\n"
|
||||
".set\tnoreorder\n"
|
||||
"addu $a1, $a0, $zero\n"
|
||||
"lw $v0, 28($a1)\n"
|
||||
"nop\n"
|
||||
"beqz $v0, .L80180A04\n"
|
||||
"addiu $sp, $sp, -16\n"
|
||||
"addiu $v0, $v0, -1\n"
|
||||
"j .L80180A5C\n"
|
||||
"sw $v0, 28($a1)\n"
|
||||
".L80180A04:\n"
|
||||
"addiu $v0, $zero, -1280\n"
|
||||
"sh $zero, 6($a1)\n"
|
||||
"sh $v0, 10($a1)\n"
|
||||
"lui $v0, %hi(D_80126B66)\n"
|
||||
"lh $v0, %lo(D_80126B66)($v0)\n"
|
||||
"lh $v1, 140($a1)\n"
|
||||
"addu $a2, $v0, $zero\n"
|
||||
"slt $v0, $v0, $v1\n"
|
||||
"bnez $v0, .L80180A34\n"
|
||||
"addu $a0, $v1, $zero\n"
|
||||
"j .L80180A38\n"
|
||||
"addiu $v0, $a0, -512\n"
|
||||
".L80180A34:\n"
|
||||
"addiu $v0, $a2, -512\n"
|
||||
".L80180A38:\n"
|
||||
"sh $v0, 14($a1)\n"
|
||||
"lw $a0, 32($a1)\n"
|
||||
"lui $v1, 32767\n"
|
||||
"lw $v0, 4($a0)\n"
|
||||
"ori $v1, $v1, 65535\n"
|
||||
"and $v0, $v0, $v1\n"
|
||||
"sw $v0, 4($a0)\n"
|
||||
"addiu $v0, $zero, 1\n"
|
||||
"sh $v0, 2($a1)\n"
|
||||
".L80180A5C:\n"
|
||||
"addiu $sp, $sp, 16\n"
|
||||
"jr $ra\n"
|
||||
"nop\n"
|
||||
".set\treorder\n.end\tfunc_801809E4\n");
|
||||
INCLUDE_ASM("asm/ov_SC06_010/nonmatchings/ov_SC06_010_jr_8017A4AC", func_801809E4);
|
||||
|
||||
|
||||
extern s32 func_80180A88(void);
|
||||
|
||||
Reference in New Issue
Block a user