mirror of
https://github.com/Druthulu/BFM-decomp
synced 2026-10-03 08:07:25 -04:00
phase-36: S105 s105_f3 — func_801A4258 banked at 0 through the whole-object gate + propagated — f3 plain C (compound updates on the field, pad + barrier + 4 pins gone)
This commit is contained in:
Drew T
+176
-176
@@ -1,5 +1,5 @@
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|
||||
},
|
||||
"ok": true,
|
||||
"seconds": 2.2
|
||||
|
||||
@@ -29592,3 +29592,4 @@
|
||||
{"ts": "2026-09-11 12:34:23", "label": "s105_f1_minlever", "rung": "E", "calib": {"head": "a91f4efff", "stamp": "15956e4a96c4"}, "tu": "src/800.c", "fn": "func_80029D3C", "addr": 2147654972, "aliases": null, "header": false, "includers": 0, "nhash_before": "a5460b3abeb67559637ff85245fc98a16a582a50", "nhash_after": "558ab7c0ff2ef4dc4f916476f8b193bf7e6a5fbc", "source": ".run/P36/agents/main__func_80029D3C/body.c", "verdict": "LEVER-FREE", "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$4", "via": "", "line": 19270, "verdict": "NEEDED", "why": "left by the author", "oracle": ""}], "compiles": 1, "seconds": 0.442, "objects": ["build/src/800.o"], "before_text": "s32 func_80029D3C(void) {\n register s32 n __asm__(\"$4\"); // !FAKE: pin $4 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register s32 s0 __asm__(\"$16\"); // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 p;\n s32 q;\n s32 ret;\n\n s0 = n;\n if (s0 <= 0) {\n ret = 0;\n } else {\n p = func_8002A4FC(s0) * 60;\n q = s0 - s0 * p / 4800;\n ret = q > 0 ? q : 1;\n }\n return ret;\n}\n", "after_text": "s32 func_80029D3C(void) {\n register s32 n __asm__(\"$4\"); // !FAKE: pin $4 \u2014 the function's own MISSING PARAMETER `s32 n` (assign_parms, function.c:3679; the caller ov_SC07_002 func_80185FB0 pins $4 = D_8011DB1A); parked as a SIGNATURE change, see scratch/patch_signature.c (P36 S105 f1 minimum-lever)\n s32 s0 = n;\n s32 p;\n s32 q;\n\n if (s0 <= 0) {\n return 0;\n }\n /* func_8002A4FC reads no argument (its body is `return *(u16 *)(D_800638FE + D_80078EEC * 16)`); every overlay\n * caller already calls it `(void)`. Passing `s0` here emits the `move a0,s0` the target does not have (its jal\n * delay slot is a nop). */\n p = ((s32 (*)(void))func_8002A4FC)() * 60;\n q = s0 - s0 * p / 4800;\n if (q <= 0) {\n q = 1;\n }\n return q;\n}\n"}
|
||||
{"ts": "2026-09-11 12:34:44", "label": "s105_f1_minlever", "rung": "E", "calib": {"head": "0afcea1dd", "stamp": "15956e4a96c4"}, "tu": "src/800.c", "fn": "func_80015D4C", "addr": 2147573068, "aliases": null, "header": false, "includers": 0, "nhash_before": "365e961c008df368484578e1a3f43fb9b2d76984", "nhash_after": "5844ddc5006ee1c858a740c09868cac5c60ed5ed", "source": ".run/P36/agents/main__func_80015D4C/body.c", "verdict": "LEVER-FREE", "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$4", "via": "", "line": 2991, "verdict": "NEEDED", "why": "left by the author", "oracle": ""}], "compiles": 1, "seconds": 0.441, "objects": ["build/src/800.o"], "before_text": "void func_80015D4C(s32 a0, s32 a1, s32 a2, s32 a3, u8 arg4, u8 arg5, u8 arg6, u16 arg7, u16 arg8)\n{\n extern OtBlk_80016450 D_800A651C[]; /* block scope: engine_core.h's DEFINE_ macros declare this symbol scalar in their own bodies */\n void *temp_v0;\n register s16 vx __asm__(\"$18\"); // !FAKE: pin $18 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register s16 vy __asm__(\"$17\"); // !FAKE: pin $17 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register u32 tag0 __asm__(\"$4\"); // !FAKE: pin $4 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 depth4;\n\n temp_v0 = func_80010A08(0x18);\n *(u8 *)((u8 *)temp_v0 + 3) = 5;\n *(u8 *)((u8 *)temp_v0 + 7) = 0x28;\n vx = a0;\n vy = a1;\n if (arg8 < 4) {\n *(u8 *)((u8 *)temp_v0 + 7) = 0x2A;\n }\n\n *(u8 *)((u8 *)temp_v0 + 4) = arg4;\n *(u8 *)((u8 *)temp_v0 + 5) = arg5;\n *(u8 *)((u8 *)temp_v0 + 6) = arg6;\n *(s16 *)((u8 *)temp_v0 + 8) = vx;\n *(s16 *)((u8 *)temp_v0 + 0xA) = vy;\n *(s16 *)((u8 *)temp_v0 + 0xC) = a0 + a2;\n *(s16 *)((u8 *)temp_v0 + 0xE) = vy;\n *(s16 *)((u8 *)temp_v0 + 0x10) = vx;\n tag0 = *(u32 *)temp_v0;\n *(s16 *)((u8 *)temp_v0 + 0x12) = a1 + a3;\n *(s16 *)((u8 *)temp_v0 + 0x14) = a0 + a2;\n *(s16 *)((u8 *)temp_v0 + 0x16) = a1 + a3;\n\n depth4 = arg7 * 4;\n *(u32 *)temp_v0 = (tag0 & 0xFF000000) |\n (*(u32 *)(depth4 + D_800A651C[D_800B9A02].a) & 0xFFFFFF);\n *(u32 *)(depth4 + D_800A651C[D_800B9A02].a) =\n (*(u32 *)(depth4 + D_800A651C[D_800B9A02].a) & 0xFF000000) |\n ((u32)temp_v0 & 0xFFFFFF);\n if (arg8 < 4) {\n func_80016638(&D_800A6518[D_800B9A02 * 20], arg7, arg8);\n }\n}\n", "after_text": "void func_80015D4C(s32 a0, s32 a1, s32 a2, s32 a3, u8 arg4, u8 arg5, u8 arg6, u16 arg7, u16 arg8)\n{\n extern OtBlk_80016450 D_800A651C[]; /* block scope: engine_core.h's DEFINE_ macros declare this symbol scalar in their own bodies */\n void *temp_v0;\n s16 vx;\n s16 vy;\n register u32 tag0 __asm__(\"$4\"); // !FAKE: pin $4 tag0 \u2014 local-alloc qty_compare, local-alloc.c:1579: the 0xFF000000-masked tag word must take $a0 before the depth4+slot quantity (6 refs / 44 insns) does; a plain u32 is 6 refs / 56 insns and loses (P36 S105 f1 minimum-lever)\n s32 depth4;\n\n vx = a0; /* the s16 copies are made BEFORE the allocation call: they cross it, so global\n * gives them $s2/$s1 and a3/arg7 are the ones spilled (the target's frame) */\n vy = a1;\n temp_v0 = func_80010A08(0x18);\n *(u8 *)((u8 *)temp_v0 + 3) = 5;\n *(u8 *)((u8 *)temp_v0 + 7) = 0x28;\n if (arg8 < 4) {\n *(u8 *)((u8 *)temp_v0 + 7) = 0x2A;\n }\n\n *(u8 *)((u8 *)temp_v0 + 4) = arg4;\n *(u8 *)((u8 *)temp_v0 + 5) = arg5;\n *(u8 *)((u8 *)temp_v0 + 6) = arg6;\n *(s16 *)((u8 *)temp_v0 + 8) = vx;\n *(s16 *)((u8 *)temp_v0 + 0xA) = vy;\n *(s16 *)((u8 *)temp_v0 + 0xC) = a0 + a2;\n *(s16 *)((u8 *)temp_v0 + 0xE) = vy;\n *(s16 *)((u8 *)temp_v0 + 0x10) = vx;\n tag0 = *(u32 *)temp_v0;\n *(s16 *)((u8 *)temp_v0 + 0x12) = a1 + a3;\n *(s16 *)((u8 *)temp_v0 + 0x14) = a0 + a2;\n *(s16 *)((u8 *)temp_v0 + 0x16) = a1 + a3;\n\n depth4 = arg7 * 4;\n *(u32 *)temp_v0 = (tag0 & 0xFF000000) |\n (*(u32 *)(depth4 + D_800A651C[D_800B9A02].a) & 0xFFFFFF);\n *(u32 *)(depth4 + D_800A651C[D_800B9A02].a) =\n (*(u32 *)(depth4 + D_800A651C[D_800B9A02].a) & 0xFF000000) |\n ((u32)temp_v0 & 0xFFFFFF);\n if (arg8 < 4) {\n func_80016638(&D_800A6518[D_800B9A02 * 20], arg7, arg8);\n }\n}\n"}
|
||||
{"ts": "2026-09-11 13:06:32", "label": "s105_f3", "rung": "E", "calib": {"head": "e7a78c2f1", "stamp": "15956e4a96c4"}, "tu": "src/md_SC07_004/md_SC07_004.c", "fn": "func_801AEB94", "addr": 2149247892, "aliases": null, "header": false, "includers": 0, "nhash_before": "c2efd5f42514c9227230a9b27cf393355cdd8858", "nhash_after": "f130c380fd53bfd4f7b85a0cc7dd66d26a4eb874", "source": ".run/P36/agents/md_SC07_004__func_801AEB94/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.312, "objects": ["build/src/md_SC07_004/md_SC07_004.o"], "before_text": "void func_801AEB94(void)\n{\n s32 q; /* $s0 */\n s32 i; /* $s1 */\n s32 p; /* $s2 */\n s32 loc[8];\n s32 a0v, a1v;\n\n p = (s32)D_801F8EA0;\n func_80049CAC(p + 0x10, (s32)loc);\n\n a0v = (s32)loc;\n __asm__ __volatile__(\"\" : \"=r\"(a0v) : \"0\"(a0v)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n a1v = p + 8;\n __asm__ __volatile__(\"\" : \"=r\"(a1v) : \"0\"(a1v)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n q = p + 0x18;\n loc[5] = *(s16 *)p;\n loc[6] = (s16)D_801F8EA2;\n i = 0;\n loc[7] = (s16)D_801F8EA4;\n func_80020F34(a0v, a1v);\n\n do {\n if (*(u16 *)q != 0) {\n s32 b0 = p;\n func_801AEC38(b0, q, (s32)loc);\n }\n i++;\n q += 0x24;\n } while (i < 0x20);\n}\n", "after_text": "void func_801AEB94(void)\n{\n s32 q; /* $s0 */\n s32 i; /* $s1 */\n s32 p; /* $s2 */\n s32 loc[8];\n\n p = (s32)D_801F8EA0;\n func_80049CAC(p + 0x10, (s32)loc);\n\n loc[5] = *(s16 *)p;\n loc[6] = (s16)D_801F8EA2;\n loc[7] = (s16)D_801F8EA4;\n func_80020F34((s32)loc, p + 8);\n\n q = p + 0x18;\n for (i = 0; i < 0x20; i++, q += 0x24) {\n if (*(u16 *)q != 0) {\n func_801AEC38(p, q, (s32)loc);\n }\n }\n}\n"}
|
||||
{"ts": "2026-09-11 13:06:50", "label": "s105_f3", "rung": "E", "calib": {"head": "f4521a077", "stamp": "15956e4a96c4"}, "tu": "src/md_SC07_004/md_SC07_004.c", "fn": "func_801A4258", "addr": 2149204568, "aliases": null, "header": false, "includers": 0, "nhash_before": "cf928d6582dcd73bb4829190930bcc07e1c05c3b", "nhash_after": "590e8e90972dbf75b95bcd31ea2975cab5c378e9", "source": ".run/P36/agents/md_SC07_004__func_801A4258/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.315, "objects": ["build/src/md_SC07_004/md_SC07_004.o"], "before_text": "void func_801A4258(void) {\n s32 pad[6];\n s16 *p;\n register s32 t __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register s32 u __asm__(\"$4\"); // !FAKE: pin $4 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register s32 sum __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register s32 zr __asm__(\"$0\"); // !FAKE: pin $0 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 q;\n\n (void)&pad;\n __asm__ __volatile__(\"\" ::: \"memory\"); // !FAKE: barrier memory \u2014 NEEDED DIFFERS (P36 rung B tus9)\n p = &D_801F8870;\n\n t = *p;\n if (t != D_801F8878) {\n u = t + zr;\n sum = u + (u16)D_801F8880;\n q = (u32)sum >> 7;\n *p = (s16)sum;\n D_801F8744[0] = (u8)q;\n }\n\n t = D_801F8872;\n if (t != D_801F887A) {\n u = t + zr;\n sum = u + (u16)D_801F8882;\n q = (u32)sum >> 7;\n D_801F8872 = (s16)sum;\n D_801F8744[1] = (u8)q;\n }\n\n t = D_801F8874;\n if (t != D_801F887C) {\n u = t + zr;\n sum = u + (u16)D_801F8884;\n q = (u32)sum >> 7;\n D_801F8874 = (s16)sum;\n D_801F8744[2] = (u8)q;\n }\n}\n", "after_text": "void func_801A4258(void) {\n s16 *p;\n p = &D_801F8870;\n\n if (*p != D_801F8878) {\n *p += (u16)D_801F8880;\n D_801F8744[0] = *p >> 7;\n }\n\n if (D_801F8872 != D_801F887A) {\n D_801F8872 += (u16)D_801F8882;\n D_801F8744[1] = D_801F8872 >> 7;\n }\n\n if (D_801F8874 != D_801F887C) {\n D_801F8874 += (u16)D_801F8884;\n D_801F8744[2] = D_801F8874 >> 7;\n }\n}\n"}
|
||||
|
||||
@@ -2793,43 +2793,22 @@ extern s16 D_801F8882;
|
||||
extern s16 D_801F8884;
|
||||
|
||||
void func_801A4258(void) {
|
||||
s32 pad[6];
|
||||
s16 *p;
|
||||
register s32 t __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
register s32 u __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
register s32 sum __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
register s32 zr __asm__("$0"); // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
s32 q;
|
||||
|
||||
(void)&pad;
|
||||
__asm__ __volatile__("" ::: "memory"); // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus9)
|
||||
p = &D_801F8870;
|
||||
|
||||
t = *p;
|
||||
if (t != D_801F8878) {
|
||||
u = t + zr;
|
||||
sum = u + (u16)D_801F8880;
|
||||
q = (u32)sum >> 7;
|
||||
*p = (s16)sum;
|
||||
D_801F8744[0] = (u8)q;
|
||||
if (*p != D_801F8878) {
|
||||
*p += (u16)D_801F8880;
|
||||
D_801F8744[0] = *p >> 7;
|
||||
}
|
||||
|
||||
t = D_801F8872;
|
||||
if (t != D_801F887A) {
|
||||
u = t + zr;
|
||||
sum = u + (u16)D_801F8882;
|
||||
q = (u32)sum >> 7;
|
||||
D_801F8872 = (s16)sum;
|
||||
D_801F8744[1] = (u8)q;
|
||||
if (D_801F8872 != D_801F887A) {
|
||||
D_801F8872 += (u16)D_801F8882;
|
||||
D_801F8744[1] = D_801F8872 >> 7;
|
||||
}
|
||||
|
||||
t = D_801F8874;
|
||||
if (t != D_801F887C) {
|
||||
u = t + zr;
|
||||
sum = u + (u16)D_801F8884;
|
||||
q = (u32)sum >> 7;
|
||||
D_801F8874 = (s16)sum;
|
||||
D_801F8744[2] = (u8)q;
|
||||
if (D_801F8874 != D_801F887C) {
|
||||
D_801F8874 += (u16)D_801F8884;
|
||||
D_801F8744[2] = D_801F8874 >> 7;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user