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feat(decomp): parallel gate — 2 fns across 2 binaries (10 workers)

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ov_SC04_016    func_8017DF8C
  ov_SC07_006    func_80183374
This commit is contained in:
Drew T
2026-09-02 05:01:22 -06:00
parent 16c4fc75e1
commit e1f6c5cdd9
4 changed files with 224 additions and 5 deletions
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config/overlays.mk
+2 -1
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@@ -4870,7 +4870,7 @@ ov_SC07_006_ELF := $(ov_SC07_006_OUT).elf
ov_SC07_006_MAPFILE := $(ov_SC07_006_OUT).map
ov_SC07_006_LD_SCRIPT := $(ov_SC07_006_OUT).ld
ov_SC07_006_SPLAT_YAML := config/splat.ov_SC07_006.yaml
ov_SC07_006_JTBL_INTERLEAVE := --order tail.data.o,ov_SC07_006.o,ov_SC07_006_jr_80131340.o,tail2.data.o,ov_SC07_006_jr_80135888.o,tail3.data.o,ov_SC07_006_jr_80135A4C.o,tail4.data.o,ov_SC07_006_jr_80135D20.o,tail5.data.o,ov_SC07_006_jr_801380E0.o,ov_SC07_006_o0c.o,tail6.data.o,ov_SC07_006_jr_8013F350.o,tail7.data.o,ov_SC07_006_jr_8014032C.o,tail8.data.o,ov_SC07_006_jr_80140608.o,tail9.data.o,ov_SC07_006_jr_8015444C.o,ov_SC07_006_jr_80154C24.o,ov_SC07_006_jr_801588CC.o,ov_SC07_006_jr_80159C84.o,tail10.data.o,ov_SC07_006_jr_8015A3C8.o,tail11.data.o,ov_SC07_006_jr_8015B950.o,tail12.data.o,ov_SC07_006_jr_8015C32C.o,tail13.data.o,ov_SC07_006_jr_8016AB6C.o,ov_SC07_006_jr_8016AE5C.o,tail14.data.o,ov_SC07_006_jr_80171B4C.o,tail15.data.o,ov_SC07_006_jr_801789AC.o,ov_SC07_006_jr_80179B74.o,tail16.data.o,ov_SC07_006_jr_8017AE2C.o,ov_SC07_006_jr_8017BEBC.o,tail17.data.o,ov_SC07_006_jr_80183814.o,tail18.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
ov_SC07_006_JTBL_INTERLEAVE := --order tail.data.o,ov_SC07_006.o,ov_SC07_006_jr_80131340.o,tail2.data.o,ov_SC07_006_jr_80135888.o,tail3.data.o,ov_SC07_006_jr_80135A4C.o,tail4.data.o,ov_SC07_006_jr_80135D20.o,tail5.data.o,ov_SC07_006_jr_801380E0.o,ov_SC07_006_o0c.o,tail6.data.o,ov_SC07_006_jr_8013F350.o,tail7.data.o,ov_SC07_006_jr_8014032C.o,tail8.data.o,ov_SC07_006_jr_80140608.o,tail9.data.o,ov_SC07_006_jr_8015444C.o,ov_SC07_006_jr_80154C24.o,ov_SC07_006_jr_801588CC.o,ov_SC07_006_jr_80159C84.o,tail10.data.o,ov_SC07_006_jr_8015A3C8.o,tail11.data.o,ov_SC07_006_jr_8015B950.o,tail12.data.o,ov_SC07_006_jr_8015C32C.o,tail13.data.o,ov_SC07_006_jr_8016AB6C.o,ov_SC07_006_jr_8016AE5C.o,tail14.data.o,ov_SC07_006_jr_80171B4C.o,tail15.data.o,ov_SC07_006_jr_801789AC.o,ov_SC07_006_jr_80179B74.o,tail16.data.o,ov_SC07_006_jr_8017AE2C.o,ov_SC07_006_jr_8017BEBC.o,ov_SC07_006_jr_80183814.o,tail17.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
build/src/ov_SC07_006/ov_SC07_006.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14,+0xdc
build/src/ov_SC07_006/ov_SC07_006_jr_80131340.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
build/src/ov_SC07_006/ov_SC07_006_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
@@ -4884,6 +4884,7 @@ build/src/ov_SC07_006/ov_SC07_006_jr_8015A3C8.o: JTBL_PADS := 0,4 # §8e pads (
build/src/ov_SC07_006/ov_SC07_006_jr_80171B4C.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
build/src/ov_SC07_006/ov_SC07_006_jr_801789AC.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
build/src/ov_SC07_006/ov_SC07_006_jr_80179B74.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x90
build/src/ov_SC07_006/ov_SC07_006_jr_8017BEBC.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
build/src/ov_SC07_006/ov_SC07_006_o0c.o: JTBL_PADS := 0,4,4,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x38,+0xa8,+0x118
ov_SC07_006_CHECK_SHA := config/check.ov_SC07_006.sha
ov_SC07_006_SYMBOLS := config/symbols.ov_SC07_006.txt
config/splat.ov_SC07_006.yaml
+1 -2
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@@ -161,9 +161,8 @@ segments:
- [0xccb3c, data, tail16]
- [0xccb40, .rodata, ov_SC07_006_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xccb54, .rodata, ov_SC07_006_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xccb74, data, tail17]
- [0xccb8c, .rodata, ov_SC07_006_jr_80183814] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xccbe0, data, tail18]
- [0xccbe0, data, tail17]
- [0xCE214, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
- [0xCE217] # EOF marker = the 0.4.dec byte length
# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
src/ov_SC04_016/ov_SC04_016_jr_8017BEBC.c
+78 -1
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@@ -3932,7 +3932,84 @@ extern s32 D_801A6B40;
}
INCLUDE_ASM("asm/ov_SC04_016/nonmatchings/ov_SC04_016_jr_8017BEBC", func_8017DF8C);
/* func_8017DF8C -- ov_SC04_016 (184 ins). Byte-matched S71a_1 (fable).
* Levers (see the wave note): (1) `off = j * 0x50` is a GIV of biv j, not a second
* biv -- puts `move $s0,$zero` last in the preheader and the arg3 giv in its natural
* record slot; (2) `j = 0` spelled before idx/tp so `move $a0,$zero` leads the
* preheader; (3) `tbl` is a function-scope pointer set ONCE outside the loops --
* every $s reg is taken, so reload rematerialises it from reg_equiv_constant at the
* use (`la $t6` unfolded, `addu $v0,$a1,$t6; lh 0($v0)`); operand order `idx + (s32)tbl`
* gives (plus a1 t6). `pad[2]` is an unused 8-byte aggregate reproducing the 0x50 frame.
* All D_801A6B## relocs are D_801A6B40 + K (the TU's house spelling, cf. func_8017DF68). */
#include "common.h"
extern s32 D_801A6B40;
extern s16 D_80184D08;
extern s16 D_80184D0A;
extern u16 D_800B99DC;
extern void func_8017E960(s32 param_1, s32 param_2, s32 *param_3);
typedef struct { s32 x, y, z; } Vec3_8017DF8C;
void func_8017DF8C(void *a0)
{
s32 i;
s32 j;
s32 k;
s32 off;
s32 idx;
s16 *tp;
s32 pad[2];
u16 t;
s16 *tbl;
tbl = (s16 *)&D_80184D0A;
t = *(u16 *)((s32)a0 + 0xFE) + 1;
*(u16 *)((s32)a0 + 0xFE) = t;
if ((t & 7) != 0) {
return;
}
k = *(s16 *)((s32)a0 + 0xFC);
for (i = k & 1; i < 0x10; i++) {
k = (k + 7) & 0xF;
j = 0;
idx = k * 4;
tp = (s16 *)((s32)&D_80184D08 + idx);
for (; j < 0x100; j++) {
off = j * 0x50;
if (*(s32 *)((s32)&D_801A6B40 + off) == 0) {
*(s32 *)((s32)&D_801A6B40 + off) = 1;
*(s32 *)((s32)&D_801A6B40 + off + 0x14) = -0x1000000;
*(s32 *)((s32)&D_801A6B40 + off + 0x18) = -0x2520000;
*(s32 *)((s32)&D_801A6B40 + off + 0x1C) = 0x600000;
*(s32 *)((s32)&D_801A6B40 + off + 0x08) =
((*(u16 *)((s32)a0 + 0xFC) & 0x1F) << 19) - 0x1000000;
*(s32 *)((s32)&D_801A6B40 + off + 0x0C) =
(*(s16 *)(idx + (s32)tbl) << 15) - 0x2520000;
*(s32 *)((s32)&D_801A6B40 + off + 0x10) =
(*tp << 15) + 0x600000;
*(Vec3_8017DF8C *)((s32)&D_801A6B40 + off + 0x2C) =
*(Vec3_8017DF8C *)((s32)&D_801A6B40 + off + 0x08);
func_8017E960((s32)&D_801A6B40 + off + 0x08,
(s32)&D_801A6B40 + off + 0x14,
(s32 *)((s32)&D_801A6B40 + off + 0x20));
*(s32 *)((s32)&D_801A6B40 + off + 0x38) = *(s32 *)((s32)&D_801A6B40 + off + 0x20) << 1;
*(s32 *)((s32)&D_801A6B40 + off + 0x3C) = *(s32 *)((s32)&D_801A6B40 + off + 0x24) << 1;
*(s32 *)((s32)&D_801A6B40 + off + 0x40) = *(s32 *)((s32)&D_801A6B40 + off + 0x28) << 1;
*(s32 *)((s32)&D_801A6B40 + off + 0x38) = 0;
*(s32 *)((s32)&D_801A6B40 + off + 0x3C) = 0;
*(s32 *)((s32)&D_801A6B40 + off + 0x40) = 0;
*(s32 *)((s32)&D_801A6B40 + off + 0x44) = *(s32 *)((s32)&D_801A6B40 + off + 0x20) / 2;
*(s32 *)((s32)&D_801A6B40 + off + 0x48) = *(s32 *)((s32)&D_801A6B40 + off + 0x24) / 2;
*(s32 *)((s32)&D_801A6B40 + off + 0x4C) = *(s32 *)((s32)&D_801A6B40 + off + 0x28) / 2;
*(s32 *)((s32)&D_801A6B40 + off + 0x04) = (D_800B99DC & 3) + 8;
break;
}
}
*(u16 *)((s32)a0 + 0xFC) += 7;
}
}
void func_8017E26C() {
__asm__ __volatile__(".set\tnoreorder\n"
src/ov_SC07_006/ov_SC07_006_jr_8017BEBC.c
+143 -1
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@@ -5412,4 +5412,146 @@ void func_80182F3C(s32 a0)
}
INCLUDE_ASM("asm/ov_SC07_006/nonmatchings/ov_SC07_006_jr_8017BEBC", func_80183374);
extern s32 func_8004787C(s32 a0);
extern s32 func_80047948(s32 a0);
extern int func_80178970(void);
extern s32 func_80178B18(s32 param_1, s32 param_2);
extern void func_8012A828(s32 a0, void *a1);
extern void func_8002D4C8(s32 a0, s32 a1);
extern void func_801292C8(u8 *a0);
extern u8 *func_8012913C(s32 a0);
extern s32 func_8012C658(s32 a0, s32 a1, s32 a2);
extern void func_8001CD50(s32 a0, s32 a1);
extern void func_80016224(s32 a0, s32 a1);
extern s32 rand(void);
extern u8 D_801F6180[];
extern u8 D_801F6186;
extern u8 D_801F2608[];
extern s32 D_801BFCB4;
extern void (*D_8018E7A0[])(void);
void func_80183374(s32 a0)
{
u8 *p;
s32 q;
s32 t;
s32 i;
s32 r1;
s32 rnd;
s32 t2;
s32 d2;
if (*(u16 *)(a0 + 0x34) != 0) {
*(s32 *)(a0 + 0x8) = (*(s16 *)(a0 + 0x8A) << 16) + (func_8004787C(*(s16 *)(a0 + 0x104)) << 7);
*(u16 *)(a0 + 0x104) += 0x40;
((s32 (*)(s32))func_80178970)(a0);
}
switch (*(u16 *)(a0 + 0x34)) {
case 0:
if (--*(s32 *)(a0 + 0x1C) == 0) {
func_80178B18(a0, (s32)D_8018E7A0);
func_8012A828(a0, D_801F2608);
*(u16 *)(a0 + 0x98) = 0;
*(u16 *)(a0 + 0x34) = 1;
func_8002D4C8(0xBB8, 0);
}
func_8012C658(0x3AC, 5, a0);
break;
case 1:
t = *(s32 *)(a0 + 0xCC);
if (t != 0 && *(u16 *)t != 0) {
*(s32 *)(t + 8) = *(s32 *)(a0 + 8) - 0xA80000;
}
t = *(s32 *)(a0 + 0xD0);
if (t != 0 && *(u16 *)t != 0) {
*(s32 *)(t + 8) = *(s32 *)(a0 + 8) - 0xA80000;
}
if (D_801F6186 == 0xFF) {
*(s32 *)(a0 + 0x1C) = 0x1E;
*(u16 *)(a0 + 0x34) = 2;
}
func_8012C658(0x3AC, 5, a0);
break;
case 2:
t = *(s32 *)(a0 + 0xCC);
if (t != 0 && *(u16 *)t != 0) {
*(s32 *)(t + 8) = *(s32 *)(a0 + 8) - 0xA80000;
}
t = *(s32 *)(a0 + 0xD0);
if (t != 0 && *(u16 *)t != 0) {
*(s32 *)(t + 8) = *(s32 *)(a0 + 8) - 0xA80000;
}
if (--*(s32 *)(a0 + 0x1C) == 0) {
*(u16 *)(a0 + 0x34) = 3;
func_801292C8(*(u8 **)(a0 + 0xCC));
*(s32 *)(a0 + 0x1C) = 0x1E;
func_8002D4C8(0xBC9, 0);
for (i = 0; i < 10; i++) {
p = func_8012913C(0x78);
if (p != 0) {
*(u16 *)(p + 0x6) = *(u16 *)(a0 + 0x6) - 0x28;
*(u16 *)(p + 0xA) = *(u16 *)(a0 + 0xA) - 0xA8;
*(u16 *)(p + 0xE) = *(u16 *)(a0 + 0xE);
func_8001CD50(*(s32 *)(p + 0x20), (s32)D_801F6180);
*(s32 *)(p + 0x2C) = 2;
*(s32 *)(p + 0x1C) = 1;
if (i < 8) {
s32 g = *(s32 *)(p + 0x20);
s32 v = 0x1000 - (i << 9);
*(s16 *)(g + 0x1A) = v;
*(s16 *)(g + 0x18) = v;
} else {
s32 g = *(s32 *)(p + 0x20);
*(s16 *)(g + 0x1A) = 0x200;
*(s16 *)(g + 0x18) = 0x200;
}
}
}
for (i = 0; i < 0x30; i++) {
q = func_8012C658(0x3AC, 0, a0);
if (q != 0) {
r1 = rand();
rnd = rand() % 160;
*(s32 *)(q + 0xC) += func_80047948(r1) * rnd * 0x10;
*(s32 *)(q + 0x8) += -0xC80000 + func_8004787C(r1) * rnd * 0x10;
*(u16 *)(q + 0x6) -= 0x40;
}
}
}
break;
case 3:
if (*(s32 *)(a0 + 0x1C) < 7) {
func_80016224(0xFF, 0);
}
if (--*(s32 *)(a0 + 0x1C) == 0) {
*(u16 *)(a0 + 0x34) = 4;
*(s32 *)(a0 + 0x1C) = 0x1E;
}
break;
case 4:
if (*(s32 *)(a0 + 0x1C) < 7) {
func_80016224(0xFF, 0);
}
if (--*(s32 *)(a0 + 0x1C) == 0) {
*(u16 *)(a0 + 0x34) = 5;
*(u16 *)(a0 + 0x98) = 1;
func_8002D4C8(0xBD5, 0);
*(s32 *)(a0 + 0x1C) = 0x41;
}
break;
case 5:
if (*(s32 *)(a0 + 0x1C) < 7) {
func_80016224(0xFF, 0);
}
*(s32 *)(a0 + 0x1C) -= 1;
if ((*(u16 *)(a0 + 0x72) & 0x4000) != 0) {
func_8012A828(a0, &D_801BFCB4);
*(u16 *)(a0 + 0x34) = 0;
*(u16 *)(a0 + 0x2) += 1;
func_8002D4C8(0xBB6, 0);
}
break;
}
}