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feat(decomp): parallel gate — 2 fns across 2 binaries (4 workers)

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md_MAIN_011    func_800D1254
  ov_SC05_017    func_80189240
This commit is contained in:
Drew T
2026-08-31 22:22:43 -06:00
parent da32350873
commit e32fdd47dd
4 changed files with 640 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files
config/overlays.mk
+2 -1
View File
@@ -3953,7 +3953,7 @@ ov_SC05_017_ELF := $(ov_SC05_017_OUT).elf
ov_SC05_017_MAPFILE := $(ov_SC05_017_OUT).map
ov_SC05_017_LD_SCRIPT := $(ov_SC05_017_OUT).ld
ov_SC05_017_SPLAT_YAML := config/splat.ov_SC05_017.yaml
ov_SC05_017_JTBL_INTERLEAVE := --order tail.data.o,ov_SC05_017.o,ov_SC05_017_jr_8012ACE0.o,tail2.data.o,ov_SC05_017_jr_80135888.o,tail3.data.o,ov_SC05_017_jr_80135A4C.o,tail4.data.o,ov_SC05_017_jr_80135D20.o,tail5.data.o,ov_SC05_017_jr_801380E0.o,ov_SC05_017_o0c.o,tail6.data.o,ov_SC05_017_jr_8013F350.o,tail7.data.o,ov_SC05_017_jr_8013FFD8.o,tail8.data.o,ov_SC05_017_jr_80140608.o,tail9.data.o,ov_SC05_017_jr_8015444C.o,ov_SC05_017_jr_80154C24.o,ov_SC05_017_jr_801588CC.o,ov_SC05_017_jr_80159C84.o,tail10.data.o,ov_SC05_017_jr_8015A3C8.o,tail11.data.o,ov_SC05_017_jr_8015AE2C.o,tail12.data.o,ov_SC05_017_jr_8015C32C.o,tail13.data.o,ov_SC05_017_jr_8016AB6C.o,tail14.data.o,ov_SC05_017_jr_80171B4C.o,ov_SC05_017_jr_801734BC.o,tail15.data.o,ov_SC05_017_jr_801789AC.o,ov_SC05_017_jr_80178D40.o,tail16.data.o,ov_SC05_017_jr_8017A4AC.o,tail17.data.o,ov_SC05_017_jr_8017AE2C.o,tail18.data.o,ov_SC05_017_jr_801808D4.o,ov_SC05_017_jr_801828EC.o,tail19.data.o,ov_SC05_017_jr_80182A74.o,ov_SC05_017_jr_80185A70.o,tail20.data.o,ov_SC05_017_jr_80186270.o,tail21.data.o,ov_SC05_017_jr_801875E8.o,ov_SC05_017_jr_80188B1C.o,tail22.data.o,ov_SC05_017_jr_8018C694.o,tail23.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
ov_SC05_017_JTBL_INTERLEAVE := --order tail.data.o,ov_SC05_017.o,ov_SC05_017_jr_8012ACE0.o,tail2.data.o,ov_SC05_017_jr_80135888.o,tail3.data.o,ov_SC05_017_jr_80135A4C.o,tail4.data.o,ov_SC05_017_jr_80135D20.o,tail5.data.o,ov_SC05_017_jr_801380E0.o,ov_SC05_017_o0c.o,tail6.data.o,ov_SC05_017_jr_8013F350.o,tail7.data.o,ov_SC05_017_jr_8013FFD8.o,tail8.data.o,ov_SC05_017_jr_80140608.o,tail9.data.o,ov_SC05_017_jr_8015444C.o,ov_SC05_017_jr_80154C24.o,ov_SC05_017_jr_801588CC.o,ov_SC05_017_jr_80159C84.o,tail10.data.o,ov_SC05_017_jr_8015A3C8.o,tail11.data.o,ov_SC05_017_jr_8015AE2C.o,tail12.data.o,ov_SC05_017_jr_8015C32C.o,tail13.data.o,ov_SC05_017_jr_8016AB6C.o,tail14.data.o,ov_SC05_017_jr_80171B4C.o,ov_SC05_017_jr_801734BC.o,tail15.data.o,ov_SC05_017_jr_801789AC.o,ov_SC05_017_jr_80178D40.o,tail16.data.o,ov_SC05_017_jr_8017A4AC.o,tail17.data.o,ov_SC05_017_jr_8017AE2C.o,tail18.data.o,ov_SC05_017_jr_801808D4.o,ov_SC05_017_jr_801828EC.o,tail19.data.o,ov_SC05_017_jr_80182A74.o,ov_SC05_017_jr_80185A70.o,tail20.data.o,ov_SC05_017_jr_80186270.o,tail21.data.o,ov_SC05_017_jr_801875E8.o,ov_SC05_017_jr_80188B1C.o,ov_SC05_017_jr_8018C694.o,tail22.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve
build/src/ov_SC05_017/ov_SC05_017.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
build/src/ov_SC05_017/ov_SC05_017_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0
build/src/ov_SC05_017/ov_SC05_017_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18
@@ -3969,6 +3969,7 @@ build/src/ov_SC05_017/ov_SC05_017_jr_80178D40.o: JTBL_PADS := 0,0 # §8e pads (
build/src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14,+0x34
build/src/ov_SC05_017/ov_SC05_017_jr_80182A74.o: JTBL_PADS := 0,0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14,+0x2c
build/src/ov_SC05_017/ov_SC05_017_jr_801875E8.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x38
build/src/ov_SC05_017/ov_SC05_017_jr_80188B1C.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
build/src/ov_SC05_017/ov_SC05_017_o0c.o: JTBL_PADS := 0,4,4,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x38,+0xa8,+0x118
ov_SC05_017_CHECK_SHA := config/check.ov_SC05_017.sha
ov_SC05_017_SYMBOLS := config/symbols.ov_SC05_017.txt
config/splat.ov_SC05_017.yaml
+1 -2
View File
@@ -180,9 +180,8 @@ segments:
- [0xc35cc, data, tail21]
- [0xc3640, .rodata, ov_SC05_017_jr_801875E8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xc3698, .rodata, ov_SC05_017_jr_80188B1C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xc36b8, data, tail22]
- [0xc36f4, .rodata, ov_SC05_017_jr_8018C694] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
- [0xc370c, data, tail23]
- [0xc370c, data, tail22]
- [0xC582C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word)
- [0xC582F] # EOF marker = the 0.4.dec byte length
# @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes
src/md_MAIN_011/md_MAIN_011.c
+222 -1
View File
@@ -645,7 +645,228 @@ void func_800D0BDC(void) {
}
INCLUDE_ASM("asm/md_MAIN_011/nonmatchings/md_MAIN_011", func_800D1254);
void func_800D1254(void) {
typedef struct {
s32 unk00;
s32 unk04;
s32 unk08;
s32 unk0C;
s32 unk10;
s32 unk14;
s32 unk18;
s32 unk1C;
s32 unk20;
s32 unk24;
s32 unk28;
s32 unk2C;
s32 unk30;
s16 unk34;
u8 unk36;
u8 unk37;
s16 unk38;
s16 unk3A;
s16 unk3C;
s16 unk3E;
s16 unk40;
u8 unk42;
u8 unk43;
u8 unk44;
u8 unk45;
u8 unk46;
u8 unk47;
u8 unk48;
u8 unk49;
u8 unk4A;
u8 unk4B;
u8 unk4C;
u8 pad4D[3];
s32 unk50;
s32 unk54;
s32 unk58;
s32 unk5C;
s32 unk60;
s32 unk64;
u8 unk68;
u8 pad69[3];
s32 unk6C;
s32 unk70;
s32 unk74;
s32 unk78;
s32 unk7C;
s32 unk80;
s32 unk84;
s32 unk88;
s32 unk8C;
s32 unk90;
s32 unk94;
} S1254;
extern u8 D_80078E78[];
extern void func_80029124(s32 a0, s32 a1);
extern void func_800291A0(s32 a0, s32 a1);
extern u8 D_8010F4A6;
extern u8 D_8010F4AE;
extern u8 D_8010F4B6;
extern u8 D_8010F4BE;
extern u8 D_8010F4C6;
extern u8 D_8010F59E;
extern u8 D_8010F4CE;
extern u16 D_8010F4A4;
extern u16 D_8010F4AC;
extern u16 D_8010F4B4;
extern u16 D_8010F4BC;
extern u16 D_8010F4C4;
extern u16 D_8010F59C;
extern u16 D_8010F4CC;
extern u16 D_800A6594;
extern u16 D_800A6596;
extern u16 D_800A6598;
extern u16 D_800A659A;
extern u16 D_800A659C;
extern u16 D_800A65D2;
extern u16 D_800A659E;
S1254 *p = (S1254 *)D_80078E78;
p->unk04 = 0;
p->unk08 = 0xC8;
p->unk0C = 0xD;
p->unk10 = 1;
p->unk14 = 0x64;
p->unk18 = 0x1FE0000;
p->unk1C = 0;
p->unk20 = 0;
p->unk24 = 0x640000;
p->unk28 = 0;
p->unk2C = 0x640000;
p->unk30 = 0;
p->unk34 = 1;
p->unk36 = 1;
p->unk37 = 1;
p->unk38 = 0x81E;
p->unk3A = 0xFA;
p->unk3C = 0xFA;
p->unk3E = 0x177;
p->unk40 = 0x177;
p->unk42 = 0;
p->unk43 = 0;
p->unk44 = 3;
p->unk45 = 0;
p->unk46 = 0;
p->unk47 = 0;
p->unk48 = 1;
p->unk49 = 0;
p->unk4A = 0;
p->unk4B = 0;
p->unk4C = 0;
p->unk50 = 0;
p->unk54 = 0;
p->unk58 = 0;
p->unk5C = 0;
p->unk60 = 0;
p->unk64 = 0;
p->unk68 = 0;
p->unk6C = 0xC;
p->unk70 = 0;
p->unk74 = 0xC;
p->unk78 = 0;
p->unk7C = 0xC;
p->unk80 = 0;
p->unk84 = 0xC;
p->unk88 = 0;
p->unk8C = 0;
p->unk90 = 0x31C4;
p->unk94 = 0x31C4;
func_80029124(0x96, 1);
func_80029124(0xE5, 1);
func_80029124(0xE7, 1);
func_80029124(0xDE, 1);
func_80029124(0xEC, 1);
func_80029124(0xEF, 1);
func_80029124(0xE3, 1);
func_80029124(0xDF, 1);
func_80029124(0xF2, 1);
func_80029124(0xED, 1);
func_80029124(0x10B, 1);
func_80029124(0x16, 1);
func_80029124(0x1F, 1);
func_80029124(0x82, 1);
func_80029124(0x8A, 1);
func_80029124(0x8F, 1);
func_80029124(0x90, 1);
func_80029124(0x91, 1);
func_80029124(0x92, 1);
func_80029124(0x93, 1);
func_80029124(0x94, 1);
func_80029124(0x97, 1);
func_80029124(0x98, 1);
func_80029124(0xB5, 1);
func_800291A0(0xCD, 1);
func_80029124(0xF0, 1);
func_80029124(0x40, 1);
func_80029124(0x41, 1);
func_80029124(0x42, 1);
func_80029124(0x43, 1);
func_80029124(0x44, 1);
func_80029124(0x45, 1);
func_80029124(0x46, 1);
func_80029124(0x47, 1);
func_800291A0(0x3B, 5);
func_800291A0(0x3C, 3);
func_800291A0(0x3D, 3);
func_800291A0(0x3E, 3);
func_800291A0(0x3F, 3);
func_800291A0(0x40, 2);
func_800291A0(0x41, 2);
func_800291A0(0x42, 2);
func_800291A0(0x43, 3);
func_800291A0(0x44, 2);
func_800291A0(0x45, 2);
func_800291A0(0x46, 3);
func_800291A0(0x47, 3);
func_800291A0(0x48, 2);
func_800291A0(0x49, 2);
func_800291A0(0x4A, 0);
func_800291A0(0x4B, 0);
func_800291A0(0x4C, 0);
func_800291A0(0x4D, 0);
func_800291A0(0x4E, 0);
func_800291A0(0x4F, 0);
func_800291A0(0x50, 0);
func_800291A0(0x51, 2);
func_800291A0(0x52, 0);
func_800291A0(0x53, 0);
func_800291A0(0x54, 0);
func_800291A0(0x55, 0);
func_800291A0(0x56, 0);
func_800291A0(0x57, 2);
func_800291A0(0x58, 0);
func_800291A0(0x59, 0);
func_800291A0(0x5A, 0);
func_800291A0(0x5B, 0);
func_800291A0(0x5C, 0);
func_800291A0(0x5D, 0);
func_800291A0(0x5E, 0);
func_800291A0(0x5F, 2);
func_800291A0(0x60, 0);
func_800291A0(0x61, 0);
func_800291A0(0x62, 0);
func_800291A0(0x2E, 2);
func_800291A0(0x6A, (D_8010F4A6 | 0x80) & 0xFF);
func_800291A0(0x6B, (D_8010F4AE | 0x80) & 0xFF);
func_800291A0(0x6C, (D_8010F4B6 | 0x80) & 0xFF);
func_800291A0(0x6D, (D_8010F4BE | 0x80) & 0xFF);
func_800291A0(0x6E, (D_8010F4C6 | 0x80) & 0xFF);
func_800291A0(0x6F, (D_8010F59E | 0x80) & 0xFF);
func_800291A0(0x70, (D_8010F4CE | 0x80) & 0xFF);
D_800A6594 = D_8010F4A4;
D_800A6596 = D_8010F4AC;
D_800A6598 = D_8010F4B4;
D_800A659A = D_8010F4BC;
D_800A659C = D_8010F4C4;
D_800A65D2 = D_8010F59C;
D_800A659E = D_8010F4CC;
func_80029124(0x9E, 1);
}
#include "common.h"
src/ov_SC05_017/ov_SC05_017_jr_80188B1C.c
+415 -1
View File
@@ -3294,7 +3294,421 @@ s32 *func_80188F14(s32 *ot, void *a1p, s32 idx, void *a3p, s32 tag) {
}
INCLUDE_ASM("asm/ov_SC05_017/nonmatchings/ov_SC05_017_jr_80188B1C", func_80189240);
/* func_80189240 — ov_SC05_017 / ov_SC05_017_jr_80188B1C, 551 ins, jtbl_801EB810 (15 entries,
* minval 1). SYMBOL REMAP of the already-MATCHED structural twin
* src/ov_SC04_018/ov_SC04_018_jr_80188E1C.c:3577 func_80189540 (MATCH 551/551).
* Same jtbl arity, same case set {1,2,4,6},3,5,12,13,14,10,7,8,15,11 in the same SOURCE order.
* Overlay-local symbol map (twin -> here):
* D_801E7030->D_801ECE90 D_801E76FC->D_801ED55C D_801E77B8->D_801ED618
* D_801E76F4->D_801ED554 D_801E778C->D_801ED5EC D_801E96C8->D_801EF550
* D_801E7700->D_801ED560 D_801E3CEC->D_801E9B28 D_801E3E1C->D_801E9C58
* D_801E9664->D_801EF4EC D_801EC928->D_801F27B0 D_801E92E0->D_801EF168
* D_801E96A4->D_801EF52C D_801E7794->D_801ED5F4 D_801E7774->D_801ED5D4
* D_801B9420->D_801B93DC func_80186E24->func_80186B24
* func_80189E54->func_80189B54 func_80189E14->func_80189B14
* Every one checked against this target's own relocation lines (law 1): the compiled
* object's 159 relocations come out in the IDENTICAL ORDER to the target .s (law 1c —
* match_one masks relocs, so the symbols were diffed separately).
*
* SIGNATURE — the one thing that is NOT the twin's. The twin is `(s16 arg0, s16 arg1)`
* and its wave note says the host TU's `extern ... (s32 a0, s16 a1);` prototype "must become
* (s16, s16) or the TU dies with a HARD conflicting-types". Here that edit is NOT needed and
* NOT wanted: this TU's prototype (:2998) and the ALREADY-MATCHED call sites in
* src/ov_SC05_017/ov_SC05_017_jr_801875E8.c:3230/:3432 both spell it `(s32, s16)`, and
* narrowing the first parameter would re-extend the callers' arguments. Taking the switch
* index through a `short` LOCAL instead reproduces the target's HImode minval subtract
* (`addiu $a0,$a0,-1; sll 16; sra 16; sltiu 0xF`) with an s32 parameter — byte-verified
* MATCH 551/551 both ways, and byte-verified to compile under the existing prototype.
*/
/* ---- functions ---- */
extern void func_8002D4C8(s32 a0, s32 a1);
extern s32 func_800291B4(s32 arg);
extern void func_800291A0(s32, s32);
extern void func_80186B24(void);
extern s16 func_80189B54(s32 a0);
extern void *func_80189B14(s32 a0);
extern int func_800D0F8C(int a0);
extern s32 func_800D0EC4(void);
extern void func_800D0F0C(s32, s32);
extern int func_800D0FE0(int a0);
extern void func_800D128C(s32, s32);
extern void func_80029124(s32, s32);
extern void func_80029514(s32);
extern s32 func_8017ADE8(s32 a0);
extern void func_80139A44(s32, s32);
extern void func_80139A68(s32 a0, u16 a1);
/* ---- data ---- */
extern u16 D_8011511A;
extern s16 D_801ECE90;
extern s16 D_8011514E;
extern u8 *D_801ED55C;
extern s16 D_800A6586[];
extern u8 D_8011514C;
extern u8 D_801ED618[];
extern u8 *D_801ED554;
extern s16 D_8010EDEC; /* record +0x0, s16 (12-byte stride) */
extern s16 D_8010EDEE; /* record +0x2, s16 */
extern u8 D_8010EDF1; /* record +0x5, u8 */
extern u8 D_8010EDF2; /* record +0x6, u8 */
extern s16 D_80115126;
extern u8 D_80115148[];
extern s16 D_801ED5EC;
extern s32 D_801EF550;
extern s32 D_801ED560;
extern void (*D_801E9B28[])(void);
extern s8 D_801B93DC[];
extern s32 D_801E9C58[];
extern s32 D_801EF4EC;
extern u16 D_80115112;
extern s32 D_801F27B0;
extern s32 D_801EF168;
extern s16 D_801ED5F4;
extern s32 D_801EF52C;
#define REC_S16(base, idx) (*(s16 *)((u8 *)&(base) + (s32)(idx) * 0xC))
#define REC_U16(base, idx) (*(u16 *)((u8 *)&(base) + (s32)(idx) * 0xC))
#define REC_U8(base, idx) (*(u8 *)((u8 *)&(base) + (s32)(idx) * 0xC))
s32 func_80189240(s32 a0, s16 arg1)
{
/* frame knob: the target's frame is 0x38 (vars=16); ours is vars=8 without
* this 8-byte unreferenced local. Emits no code. */
s32 unused_[2];
/* HImode switch index: see the SIGNATURE note above. */
s16 arg0 = a0;
switch (arg0) {
case 1:
case 2:
case 4:
case 6:
if (arg1 == 2) {
return -1;
}
func_8002D4C8(0x46F, 0);
D_8011511A = arg1 + 1;
return 0;
case 3:
if (arg1 == 2) {
return -1;
}
D_8011511A = 2;
func_8002D4C8(0x46F, 0);
return 0;
case 5:
if (arg1 == 1) {
D_801ECE90 = 1;
func_8002D4C8(0x474, 0);
return -1;
}
if (arg1 == 3) {
return -1;
}
func_8002D4C8(0x46F, 0);
if (arg1 != 0) {
D_8011511A = arg1;
} else {
D_8011511A = 2;
}
return 0;
case 12:
D_8011511A = 3;
D_8011514E = 0;
func_8002D4C8(0x46F, 0);
return 0;
case 13:
{
register s32 f13 __asm__("$16");
register s32 i13 __asm__("$17");
register s32 c13 __asm__("$18");
register u8 *q __asm__("$5");
s16 d;
i13 = D_801ED55C[arg1];
c13 = i13 + 0x62;
f13 = ((u8 (*)(s32))func_800291B4)(c13);
if ((f13 & 0xF0) != 0x80) {
goto bad472;
}
if (func_80189B54(-D_800A6586[i13]) != 0) {
L801893C8:
func_80189B14(3);
goto bad472;
}
func_800291A0(c13, f13 | 0x40);
func_80186B24();
__asm__ __volatile__("" : "=r"(q) : "0"(&D_8011514C));
d = (s8)q[0] - (s8)q[-0xA];
if (d >= 6) {
q[-0xA] = q[0] - 5;
} else if (d < 0) {
q[-0xA] = q[0];
}
func_80189B14(1);
func_8002D4C8(0x5EE, 0);
return 0;
}
case 14:
{
register s32 f14 __asm__("$16");
s32 i14;
register s32 n14 __asm__("$17");
s32 t14;
s32 c14;
i14 = arg1;
t14 = D_801ED618[i14];
n14 = t14 + 1;
__asm__("" : "=r"(t14) : "0"(t14)); /* stales (plus t14 1) in cse; dead output -> deleted by flow */
c14 = n14 + 0x62;
f14 = ((u8 (*)(s32))func_800291B4)(c14);
if ((f14 & 0xF0) != 0xC0) {
goto bad472;
}
func_80189B54(D_800A6586[n14] * 9 / 10);
func_800291A0(c14, f14 & 0xBF);
func_80186B24();
D_801ED618[i14] = 0xFF;
func_80189B14(4);
func_8002D4C8(0x5EE, 0);
return 0;
}
case 10:
{
s32 b10 = D_801ED554[arg1];
s32 m10;
s32 w10;
__asm__ __volatile__("" : "=r"(m10) : "0"(b10));
if (m10 < 0x6F) {
register s16 slot __asm__("$16");
register s16 sraw __asm__("$2");
s16 val;
s16 x;
if (m10 == 0xA) {
if (func_800D0F8C(0xA) != 0) {
goto bad472;
}
}
sraw = ((s16 (*)(void))func_800D0EC4)();
slot = sraw;
if (sraw == 0) {
func_80189B14(2);
func_8002D4C8(0x45F, 0);
return 0;
}
x = D_801ED5EC;
if (x != 0) {
if (D_80115126 == 0) {
val = REC_S16(D_8010EDEC, b10) * (100 - x) / 100;
} else {
val = REC_U16(D_8010EDEC, b10) - x;
}
} else {
val = REC_U16(D_8010EDEC, b10);
}
if (func_80189B54(-val) != 0) {
func_80189B14(3);
func_8002D4C8(0x472, 3);
return 0;
}
func_8002D4C8(0x5EE, 0);
__asm__("addu %0,%1,$zero" : "=r"(w10) : "r"(b10));
func_800D0F0C(slot, w10);
if (w10 == 0xA) {
func_80186B24();
}
} else {
if (func_80189B54(-REC_S16(D_8010EDEC, m10)) != 0) {
goto L801893C8;
}
func_800D128C(b10, 0);
}
func_80189B14(1);
return 0;
}
case 7:
{
s32 c7;
s32 k7;
s32 a7;
L801896B0:
c7 = (s32)arg1 + 0x2F;
k7 = ((u8 (*)(s32))func_800291B4)(c7);
if (k7 == 0) {
goto bad472;
}
a7 = REC_S16(D_8010EDEE, k7);
if (a7 == 0 || D_80115126 != REC_U8(D_8010EDF2, k7)) {
func_80189B14(5);
goto bad472;
}
func_80189B54(a7);
((void (*)(s32))func_800D0FE0)(c7);
if (k7 == 0xA) {
func_80186B24();
}
func_80189B14(4);
func_8002D4C8(0x5EE, 0);
return 0;
}
case 8:
{
s32 k8;
register s32 f8 __asm__("$2");
register s32 g8 __asm__("$16");
register s32 t8 __asm__("$2");
register s32 cv __asm__("$2");
s32 p8;
register u16 *c __asm__("$3");
if ((*(u8 *)D_80115148) != 0) {
goto L801896B0;
}
k8 = ((u8 (*)(s32))func_800291B4)((s32)arg1 + 0x2F);
if (k8 == 0) {
goto bad472;
}
f8 = REC_S16(D_8010EDEC, k8);
if (f8 >= 0) {
D_801ED560 = (s32)&D_801EF550;
goto bad472;
}
__asm__ __volatile__("" : "=r"(g8) : "0"(f8));
t8 = g8 & 0x4000;
if (t8 != 0) {
p8 = ((s32 *)D_801E9B28)[k8];
} else {
p8 = D_801E9C58[(REC_U8(D_8010EDF1, k8) - 0x14) >> 1];
}
D_801ED560 = (s32)&D_801EF4EC;
func_80139A44(p8, 0);
c = &D_80115112;
cv = *c;
cv = cv + 1;
*c = cv;
return 0;
}
case 15:
{
register u16 f15 __asm__("$16");
register s32 t15 __asm__("$2");
s32 c15;
s32 k15;
s32 n15;
c15 = (s32)arg1 + 0x2F;
k15 = ((u8 (*)(s32))func_800291B4)(c15);
f15 = REC_U16(D_8010EDEC, k15);
n15 = REC_U8(D_8010EDF1, k15);
t15 = f15 & 0x4000;
if (t15 != 0) {
s32 m15;
__asm__ __volatile__("" : "=r"(m15) : "0"(n15));
func_80029124(m15, 1);
((void (*)(s32))func_800D0FE0)(c15);
D_801ECE90 = n15 - 0x1C;
if (m15 != 0x1F) {
return 0;
}
func_80029514(0x64);
func_80029124(0xEB, 1);
func_80029124(0x91, 1);
func_800291A0(0xCE, 1);
return 0;
}
func_800D0F0C(c15, n15);
return 0;
}
case 11:
{
typedef struct Rec {
s32 unk0;
s32 unk4;
s32 unk8;
void (*unkC)(void);
} Rec;
extern Rec *D_801ED5D4[];
Rec **pp;
Rec *r;
Rec **pp2;
register s32 dv __asm__("$2");
Rec **base;
Rec *r2;
s32 t;
s32 u;
if (D_80115126 == 4) {
if ((*(u8 *)D_80115148) == 0) {
s32 i11 = arg1;
if (D_801ED5D4[i11] != 0) {
goto bad472;
}
if (func_80189B54(D_801B93DC[i11]) != 0) {
goto L801893C8;
}
D_801ED560 = (s32)&D_801F27B0;
D_80115112 = D_80115112 + 1;
((void (*)(s32, s32))func_80139A68)((s16)(arg1 + 1), 0);
func_8002D4C8(0x5EE, 0);
return 0;
}
base = D_801ED5D4;
pp = &base[arg1];
r = *pp;
if (r == 0) {
goto bad472;
}
if (r->unk4 == 0) {
goto bad472;
}
D_801ED560 = r->unk4;
if (r->unkC != 0) {
r->unkC();
}
((void (*)(s32))func_8017ADE8)((*pp)->unk8);
goto tail45D;
}
base = D_801ED5D4;
pp2 = &base[arg1];
r2 = *pp2;
if (r2 == 0) {
goto bad472;
}
t = (*(Rec * volatile *)pp2)->unk8;
__asm__ __volatile__("");
D_801ED560 = r2->unk4;
((void (*)(s32))func_8017ADE8)(t);
u = D_801ED560;
D_801ED5F4 = 0;
if (u == (s32)&D_801EF168) {
D_801ED5F4 = 1;
}
if (u == (s32)&D_801EF52C) {
D_801ED5F4 = 2;
}
tail45D:
func_8002D4C8(0x45D, 0);
dv = D_80115112;
dv = dv + 1;
D_80115112 = dv;
return 0;
}
}
goto done;
bad472:
func_8002D4C8(0x472, 0);
done:
return 0;
}
extern s16 D_80115126;
extern s32 D_801B92A0[];