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https://github.com/Druthulu/BFM-decomp
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chore(decomp): commit in-tree banked work before the serial lane
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Drew T
@@ -3360,153 +3360,7 @@ void func_80182998(void) {
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}
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extern u16 D_801E4BBC;
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extern s16 D_80195B24[];
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extern u8 D_80195B2C[];
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extern void func_80186BB8(void *a0);
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extern void func_80186304();
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extern void func_801840E8(s32 a0);
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extern s32 func_8012BEE8(s32 a0);
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extern void func_801856E4(void);
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extern void func_8018415C(void *a0);
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extern void func_80182810(void *a0);
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extern void func_801828D8();
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extern void func_8012B23C(s32 a0);
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extern void func_8012AD44(s32 *a0, s16 a1);
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extern void func_80186F14(void *a0);
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extern void func_80186C0C(void *a0);
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// @class: plumbing
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// @stuck: none — MATCH (189/189, pin-free, zero asm). Sole residual is the §81
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// jr carve chain (operator step); see BANKING below.
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//
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/* func_80182A8C — ov_SC02_005_jr_80181D30, 189 ins, MATCH (match_one x14).
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*
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* §81 jr family: switch on *(u16*)(s0+0x34), bound sltiu $v0,$v1,6.
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* jtbl_801E2E58 = 6 entries [0]->0x80182AC8 [1]->0x80182B04 [2]->0x80182B50
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* [3]->0x80182B84 [4]->0x80182BA0 [5]->0x80182C84; default -> .L80182D6C.
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* Raw copy: asm/ov_SC02_005/data/tail20.data.s:9 (compiler jump table — not
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* named in C; the plain switch emits gcc's own table; splat dlabel name can
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* never appear in the draft reloc set — §81 FALSE POSITIVE, cf. func_8015B950
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* symcheck in ov_SC02_005_jr_8015AE2C.c:1531).
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*
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* BANKING — §53/§62/§81 3-step carve chain applies AT BANK TIME; each step
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* byte-gated on its own BEFORE building the next:
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* 1. tools/jr_isolate_all.py ov_SC02_005 --only func_80182A8C
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* make extract BINARY=ov_SC02_005 && make build BINARY=ov_SC02_005 -> byte-identical
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* 2. tools/jtbl_carve.py ov_SC02_005 --func func_80182A8C
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* make extract BINARY=ov_SC02_005 && make build BINARY=ov_SC02_005 -> byte-identical
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* 3. tools/harvest_verify.py --binary ov_SC02_005 --drafts <THIS WAVE'S OUTPUT> --chunk 1
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* then FULL R22 (config changed => T2).
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* NB do NOT harvest .run/backlog_drafts/ — docs/autopsy.md:64 shows this
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* card's stored backlog draft was a stale near-miss (IMM-OFFSET/-3,
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* close=1). After banking, re-run tools/autopsy.py collect so the record
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* upgrades structural/near -> MATCH/integration.
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* Sibling tables in the same tail20 object — jtbl_801E2E78 (:32,
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* func_80185060), jtbl_801E2ED0 (:89, func_80185E80), jtbl_801E2F68 (:210,
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* func_8018EA04) — belong to STILL-STUBBED functions: they stay raw and keep
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* assembling byte-correct from there; do NOT carve them now. No existing
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* carves in this subseg => step 2 cannot hit NON-CONTIGUOUS. Second jr here
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* later => §8b additive regenerate-from-config carve.
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*
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* Load-bearing spellings, do NOT "clean up":
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* - case 4 caches flags into local `a0` whose LAST USE precedes the call; the RMW
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* re-reads memory fresh. Collapsing to one call site w/ computed arg (ternary or
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* join var) re-joins the 0x80000 constant across the jal -> phantom $s1, frame 0x20.
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* - case-4 join is two plain stores; a named join local moves the li's to $v1.
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* - table compare reads the entry UNSIGNED: (*(u16 *)&D_80195B24[D_801E4BBC]<<16)>>17
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* (decl stays s16[]); signed spelling folds to one sra and loses an instruction.
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* - *(s16 *)(s0 + 0xAE) = -1 via s16 lvalue; u16 lvalue emits ori instead of addiu -1.
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*/
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void func_80182A8C(s32 s0) {
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u32 a0;
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switch (*(u16 *)(s0 + 0x34)) {
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case 0:
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if (*(s16 *)(s0 + 0x98) == 0) {
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func_80186BB8((void *)s0);
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*(u16 *)(s0 + 0x34) = 3;
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if (*(u32 *)(s0 + 0xE8) & 0x40000) {
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func_80186304((u8 *)s0, 0x16, 2);
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*(u16 *)(s0 + 0x34) = 2;
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}
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}
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break;
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case 1:
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if (*(s16 *)(s0 + 0x98) == 0) {
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func_80186BB8((void *)s0);
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*(u16 *)(s0 + 0x34) = 3;
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if (*(u32 *)(s0 + 0xE8) & 0x20000) {
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func_80186304((u8 *)s0, 0x18, 2);
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*(u16 *)(s0 + 0x34) = 2;
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}
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}
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break;
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case 2:
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if (*(s16 *)(s0 + 0x98) == 0) {
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func_80186BB8((void *)s0);
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*(u16 *)(s0 + 0x34) = 3;
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*(u32 *)(s0 + 0xE8) |= 0x80000;
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}
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break;
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case 3:
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func_801840E8(*(s32 *)(s0 + 0xD4));
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*(u32 *)(s0 + 0x1C) = 0;
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*(u16 *)(s0 + 0x34) = 4;
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break;
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case 4:
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if (func_8012BEE8(s0)) {
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if (D_801E4BBC == 0 && *(s16 *)(s0 + 0x76) == D_80195B24[0]) {
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func_801856E4();
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*(u32 *)(s0 + 0x1C) = 0x180;
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}
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}
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a0 = *(u32 *)(s0 + 0xE8);
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if ((a0 & 0x80000) == 0 &&
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*(s16 *)(s0 + 0x76) <= ((*(u16 *)&D_80195B24[D_801E4BBC] << 16) >> 17)) {
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if ((a0 & 0x20000) != 0) {
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func_80186304(s0, -0x15, 1);
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} else {
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func_80186304(s0, -0x17, 1);
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}
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*(u32 *)(s0 + 0xE8) = (*(u32 *)(s0 + 0xE8) & 0xFFF9FFFF) | 0x80000;
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func_8018415C(*(void **)(s0 + 0xD4));
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*(u16 *)(s0 + 0x34) = 5;
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}
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break;
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case 5:
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if (*(s16 *)(s0 + 0x98) == 0) {
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if (*(u32 *)(s0 + 0xE8) & 0x1000) {
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func_80182810((void *)s0);
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if (*(u32 *)(s0 + 0xE8) & 0x2000) {
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*(u32 *)(s0 + 0x1C) = 0x18;
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} else {
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*(u32 *)(s0 + 0x1C) = 0x30;
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}
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func_801828D8((void *)s0);
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*(u32 *)(s0 + 0xE8) &= ~0x80;
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*(s32 *)(s0 + 0x1C) = (s32)(s16)*(u16 *)(s0 + 0x104);
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} else {
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func_8012B23C(s0);
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*(u32 *)(s0 + 0xE8) |= 1;
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func_80186304((u8 *)s0, 0, 0);
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if (*(u32 *)(s0 + 0xE8) & 0x2000) {
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*(u32 *)(s0 + 0x1C) = 0x10;
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} else {
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*(u32 *)(s0 + 0x1C) = 0x20;
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}
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*(u32 *)(s0 + 0x58) = (s32)D_80195B2C | 0x40000000;
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*(u16 *)(s0 + 0x5C) = 0;
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*(s16 *)(s0 + 0xAE) = -1;
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func_8012AD44((s32 *)s0, 1);
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func_80186F14((void *)s0);
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}
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func_80186C0C((void *)s0);
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}
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break;
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}
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}
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INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_80181D30", func_80182A8C);
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INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_80181D30", func_80182D80);
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@@ -7808,7 +7808,32 @@ void func_80186568(s32 a0) {
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INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_801867C8);
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INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_80186874);
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extern s32 *D_80126B78;
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extern u8 D_801A5BE8[];
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extern u8 D_801152A8[];
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extern void func_8012F14C(s32 a0, s32 a1, s32 a2);
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extern s32 func_80135888(s32 a0, s32 a1, s32 a2, s32 a3);
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extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5);
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void func_80186874(s32 arg0, s32 arg1) {
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register s32 rv __asm__("$2");
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s32 buf1[2];
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s32 buf2[2];
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((void (*)(s32, s32, s32))func_8012F14C)((s32)D_80126B78 + 0x34, (s32)D_801A5BE8, (s32)buf1);
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((void (*)(s32, s32, s32))func_8012F14C)((s32)D_80126B78 + 0x34, (s32)(D_801A5BE8 + 8), (s32)buf2);
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if (func_80135888(*(s32 *)(arg0 + 0x20), *(s32 *)(arg0 + 0x58), (s32)buf1, (s32)buf2) != 0) {
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func_8012F568(1, (*(u16 *)(arg0 + 0x70) & 0xF) != 0 ? 0x2001 : 1,
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*(s16 *)(*(s32 *)(arg0 + 0x20) + 0x12), arg1,
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(s32)buf2, (s32)D_801152A8);
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rv = 1;
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} else {
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rv = 0;
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}
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__asm__ __volatile__("" : "=r"(rv) : "0"(rv));
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}
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extern s32 func_8012CC88(s32 a0, s32 a1, s32 a2);
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typedef struct {
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@@ -3277,7 +3277,30 @@ void func_80186028(s32 a0)
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}
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INCLUDE_ASM("asm/ov_SC03_102/nonmatchings/ov_SC03_102_jr_801855D0", func_801860B0);
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extern void func_80015978(s32 a0, s32 *a1);
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extern void func_8012EFB8(s32 a0);
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s32 func_801860B0(a0)
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s32 a0;
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{
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extern void func_8012EFB8(s32 a0);
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s32 sp10;
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s32 v1;
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func_80015978(a0 + 4, &sp10);
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if ((((s32 (*)(s32, s32))func_8012EFB8)((s32)&sp10, (s32)&sp10) & 0xFFFFEFFF) != 0) {
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v1 = 1;
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} else {
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v1 = (*(s16 *)&sp10 * 64) / 160 + 0x40;
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}
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if (v1 <= 0) {
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v1 = 1;
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} else if (v1 >= 0x80) {
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v1 = 0x7F;
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}
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return v1;
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}
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