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phase-36: S104 R39 pass banked 6 of 6 (778 classes, 32 s); e17 copies (5) banked; func_80188A30 parked (void → s32)

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This commit is contained in:
Drew T
2026-09-11 02:39:01 -06:00
parent 73fb6c4424
commit fc4aa4c11c
8 changed files with 189 additions and 182 deletions
Download Patch File Download Diff File Expand all files Collapse all files
.run/P36/delever/calibration.json
+170 -170
View File
@@ -1,5 +1,5 @@
{
"head": "242e2864c",
"head": "73fb6c442",
"stamp": "15956e4a96c4",
"generated": "2026-09-11 02:38",
"aliases": [
@@ -21,206 +21,206 @@
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"seconds": 2.1
.run/P36/delever/ledger.jsonl
+6
View File
File diff suppressed because one or more lines are too long
src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c
+2 -2
View File
@@ -4707,7 +4707,6 @@ void func_8017DF84(s32 arg0, s32 arg1, s32 arg2, s32 arg3)
gte_stsxy(&sxy[3]);
gte_ldv3c(&box[4]);
__asm__ volatile (""); /* §47 live-length slider (carried from the twin) */ // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
gte_rtpt();
gte_stsxy3(&sxy[4], &sxy[5], &sxy[6]);
gte_ldv0(&box[7]);
@@ -4811,11 +4810,12 @@ void func_8017DF84(s32 arg0, s32 arg1, s32 arg2, s32 arg3)
if (g.sz0 > g.sz1) {
za = g.sz0;
if (za < g.sz2) za = g.sz2;
g.opz = za;
} else {
za = g.sz1;
if (za < g.sz2) za = g.sz2;
g.opz = za;
}
g.opz = za;
if (code == 7) g.opz = za + 0x200;
tp = (u32 *)prim->w0;
((PolyFT3 *)pkt)->rgbc = tp[0] | 0x2000000;
src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.c
+2 -2
View File
@@ -3306,7 +3306,6 @@ void func_8017FA5C(s32 arg0, s32 arg1, s32 arg2)
gte_stsxy(&sxy[3]);
gte_ldv3c(&box[4]);
__asm__ volatile (""); /* §47 live-length slider: splits the &g.sz0/&g.sz1 254/254 tie */ // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus8)
gte_rtpt();
gte_stsxy3(&sxy[4], &sxy[5], &sxy[6]);
gte_ldv0(&box[7]);
@@ -3409,11 +3408,12 @@ void func_8017FA5C(s32 arg0, s32 arg1, s32 arg2)
if (g.sz0 > g.sz1) {
za = g.sz0;
if (za < g.sz2) za = g.sz2;
g.opz = za;
} else {
za = g.sz1;
if (za < g.sz2) za = g.sz2;
g.opz = za;
}
g.opz = za;
if (code == 7) g.opz = za + 0x200;
tp = (u32 *)prim->w0;
((PolyFT3 *)pkt)->rgbc = tp[0];
src/ov_SC03_111/ov_SC03_111_jr_8017EC58.c
+2 -2
View File
@@ -3170,7 +3170,6 @@ void func_8017FB38(s32 arg0, s32 arg1, s32 arg2, s32 arg3)
gte_stsxy(&sxy[3]);
gte_ldv3c(&box[4]);
__asm__ volatile (""); /* §47 live-length slider (carried from the twin) */ // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus8)
gte_rtpt();
gte_stsxy3(&sxy[4], &sxy[5], &sxy[6]);
gte_ldv0(&box[7]);
@@ -3274,11 +3273,12 @@ void func_8017FB38(s32 arg0, s32 arg1, s32 arg2, s32 arg3)
if (g.sz0 > g.sz1) {
za = g.sz0;
if (za < g.sz2) za = g.sz2;
g.opz = za;
} else {
za = g.sz1;
if (za < g.sz2) za = g.sz2;
g.opz = za;
}
g.opz = za;
if (code == 7) g.opz = za + 0x200;
tp = (u32 *)prim->w0;
((PolyFT3 *)pkt)->rgbc = tp[0] | 0x2000000;
src/ov_SC03_117/ov_SC03_117_jr_8017BEBC.c
+2 -2
View File
@@ -4091,11 +4091,11 @@ void func_8017E498(s32 a0) {
/* LOAD-BEARING (§5a cross-jump barrier, zero bytes): without it
jump2 tail-merges the two identical [set $a0][jal] arms into one
shared call site and the function comes out 2 instructions short. */
__asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus8)
*(u16 *)(a0 + 0x34) += 1;
} else {
func_80178B18(a0, (s32)D_8018866C);
*(u16 *)(a0 + 0x34) += 1;
}
*(u16 *)(a0 + 0x34) += 1;
}
}
break;
src/ov_SC03_118/ov_SC03_118_jr_8017FB84.c
+2 -2
View File
@@ -3192,7 +3192,6 @@ void func_80180A64(s32 arg0, s32 arg1, s32 arg2, s32 arg3)
gte_stsxy(&sxy[3]);
gte_ldv3c(&box[4]);
__asm__ volatile (""); /* §47 live-length slider (carried from the twin) */ // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus8)
gte_rtpt();
gte_stsxy3(&sxy[4], &sxy[5], &sxy[6]);
gte_ldv0(&box[7]);
@@ -3296,11 +3295,12 @@ void func_80180A64(s32 arg0, s32 arg1, s32 arg2, s32 arg3)
if (g.sz0 > g.sz1) {
za = g.sz0;
if (za < g.sz2) za = g.sz2;
g.opz = za;
} else {
za = g.sz1;
if (za < g.sz2) za = g.sz2;
g.opz = za;
}
g.opz = za;
if (code == 7) g.opz = za + 0x200;
tp = (u32 *)prim->w0;
((PolyFT3 *)pkt)->rgbc = tp[0] | 0x2000000;
src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c
+3 -2
View File
@@ -4783,18 +4783,19 @@ void func_8017EDE8(void *a0)
* lever is not in the source order, so the pointer is pinned.
* The range is lw..sw inside this block and crosses no call, so
* the §74 caller-saved hazard does not apply. */
register s32 *p __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
s32 *p;
p = *(s32 **)((s32)a0 + 0xCC);
*(s32 *)((s32)p + 0xB0) = 2;
}
func_801845FC((s32)a0, (s32)&D_801B95B0, 0, 0x60);
*(u16 *)((s32)a0 + 0x34) = 1;
} else {
if (func_801846CC((s32)a0) == 0) {
return;
}
func_801845FC((s32)a0, (s32)&D_801B95B0, 0, 0x60);
*(u16 *)((s32)a0 + 0x34) = 1;
}
*(u16 *)((s32)a0 + 0x34) = 1;
break;
case 1:
if (func_801846CC((s32)a0) != 0) {