chore(decomp): commit in-tree banked work before the serial lane

This commit is contained in:
Drew T
2026-08-25 21:32:51 -06:00
parent b3ea50b1d5
commit fcadfda814
10 changed files with 336 additions and 35 deletions
+130 -1
View File
@@ -279,7 +279,136 @@ void func_800CB7FC(s32 a0) {
}
INCLUDE_ASM("asm/md_MAIN_027/nonmatchings/md_MAIN_027", func_800CB82C);
extern void func_80015978(s32, s32 *);
extern s32 func_8012EF34(s32, s32);
extern s32 func_80017DC4(void *, void *);
extern void func_800CBA44();
extern void func_800CBBF8();
extern s32 func_80047948(s32);
extern u8 D_800CC290[];
extern u8 D_800CC190[];
extern u8 D_800CC1C0[];
extern u8 D_800CC1B0[];
extern u8 D_800CC1A0[];
typedef struct { u32 a, b; } __attribute__((packed, aligned(1))) Blk8;
struct Mid { u32 gray[4]; u32 code; u8 bmode; };
typedef struct {
u8 mat[0x14];
u32 zz[3] __attribute__((aligned(4)));
} __attribute__((packed)) MZ;
typedef struct {
u16 hB0;
u16 hB2;
u32 hpad;
} HB;
#define gte_SetRotMatrix(r0) __asm__ volatile ( \
"lw $12, 0( %0 );" \
"lw $13, 4( %0 );" \
"ctc2 $12, $0;" \
"ctc2 $13, $1;" \
"lw $12, 8( %0 );" \
"lw $13, 12( %0 );" \
"lw $14, 16( %0 );" \
"ctc2 $12, $2;" \
"ctc2 $13, $3;" \
"ctc2 $14, $4" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14", "memory" )
#define gte_SetTransMatrix(r0) __asm__ volatile ( \
"lw $12, 20( %0 );" \
"lw $13, 24( %0 );" \
"ctc2 $12, $5;" \
"lw $14, 28( %0 );" \
"ctc2 $13, $6;" \
"ctc2 $14, $7" \
: \
: "r"( r0 ) \
: "$12", "$13", "$14", "memory" )
void func_800CB82C(s32 a0, s32 a1)
{
u8 lo[0x30];
volatile struct Mid mid;
u8 src[8];
u8 dstc[8];
u8 out1[0x20];
MZ mz;
HB hb;
volatile u8 fpad[8];
register s32 g8 __asm__("$8");
register s32 c1 __asm__("$3");
s32 *p;
s32 *plo;
s32 *p6;
s32 s5v;
s32 chk;
s32 w;
s32 bm;
s32 cn;
plo = (s32 *)lo;
p = *(s32 **)((s8 *)a0 + 0x20);
func_80015978((s32)((s8 *)a0 + 4), (s32 *)src);
chk = func_8012EF34((s32)src, (s32)D_800CC290);
if ((chk & ~0x1000) == 0) {
*(Blk8 *)dstc = *(Blk8 *)D_800CC290;
s5v = *(u16 *)((s8 *)a1 + 0x16) + 3;
func_80017DC4((void *)((s8 *)p + 0x18), (void *)mz.mat);
p = (s32 *)dstc;
mz.zz[2] = 0;
mz.zz[1] = 0;
mz.zz[0] = 0;
gte_SetRotMatrix(mz.mat);
gte_SetTransMatrix(mz.mat);
p6 = (s32 *)D_800CC1C0;
w = *(u16 *)(dstc + 4);
*(u16 *)(out1 + 0x1C) = w;
*(u16 *)(out1 + 0x14) = w;
*(u16 *)(out1 + 0xC) = w;
*(u16 *)(out1 + 4) = w;
bm = *(u16 *)((s8 *)a1 + 0x14);
mid.code = 0x50000000;
mid.bmode = bm;
c1 = *(s16 *)((s8 *)a0 + 0x60);
g8 = 0x808080;
mid.gray[0] = g8;
mid.gray[1] = g8;
mid.gray[2] = g8;
mid.gray[3] = g8;
cn = (c1 + 1) & 3;
c1 <<= 2;
*(u16 *)((s8 *)a0 + 0x60) = cn;
cn = (s32)D_800CC1B0;
c1 += cn;
if (((s32 (*)(s32, s32, s32, s32, s32 *, s32))func_800CBA44)((s32)out1, (s32)D_800CC190, (s32)a1, (s32)p6,
plo, c1) != 0) {
return;
}
*(u16 *)((s8 *)lo + 4) = s5v;
func_800CBBF8(plo, p);
a1 = (void *)((s8 *)a1 + 0x18);
hb.hB0 = func_80047948((*(s16 *)((s8 *)a0 + 0x62)) << 8) / 1024;
*(u16 *)((s8 *)a0 + 0x62) = (*(u16 *)((s8 *)a0 + 0x62) + 1) & 0xF;
hb.hB2 = 0;
if (((s32 (*)(s32, s32, s32, s32, s32 *, s32))func_800CBA44)((s32)out1, (s32)D_800CC1A0, (s32)a1, (s32)&hb.hB0,
plo, (s32)p6) != 0) {
return;
}
func_800CBBF8(plo, p);
}
}
void func_800CBA44()
{
+15 -1
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@@ -295,7 +295,21 @@ void func_801E2D1C(void *a0) {
}
INCLUDE_ASM("asm/md_SC03_133/nonmatchings/md_SC03_133", func_801E2D58);
void func_801E2D58(void) {
extern u8 D_80078EB1;
extern s32 D_801E256C;
extern s32 D_801E906C;
extern s32 D_801E3290[];
extern s32 D_801E32C0[];
D_801E906C = 0;
if (D_80078EB1 >= 0x12) {
*(s32 *)(D_801E256C + 4) = (s32)D_801E32C0;
} else {
*(s32 *)(D_801E256C + 4) = (s32)D_801E3290;
}
}
+1 -26
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@@ -5300,32 +5300,7 @@ void func_80185A04(s32 param_1, s32 param_2, s16 param_3) {
}
extern u16 D_801E4BBC;
extern s16 D_80195B24[];
s16 func_80185A88(int param_1, int param_2) {
register s32 zr __asm__("$0");
int t;
int x;
int m;
int h;
int d;
t = (u16)*(u16 *)(param_1 + 0x76) - (u16)*(u16 *)(param_1 + 0x60);
x = t - param_2;
d = t + zr;
m = x + zr;
if (D_801E4BBC == 2) {
if (*(u32 *)(param_1 + 0xE8) & 0x800) goto RET;
if ((s16)x < 0x80) m = 0x80;
} else {
if (*(u32 *)(param_1 + 0xE8) & 0x80000) goto RET;
h = (s16)D_80195B24[D_801E4BBC] >> 1;
if ((s16)x < h) m = h;
}
RET:
return d - m;
}
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_80181D30", func_80185A88);
INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_80181D30", func_80185B38);
+7 -1
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@@ -3836,7 +3836,13 @@ void func_80174354(void) {
DEFINE_func_8017435C() /* dedup: shared engine-core @0x8017435c (src/shared) */
INCLUDE_ASM("asm/ov_SC02_037/nonmatchings/ov_SC02_037_jr_80171B4C", func_80174384);
extern void (*D_80187258[])(void);
s32 func_80174384(void* a0)
{
D_80187258[*(u8 *)((s32)a0 + 0x214)]();
}
DEFINE_func_801743C0() /* dedup: shared engine-core @0x801743c0 (src/shared) */
+7 -1
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@@ -3795,7 +3795,13 @@ void func_80174430(void) {
DEFINE_func_80174438() /* dedup: shared engine-core @0x80174438 (src/shared) */
INCLUDE_ASM("asm/ov_SC03_107/nonmatchings/ov_SC03_107_jr_80171B4C", func_80174474);
extern void (*D_80185B00[])(void);
s32 func_80174474(void* a0)
{
D_80185B00[*(u8 *)((s32)a0 + 0x214)]();
}
DEFINE_func_801744B0() /* dedup: shared engine-core @0x801744b0 (src/shared) */
+15 -1
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@@ -4360,7 +4360,21 @@ void func_8017E8D0(s32 a0)
INCLUDE_ASM("asm/ov_SC03_115/nonmatchings/ov_SC03_115_jr_8017BEBC", func_8017E998);
INCLUDE_ASM("asm/ov_SC03_115/nonmatchings/ov_SC03_115_jr_8017BEBC", func_8017EA70);
extern s32 func_8012D5E4(s32 a0, s32 a1, s32 a2, s32 a3);
extern char D_8018ABB0;
s32 aF8017EA70(s32 arg0) __asm__("func_8017EA70");
s32 aF8017EA70(s32 arg0) {
if (*(s32 *)(arg0 + 0xDC) & 1) {
return 0;
}
if (func_8012D5E4(arg0, (s32)&D_8018ABB0, (s32)&D_8018ABB0 + 8, 0x13) != 1) {
return 0;
}
*(s32 *)(arg0 + 0xDC) |= 1;
return 1;
}
typedef struct {
s32 a;
+12 -1
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@@ -6065,7 +6065,18 @@ s32 impl_801833D4(s32 a0, s32 a1)
}
INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80183564);
void func_80183564(s32 a0, s16 *a1)
{
extern s32 func_80183A28(u8 *a0);
extern void func_801835B0(s32 a0);
*(u16 *)(a0 + 0xE4) = *(u16 *)(a1 + 0);
*(u16 *)(a0 + 0xE6) = *(u16 *)(a1 + 1);
*(u16 *)(a0 + 0xE8) = *(u16 *)(a1 + 2);
func_80183A28((u8 *)a0);
func_801835B0(a0);
}
INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_801835B0);
+67 -1
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@@ -3495,7 +3495,73 @@ void func_8018CD04(s32 param_1) {
}
INCLUDE_ASM("asm/ov_SC05_017/nonmatchings/ov_SC05_017_jr_8018C694", func_8018CDB0);
extern void func_80029124(s32 a0, s32 a1);
extern s32 func_800291B4(s32 arg);
extern s32 func_800D0FE0(s32 a0);
extern void func_800D0F0C(s32 a0, s32 a1);
extern s16 D_8010EDEC;
extern u8 D_8010EDF1;
extern s32 D_801E9B9C;
extern s32 D_801E9BB0;
extern s32 D_801E9CE0;
extern s16 D_801ED838;
void func_8018CDB0(void) {
s16 *p;
s32 *q;
s32 *r;
s16 i;
p = &D_801ED838;
p[0] = 0;
i = 0;
q = (s32 *)(p + 4);
r = (s32 *)(p + 2);
for (; i < 0xC; i++) {
s32 slot = i + 0x2F;
s32 ret;
register s32 tmp __asm__("$2");
register s32 t __asm__("$5");
register s32 rb __asm__("$6");
s16 flags;
s32 m;
ret = func_800291B4(slot) & 0xFF;
if (ret == 0) {
continue;
}
tmp = (ret << 1) + ret;
t = tmp << 2;
flags = *(s16 *)((u8 *)&D_8010EDEC + t);
if (flags < 0) {
rb = *(u8 *)((u8 *)&D_8010EDF1 + t);
m = rb & 0xFF;
if (flags & 0x4000) {
q[0] = (&D_801E9B9C)[ret];
q[1] = (&D_801E9BB0)[ret];
func_80029124(m, 1);
func_800D0FE0(slot);
((s16 *)q)[-4] = 2;
return;
} else {
register s32 sc __asm__("$4");
register s32 d __asm__("$2");
sc = slot;
__asm__("" : "=r"(sc) : "0"(sc));
d = rb - 0x14;
__asm__("" : "=r"(d) : "0"(d));
*(s32 *)r = (&D_801E9CE0)[d >> 1];
((void (*)(s32))func_800D0F0C)(sc);
((s16 *)r)[-2] = 1;
return;
}
}
}
}
+76 -1
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@@ -4341,7 +4341,82 @@ void func_8017F3D4(s32 arg0, s32 arg1) {
INCLUDE_ASM("asm/ov_SC07_006/nonmatchings/ov_SC07_006_jr_8017BEBC", func_8017F5D4);
INCLUDE_ASM("asm/ov_SC07_006/nonmatchings/ov_SC07_006_jr_8017BEBC", func_8017F9AC);
#ifndef BFM_ENGINE_TYPES_H
/* ---- PROBE BRANCH (standalone cc1 only): engine_types.h not in scope here, so
* provide the shared types + helper under their real names. Inside the real
* TU the guard is already defined (engine_core.h -> engine_types.h:1-2),
* this branch vanishes, and the TU's own definitions serve
* (engine_types.h:998/:2669-2675, morph_lerp :4227) -- no redefinition. ---- */
static inline void morph_lerp(Morph_8017DC1C *o, SVECTOR2 *b, SVECTOR2 *a, s32 t)
{
SVECTOR2 *d;
SVECTOR2 *pa;
SVECTOR2 *pb;
s32 i;
if (o->mode == 1) {
d = (SVECTOR2 *)o->dst;
} else {
d = (SVECTOR2 *)((u32 *)&o->dst + (o->dst >> 2));
}
i = o->n;
pb = b;
pa = a;
for (; i != 0; i--) {
d->vx = pb->vx + (((pa->vx - pb->vx) * t) >> 12);
d->vy = pb->vy + (((pa->vy - pb->vy) * t) >> 12);
d->vz = pb->vz + (((pa->vz - pb->vz) * t) >> 12);
d++;
pb++;
pa++;
}
}
#endif /* BFM_ENGINE_TYPES_H */
/* Body follows the banked structural twin func_80181924 (this TU, src:4633):
* ALL externs at BLOCK scope (cookbook §103 -- a file-scope extern here would
* constrain every later function in the TU), shared type names, split blend
* statements. b/a pairing CALIBRATED against the twin's own banked C + asm
* (asm/ov_SC07_006/nonmatchings/ov_SC07_006_jr_8017BEBC/func_80181924.s):
* banked C morph_lerp(D_801BF5B4, D_801C1E80, D_801C1E90, t) assembles
* E80->$a3 / E90->$a2, and morph_lerp(D_801BF5B8, D_801C1E84, D_801C1E94, x)
* assembles E84->$a2 / E94->$a1 -- i.e. the FIRST-listed pointer (b) always
* occupies the HIGHER-numbered arg register of the pair, the second (a) the
* lower, whichever physical registers are free. This target loads the
* E40-family into $a2 and the E50-family into $a1 (blk1 :11-18; blk2 E44/E54
* :88-92; blk3 E48/E58 :162-166; blk4 cse-folded E4C :227-232), so b =
* E40-family, a = E50-family -- the same pairing as the matched siblings
* func_8017DC1C (src:4292-94) and the twin. */
void func_8017F9AC(s32 t, void *a1)
{
s32 x;
extern s32 func_8004787C(s32 a0);
extern SVECTOR2 *D_801C1E40;
extern SVECTOR2 *D_801C1E44;
extern SVECTOR2 *D_801C1E48;
extern SVECTOR2 *D_801C1E4C;
extern SVECTOR2 *D_801C1E50;
extern SVECTOR2 *D_801C1E54;
extern SVECTOR2 *D_801C1E58;
extern Morph_8017DC1C *D_801BF508;
extern Morph_8017DC1C *D_801BF50C;
extern Morph_8017DC1C *D_801BF510;
extern Morph_8017DC1C *D_801BF514;
morph_lerp(D_801BF508, D_801C1E40, D_801C1E50, t);
x = func_8004787C(*(s16 *)((u8 *)a1 + 0xFC));
x += func_8004787C(*(s16 *)((u8 *)a1 + 0xFE) + 0x100) >> 4;
morph_lerp(D_801BF50C, D_801C1E44, D_801C1E54, x);
x = func_8004787C(*(s16 *)((u8 *)a1 + 0xFC));
x += func_8004787C(*(s16 *)((u8 *)a1 + 0xFE) + 0x200) >> 4;
morph_lerp(D_801BF510, D_801C1E48, D_801C1E58, x);
morph_lerp(D_801BF514, D_801C1E4C, D_801C1E4C, t);
}
#include "common.h"
+6 -1
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@@ -4575,7 +4575,12 @@ void func_8017E56C(void) {
}
INCLUDE_ASM("asm/ov_SC07_011/nonmatchings/ov_SC07_011_jr_8017BEBC", func_8017E5C4);
extern s32 func_80146994(s32 a0, s32 a1, s32 a2, s32 a3);
void func_8017E5C4(s32 arg) {
func_80146994(0x28, 0, arg, 0);
}
extern s32 func_8014C050(s32 a0, s32 a1);