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phase-36: S104 e9 packs (ov_SC02_017 batch 3)

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This commit is contained in:
Drew T
2026-09-11 01:14:46 -06:00
parent 2c9ec80230
commit fd8fc7363b
35 changed files with 1538 additions and 48 deletions
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.run/P36/agents/ORDER.tsv
+5 -4
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@@ -1,5 +1,6 @@
rank fn alias copies best needed kinds regs tu
83 func_801A5094 md_SC07_004 1 4 1 barrier src/md_SC07_004/md_SC07_004.c
55 func_801A3B18 md_SC07_004 1 6 1 pin $0 src/md_SC07_004/md_SC07_004.c
227 func_801AB54C md_SC07_004 1 6 1 pin $0 src/md_SC07_004/md_SC07_004.c
231 func_801AB78C md_SC07_004 1 7 1 pin $3 src/md_SC07_004/md_SC07_004.c
40 func_8017FCFC ov_SC02_017 1 2 3 launder,pin $0,$3 src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
117 func_80182FD0 ov_SC02_017 1 2 3 cast,keepalive src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
33 func_8017F768 ov_SC02_017 1 13 2 pin $17,$4 src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
92 func_8018209C ov_SC02_017 1 29 2 keepalive,pin $7 src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
47 func_8017FCFC ov_SC06_024 1 40 2 pin $2,$5 src/ov_SC06_024/ov_SC06_024_jr_8017BEBC.c
1 rank fn alias copies best needed kinds regs tu
2 83 40 func_801A5094 func_8017FCFC md_SC07_004 ov_SC02_017 1 4 2 1 3 barrier launder,pin $0,$3 src/md_SC07_004/md_SC07_004.c src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
3 55 117 func_801A3B18 func_80182FD0 md_SC07_004 ov_SC02_017 1 6 2 1 3 pin cast,keepalive $0 src/md_SC07_004/md_SC07_004.c src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
4 227 33 func_801AB54C func_8017F768 md_SC07_004 ov_SC02_017 1 6 13 1 2 pin $0 $17,$4 src/md_SC07_004/md_SC07_004.c src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
5 231 92 func_801AB78C func_8018209C md_SC07_004 ov_SC02_017 1 7 29 1 2 pin keepalive,pin $3 $7 src/md_SC07_004/md_SC07_004.c src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
6 47 func_8017FCFC ov_SC06_024 1 40 2 pin $2,$5 src/ov_SC06_024/ov_SC06_024_jr_8017BEBC.c
.run/P36/agents/ov_SC02_017__func_8017F768/body_free.c
+72
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@@ -0,0 +1,72 @@
void func_8017F768(s32 a0) {
s32 s0 = a0;
/* $s1 pin: without it the distance/angle pair allocates swapped ($s1<->$s2)
AND `s1 = 0x800` floats out of the beqz delay slot. */
s32 s1;
/* NOT pinned: pinning $s2 makes local_alloc suggest the dying $18 for the
`s2 >= 0x801` compare result, emitting `slti $s2,...` instead of the
target's `slti $v0,$s2,0x801`. */
s32 s2;
/* $a0 pin: the target computes `andi $a0,$v0,0xFFF` then `addu $s1,$a0,$zero`
and reuses the live $a0 as func_801898A4's first argument (no `move $a0,$s1`
at the call). Coalescing kills that copy unless the value is born in $a0. */
s32 angle;
s32 ret;
s16 pt[4];
if (func_80148800((s32 *)&D_80126B58) & 3) {
u8 t = (*(u8 *)(s0 + 5) + 1) & 1;
*(u8 *)(s0 + 5) = t;
*(s32 *)(s0 + 0x14) = D_8018E1E0[t];
}
pt[0] = D_80126940[0];
pt[1] = 0;
pt[2] = D_80126940[2];
s2 = (s16)func_80013294((void *)&D_8018E1D0, (void *)pt);
s1 = 0x800;
if (s2 < 0x200) {
*(s16 *)(s0 + 0x20) = 0x71;
*(s16 *)(s0 + 0x22) = 0;
*(s16 *)(s0 + 0x24) = 0;
*(s16 *)(s0 + 0x2E) = 0;
*(s16 *)(s0 + 0x30) = -0xC0;
*(s16 *)(s0 + 0x32) = 0;
} else {
*(s16 *)(s0 + 0x22) = 0;
angle = ratan2((s32)D_80126940[0] << 16, (s32)D_80126940[2] << 16) & 0xFFF;
s1 = angle;
*(s16 *)(s0 + 0x20) = 0x1C7;
*(s16 *)(s0 + 0x30) = -0x10;
*(s16 *)(s0 + 0x22) = 0;
*(s16 *)(s0 + 0x24) = 0;
*(s16 *)(s0 + 0x2E) = 0;
/* +0x32 is stored ONCE PER ARM and, in this arm, ABOVE the inner if
(§194-M: it lands in the bnez delay slot, so it dominates the branch
and is NOT executed on the s2 >= 0x801 path). Writing it once after
the outer if/else is what cross_jump then folds to 112 instructions. */
*(s16 *)(s0 + 0x32) = 0;
if (s2 >= 0x801) {
u16 tmp[4];
tmp[0] = 0;
tmp[1] = D_80126942;
tmp[2] = 0x800;
func_801898A4(angle, tmp, tmp);
D_80126940[0] = (s16)tmp[0] >> 3;
D_80126942 = (s16)tmp[1] >> 3;
D_80126940[2] = (s16)tmp[2] >> 3;
}
}
D_801274EA = (s16)s1;
ret = func_80012DBC((s32)D_801EF9F0, s1, 0x14, 1);
D_801EF9F0 = (s16)ret;
func_8017F92C(s0, (s16)ret, D_80126940);
}
.run/P36/agents/ov_SC02_017__func_8017F768/body_tree.c
+72
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@@ -0,0 +1,72 @@
void func_8017F768(s32 a0) {
s32 s0 = a0;
/* $s1 pin: without it the distance/angle pair allocates swapped ($s1<->$s2)
AND `s1 = 0x800` floats out of the beqz delay slot. */
register s32 s1 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus8)
/* NOT pinned: pinning $s2 makes local_alloc suggest the dying $18 for the
`s2 >= 0x801` compare result, emitting `slti $s2,...` instead of the
target's `slti $v0,$s2,0x801`. */
s32 s2;
/* $a0 pin: the target computes `andi $a0,$v0,0xFFF` then `addu $s1,$a0,$zero`
and reuses the live $a0 as func_801898A4's first argument (no `move $a0,$s1`
at the call). Coalescing kills that copy unless the value is born in $a0. */
register s32 angle __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus8)
s32 ret;
s16 pt[4];
if (func_80148800((s32 *)&D_80126B58) & 3) {
u8 t = (*(u8 *)(s0 + 5) + 1) & 1;
*(u8 *)(s0 + 5) = t;
*(s32 *)(s0 + 0x14) = D_8018E1E0[t];
}
pt[0] = D_80126940[0];
pt[1] = 0;
pt[2] = D_80126940[2];
s2 = (s16)func_80013294((void *)&D_8018E1D0, (void *)pt);
s1 = 0x800;
if (s2 < 0x200) {
*(s16 *)(s0 + 0x20) = 0x71;
*(s16 *)(s0 + 0x22) = 0;
*(s16 *)(s0 + 0x24) = 0;
*(s16 *)(s0 + 0x2E) = 0;
*(s16 *)(s0 + 0x30) = -0xC0;
*(s16 *)(s0 + 0x32) = 0;
} else {
*(s16 *)(s0 + 0x22) = 0;
angle = ratan2((s32)D_80126940[0] << 16, (s32)D_80126940[2] << 16) & 0xFFF;
s1 = angle;
*(s16 *)(s0 + 0x20) = 0x1C7;
*(s16 *)(s0 + 0x30) = -0x10;
*(s16 *)(s0 + 0x22) = 0;
*(s16 *)(s0 + 0x24) = 0;
*(s16 *)(s0 + 0x2E) = 0;
/* +0x32 is stored ONCE PER ARM and, in this arm, ABOVE the inner if
(§194-M: it lands in the bnez delay slot, so it dominates the branch
and is NOT executed on the s2 >= 0x801 path). Writing it once after
the outer if/else is what cross_jump then folds to 112 instructions. */
*(s16 *)(s0 + 0x32) = 0;
if (s2 >= 0x801) {
u16 tmp[4];
tmp[0] = 0;
tmp[1] = D_80126942;
tmp[2] = 0x800;
func_801898A4(angle, tmp, tmp);
D_80126940[0] = (s16)tmp[0] >> 3;
D_80126942 = (s16)tmp[1] >> 3;
D_80126940[2] = (s16)tmp[2] >> 3;
}
}
D_801274EA = (s16)s1;
ret = func_80012DBC((s32)D_801EF9F0, s1, 0x14, 1);
D_801EF9F0 = (s16)ret;
func_8017F92C(s0, (s16)ret, D_80126940);
}
.run/P36/agents/ov_SC02_017__func_8017F768/history.txt
+14
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@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 13 best 13 compiles 184 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R18 bystander @3552->3554 -> 13 [COUNT] (from 13)
R7 block @3585 -> 13 [COUNT] (from 13)
R17 const-split @3556->3559 (0x71 into the 0 run) -> 13 [COUNT] (from 13)
R9 swap-stmts @3582 -> 13 [COUNT] (from 13)
R2 decl-order 1,0 -> 13 [COUNT] (from 13)
R18 bystander @3554->3548 -> 13 [COUNT] (from 13)
R9 swap-stmts @3549 -> 13 [COUNT] (from 13)
R8 hoist tmp0 @3565 -> 13 [COUNT] (from 13)
R18 bystander @3554->3549 -> 13 [COUNT] (from 13)
R7 block @3582 -> 13 [COUNT] (from 13)
R18 bystander @3554->3550 -> 13 [COUNT] (from 13)
R8 hoist tmp0 @3587 -> 13 [COUNT] (from 13)
.run/P36/agents/ov_SC02_017__func_8017F768/neighbours.txt
+15
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@@ -0,0 +1,15 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: straight-derive
// @stuck: none — MATCH (52 ins) on iteration 1, confirmed by rtu_match.
// @class: structural (STRENGTH/mflo!=lw -> MATCH)
// @stuck: none - MATCH (41 ins), match_one + rtu_match.
// @class: regalloc (WIDTH/li!=addu -> MATCH)
// @stuck: none — MATCH (58 ins), match_one + rtu_match. PIN-FREE (no register __asm__).
// @class: plumbing
// @stuck: none — MATCH (52 ins), iteration 1. Keys: (1) §3-T4 — Ghidra inverted the arms; the
.run/P36/agents/ov_SC02_017__func_8017F768/related.txt
+190
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@@ -0,0 +1,190 @@
=== lever-free bodies in ov_SC02_017 sharing a callee or global with func_8017F768 (76 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_8012A328 (src/shared/ov/func_8012A328.h:4) shares 3: D_80126940 D_80126942 D_80126B58 ---
void func_8012A328(void)
{
extern s8 D_801152C0;
extern s16 D_801152C2;
extern s16 D_80126940;
extern s16 D_80126942;
extern s16 D_80126944;
extern s32 D_80126B58;
extern s16 D_80127080;
extern s16 D_80126CAE;
Obj_80126B58 *p = (Obj_80126B58 *)&D_80126B58;
s16 *q;
s32 a, b;
if (*(u8 *)&D_801152C0 != 0) {
a = D_80127080; b = D_80126CAE;
if (D_801152C2 < ((a - b) < 0 ? (b - a) : (a - b))) {
q = &D_80126942;
*q = func_80012F74(*q, p->f156, 4, 1);
} else {
q = &D_80126942;
*q = func_80012F74(*q, D_80127080, 4, 1);
}
} else {
s16 *r = &D_80126942;
*r = func_80012F74(*r, D_80126CAE, 4, 1);
}
D_80126940 = p->f154;
D_80126944 = p->f158;
}
--- func_8012A048 (src/shared/ov/func_8012A048.h:9) shares 2: D_80126940 D_80126942 ---
void func_8012A048(void *a0, s32 a1, u8 a2) {
*(s32 *)((s32)a0 + 0x0) = a1;
*(u8 *)((s32)a0 + 0x4) = a2;
*(s32 *)((s32)a0 + 0x9C) = 0;
*(s16 *)((s32)a0 + 0xA0) = 0;
*(s16 *)((s32)a0 + 0xA2) = 0;
D_80126940 = D_80126B5E;
D_80126942 = D_80126B62;
D_80126944 = D_80126B66;
}
--- func_80174CB0 (src/shared/ov/func_80174CB0.h:13) shares 2: D_80126940 D_80126942 ---
s32 func_80174CB0(s32 param_1, s32 param_2)
{
s16 *pv = &D_80126940;
MATRIX mtx;
SVECTOR vec;
SVECTOR out;
*(s32 *)(param_1 + 8) = (s16)((s16 (*)(s32, s32, s32))func_80012C6C)((s32)*(s16 *)(param_1 + 8), (s32)*(s16 *)(param_1 + 0xc), 4);
*(s32 *)(param_1 + 0x10) = (s16)((s16 (*)(s32, s32, s32))func_80012C6C)((s32)*(s16 *)(param_1 + 0x10), (s32)*(s16 *)(param_1 + 0x14), 4);
*(s16 *)(param_1 + 0x18) = ((s16 (*)(s32, s32, s32))func_80012ABC)((s32)*(s16 *)(param_1 + 0x18), (s32)*(s16 *)(param_1 + 0x20), 4);
*(s16 *)(param_1 + 0x1a) = ((s16 (*)(s32, s32, s32))func_80012ABC)((s32)*(s16 *)(param_1 + 0x1a), (s32)*(s16 *)(param_1 + 0x22), 4);
*(s16 *)(param_1 + 0x1c) = ((s16 (*)(s32, s32, s32))func_80012ABC)((s32)*(s16 *)(param_1 + 0x1c), (s32)*(s16 *)(param_1 + 0x24), 4);
*(s16 *)(param_1 + 0x28) = ((s16 (*)(s32, s32, s32))func_80012C6C)((s32)*(s16 *)(param_1 + 0x28), (s32)*(s16 *)(param_1 + 0x2e), 0x10);
*(s16 *)(param_1 + 0x2a) = ((s16 (*)(s32, s32, s32))func_80012C6C)((s32)*(s16 *)(param_1 + 0x2a), (s32)*(s16 *)(param_1 + 0x30), 0x10);
*(s16 *)(param_1 + 0x2c) = ((s16 (*)(s32, s32, s32))func_80012C6C)((s32)*(s16 *)(param_1 + 0x2c), (s32)*(s16 *)(param_1 + 0x32), 0x10);
*(s32 *)(param_1 + 0x48) = (s32)*(s16 *)(param_1 + 0x28) + (s32)*pv;
*(s32 *)(param_1 + 0x4c) = (s32)*(s16 *)(param_1 + 0x2a) + (s32)D_80126942;
*(s32 *)(param_1 + 0x50) = (s32)*(s16 *)(param_1 + 0x2c) + (s32)D_80126944;
func_80013F3C((s32)&mtx);
func_800123F0((s32)&mtx, (s32)*(s16 *)(param_1 + 0x1c));
func_80012558((s32)&mtx, ((s32)*(s16 *)(param_1 + 0x1a) + (s32)(s16)param_2) & 0xFFF);
func_800126C4((s32)&mtx, (s32)*(s16 *)(param_1 + 0x18));
mtx.t[0] = (s32)*(s16 *)(param_1 + 0x28) + (s32)*pv;
mtx.t[1] = (s32)*(s16 *)(param_1 + 0x2a) + (s32)D_80126942;
mtx.t[2] = (s32)*(s16 *)(param_1 + 0x2c) + (s32)D_80126944;
vec.vx = 0;
vec.vy = 0;
vec.vz = (s16)*(s32 *)(param_1 + 0x10);
((void (*)(s32, s32, s32))func_8012F14C)((s32)&mtx, (s32)&vec, (s32)&out);
*(s32 *)(param_1 + 0x3c) = (s32)out.vx;
*(s32 *)(param_1 + 0x40) = (s32)out.vy;
*(s32 *)(param_1 + 0x44) = (s32)out.vz;
}
--- func_8017F66C (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:3455) shares 2: D_801274EA D_801EF9F0 ---
void func_8017F66C(void) {
extern s32 D_80126954;
extern s32 D_80126950;
extern s32 D_8012695C;
extern s16 D_80126968;
extern s16 D_8012696A;
extern s16 D_8012696C;
extern s16 D_80126976;
extern s16 D_80126978;
extern s16 D_8012697A;
extern u8 D_80126948[];
extern s16 D_801274EA;
extern s16 D_801EF9F0;
extern void func_8017F72C(void *);
extern void func_8012A018(s32, s32);
extern void func_8012A094(s32);
D_80126954 = 0x1F4;
D_80126950 = 0x1F4;
D_8012695C = 0x4B0;
D_80126968 = 0x1C7;
D_8012696A = 0;
D_8012696C = 0;
D_80126976 = 0;
D_80126978 = -0x10;
D_8012697A = 0;
D_801EF9F0 = 0;
func_8012A018((s32)func_8017F72C, 0);
func_8012A094((s32)D_80126948);
func_8017F72C((void *)D_80126948);
func_8012A094((s32)D_80126948);
D_801EF9F0 = D_801274EA;
}
--- func_801831FC (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:5984) shares 2: D_80126B58 func_80013294 ---
void func_801831FC(s32 arg0) {
s16 buf[4];
s32 base;
s32 s1;
s16 dist;
s32 q;
s16 vol;
base = (s32)&D_80126B58;
s1 = (s32)D_8018E8EC + (*(s16 *)(arg0 + 0xFC)) * 8;
if (*(s16 *)(s1 + 0x6) == 0) {
return;
}
func_80015978(base + 4, (s32 *)buf);
if (*(s16 *)(arg0 + 0xFC) == 3) {
if (buf[1] < -0xB00) {
return;
}
buf[1] = *(u16 *)(s1 + 0x2);
}
dist = func_80013294((void *)buf, (void *)s1);
if (dist >= 0x800) {
return;
}
q = (0x800 - dist) * 127 / 0x800;
if (q < 0) {
vol = 0;
} else {
vol = q;
}
if (vol >= 0x80) {
vol = 0x7F;
}
func_8002D4C8(*(u16 *)(s1 + 0x6), (u16)(vol | 0x1000));
}
--- func_8018347C (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:6096) shares 2: D_80126B58 func_80013294 ---
s32 func_8018347C(s32 *arg0, s32 arg1, s32 arg2) {
s16 buf[4];
s32 base;
s32 t;
s16 ret;
base = (s32)&D_80126B58;
if (*(u16 *)base == 0x19) {
return 0;
}
func_80015978(base + 4, (s32 *)buf);
buf[1] = 0;
t = func_80013294((void *)&D_8018E920, (void *)buf);
ret = t;
if (((s16)arg1 != 0) && ((s16)t < (s16)arg1)) {
func_800139C8((s16)func_8012B8A4((s16 *)arg0), (void *)D_8018E928, (void *)buf);
D_80126B5E = buf[0];
D_80126B66 = buf[2];
}
if ((*(s16 *)(base + 0xA) < -0xD00) && (*(s16 *)(base + 0xE) < 0)) {
if (*(s16 *)(base + 6) >= 0) {
if (*(s16 *)(base + 6) < 0x160) {
*(s16 *)(base + 6) = 0x160;
}
} else if (*(s16 *)(base + 6) >= -0x15F) {
*(s16 *)(base + 6) = -0x160;
}
}
if ((s16)arg2 != 0) {
if (ret < (s16)arg2) {
if (func_8016F1AC() == 0) {
return 1;
}
}
}
return 0;
}
.run/P36/agents/ov_SC02_017__func_8017F768/residual.txt
+24
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@@ -0,0 +1,24 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:func_8017F768: score 13 (COUNT; mine 113 ins, target 113) — not yet
register pairs (mine -> target, count): s1->s2 x1, s2->s1 x1, a1->s1 x1
delete mine[26:27] target[26:26]
26 addiu a1,sp,16 | --
replace mine[31:32] target[30:31]
31 li s2,2048 | addiu a1,sp,16
replace mine[37:40] target[36:40]
37 sra s1,v0,0x10 | sra s2,v0,0x10
38 slti v0,s1,512 | slti v0,s2,512
39 beqz v0,18f8 <func_8017F768+0xc4> | beqz v0,18f8 <func_8017F768+0xc4>
40 -- | li s1,2048
replace mine[55:56] target[55:57]
55 andi s2,v0,0xfff | andi a0,v0,0xfff
56 -- | move s1,a0
replace mine[60:61] target[61:62]
60 slti v0,s1,2049 | slti v0,s2,2049
replace mine[64:65] target[65:66]
64 bnez v0,1998 <func_8017F768+0x164> | bnez v0,1998 <func_8017F768+0x164>
delete mine[66:67] target[67:67]
66 move a0,s2 | --
replace mine[89:90] target[89:90]
89 move a1,s2 | move a1,s1
replace mine[94:95] target[94:95]
94 sh a1,0(at) | sh s1,0(at)
.run/P36/agents/ov_SC02_017__func_8017F768/sites.txt
+2
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@@ -0,0 +1,2 @@
NEEDED pin $17 line 3631
NEEDED pin $4 line 3639
.run/P36/agents/ov_SC02_017__func_8017F768/tu.txt
+2
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@@ -0,0 +1,2 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
func_8017F768
.run/P36/agents/ov_SC02_017__func_8017FCFC/body_free.c
+49
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@@ -0,0 +1,49 @@
void func_8017FCFC(void *a0) {
s32 t;
s32 u;
s32 frame_pad;
s32 k;
s32 *p;
(void)(s32 *)&frame_pad;
t = *(s16 *)((s32)a0 + 0xFE);
if (t != 0) {
u = t + 0;
t = u - 1;
*(s16 *)((s32)a0 + 0xFE) = t;
return;
}
k = *(u16 *)((s32)a0 + 0x5C);
if ((k & 1) == 0) {
return;
}
*(u16 *)((s32)a0 + 0x5C) = k & 0xFFFE;
p = D_8018E204;
t = func_800291B4(D_8018E204[(*(u16 *)((s32)a0 + 0x70)) & 0xF]) & 0xFF;
if (t != 0) {
*(u16 *)((s32)a0 + 0x5E) = 0;
t = 8;
*(s16 *)((s32)a0 + 0xFE) = t;
return;
}
k = *(u16 *)((s32)a0 + 0x5E);
if (k == 0xC) {
*(s32 *)((s32)a0 + 0x58) = (s32)D_8018E1F4 | 0x40000000 | 0x20000000;
func_800291A0(p[(*(u16 *)((s32)a0 + 0x70)) & 0xF], 1);
t = 0x8C00;
*(u16 *)((s32)a0 + 0x5C) = t;
} else {
t = 8;
*(s16 *)((s32)a0 + 0xFE) = t;
if (k != 0x1D && *(s32 *)((s32)a0 + 0xDC) == 0) {
*(s32 *)((s32)a0 + 0xDC) = 1;
func_801746DC();
((void (*)(void))func_80178BF8)();
*(s16 *)((s32)a0 + 0x2) = 2;
func_8002D4C8(0x59D, 0);
*(u16 *)((s32)a0 + 0x5E) = 0;
return;
}
}
*(u16 *)((s32)a0 + 0x5E) = 0;
}
.run/P36/agents/ov_SC02_017__func_8017FCFC/body_tree.c
+51
View File
@@ -0,0 +1,51 @@
void func_8017FCFC(void *a0) {
s32 t;
register s32 u __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus8)
register s32 zr __asm__("$0"); // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus8)
s32 frame_pad;
s32 k;
s32 *p;
(void)(s32 *)&frame_pad;
t = *(s16 *)((s32)a0 + 0xFE);
if (t != 0) {
u = t + zr;
t = u - 1;
*(s16 *)((s32)a0 + 0xFE) = t;
return;
}
k = *(u16 *)((s32)a0 + 0x5C);
if ((k & 1) == 0) {
return;
}
*(u16 *)((s32)a0 + 0x5C) = k & 0xFFFE;
p = D_8018E204;
t = func_800291B4(D_8018E204[(*(u16 *)((s32)a0 + 0x70)) & 0xF]) & 0xFF;
if (t != 0) {
*(u16 *)((s32)a0 + 0x5E) = 0;
t = 8;
*(s16 *)((s32)a0 + 0xFE) = t;
return;
}
k = *(u16 *)((s32)a0 + 0x5E);
if (k == 0xC) {
__asm__("" : "=r"(p) : "0"(p)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus8)
*(s32 *)((s32)a0 + 0x58) = (s32)D_8018E1F4 | 0x40000000 | 0x20000000;
func_800291A0(p[(*(u16 *)((s32)a0 + 0x70)) & 0xF], 1);
t = 0x8C00;
*(u16 *)((s32)a0 + 0x5C) = t;
} else {
t = 8;
*(s16 *)((s32)a0 + 0xFE) = t;
if (k != 0x1D && *(s32 *)((s32)a0 + 0xDC) == 0) {
*(s32 *)((s32)a0 + 0xDC) = 1;
func_801746DC();
((void (*)(void))func_80178BF8)();
*(s16 *)((s32)a0 + 0x2) = 2;
func_8002D4C8(0x59D, 0);
*(u16 *)((s32)a0 + 0x5E) = 0;
return;
}
}
*(u16 *)((s32)a0 + 0x5E) = 0;
}
.run/P36/agents/ov_SC02_017__func_8017FCFC/history.txt
+14
View File
@@ -0,0 +1,14 @@
s6: verdict NO-MATCH start 10 best 2 compiles 184 path R6 inline t @3779 + R12 width u s32->u16 @3760
best-scoring single candidates of the last trace (move -> score [residual class]):
R12 width u s32->u16 @3760 -> 2 [MIXED] (from 6)
R6 inline t @3779 -> 6 [COUNT] (from 10)
R12 width u s32->u16 @3760 -> 6 [COUNT] (from 10)
R12 width k s32->u16 @3762 -> 6 [COUNT] (from 6)
R6 inline t @3789 -> 6 [COUNT] (from 6)
R8 temp tmp0 @3788 -> 6 [COUNT] (from 6)
R7 block @3790 -> 6 [COUNT] (from 6)
R9 swap-stmts @3777 -> 6 [COUNT] (from 6)
R10 param-copy a0 @3764 -> 6 [COUNT] (from 6)
R4 decl-move u 1->0 -> 6 [COUNT] (from 6)
R6 inline p @3778 -> 6 [COUNT] (from 6)
R8 base tmp0 @3788 -> 6 [COUNT] (from 6)
.run/P36/agents/ov_SC02_017__func_8017FCFC/neighbours.txt
+15
View File
@@ -0,0 +1,15 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: straight-derive
// @stuck: none — MATCH (52 ins) on iteration 1, confirmed by rtu_match.
// @class: structural (STRENGTH/mflo!=lw -> MATCH)
// @stuck: none - MATCH (41 ins), match_one + rtu_match.
// @class: regalloc (WIDTH/li!=addu -> MATCH)
// @stuck: none — MATCH (58 ins), match_one + rtu_match. PIN-FREE (no register __asm__).
// @class: plumbing
// @stuck: none — MATCH (52 ins), iteration 1. Keys: (1) §3-T4 — Ghidra inverted the arms; the
.run/P36/agents/ov_SC02_017__func_8017FCFC/related.txt
+167
View File
@@ -0,0 +1,167 @@
=== lever-free bodies in ov_SC02_017 sharing a callee or global with func_8017FCFC (73 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_8017FF48 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:3882) shares 3: D_8018E204 func_800291B4 func_8002D4C8 ---
void func_8017FF48(int param_1) {
s32 v0;
if (func_801805D4(param_1) != 1) {
v0 = func_800291B4(D_8018E204[(*(u16 *)(param_1 + 0x70)) & 0xF]) & 0xFF;
if (v0 == 1) {
*(s16 *)(param_1 + 0x2) = 3;
*(s16 *)(param_1 + 0x34) = 0;
func_80180398((void *)param_1);
func_8012B23C(param_1);
func_8012B14C(param_1, (s32)D_8018E264);
func_8002D4C8(0x59E, 0);
func_8002D4C8(0x5C1, 0);
} else if (v0 == 2) {
*(s16 *)(param_1 + 0x2) = 2;
*(s16 *)(param_1 + 0xA) = *(u16 *)(param_1 + 0xA) + 0x42;
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x10) = 0x400;
*(s32 *)(param_1 + 0x58) = (s32)D_8018E254 | 0x40000000 | 0x20000000;
*(u16 *)(param_1 + 0x5C) = 0x8C00;
*(s32 *)(param_1 + 0xCC) = func_801788B8(param_1, (s32)func_8018183C);
func_8012B2CC(param_1);
}
}
}
--- func_8017FB60 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:3682) shares 3: D_8018E1F4 D_8018E204 func_800291B4 ---
void func_8017FB60(void *a0) {
s32 v0;
s32 res2;
s32 s1;
u16 idx;
*(s16 *)((s32)a0 + 0x76) = 1;
*(u16 *)((s32)a0 + 0x5C) = 0x8800;
v0 = ((s32 (*)(void *))func_8012C1B8)(a0);
*(s32 *)((s32)a0 + 0x20) = v0;
if (v0 == 0) {
func_8012CAE4(a0);
return;
}
func_8001C214(v0, (s32)D_801C81C8);
idx = *(u16 *)((s32)a0 + 0x70) & 0xF;
v0 = func_800291B4(D_8018E204[idx]);
s1 = v0 & 0xFF;
if (s1 != 3) {
res2 = func_8012C658(0xAF, *(s16 *)((s32)a0 + 0x70), (s32)a0);
*(s32 *)((s32)a0 + 0xCC) = res2;
if (res2 == 0) {
func_8012CAE4(a0);
return;
}
if (s1 == 0) {
*(s32 *)((s32)a0 + 0x58) = (s32)D_8018E1E4 | 0x40000000 | 0x20000000;
goto common;
}
}
*(s32 *)((s32)a0 + 0x58) = (s32)D_8018E1F4 | 0x40000000 | 0x20000000;
*(u16 *)((s32)a0 + 0x5C) = *(u16 *)((s32)a0 + 0x5C) | 0x400;
common:
*(u8 *)((s32)a0 + 0x75) = 4;
*(u16 *)((s32)a0 + 0x2) = 1;
*(s16 *)((s32)a0 + 0xAE) = -4;
func_8012A828((s32)a0, aD8018A800);
}
--- func_80180084 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:3939) shares 3: D_8018E204 func_800291A0 func_8002D4C8 ---
void func_80180084(s32 p) {
s32 spA[2]; /* sp+0x10 */
s32 spB[2]; /* sp+0x18 */
s32 e; /* p + 0xEC */
s32 f; /* p + 0xF4 */
if (func_801805D4(p) == 1) {
return;
}
if (*(u16 *)(p + 0x34) == 0) {
e = p + 0xEC;
f = p + 0xF4;
func_80180410(p, e, f);
if (*(s16 *)(*(s32 *)(p + 0x20) + 0x10) == 0) {
func_8002D4C8(0x5C1, 0);
}
*(s16 *)(*(s32 *)(p + 0x20) + 0x10) =
(*(u16 *)(*(s32 *)(p + 0x20) + 0x10) + 0x100) & 0xFFF;
if (((s32 (*)(s32, s32))func_8012CC40)(p, (s32)&D_8018E28C) & 0x2000) {
*(s16 *)(p + 2) = 2;
return;
}
func_8012B2CC(p);
func_80180410(p, (s32)spA, (s32)spB);
if (func_801804A8(p, e, (s32)spA) != 1) {
if (func_801804A8(p, f, (s32)spB) != 1) {
return;
}
}
func_8002D4C8(0x5A6, 0);
*(s16 *)(p + 0x34) = *(u16 *)(p + 0x34) + 1;
} else {
*(s32 *)(p + 0xE0) = *(s32 *)(p + 0xE0) + 0x40000;
*(s16 *)(*(s32 *)(p + 0x20) + 0x10) =
*(u16 *)(*(s32 *)(p + 0x20) + 0x10) + *(u16 *)(p + 0xE2);
if (*(s16 *)(*(s32 *)(p + 0x20) + 0x10) < 0x400) {
return;
}
func_8002D4C8(0x5A7, 0);
*(s16 *)(*(s32 *)(p + 0x20) + 0x10) = 0x400;
*(s32 *)(p + 0xE0) = -(*(s32 *)(p + 0xE0) >> 1);
*(s32 *)(p + 0x1C) = *(s32 *)(p + 0x1C) - 1;
if (*(s32 *)(p + 0x1C) != 0) {
return;
}
*(s16 *)(p + 2) = 2;
*(s32 *)(p + 0xCC) = func_801788B8(p, (s32)func_8018183C);
func_800291A0(D_8018E204[*(u16 *)(p + 0x70) & 0xF], 2);
}
}
--- func_80180554 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:4121) shares 2: D_8018E204 func_800291A0 ---
void func_80180554(void *arg0) {
func_800291A0(D_8018E204[*(u16 *)(arg0 + 0x70) & 0xF], 3);
}
--- func_80180610 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:4155) shares 2: D_8018E204 func_800291B4 ---
s32 func_80180610(void) {
s32 count = 0;
s32 i;
for (i = 0; i < 4; i++) {
if ((func_800291B4(D_8018E204[i]) & 0xFF) == 3) {
count++;
}
}
return count;
}
--- func_80180304 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:4027) shares 2: D_8018E204 func_800291B4 ---
void func_80180304(int param_1) {
s32 v0;
if (func_801805D4(param_1) != 1) {
if (func_801789AC(param_1) != 0) {
((void (*)(s32))func_80178D18)(param_1);
v0 = func_800291B4(D_8018E204[*(u16 *)(param_1 + 0x70) & 0xF]) & 0xFF;
if (v0 == 3) {
func_80180590((void *)param_1);
} else {
*(s16 *)(param_1 + 0x2) = 2;
}
}
}
}
.run/P36/agents/ov_SC02_017__func_8017FCFC/residual.txt
+16
View File
@@ -0,0 +1,16 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:func_8017FCFC: score 10 (COUNT; mine 79 ins, target 80) — not yet
replace mine[7:10] target[7:11]
7 beqz v0,1df4 <func_8017FCFC+0x2c> | beqz v0,1df8 <func_8017FCFC+0x30>
8 addiu v0,v0,-1 | move v1,v0
9 j 1eec <func_8017FCFC+0x124> | addiu v0,v1,-1
10 -- | j 1ef0 <func_8017FCFC+0x128>
insert mine[23:23] target[24:26]
23 -- | lui s1,0x0
24 -- | addiu s1,s1,0
delete mine[26:28] target[29:29]
26 lui s1,0x0 | --
27 addiu s1,s1,0 | --
replace mine[31:32] target[32:33]
31 j 1eec <func_8017FCFC+0x124> | j 1ef0 <func_8017FCFC+0x128>
replace mine[54:55] target[55:56]
54 j 1eec <func_8017FCFC+0x124> | j 1ef0 <func_8017FCFC+0x128>
.run/P36/agents/ov_SC02_017__func_8017FCFC/sites.txt
+4
View File
@@ -0,0 +1,4 @@
REMOVED pin $2 line 3860
NEEDED pin $3 line 3861
NEEDED pin $0 line 3862
NEEDED launder line 3890
.run/P36/agents/ov_SC02_017__func_8017FCFC/tu.txt
+2
View File
@@ -0,0 +1,2 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
func_8017FCFC
.run/P36/agents/ov_SC02_017__func_8018209C/body_free.c
+51
View File
@@ -0,0 +1,51 @@
void func_8018209C(void *arg0)
{
SV_8018209C vin;
SV_8018209C w;
RES_8018209C res;
s32 g;
s32 rv;
func_8012F214((s32)arg0, (s32)D_8018E56C, (s32)&vin);
g = (s32)&D_800AF648;
__asm__ __volatile__(
"lw $12, 0(%0)\n" "lw $13, 4(%0)\n"
"ctc2 $12, $0\n" "ctc2 $13, $1\n"
"lw $12, 8(%0)\n" "lw $13, 12(%0)\n" "lw $14, 16(%0)\n"
"ctc2 $12, $2\n" "ctc2 $13, $3\n" "ctc2 $14, $4\n" : : "r"(g) : "$12", "$13", "$14" );
__asm__ __volatile__(
"lw $12, 20(%0)\n" "lw $13, 24(%0)\n"
"ctc2 $12, $5\n" "lw $14, 28(%0)\n"
"ctc2 $13, $6\n" "ctc2 $14, $7\n" : : "r"(g) : "$12", "$13", "$14" );
gte_ldv0(&vin);
gte_rtps();
gte_stsxy(&res.x);
gte_stflg(&res.flag);
if ((res.flag & -0x1001) != 0) { rv = 0; goto out; }
if ((res.x < 0 ? -res.x : res.x) >= 0xAB)
goto L2;
if ((res.y < 0 ? -res.y : res.y) >= 0x83)
goto L2;
goto tail;
L2:
w.vx = *(u16 *)((s32)arg0 + 6);
w.vy = *(u16 *)((s32)arg0 + 0xA);
w.vz = *(u16 *)((s32)arg0 + 0xE);
gte_ldv0(&w);
gte_rtps();
gte_stsxy(&res.x);
gte_stflg(&res.flag);
if ((res.flag & -0x1001) != 0) { rv = 0; goto out; }
if ((res.x < 0 ? -res.x : res.x) >= 0x105) { rv = 0; goto out; }
if ((res.y < 0 ? -res.y : res.y) >= 0x8D) { rv = 0; goto out; }
tail:
if (func_80013478((s32)&D_80126B5C, (s32)&vin) <= 0x41010)
func_8002D4C8(0xB67, 0);
rv = 1;
out:
}
.run/P36/agents/ov_SC02_017__func_8018209C/body_tree.c
+54
View File
@@ -0,0 +1,54 @@
void func_8018209C(void *arg0)
{
SV_8018209C vin;
SV_8018209C w;
RES_8018209C res;
register s32 g __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus8)
s32 rv;
func_8012F214((s32)arg0, (s32)D_8018E56C, (s32)&vin);
g = (s32)&D_800AF648;
__asm__ __volatile__( // !FAKE: gte direct — clobbers beyond Sony's macro (a scheduling steer; P36 T5 t5_remark3)
"lw $12, 0(%0)\n" "lw $13, 4(%0)\n"
"ctc2 $12, $0\n" "ctc2 $13, $1\n"
"lw $12, 8(%0)\n" "lw $13, 12(%0)\n" "lw $14, 16(%0)\n"
"ctc2 $12, $2\n" "ctc2 $13, $3\n" "ctc2 $14, $4\n"
: : "r"(g) : "$12", "$13", "$14", "memory"); // !FAKE: gte direct — clobbers ['memory'] (gte_SetRotMatrix_m) beyond Sony's (P36 T5 gte1)
__asm__ __volatile__(
"lw $12, 20(%0)\n" "lw $13, 24(%0)\n"
"ctc2 $12, $5\n" "lw $14, 28(%0)\n"
"ctc2 $13, $6\n" "ctc2 $14, $7\n"
: : "r"(g) : "$12", "$13", "$14", "memory");
gte_ldv0(&vin);
gte_rtps();
gte_stsxy(&res.x);
gte_stflg(&res.flag);
if ((res.flag & -0x1001) != 0) { rv = 0; goto out; }
if ((res.x < 0 ? -res.x : res.x) >= 0xAB)
goto L2;
if ((res.y < 0 ? -res.y : res.y) >= 0x83)
goto L2;
goto tail;
L2:
w.vx = *(u16 *)((s32)arg0 + 6);
w.vy = *(u16 *)((s32)arg0 + 0xA);
w.vz = *(u16 *)((s32)arg0 + 0xE);
gte_ldv0(&w);
gte_rtps();
gte_stsxy(&res.x);
gte_stflg(&res.flag);
if ((res.flag & -0x1001) != 0) { rv = 0; goto out; }
if ((res.x < 0 ? -res.x : res.x) >= 0x105) { rv = 0; goto out; }
if ((res.y < 0 ? -res.y : res.y) >= 0x8D) { rv = 0; goto out; }
tail:
if (func_80013478((s32)&D_80126B5C, (s32)&vin) <= 0x41010)
func_8002D4C8(0xB67, 0);
rv = 1;
out:
__asm__ __volatile__("" : : "r"(rv)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus8)
}
.run/P36/agents/ov_SC02_017__func_8018209C/history.txt
+14
View File
@@ -0,0 +1,14 @@
s5: verdict NO-MATCH start 29 best 29 compiles 184 path
best-scoring single candidates of the last trace (move -> score [residual class]):
R12 width rv s32->u16 @5348 -> 29 [COUNT] (from 29)
R8 temp tmp0 @5378 -> 29 [COUNT] (from 29)
R18 bystander @5361->5363 -> 29 [COUNT] (from 29)
R7 block @5390 -> 29 [COUNT] (from 29)
R10 param-copy arg0 @5349 -> 29 [COUNT] (from 29)
R4 decl-move g 3->0 -> 29 [COUNT] (from 29)
R12 width rv s32->s16 @5348 -> 29 [COUNT] (from 29)
R8 base tmp0 @5378 -> 29 [COUNT] (from 29)
R7 do-while @5390 -> 29 [COUNT] (from 29)
R4 decl-move g 3->1 -> 29 [COUNT] (from 29)
R12 width rv s32->u8 @5348 -> 29 [COUNT] (from 29)
R7 block @5378 -> 29 [COUNT] (from 29)
.run/P36/agents/ov_SC02_017__func_8018209C/neighbours.txt
+15
View File
@@ -0,0 +1,15 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: straight-derive
// @stuck: none — MATCH (52 ins) on iteration 1, confirmed by rtu_match.
// @class: structural (STRENGTH/mflo!=lw -> MATCH)
// @stuck: none - MATCH (41 ins), match_one + rtu_match.
// @class: regalloc (WIDTH/li!=addu -> MATCH)
// @stuck: none — MATCH (58 ins), match_one + rtu_match. PIN-FREE (no register __asm__).
// @class: plumbing
// @stuck: none — MATCH (52 ins), iteration 1. Keys: (1) §3-T4 — Ghidra inverted the arms; the
.run/P36/agents/ov_SC02_017__func_8018209C/related.txt
+241
View File
@@ -0,0 +1,241 @@
=== lever-free bodies in ov_SC02_017 sharing a callee or global with func_8018209C (80 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80181E98 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:5220) shares 5: D_800AF648 D_80126B5C func_80013478 func_8002D4C8 func_8012F214 ---
s32 func_80181E98_impl(void *arg)
{
extern void func_8012F214(s32 a0, s32 a1, s32 a2);
extern s32 func_80013478(s32 a0, s32 a1);
extern void func_8002D4C8(s32 a0, s32 a1);
extern s32 D_8018E564;
extern u8 D_800AF648;
extern u8 D_80126B5C;
struct {
s16 in0[4];
s16 in1[4];
s16 sxy[2];
s32 flag;
} w;
s32 t;
s32 r;
s32 k;
func_8012F214((s32)arg, (s32)&D_8018E564, (s32)w.in0);
gte_SetRotMatrix(&D_800AF648);
gte_SetTransMatrix(&D_800AF648);
gte_ldv0(w.in0);
gte_rtps();
gte_stsxy(w.sxy);
gte_stflg(&w.flag);
if (w.flag & 0xFFFFEFFF) {
return 0;
}
t = w.sxy[0];
if (t < 0) {
t = -t;
}
if (t >= 0xAB || (w.sxy[1] >= 0 ? w.sxy[1] >= 0x83 : -w.sxy[1] >= 0x83)) {
w.in1[0] = *(s16 *)((s32)arg + 6);
w.in1[1] = *(s16 *)((s32)arg + 10);
w.in1[2] = *(s16 *)((s32)arg + 14);
gte_ldv0(w.in1);
gte_rtps();
gte_stsxy(w.sxy);
gte_stflg(&w.flag);
if (w.flag & 0xFFFFEFFF) {
return 0;
}
t = w.sxy[0];
if (t < 0) {
t = -t;
}
if (t >= 0x105 || (w.sxy[1] >= 0 ? w.sxy[1] >= 0x8D : -w.sxy[1] >= 0x8D)) {
return 0;
}
}
r = func_80013478((s32)&D_80126B5C, (s32)w.in0);
k = 0x5A0;
if (r <= 0x41010) {
k = 0x59F;
}
func_8002D4C8(k, 0);
return 1;
}
--- func_8012D4B4 (src/shared/ov/func_8012D4B4.h:13) shares 2: D_800AF648 func_8012F214 ---
void func_8012D4B4(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
s32 sp10[2];
s32 sp18[2];
s32 sp20;
s32 sp24;
s32 temp_v0_2;
void *temp_v0;
func_8012F214(arg0, arg1, (s32)sp10);
func_8012F214(arg0, arg2, (s32)sp18);
temp_v0 = func_80010A08(0x10);
(*(s32 *)((s8 *)(temp_v0) + (4))) = arg3;
SetLineF2(temp_v0);
func_8004914C(&D_800AF648);
func_800491AC(&D_800AF648);
temp_v0_2 = RotTransPers((s32)sp10, temp_v0 + 8, &sp20, &sp24);
if ((temp_v0_2 > 0) && (sp24 >= 0) &&
(RotTransPers((s32)sp18, temp_v0 + 0xC, &sp20, &sp24) > 0) && (sp24 >= 0)) {
AddPrim(*(s32 *)((s8 *)&D_800A651C + ((u16)D_800B9A02 * 0x14)) + (temp_v0_2 * 4), temp_v0);
}
}
--- func_80188620 (src/ov_SC02_017/ov_SC02_017_jr_80186C64.c:4474) shares 2: func_8002D4C8 func_8012F214 ---
void func_80188620(s32 arg0) {
u16 sp10[3];
u16 sp18[12];
if (*(s32 *)(arg0 + 0x1C) == 9) {
if (func_8012D5E4(arg0, (s32)D_801E2118, (s32)(D_801E2118 + 8), 10) != 0) {
D_80126B96 |= 0x800;
}
if (*(s16 *)(arg0 + 0x70) & 0x8000) {
func_8012F214(arg0, (s32)D_801E2128, (s32)sp10);
sp18[3] = 0x126;
sp18[5] = 0;
sp18[6] = 0x7FFF;
sp18[0] = sp10[0];
sp18[1] = sp10[1];
sp18[2] = sp10[2];
sp18[7] = *(u16 *)(*(s32 *)(arg0 + 0x20) + 0x12);
func_8012C51C(sp18, arg0);
sp18[7] = *(u16 *)(*(s32 *)(arg0 + 0x20) + 0x12) + 0x100;
func_8012C51C(sp18, arg0);
sp18[7] = *(u16 *)(*(s32 *)(arg0 + 0x20) + 0x12) - 0x100;
func_8012C51C(sp18, arg0);
}
func_8002D4C8(0x43E, 0);
}
if (func_8012BEE8(arg0) != 0) {
((void (*)(void *))func_801883A0)(arg0);
}
}
--- func_80183E70 (src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:6565) shares 2: func_8002D4C8 func_8012F214 ---
void func_80183E70(s32 param_1) {
s32 v0;
SV3 in;
SV3 out;
if (func_8012BEE8(param_1) != 0) {
func_8002D4C8(0x5D7, 0);
func_8012C218((void *)param_1);
} else {
v0 = *(s16 *)(param_1 + 0x70);
if (v0 != 0) {
in.a = v0 << 4;
in.b = 0;
in.c = 0;
((void (*)(s32, void *, void *))func_8012F214)((s32)aD801EF9FC, &in, &out);
*(s16 *)(param_1 + 0x6) = out.a;
*(s16 *)(param_1 + 0xA) = out.b;
*(s16 *)(param_1 + 0xE) = out.c;
*(Blk8 *)(*(s32 *)(param_1 + 0x20) + 0x10) =
*(Blk8 *)(*(s32 *)((s32)aD801EF9FC + 0x20) + 0x10);
} else {
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x10) += D_8018EED4;
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) += D_8018EED6;
*(u16 *)(*(s32 *)(param_1 + 0x20) + 0x14) += D_8018EED8;
func_8012AD80(param_1);
func_8012B2CC(param_1);
}
}
}
--- func_80149954 (src/shared/ov/func_80149954.h:12) shares 2: D_80126B5C func_8002D4C8 ---
s32 func_80149954(s32 s0) {
s32 sp10[2];
s16 buf[10];
if (*(s32 *)(s0 + 0x44) & 0x404) {
return 0;
}
if ((*(u16 *)(s0 + 0xAA) & 0x90) == 0) {
if (currentLocationId == 0x308D) {
func_80015978((s32)&D_80126B5C, sp10);
func_8012E5CC((s32)sp10, 0x4, 0x8E0);
return 0;
}
func_8002D4C8(0x4, 0x8E0);
return 0;
}
if (*(u16 *)(s0 + 0xAC) & 0x90) {
if ((s32)D_8012707C == 0x8E0) {
D_8012707C = 0;
} else {
func_80147364(0x8E0, 0);
}
}
func_800CCF28(s0);
*(s16 *)((s32)buf + 0x0) = 0x12;
*(s32 *)((s32)buf + 0x8) = s0;
*(s16 *)((s32)buf + 0x2) = 0;
*(s16 *)((s32)buf + 0x4) = -0x1E;
*(s16 *)((s32)buf + 0x6) = 0;
*(s32 *)((s32)buf + 0xC) = 0;
*(s32 *)((s32)buf + 0x10) = 0;
func_80146750(buf);
return 1;
}
--- func_80187AB0 (src/ov_SC02_017/ov_SC02_017_jr_80186C64.c:3894) shares 2: D_80126B5C func_8002D4C8 ---
void func_80187AB0(s32 param_1) {
extern M2C_UNK D_801E1F04;
extern u8 D_801E1CDC;
extern u8 D_80126B5C;
extern s32 D_80126B60;
extern s32 D_80126B64;
s32 iVar1;
struct In in;
s32 out[2];
s32 t;
s32 o;
iVar1 = ((s32 (*)(void))func_8012C1B8)();
*(s32 *)(param_1 + 0x20) = iVar1;
if (iVar1 == 0) {
((void (*)(s32))func_8012CAE4)(param_1);
return;
}
((void (*)(s32, void *))func_8001C214)(iVar1, &(*(u8 *)&D_801E1F04));
if ((*(u16 *)(param_1 + 0x70) & 0x1000) == 0) {
func_8002D4C8(0x43A, 0);
} else {
func_8002D4C8(0x6D6, 0);
}
func_8012A828(param_1, &D_801E1CDC);
*(s16 *)(param_1 + 2) = 1;
*(s32 *)(param_1 + 0x1C) = 100;
*(s32 *)&in.lo = D_80126B60;
in.hi -= 0x20;
in.w0 = (*(s32 *)&D_80126B5C);
in.w2 = D_80126B64;
func_8012B77C(out, param_1 + 4, &in);
o = out[0];
t = *(u16 *)(param_1 + 0x70) & 0xF;
switch (t) {
case 0:
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x10) = (s16)o;
break;
case 1:
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x10) = (s16)o;
case 3:
*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12) = (s16)(o >> 16);
break;
case 2:
break;
}
if (*(u16 *)(param_1 + 0x70) & 0x1000) {
*(s32 *)(param_1 + 0x1C) = *(s32 *)(param_1 + 0x1C) << 1;
}
func_8012B2CC(param_1);
((void (*)(s32, s32))func_8012C588)(0xBC, param_1);
}
.run/P36/agents/ov_SC02_017__func_8018209C/residual.txt
+44
View File
@@ -0,0 +1,44 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:func_8018209C: score 29 (COUNT; mine 122 ins, target 129) — not yet
register pairs (mine -> target, count): v0->a3 x11
replace mine[8:12] target[8:12]
8 lui v0,0x0 | lui a3,0x0
9 addiu v0,v0,0 | addiu a3,a3,0
10 lw t4,0(v0) | lw t4,0(a3)
11 lw t5,4(v0) | lw t5,4(a3)
replace mine[14:17] target[14:17]
14 lw t4,8(v0) | lw t4,8(a3)
15 lw t5,12(v0) | lw t5,12(a3)
16 lw t6,16(v0) | lw t6,16(a3)
replace mine[20:22] target[20:22]
20 lw t4,20(v0) | lw t4,20(a3)
21 lw t5,24(v0) | lw t5,24(a3)
replace mine[23:24] target[23:24]
23 lw t6,28(v0) | lw t6,28(a3)
replace mine[41:43] target[41:43]
41 bnez v0,433c <func_8018209C+0x1d4> | bnez v0,4358 <func_8018209C+0x1f0>
42 nop | move v0,zero
replace mine[58:59] target[58:59]
58 j 4310 <func_8018209C+0x1a8> | j 4324 <func_8018209C+0x1bc>
replace mine[62:63] target[62:63]
62 bnez v0,4310 <func_8018209C+0x1a8> | bnez v0,4324 <func_8018209C+0x1bc>
replace mine[88:90] target[88:90]
88 bnez v0,433c <func_8018209C+0x1d4> | bnez v0,4358 <func_8018209C+0x1f0>
89 nop | move v0,zero
replace mine[96:98] target[96:98]
96 beqz v0,433c <func_8018209C+0x1d4> | beqz v0,4358 <func_8018209C+0x1f0>
97 nop | move v0,zero
replace mine[100:101] target[100:106]
100 bgez v0,4304 <func_8018209C+0x19c> | bltz v0,4314 <func_8018209C+0x1ac>
101 -- | nop
102 -- | slti v0,v0,141
103 -- | beqz v0,4358 <func_8018209C+0x1f0>
104 -- | move v0,zero
105 -- | j 4324 <func_8018209C+0x1bc>
replace mine[104:106] target[109:111]
104 beqz v0,433c <func_8018209C+0x1d4> | beqz v0,4358 <func_8018209C+0x1f0>
105 nop | move v0,zero
replace mine[113:114] target[118:120]
113 bnez v1,433c <func_8018209C+0x1d4> | bnez v1,4358 <func_8018209C+0x1f0>
114 -- | li v0,1
insert mine[117:117] target[123:124]
117 -- | li v0,1
.run/P36/agents/ov_SC02_017__func_8018209C/sites.txt
+3
View File
@@ -0,0 +1,3 @@
NEEDED pin $7 line 5542
REMOVED pin $2 line 5543
NEEDED keepalive line 5589
.run/P36/agents/ov_SC02_017__func_8018209C/tu.txt
+2
View File
@@ -0,0 +1,2 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
func_8018209C
.run/P36/agents/ov_SC02_017__func_80182FD0/body_free.c
+58
View File
@@ -0,0 +1,58 @@
void func_80182FD0(int param)
{
u32 buf[3];
u8 *s0;
int v0;
int x;
int lim;
s0 = ((u8 **)D_8018E8DC)[*(s16 *)(param + 0xFC)];
/* gte_SetRotMatrix(&D_800AF648); gte_SetTransMatrix(&D_800AF648); */
__asm__ volatile(
"lui $2,%%hi(D_800AF648);addiu $2,$2,%%lo(D_800AF648);"
"lw $12,0($2);lw $13,4($2);ctc2 $12,$0;ctc2 $13,$1;"
"lw $12,8($2);lw $13,12($2);lw $14,16($2);"
"ctc2 $12,$2;ctc2 $13,$3;ctc2 $14,$4;"
"lw $12,20($2);lw $13,24($2);ctc2 $12,$5;"
"lw $14,28($2);ctc2 $13,$6;ctc2 $14,$7"
: : : "$12", "$13", "$14", "$2", "memory");
func_80015978(param + 4, (s32 *)buf);
/* gte_ldv0(buf); gte_rtps(); gte_stsxy(buf); */
__asm__ volatile("lwc2 $0,0(%0);lwc2 $1,4(%0);nop;nop;rtps;swc2 $14,0(%0)"
: : "r"(buf) : "memory");
/* gte_stflg(&buf[2]); */
gte_stflg(buf + 2);
lim = (D_800AF7BC >> 1) + 0x20;
x = (int)(s16)buf[0];
if (x <= -lim) goto done;
if (x >= lim) goto done;
lim = (D_800AF7BE >> 1) + 0x20;
x = (int)(s16)((s16 *)buf)[1];
if (x <= -lim) goto done;
if (x >= lim) goto done;
if ((int)buf[2] < 0) goto done;
v0 = *(s32 *)(param + 0x1C);
if (v0 != 0) { v0--; goto store; }
if (*(s16 *)(s0 + 6) != 0xFF) {
do {
func_80183168((u8 *)param, s0);
s0 += 8;
} while (*(s16 *)(s0 + 6) != 0xFF);
}
v0 = *(s32 *)(param + 0xDC);
*(s32 *)(param + 0x1C) = v0;
v0 = *(volatile s32 *)(param + 0x1C);
v0--;
store:
*(s32 *)(param + 0x1C) = v0;
done:
func_801831FC(param);
}
.run/P36/agents/ov_SC02_017__func_80182FD0/body_tree.c
+60
View File
@@ -0,0 +1,60 @@
void func_80182FD0(int param)
{
u32 buf[3];
u8 *s0;
int v0;
int x;
int lim;
s0 = ((u8 **)D_8018E8DC)[*(s16 *)(param + 0xFC)];
/* gte_SetRotMatrix(&D_800AF648); gte_SetTransMatrix(&D_800AF648); */
__asm__ volatile(
"lui $2,%%hi(D_800AF648);addiu $2,$2,%%lo(D_800AF648);"
"lw $12,0($2);lw $13,4($2);ctc2 $12,$0;ctc2 $13,$1;"
"lw $12,8($2);lw $13,12($2);lw $14,16($2);"
"ctc2 $12,$2;ctc2 $13,$3;ctc2 $14,$4;"
"lw $12,20($2);lw $13,24($2);ctc2 $12,$5;"
"lw $14,28($2);ctc2 $13,$6;ctc2 $14,$7"
: : : "$12", "$13", "$14", "$2", "memory");
func_80015978(param + 4, (s32 *)buf);
/* gte_ldv0(buf); gte_rtps(); gte_stsxy(buf); */
__asm__ volatile("lwc2 $0,0(%0);lwc2 $1,4(%0);nop;nop;rtps;swc2 $14,0(%0)"
: : "r"(buf) : "memory");
/* gte_stflg(&buf[2]); */
gte_stflg(buf + 2);
lim = (D_800AF7BC >> 1) + 0x20;
x = (int)(s16)buf[0];
if (x <= -lim) goto done;
if (x >= lim) goto done;
__asm__ volatile("" : : "r"(x)); /* keep $v1 live: see LEVER above */ // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus8)
lim = (D_800AF7BE >> 1) + 0x20;
x = (int)(s16)((s16 *)buf)[1];
if (x <= -lim) goto done;
if (x >= lim) goto done;
__asm__ volatile("" : : "r"(x)); /* keep $v1 live: see LEVER above */ // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus8)
if ((int)buf[2] < 0) goto done;
v0 = *(s32 *)(param + 0x1C);
if (v0 != 0) { v0--; goto store; }
if (*(s16 *)(s0 + 6) != 0xFF) {
do {
func_80183168((u8 *)param, s0);
s0 += 8;
} while (*(s16 *)(s0 + 6) != 0xFF);
}
v0 = *(s32 *)(param + 0xDC);
*(s32 *)(param + 0x1C) = v0;
v0 = *(volatile s32 *)(param + 0x1C);
v0--;
store:
*(s32 *)(param + 0x1C) = v0;
done:
func_801831FC(param);
}
.run/P36/agents/ov_SC02_017__func_80182FD0/history.txt
+14
View File
@@ -0,0 +1,14 @@
s6: verdict NO-MATCH start 10 best 2 compiles 188 path R7 do-while @6002
best-scoring single candidates of the last trace (move -> score [residual class]):
R7 do-while @6002 -> 2 [COUNT] (from 10)
R8 hoist tmp0 @6001 -> 2 [COUNT] (from 2)
R18 bystander @5991->5993 -> 2 [COUNT] (from 2)
R7 block @5999 -> 2 [COUNT] (from 2)
R9 swap-stmts @6006 -> 2 [COUNT] (from 2)
R10 param-copy param @5980 -> 2 [COUNT] (from 2)
R6 inline v0 @6022 -> 2 [COUNT] (from 2)
R8 hoist tmp0 @6006 -> 2 [COUNT] (from 2)
R7 do-while @5999 -> 2 [COUNT] (from 2)
R8 temp tmp0 @6013 -> 2 [COUNT] (from 2)
R18 bystander @5999->6001 -> 2 [COUNT] (from 2)
R7 block @6001 -> 2 [COUNT] (from 2)
.run/P36/agents/ov_SC02_017__func_80182FD0/neighbours.txt
+15
View File
@@ -0,0 +1,15 @@
--- every @class/@stuck/@crack note in this translation unit ---
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: struct
// @stuck: none — MATCH (array-of-fnptr %lo-fold + signed-halfword guard)
// @class: straight-derive
// @stuck: none — MATCH (52 ins) on iteration 1, confirmed by rtu_match.
// @class: structural (STRENGTH/mflo!=lw -> MATCH)
// @stuck: none - MATCH (41 ins), match_one + rtu_match.
// @class: regalloc (WIDTH/li!=addu -> MATCH)
// @stuck: none — MATCH (58 ins), match_one + rtu_match. PIN-FREE (no register __asm__).
// @class: plumbing
// @stuck: none — MATCH (52 ins), iteration 1. Keys: (1) §3-T4 — Ghidra inverted the arms; the
.run/P36/agents/ov_SC02_017__func_80182FD0/related.txt
+185
View File
@@ -0,0 +1,185 @@
=== lever-free bodies in ov_SC02_017 sharing a callee or global with func_80182FD0 (41 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_80162438 (src/ov_SC02_017/ov_SC02_017_jr_8015C32C.c:3797) shares 2: D_800AF7BC D_800AF7BE ---
s32 func_80162438(s32 _unused0) {
extern void func_80024054(void *, void *);
extern void func_8001CE28(void *, void *);
extern void func_8001CE68(void *, void *);
extern void func_800242D0(s32, void *, s32);
extern s32 func_801626B8(void);
extern void func_80162760(void);
extern u8 D_8018D040[];
extern s32 D_8018D058;
extern u8 D_801EE684[];
extern u8 D_801EE6AC[];
extern u8 D_801EE6C8[];
extern int D_801EE678[];
extern u16 D_800B5BD8;
extern u16 D_800B5C10;
extern u16 D_800B5C48;
extern u16 D_800AF7BC;
extern u16 D_800AF7BE;
extern s16 D_800B5BE0;
extern s16 D_800B5BE2;
extern s16 D_800B5C04;
extern u8 D_800B5BFF;
extern s16 D_800B5C18;
extern s16 D_800B5C1A;
extern s16 D_800B5C3C;
extern u8 D_800B5C37;
extern s16 D_800B5C50;
extern s16 D_800B5C52;
extern s16 D_800B5C74;
u32 uVar2;
u8 *base;
u8 *item;
base = &(*(u8 *)&D_800AF630);
uVar2 = func_800291DC(0x12);
if ((uVar2 & 0x8000) != 0) {
if (D_800B5BD8 == 0) {
D_801EE678[0] = (s32)(base + 0x65A8);
item = base + 0x65A8;
func_80024054(D_8018D040, D_801EE684);
func_8001CE28(item, D_801EE684);
D_800B5C04 = 1;
D_800B5BFF = 1;
D_800B5BE0 = -D_800AF7BC / 2 + 0xD0;
D_800B5BE2 = -D_800AF7BE / 2 + 0x28;
}
if (D_800B5C10 == 0) {
D_801EE678[1] = (s32)(base + 0x65E0);
item = base + 0x65E0;
func_80024054(((u8 *)&D_8018D058), D_801EE6AC);
func_8001CE28(item, D_801EE6AC);
D_800B5C3C = 1;
D_800B5C37 = 1;
D_800B5C18 = -D_800AF7BC / 2 + 0xD0;
D_800B5C1A = -D_800AF7BE / 2 + 0x30;
}
if (D_800B5C48 == 0) {
D_801EE678[2] = (s32)(base + 0x6618);
item = base + 0x6618;
func_800242D0((s16)func_801626B8(), D_801EE6C8, 0x84);
func_8001CE68(item, D_801EE6C8);
D_800B5C74 = 1;
D_800B5C50 = -D_800AF7BC / 2 + 0xD0;
D_800B5C52 = -D_800AF7BE / 2 + 0x10;
}
func_800242D0((s16)func_801626B8(), D_801EE6C8, 0x84);
if ((uVar2 & 0x7FFF) == (s32)(*(s16 *)&D_80078EB0)) {
func_80162760();
}
}
}
--- func_80161E08 (src/ov_SC02_017/ov_SC02_017_jr_8015C32C.c:3572) shares 2: D_800AF7BC D_800AF7BE ---
void func_80161E08(s32 param_1) {
extern void func_80024054(void *a0, void *a1);
extern void func_8001CE28(void *a0, void *a1);
extern void func_800242D0(s32 a0, void *a1, s32 a2);
extern void func_8001CE68(void *a0, void *a1);
extern int func_801620C4(void);
extern void func_801622C4(void);
extern u16 D_800AF7BC;
extern u16 D_800AF7BE;
extern s16 D_80078EB0;
extern u16 D_800B5BD8;
extern s16 D_800B5C04;
extern u8 D_800B5BFF;
extern s16 D_800B5BE0;
extern s16 D_800B5BE2;
extern u16 D_800B5C10;
extern s16 D_800B5C3C;
extern u8 D_800B5C37;
extern s16 D_800B5C18;
extern s16 D_800B5C1A;
extern u16 D_800B5C48;
extern s16 D_800B5C74;
extern s16 D_800B5C50;
extern s16 D_800B5C52;
extern u8 * D_801EE620[];
extern u8 D_8018CFDC[];
extern u8 D_8018CFFC[];
extern u8 D_801EE62C[];
extern u8 D_801EE654[];
extern u8 D_801EE66C[];
u8 *base = &(*(u8 *)&D_800AF630);
u8 *p;
s32 a2;
if (*((u16 *)param_1) != 0x1A &&
currentLocationId != 0x3012 &&
currentLocationId != 0x3054 &&
currentLocationId != 0x3079 &&
currentLocationId != 0x3096 &&
((a2 = func_800291DC(8)) & 0x8000) != 0) {
if (D_800B5BD8 == 0) {
p = D_801EE620[0] = base + 0x65A8;
func_80024054(&D_8018CFDC, &D_801EE62C);
func_8001CE28(p, &D_801EE62C);
D_800B5C04 = 1;
D_800B5BFF = 1;
D_800B5BE0 = -(s32)(u16)D_800AF7BC / 2 + 0xD0;
D_800B5BE2 = -(s32)(u16)D_800AF7BE / 2 + 0x28;
}
if (D_800B5C10 == 0) {
p = D_801EE620[1] = base + 0x65E0;
func_80024054(&D_8018CFFC, &D_801EE654);
func_8001CE28(p, &D_801EE654);
D_800B5C3C = 1;
D_800B5C37 = 1;
D_800B5C18 = -(s32)(u16)D_800AF7BC / 2 + 0xD0;
D_800B5C1A = -(s32)(u16)D_800AF7BE / 2 + 0x30;
}
if (D_800B5C48 == 0) {
p = D_801EE620[2] = base + 0x6618;
func_800242D0((s16)func_801620C4(), &D_801EE66C, 0x84);
func_8001CE68(p, &D_801EE66C);
D_800B5C74 = 1;
D_800B5C50 = -(s32)(u16)D_800AF7BC / 2 + 0xD0;
D_800B5C52 = -(s32)(u16)D_800AF7BE / 2 + 0x10;
}
func_800242D0((s16)func_801620C4(), &D_801EE66C, 0x84);
if ((a2 & 0x7FFF) == (s32)D_80078EB0) {
func_801622C4();
}
}
}
--- func_8012E32C (src/shared/ov/func_8012E32C.h:6) shares 1: D_800AF648 ---
void func_8012E32C(void) {
func_8004914C(&D_800AF648);
func_800491AC(&D_800AF648);
}
--- func_8014C88C (src/shared/ov/func_8014C88C.h:5) shares 1: func_80015978 ---
void func_8014C88C(s32 a0) {
s32 sp10;
func_80015978(a0 + 4, &sp10);
func_8014C8C8(a0, &sp10);
}
--- func_8014A380 (src/shared/ov/func_8014A380.h:5) shares 1: func_80015978 ---
void func_8014A380(s32 a0, s32 a1) {
s16 buf[4];
func_80015978(a0 + 4, (s32 *)buf);
buf[3] = 0;
func_8014C4AC(a1, 0x1F, 0, buf, *(s16 *)(*(s32 *)(a0 + 0x20) + 0x12));
}
--- func_8014A1B0 (src/shared/ov/func_8014A1B0.h:6) shares 1: func_80015978 ---
void func_8014A1B0(s32 a0, s32 a1) {
s16 sp18[4];
u16 tmp;
func_80015978(a0 + 4, (s32 *)sp18);
sp18[3] = 0;
tmp = func_80156370(0xA);
func_8014C4AC(a1, 0xA, tmp, sp18, *(s16 *)(*(s32 *)(a0 + 0x20) + 0x12));
}
.run/P36/agents/ov_SC02_017__func_80182FD0/residual.txt
+18
View File
@@ -0,0 +1,18 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c:func_80182FD0: score 10 (REG-caller; mine 102 ins, target 102) — not yet
register pairs (mine -> target, count): a0->v1 x6, v1->a0 x6
replace mine[46:47] target[46:47]
46 lh a0,16(sp) | lh v1,16(sp)
replace mine[48:51] target[48:51]
48 addiu v1,v0,32 | addiu a0,v0,32
49 negu v0,v1 | negu v0,a0
50 slt v0,v0,a0 | slt v0,v0,v1
replace mine[52:53] target[52:53]
52 slt v0,a0,v1 | slt v0,v1,a0
replace mine[57:58] target[57:58]
57 lh a0,18(sp) | lh v1,18(sp)
replace mine[59:62] target[59:62]
59 addiu v1,v0,32 | addiu a0,v0,32
60 negu v0,v1 | negu v0,a0
61 slt v0,v0,a0 | slt v0,v0,v1
replace mine[63:64] target[63:64]
63 slt v0,a0,v1 | slt v0,v1,a0
.run/P36/agents/ov_SC02_017__func_80182FD0/sites.txt
+4
View File
@@ -0,0 +1,4 @@
REMOVED pin $3 line 6171
NEEDED keepalive line 6199
NEEDED keepalive line 6205
NEEDED cast volatile s32 * line 6220
.run/P36/agents/ov_SC02_017__func_80182FD0/tu.txt
+2
View File
@@ -0,0 +1,2 @@
src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c
func_80182FD0
.run/P36/census/lever_census.json
+32 -32
View File
@@ -53,7 +53,7 @@
},
"kinds": {
"asm-body/direct": 13,
"barrier/direct": 328,
"barrier/direct": 327,
"barrier/via-macro": 2,
"gte-lever/direct": 362,
"gte-lever/via-macro": 94,
@@ -72,6 +72,7 @@
"cfake_markers": {
"count": 33,
"sample": [
"src/ov_SC02_011/ov_SC02_011_jr_80183178.c:2139",
"src/800.c:12748",
"src/md_SC07_003/md_SC07_003.c:3577",
"src/md_SC07_004/md_SC07_004.c:280",
@@ -79,7 +80,6 @@
"src/ov_SC01_009/ov_SC01_009_jr_8017E590.c:4271",
"src/ov_SC01_077/ov_SC01_077_jr_80183CF4.c:3979",
"src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:5178",
"src/ov_SC02_011/ov_SC02_011_jr_80183178.c:2139",
"src/ov_SC02_027/ov_SC02_027_jr_8017D898.c:4534",
"src/ov_SC02_028/ov_SC02_028_jr_8017D898.c:5464",
"src/ov_SC02_041/ov_SC02_041_jr_8017BEBC.c:7554",
@@ -109,15 +109,15 @@
},
"classes": {
"A": {
"bodies": 1519,
"distinct_bodies": 680,
"bodies": 1515,
"distinct_bodies": 676,
"file_scope": 0,
"in_bodies": 2423,
"in_bodies": 2419,
"kinds": {
"pin": 2423
"pin": 2419
},
"marked": 2423,
"sites": 2423,
"marked": 2419,
"sites": 2419,
"tus": 1091,
"unmarked": 0
},
@@ -125,10 +125,10 @@
"bodies": 4717,
"distinct_bodies": 776,
"file_scope": 13,
"in_bodies": 11349,
"in_bodies": 11348,
"kinds": {
"asm-body": 13,
"barrier": 330,
"barrier": 329,
"gte": 6328,
"gte-lever": 456,
"gte-unsigned": 271,
@@ -137,8 +137,8 @@
"launder": 705,
"verbatim-body": 2682
},
"marked": 2571,
"sites": 11362,
"marked": 2570,
"sites": 11361,
"tus": 1428,
"unmarked": 8791
},
@@ -244,9 +244,9 @@
"coverage": {
"asm": {
"comment_dead": 6782,
"live": 15446,
"live": 15441,
"macro_block": 194,
"raw": 22422
"raw": 22417
},
"attribute": {
"comment_dead": 0,
@@ -262,9 +262,9 @@
},
"register": {
"comment_dead": 8576,
"live": 2473,
"live": 2469,
"macro_block": 18,
"raw": 11067
"raw": 11063
},
"volatile": {
"comment_dead": 2606,
@@ -274,7 +274,7 @@
}
},
"coverage_ok": true,
"elapsed_s": 34.7,
"elapsed_s": 44.2,
"generated": "2026-09-11",
"gte_levers": {
"direct": 362,
@@ -285,15 +285,15 @@
"via_macro": 94,
"what": "GTE ops whose clobbers exceed the canonical macro's (a scheduling steer): class-B levers INSIDE the headline number since T5 (2026-09-09), marked, 0 at the close"
},
"head": "a2e8a8924",
"head": "2c9ec8023",
"headers": 3181,
"levers_AB": {
"asm": 2081,
"bodies": 2234,
"distinct_bodies": 917,
"marked": 4504,
"pins": 2423,
"sites": 4504,
"asm": 2080,
"bodies": 2229,
"distinct_bodies": 912,
"marked": 4499,
"pins": 2419,
"sites": 4499,
"unmarked": 0,
"what": "register pins + asm statements excluding GTE ops: the classes the phase drives to 0"
},
@@ -440,7 +440,7 @@
"$17": 41,
"$18": 32,
"$19": 22,
"$2": 844,
"$2": 841,
"$20": 7,
"$21": 6,
"$22": 3,
@@ -448,7 +448,7 @@
"$25": 1,
"$29": 13,
"$3": 199,
"$4": 507,
"$4": 506,
"$5": 387,
"$6": 62,
"$7": 27,
@@ -460,29 +460,29 @@
"v0": 2,
"v1": 3
},
"sites": 2423,
"sites": 2419,
"sp": 13,
"spelling": {
"__asm__": 2393,
"__asm__": 2389,
"asm": 30
},
"volatile_qualified": 0,
"zero": 70
},
"src_stamp": "83c1eadc0c5012ca",
"src_stamp": "a337516f8e76001d",
"tus": 4121,
"unclassified": 0,
"union_AD": {
"bodies": 5978,
"bodies": 5974,
"by_kind": {
"main": 160,
"md": 119,
"ov": 5527,
"ov": 5523,
"resident": 10,
"shared": 162
},
"copies_in_multi": 4871,
"distinct_bodies": 1228,
"distinct_bodies": 1224,
"multi_copy_classes": 121
},
"verbatim_excluded": {
.run/P36/census/lever_census.txt
+12 -12
View File
@@ -1,32 +1,32 @@
lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13)
coverage asm raw 22422 = live 15446 + macro-block 194 + comment/dead 6782
coverage register raw 11067 = live 2473 + macro-block 18 + comment/dead 8576
coverage asm raw 22417 = live 15441 + macro-block 194 + comment/dead 6782
coverage register raw 11063 = live 2469 + macro-block 18 + comment/dead 8576
coverage volatile raw 4386 = live 1698 + macro-block 82 + comment/dead 2606
coverage builtin raw 599 = live 445 + macro-block 0 + comment/dead 154
coverage attribute raw 76 = live 76 + macro-block 0 + comment/dead 0
class sites in-bodies file-scope bodies distinct TUs marked unmarked kinds
A pins 2423 2423 0 1519 680 1091 2423 0 {'pin': 2423}
B asm 11362 11349 13 4717 776 1428 2571 8791 {'barrier': 330, 'instruction': 232, 'launder': 705, 'gte': 6328, 'gte-lever': 456, 'gte-unsigned': 271, 'asm-body': 13, 'keepalive': 345, 'verbatim-body': 2682}
C volatile 1590 1438 152 496 95 610 14 1576 {'decl-body': 58, 'decl-file': 152, 'cast': 1378, 'param': 2}
A pins 2419 2419 0 1515 676 1091 2419 0 {'pin': 2419}
B asm 11361 11348 13 4717 776 1428 2570 8791 {'barrier': 329, 'launder': 705, 'gte-lever': 456, 'gte': 6328, 'keepalive': 345, 'gte-unsigned': 271, 'instruction': 232, 'asm-body': 13, 'verbatim-body': 2682}
C volatile 1590 1438 152 496 95 610 14 1576 {'cast': 1378, 'decl-body': 58, 'decl-file': 152, 'param': 2}
D register 50 50 0 47 47 6 0 50 {'register': 50}
E asm-label 7787 1364 6423 1096 157 2090 0 7787 {'asm-label': 7787}
F builtin 445 445 0 428 27 302 0 445 {'builtin': 445}
G attribute 76 1 75 1 1 40 0 76 {'attribute': 76}
UNION A–D: 5,978 bodies · 1,228 distinct (addresses normalized) · 121 multi-copy classes holding 4,871 bodies · by kind {'ov': 5527, 'main': 160, 'md': 119, 'shared': 162, 'resident': 10}
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 4,504 sites in 2,234 bodies (917 distinct) · marked !FAKE 4,504 · UNMARKED 0
UNION A–D: 5,974 bodies · 1,224 distinct (addresses normalized) · 121 multi-copy classes holding 4,871 bodies · by kind {'ov': 5523, 'shared': 162, 'main': 160, 'md': 119, 'resident': 10}
THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 4,499 sites in 2,229 bodies (912 distinct) · marked !FAKE 4,499 · UNMARKED 0
orphan !FAKE markers (no pin/asm site on the line nor below): 0
marked ordinary-C fakes kept by Drew's S104 ruling (a) (`do { } while (0)`, dead initialisers; NOT levers): 33
GTE levers (clobbers beyond the canonical macro's): 456 sites (94 via a variant macro, 362 direct) · marked 456 · UNMARKED 0 · unsigned GTE statements 271
per-TU asm macro definitions outside the GTE header: 314 {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1} (GTE variants 64)
pins: 2,423 · $0 70 · $sp 13 · with initializer 221 · volatile-qualified 0 · bare-name 15 · spellings {'__asm__': 2393, 'asm': 30}
pins: 2,419 · $0 70 · $sp 13 · with initializer 221 · volatile-qualified 0 · bare-name 15 · spellings {'__asm__': 2389, 'asm': 30}
whole-body asm routines in C shells, manifest PERMANENT (hand asm, NOT levers): 22 routines · 2,682 sites (2,660 private copies + 22 shared headers); asm-bodies NOT permanent (levers): 13 site(s) ['func_8001E378:DECOMPILE-NOW', 'func_80020F34:DECOMPILE-NOW', 'func_800249F0:DECOMPILE-NOW', 'func_80025CBC:DECOMPILE-NOW', 'func_80026514:UNCERTAIN', 'func_800268D0:UNCERTAIN', 'func_80027058:DECOMPILE-NOW', 'func_80027200:DECOMPILE-NOW', 'func_800CBA44:DECOMPILE-NOW', 'func_8017D810:DECOMPILE-NOW', 'func_8017E26C:UNCERTAIN', 'func_80184440:DECOMPILE-NOW', 'func_801A3BCC:DECOMPILE-NOW']
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 328, 'barrier/via-macro': 2, 'gte/direct': 200, 'gte/via-macro': 6128, 'gte-lever/direct': 362, 'gte-lever/via-macro': 94, 'gte-unsigned/direct': 271, 'instruction/direct': 210, 'instruction/via-macro': 22, 'keepalive/direct': 345, 'launder/direct': 663, 'launder/via-macro': 42, 'verbatim-body/direct': 2682}
instruction mnemonics: {'la': 142, 'addu': 23, 'addiu': 22, 'RTP_SND': 22, '.section': 7, 'lui': 4, 'lh': 3, 'and': 2, 'sll': 1, 'mult': 1, 'mfhi': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
gte mnemonics: {'gte_ldv0': 757, 'gte_stlvnl': 593, 'gte_stsxy': 447, 'gte_rtps': 437, 'gte_stflg': 415, 'gte_rtpt': 352, 'gte_SetRotMatrix': 249, 'gte_stsxy3': 236, 'gte_SetTransMatrix': 229, 'gte_rtv0tr': 228, 'gte_ldv3c': 184, 'gte_ldv3': 177, 'gte_stsv': 161, 'lwc2': 159, 'gte_stsz4': 149, 'gte_stsz3': 147, 'gte_stszotz': 134, 'gte_dpcl': 134, 'gte_stsxy3_f3': 111, 'gte_stclmv': 108, 'gte_nclip': 108, 'gte_stopz': 108, 'gte_stsxy3c': 108, 'gte_stsxy3_ft3': 79, 'gte_rtir': 75, 'gte_ldclmv': 72, 'gte_avsz4': 56, 'gte_stotz': 52, 'gte_ldrgb': 30, 'gte_nccs': 25}
asm kinds: {'asm-body/direct': 13, 'barrier/direct': 327, 'barrier/via-macro': 2, 'gte/direct': 200, 'gte/via-macro': 6128, 'gte-lever/direct': 362, 'gte-lever/via-macro': 94, 'gte-unsigned/direct': 271, 'instruction/direct': 210, 'instruction/via-macro': 22, 'keepalive/direct': 345, 'launder/direct': 663, 'launder/via-macro': 42, 'verbatim-body/direct': 2682}
instruction mnemonics: {'la': 142, 'addu': 23, 'addiu': 22, 'RTP_SND': 22, '.section': 7, 'lui': 4, 'lh': 3, 'and': 2, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
gte mnemonics: {'gte_ldv0': 757, 'gte_stlvnl': 593, 'gte_stsxy': 447, 'gte_rtps': 437, 'gte_stflg': 415, 'gte_rtpt': 352, 'gte_SetRotMatrix': 249, 'gte_stsxy3': 236, 'gte_SetTransMatrix': 229, 'gte_rtv0tr': 228, 'gte_ldv3c': 184, 'gte_ldv3': 177, 'gte_stsv': 161, 'lwc2': 159, 'gte_stsz4': 149, 'gte_stsz3': 147, 'gte_stszotz': 134, 'gte_dpcl': 134, 'gte_stsxy3_f3': 111, 'gte_nclip': 108, 'gte_stopz': 108, 'gte_stsxy3c': 108, 'gte_stclmv': 108, 'gte_stsxy3_ft3': 79, 'gte_rtir': 75, 'gte_ldclmv': 72, 'gte_avsz4': 56, 'gte_stotz': 52, 'gte_ldrgb': 30, 'gte_nccs': 25}
asm-bearing macro definitions: 314 (20 names, 3 with >1 text) kinds {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1}
controls (R39):
src/800.c func_800226C0 pins got 14 expected 45 N-A
src/shared/ov/func_80178004.h pins got 8 expected 26 N-A
ov_SC03_006 func_80184034 bare-name pins got 0 expected 3 N-A
engine_prelude.h asm sites (a macro definition only) got 0 expected 0 OK
elapsed 34.7 s
elapsed 44.2 s