mirror of
https://github.com/ACreTeam/ac-decomp
synced 2026-07-07 12:03:27 -04:00
dol stuff
This commit is contained in:
+13
-7
@@ -4,16 +4,22 @@ libultra/gfxprint/gfxprint_locate8x8.c:
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||||
.text: [0x8005B210, 0x8005B238]
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||||
libforest/ReconfigBATs.c:
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.text: [0x8005adac, 0x8005aed4]
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||||
# OS/OSDisableInterrupts.c:
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# .text: [0x8007ac24, 0x8007ac38]
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OS/OSEnableInterrupts.c:
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.text: [0x8007ac38, 0x8007ac4c]
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OS/OSRestoreInterrupts.c:
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.text: [0x8007ac4c, 0x8007ac70]
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BASE/ppcarch.c:
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.text: [0x8007867c, 0x800786e8]
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OS/OSArena.c:
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.text: [0x8007988c, 0x800798ac]
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.sdata: [0x80218178, 0x80218180]
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.sbss: [0x802188f8, 0x80218900]
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# OS/OSCache.c:
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# .text: [0x80079b40, 0x80079d30]
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# OS/OSDisableInterrupts.c:
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# .text: [0x8007ac24, 0x8007ac38]
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OS/OSEnableInterrupts.c:
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.text: [0x8007ac38, 0x8007ac4c]
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OS/OSRestoreInterrupts.c:
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.text: [0x8007ac4c, 0x8007ac70]
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MSL_C/rand.c:
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.text: [0x8009f46c, 0x8009f494]
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.sdata: [0x80218260, 0x80218268]
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libultra/ultra.c:
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.text: [0x8005d01c, 0x8005d090]
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@@ -7,7 +7,7 @@ zurumode/zerucheck_key_check.c:
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zurumode/zurumode_cleanup.c:
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.text: [0x8040efc4, 0x8040f008]
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# zurumode/zurumode_update.c:
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# .text: [0x8040EDA8 , 0x8040ee74] Has C++ functions but was matched with C?? Won't really bother at the moment with this one.
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# .text: [0x8040EDA8 , 0x8040ee74] Won't really bother at the moment with this one.
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m_random_field/mRF_MakePerfectBit.c:
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.text: [0x8050B1AC, 0x8050B1D4]
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m_random_field/mRF_GetRandomStepMode.c:
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@@ -1,6 +1,7 @@
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#ifndef OS_CACHE_H
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#define OS_CACHE_H
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#include "types.h"
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#include "dolphin/OSContext.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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@@ -0,0 +1,45 @@
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#ifndef OS_CONTEXT_H
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#define OS_CONTEXT_H
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#include "types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct OSContext{
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u32 gprs[32];
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u32 cr;
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u32 lr;
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u32 ctr;
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u32 xer;
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f64 fprs[32];
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u32 fpscr_tmp;
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u32 fpscr;
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u32 srr0;
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u32 srr1;
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u16 SHORT_0x1A0;
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u16 SHORT_0x1A2;
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u32 gqrs[8];
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char UNK_0x1C4;
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f64 psfs[32];
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} OSContext;
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OSContext* OS_CURRENT_CONTEXT_PHYS : 0x800000C0;
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OSContext* OS_CURRENT_CONTEXT : 0x800000D4;
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OSContext* OS_CURRENT_FPU_CONTEXT : 0x800000D8;
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asm void OSSaveFPUContext(OSContext*);
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asm void OSSetCurrentContext(OSContext*);
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OSContext* OSGetCurrentContext(void);
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asm BOOL OSSaveContext(OSContext*);
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asm void OSLoadContext(OSContext*);
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asm void* OSGetStackPointer(void);
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void OSClearContext(OSContext*);
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asm void OSInitContext(OSContext*);
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void OSDumpContext(OSContext*);
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void __OSContextInit(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -1,7 +1,17 @@
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#ifndef OS_MEMORY_H
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#define OS_MEMORY_H
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#include "types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define SIM_MEM *(u32 *)0x800000f0
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static asm void Config24MB();
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static asm void Config48MB();
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u32 OSGetConsoleSimulatedMemSize(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -0,0 +1,13 @@
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#ifndef OS_TIME_H
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#define OS_TIME_H
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#include "types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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asm s32 OSGetTime(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -12,6 +12,10 @@ void OSReport(const char*, ...);
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asm BOOL OSDisableInterrupts(void);
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asm BOOL OSEnableInterrupts(void);
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asm BOOL OSRestoreInterrupts(BOOL level);
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void __RAS_OSDisableInterrupts_begin(void);
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void __RAS_OSDisableInterrupts_end(void);
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#ifdef __cplusplus
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}
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#endif
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@@ -1,10 +1,18 @@
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#ifndef LIBULTRA_H
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#define LIBULTRA_H
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#include "types.h"
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void bcmp (const void *v1, const void *v2, u32 size);
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void bcopy(const void *dst, void *src, size_t n);
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#include "dolphin/OSTime.h"
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#include "dolphin/OSCache.h"
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int bcmp (void *v1, void *v2, u32 size);
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void bcopy(void *dst, void *src, size_t n);
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void bzero(void *ptr, size_t size);
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void osSyncPrintf(const char* fmt, ...);
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void osWritebackDCache(void* vaddr, u32 nbytes);
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u32 osGetCount(void);
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extern s32 osAppNMIBuffer[15];
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extern void * memcpy(void * dst, const void * src, size_t n);
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extern void * memset(void * dst, int val, size_t n);
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extern void __fill_mem(void * dst, int val, unsigned long n);
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#endif
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@@ -0,0 +1,8 @@
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#ifndef RAND_H
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#define RAND_H
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#include "types.h"
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void srand (u32 seeed);
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int rand(void);
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#endif
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@@ -0,0 +1,12 @@
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#include "rand.h"
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static u32 next = 1;
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void srand(u32 seed){
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next = seed;
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}
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int rand(){
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next = next * 1103515245 + 12345;
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return ((next >> 16) & 0x7fff);
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}
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+37
-37
@@ -2,7 +2,7 @@
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//Needs OSError stuff
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asm void DCEnable(void){
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nofralloc
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sync 0
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sync
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mfspr r3, 0x3f0
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ori r3, r3, 0x4000
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mtspr 0x3f0, r3
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@@ -10,42 +10,42 @@ asm void DCEnable(void){
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}
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asm void DCInvalidateRange(register void* buf, register u32 len){
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nofralloc
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cmplw len, 0
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cmplwi len, 0
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blelr-
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clrlwi. r5, buf, 0x1b
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beq- pi_r
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addi len, len 0x20
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addi len, len, 0x20
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pi_r:
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addi len, len 0x1f
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addi len, len, 0x1f
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srwi len, len, 5
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mtctr len
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inv_ran:
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dcbi 0, buf
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addi buf, buf 0x20
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addi buf, buf, 0x20
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bdnz inv_ran
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blr
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}
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asm void DCFlushRange(register void* buf, register u32 len){
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nofralloc
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cmplw len, 0
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cmplwi len, 0
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blelr-
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clrlwi. r5, buf, 0x1b
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beq- pf_r
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addi len, len 0x20
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addi len, len, 0x20
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pf_r:
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addi len, len 0x1f
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addi len, len, 0x1f
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srwi len, len, 5
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mtctr len
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fls_ran:
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dcbf 0, buf
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addi buf, buf 0x20
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addi buf, buf, 0x20
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bdnz fls_ran
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sc
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blr
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@@ -53,21 +53,21 @@ fls_ran:
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asm void DCStoreRange(register void* buf, register u32 len){
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nofralloc
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cmplw len, 0
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cmplwi len, 0
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blelr-
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clrlwi. r5, buf, 0x1b
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beq- ps_r
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addi len, len 0x20
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addi len, len, 0x20
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ps_r:
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addi len, len 0x1f
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addi len, len, 0x1f
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srwi len, len, 5
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mtctr len
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st_ran:
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dcbst 0, buf
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addi buf, buf 0x20
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addi buf, buf, 0x20
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bdnz st_ran
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sc
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blr
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@@ -75,42 +75,42 @@ st_ran:
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asm void DCFlushRangeNoSync(register void* buf, register u32 len){
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nofralloc
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cmplw len, 0
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cmplwi len, 0
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blelr-
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clrlwi. r5, buf, 0x1b
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beq- pf_r
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addi len, len 0x20
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beq- pfns_r
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addi len, len, 0x20
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pfns_r:
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addi len, len 0x1f
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addi len, len, 0x1f
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srwi len, len, 5
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mtctr len
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fls_ranns:
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dcbf 0, buf
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addi buf, buf 0x20
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addi buf, buf, 0x20
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bdnz fls_ranns
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blr
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}
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asm void DCStoreRangeNoSync(register void* buf, register u32 len){
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nofralloc
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cmplw len, 0
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cmplwi len, 0
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blelr-
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clrlwi. r5, buf, 0x1b
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beq- psns_r
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addi len, len 0x20
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addi len, len, 0x20
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psns_r:
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addi len, len 0x1f
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addi len, len, 0x1f
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srwi len, len, 5
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mtctr len
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st_ranns:
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dcbst 0, buf
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addi buf, buf 0x20
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addi buf, buf, 0x20
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bdnz st_ranns
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sc
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blr
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@@ -118,65 +118,65 @@ st_ranns:
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asm void DCZeroRange(register void* buf, register u32 len){
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nofralloc
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cmplw len, 0
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cmplwi len, 0
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blelr-
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clrlwi. r5, buf, 0x1b
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beq- pzr_r
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addi len, len 0x20
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addi len, len, 0x20
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|
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pzr_r:
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addi len, len 0x1f
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addi len, len, 0x1f
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srwi len, len, 5
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mtctr len
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z_ran:
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dcbz 0, buf
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addi buf, buf 0x20
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addi buf, buf, 0x20
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bdnz z_ran
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||||
blr
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||||
}
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|
||||
asm void DCTouchRange(register void* buf, register u32 len){
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||||
nofralloc
|
||||
cmplw len, 0
|
||||
cmplwi len, 0
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||||
blelr-
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|
||||
clrlwi. r5, buf, 0x1b
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||||
beq- ptor_r
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||||
addi len, len 0x20
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||||
addi len, len, 0x20
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||||
|
||||
ptor_r:
|
||||
addi len, len 0x1f
|
||||
addi len, len, 0x1f
|
||||
srwi len, len, 5
|
||||
mtctr len
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||||
|
||||
t_ran:
|
||||
dcbt 0, buf
|
||||
addi buf, buf 0x20
|
||||
addi buf, buf, 0x20
|
||||
bdnz t_ran
|
||||
blr
|
||||
}
|
||||
|
||||
asm void ICInvalidateRange(register void* buf, register u32 len){
|
||||
nofralloc
|
||||
cmplw len, 0
|
||||
cmplwi len, 0
|
||||
blelr-
|
||||
|
||||
clrlwi. r5, buf, 0x1b
|
||||
beq- pir_r
|
||||
addi len, len 0x20
|
||||
addi len, len, 0x20
|
||||
|
||||
pir_r:
|
||||
addi len, len 0x1f
|
||||
addi len, len, 0x1f
|
||||
srwi len, len, 5
|
||||
mtctr len
|
||||
|
||||
i_ran:
|
||||
icbi 0, buf
|
||||
addi buf, buf 0x20
|
||||
addi buf, buf, 0x20
|
||||
bdnz i_ran
|
||||
sync 0
|
||||
sync
|
||||
isync
|
||||
blr
|
||||
}
|
||||
@@ -197,14 +197,14 @@ asm void ICEnable(void){
|
||||
blr
|
||||
}
|
||||
|
||||
asm void ICDisable(void){
|
||||
asm void LCDisable(void){
|
||||
nofralloc
|
||||
lis r3, 0xE000
|
||||
li r4, 0x200
|
||||
mtctr r4
|
||||
dis:
|
||||
dcbi 0, r3
|
||||
addi r3, r3 0x20
|
||||
addi r3, r3, 0x20
|
||||
bdnz dis
|
||||
mfspr r4, 0x398
|
||||
rlwinm r4, r4, 0, 4, 2
|
||||
|
||||
@@ -0,0 +1,249 @@
|
||||
#include "dolphin/OSContext.h"
|
||||
|
||||
static asm void __OSLoadFPUContext(int unused, register OSContext* ctx){
|
||||
nofralloc
|
||||
lhz r5, ctx->SHORT_0x1A2
|
||||
clrlwi. r5, r5, 0x1f
|
||||
beq exit
|
||||
|
||||
lfd f0, ctx->fpscr_temp
|
||||
mtfs f0
|
||||
mfspr r5, 0x398
|
||||
rlwinm. r5, r5, 3, 0x1f, 0x1f
|
||||
beq load_fprs
|
||||
|
||||
psq_l f0, 0x1C8(ctx), 0, 0
|
||||
psq_l f1, 0x1D0(ctx), 0, 0
|
||||
psq_l f2, 0x1D8(ctx), 0, 0
|
||||
psq_l f3, 0x1E0(ctx), 0, 0
|
||||
psq_l f4, 0x1E8(ctx), 0, 0
|
||||
psq_l f5, 0x1F0(ctx), 0, 0
|
||||
psq_l f6, 0x1F8(ctx), 0, 0
|
||||
psq_l f7, 0x200(ctx), 0, 0
|
||||
psq_l f8, 0x208(ctx), 0, 0
|
||||
psq_l f9, 0x210(ctx), 0, 0
|
||||
psq_l f10, 0x218(ctx), 0, 0
|
||||
psq_l f11, 0x220(ctx), 0, 0
|
||||
psq_l f12, 0x228(ctx), 0, 0
|
||||
psq_l f13, 0x230(ctx), 0, 0
|
||||
psq_l f14, 0x238(ctx), 0, 0
|
||||
psq_l f15, 0x240(ctx), 0, 0
|
||||
psq_l f16, 0x248(ctx), 0, 0
|
||||
psq_l f17, 0x250(ctx), 0, 0
|
||||
psq_l f18, 0x258(ctx), 0, 0
|
||||
psq_l f19, 0x260(ctx), 0, 0
|
||||
psq_l f20, 0x268(ctx), 0, 0
|
||||
psq_l f21, 0x270(ctx), 0, 0
|
||||
psq_l f22, 0x278(ctx), 0, 0
|
||||
psq_l f23, 0x280(ctx), 0, 0
|
||||
psq_l f24, 0x288(ctx), 0, 0
|
||||
psq_l f25, 0x290(ctx), 0, 0
|
||||
psq_l f26, 0x298(ctx), 0, 0
|
||||
psq_l f27, 0x2A0(ctx), 0, 0
|
||||
psq_l f28, 0x2A8(ctx), 0, 0
|
||||
psq_l f29, 0x2B0(ctx), 0, 0
|
||||
psq_l f30, 0x2B8(ctx), 0, 0
|
||||
psq_l f31, 0x2C0(ctx), 0, 0
|
||||
|
||||
load_fprs:
|
||||
lfd f0, ctx->fprs[0]
|
||||
lfd f1, ctx->fprs[1]
|
||||
lfd f2, ctx->fprs[2]
|
||||
lfd f3, ctx->fprs[3]
|
||||
lfd f4, ctx->fprs[4]
|
||||
lfd f5, ctx->fprs[5]
|
||||
lfd f6, ctx->fprs[6]
|
||||
lfd f7, ctx->fprs[7]
|
||||
lfd f8, ctx->fprs[8]
|
||||
lfd f9, ctx->fprs[9]
|
||||
lfd f10, ctx->fprs[10]
|
||||
lfd f11, ctx->fprs[11]
|
||||
lfd f12, ctx->fprs[12]
|
||||
lfd f13, ctx->fprs[13]
|
||||
lfd f14, ctx->fprs[14]
|
||||
lfd f15, ctx->fprs[15]
|
||||
lfd f16, ctx->fprs[16]
|
||||
lfd f17, ctx->fprs[17]
|
||||
lfd f18, ctx->fprs[18]
|
||||
lfd f19, ctx->fprs[19]
|
||||
lfd f20, ctx->fprs[20]
|
||||
lfd f21, ctx->fprs[21]
|
||||
lfd f22, ctx->fprs[22]
|
||||
lfd f23, ctx->fprs[23]
|
||||
lfd f24, ctx->fprs[24]
|
||||
lfd f25, ctx->fprs[25]
|
||||
lfd f26, ctx->fprs[26]
|
||||
lfd f27, ctx->fprs[27]
|
||||
lfd f28, ctx->fprs[28]
|
||||
lfd f29, ctx->fprs[29]
|
||||
lfd f30, ctx->fprs[30]
|
||||
lfd f31, ctx->fprs[31]
|
||||
|
||||
exit:
|
||||
blr
|
||||
}
|
||||
|
||||
static asm void __OSSaveFPUContext( int unused, int unused1, register OSContext* ctx){
|
||||
nofralloc
|
||||
lhz r3, ctx->SHORT_0x1A2
|
||||
ori r3, r3, 1
|
||||
sth r3, ctx->SHORT_0x1A2
|
||||
|
||||
stfd f0, ctx->fprs[0]
|
||||
stfd f1, ctx->fprs[1]
|
||||
stfd f2, ctx->fprs[2]
|
||||
stfd f3, ctx->fprs[3]
|
||||
stfd f4, ctx->fprs[4]
|
||||
stfd f5, ctx->fprs[5]
|
||||
stfd f6, ctx->fprs[6]
|
||||
stfd f7, ctx->fprs[7]
|
||||
stfd f8, ctx->fprs[8]
|
||||
stfd f9, ctx->fprs[9]
|
||||
stfd f10, ctx->fprs[10]
|
||||
stfd f11, ctx->fprs[11]
|
||||
stfd f12, ctx->fprs[12]
|
||||
stfd f13, ctx->fprs[13]
|
||||
stfd f14, ctx->fprs[14]
|
||||
stfd f15, ctx->fprs[15]
|
||||
stfd f16, ctx->fprs[16]
|
||||
stfd f17, ctx->fprs[17]
|
||||
stfd f18, ctx->fprs[18]
|
||||
stfd f19, ctx->fprs[19]
|
||||
stfd f20, ctx->fprs[20]
|
||||
stfd f21, ctx->fprs[21]
|
||||
stfd f22, ctx->fprs[22]
|
||||
stfd f23, ctx->fprs[23]
|
||||
stfd f24, ctx->fprs[24]
|
||||
stfd f25, ctx->fprs[25]
|
||||
stfd f26, ctx->fprs[26]
|
||||
stfd f27, ctx->fprs[27]
|
||||
stfd f28, ctx->fprs[28]
|
||||
stfd f29, ctx->fprs[29]
|
||||
stfd f30, ctx->fprs[30]
|
||||
stfd f31, ctx->fprs[31]
|
||||
|
||||
mffs f0
|
||||
stfd f0, ctx->fpscr_tmp
|
||||
lfd f0, ctx->fprs[0]
|
||||
mfspr r3, 0x398
|
||||
rlwinm. r3, r3, 3, 0x1f, 0x1f
|
||||
beq exit
|
||||
|
||||
psq_st f0, 0x1C8(ctx), 0, 0
|
||||
psq_st f1, 0x1D0(ctx), 0, 0
|
||||
psq_st f2, 0x1D8(ctx), 0, 0
|
||||
psq_st f3, 0x1E0(ctx), 0, 0
|
||||
psq_st f4, 0x1E8(ctx), 0, 0
|
||||
psq_st f5, 0x1F0(ctx), 0, 0
|
||||
psq_st f6, 0x1F8(ctx), 0, 0
|
||||
psq_st f7, 0x200(ctx), 0, 0
|
||||
psq_st f8, 0x208(ctx), 0, 0
|
||||
psq_st f9, 0x210(ctx), 0, 0
|
||||
psq_st f10, 0x218(ctx), 0, 0
|
||||
psq_st f11, 0x220(ctx), 0, 0
|
||||
psq_st f12, 0x228(ctx), 0, 0
|
||||
psq_st f13, 0x230(ctx), 0, 0
|
||||
psq_st f14, 0x238(ctx), 0, 0
|
||||
psq_st f15, 0x240(ctx), 0, 0
|
||||
psq_st f16, 0x248(ctx), 0, 0
|
||||
psq_st f17, 0x250(ctx), 0, 0
|
||||
psq_st f18, 0x258(ctx), 0, 0
|
||||
psq_st f19, 0x260(ctx), 0, 0
|
||||
psq_st f20, 0x268(ctx), 0, 0
|
||||
psq_st f21, 0x270(ctx), 0, 0
|
||||
psq_st f22, 0x278(ctx), 0, 0
|
||||
psq_st f23, 0x280(ctx), 0, 0
|
||||
psq_st f24, 0x288(ctx), 0, 0
|
||||
psq_st f25, 0x290(ctx), 0, 0
|
||||
psq_st f26, 0x298(ctx), 0, 0
|
||||
psq_st f27, 0x2A0(ctx), 0, 0
|
||||
psq_st f28, 0x2A8(ctx), 0, 0
|
||||
psq_st f29, 0x2B0(ctx), 0, 0
|
||||
psq_st f30, 0x2B8(ctx), 0, 0
|
||||
psq_st f31, 0x2C0(ctx), 0, 0
|
||||
|
||||
exit:
|
||||
blr
|
||||
}
|
||||
|
||||
asm void OSSetCurrentContext(register OSContext* ctx){
|
||||
nofralloc
|
||||
lis r4, 0x8000
|
||||
stw ctx, OS_GET_CURRENT_CONTEXT@l(r4)
|
||||
clrlwi r5, ctx, 2
|
||||
stw r5, OS_CURRENT_CONTEXT_PHYS@l(r4)
|
||||
lwz r5, OS_CURRENT_FPU_CONTEXT@l(r4)
|
||||
cmpw r5, ctx
|
||||
bne not_cur_fpu_ctx
|
||||
|
||||
lwz r6, ctx->srr1
|
||||
ori r6, r6, 0x2000
|
||||
stw r6, ctx->srr1
|
||||
mfmsr r6
|
||||
ori r6, r6, 2
|
||||
mtmsr r6
|
||||
blr
|
||||
|
||||
not_cur_fpu_ctx:
|
||||
lwz r6, ctx->srr1
|
||||
rlwinm r6, r6, 0, 0x13, 0x11
|
||||
stw r6, ctx->srr1
|
||||
mfmsr r6
|
||||
rlwinm r6, r6, 0, 0x13, 0x11
|
||||
ori r6, r6, 2
|
||||
mtmsr r6
|
||||
isync
|
||||
blr
|
||||
}
|
||||
|
||||
OSContext* OSGetCurrentContext(void) {
|
||||
return(OS_CURRENT_CONTEXT)
|
||||
}
|
||||
|
||||
asm BOOL OSSaveContext(register OSContext* ctx){
|
||||
nofralloc
|
||||
stmw r13, ctx->gprs[13]
|
||||
mfspr r0, 0x391
|
||||
stw r3, ctx->gqrs[1]
|
||||
mfspr r0, 0x392
|
||||
stw r3, ctx->gqrs[2]
|
||||
mfspr r0, 0x393
|
||||
stw r3, ctx->gqrs[3]
|
||||
mfpsr r0, 0x394
|
||||
stw r3, ctx->gqrs[4]
|
||||
mfspr r0, 0x395
|
||||
stw r3, ctx->gqrs[5]
|
||||
mfpsr r0, 0x396
|
||||
stw r3, ctx->gqrs[6]
|
||||
mfspr r0, 0x397
|
||||
stw r3, ctx->gqrs[7]
|
||||
|
||||
mfcr r0
|
||||
|
||||
stw r3, ctx->cr
|
||||
mflr r0
|
||||
stw r3, ctx->lr
|
||||
stw r3, ctx->srr0
|
||||
mfmsr r0
|
||||
|
||||
stw r3, ctx->srr1
|
||||
mfctr r0
|
||||
|
||||
stw r3, ctx->ctr
|
||||
mfxer r0
|
||||
|
||||
stw r3, ctx->xer
|
||||
|
||||
stw r1, ctx->gprs[1]
|
||||
stw r2, ctx->gprs[2]
|
||||
li r0, 1
|
||||
li r0, 0x0c(r3)
|
||||
li r3, 0
|
||||
|
||||
blr
|
||||
}
|
||||
|
||||
/* asm void OSLoadContext(register OSContext* ctx){
|
||||
nofralloc
|
||||
|
||||
} */
|
||||
@@ -2,9 +2,12 @@
|
||||
|
||||
asm BOOL OSDisableInterrupts(void){
|
||||
nofralloc
|
||||
|
||||
entry __RAS_OSDisableInterrupts_begin
|
||||
mfmsr r3
|
||||
rlwinm r4, r3, 0, 17, 15
|
||||
mtmsr r4
|
||||
entry __RAS_OSDisableInterrupts_end
|
||||
rlwinm r3, r3, 17, 31, 31
|
||||
blr
|
||||
}
|
||||
@@ -0,0 +1,5 @@
|
||||
#include "dolphin/OSMemory.h"
|
||||
|
||||
u32 OSGetConsoleSimulatedMemSize(void){
|
||||
return(SIM_MEM);
|
||||
}
|
||||
@@ -0,0 +1,23 @@
|
||||
#include "libultra/libultra.h"
|
||||
|
||||
void bcopy(void* __src, void* __dst, size_t __n) {
|
||||
memmove(__dst, __src, __n);
|
||||
}
|
||||
|
||||
|
||||
int bcmp(void* __s1, void* __s2, size_t __n) {
|
||||
return memcmp(__s1, __s2, __n);
|
||||
}
|
||||
|
||||
void bzero(void* __s, size_t __n) {
|
||||
memset(__s, 0, __n);
|
||||
}
|
||||
|
||||
/* void osWritebackDCache(void* buf, u32 len){
|
||||
DCStoreRange();
|
||||
}
|
||||
*/
|
||||
/* s32 osGetCount(void){
|
||||
return OSGetTick();
|
||||
}
|
||||
*/
|
||||
Reference in New Issue
Block a user